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authorHaojian Zhuang <haojian.zhuang@marvell.com>2010-04-27 14:55:28 -0400
committerSamuel Ortiz <sameo@linux.intel.com>2010-05-27 19:37:41 -0400
commit68e488d965a9055c63c0eac4ad1e6568b07e8ee1 (patch)
treec577b35443981445a5f96ca5a063a943650ec0a0 /drivers
parente47a3bbe4ffd4afe2b24c912598aee7ea1ecf738 (diff)
mfd: Delay to mask tsc irq in max8925
There're two IRQ pins output from MAX8925. One is PMIC interrupt, the other is TSC interrupt. But they're sharing one irq chip. After initializing MAX8925 interrupts, unexpected TSC interrupt may occur and it can't be cleared if touch driver isn't loaded. Now move the operation of masking TSC interrupt behind requesting PMIC interrupt. If touch driver isn't loaded, this interrupt is always masked. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mfd/max8925-core.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/mfd/max8925-core.c b/drivers/mfd/max8925-core.c
index 85d63c04749b..f621bcea3d02 100644
--- a/drivers/mfd/max8925-core.c
+++ b/drivers/mfd/max8925-core.c
@@ -508,7 +508,7 @@ static int max8925_irq_init(struct max8925_chip *chip, int irq,
508 max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2); 508 max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2);
509 max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ); 509 max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ);
510 max8925_reg_read(chip->adc, MAX8925_TSC_IRQ); 510 max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
511 /* mask all interrupts */ 511 /* mask all interrupts except for TSC */
512 max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0); 512 max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0);
513 max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0); 513 max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0);
514 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff); 514 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff);
@@ -516,7 +516,6 @@ static int max8925_irq_init(struct max8925_chip *chip, int irq,
516 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff); 516 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff);
517 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff); 517 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff);
518 max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff); 518 max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff);
519 max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0xff);
520 519
521 mutex_init(&chip->irq_lock); 520 mutex_init(&chip->irq_lock);
522 chip->core_irq = irq; 521 chip->core_irq = irq;
@@ -547,7 +546,11 @@ static int max8925_irq_init(struct max8925_chip *chip, int irq,
547 dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret); 546 dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret);
548 chip->core_irq = 0; 547 chip->core_irq = 0;
549 } 548 }
549
550tsc_irq: 550tsc_irq:
551 /* mask TSC interrupt */
552 max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0x0f);
553
551 if (!pdata->tsc_irq) { 554 if (!pdata->tsc_irq) {
552 dev_warn(chip->dev, "No interrupt support on TSC IRQ\n"); 555 dev_warn(chip->dev, "No interrupt support on TSC IRQ\n");
553 return 0; 556 return 0;