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authorThomas Winischhofer <thomas@winischhofer.net>2005-09-09 16:04:45 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2005-09-09 16:58:01 -0400
commit544393fe584d333480659a4bed30f5295355df11 (patch)
tree873b30c67cdbb5cb93e6fd816692db312ed6ddd6 /drivers
parent5c06e2aa6339112befdc87b350b8bf712890d7a7 (diff)
[PATCH] sisfb update
This lifts sisfb from version 1.7.17 to version 1.8.9. Changes include: - Added support for XGI V3XT, V5, V8, Z7 chipsets, including POSTing of all of these chipsets. - Added support for latest SiS chipsets (761). - Added support for SiS76x memory "hybrid" mode. - Added support for new LCD resolutions (eg 1280x854, 856x480). - Fixed support for 320x240 STN panels (for embedded devices). - Fixed many HDTV modes (525p, 750p, 1080i). - Fixed PCI config register reading/writing to use proper kernel functions for this purpose. - Fixed PCI ROM handling to use the kernel's proper functions. - Removed lots of "typedef"s. - Removed lots of code which was for X.org/XFree86 only. - Fixed coding style in many places. - Removed lots of 2.4 cruft. - Reduced stack size by unifying two previously separate structs into one. - Added new hooks for memory allocation (for DRM). Now the driver can truly handle multiple cards, including memory management. - Fixed numerous minor bugs. Signed-off-by: Thomas Winischhofer <thomas@winischhofer.net> Cc: "Antonino A. Daplas" <adaplas@pol.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/Kconfig14
-rw-r--r--drivers/video/sis/300vtbl.h1363
-rw-r--r--drivers/video/sis/310vtbl.h2125
-rw-r--r--drivers/video/sis/Makefile2
-rw-r--r--drivers/video/sis/init.c5603
-rw-r--r--drivers/video/sis/init.h1732
-rw-r--r--drivers/video/sis/init301.c9630
-rw-r--r--drivers/video/sis/init301.h351
-rw-r--r--drivers/video/sis/initdef.h145
-rw-r--r--drivers/video/sis/initextlfb.c238
-rw-r--r--drivers/video/sis/oem300.h335
-rw-r--r--drivers/video/sis/oem310.h421
-rw-r--r--drivers/video/sis/osdef.h27
-rw-r--r--drivers/video/sis/sis.h746
-rw-r--r--drivers/video/sis/sis_accel.c479
-rw-r--r--drivers/video/sis/sis_accel.h9
-rw-r--r--drivers/video/sis/sis_main.c7525
-rw-r--r--drivers/video/sis/sis_main.h602
-rw-r--r--drivers/video/sis/vgatypes.h155
-rw-r--r--drivers/video/sis/vstruct.h1097
20 files changed, 14226 insertions, 18373 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 544c717c6ee4..e906b5421795 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1079,15 +1079,16 @@ config FB_SAVAGE_ACCEL
1079 choose N here. 1079 choose N here.
1080 1080
1081config FB_SIS 1081config FB_SIS
1082 tristate "SiS acceleration" 1082 tristate "SiS/XGI display support"
1083 depends on FB && PCI 1083 depends on FB && PCI
1084 select FB_CFB_FILLRECT 1084 select FB_CFB_FILLRECT
1085 select FB_CFB_COPYAREA 1085 select FB_CFB_COPYAREA
1086 select FB_CFB_IMAGEBLIT 1086 select FB_CFB_IMAGEBLIT
1087 select FB_SOFT_CURSOR 1087 select FB_SOFT_CURSOR
1088 help 1088 help
1089 This is the frame buffer device driver for the SiS 300, 315 and 1089 This is the frame buffer device driver for the SiS 300, 315, 330
1090 330 series VGA chipsets. Specs available at <http://www.sis.com> 1090 and 340 series as well as XGI V3XT, V5, V8, Z7 graphics chipsets.
1091 Specs available at <http://www.sis.com> and <http://www.xgitech.com>.
1091 1092
1092 To compile this driver as a module, choose M here; the module 1093 To compile this driver as a module, choose M here; the module
1093 will be called sisfb. 1094 will be called sisfb.
@@ -1099,11 +1100,12 @@ config FB_SIS_300
1099 Say Y here to support use of the SiS 300/305, 540, 630 and 730. 1100 Say Y here to support use of the SiS 300/305, 540, 630 and 730.
1100 1101
1101config FB_SIS_315 1102config FB_SIS_315
1102 bool "SiS 315/330 series support" 1103 bool "SiS 315/330/340 series and XGI support"
1103 depends on FB_SIS 1104 depends on FB_SIS
1104 help 1105 help
1105 Say Y here to support use of the SiS 315 and 330 series 1106 Say Y here to support use of the SiS 315, 330 and 340 series
1106 (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760). 1107 (315/H/PRO, 55x, 650, 651, 740, 330, 661, 741, 760, 761) as well
1108 as XGI V3XT, V5, V8 and Z7.
1107 1109
1108config FB_NEOMAGIC 1110config FB_NEOMAGIC
1109 tristate "NeoMagic display support" 1111 tristate "NeoMagic display support"
diff --git a/drivers/video/sis/300vtbl.h b/drivers/video/sis/300vtbl.h
index b6d5c71b2563..e4b4a2626da4 100644
--- a/drivers/video/sis/300vtbl.h
+++ b/drivers/video/sis/300vtbl.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * Register settings for SiS 300 series 4 * Register settings for SiS 300 series
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,31 +50,7 @@
50 * 50 *
51 */ 51 */
52 52
53static const SiS_StStruct SiS300_SModeIDTable[] = 53static const struct SiS_Ext SiS300_EModeIDTable[] =
54{
55 {0x01,0x9208,0x01,0x00,0x00,0x00,0x00,0x00, 0},
56 {0x01,0x1210,0x14,0x01,0x01,0x00,0x00,0x00, 0},
57 {0x01,0x1010,0x17,0x02,0x02,0x00,0x00,0x00, 0},
58 {0x03,0x8208,0x03,0x00,0x00,0x00,0x00,0x00, 0},
59 {0x03,0x0210,0x16,0x01,0x01,0x00,0x00,0x00, 0},
60 {0x03,0x0010,0x18,0x02,0x02,0x00,0x00,0x00, 0},
61 {0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x00, 0},
62 {0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x00, 0},
63 {0x07,0x0000,0x07,0x03,0x03,0x00,0x00,0x00, 0},
64 {0x07,0x0000,0x19,0x02,0x02,0x00,0x00,0x00, 0},
65 {0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x00, 0},
66 {0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x00, 0},
67 {0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x00, 0},
68 {0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x00, 0},
69 {0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x00, 0},
70 {0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x00, 0},
71 {0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x00, 0},
72 {0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x00, 0},
73 {0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x00, 0},
74 {0xff, 0, 0, 0, 0, 0, 0, 0, 0}
75};
76
77static const SiS_ExtStruct SiS300_EModeIDTable[] =
78{ 54{
79 {0x6a,0x2212,0x0102,SIS_RI_800x600, 0x00,0x00,0x00,0x00,0x00,-1}, /* 800x600x? */ 55 {0x6a,0x2212,0x0102,SIS_RI_800x600, 0x00,0x00,0x00,0x00,0x00,-1}, /* 800x600x? */
80 {0x2e,0x0a1b,0x0101,SIS_RI_640x480, 0x00,0x00,0x00,0x00,0x08,-1}, 56 {0x2e,0x0a1b,0x0101,SIS_RI_640x480, 0x00,0x00,0x00,0x00,0x08,-1},
@@ -110,7 +86,7 @@ static const SiS_ExtStruct SiS300_EModeIDTable[] =
110 {0x59,0x921b,0x0138,SIS_RI_320x200, 0x00,0x00,0x00,0x00,0x23,-1}, /* 320x200x8 */ 86 {0x59,0x921b,0x0138,SIS_RI_320x200, 0x00,0x00,0x00,0x00,0x23,-1}, /* 320x200x8 */
111 {0x5c,0x921f,0x0000,SIS_RI_512x384, 0x00,0x00,0x00,0x00,0x26,-1}, /* 512x384x32 */ 87 {0x5c,0x921f,0x0000,SIS_RI_512x384, 0x00,0x00,0x00,0x00,0x26,-1}, /* 512x384x32 */
112 {0x5d,0x021d,0x0139,SIS_RI_640x400, 0x00,0x00,0x00,0x00,0x10,-1}, /* 640x400x16 */ 88 {0x5d,0x021d,0x0139,SIS_RI_640x400, 0x00,0x00,0x00,0x00,0x10,-1}, /* 640x400x16 */
113 {0x5e,0x021f,0x0000,SIS_RI_640x400, 0x00,0x00,0x00,0x00,0x10,-1}, /* 640x400x32 */ 89 {0x5e,0x021f,0x0000,SIS_RI_640x400, 0x00,0x00,0x00,0x00,0x10,-1}, /* 640x400x32 */
114 {0x62,0x0a3f,0x013a,SIS_RI_640x480, 0x00,0x00,0x00,0x00,0x08,-1}, 90 {0x62,0x0a3f,0x013a,SIS_RI_640x480, 0x00,0x00,0x00,0x00,0x08,-1},
115 {0x63,0x2a3f,0x013b,SIS_RI_800x600, 0x00,0x00,0x00,0x00,0x00,-1}, /* 800x600x32 */ 91 {0x63,0x2a3f,0x013b,SIS_RI_800x600, 0x00,0x00,0x00,0x00,0x00,-1}, /* 800x600x32 */
116 {0x64,0x0a7f,0x013c,SIS_RI_1024x768, 0x00,0x00,0x00,0x00,0x13,-1}, 92 {0x64,0x0a7f,0x013c,SIS_RI_1024x768, 0x00,0x00,0x00,0x00,0x13,-1},
@@ -119,8 +95,8 @@ static const SiS_ExtStruct SiS300_EModeIDTable[] =
119 {0x68,0x067b,0x013f,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x27,-1}, 95 {0x68,0x067b,0x013f,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x27,-1},
120 {0x69,0x06fd,0x0140,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x27,-1}, 96 {0x69,0x06fd,0x0140,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x27,-1},
121 {0x6b,0x07ff,0x0000,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x27,-1}, 97 {0x6b,0x07ff,0x0000,SIS_RI_1920x1440,0x00,0x00,0x00,0x00,0x27,-1},
122 {0x6c,0x067b,0x0000,SIS_RI_2048x1536,0x00,0x00,0x00,0x00,0x28,-1}, /* 2048x1536x8 - not in BIOS! */ 98 {0x6c,0x067b,0x0000,SIS_RI_2048x1536,0x00,0x00,0x00,0x00,0x28,-1}, /* 2048x1536x8 */
123 {0x6d,0x06fd,0x0000,SIS_RI_2048x1536,0x00,0x00,0x00,0x00,0x28,-1}, /* 2048x1536x16 - not in BIOS! */ 99 {0x6d,0x06fd,0x0000,SIS_RI_2048x1536,0x00,0x00,0x00,0x00,0x28,-1}, /* 2048x1536x16 */
124 {0x70,0x6a1b,0x0000,SIS_RI_800x480, 0x00,0x00,0x07,0x00,0x2d,-1}, /* 800x480x8 */ 100 {0x70,0x6a1b,0x0000,SIS_RI_800x480, 0x00,0x00,0x07,0x00,0x2d,-1}, /* 800x480x8 */
125 {0x71,0x4a1b,0x0000,SIS_RI_1024x576, 0x00,0x00,0x00,0x00,0x30,-1}, /* 1024x576x8 */ 101 {0x71,0x4a1b,0x0000,SIS_RI_1024x576, 0x00,0x00,0x00,0x00,0x30,-1}, /* 1024x576x8 */
126 {0x74,0x4a1d,0x0000,SIS_RI_1024x576, 0x00,0x00,0x00,0x00,0x30,-1}, /* 1024x576x16 */ 102 {0x74,0x4a1d,0x0000,SIS_RI_1024x576, 0x00,0x00,0x00,0x00,0x30,-1}, /* 1024x576x16 */
@@ -166,77 +142,77 @@ static const SiS_ExtStruct SiS300_EModeIDTable[] =
166 {0xff,0x0000,0xffff,0, 0x00,0x00,0x00,0x00,0x00} 142 {0xff,0x0000,0xffff,0, 0x00,0x00,0x00,0x00,0x00}
167}; 143};
168 144
169static const SiS_Ext2Struct SiS300_RefIndex[] = 145static const struct SiS_Ext2 SiS300_RefIndex[] =
170{ 146{
171 {0x085f,0x0d,0x03,0x05,0x05,0x6a, 800, 600, 0}, /* 00 */ 147 {0x085f,0x0d,0x03,0x05,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 00 */
172 {0x0467,0x0e,0x44,0x05,0x05,0x6a, 800, 600, 0}, /* 01 */ 148 {0x0467,0x0e,0x04,0x05,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 01 */
173 {0x0067,0x0f,0x07,0x48,0x05,0x6a, 800, 600, 0}, /* 02 - CRT1CRTC was 0x4f */ 149 {0x0067,0x0f,0x07,0x48,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 02 - CRT1CRTC was 0x4f */
174 {0x0067,0x10,0x06,0x8b,0x05,0x6a, 800, 600, 0}, /* 03 */ 150 {0x0067,0x10,0x06,0x8b,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 03 */
175 {0x0147,0x11,0x08,0x00,0x05,0x6a, 800, 600, 0}, /* 04 */ 151 {0x0147,0x11,0x08,0x00,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 04 */
176 {0x0147,0x12,0x0c,0x00,0x05,0x6a, 800, 600, 0}, /* 05 */ 152 {0x0147,0x12,0x0c,0x00,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 05 */
177 {0x0047,0x11,0x4e,0x00,0x05,0x6a, 800, 600, 0}, /* 06 - CRT1CRTC was 0x51 */ 153 {0x0047,0x11,0x0e,0x00,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 06 - CRT1CRTC was 0x51 */
178 {0x0047,0x11,0x13,0x00,0x05,0x6a, 800, 600, 0}, /* 07 */ 154 {0x0047,0x11,0x13,0x00,0x05,0x6a, 800, 600, 0, 0x00, 0x00}, /* 07 */
179 {0xc85f,0x05,0x00,0x04,0x04,0x2e, 640, 480, 0}, /* 08 */ 155 {0xc85f,0x05,0x00,0x04,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 08 */
180 {0xc067,0x06,0x02,0x04,0x04,0x2e, 640, 480, 0}, /* 09 */ 156 {0xc067,0x06,0x02,0x04,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 09 */
181 {0xc067,0x07,0x02,0x47,0x04,0x2e, 640, 480, 0}, /* 0a */ 157 {0xc067,0x07,0x02,0x47,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 0a */
182 {0xc067,0x08,0x03,0x8a,0x04,0x2e, 640, 480, 0}, /* 0b */ 158 {0xc067,0x08,0x03,0x8a,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 0b */
183 {0xc047,0x09,0x05,0x00,0x04,0x2e, 640, 480, 0}, /* 0c */ 159 {0xc047,0x09,0x05,0x00,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 0c */
184 {0xc047,0x0a,0x08,0x00,0x04,0x2e, 640, 480, 0}, /* 0d */ 160 {0xc047,0x0a,0x08,0x00,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 0d */
185 {0xc047,0x0b,0x0a,0x00,0x04,0x2e, 640, 480, 0}, /* 0e */ 161 {0xc047,0x0b,0x0a,0x00,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 0e */
186 {0xc047,0x0c,0x10,0x00,0x04,0x2e, 640, 480, 0}, /* 0f */ 162 {0xc047,0x0c,0x10,0x00,0x04,0x2e, 640, 480, 0, 0x00, 0x00}, /* 0f */
187 {0x487f,0x04,0x00,0x00,0x00,0x2f, 640, 400, 0}, /* 10 */ 163 {0x487f,0x04,0x00,0x00,0x00,0x2f, 640, 400, 0, 0x4a, 0x49}, /* 10 */
188 {0xc06f,0x31,0x01,0x06,0x13,0x31, 720, 480, 0}, /* 11 */ 164 {0xc06f,0x31,0x01,0x06,0x13,0x31, 720, 480, 0, 0x00, 0x00}, /* 11 */
189 {0x006f,0x32,0x03,0x06,0x14,0x32, 720, 576, 0}, /* 12 */ 165 {0x006f,0x32,0x4a,0x06,0x14,0x32, 720, 576, 0, 0x00, 0x00}, /* 12 */ /* 4a was 03 */
190 {0x0187,0x15,0x05,0x00,0x06,0x37,1024, 768, 0}, /* 13 */ 166 {0x0187,0x15,0x05,0x00,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 13 */
191 {0xc877,0x16,0x09,0x06,0x06,0x37,1024, 768, 0}, /* 14 */ 167 {0xc877,0x16,0x09,0x06,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 14 */
192 {0xc067,0x17,0x0b,0x49,0x06,0x37,1024, 768, 0}, /* 15 - CRT1CRTC was 0x97 */ 168 {0xc067,0x17,0x0b,0x49,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 15 - CRT1CRTC was 0x97 */
193 {0x0267,0x18,0x0d,0x00,0x06,0x37,1024, 768, 0}, /* 16 */ 169 {0x0267,0x18,0x0d,0x00,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 16 */
194 {0x0047,0x19,0x11,0x8c,0x06,0x37,1024, 768, 0}, /* 17 - CRT1CRTC was 0x59 */ 170 {0x0047,0x19,0x11,0x8c,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 17 - CRT1CRTC was 0x59 */
195 {0x0047,0x1a,0x52,0x00,0x06,0x37,1024, 768, 0}, /* 18 */ 171 {0x0047,0x1a,0x12,0x00,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 18 */
196 {0x0007,0x1b,0x16,0x00,0x06,0x37,1024, 768, 0}, /* 19 - CRT1CRTC was 0x5b */ 172 {0x0007,0x1b,0x16,0x00,0x06,0x37,1024, 768, 0, 0x00, 0x00}, /* 19 - CRT1CRTC was 0x5b */
197 {0x0387,0x1c,0x4d,0x00,0x07,0x3a,1280,1024, 0}, /* 1a - CRT1CRTC was 0x5c */ 173 {0x0387,0x1c,0x0d,0x00,0x07,0x3a,1280,1024, 0, 0x00, 0x00}, /* 1a - CRT1CRTC was 0x5c */
198 {0x0077,0x1d,0x14,0x07,0x07,0x3a,1280,1024, 0}, /* 1b */ 174 {0x0077,0x1d,0x14,0x07,0x07,0x3a,1280,1024, 0, 0x00, 0x00}, /* 1b */
199 {0x0047,0x1e,0x17,0x00,0x07,0x3a,1280,1024, 0}, /* 1c */ 175 {0x0047,0x1e,0x17,0x00,0x07,0x3a,1280,1024, 0, 0x00, 0x00}, /* 1c */
200 {0x0007,0x1f,0x98,0x00,0x07,0x3a,1280,1024, 0}, /* 1d */ 176 {0x0007,0x1f,0x18,0x00,0x07,0x3a,1280,1024, 0, 0x00, 0x00}, /* 1d */
201 {0x0007,0x20,0x59,0x00,0x00,0x3c,1600,1200, 0}, /* 1e - CRT1CRTC was 0x60 */ 177 {0x0007,0x20,0x19,0x00,0x00,0x3c,1600,1200, 0, 0x00, 0x00}, /* 1e - CRT1CRTC was 0x60 */
202 {0x0007,0x21,0x5a,0x00,0x00,0x3c,1600,1200, 0}, /* 1f */ 178 {0x0007,0x21,0x1a,0x00,0x00,0x3c,1600,1200, 0, 0x00, 0x00}, /* 1f */
203 {0x0007,0x22,0x1b,0x00,0x00,0x3c,1600,1200, 0}, /* 20 */ 179 {0x0007,0x22,0x1b,0x00,0x00,0x3c,1600,1200, 0, 0x00, 0x00}, /* 20 */
204 {0x0007,0x23,0x1d,0x00,0x00,0x3c,1600,1200, 0}, /* 21 - CRT1CRTC was 0x63 */ 180 {0x0007,0x23,0x1d,0x00,0x00,0x3c,1600,1200, 0, 0x00, 0x00}, /* 21 - CRT1CRTC was 0x63 */
205 {0x0007,0x24,0x1e,0x00,0x00,0x3c,1600,1200, 0}, /* 22 */ 181 {0x0007,0x24,0x1e,0x00,0x00,0x3c,1600,1200, 0, 0x00, 0x00}, /* 22 */
206 {0x407f,0x00,0x00,0x00,0x00,0x40, 320, 200, 0}, /* 23 */ 182 {0x407f,0x00,0x00,0x00,0x00,0x40, 320, 200, 0, 0x4b, 0x4b}, /* 23 */
207 {0xc07f,0x01,0x00,0x04,0x04,0x50, 320, 240, 0}, /* 24 */ 183 {0xc07f,0x01,0x00,0x04,0x04,0x50, 320, 240, 0, 0x00, 0x00}, /* 24 */
208 {0x0077,0x02,0x04,0x05,0x05,0x51, 400, 300, 0}, /* 25 */ 184 {0x0077,0x02,0x04,0x05,0x05,0x51, 400, 300, 0, 0x00, 0x00}, /* 25 */
209 {0xc877,0x03,0x09,0x06,0x06,0x52, 512, 384, 0}, /* 26 */ /* was c077 */ 185 {0xc877,0x03,0x09,0x06,0x06,0x52, 512, 384, 0, 0x00, 0x00}, /* 26 */ /* was c077 */
210 {0x8207,0x25,0x1f,0x00,0x00,0x68,1920,1440, 0}, /* 27 */ 186 {0x8207,0x25,0x1f,0x00,0x00,0x68,1920,1440, 0, 0x00, 0x00}, /* 27 */
211 {0x0007,0x26,0x20,0x00,0x00,0x6c,2048,1536, 0}, /* 28 */ 187 {0x0007,0x26,0x20,0x00,0x00,0x6c,2048,1536, 0, 0x00, 0x00}, /* 28 */
212 {0x0067,0x27,0x14,0x08,0x0a,0x6e,1280, 960, 0}, /* 29 - 1280x960-60 */ 188 {0x0067,0x27,0x14,0x08,0x0a,0x6e,1280, 960, 0, 0x00, 0x00}, /* 29 - 1280x960-60 */
213 {0x0027,0x45,0x3c,0x08,0x0a,0x6e,1280, 960, 0}, /* 2a - 1280x960-85 */ 189 {0x0027,0x45,0x3c,0x08,0x0a,0x6e,1280, 960, 0, 0x00, 0x00}, /* 2a - 1280x960-85 */
214 {0xc077,0x33,0x09,0x06,0x00,0x20,1024, 600, 0}, /* 2b */ 190 {0xc077,0x33,0x09,0x06,0x00,0x20,1024, 600, 0, 0x00, 0x00}, /* 2b */
215 {0xc077,0x34,0x0b,0x06,0x00,0x23,1152, 768, 0}, /* 2c */ /* VCLK 0x09 */ 191 {0xc077,0x34,0x0b,0x06,0x00,0x23,1152, 768, 0, 0x00, 0x00}, /* 2c */ /* VCLK 0x09 */
216 {0x0077,0x35,0x27,0x08,0x18,0x70, 800, 480, 0}, /* 2d */ 192 {0x0077,0x35,0x27,0x08,0x18,0x70, 800, 480, 0, 0x00, 0x00}, /* 2d */
217 {0x0047,0x36,0x37,0x08,0x18,0x70, 800, 480, 0}, /* 2e */ 193 {0x0047,0x36,0x37,0x08,0x18,0x70, 800, 480, 0, 0x00, 0x00}, /* 2e */
218 {0x0047,0x37,0x08,0x08,0x18,0x70, 800, 480, 0}, /* 2f */ 194 {0x0047,0x37,0x08,0x08,0x18,0x70, 800, 480, 0, 0x00, 0x00}, /* 2f */
219 {0x0077,0x38,0x09,0x09,0x19,0x71,1024, 576, 0}, /* 30 */ 195 {0x0077,0x38,0x09,0x09,0x19,0x71,1024, 576, 0, 0x00, 0x00}, /* 30 */
220 {0x0047,0x39,0x38,0x09,0x19,0x71,1024, 576, 0}, /* 31 */ 196 {0x0047,0x39,0x38,0x09,0x19,0x71,1024, 576, 0, 0x00, 0x00}, /* 31 */
221 {0x0047,0x3a,0x11,0x09,0x19,0x71,1024, 576, 0}, /* 32 */ 197 {0x0047,0x3a,0x11,0x09,0x19,0x71,1024, 576, 0, 0x00, 0x00}, /* 32 */
222 {0x0077,0x3b,0x39,0x0a,0x0c,0x75,1280, 720, 0}, /* 33 */ 198 {0x0077,0x3b,0x39,0x0a,0x0c,0x75,1280, 720, 0, 0x00, 0x00}, /* 33 */
223 {0x0047,0x3c,0x3a,0x0a,0x0c,0x75,1280, 720, 0}, /* 34 */ 199 {0x0047,0x3c,0x3a,0x0a,0x0c,0x75,1280, 720, 0, 0x00, 0x00}, /* 34 */
224 {0x0007,0x3d,0x3b,0x0a,0x0c,0x75,1280, 720, 0}, /* 35 */ 200 {0x0007,0x3d,0x3b,0x0a,0x0c,0x75,1280, 720, 0, 0x00, 0x00}, /* 35 */
225 {0x0067,0x49,0x35,0x06,0x1a,0x29,1152, 864, 0}, /* 36 1152x864-60Hz */ 201 {0x0067,0x49,0x35,0x06,0x1a,0x29,1152, 864, 0, 0x00, 0x00}, /* 36 1152x864-60Hz */
226 {0x0067,0x3e,0x34,0x06,0x1a,0x29,1152, 864, 0}, /* 37 1152x864-75Hz */ 202 {0x0067,0x3e,0x34,0x06,0x1a,0x29,1152, 864, 0, 0x00, 0x00}, /* 37 1152x864-75Hz */
227 {0x0047,0x44,0x3a,0x06,0x1a,0x29,1152, 864, 0}, /* 38 1152x864-85Hz */ 203 {0x0047,0x44,0x3a,0x06,0x1a,0x29,1152, 864, 0, 0x00, 0x00}, /* 38 1152x864-85Hz */
228 {0x00c7,0x3f,0x28,0x00,0x16,0x39, 848, 480, 0}, /* 39 848x480-38Hzi */ 204 {0x00c7,0x3f,0x28,0x00,0x16,0x39, 848, 480, 0, 0x00, 0x00}, /* 39 848x480-38Hzi */
229 {0xc067,0x40,0x3d,0x0b,0x16,0x39, 848, 480, 0}, /* 3a 848x480-60Hz */ 205 {0xc067,0x40,0x3d,0x0b,0x16,0x39, 848, 480, 0, 0x00, 0x00}, /* 3a 848x480-60Hz */
230 {0x00c7,0x41,0x28,0x00,0x17,0x3f, 856, 480, 0}, /* 3b 856x480-38Hzi */ 206 {0x00c7,0x41,0x28,0x00,0x17,0x3f, 856, 480, 0, 0x00, 0x00}, /* 3b 856x480-38Hzi */
231 {0xc047,0x42,0x28,0x00,0x17,0x3f, 856, 480, 0}, /* 3c 856x480-60Hz */ 207 {0xc067,0x42,0x28,0x0c,0x17,0x3f, 856, 480, 0, 0x00, 0x00}, /* 3c 856x480-60Hz */
232 {0x0067,0x43,0x3e,0x0c,0x1b,0x48,1360, 768, 0}, /* 3d 1360x768-60Hz */ 208 {0x0067,0x43,0x3e,0x0d,0x1b,0x48,1360, 768, 0, 0x00, 0x00}, /* 3d 1360x768-60Hz */
233 {0x0077,0x46,0x3f,0x08,0x08,0x55,1280, 768, 0}, /* 3e 1280x768-60Hz */ 209 {0x0077,0x46,0x3f,0x08,0x08,0x55,1280, 768, 0, 0x00, 0x00}, /* 3e 1280x768-60Hz */
234 {0x006f,0x47,0x03,0x06,0x15,0x5f, 768, 576, 0}, /* 3f 768x576 */ 210 {0x006f,0x47,0x4c,0x06,0x15,0x5f, 768, 576, 0, 0x00, 0x00}, /* 3f 768x576 */
235 {0x0027,0x48,0x13,0x08,0x00,0x67,1360,1024, 0}, /* 40 1360x1024-59Hz (BARCO1366 only) */ 211 {0x0027,0x48,0x13,0x08,0x00,0x67,1360,1024, 0, 0x00, 0x00}, /* 40 1360x1024-59Hz (BARCO1366 only) */
236 {0xffff, 0, 0, 0, 0, 0, 0, 0, 0} 212 {0xffff, 0, 0, 0, 0, 0, 0, 0, 0, 0x00, 0x00}
237}; 213};
238 214
239static const SiS_VBModeStruct SiS300_VBModeIDTable[] = 215static const struct SiS_VBMode SiS300_VBModeIDTable[] =
240{ 216{
241 {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, 217 {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00},
242 {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01}, 218 {0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x01},
@@ -303,53 +279,26 @@ static const SiS_VBModeStruct SiS300_VBModeIDTable[] =
303 {0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00} 279 {0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
304}; 280};
305 281
306static const SiS_CRT1TableStruct SiS300_CRT1Table[] = 282static const struct SiS_CRT1Table SiS300_CRT1Table[] =
307{ 283{
308#if 1
309 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, /* 0x00 - 320x200 */ 284 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, /* 0x00 - 320x200 */
310 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00, /* HRE [4],[15] is invalid - but correcting it does not work */ 285 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00, /* HRE [4],[15] is invalid - but correcting it does not work */
311 0x00}}, 286 0x00}},
312#endif
313#if 0
314 {{0x2d,0x27,0x27,0x91,0x2c,0x92,0xbf,0x1f, /* 0x00 - corrected 320x200-72 - does not work */
315 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x04,
316 0x00}},
317#endif
318 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e, /* 0x01 */ 287 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e, /* 0x01 */
319 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00, /* HRE [4],[15] is invalid - but correcting it does not work */ 288 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00, /* HRE [4],[15] is invalid - but correcting it does not work */
320 0x00}}, 289 0x00}},
321#if 0
322 {{0x2d,0x27,0x27,0x91,0x2c,0x92,0x0b,0x3e, /* 0x01 - corrected 320x240-60 - does not work */
323 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x04,
324 0x00}},
325#endif
326 {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, /* 0x02 */ 290 {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, /* 0x02 */
327 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05, 291 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
328 0x01}}, 292 0x01}},
329#if 0
330 {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, /* 0x02 - corrected 400x300-60 */
331 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
332 0x01}},
333#endif
334 {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5, 293 {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
335 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01, 294 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
336 0x01}}, 295 0x01}},
337 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, 296 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
338 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05, 297 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
339 0x00}}, 298 0x00}},
340#if 0
341 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e, /* 0x05 */
342 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
343 0x00}},
344#endif
345 {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* 0x05 - corrected 640x480-60 */ 299 {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* 0x05 - corrected 640x480-60 */
346 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05, 300 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
347 0x00}}, 301 0x00}},
348#if 0
349 {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e, /* 0x06 */
350 0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
351 0x00}},
352#endif
353 {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e, /* 0x06 - corrected 640x480-72 */ 302 {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e, /* 0x06 - corrected 640x480-72 */
354 0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01, 303 0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01,
355 0x00}}, 304 0x00}},
@@ -359,19 +308,9 @@ static const SiS_CRT1TableStruct SiS300_CRT1Table[] =
359 {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f, 308 {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
360 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, 309 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
361 0x00}}, 310 0x00}},
362#if 0
363 {{0x66,0x4f,0x4f,0x86,0x56,0x9e,0x03,0x3e, /* 0x09 */
364 0xe4,0x87,0xdf,0xdf,0x04,0x00,0x00,0x01,
365 0x00}},
366#endif
367 {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e, /* 0x09 - corrected 640x480-100 */ 311 {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e, /* 0x09 - corrected 640x480-100 */
368 0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05, 312 0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05,
369 0x00}}, 313 0x00}},
370#if 0
371 {{0x6c,0x4f,0x4f,0x83,0x59,0x9e,0x00,0x3e, /* 0x0a */
372 0xe5,0x8d,0xdf,0xdf,0x01,0x00,0x00,0x01,
373 0x00}},
374#endif
375 {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e, /* 0x0a - corrected 640x480-120 */ 314 {{0x67,0x4f,0x4f,0x8b,0x57,0x83,0x10,0x3e, /* 0x0a - corrected 640x480-120 */
376 0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05, 315 0xe7,0x8d,0xdf,0xe6,0x11,0x00,0x00,0x05,
377 0x00}}, 316 0x00}},
@@ -459,11 +398,6 @@ static const SiS_CRT1TableStruct SiS300_CRT1Table[] =
459 {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba, 398 {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
460 0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05, 399 0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
461 0x00}}, 400 0x00}},
462#if 0
463 {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef, /* 0x27: 1280x960-70 - invalid! */
464 0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
465 0x01}},
466#endif
467 {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff, /* 0x27: 1280x960-60 - correct */ 401 {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff, /* 0x27: 1280x960-60 - correct */
468 0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07, 402 0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07,
469 0x01}}, 403 0x01}},
@@ -497,9 +431,9 @@ static const SiS_CRT1TableStruct SiS300_CRT1Table[] =
497 {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e, 431 {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
498 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05, 432 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
499 0x00}}, 433 0x00}},
500 {{0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0, /* 0x32 */ 434 {{0x6d,0x59,0x59,0x91,0x60,0x89,0x53,0xf0, /* 0x32: 720x576, corrected to 60Hz */
501 0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05, 435 0x41,0x84,0x3f,0x3f,0x54,0x00,0x00,0x05,
502 0x01}}, 436 0x41}},
503 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1, /* 0x33 - 1024x600 */ 437 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1, /* 0x33 - 1024x600 */
504 0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02, 438 0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
505 0x01}}, 439 0x01}},
@@ -560,18 +494,24 @@ static const SiS_CRT1TableStruct SiS300_CRT1Table[] =
560 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x20,0xf5, /* 1280x768-60 */ 494 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x20,0xf5, /* 1280x768-60 */
561 0x03,0x88,0xff,0xff,0x21,0x10,0x00,0x07, 495 0x03,0x88,0xff,0xff,0x21,0x10,0x00,0x07,
562 0x01}}, /* 0x46 */ 496 0x01}}, /* 0x46 */
563 {{0x7b,0x5f,0x63,0x9f,0x6a,0x93,0x6f,0xf0, /* 768x576 */ 497 {{0x75,0x5f,0x5f,0x99,0x66,0x90,0x53,0xf0, /* 768x576, corrected to 60Hz */
564 0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05, 498 0x41,0x84,0x3f,0x3f,0x54,0x00,0x00,0x05,
565 0x01}}, /* 0x47 */ 499 0x41}}, /* 0x47 */
566 {{0xce,0xa9,0xa9,0x92,0xb1,0x07,0x28,0x52, /* 1360x1024 (Barco iQ Pro R300) */ 500 {{0xce,0xa9,0xa9,0x92,0xb1,0x07,0x28,0x52, /* 1360x1024 (Barco iQ Pro R300) */
567 0x02,0x8e,0xff,0x00,0x29,0x0d,0x00,0x03, 501 0x02,0x8e,0xff,0x00,0x29,0x0d,0x00,0x03,
568 0x00}}, /* 0x48 */ 502 0x00}}, /* 0x48 */
569 {{0xcd,0x8f,0x8f,0x91,0x9b,0x1b,0x7a,0xff, /* 1152x864-60 */ 503 {{0xcd,0x8f,0x8f,0x91,0x9b,0x1b,0x7a,0xff, /* 1152x864-60 */
570 0x64,0x8c,0x5f,0x62,0x7b,0x10,0x00,0x07, 504 0x64,0x8c,0x5f,0x62,0x7b,0x10,0x00,0x07,
571 0x41}} /* 0x49 */ 505 0x41}}, /* 0x49 */
506 {{0x5c,0x4f,0x4f,0x80,0x57,0x80,0xa3,0x1f, /* fake 640x400@60Hz (for LCD and TV, not actually used) */
507 0x98,0x8c,0x8f,0x96,0xa4,0x30,0x00,0x05,
508 0x40}}, /* 0x4a */
509 {{0x2c,0x27,0x27,0x90,0x2d,0x92,0xa4,0x1f, /* fake 320x200@60Hz (for LCD and TV, not actually used) */
510 0x98,0x8c,0x8f,0x96,0xa5,0x30,0x00,0x04,
511 0x00}} /* 0x4b */
572}; 512};
573 513
574static const SiS_MCLKDataStruct SiS300_MCLKData_630[] = 514static const struct SiS_MCLKData SiS300_MCLKData_630[] =
575{ 515{
576 { 0x5a,0x64,0x80, 66}, 516 { 0x5a,0x64,0x80, 66},
577 { 0xb3,0x45,0x80, 83}, 517 { 0xb3,0x45,0x80, 83},
@@ -583,7 +523,7 @@ static const SiS_MCLKDataStruct SiS300_MCLKData_630[] =
583 { 0x37,0x61,0x80,100} 523 { 0x37,0x61,0x80,100}
584}; 524};
585 525
586static const SiS_MCLKDataStruct SiS300_MCLKData_300[] = 526static const struct SiS_MCLKData SiS300_MCLKData_300[] =
587{ 527{
588 { 0x68,0x43,0x80,125}, 528 { 0x68,0x43,0x80,125},
589 { 0x68,0x43,0x80,125}, 529 { 0x68,0x43,0x80,125},
@@ -595,7 +535,7 @@ static const SiS_MCLKDataStruct SiS300_MCLKData_300[] =
595 { 0x37,0x61,0x80,100} 535 { 0x37,0x61,0x80,100}
596}; 536};
597 537
598static SiS_VCLKDataStruct SiS300_VCLKData[] = 538static struct SiS_VCLKData SiS300_VCLKData[] =
599{ 539{
600 { 0x1b,0xe1, 25}, /* 0x00 */ 540 { 0x1b,0xe1, 25}, /* 0x00 */
601 { 0x4e,0xe4, 28}, /* 0x01 */ 541 { 0x4e,0xe4, 28}, /* 0x01 */
@@ -669,53 +609,26 @@ static SiS_VCLKDataStruct SiS300_VCLKData[] =
669 { 0xe2,0x46,135}, /* 0x45 */ /* 1280x1024-75, better clock for VGA2 */ 609 { 0xe2,0x46,135}, /* 0x45 */ /* 1280x1024-75, better clock for VGA2 */
670 { 0x70,0x29, 81}, /* 0x46 */ /* unused */ 610 { 0x70,0x29, 81}, /* 0x46 */ /* unused */
671 { 0, 0, 0}, /* 0x47 custom (will be filled out) */ 611 { 0, 0, 0}, /* 0x47 custom (will be filled out) */
672 { 0xce,0x25,189} /* 0x48 */ /* Replacement for index 0x1b for 730 (and 540?) */ 612 { 0xce,0x25,189}, /* 0x48 */ /* Replacement for index 0x1b for 730 (and 540?) */
613 { 0x15,0xe1, 20}, /* 0x49 */ /* 640x400@60 (fake, not actually used) */
614 { 0x5f,0xc6, 33}, /* 0x4a */ /* 720x576@60 */
615 { 0x37,0x5a, 10}, /* 0x4b */ /* 320x200@60 (fake, not actually used) */
616 { 0x2b,0xc2, 35} /* 0x4c */ /* 768@576@60 */
673}; 617};
674 618
675#ifdef LINUX_KERNEL 619static const unsigned char SiS300_SR15[4 * 8] =
676static UCHAR SiS300_SR07 = 0x10;
677#endif
678
679static const DRAM4Type SiS300_SR15[8] =
680{ 620{
681 {0x01,0x09,0xa3,0x00}, 621 0x01,0x09,0xa3,0x00,
682 {0x43,0x43,0x43,0x00}, 622 0x43,0x43,0x43,0x00,
683 {0x1e,0x1e,0x1e,0x00}, 623 0x1e,0x1e,0x1e,0x00,
684 {0x2a,0x2a,0x2a,0x00}, 624 0x2a,0x2a,0x2a,0x00,
685 {0x06,0x06,0x06,0x00}, 625 0x06,0x06,0x06,0x00,
686 {0x00,0x00,0x00,0x00}, 626 0x00,0x00,0x00,0x00,
687 {0x00,0x00,0x00,0x00}, 627 0x00,0x00,0x00,0x00,
688 {0x00,0x00,0x00,0x00} 628 0x00,0x00,0x00,0x00
689}; 629};
690 630
691#ifdef LINUX_KERNEL 631static const struct SiS_PanelDelayTbl SiS300_PanelDelayTbl[] =
692static UCHAR SiS300_SR1F = 0x00;
693static UCHAR SiS300_SR21 = 0x16;
694static UCHAR SiS300_SR22 = 0xb2;
695static UCHAR SiS300_SR23 = 0xf6;
696static UCHAR SiS300_SR24 = 0x0d;
697static UCHAR SiS300_SR25[] = {0x0,0x0};
698static UCHAR SiS300_SR31 = 0x00;
699static UCHAR SiS300_SR32 = 0x11;
700static UCHAR SiS300_SR33 = 0x00;
701static UCHAR SiS300_CRT2Data_1_2 = 0x40;
702static UCHAR SiS300_CRT2Data_4_D = 0x00;
703static UCHAR SiS300_CRT2Data_4_E = 0x00;
704static UCHAR SiS300_CRT2Data_4_10 = 0x80;
705
706static const USHORT SiS300_RGBSenseData = 0xd1;
707static const USHORT SiS300_VideoSenseData = 0xb3;
708static const USHORT SiS300_YCSenseData = 0xb9;
709static const USHORT SiS300_RGBSenseData2 = 0x0190;
710static const USHORT SiS300_VideoSenseData2 = 0x0174;
711static const USHORT SiS300_YCSenseData2 = 0x016b;
712
713static const DRAM4Type SiS300_CR40[5];
714
715static UCHAR SiS300_CR49[2];
716#endif
717
718static const SiS_PanelDelayTblStruct SiS300_PanelDelayTbl[] =
719{ 632{
720 {{0x05,0xaa}}, 633 {{0x05,0xaa}},
721 {{0x05,0x14}}, 634 {{0x05,0x14}},
@@ -735,33 +648,11 @@ static const SiS_PanelDelayTblStruct SiS300_PanelDelayTbl[] =
735 {{0x05,0x60}} 648 {{0x05,0x60}}
736}; 649};
737 650
738#if 0
739static const SiS_PanelDelayTblStruct SiS300_PanelDelayTblLVDS[] =
740{
741 {{0x05,0xaa}},
742 {{0x05,0x14}},
743 {{0x05,0x36}},
744 {{0x05,0x14}},
745 {{0x05,0x14}},
746 {{0x05,0x14}},
747 {{0x05,0x90}},
748 {{0x05,0x90}},
749 {{0x05,0x14}},
750 {{0x05,0x14}},
751 {{0x05,0x14}},
752 {{0x05,0x14}}, /* 2.07a (JVC): 14,96 */
753 {{0x05,0x28}}, /* 2.04.5c: 20, 80 - Clevo (2.04.2c): 05, 28 */
754 {{0x05,0x14}},
755 {{0x05,0x14}}, /* Some BIOSes: 05, 40 */
756 {{0x05,0x60}}
757};
758#endif
759
760/**************************************************************/ 651/**************************************************************/
761/* SIS VIDEO BRIDGE ----------------------------------------- */ 652/* SIS VIDEO BRIDGE ----------------------------------------- */
762/**************************************************************/ 653/**************************************************************/
763 654
764static const SiS_LCDDataStruct SiS300_St2LCD1024x768Data[] = 655static const struct SiS_LCDData SiS300_St2LCD1024x768Data[] =
765{ 656{
766 { 62, 25, 800, 546,1344, 806}, 657 { 62, 25, 800, 546,1344, 806},
767 { 32, 15, 930, 546,1344, 806}, 658 { 32, 15, 930, 546,1344, 806},
@@ -772,7 +663,7 @@ static const SiS_LCDDataStruct SiS300_St2LCD1024x768Data[] =
772 { 1, 1,1344, 806,1344, 806} 663 { 1, 1,1344, 806,1344, 806}
773}; 664};
774 665
775static const SiS_LCDDataStruct SiS300_ExtLCD1024x768Data[] = 666static const struct SiS_LCDData SiS300_ExtLCD1024x768Data[] =
776{ 667{
777 { 12, 5, 896, 512,1344, 806}, 668 { 12, 5, 896, 512,1344, 806},
778 { 12, 5, 896, 510,1344, 806}, 669 { 12, 5, 896, 510,1344, 806},
@@ -789,7 +680,7 @@ static const SiS_LCDDataStruct SiS300_ExtLCD1024x768Data[] =
789 { 1, 1,1344, 806,1344, 806} 680 { 1, 1,1344, 806,1344, 806}
790}; 681};
791 682
792static const SiS_LCDDataStruct SiS300_St2LCD1280x1024Data[] = 683static const struct SiS_LCDData SiS300_St2LCD1280x1024Data[] =
793{ 684{
794 { 22, 5, 800, 510,1650,1088}, 685 { 22, 5, 800, 510,1650,1088},
795 { 22, 5, 800, 510,1650,1088}, 686 { 22, 5, 800, 510,1650,1088},
@@ -801,7 +692,7 @@ static const SiS_LCDDataStruct SiS300_St2LCD1280x1024Data[] =
801 { 1, 1,1688,1066,1688,1066} 692 { 1, 1,1688,1066,1688,1066}
802}; 693};
803 694
804static const SiS_LCDDataStruct SiS300_ExtLCD1280x1024Data[] = 695static const struct SiS_LCDData SiS300_ExtLCD1280x1024Data[] =
805{ 696{
806 { 211, 60,1024, 501,1688,1066}, 697 { 211, 60,1024, 501,1688,1066},
807 { 211, 60,1024, 508,1688,1066}, 698 { 211, 60,1024, 508,1688,1066},
@@ -813,53 +704,116 @@ static const SiS_LCDDataStruct SiS300_ExtLCD1280x1024Data[] =
813 { 1, 1,1688,1066,1688,1066} 704 { 1, 1,1688,1066,1688,1066}
814}; 705};
815 706
816static const SiS_Part2PortTblStruct SiS300_CRT2Part2_1024x768_1[] = 707static const struct SiS_Part2PortTbl SiS300_CRT2Part2_1024x768_1[] =
817{ /* VESA Timing */ 708{ /* VESA Timing */
818 {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}}, 709 {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
819 {{0x2c,0x12,0x9a,0xae,0x88,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}}, 710 {{0x2c,0x12,0x9a,0xae,0x88,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
820 {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}}, 711 {{0x21,0x12,0xbf,0xe4,0xc0,0x21,0x45,0x09,0x00,0xa9,0x09,0x04}},
821 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, 712 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
822 {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}, 713 {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}},
823 {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}, 714 {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}},
824 {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}} 715 {{0x22,0x13,0xfe,0x25,0xff,0x21,0x45,0x0a,0x00,0xa9,0x0d,0x04}}
825}; 716};
826 717
827static const SiS_Part2PortTblStruct SiS300_CRT2Part2_1024x768_2[] = 718static const struct SiS_Part2PortTbl SiS300_CRT2Part2_1024x768_2[] =
828{ /* Non-VESA */ 719{ /* Non-VESA */
829 {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 720 {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
830 {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 721 {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
831 {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 722 {{0x28,0x12,0xa3,0xd0,0xaa,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
832 {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 723 {{0x2c,0x12,0x9a,0xae,0x88,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
833 {{0x28,0x13,0xe7,0x0b,0xe8,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 724 {{0x28,0x13,0xe7,0x0b,0xe8,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
834 {{0x38,0x18,0x16,0x00,0x00,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 725 {{0x38,0x18,0x16,0x00,0x00,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
835 {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}} 726 {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}
836};
837
838static const SiS_Part2PortTblStruct SiS300_CRT2Part2_1024x768_3[] =
839{
840 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
841};
842
843static const SiS_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_1[] =
844{
845 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
846};
847
848static const SiS_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_2[] =
849{
850 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
851}; 727};
852 728
853static const SiS_Part2PortTblStruct SiS300_CRT2Part2_1280x1024_3[] = 729static const struct SiS_Part2PortTbl SiS300_CRT2Part2_1024x768_3[] =
854{ 730{
855 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}} 731 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}
856}; 732};
857 733
858/**************************************************************/ 734/**************************************************************/
859/* LVDS/Chrontel -------------------------------------------- */ 735/* LVDS/Chrontel -------------------------------------------- */
860/**************************************************************/ 736/**************************************************************/
861 737
862static const SiS_LVDSDataStruct SiS300_CHTVUPALData[] = 738/* Custom data for Barco iQ R series */
739static const struct SiS_LVDSData SiS300_LVDSBARCO1366Data_1[]=
740{
741 { 832, 438,1331, 806},
742 { 832, 388,1331, 806},
743 { 832, 438,1331, 806},
744 { 832, 388,1331, 806},
745 { 832, 518,1331, 806},
746 {1050, 638,1344, 806},
747 {1344, 806,1344, 806},
748 {1688,1066,1688,1066},
749 {1688,1066,1688,1066} /* 1360x1024 */
750};
751
752/* Custom data for Barco iQ R series */
753static const struct SiS_LVDSData SiS300_LVDSBARCO1366Data_2[]=
754{
755 {1344, 806,1344, 806},
756 {1344, 806,1344, 806},
757 {1344, 806,1344, 806},
758 {1344, 806,1344, 806},
759 {1344, 806,1344, 806},
760 {1344, 806,1344, 806},
761 {1344, 806,1344, 806},
762 {1688,1066,1688,1066},
763 {1688,1066,1688,1066} /* 1360x1024 */
764};
765
766/* Custom data for Barco iQ G series */
767static const struct SiS_LVDSData SiS300_LVDSBARCO1024Data_1[]=
768{
769 { 832, 438,1331, 806},
770 { 832, 409,1331, 806},
771 { 832, 438,1331, 806},
772 { 832, 409,1331, 806},
773 { 832, 518,1331, 806}, /* 640x480 */
774 {1050, 638,1344, 806}, /* 800x600 */
775 {1344, 806,1344, 806}, /* 1024x768 */
776};
777
778/* Custom data for 848x480 and 856x480 parallel LVDS panels */
779static const struct SiS_LVDSData SiS300_LVDS848x480Data_1[]=
780{
781 { 0, 0, 0, 0},
782 { 0, 0, 0, 0},
783 { 0, 0, 0, 0},
784 { 0, 0, 0, 0},
785 {1088, 525,1088, 525}, /* 640x480 TODO */
786 {1088, 525,1088, 525}, /* 800x600 TODO */
787 {1088, 525,1088, 525}, /* 1024x768 TODO */
788 { 0, 0, 0, 0},
789 { 0, 0, 0, 0},
790 { 0, 0, 0, 0},
791 { 0, 0, 0, 0},
792 {1088, 525,1088, 525}, /* 848x480 */
793 {1088, 525,1088, 525}, /* 856x480 */
794 {1088, 525,1088, 525} /* 1360x768 TODO */
795};
796
797/* Custom data for 848x480 parallel panel */
798static const struct SiS_LVDSData SiS300_LVDS848x480Data_2[]=
799{
800 { 0, 0, 0, 0},
801 { 0, 0, 0, 0},
802 { 0, 0, 0, 0},
803 { 0, 0, 0, 0},
804 {1088, 525,1088, 525}, /* 640x480 */
805 {1088, 525,1088, 525}, /* 800x600 */
806 {1088, 525,1088, 525}, /* 1024x768 */
807 { 0, 0, 0, 0},
808 { 0, 0, 0, 0},
809 { 0, 0, 0, 0},
810 { 0, 0, 0, 0},
811 {1088, 525,1088, 525}, /* 848x480 */
812 {1088, 525,1088, 525}, /* 856x480 */
813 {1088, 525,1088, 525} /* 1360x768 TODO */
814};
815
816static const struct SiS_LVDSData SiS300_CHTVUPALData[] =
863{ 817{
864 {1008, 625,1008, 625}, 818 {1008, 625,1008, 625},
865 {1008, 625,1008, 625}, 819 {1008, 625,1008, 625},
@@ -869,7 +823,7 @@ static const SiS_LVDSDataStruct SiS300_CHTVUPALData[] =
869 { 936, 836, 936, 836} 823 { 936, 836, 936, 836}
870}; 824};
871 825
872static const SiS_LVDSDataStruct SiS300_CHTVOPALData[] = 826static const struct SiS_LVDSData SiS300_CHTVOPALData[] =
873{ 827{
874 {1008, 625,1008, 625}, 828 {1008, 625,1008, 625},
875 {1008, 625,1008, 625}, 829 {1008, 625,1008, 625},
@@ -879,7 +833,7 @@ static const SiS_LVDSDataStruct SiS300_CHTVOPALData[] =
879 { 960, 750, 960, 750} 833 { 960, 750, 960, 750}
880}; 834};
881 835
882static const SiS_LVDSDataStruct SiS300_CHTVSOPALData[] = 836static const struct SiS_LVDSData SiS300_CHTVSOPALData[] =
883{ 837{
884 {1008, 625,1008, 625}, 838 {1008, 625,1008, 625},
885 {1008, 625,1008, 625}, 839 {1008, 625,1008, 625},
@@ -889,486 +843,8 @@ static const SiS_LVDSDataStruct SiS300_CHTVSOPALData[] =
889 { 944, 625, 944, 625} 843 { 944, 625, 944, 625}
890}; 844};
891 845
892 846/* Custom des data for Barco iQ R200/300/400 (BIOS 2.00.07) */
893static const SiS_LVDSDesStruct SiS300_PanelType00_1[] = 847static const struct SiS_LVDSDes SiS300_PanelType04_1a[] = /* 1280x1024 (1366x1024) */
894{
895 { 1059, 626 }, /* 2.08 */
896 { 1059, 624 },
897 { 1059, 626 },
898 { 1059, 624 },
899 { 1059, 624 },
900 { 0, 627 },
901 { 0, 627 },
902 { 0, 0 },
903 { 0, 0 }
904#if 0
905 {0, 626},
906 {0, 624},
907 {0, 626},
908 {0, 624},
909 {0, 624},
910 {0, 627},
911 {0, 627},
912 {0, 0},
913 {0, 0}
914#endif
915};
916
917static const SiS_LVDSDesStruct SiS300_PanelType01_1[] =
918{
919 { 0, 0 }, /* 2.08 */
920 { 0, 0 },
921 { 0, 0 },
922 { 0, 0 },
923 { 0, 0 },
924 { 0, 0 },
925 { 0, 0 },
926 { 0, 0 },
927 { 0, 0 }
928#if 0
929 {1343, 798},
930 {1343, 794},
931 {1343, 798},
932 {1343, 794},
933 {1343, 0},
934 {1343, 0},
935 { 0, 805},
936 { 0, 794},
937 { 0, 0}
938#endif
939};
940
941static const SiS_LVDSDesStruct SiS300_PanelType02_1[] =
942{
943 { 1059, 626 }, /* 2.08 */
944 { 1059, 624 },
945 { 1059, 626 },
946 { 1059, 624 },
947 { 1059, 624 },
948 { 0, 627 },
949 { 0, 627 },
950 { 0, 0 },
951 { 0, 0 }
952#if 0
953 {0, 626},
954 {0, 624},
955 {0, 626},
956 {0, 624},
957 {0, 624},
958 {0, 627},
959 {0, 627},
960 {0, 0},
961 {0, 0}
962#endif
963};
964
965static const SiS_LVDSDesStruct SiS300_PanelType03_1[] =
966{
967 { 8, 436},
968 { 8, 440},
969 { 8, 436},
970 { 8, 440},
971 { 8, 512},
972 {1343, 798},
973 {1343, 794},
974 {1343, 798},
975 {1343, 794}
976};
977
978static const SiS_LVDSDesStruct SiS300_PanelType04_1[] = /* 1280x1024 */
979{
980 {1343, 798},
981 {1343, 794},
982 {1343, 798},
983 {1343, 794},
984 {1343, 0},
985 {1343, 0},
986 { 0, 805},
987 { 0, 794},
988 { 0, 0}
989};
990
991static const SiS_LVDSDesStruct SiS300_PanelType05_1[] =
992{
993 {1343, 798},
994 {1343, 794},
995 {1343, 798},
996 {1343, 794},
997 {1343, 0},
998 {1343, 0},
999 { 0, 805},
1000 { 0, 794},
1001 { 0, 0}
1002};
1003
1004static const SiS_LVDSDesStruct SiS300_PanelType06_1[] = /* Clevo Trumpion 1024x768 */
1005{
1006 {1343, 798},
1007 {1343, 794},
1008 {1343, 798},
1009 {1343, 794},
1010 {1343, 0},
1011 {1343, 0},
1012 { 0, 805},
1013 { 0, 794},
1014 { 0, 0}
1015};
1016
1017static const SiS_LVDSDesStruct SiS300_PanelType07_1[] =
1018{
1019 {1343, 798},
1020 {1343, 794},
1021 {1343, 798},
1022 {1343, 794},
1023 {1343, 0},
1024 {1343, 0},
1025 { 0, 805},
1026 { 0, 794},
1027 { 0, 0}
1028};
1029
1030static const SiS_LVDSDesStruct SiS300_PanelType08_1[] =
1031{
1032 {1059, 626},
1033 {1059, 624},
1034 {1059, 626},
1035 {1059, 624},
1036 {1059, 624},
1037 { 0, 627},
1038 { 0, 627},
1039 { 0, 0},
1040 { 0, 0}
1041};
1042
1043static const SiS_LVDSDesStruct SiS300_PanelType09_1[] =
1044{
1045 {1343, 798},
1046 {1343, 794},
1047 {1343, 798},
1048 {1343, 794},
1049 {1343, 0},
1050 {1343, 0},
1051 { 0, 805},
1052 { 0, 794},
1053 { 0, 0}
1054};
1055
1056static const SiS_LVDSDesStruct SiS300_PanelType0a_1[] =
1057{
1058 {1059, 626},
1059 {1059, 624},
1060 {1059, 626},
1061 {1059, 624},
1062 {1059, 624},
1063 { 0, 627},
1064 { 0, 627},
1065 { 0, 0},
1066 { 0, 0}
1067};
1068
1069static const SiS_LVDSDesStruct SiS300_PanelType0b_1[] =
1070{
1071 {1343, 0},
1072 {1343, 0},
1073 {1343, 0},
1074 {1343, 0},
1075 {1343, 0},
1076 {1343, 0},
1077 { 0, 799},
1078 { 0, 0},
1079 { 0, 0}
1080};
1081
1082static const SiS_LVDSDesStruct SiS300_PanelType0c_1[] =
1083{
1084 {1343, 798},
1085 {1343, 794},
1086 {1343, 798},
1087 {1343, 794},
1088 {1343, 0},
1089 {1343, 0},
1090 { 0, 805},
1091 { 0, 794},
1092 { 0, 0}
1093};
1094
1095static const SiS_LVDSDesStruct SiS300_PanelType0d_1[] =
1096{
1097 {1343, 798},
1098 {1343, 794},
1099 {1343, 798},
1100 {1343, 794},
1101 {1343, 0},
1102 {1343, 0},
1103 { 0, 805},
1104 { 0, 794},
1105 { 0, 0}
1106};
1107
1108static const SiS_LVDSDesStruct SiS300_PanelType0e_1[] =
1109{
1110 {1343, 798},
1111 {1343, 794},
1112 {1343, 798},
1113 {1343, 794},
1114 {1343, 0}, /* 640x480 */
1115 {1343, 0}, /* 800x600 */
1116 { 0, 805}, /* 1024x768 */
1117 { 0, 794}, /* 1280x1024 */
1118 { 0, 0} /* 1280x960 - not applicable */
1119};
1120
1121static const SiS_LVDSDesStruct SiS300_PanelType0f_1[] =
1122{
1123 {1343, 798},
1124 {1343, 794},
1125 {1343, 798},
1126 {1343, 794},
1127 {1343, 0},
1128 {1343, 0},
1129 { 0, 805},
1130 { 0, 794},
1131 { 0, 0}
1132};
1133
1134static const SiS_LVDSDesStruct SiS300_PanelType00_2[] =
1135{
1136 {976, 527},
1137 {976, 502},
1138 {976, 527},
1139 {976, 502},
1140 {976, 567},
1141 { 0, 627},
1142 { 0, 627},
1143 { 0, 0},
1144 { 0, 0}
1145};
1146
1147static const SiS_LVDSDesStruct SiS300_PanelType01_2[] =
1148{
1149 {1152, 622},
1150 {1152, 597},
1151 {1152, 622},
1152 {1152, 597},
1153 {1152, 662},
1154 {1232, 722},
1155 { 0, 805},
1156 { 0, 794},
1157 { 0, 0}
1158};
1159
1160static const SiS_LVDSDesStruct SiS300_PanelType02_2[] =
1161{
1162 {976, 527},
1163 {976, 502},
1164 {976, 527},
1165 {976, 502},
1166 {976, 567},
1167 { 0, 627},
1168 { 0, 627},
1169 { 0, 0},
1170 { 0, 0}
1171};
1172
1173static const SiS_LVDSDesStruct SiS300_PanelType03_2[] =
1174{
1175 {1152, 622},
1176 {1152, 597},
1177 {1152, 622},
1178 {1152, 597},
1179 {1152, 662},
1180 {1232, 722},
1181 { 0, 805},
1182 {1152, 622},
1183 {1152, 597}
1184};
1185
1186static const SiS_LVDSDesStruct SiS300_PanelType04_2[] =
1187{
1188 {1152, 622},
1189 {1152, 597},
1190 {1152, 622},
1191 {1152, 597},
1192 {1152, 662},
1193 {1232, 722},
1194 { 0, 805},
1195 { 0, 794},
1196 { 0, 0}
1197};
1198
1199static const SiS_LVDSDesStruct SiS300_PanelType05_2[] =
1200{
1201 {1152, 622},
1202 {1152, 597},
1203 {1152, 622},
1204 {1152, 597},
1205 {1152, 662},
1206 {1232, 722},
1207 { 0, 805},
1208 { 0, 794},
1209 { 0, 0}
1210};
1211
1212static const SiS_LVDSDesStruct SiS300_PanelType06_2[] =
1213{
1214 {1152, 622},
1215 {1152, 597},
1216 {1152, 622},
1217 {1152, 597},
1218 {1152, 662},
1219 {1232, 722},
1220 { 0, 805},
1221 { 0, 794},
1222 { 0, 0}
1223};
1224
1225static const SiS_LVDSDesStruct SiS300_PanelType07_2[] =
1226{
1227 {1152, 622},
1228 {1152, 597},
1229 {1152, 622},
1230 {1152, 597},
1231 {1152, 662},
1232 {1232, 722},
1233 { 0, 805},
1234 { 0, 794},
1235 { 0, 0}
1236};
1237
1238static const SiS_LVDSDesStruct SiS300_PanelType08_2[] =
1239{
1240 {976, 527},
1241 {976, 502},
1242 {976, 527},
1243 {976, 502},
1244 {976, 567},
1245 { 0, 627},
1246 { 0, 627},
1247 { 0, 0},
1248 { 0, 0}
1249};
1250
1251static const SiS_LVDSDesStruct SiS300_PanelType09_2[] =
1252{
1253 {1152, 622},
1254 {1152, 597},
1255 {1152, 622},
1256 {1152, 597},
1257 {1152, 662},
1258 {1232, 722},
1259 { 0, 805},
1260 { 0, 794},
1261 { 0, 0}
1262};
1263
1264static const SiS_LVDSDesStruct SiS300_PanelType0a_2[] =
1265{
1266 {976, 527},
1267 {976, 502},
1268 {976, 527},
1269 {976, 502},
1270 {976, 567},
1271 { 0, 627},
1272 { 0, 627},
1273 { 0, 0},
1274 { 0, 0}
1275};
1276
1277static const SiS_LVDSDesStruct SiS300_PanelType0b_2[] =
1278{
1279 { 1152, 700},
1280 { 1152, 675},
1281 { 1152, 700},
1282 { 1152, 675},
1283 { 1152, 740},
1284 { 1232, 799},
1285 { 0, 799},
1286 { 0, 0},
1287 { 0, 0}
1288};
1289
1290static const SiS_LVDSDesStruct SiS300_PanelType0c_2[] =
1291{
1292 {1152, 622},
1293 {1152, 597},
1294 {1152, 622},
1295 {1152, 597},
1296 {1152, 662},
1297 {1232, 722},
1298 { 0, 805},
1299 { 0, 794},
1300 { 0, 0}
1301};
1302
1303static const SiS_LVDSDesStruct SiS300_PanelType0d_2[] =
1304{
1305 {1152, 622},
1306 {1152, 597},
1307 {1152, 622},
1308 {1152, 597},
1309 {1152, 662},
1310 {1232, 722},
1311 { 0, 805},
1312 { 0, 794},
1313 { 0, 0}
1314};
1315
1316static const SiS_LVDSDesStruct SiS300_PanelType0e_2[] =
1317{
1318 {1152, 622},
1319 {1152, 597},
1320 {1152, 622},
1321 {1152, 597},
1322 {1152, 662},
1323 {1232, 722},
1324 { 0, 805},
1325 { 0, 794},
1326 { 0, 0}
1327};
1328
1329static const SiS_LVDSDesStruct SiS300_PanelType0f_2[] =
1330{
1331 {1152, 622},
1332 {1152, 597},
1333 {1152, 622},
1334 {1152, 597},
1335 {1152, 662},
1336 {1232, 722},
1337 { 0, 805},
1338 { 0, 794},
1339 { 0, 0}
1340};
1341
1342static const SiS_LVDSDesStruct SiS300_PanelTypeNS_1[]=
1343{
1344 { 0, 0},
1345 { 0, 0},
1346 { 0, 0},
1347 { 0, 0},
1348 { 0, 0},
1349 { 0, 0},
1350 { 0, 805},
1351 { 0, 0},
1352 { 0, 0},
1353 { 0, 0}
1354};
1355
1356static const SiS_LVDSDesStruct SiS300_PanelTypeNS_2[] =
1357{
1358 { 0 , 0},
1359 { 0 , 0},
1360 { 0 , 0},
1361 { 0 , 0},
1362 { 0 , 0},
1363 { 0 , 0},
1364 { 0 , 0},
1365 { 0 , 0},
1366 { 0 , 0},
1367 { 0 , 0}
1368};
1369
1370/* Custom data for Barco iQ R200/300/400 (BIOS 2.00.07) */
1371static const SiS_LVDSDesStruct SiS300_PanelType04_1a[] = /* 1280x1024 (1366x1024) */
1372{ 848{
1373 {1330, 798}, /* 320x200 */ 849 {1330, 798}, /* 320x200 */
1374 {1330, 794}, 850 {1330, 794},
@@ -1381,7 +857,7 @@ static const SiS_LVDSDesStruct SiS300_PanelType04_1a[] = /* 1280x1024 (1366x102
1381 { 0, 0} /* 1360x1024 */ 857 { 0, 0} /* 1360x1024 */
1382}; 858};
1383 859
1384static const SiS_LVDSDesStruct SiS300_PanelType04_2a[] = 860static const struct SiS_LVDSDes SiS300_PanelType04_2a[] =
1385{ 861{
1386 {1152, 622}, 862 {1152, 622},
1387 {1152, 597}, 863 {1152, 597},
@@ -1394,8 +870,8 @@ static const SiS_LVDSDesStruct SiS300_PanelType04_2a[] =
1394 { 0, 0} 870 { 0, 0}
1395}; 871};
1396 872
1397/* Custom data for Barco iQ G200/300/400 (BIOS 2.00.07) */ 873/* Custom des data for Barco iQ G200/300/400 (BIOS 2.00.07) */
1398static const SiS_LVDSDesStruct SiS300_PanelType04_1b[] = /* 1024x768 */ 874static const struct SiS_LVDSDes SiS300_PanelType04_1b[] = /* 1024x768 */
1399{ 875{
1400 {1330, 798}, /* 320x200 */ 876 {1330, 798}, /* 320x200 */
1401 {1330, 794}, 877 {1330, 794},
@@ -1406,7 +882,7 @@ static const SiS_LVDSDesStruct SiS300_PanelType04_1b[] = /* 1024x768 */
1406 { 0, 805} /* 1024x768 / 512x384 */ 882 { 0, 805} /* 1024x768 / 512x384 */
1407}; 883};
1408 884
1409static const SiS_LVDSDesStruct SiS300_PanelType04_2b[] = 885static const struct SiS_LVDSDes SiS300_PanelType04_2b[] =
1410{ 886{
1411 {1152, 622}, 887 {1152, 622},
1412 {1152, 597}, 888 {1152, 597},
@@ -1419,376 +895,7 @@ static const SiS_LVDSDesStruct SiS300_PanelType04_2b[] =
1419 895
1420/* CRT1 CRTC for slave modes */ 896/* CRT1 CRTC for slave modes */
1421 897
1422static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1[] = 898static const struct SiS_LVDSCRT1Data SiS300_CHTVCRT1UNTSC[] =
1423{
1424 {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
1425 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
1426 0x00 }},
1427 {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
1428 0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
1429 0x00 }},
1430 {{0x65,0x4f,0x89,0x56,0x83,0xaf,0x1f,
1431 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
1432 0x00 }},
1433 {{0x65,0x4f,0x89,0x56,0x83,0x83,0x1f,
1434 0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
1435 0x00 }},
1436 {{0x65,0x4f,0x89,0x56,0x83,0x04,0x3e,
1437 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
1438 0x00 }},
1439 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
1440 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1441 0x01 }}
1442};
1443
1444static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_1_H[] =
1445{
1446 {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
1447 0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
1448 0x00 }},
1449 {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
1450 0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
1451 0x00 }},
1452 {{0x30,0x27,0x94,0x2c,0x92,0xaf,0x1f,
1453 0x90,0x85,0x8f,0xab,0x30,0x00,0x04,
1454 0x00 }},
1455 {{0x30,0x27,0x94,0x2c,0x92,0x83,0x1f,
1456 0x5e,0x83,0x5d,0x79,0x10,0x00,0x04,
1457 0x00 }},
1458 {{0x30,0x27,0x94,0x2c,0x92,0x04,0x3e,
1459 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x04,
1460 0x00 }},
1461 {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
1462 0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
1463 0x01 }}
1464};
1465
1466static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1[] =
1467{
1468 {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
1469 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
1470 0x00}},
1471 {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
1472 0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
1473 0x00}},
1474 {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
1475 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
1476 0x00}},
1477 {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
1478 0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
1479 0x00}},
1480 {{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
1481 0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
1482 0x00}},
1483 {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
1484 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
1485 0x01}},
1486 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1487 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1488 0x01}}
1489};
1490
1491static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_1_H[] =
1492{
1493 {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
1494 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1495 0x00 }},
1496 {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
1497 0x60,0x87,0x5D,0x83,0x10,0x00,0x44,
1498 0x00}},
1499 {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
1500 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1501 0x00}},
1502 {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
1503 0x60,0x87,0x5D,0x83,0x10,0x00,0x44,
1504 0x00}},
1505 {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
1506 0xE2,0x89,0xdf,0x05,0x00,0x00,0x44,
1507 0x00}},
1508 {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
1509 0x5A,0x8F,0x57,0x7D,0x20,0x00,0x55,
1510 0x01}},
1511 {{0x4f,0x3F,0x93,0x45,0x0D,0x24,0xf5,
1512 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1513 0x01 }}
1514
1515#if 0
1516 {{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
1517 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1518 0x00 }},
1519 {{0x37,0x27,0x9B,0x2b,0x94,0x97,0x1f,
1520 0x60,0x87,0x5D,0x83,0x01,0x00,0x44,
1521 0x00}},
1522 {{0x37,0x27,0x9B,0x2b,0x94,0xc4,0x1f,
1523 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1524 0x00}},
1525 {{0x37,0x27,0x9B,0x2b,0x94,0x97,0x1f,
1526 0x60,0x87,0x5D,0x83,0x01,0x00,0x44,
1527 0x00}},
1528 {{0x37,0x27,0x9B,0x2b,0x94,0x04,0x3e,
1529 0xE2,0x89,0xDf,0x05,0x00,0x00,0x44,
1530 0x00}},
1531 {{0x41,0x31,0x85,0x35,0x1d,0x7c,0xf0,
1532 0x5A,0x8F,0x57,0x7D,0x20,0x00,0x55,
1533 0x01}},
1534 {{0x4f,0x3F,0x93,0x45,0x0D,0x24,0xf5,
1535 0x02,0x88,0xFf,0x25,0x10,0x00,0x01,
1536 0x01 }}
1537#endif
1538};
1539
1540static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1[] =
1541{
1542 {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
1543 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
1544 0x00 }},
1545 {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
1546 0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
1547 0x00 }},
1548 {{0x63,0x4f,0x87,0x54,0x9f,0xb4,0x1f,
1549 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
1550 0x00 }},
1551 {{0x63,0x4f,0x87,0x54,0x9f,0x82,0x1f,
1552 0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
1553 0x00 }},
1554 {{0x63,0x4f,0x87,0x54,0x9f,0x04,0x3e,
1555 0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
1556 0x00 }},
1557 {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
1558 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
1559 0x01 }},
1560 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1561 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1562 0x01 }}
1563};
1564
1565static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_1_H[] =
1566{
1567 {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
1568 0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
1569 0x00 }},
1570 {{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
1571 0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
1572 0x00 }},
1573 {{0x2f,0x27,0x93,0x2b,0x90,0xb4,0x1f,
1574 0x92,0x89,0x8f,0xb5,0x30,0x00,0x04,
1575 0x00 }},
1576 {{0x2f,0x27,0x93,0x2b,0x90,0x82,0x1f,
1577 0x60,0x87,0x5d,0x83,0x10,0x00,0x04,
1578 0x00 }},
1579 {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
1580 0xe2,0x89,0xdf,0x05,0x00,0x00,0x04,
1581 0x00 }},
1582 {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
1583 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
1584 0x01 }},
1585 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1586 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1587 0x01 }}
1588};
1589
1590static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2[] =
1591{
1592 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1593 0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
1594 0x00 }},
1595 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1596 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
1597 0x00 }},
1598 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1599 0xf4,0x88,0x8f,0x73,0x20,0x00,0x06,
1600 0x00 }},
1601 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1602 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x06,
1603 0x00 }},
1604 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
1605 0x1c,0x80,0xdf,0x73,0x00,0x00,0x06,
1606 0x00 }},
1607 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
1608 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1609 0x01 }}
1610};
1611
1612static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT1800x600_2_H[] =
1613{
1614 {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
1615 0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
1616 0x00 }},
1617 {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
1618 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
1619 0x00 }},
1620 {{0x3d,0x27,0x81,0x32,0x1a,0x72,0x3e,
1621 0xf4,0x88,0x8f,0x73,0x20,0x00,0x05,
1622 0x00 }},
1623 {{0x3d,0x27,0x81,0x3a,0x1a,0x72,0x3e,
1624 0xdb,0x8f,0x5d,0x73,0x20,0x00,0x05,
1625 0x00 }},
1626 {{0x3d,0x27,0x81,0x32,0x1a,0x72,0xba,
1627 0x1c,0x80,0xdf,0x73,0x00,0x00,0x05,
1628 0x00 }},
1629 {{0x3d,0x31,0x81,0x37,0x1f,0x72,0xf0,
1630 0x58,0x8c,0x57,0x73,0x20,0x00,0x05,
1631 0x01 }}
1632};
1633
1634static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2[] =
1635{
1636 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1637 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1638 0x00 }},
1639 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1640 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1641 0x00 }},
1642 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1643 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1644 0x00 }},
1645 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1646 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1647 0x00 }},
1648 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1649 0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
1650 0x00 }},
1651 {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
1652 0xae,0x84,0x57,0x25,0x30,0x00,0x02,
1653 0x01 }},
1654 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1655 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1656 0x01 }}
1657};
1658
1659static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11024x768_2_H[] =
1660{
1661 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1662 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1663 0x00 }},
1664 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1665 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1666 0x00 }},
1667 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1668 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1669 0x00 }},
1670 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1671 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1672 0x00 }},
1673 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1674 0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
1675 0x00 }},
1676 {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
1677 0xae,0x84,0x57,0x25,0x30,0x00,0x01,
1678 0x01 }},
1679 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1680 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1681 0x01 }}
1682};
1683
1684static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2[] =
1685{
1686 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1687 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1688 0x00 }},
1689 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1690 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1691 0x00 }},
1692 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1693 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1694 0x00 }},
1695 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1696 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1697 0x00 }},
1698 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1699 0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
1700 0x00 }},
1701 {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
1702 0xae,0x84,0x57,0x25,0x30,0x00,0x02,
1703 0x01 }},
1704 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1705 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1706 0x01 }}
1707};
1708
1709static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT11280x1024_2_H[] =
1710{
1711 {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
1712 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1713 0x00 }},
1714 {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
1715 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1716 0x00 }},
1717 {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
1718 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1719 0x00 }},
1720 {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
1721 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1722 0x00 }},
1723 {{0x4f,0x27,0x93,0x39,0x81,0x24,0xbb,
1724 0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
1725 0x00 }},
1726 {{0x4f,0x31,0x93,0x3e,0x86,0x24,0xf1,
1727 0xae,0x84,0x57,0x25,0x30,0x00,0x01,
1728 0x01 }},
1729 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1730 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1731 0x01}}
1732};
1733
1734static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT1XXXxXXX_1[] =
1735{
1736 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
1737 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
1738 0x00}},
1739 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
1740 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
1741 0x00}},
1742 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
1743 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
1744 0x00}},
1745 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
1746 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
1747 0x00}},
1748 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1749 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x05,
1750 0x00}},
1751 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
1752 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1753 0x01}},
1754 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1755 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1756 0x01}},
1757 {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
1758 0x00,0x84,0xff,0x29,0x09,0x00,0x07,
1759 0x01}},
1760 {{0xce,0x9f,0x92,0xa9,0x17,0x24,0xf5,
1761 0x02,0x88,0xff,0x25,0x10,0x00,0x07,
1762 0x01}}
1763};
1764
1765static const SiS_LVDSCRT1DataStruct SiS300_LVDSCRT1XXXxXXX_1_H[] =
1766{
1767 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
1768 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
1769 0x00}},
1770 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
1771 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
1772 0x00}},
1773 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
1774 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
1775 0x00}},
1776 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
1777 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
1778 0x00}},
1779 {{0x38,0x27,0x9c,0x2c,0x80,0x0b,0x3e,
1780 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
1781 0x00}},
1782 {{0x4d,0x31,0x91,0x3b,0x03,0x72,0xf0,
1783 0x58,0x8c,0x57,0x73,0x20,0x00,0x01,
1784 0x01}},
1785 {{0x63,0x3f,0x87,0x4a,0x92,0x24,0xf5,
1786 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1787 0x01}}
1788};
1789
1790
1791static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1UNTSC[] =
1792{ 899{
1793 {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, 900 {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
1794 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01, 901 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
@@ -1810,7 +917,7 @@ static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1UNTSC[] =
1810 0x01 }} 917 0x01 }}
1811}; 918};
1812 919
1813static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1ONTSC[] = 920static const struct SiS_LVDSCRT1Data SiS300_CHTVCRT1ONTSC[] =
1814{ 921{
1815 {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e, 922 {{0x64,0x4f,0x88,0x5a,0x9f,0x0b,0x3e,
1816 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01, 923 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
@@ -1832,7 +939,7 @@ static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1ONTSC[] =
1832 0x01 }} 939 0x01 }}
1833}; 940};
1834 941
1835static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1UPAL[] = 942static const struct SiS_LVDSCRT1Data SiS300_CHTVCRT1UPAL[] =
1836{ 943{
1837 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 944 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
1838 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05, 945 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
@@ -1854,7 +961,7 @@ static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1UPAL[] =
1854 0x01 }} 961 0x01 }}
1855}; 962};
1856 963
1857static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1OPAL[] = 964static const struct SiS_LVDSCRT1Data SiS300_CHTVCRT1OPAL[] =
1858{ 965{
1859 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 966 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
1860 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, 967 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
@@ -1876,7 +983,7 @@ static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1OPAL[] =
1876 0x01 }} 983 0x01 }}
1877}; 984};
1878 985
1879static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1SOPAL[] = 986static const struct SiS_LVDSCRT1Data SiS300_CHTVCRT1SOPAL[] =
1880{ 987{
1881 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 988 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
1882 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, 989 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
@@ -1898,7 +1005,7 @@ static const SiS_LVDSCRT1DataStruct SiS300_CHTVCRT1SOPAL[] =
1898 0x01 }} 1005 0x01 }}
1899}; 1006};
1900 1007
1901static const SiS_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] = 1008static const struct SiS_CHTVRegData SiS300_CHTVReg_UNTSC[] =
1902{ 1009{
1903 {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, 1010 {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
1904 {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, 1011 {{0x4a,0x94,0x00,0x48,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
@@ -1908,7 +1015,7 @@ static const SiS_CHTVRegDataStruct SiS300_CHTVReg_UNTSC[] =
1908 {{0x8d,0xc4,0x00,0x3b,0xfb,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 24: 800x600 NTSC 7/10 */ 1015 {{0x8d,0xc4,0x00,0x3b,0xfb,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 24: 800x600 NTSC 7/10 */
1909}; 1016};
1910 1017
1911static const SiS_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] = 1018static const struct SiS_CHTVRegData SiS300_CHTVReg_ONTSC[] =
1912{ 1019{
1913 {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, 1020 {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
1914 {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}}, 1021 {{0x49,0x94,0x00,0x34,0xfe,0,0,0,0,0,0,0,0,0,0,0}},
@@ -1918,7 +1025,7 @@ static const SiS_CHTVRegDataStruct SiS300_CHTVReg_ONTSC[] =
1918 {{0x8c,0xb4,0x00,0x32,0xf9,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 23: 800x600 NTSC 3/4 */ 1025 {{0x8c,0xb4,0x00,0x32,0xf9,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 23: 800x600 NTSC 3/4 */
1919}; 1026};
1920 1027
1921static const SiS_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] = 1028static const struct SiS_CHTVRegData SiS300_CHTVReg_UPAL[] =
1922{ 1029{
1923 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, 1030 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
1924 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, 1031 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
@@ -1929,7 +1036,7 @@ static const SiS_CHTVRegDataStruct SiS300_CHTVReg_UPAL[] =
1929 1036
1930}; 1037};
1931 1038
1932static const SiS_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] = 1039static const struct SiS_CHTVRegData SiS300_CHTVReg_OPAL[] =
1933{ 1040{
1934 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */ 1041 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */
1935 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, 1042 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
@@ -1940,26 +1047,26 @@ static const SiS_CHTVRegDataStruct SiS300_CHTVReg_OPAL[] =
1940 1047
1941}; 1048};
1942 1049
1943static const SiS_CHTVRegDataStruct SiS300_CHTVReg_SOPAL[] = 1050static const struct SiS_CHTVRegData SiS300_CHTVReg_SOPAL[] =
1944{ 1051{
1945 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */ 1052 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 9: 640x400 PAL 1/1 */
1946 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, 1053 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
1947 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}}, 1054 {{0x41,0x12,0x01,0x50,0x34,0,0,0,0,0,0,0,0,0,0,0}},
1948 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}}, 1055 {{0x41,0x12,0x00,0x50,0x00,0,0,0,0,0,0,0,0,0,0,0}},
1949 {{0x60,0x30,0x00,0x10,0x00,0,0,0,0,0,0,0,0,0,0,0}}, /* TW: Mode 13: 640x480 PAL 5/4 */ 1056 {{0x60,0x30,0x00,0x10,0x00,0,0,0,0,0,0,0,0,0,0,0}}, /* Mode 13: 640x480 PAL 5/4 */
1950 {{0x81,0x50,0x00,0x1b,0x00,0,0,0,0,0,0,0,0,0,0,0}} /* TW: Mode 19: 800x600 PAL 1/1 */ 1057 {{0x81,0x50,0x00,0x1b,0x00,0,0,0,0,0,0,0,0,0,0,0}} /* Mode 19: 800x600 PAL 1/1 */
1951}; 1058};
1952 1059
1953static const UCHAR SiS300_CHTVVCLKUNTSC[] = {0x29,0x29,0x29,0x29,0x2a,0x2e}; 1060static const unsigned char SiS300_CHTVVCLKUNTSC[] = { 0x29,0x29,0x29,0x29,0x2a,0x2e };
1954 1061
1955static const UCHAR SiS300_CHTVVCLKONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b}; 1062static const unsigned char SiS300_CHTVVCLKONTSC[] = { 0x2c,0x2c,0x2c,0x2c,0x2d,0x2b };
1956 1063
1957static const UCHAR SiS300_CHTVVCLKSONTSC[] = {0x2c,0x2c,0x2c,0x2c,0x2d,0x2b}; 1064static const unsigned char SiS300_CHTVVCLKSONTSC[] = { 0x2c,0x2c,0x2c,0x2c,0x2d,0x2b };
1958 1065
1959static const UCHAR SiS300_CHTVVCLKUPAL[] = {0x2f,0x2f,0x2f,0x2f,0x2f,0x31}; 1066static const unsigned char SiS300_CHTVVCLKUPAL[] = { 0x2f,0x2f,0x2f,0x2f,0x2f,0x31 };
1960 1067
1961static const UCHAR SiS300_CHTVVCLKOPAL[] = {0x2f,0x2f,0x2f,0x2f,0x30,0x32}; 1068static const unsigned char SiS300_CHTVVCLKOPAL[] = { 0x2f,0x2f,0x2f,0x2f,0x30,0x32 };
1962 1069
1963static const UCHAR SiS300_CHTVVCLKSOPAL[] = {0x2f,0x2f,0x2f,0x2f,0x36,0x29}; 1070static const unsigned char SiS300_CHTVVCLKSOPAL[] = { 0x2f,0x2f,0x2f,0x2f,0x36,0x29 };
1964 1071
1965 1072
diff --git a/drivers/video/sis/310vtbl.h b/drivers/video/sis/310vtbl.h
index 2c71d048f7c4..54fcbbf4ef63 100644
--- a/drivers/video/sis/310vtbl.h
+++ b/drivers/video/sis/310vtbl.h
@@ -1,9 +1,9 @@
1/* $XFree86$ */ 1/* $XFree86$ */
2/* $XdotOrg$ */ 2/* $XdotOrg$ */
3/* 3/*
4 * Register settings for SiS 315/330 series 4 * Register settings for SiS 315/330/340 series
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,37 +50,13 @@
50 * 50 *
51 */ 51 */
52 52
53static const SiS_StStruct SiS310_SModeIDTable[]= 53static const struct SiS_Ext SiS310_EModeIDTable[] =
54{
55 {0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00, 0x40},
56 {0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00, 0x40},
57 {0x01,0x1010,0x17,0x02,0x02,0x00,0x01,0x01, 0x40},
58 {0x03,0x8208,0x03,0x00,0x00,0x00,0x01,0x02, 0x40},
59 {0x03,0x0210,0x16,0x01,0x01,0x00,0x01,0x02, 0x40},
60 {0x03,0x0010,0x18,0x02,0x02,0x00,0x01,0x03, 0x40},
61 {0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x04, 0x40},
62 {0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x05, 0x40},
63 {0x07,0x0000,0x07,0x03,0x03,0x00,0x01,0x03, 0x40},
64 {0x07,0x0000,0x19,0x02,0x02,0x00,0x01,0x03, 0x40},
65 {0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x04, 0x40},
66 {0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x05, 0x40},
67 {0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x05, 0x40},
68 {0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x05, 0x40},
69 {0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x05, 0x40},
70 {0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x05, 0x40},
71 {0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x04, 0x40},
72 {0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x05, 0x40},
73 {0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x05, 0x40},
74 {0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00, 0x40}
75};
76
77static const SiS_ExtStruct SiS310_EModeIDTable[]=
78{ 54{
79 {0x6a,0x2212,0x0102,SIS_RI_800x600, 0x00,0x00,0x07,0x06,0x00, 3}, /* 800x600x? */ 55 {0x6a,0x2212,0x0102,SIS_RI_800x600, 0x00,0x00,0x07,0x06,0x00, 3}, /* 800x600x? */
80 {0x2e,0x0a1b,0x0101,SIS_RI_640x480, 0x00,0x00,0x05,0x05,0x08, 2}, /* 640x480x8 */ 56 {0x2e,0x0a1b,0x0101,SIS_RI_640x480, 0x00,0x00,0x05,0x05,0x08, 2}, /* 640x480x8 */
81 {0x2f,0x0a1b,0x0100,SIS_RI_640x400, 0x00,0x00,0x05,0x05,0x10, 0}, /* 640x400x8 */ 57 {0x2f,0x0a1b,0x0100,SIS_RI_640x400, 0x00,0x00,0x05,0x05,0x10, 0}, /* 640x400x8 */
82 {0x30,0x2a1b,0x0103,SIS_RI_800x600, 0x00,0x00,0x07,0x06,0x00, 3}, /* 800x600x8 */ 58 {0x30,0x2a1b,0x0103,SIS_RI_800x600, 0x00,0x00,0x07,0x06,0x00, 3}, /* 800x600x8 */
83 {0x31,0x4a1b,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x8 */ 59 {0x31,0x4a1b,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x8 */
84 {0x32,0x4a1b,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x8 */ 60 {0x32,0x4a1b,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x8 */
85 {0x33,0x4a1d,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x16 */ 61 {0x33,0x4a1d,0x0000,SIS_RI_720x480, 0x00,0x00,0x06,0x06,0x11,-1}, /* 720x480x16 */
86 {0x34,0x6a1d,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x16 */ 62 {0x34,0x6a1d,0x0000,SIS_RI_720x576, 0x00,0x00,0x06,0x06,0x12,-1}, /* 720x576x16 */
@@ -103,10 +79,10 @@ static const SiS_ExtStruct SiS310_EModeIDTable[]=
103 {0x4d,0x0e7d,0x011a,SIS_RI_1280x1024,0x00,0x00,0x00,0x00,0x1a, 8}, /* 1280x1024x16 */ 79 {0x4d,0x0e7d,0x011a,SIS_RI_1280x1024,0x00,0x00,0x00,0x00,0x1a, 8}, /* 1280x1024x16 */
104 {0x50,0x9a1b,0x0132,SIS_RI_320x240, 0x00,0x00,0x04,0x04,0x26, 2}, /* 320x240x8 */ 80 {0x50,0x9a1b,0x0132,SIS_RI_320x240, 0x00,0x00,0x04,0x04,0x26, 2}, /* 320x240x8 */
105 {0x51,0xba1b,0x0133,SIS_RI_400x300, 0x00,0x00,0x07,0x07,0x27, 3}, /* 400x300x8 */ 81 {0x51,0xba1b,0x0133,SIS_RI_400x300, 0x00,0x00,0x07,0x07,0x27, 3}, /* 400x300x8 */
106 {0x52,0xba1b,0x0134,SIS_RI_512x384, 0x00,0x00,0x00,0x00,0x28, 4}, /* 512x384x8 */ 82 {0x52,0xba1b,0x0134,SIS_RI_512x384, 0x00,0x00,0x00,0x00,0x28, 4}, /* 512x384x8 */
107 {0x56,0x9a1d,0x0135,SIS_RI_320x240, 0x00,0x00,0x04,0x04,0x26, 2}, /* 320x240x16 */ 83 {0x56,0x9a1d,0x0135,SIS_RI_320x240, 0x00,0x00,0x04,0x04,0x26, 2}, /* 320x240x16 */
108 {0x57,0xba1d,0x0136,SIS_RI_400x300, 0x00,0x00,0x07,0x07,0x27, 3}, /* 400x300x16 */ 84 {0x57,0xba1d,0x0136,SIS_RI_400x300, 0x00,0x00,0x07,0x07,0x27, 3}, /* 400x300x16 */
109 {0x58,0xba1d,0x0137,SIS_RI_512x384, 0x00,0x00,0x00,0x00,0x28, 4}, /* 512x384x16 */ 85 {0x58,0xba1d,0x0137,SIS_RI_512x384, 0x00,0x00,0x00,0x00,0x28, 4}, /* 512x384x16 */
110 {0x59,0x9a1b,0x0138,SIS_RI_320x200, 0x00,0x00,0x04,0x04,0x25, 0}, /* 320x200x8 */ 86 {0x59,0x9a1b,0x0138,SIS_RI_320x200, 0x00,0x00,0x04,0x04,0x25, 0}, /* 320x200x8 */
111 {0x5a,0x021b,0x0138,SIS_RI_320x240, 0x00,0x00,0x00,0x00,0x3f, 2}, /* 320x240x8 fstn */ 87 {0x5a,0x021b,0x0138,SIS_RI_320x240, 0x00,0x00,0x00,0x00,0x3f, 2}, /* 320x240x8 fstn */
112 {0x5b,0x0a1d,0x0135,SIS_RI_320x240, 0x00,0x00,0x00,0x00,0x3f, 2}, /* 320x240x16 fstn */ 88 {0x5b,0x0a1d,0x0135,SIS_RI_320x240, 0x00,0x00,0x00,0x00,0x3f, 2}, /* 320x240x16 fstn */
@@ -139,406 +115,335 @@ static const SiS_ExtStruct SiS310_EModeIDTable[]=
139 {0x23,0x0e3b,0x0000,SIS_RI_1280x768, 0x00,0x00,0x00,0x00,0x40, 6}, /* 1280x768x8 */ 115 {0x23,0x0e3b,0x0000,SIS_RI_1280x768, 0x00,0x00,0x00,0x00,0x40, 6}, /* 1280x768x8 */
140 {0x24,0x0e7d,0x0000,SIS_RI_1280x768, 0x00,0x00,0x00,0x00,0x40, 6}, /* 1280x768x16 */ 116 {0x24,0x0e7d,0x0000,SIS_RI_1280x768, 0x00,0x00,0x00,0x00,0x40, 6}, /* 1280x768x16 */
141 {0x25,0x0eff,0x0000,SIS_RI_1280x768, 0x00,0x00,0x00,0x00,0x40, 6}, /* 1280x768x32 */ 117 {0x25,0x0eff,0x0000,SIS_RI_1280x768, 0x00,0x00,0x00,0x00,0x40, 6}, /* 1280x768x32 */
142 {0x26,0x0e3b,0x0000,SIS_RI_1400x1050,0x00,0x00,0x00,0x00,0x41, 9}, /* 1400x1050x8 */ 118 {0x26,0x0e3b,0x0000,SIS_RI_1400x1050,0x00,0x00,0x00,0x00,0x43, 9}, /* 1400x1050x8 */
143 {0x27,0x0e7d,0x0000,SIS_RI_1400x1050,0x00,0x00,0x00,0x00,0x41, 9}, /* 1400x1050x16 */ 119 {0x27,0x0e7d,0x0000,SIS_RI_1400x1050,0x00,0x00,0x00,0x00,0x43, 9}, /* 1400x1050x16 */
144 {0x28,0x0eff,0x0000,SIS_RI_1400x1050,0x00,0x00,0x00,0x00,0x41, 9}, /* 1400x1050x32*/ 120 {0x28,0x0eff,0x0000,SIS_RI_1400x1050,0x00,0x00,0x00,0x00,0x43, 9}, /* 1400x1050x32*/
145 {0x29,0x4e1b,0x0000,SIS_RI_1152x864, 0x00,0x00,0x00,0x00,0x43,-1}, /* 1152x864 */ 121 {0x29,0x4e1b,0x0000,SIS_RI_1152x864, 0x00,0x00,0x00,0x00,0x45,-1}, /* 1152x864 */
146 {0x2a,0x4e3d,0x0000,SIS_RI_1152x864, 0x00,0x00,0x00,0x00,0x43,-1}, 122 {0x2a,0x4e3d,0x0000,SIS_RI_1152x864, 0x00,0x00,0x00,0x00,0x45,-1},
147 {0x2b,0x4e7f,0x0000,SIS_RI_1152x864, 0x00,0x00,0x00,0x00,0x43,-1}, 123 {0x2b,0x4e7f,0x0000,SIS_RI_1152x864, 0x00,0x00,0x00,0x00,0x45,-1},
148 {0x39,0x6a1b,0x0000,SIS_RI_848x480, 0x00,0x00,0x00,0x00,0x46,-1}, /* 848x480 */ 124 {0x39,0x6a1b,0x0000,SIS_RI_848x480, 0x00,0x00,0x00,0x00,0x48,-1}, /* 848x480 */
149 {0x3b,0x6a3d,0x0000,SIS_RI_848x480, 0x00,0x00,0x00,0x00,0x46,-1}, 125 {0x3b,0x6a3d,0x0000,SIS_RI_848x480, 0x00,0x00,0x00,0x00,0x48,-1},
150 {0x3e,0x6a7f,0x0000,SIS_RI_848x480, 0x00,0x00,0x00,0x00,0x46,-1}, 126 {0x3e,0x6a7f,0x0000,SIS_RI_848x480, 0x00,0x00,0x00,0x00,0x48,-1},
151 {0x3f,0x6a1b,0x0000,SIS_RI_856x480, 0x00,0x00,0x00,0x00,0x48,-1}, /* 856x480 */ 127 {0x3f,0x6a1b,0x0000,SIS_RI_856x480, 0x00,0x00,0x00,0x00,0x4a,-1}, /* 856x480 */
152 {0x42,0x6a3d,0x0000,SIS_RI_856x480, 0x00,0x00,0x00,0x00,0x48,-1}, 128 {0x42,0x6a3d,0x0000,SIS_RI_856x480, 0x00,0x00,0x00,0x00,0x4a,-1},
153 {0x45,0x6a7f,0x0000,SIS_RI_856x480, 0x00,0x00,0x00,0x00,0x48,-1}, 129 {0x45,0x6a7f,0x0000,SIS_RI_856x480, 0x00,0x00,0x00,0x00,0x4a,-1},
154 {0x48,0x6a3b,0x0000,SIS_RI_1360x768, 0x00,0x00,0x00,0x00,0x4a,-1}, /* 1360x768 */ 130 {0x48,0x6a3b,0x0000,SIS_RI_1360x768, 0x00,0x00,0x00,0x00,0x4c,-1}, /* 1360x768 */
155 {0x4b,0x6a7d,0x0000,SIS_RI_1360x768, 0x00,0x00,0x00,0x00,0x4a,-1}, 131 {0x4b,0x6a7d,0x0000,SIS_RI_1360x768, 0x00,0x00,0x00,0x00,0x4c,-1},
156 {0x4e,0x6aff,0x0000,SIS_RI_1360x768, 0x00,0x00,0x00,0x00,0x4a,-1}, 132 {0x4e,0x6aff,0x0000,SIS_RI_1360x768, 0x00,0x00,0x00,0x00,0x4c,-1},
157 {0x4f,0x9a1f,0x0000,SIS_RI_320x200, 0x00,0x00,0x04,0x04,0x25, 0}, /* 320x200x32 */ 133 {0x4f,0x9a1f,0x0000,SIS_RI_320x200, 0x00,0x00,0x04,0x04,0x25, 0}, /* 320x200x32 */
158 {0x53,0x9a1f,0x0000,SIS_RI_320x240, 0x00,0x00,0x04,0x04,0x26, 2}, /* 320x240x32 */ 134 {0x53,0x9a1f,0x0000,SIS_RI_320x240, 0x00,0x00,0x04,0x04,0x26, 2}, /* 320x240x32 */
159 {0x54,0xba1f,0x0000,SIS_RI_400x300, 0x00,0x00,0x07,0x07,0x27, 3}, /* 400x300x32 */ 135 {0x54,0xba1f,0x0000,SIS_RI_400x300, 0x00,0x00,0x07,0x07,0x27, 3}, /* 400x300x32 */
160 {0x5f,0x6a1b,0x0000,SIS_RI_768x576, 0x00,0x00,0x06,0x06,0x4b,-1}, /* 768x576 */ 136 {0x5f,0x6a1b,0x0000,SIS_RI_768x576, 0x00,0x00,0x06,0x06,0x4d,-1}, /* 768x576 */
161 {0x60,0x6a1d,0x0000,SIS_RI_768x576, 0x00,0x00,0x06,0x06,0x4b,-1}, 137 {0x60,0x6a1d,0x0000,SIS_RI_768x576, 0x00,0x00,0x06,0x06,0x4d,-1},
162 {0x61,0x6a3f,0x0000,SIS_RI_768x576, 0x00,0x00,0x06,0x06,0x4b,-1}, 138 {0x61,0x6a3f,0x0000,SIS_RI_768x576, 0x00,0x00,0x06,0x06,0x4d,-1},
163 {0x14,0x0e3b,0x0000,SIS_RI_1280x800, 0x00,0x00,0x00,0x00,0x4c, 7}, /* 1280x800 */ 139 {0x14,0x0e3b,0x0000,SIS_RI_1280x800, 0x00,0x00,0x00,0x00,0x4e, 7}, /* 1280x800 */
164 {0x15,0x0e7d,0x0000,SIS_RI_1280x800, 0x00,0x00,0x00,0x00,0x4c, 7}, 140 {0x15,0x0e7d,0x0000,SIS_RI_1280x800, 0x00,0x00,0x00,0x00,0x4e, 7},
165 {0x16,0x0eff,0x0000,SIS_RI_1280x800, 0x00,0x00,0x00,0x00,0x4c, 7}, 141 {0x16,0x0eff,0x0000,SIS_RI_1280x800, 0x00,0x00,0x00,0x00,0x4e, 7},
166 {0x17,0x0e3b,0x0000,SIS_RI_1680x1050,0x00,0x00,0x00,0x00,0x4d, 9}, /* 1680x1050 */ 142 {0x17,0x0e3b,0x0000,SIS_RI_1680x1050,0x00,0x00,0x00,0x00,0x51, 9}, /* 1680x1050 */
167 {0x18,0x0e7d,0x0000,SIS_RI_1680x1050,0x00,0x00,0x00,0x00,0x4d, 9}, 143 {0x18,0x0e7d,0x0000,SIS_RI_1680x1050,0x00,0x00,0x00,0x00,0x51, 9},
168 {0x19,0x0eff,0x0000,SIS_RI_1680x1050,0x00,0x00,0x00,0x00,0x4d, 9}, 144 {0x19,0x0eff,0x0000,SIS_RI_1680x1050,0x00,0x00,0x00,0x00,0x51, 9},
169 {0x2c,0x267b,0x0000,SIS_RI_1920x1080,0x00,0x00,0x00,0x00,0x4e,-1}, /* 1920x1080(i) */ 145 {0x2c,0x267b,0x0000,SIS_RI_1920x1080,0x00,0x00,0x00,0x00,0x52,-1}, /* 1920x1080(i) */
170 {0x2d,0x26fd,0x0000,SIS_RI_1920x1080,0x00,0x00,0x00,0x00,0x4e,-1}, 146 {0x2d,0x26fd,0x0000,SIS_RI_1920x1080,0x00,0x00,0x00,0x00,0x52,-1},
171 {0x73,0x27ff,0x0000,SIS_RI_1920x1080,0x00,0x00,0x00,0x00,0x4e,-1}, 147 {0x73,0x27ff,0x0000,SIS_RI_1920x1080,0x00,0x00,0x00,0x00,0x52,-1},
172 {0x1d,0x6a1b,0x0000,SIS_RI_960x540, 0x00,0x00,0x00,0x00,0x4f,-1}, /* 960x540 */ 148 {0x1d,0x6a1b,0x0000,SIS_RI_960x540, 0x00,0x00,0x00,0x00,0x53,-1}, /* 960x540 */
173 {0x1e,0x6a3d,0x0000,SIS_RI_960x540, 0x00,0x00,0x00,0x00,0x4f,-1}, 149 {0x1e,0x6a3d,0x0000,SIS_RI_960x540, 0x00,0x00,0x00,0x00,0x53,-1},
174 {0x1f,0x6a7f,0x0000,SIS_RI_960x540, 0x00,0x00,0x00,0x00,0x4f,-1}, 150 {0x1f,0x6a7f,0x0000,SIS_RI_960x540, 0x00,0x00,0x00,0x00,0x53,-1},
175 {0x20,0x6a1b,0x0000,SIS_RI_960x600, 0x00,0x00,0x00,0x00,0x50,-1}, /* 960x600 */ 151 {0x20,0x6a1b,0x0000,SIS_RI_960x600, 0x00,0x00,0x00,0x00,0x54,-1}, /* 960x600 */
176 {0x21,0x6a3d,0x0000,SIS_RI_960x600, 0x00,0x00,0x00,0x00,0x50,-1}, 152 {0x21,0x6a3d,0x0000,SIS_RI_960x600, 0x00,0x00,0x00,0x00,0x54,-1},
177 {0x22,0x6a7f,0x0000,SIS_RI_960x600, 0x00,0x00,0x00,0x00,0x50,-1}, 153 {0x22,0x6a7f,0x0000,SIS_RI_960x600, 0x00,0x00,0x00,0x00,0x54,-1},
154 {0x1a,0x0e3b,0x0000,SIS_RI_1280x854, 0x00,0x00,0x00,0x00,0x55, 8}, /* 1280x854 */
155 {0x1b,0x0e7d,0x0000,SIS_RI_1280x854, 0x00,0x00,0x00,0x00,0x55, 8},
156 {0x1c,0x0eff,0x0000,SIS_RI_1280x854, 0x00,0x00,0x00,0x00,0x55, 8},
178 {0xff,0x0000,0x0000,0, 0x00,0x00,0x00,0x00,0x00,-1} 157 {0xff,0x0000,0x0000,0, 0x00,0x00,0x00,0x00,0x00,-1}
179}; 158};
180 159
181static const SiS_Ext2Struct SiS310_RefIndex[]= 160static const struct SiS_Ext2 SiS310_RefIndex[] =
182{ 161{
183 {0x085f,0x0d,0x03,0x05,0x05,0x6a, 800, 600, 0x40}, /* 0x0 */ 162 {0x085f,0x0d,0x03,0x05,0x05,0x6a, 800, 600, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x0 */
184 {0x0067,0x0e,0x04,0x05,0x05,0x6a, 800, 600, 0x40}, /* 0x1 */ 163 {0x0067,0x0e,0x04,0x05,0x05,0x6a, 800, 600, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1 */
185 {0x0067,0x0f,0x08,0x48,0x05,0x6a, 800, 600, 0x40}, /* 0x2 */ 164 {0x0067,0x0f,0x08,0x48,0x05,0x6a, 800, 600, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2 */
186 {0x0067,0x10,0x07,0x8b,0x05,0x6a, 800, 600, 0x40}, /* 0x3 */ 165 {0x0067,0x10,0x07,0x8b,0x05,0x6a, 800, 600, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x3 */
187 {0x0047,0x11,0x0a,0x00,0x05,0x6a, 800, 600, 0x40}, /* 0x4 */ 166 {0x0047,0x11,0x0a,0x00,0x05,0x6a, 800, 600, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x4 */
188 {0x0047,0x12,0x0d,0x00,0x05,0x6a, 800, 600, 0x40}, /* 0x5 */ 167 {0x0047,0x12,0x0d,0x00,0x05,0x6a, 800, 600, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x5 */
189 {0x0047,0x13,0x13,0x00,0x05,0x6a, 800, 600, 0x20}, /* 0x6 */ 168 {0x0047,0x13,0x13,0x00,0x05,0x6a, 800, 600, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x6 */
190 {0x0107,0x14,0x1c,0x00,0x05,0x6a, 800, 600, 0x20}, /* 0x7 */ 169 {0x0107,0x14,0x1c,0x00,0x05,0x6a, 800, 600, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x7 */
191 {0xc85f,0x05,0x00,0x04,0x04,0x2e, 640, 480, 0x40}, /* 0x8 */ 170 {0xc85f,0x05,0x00,0x04,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x8 */
192 {0xc067,0x06,0x02,0x04,0x04,0x2e, 640, 480, 0x40}, /* 0x9 */ 171 {0xc067,0x06,0x02,0x04,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x9 */
193 {0xc067,0x07,0x02,0x47,0x04,0x2e, 640, 480, 0x40}, /* 0xa */ 172 {0xc067,0x07,0x02,0x47,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0xa */
194 {0xc067,0x08,0x03,0x8a,0x04,0x2e, 640, 480, 0x40}, /* 0xb */ 173 {0xc067,0x08,0x03,0x8a,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0xb */
195 {0xc047,0x09,0x05,0x00,0x04,0x2e, 640, 480, 0x40}, /* 0xc */ 174 {0xc047,0x09,0x05,0x00,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0xc */
196 {0xc047,0x0a,0x09,0x00,0x04,0x2e, 640, 480, 0x40}, /* 0xd */ 175 {0xc047,0x0a,0x09,0x00,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0xd */
197 {0xc047,0x0b,0x0e,0x00,0x04,0x2e, 640, 480, 0x40}, /* 0xe */ 176 {0xc047,0x0b,0x0e,0x00,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0xe */
198 {0xc047,0x0c,0x15,0x00,0x04,0x2e, 640, 480, 0x40}, /* 0xf */ 177 {0xc047,0x0c,0x15,0x00,0x04,0x2e, 640, 480, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0xf */
199 {0x487f,0x04,0x00,0x00,0x00,0x2f, 640, 400, 0x30}, /* 0x10 */ 178 {0x487f,0x04,0x00,0x00,0x00,0x2f, 640, 400, 0x30, 0x55, 0x6e, 0x00, 0x00, 0x00, 0x00}, /* 0x10 */
200 {0xc06f,0x3c,0x01,0x06,0x13,0x31, 720, 480, 0x30}, /* 0x11 */ 179 {0xc06f,0x3c,0x01,0x06,0x13,0x31, 720, 480, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x11 */
201 {0x006f,0x3d,0x03,0x06,0x14,0x32, 720, 576, 0x30}, /* 0x12 */ 180 {0x006f,0x3d,0x6f,0x06,0x14,0x32, 720, 576, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x12 (6f was 03) */
202 {0x0087,0x15,0x06,0x00,0x06,0x37,1024, 768, 0x30}, /* 0x13 */ 181 {0x0087,0x15,0x06,0x00,0x06,0x37,1024, 768, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x13 */
203 {0xc877,0x16,0x0b,0x06,0x06,0x37,1024, 768, 0x20}, /* 0x14 */ 182 {0xc877,0x16,0x0b,0x06,0x06,0x37,1024, 768, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x14 */
204 {0xc067,0x17,0x0f,0x49,0x06,0x37,1024, 768, 0x20}, /* 0x15 */ 183 {0xc067,0x17,0x0f,0x49,0x06,0x37,1024, 768, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x15 */
205 {0x0067,0x18,0x11,0x00,0x06,0x37,1024, 768, 0x20}, /* 0x16 */ 184 {0x0067,0x18,0x11,0x00,0x06,0x37,1024, 768, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x16 */
206 {0x0047,0x19,0x16,0x8c,0x06,0x37,1024, 768, 0x20}, /* 0x17 */ 185 {0x0047,0x19,0x16,0x8c,0x06,0x37,1024, 768, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x17 */
207 {0x0107,0x1a,0x1b,0x00,0x06,0x37,1024, 768, 0x10}, /* 0x18 */ 186 {0x0107,0x1a,0x1b,0x00,0x06,0x37,1024, 768, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x18 */
208 {0x0107,0x1b,0x1f,0x00,0x06,0x37,1024, 768, 0x10}, /* 0x19 */ 187 {0x0107,0x1b,0x1f,0x00,0x06,0x37,1024, 768, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x19 */
209 {0x0087,0x1c,0x11,0x00,0x07,0x3a,1280,1024, 0x30}, /* 0x1a */ 188 {0x0087,0x1c,0x11,0x00,0x07,0x3a,1280,1024, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1a */
210 {0x0137,0x1d,0x19,0x07,0x07,0x3a,1280,1024, 0x00}, /* 0x1b */ 189 {0x0137,0x1d,0x19,0x07,0x07,0x3a,1280,1024, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1b */
211 {0x0107,0x1e,0x1e,0x00,0x07,0x3a,1280,1024, 0x00}, /* 0x1c */ 190 {0x0107,0x1e,0x1e,0x00,0x07,0x3a,1280,1024, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1c */
212 {0x0207,0x1f,0x20,0x00,0x07,0x3a,1280,1024, 0x00}, /* 0x1d */ 191 {0x0207,0x1f,0x20,0x00,0x07,0x3a,1280,1024, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1d */
213 {0x0227,0x20,0x21,0x09,0x09,0x3c,1600,1200, 0x00}, /* 0x1e */ 192 {0x0227,0x20,0x21,0x09,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1e */
214 {0x0407,0x21,0x22,0x00,0x09,0x3c,1600,1200, 0x00}, /* 0x1f */ 193 {0x0407,0x21,0x22,0x00,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x1f */
215 {0x0407,0x22,0x23,0x00,0x09,0x3c,1600,1200, 0x00}, /* 0x20 */ 194 {0x0407,0x22,0x23,0x00,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x20 */
216 {0x0407,0x23,0x25,0x00,0x09,0x3c,1600,1200, 0x00}, /* 0x21 */ 195 {0x0407,0x23,0x25,0x00,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x21 */
217 {0x0007,0x24,0x26,0x00,0x09,0x3c,1600,1200, 0x00}, /* 0x22 */ 196 {0x0007,0x24,0x26,0x00,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x22 */
218 {0x0007,0x25,0x2c,0x00,0x09,0x3c,1600,1200, 0x00}, /* 0x23 */ 197 {0x0007,0x25,0x2c,0x00,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x23 */
219 {0x0007,0x26,0x34,0x00,0x09,0x3c,1600,1200, 0x00}, /* 0x24 */ 198 {0x0007,0x26,0x34,0x00,0x09,0x3c,1600,1200, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x24 */
220 {0x407f,0x00,0x00,0x00,0x00,0x40, 320, 200, 0x30}, /* 0x25 */ 199 {0x407f,0x00,0x00,0x00,0x00,0x40, 320, 200, 0x30, 0x56, 0x4e, 0x00, 0x00, 0x00, 0x00}, /* 0x25 */
221 {0xc07f,0x01,0x00,0x04,0x04,0x50, 320, 240, 0x30}, /* 0x26 */ 200 {0xc07f,0x01,0x00,0x04,0x04,0x50, 320, 240, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x26 */
222 {0x007f,0x02,0x04,0x05,0x05,0x51, 400, 300, 0x30}, /* 0x27 */ 201 {0x007f,0x02,0x04,0x05,0x05,0x51, 400, 300, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x27 */
223 {0xc077,0x03,0x0b,0x06,0x06,0x52, 512, 384, 0x30}, /* 0x28 */ 202 {0xc077,0x03,0x0b,0x06,0x06,0x52, 512, 384, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x28 */
224 {0x8007,0x27,0x27,0x00,0x00,0x68,1920,1440, 0x00}, /* 0x29 */ 203 {0x8007,0x27,0x27,0x00,0x00,0x68,1920,1440, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x29 */
225 {0x4007,0x28,0x29,0x00,0x00,0x68,1920,1440, 0x00}, /* 0x2a */ 204 {0x4007,0x28,0x29,0x00,0x00,0x68,1920,1440, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2a */
226 {0x4007,0x29,0x2e,0x00,0x00,0x68,1920,1440, 0x00}, /* 0x2b */ 205 {0x4007,0x29,0x2e,0x00,0x00,0x68,1920,1440, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2b */
227 {0x4007,0x2a,0x30,0x00,0x00,0x68,1920,1440, 0x00}, /* 0x2c */ 206 {0x4007,0x2a,0x30,0x00,0x00,0x68,1920,1440, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2c */
228 {0x4007,0x2b,0x35,0x00,0x00,0x68,1920,1440, 0x00}, /* 0x2d */ 207 {0x4007,0x2b,0x35,0x00,0x00,0x68,1920,1440, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2d */
229 {0x4005,0x2c,0x39,0x00,0x00,0x68,1920,1440, 0x00}, /* 0x2e */ 208 {0x4005,0x2c,0x39,0x00,0x00,0x68,1920,1440, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2e */
230 {0x4007,0x2d,0x2b,0x00,0x00,0x6c,2048,1536, 0x00}, /* 0x2f */ 209 {0x4007,0x2d,0x2b,0x00,0x00,0x6c,2048,1536, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x2f */
231 {0x4007,0x2e,0x31,0x00,0x00,0x6c,2048,1536, 0x00}, /* 0x30 */ 210 {0x4007,0x2e,0x31,0x00,0x00,0x6c,2048,1536, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x30 */
232 {0x4007,0x2f,0x33,0x00,0x00,0x6c,2048,1536, 0x00}, /* 0x31 */ 211 {0x4007,0x2f,0x33,0x00,0x00,0x6c,2048,1536, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x31 */
233 {0x4007,0x30,0x37,0x00,0x00,0x6c,2048,1536, 0x00}, /* 0x32 */ 212 {0x4007,0x30,0x37,0x00,0x00,0x6c,2048,1536, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x32 */
234 {0x4005,0x31,0x38,0x00,0x00,0x6c,2048,1536, 0x00}, /* 0x33 */ 213 {0x4005,0x31,0x38,0x00,0x00,0x6c,2048,1536, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x33 */
235 {0x0077,0x32,0x40,0x08,0x18,0x70, 800, 480, 0x30}, /* 0x34 */ 214 {0x2077,0x32,0x40,0x08,0x18,0x70, 800, 480, 0x30, 0x00, 0x00, 0x32, 0x40, 0x5e, 0x73}, /* 0x34 */
236 {0x0047,0x33,0x07,0x08,0x18,0x70, 800, 480, 0x30}, /* 0x35 */ 215 {0x2047,0x33,0x07,0x08,0x18,0x70, 800, 480, 0x30, 0x00, 0x00, 0x33, 0x07, 0xff, 0xff}, /* 0x35 */
237 {0x0047,0x34,0x0a,0x08,0x18,0x70, 800, 480, 0x30}, /* 0x36 */ 216 {0x2047,0x34,0x0a,0x08,0x18,0x70, 800, 480, 0x30, 0x00, 0x00, 0x34, 0x0a, 0xff, 0xff}, /* 0x36 */
238 {0x0077,0x35,0x0b,0x09,0x19,0x71,1024, 576, 0x30}, /* 0x37 */ 217 {0x2077,0x35,0x0b,0x09,0x19,0x71,1024, 576, 0x30, 0x00, 0x00, 0x35, 0x0b, 0x5f, 0x74}, /* 0x37 */
239 {0x0047,0x36,0x11,0x09,0x19,0x71,1024, 576, 0x30}, /* 0x38 */ 218 {0x2047,0x36,0x11,0x09,0x19,0x71,1024, 576, 0x30, 0x00, 0x00, 0x36, 0x11, 0xff, 0xff}, /* 0x38 */
240 {0x0047,0x37,0x16,0x09,0x19,0x71,1024, 576, 0x30}, /* 0x39 */ 219 {0x2047,0x37,0x16,0x09,0x19,0x71,1024, 576, 0x30, 0x00, 0x00, 0x37, 0x16, 0xff, 0xff}, /* 0x39 */
241 {0x1137,0x38,0x19,0x0a,0x0c,0x75,1280, 720, 0x30}, /* 0x3a */ 220 {0x3137,0x38,0x19,0x0a,0x0c,0x75,1280, 720, 0x30, 0x00, 0x00, 0x38, 0x19, 0x60, 0x75}, /* 0x3a */
242 {0x1107,0x39,0x1e,0x0a,0x0c,0x75,1280, 720, 0x30}, /* 0x3b */ 221 {0x3107,0x39,0x1e,0x0a,0x0c,0x75,1280, 720, 0x30, 0x00, 0x00, 0x39, 0x1e, 0xff, 0xff}, /* 0x3b */
243 {0x1307,0x3a,0x20,0x0a,0x0c,0x75,1280, 720, 0x30}, /* 0x3c */ 222 {0x3307,0x3a,0x20,0x0a,0x0c,0x75,1280, 720, 0x30, 0x00, 0x00, 0x3a, 0x20, 0xff, 0xff}, /* 0x3c */
244 {0x0127,0x3b,0x19,0x08,0x0a,0x7c,1280, 960, 0x30}, /* 0x3d */ 223 {0x0127,0x3b,0x19,0x08,0x0a,0x7c,1280, 960, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x3d */
245 {0x0227,0x4c,0x59,0x08,0x0a,0x7c,1280, 960, 0x20}, /* 0x3e */ 224 {0x0227,0x4c,0x59,0x08,0x0a,0x7c,1280, 960, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x3e */
246 {0xc07f,0x4e,0x00,0x06,0x04,0x5a, 320, 240, 0x30}, /* 0x3f */ /* FSTN 320x240 */ 225 {0xc07f,0x4e,0x00,0x06,0x04,0x5a, 320, 240, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x3f */ /* FSTN 320x240 */
247 {0x0077,0x42,0x5b,0x08,0x11,0x23,1280, 768, 0x30}, /* 0x40 */ /* 0x5b was 0x12 */ 226 {0x2077,0x42,0x5b,0x08,0x11,0x23,1280, 768, 0x30, 0x00, 0x00, 0x58, 0x19, 0x42, 0x5b}, /* 0x40 */ /* 0x5b was 0x12 */
248 {0x0127,0x43,0x4d,0x08,0x0b,0x26,1400,1050, 0x30}, /* 0x41 */ 227 {0x2077,0x42,0x5b,0x08,0x11,0x23,1280, 768, 0x30, 0x00, 0x00, 0x59, 0x1e, 0xff, 0xff}, /* 0x41 */
249 {0x0207,0x4b,0x5a,0x08,0x0b,0x26,1400,1050, 0x30}, /* 0x42 1400x1050-75Hz */ 228 {0x2077,0x42,0x5b,0x08,0x11,0x23,1280, 768, 0x30, 0x00, 0x00, 0x5a, 0x20, 0xff, 0xff}, /* 0x42 */
250 {0x0127,0x54,0x6d,0x00,0x1a,0x29,1152, 864, 0x30}, /* 0x43 1152x864-60Hz */ 229 {0x0127,0x43,0x4d,0x08,0x0b,0x26,1400,1050, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x43 */
251 {0x0127,0x44,0x19,0x00,0x1a,0x29,1152, 864, 0x30}, /* 0x44 1152x864-75Hz */ 230 {0x0207,0x4b,0x5a,0x08,0x0b,0x26,1400,1050, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x44 1400x1050-75Hz */
252 {0x0127,0x4a,0x1e,0x00,0x1a,0x29,1152, 864, 0x30}, /* 0x45 1152x864-85Hz */ 231 {0x0127,0x54,0x6d,0x00,0x1a,0x29,1152, 864, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x45 1152x864-60Hz */
253 {0x0087,0x45,0x57,0x00,0x16,0x39, 848, 480, 0x30}, /* 0x46 848x480-38Hzi */ 232 {0x0127,0x44,0x19,0x00,0x1a,0x29,1152, 864, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x46 1152x864-75Hz */
254 {0xc067,0x46,0x55,0x0b,0x16,0x39, 848, 480, 0x30}, /* 0x47 848x480-60Hz */ 233 {0x0127,0x4a,0x1e,0x00,0x1a,0x29,1152, 864, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x47 1152x864-85Hz */
255 {0x0087,0x47,0x57,0x00,0x17,0x3f, 856, 480, 0x30}, /* 0x48 856x480-38Hzi */ 234 {0x0087,0x45,0x57,0x00,0x16,0x39, 848, 480, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x48 848x480-38Hzi */
256 {0xc067,0x48,0x57,0x00,0x17,0x3f, 856, 480, 0x30}, /* 0x49 856x480-60Hz */ 235 {0xc067,0x46,0x55,0x0b,0x16,0x39, 848, 480, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x49 848x480-60Hz */
257 {0x0067,0x49,0x58,0x0c,0x1b,0x48,1360, 768, 0x30}, /* 0x4a 1360x768-60Hz */ 236 {0x0087,0x47,0x57,0x00,0x17,0x3f, 856, 480, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x4a 856x480-38Hzi */
258 {0x006f,0x4d,0x03,0x06,0x15,0x5f, 768, 576, 0x30}, /* 0x4b 768x576-56Hz */ 237 {0xc067,0x48,0x57,0x00,0x17,0x3f, 856, 480, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x4b 856x480-60Hz */
259 {0x0067,0x4f,0x5c,0x08,0x0d,0x14,1280, 800, 0x30}, /* 0x4c 1280x800-60Hz */ 238 {0x0067,0x49,0x58,0x0c,0x1b,0x48,1360, 768, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x4c 1360x768-60Hz */
260 {0x0067,0x50,0x5d,0x0c,0x0e,0x17,1680,1050, 0x30}, /* 0x4d 1680x1050-60Hz */ 239 {0x006f,0x4d,0x71,0x06,0x15,0x5f, 768, 576, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x4d 768x576-56Hz */
261 {0x0087,0x51,0x69,0x00,0x00,0x2c,1920,1080, 0x30}, /* 0x4e 1920x1080 60Hzi */ 240 {0x2067,0x4f,0x5c,0x08,0x0d,0x14,1280, 800, 0x30, 0x00, 0x00, 0x5b, 0x19, 0x4f, 0x5c}, /* 0x4e 1280x800-60Hz */
262 {0x0067,0x52,0x6a,0x00,0x1c,0x1d, 960, 540, 0x30}, /* 0x4f 960x540 60Hz */ 241 {0x2067,0x4f,0x5c,0x08,0x0d,0x14,1280, 800, 0x30, 0x00, 0x00, 0x5c, 0x1e, 0xff, 0xff}, /* 0x4f 1280x800-75Hz */
263 {0x0077,0x53,0x6b,0x0b,0x1d,0x20, 960, 600, 0x30}, /* 0x50 960x600 60Hz */ 242 {0x2067,0x4f,0x5c,0x08,0x0d,0x14,1280, 800, 0x30, 0x00, 0x00, 0x5d, 0x20, 0xff, 0xff}, /* 0x50 1280x800-85Hz */
264 {0xffff,0x00,0x00,0x00,0x00,0x00, 0, 0, 0} 243 {0x0067,0x50,0x5d,0x0c,0x0e,0x17,1680,1050, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x51 1680x1050-60Hz */
265}; 244 {0x0087,0x51,0x69,0x00,0x00,0x2c,1920,1080, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x52 1920x1080 60Hzi */
266 245 {0x0067,0x52,0x6a,0x00,0x1c,0x1d, 960, 540, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x53 960x540 60Hz */
267#ifdef LINUX_XF86 246 {0x0077,0x53,0x6b,0x0b,0x1d,0x20, 960, 600, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}, /* 0x54 960x600 60Hz */
268static const struct { 247 {0x2067,0x61,0x76,0x0d,0x22,0x1a,1280, 854, 0x30, 0x00, 0x00, 0x62, 0x19, 0x61, 0x76}, /* 0x55 1280x854-60Hz */
269 UCHAR Ext_ModeID; /* ModeID in new ROM */ 248 {0x2067,0x61,0x76,0x0d,0x22,0x1a,1280, 854, 0x30, 0x00, 0x00, 0x63, 0x1e, 0xff, 0xff}, /* 0x56 1280x854-75Hz */
270 UCHAR Ext_MyModeID; /* corresponding ModeID in my tables (0 = identical) */ 249 {0x2067,0x61,0x76,0x0d,0x22,0x1a,1280, 854, 0x30, 0x00, 0x00, 0x64, 0x20, 0xff, 0xff}, /* 0x57 1280x854-85Hz */
271 USHORT Ext_VESAID; /* corresponding VESA ID in new ROM */ 250 {0xffff,0x00,0x00,0x00,0x00,0x00, 0, 0, 0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
272} SiS_EModeIDTable661[] = { 251};
273 { 0x6a, 0x00, 0x0102 }, 252
274 { 0x1d, 0x20, 0x0000 }, 253static const struct SiS_CRT1Table SiS310_CRT1Table[] =
275 { 0x1e, 0x21, 0x0000 },
276 { 0x1f, 0x22, 0x0000 },
277 { 0x20, 0x29, 0x0000 },
278 { 0x21, 0x2a, 0x0000 },
279 { 0x22, 0x2b, 0x0000 },
280 { 0x23, 0x00, 0x011c },
281 { 0x24, 0x00, 0x011d },
282 { 0x25, 0x00, 0x011e },
283 { 0x26, 0x00, 0x011f },
284 { 0x27, 0x00, 0x0120 },
285 { 0x28, 0x00, 0x0121 },
286 { 0x2a, 0x14, 0x013d },
287 { 0x2b, 0x15, 0x013e },
288 { 0x2c, 0x16, 0x013f },
289 { 0x2e, 0x00, 0x0101 },
290 { 0x2f, 0x00, 0x0100 },
291 { 0x30, 0x00, 0x0103 },
292 { 0x37, 0x00, 0x0104 },
293 { 0x38, 0x00, 0x0105 },
294 { 0x3a, 0x00, 0x0107 },
295 { 0x3c, 0x00, 0x0125 },
296 { 0x3d, 0x00, 0x0126 },
297 { 0x40, 0x00, 0x010d },
298 { 0x41, 0x00, 0x010e },
299 { 0x43, 0x00, 0x0110 },
300 { 0x44, 0x00, 0x0111 },
301 { 0x46, 0x00, 0x0113 },
302 { 0x47, 0x00, 0x0114 },
303 { 0x49, 0x00, 0x0116 },
304 { 0x4a, 0x00, 0x0117 },
305 { 0x4c, 0x00, 0x0119 },
306 { 0x4d, 0x00, 0x011a },
307 { 0x50, 0x00, 0x0127 },
308 { 0x51, 0x00, 0x0128 },
309 { 0x52, 0x00, 0x0129 },
310 { 0x56, 0x00, 0x012a },
311 { 0x57, 0x00, 0x012b },
312 { 0x58, 0x00, 0x012c },
313 { 0x59, 0x00, 0x012d },
314 { 0x5a, 0x17, 0x012e },
315 { 0x5b, 0x18, 0x012f },
316 { 0x5c, 0x19, 0x0130 },
317 { 0x5d, 0x00, 0x0131 },
318 { 0x62, 0x00, 0x0112 },
319 { 0x63, 0x00, 0x0115 },
320 { 0x64, 0x00, 0x0118 },
321 { 0x65, 0x00, 0x011b },
322 { 0x66, 0x00, 0x0132 },
323 { 0x75, 0x00, 0x013a },
324 { 0x78, 0x00, 0x013b },
325 { 0x79, 0x00, 0x013c },
326 { 0x7b, 0x7c, 0x0136 },
327 { 0x7c, 0x7d, 0x0137 },
328 { 0x7d, 0x7e, 0x0138 },
329 { 0xff, 0xff, 0xffff }
330};
331#endif
332
333static const SiS_CRT1TableStruct SiS310_CRT1Table[]=
334{ 254{
335 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f, 255 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0xbf,0x1f,
336 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00, 256 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x00,
337 0x00}}, /* 0x0 */ 257 0x00}}, /* 0x0 */
338 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e, 258 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e,
339 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00, 259 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00,
340 0x00}}, /* 0x1 */ 260 0x00}}, /* 0x1 */
341 {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0, 261 {{0x3d,0x31,0x31,0x81,0x37,0x1f,0x72,0xf0,
342 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05, 262 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x05,
343 0x01}}, /* 0x2 */ 263 0x01}}, /* 0x2 */
344 {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5, 264 {{0x4f,0x3f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
345 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01, 265 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x01,
346 0x01}}, /* 0x3 */ 266 0x01}}, /* 0x3 */
347 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f, 267 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0xbf,0x1f,
348 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05, 268 0x9c,0x8e,0x8f,0x96,0xb9,0x30,0x00,0x05,
349 0x00}}, /* 0x4 */ 269 0x00}}, /* 0x4 */
350#if 0 270 {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* corrected 640x480-60 */
351 {{0x5f,0x4f,0x50,0x82,0x55,0x81,0x0b,0x3e,
352 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
353 0x00}}, /* 0x5 */
354#endif
355 {{0x5f,0x4f,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* 0x05 - corrected 640x480-60 */
356 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05, 271 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
357 0x00}}, 272 0x00}}, /* 0x5 */
358#if 0 273 {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e, /* corrected 640x480-72 */
359 {{0x63,0x4f,0x50,0x86,0x56,0x9b,0x06,0x3e,
360 0xe8,0x8b,0xdf,0xe7,0xff,0x10,0x00,0x01,
361 0x00}}, /* 0x6 */
362#endif
363 {{0x63,0x4f,0x4f,0x87,0x56,0x9b,0x06,0x3e, /* 0x06 - corrected 640x480-72 */
364 0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01, 274 0xe8,0x8a,0xdf,0xe7,0x07,0x00,0x00,0x01,
365 0x00}}, 275 0x00}}, /* 0x6 */
366 {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f, 276 {{0x64,0x4f,0x4f,0x88,0x55,0x9d,0xf2,0x1f,
367 0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01, 277 0xe0,0x83,0xdf,0xdf,0xf3,0x10,0x00,0x01,
368 0x00}}, /* 0x7 */ 278 0x00}}, /* 0x7 */
369 {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f, 279 {{0x63,0x4f,0x4f,0x87,0x5a,0x81,0xfb,0x1f,
370 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, 280 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05,
371 0x00}}, /* 0x8 */ 281 0x00}}, /* 0x8 */
372 {{0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f, 282 {{0x65,0x4f,0x4f,0x89,0x58,0x80,0xfb,0x1f,
373 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, /* Corrected VBE */ 283 0xe0,0x83,0xdf,0xdf,0xfc,0x10,0x00,0x05, /* Corrected VBE */
374 0x61}}, /* 0x9 */ 284 0x61}}, /* 0x9 */
375 {{0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e, 285 {{0x65,0x4f,0x4f,0x89,0x58,0x80,0x01,0x3e,
376 0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05, 286 0xe0,0x83,0xdf,0xdf,0x02,0x00,0x00,0x05,
377 0x61}}, /* 0xa */ 287 0x61}}, /* 0xa */
378 {{0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e, 288 {{0x67,0x4f,0x4f,0x8b,0x58,0x81,0x0d,0x3e,
379 0xe0,0x83,0xdf,0xdf,0x0e,0x00,0x00,0x05, /* Corrected VBE */ 289 0xe0,0x83,0xdf,0xdf,0x0e,0x00,0x00,0x05, /* Corrected VBE */
380 0x61}}, /* 0xb */ 290 0x61}}, /* 0xb */
381 {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f, 291 {{0x65,0x4f,0x4f,0x89,0x57,0x9f,0xfb,0x1f,
382 0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01, /* Corrected VDE, VBE */ 292 0xe6,0x8a,0xdf,0xdf,0xfc,0x10,0x00,0x01, /* Corrected VDE, VBE */
383 0x00}}, /* 0xc */ 293 0x00}}, /* 0xc */
384 {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0, 294 {{0x7b,0x63,0x63,0x9f,0x6a,0x93,0x6f,0xf0,
385 0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05, 295 0x58,0x8a,0x57,0x57,0x70,0x20,0x00,0x05,
386 0x01}}, /* 0xd */ 296 0x01}}, /* 0xd */
387 {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0, 297 {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xf0,
388 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06, 298 0x58,0x8c,0x57,0x57,0x73,0x20,0x00,0x06,
389 0x01}}, /* 0xe */ 299 0x01}}, /* 0xe */
390 {{0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0, 300 {{0x7d,0x63,0x63,0x81,0x6e,0x1d,0x98,0xf0,
391 0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06, 301 0x7c,0x82,0x57,0x57,0x99,0x00,0x00,0x06,
392 0x01}}, /* 0xf */ 302 0x01}}, /* 0xf */
393 {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0, 303 {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xf0,
394 0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06, 304 0x58,0x8b,0x57,0x57,0x70,0x20,0x00,0x06,
395 0x01}}, /* 0x10 */ 305 0x01}}, /* 0x10 */
396 {{0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0, 306 {{0x7e,0x63,0x63,0x82,0x6b,0x13,0x75,0xf0,
397 0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06, 307 0x58,0x8b,0x57,0x57,0x76,0x20,0x00,0x06,
398 0x01}}, /* 0x11 */ 308 0x01}}, /* 0x11 */
399 {{0x81,0x63,0x63,0x85,0x6d,0x18,0x7a,0xf0, 309 {{0x81,0x63,0x63,0x85,0x6d,0x18,0x7a,0xf0,
400 0x58,0x8b,0x57,0x57,0x7b,0x20,0x00,0x06, 310 0x58,0x8b,0x57,0x57,0x7b,0x20,0x00,0x06,
401 0x61}}, /* 0x12 */ 311 0x61}}, /* 0x12 */
402 {{0x83,0x63,0x63,0x87,0x6e,0x19,0x81,0xf0, 312 {{0x83,0x63,0x63,0x87,0x6e,0x19,0x81,0xf0,
403 0x58,0x8b,0x57,0x57,0x82,0x20,0x00,0x06, 313 0x58,0x8b,0x57,0x57,0x82,0x20,0x00,0x06,
404 0x61}}, /* 0x13 */ 314 0x61}}, /* 0x13 */
405 {{0x85,0x63,0x63,0x89,0x6f,0x1a,0x91,0xf0, 315 {{0x85,0x63,0x63,0x89,0x6f,0x1a,0x91,0xf0,
406 0x58,0x8b,0x57,0x57,0x92,0x20,0x00,0x06, 316 0x58,0x8b,0x57,0x57,0x92,0x20,0x00,0x06,
407 0x61}}, /* 0x14 */ 317 0x61}}, /* 0x14 */
408 {{0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f, 318 {{0x99,0x7f,0x7f,0x9d,0x84,0x1a,0x96,0x1f,
409 0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02, 319 0x7f,0x83,0x7f,0x7f,0x97,0x10,0x00,0x02,
410 0x00}}, /* 0x15 */ 320 0x00}}, /* 0x15 */
411 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5, 321 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf5,
412 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02, 322 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
413 0x01}}, /* 0x16 */ 323 0x01}}, /* 0x16 */
414 {{0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5, 324 {{0xa1,0x7f,0x7f,0x85,0x86,0x97,0x24,0xf5,
415 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02, 325 0x02,0x88,0xff,0xff,0x25,0x10,0x00,0x02,
416 0x01}}, /* 0x17 */ 326 0x01}}, /* 0x17 */
417 {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5, 327 {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf5,
418 0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02, 328 0x00,0x83,0xff,0xff,0x1f,0x10,0x00,0x02,
419 0x01}}, /* 0x18 */ 329 0x01}}, /* 0x18 */
420 {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5, 330 {{0xa7,0x7f,0x7f,0x8b,0x89,0x95,0x26,0xf5,
421 0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02, 331 0x00,0x83,0xff,0xff,0x27,0x10,0x00,0x02,
422 0x01}}, /* 0x19 */ 332 0x01}}, /* 0x19 */
423 {{0xa9,0x7f,0x7f,0x8d,0x8c,0x9a,0x2c,0xf5, 333 {{0xa9,0x7f,0x7f,0x8d,0x8c,0x9a,0x2c,0xf5,
424 0x00,0x83,0xff,0xff,0x2d,0x14,0x00,0x02, 334 0x00,0x83,0xff,0xff,0x2d,0x14,0x00,0x02,
425 0x62}}, /* 0x1a */ 335 0x62}}, /* 0x1a */
426 {{0xab,0x7f,0x7f,0x8f,0x8d,0x9b,0x35,0xf5, 336 {{0xab,0x7f,0x7f,0x8f,0x8d,0x9b,0x35,0xf5,
427 0x00,0x83,0xff,0xff,0x36,0x14,0x00,0x02, 337 0x00,0x83,0xff,0xff,0x36,0x14,0x00,0x02,
428 0x62}}, /* 0x1b */ 338 0x62}}, /* 0x1b */
429 {{0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba, 339 {{0xcf,0x9f,0x9f,0x93,0xb2,0x01,0x14,0xba,
430 0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03, 340 0x00,0x83,0xff,0xff,0x15,0x00,0x00,0x03,
431 0x00}}, /* 0x1c */ 341 0x00}}, /* 0x1c */
432 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a, 342 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0x5a,
433 0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07, 343 0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
434 0x01}}, /* 0x1d */ 344 0x01}}, /* 0x1d */
435 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a, 345 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0x5a,
436 0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07, 346 0x00,0x83,0xff,0xff,0x29,0x09,0x00,0x07,
437 0x01}}, /* 0x1e */ 347 0x01}}, /* 0x1e */
438 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a, 348 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0x5a,
439 0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07, 349 0x00,0x83,0xff,0xff,0x2f,0x09,0x00,0x07,
440 0x01}}, /* 0x1f */ 350 0x01}}, /* 0x1f */
441 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 351 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
442 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 352 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
443 0x00}}, /* 0x20 */ 353 0x00}}, /* 0x20 */
444 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 354 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
445 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 355 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
446 0x00}}, /* 0x21 @ 4084 */ 356 0x00}}, /* 0x21 */
447 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 357 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
448 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 358 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
449 0x00}}, /* 0x22 */ 359 0x00}}, /* 0x22 */
450 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 360 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
451 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 361 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
452 0x00}}, /* 0x23 */ 362 0x00}}, /* 0x23 */
453 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 363 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
454 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 364 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
455 0x00}}, /* 0x24 */ 365 0x00}}, /* 0x24 */
456 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 366 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
457 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 367 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
458 0x00}}, /* 0x25 */ 368 0x00}}, /* 0x25 */
459 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10, 369 {{0x09,0xc7,0xc7,0x8d,0xd3,0x0b,0xe0,0x10,
460 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04, 370 0xb0,0x83,0xaf,0xaf,0xe1,0x2f,0x01,0x04,
461 0x00}}, /* 0x26 */ 371 0x00}}, /* 0x26 */
462 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f, 372 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
463 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01, 373 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
464 0x00}}, /* 0x27 */ 374 0x00}}, /* 0x27 */
465 {{0x43,0xef,0xef,0x87,0x06,0x00,0xd4,0x1f, 375 {{0x43,0xef,0xef,0x87,0x06,0x00,0xd4,0x1f,
466 0xa0,0x83,0x9f,0x9f,0xd5,0x1f,0x41,0x05, 376 0xa0,0x83,0x9f,0x9f,0xd5,0x1f,0x41,0x05,
467 0x63}}, /* 0x28 */ 377 0x63}}, /* 0x28 */
468 {{0x45,0xef,0xef,0x89,0x07,0x01,0xd9,0x1f, 378 {{0x45,0xef,0xef,0x89,0x07,0x01,0xd9,0x1f,
469 0xa0,0x83,0x9f,0x9f,0xda,0x1f,0x41,0x05, 379 0xa0,0x83,0x9f,0x9f,0xda,0x1f,0x41,0x05,
470 0x63}}, /* 0x29 */ 380 0x63}}, /* 0x29 */
471 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f, 381 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
472 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01, 382 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
473 0x00}}, /* 0x2a */ 383 0x00}}, /* 0x2a */
474 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f, 384 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
475 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01, 385 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
476 0x00}}, /* 0x2b */ 386 0x00}}, /* 0x2b */
477 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f, 387 {{0x40,0xef,0xef,0x84,0x03,0x1d,0xda,0x1f,
478 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01, 388 0xa0,0x83,0x9f,0x9f,0xdb,0x1f,0x41,0x01,
479 0x00}}, /* 0x2c */ 389 0x00}}, /* 0x2c */
480 {{0x59,0xff,0xff,0x9d,0x17,0x13,0x33,0xba, 390 {{0x59,0xff,0xff,0x9d,0x17,0x13,0x33,0xba,
481 0x00,0x83,0xff,0xff,0x34,0x0f,0x41,0x05, 391 0x00,0x83,0xff,0xff,0x34,0x0f,0x41,0x05,
482 0x44}}, /* 0x2d */ 392 0x44}}, /* 0x2d */
483 {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x38,0xba, 393 {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x38,0xba,
484 0x00,0x83,0xff,0xff,0x39,0x0f,0x41,0x05, 394 0x00,0x83,0xff,0xff,0x39,0x0f,0x41,0x05,
485 0x44}}, /* 0x2e */ 395 0x44}}, /* 0x2e */
486 {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x3d,0xba, 396 {{0x5b,0xff,0xff,0x9f,0x18,0x14,0x3d,0xba,
487 0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05, 397 0x00,0x83,0xff,0xff,0x3e,0x0f,0x41,0x05,
488 0x44}}, /* 0x2f */ 398 0x44}}, /* 0x2f */
489 {{0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba, 399 {{0x5d,0xff,0xff,0x81,0x19,0x95,0x41,0xba,
490 0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05, 400 0x00,0x84,0xff,0xff,0x42,0x0f,0x41,0x05,
491 0x44}}, /* 0x30 */ 401 0x44}}, /* 0x30 */
492 {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba, 402 {{0x55,0xff,0xff,0x99,0x0d,0x0c,0x3e,0xba,
493 0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05, 403 0x00,0x84,0xff,0xff,0x3f,0x0f,0x41,0x05,
494 0x00}}, /* 0x31 */ 404 0x00}}, /* 0x31 */
495 {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba, 405 {{0x7f,0x63,0x63,0x83,0x6c,0x1c,0x72,0xba,
496 0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06, 406 0x27,0x8b,0xdf,0xdf,0x73,0x00,0x00,0x06,
497 0x01}}, /* 0x32 */ 407 0x01}}, /* 0x32 */
498 {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba, 408 {{0x7f,0x63,0x63,0x83,0x69,0x13,0x6f,0xba,
499 0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06, 409 0x26,0x89,0xdf,0xdf,0x6f,0x00,0x00,0x06,
500 0x01}}, /* 0x33 */ 410 0x01}}, /* 0x33 */
501 {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba, 411 {{0x7f,0x63,0x63,0x82,0x6b,0x13,0x75,0xba,
502 0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06, 412 0x29,0x8c,0xdf,0xdf,0x75,0x00,0x00,0x06,
503 0x01}}, /* 0x34 */ 413 0x01}}, /* 0x34 */
504 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1, 414 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x24,0xf1,
505 0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02, 415 0xaf,0x85,0x3f,0x3f,0x25,0x30,0x00,0x02,
506 0x01}}, /* 0x35 */ 416 0x01}}, /* 0x35 */
507 {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1, 417 {{0x9f,0x7f,0x7f,0x83,0x85,0x91,0x1e,0xf1,
508 0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02, 418 0xad,0x81,0x3f,0x3f,0x1f,0x30,0x00,0x02,
509 0x01}}, /* 0x36 */ 419 0x01}}, /* 0x36 */
510 {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1, /* 95 was 15 - illegal HBE! */ 420 {{0xa7,0x7f,0x7f,0x88,0x89,0x95,0x26,0xf1, /* 95 was 15 - illegal HBE! */
511 0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02, 421 0xb1,0x85,0x3f,0x3f,0x27,0x30,0x00,0x02,
512 0x01}}, /* 0x37 */ 422 0x01}}, /* 0x37 */
513 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4, 423 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xc4,
514 0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07, 424 0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
515 0x01}}, /* 0x38 */ 425 0x01}}, /* 0x38 */
516 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4, 426 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xd4,
517 0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07, 427 0x7a,0x8e,0xcf,0xcf,0x29,0x21,0x00,0x07,
518 0x01}}, /* 0x39 */ 428 0x01}}, /* 0x39 */
519 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4, 429 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xd4,
520 0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07, 430 0x7d,0x81,0xcf,0xcf,0x2f,0x21,0x00,0x07,
521 0x01}}, /* 0x3a */ 431 0x01}}, /* 0x3a */
522#if 0
523 {{0xdc,0x9f,0x9f,0x00,0xab,0x19,0xe6,0xef, /* 1280x960 - invalid */
524 0xc0,0xc3,0xbf,0xbf,0xe7,0x10,0x00,0x07,
525 0x01}}, /* 0x3b */
526#endif
527 {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff, /* 1280x960-60 - corrected */ 432 {{0xdc,0x9f,0x9f,0x80,0xaf,0x9d,0xe6,0xff, /* 1280x960-60 - corrected */
528 0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07, 433 0xc0,0x83,0xbf,0xbf,0xe7,0x10,0x00,0x07,
529 0x01}}, /* 0x3b */ 434 0x01}}, /* 0x3b */
530 {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e, 435 {{0x6b,0x59,0x59,0x8f,0x5e,0x8c,0x0b,0x3e,
531 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05, 436 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x05,
532 0x00}}, /* 0x3c */ 437 0x00}}, /* 0x3c */
533 {{0x7b,0x59,0x63,0x9f,0x6a,0x93,0x6f,0xf0, 438 {{0x6d,0x59,0x59,0x91,0x60,0x89,0x53,0xf0, /* 720x576, corrected to 60Hz */
534 0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05, 439 0x41,0x84,0x3f,0x3f,0x54,0x00,0x00,0x05,
535 0x01}}, /* 0x3d */ 440 0x41}}, /* 0x3d */
536 {{0x86,0x6a,0x6a,0x8a,0x74,0x06,0x8c,0x15, 441 {{0x86,0x6a,0x6a,0x8a,0x74,0x06,0x8c,0x15,
537 0x4f,0x83,0xef,0xef,0x8d,0x30,0x00,0x02, 442 0x4f,0x83,0xef,0xef,0x8d,0x30,0x00,0x02,
538 0x00}}, /* 0x3e */ 443 0x00}}, /* 0x3e */
539 {{0x81,0x6a,0x6a,0x85,0x70,0x00,0x0f,0x3e, 444 {{0x81,0x6a,0x6a,0x85,0x70,0x00,0x0f,0x3e,
540 0xeb,0x8e,0xdf,0xdf,0x10,0x00,0x00,0x02, 445 0xeb,0x8e,0xdf,0xdf,0x10,0x00,0x00,0x02,
541 0x00}}, /* 0x3f */ 446 0x00}}, /* 0x3f */
542 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1, 447 {{0xa3,0x7f,0x7f,0x87,0x86,0x97,0x1e,0xf1,
543 0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02, 448 0xae,0x85,0x57,0x57,0x1f,0x30,0x00,0x02,
544 0x01}}, /* 0x40 */ 449 0x01}}, /* 0x40 */
@@ -578,11 +483,11 @@ static const SiS_CRT1TableStruct SiS310_CRT1Table[]=
578 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff, /* 1280x960-85 */ 483 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0xf1,0xff, /* 1280x960-85 */
579 0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07, 484 0xc0,0x83,0xbf,0xbf,0xf2,0x10,0x00,0x07,
580 0x01}}, /* 0x4c */ 485 0x01}}, /* 0x4c */
581 {{0x7b,0x5f,0x63,0x9f,0x6a,0x93,0x6f,0xf0, /* 768x576 */ 486 {{0x75,0x5f,0x5f,0x99,0x66,0x90,0x53,0xf0, /* 768x576, corrected to 60Hz */
582 0x58,0x8a,0x3f,0x57,0x70,0x20,0x00,0x05, 487 0x41,0x84,0x3f,0x3f,0x54,0x00,0x00,0x05,
583 0x01}}, /* 0x4d */ 488 0x41}}, /* 0x4d */
584 {{0x2d,0x27,0x28,0x90,0x2c,0x80,0x0b,0x3e, /* FSTN 320x480, TEMP - possibly invalid */ 489 {{0x5f,0x27,0x4f,0x83,0x55,0x81,0x0b,0x3e, /* FSTN 320x240 (working) */
585 0xe9,0x8b,0xdf,0xe7,0x04,0x00,0x00,0x00, 490 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x05,
586 0x00}}, /* 0x4e */ 491 0x00}}, /* 0x4e */
587 {{0xcd,0x9f,0x9f,0x91,0xab,0x1c,0x3a,0xff, /* 1280x800-60 */ 492 {{0xcd,0x9f,0x9f,0x91,0xab,0x1c,0x3a,0xff, /* 1280x800-60 */
588 0x20,0x83,0x1f,0x1f,0x3b,0x10,0x00,0x07, 493 0x20,0x83,0x1f,0x1f,0x3b,0x10,0x00,0x07,
@@ -601,10 +506,58 @@ static const SiS_CRT1TableStruct SiS310_CRT1Table[]=
601 0x01}}, /* 0x53 */ 506 0x01}}, /* 0x53 */
602 {{0xcd,0x8f,0x8f,0x91,0x9b,0x1b,0x7a,0xff, /* 1152x864-60 */ 507 {{0xcd,0x8f,0x8f,0x91,0x9b,0x1b,0x7a,0xff, /* 1152x864-60 */
603 0x64,0x8c,0x5f,0x62,0x7b,0x10,0x00,0x07, 508 0x64,0x8c,0x5f,0x62,0x7b,0x10,0x00,0x07,
604 0x41}} /* 0x54 */ 509 0x41}}, /* 0x54 */
605}; 510 {{0x5c,0x4f,0x4f,0x80,0x57,0x80,0xa3,0x1f, /* fake 640x400@60Hz (for LCD and TV, not actually used) */
606 511 0x98,0x8c,0x8f,0x96,0xa4,0x30,0x00,0x05,
607static const SiS_MCLKDataStruct SiS310_MCLKData_0_315[] = 512 0x40}}, /* 0x55 */
513 {{0x2c,0x27,0x27,0x90,0x2d,0x92,0xa4,0x1f, /* fake 320x200@60Hz (for LCD and TV, not actually used) */
514 0x98,0x8c,0x8f,0x96,0xa5,0x30,0x00,0x04,
515 0x00}}, /* 0x56 */
516 {{0xd7,0xc7,0xc7,0x9b,0xd1,0x15,0xd1,0x10, /* 1600x1200 for LCDA */
517 0xb2,0x86,0xaf,0xb0,0xd2,0x2f,0x00,0x03,
518 0x00}}, /* 0x57 */
519 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xdc, /* 1280x768 (1280x1024) 60 Hz */
520 0x92,0x86,0xff,0x91,0x29,0x21,0x00,0x07,
521 0x01}}, /* 0x58 */
522 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xdc, /* 1280x768 (1280x1024) 75 Hz */
523 0x92,0x86,0xff,0x91,0x29,0x21,0x00,0x07,
524 0x01}}, /* 0x59 */
525 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xdc, /* 1280x768 (1280x1024) 85 Hz */
526 0x95,0x89,0xff,0x94,0x2f,0x21,0x00,0x07,
527 0x01}}, /* 0x5a */
528 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xde, /* 1280x800 (1280x1024) 60 Hz */
529 0xa2,0x86,0x1f,0xa1,0x29,0x01,0x00,0x07,
530 0x01}}, /* 0x5b */
531 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xde, /* 1280x800 (1280x1024) 75 Hz */
532 0xa2,0x86,0x1f,0xa1,0x29,0x01,0x00,0x07,
533 0x01}}, /* 0x5c */
534 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xde, /* 1280x800 (1280x1024) 85 Hz */
535 0xa5,0x89,0x1f,0xa4,0x2f,0x01,0x00,0x07,
536 0x01}}, /* 0x5d */
537 {{0x7f,0x63,0x63,0x83,0x6d,0x1d,0x0b,0x3e, /* 800x480 (wide) 60 Hz */
538 0xe9,0x8b,0xdf,0xe8,0x0c,0x00,0x00,0x06,
539 0x00}}, /* 0x5e */
540 {{0xa0,0x7f,0x7f,0x84,0x85,0x97,0x52,0xf0, /* 1024x576 (wide) 60 Hz */
541 0x41,0x85,0x3f,0x40,0x53,0x00,0x00,0x02,
542 0x01}}, /* 0x5f */
543 {{0xc9,0x9f,0x9f,0x8d,0xb0,0x15,0xec,0xf0, /* 1280x720 (wide) 60 Hz */
544 0xd4,0x89,0xcf,0xd3,0xed,0x20,0x00,0x07,
545 0x01}}, /* 0x60 */
546 {{0xcb,0x9f,0x9f,0x8f,0xa5,0x13,0x5b,0xff, /* 1280x854-60 wide */
547 0x56,0x89,0x55,0x55,0x5c,0x30,0x00,0x07,
548 0x01}}, /* 0x61 */
549 {{0xce,0x9f,0x9f,0x92,0xa9,0x17,0x28,0xde, /* 1280x854 (1280x1024) 60 Hz */
550 0xbd,0x81,0x55,0xbc,0x29,0x01,0x00,0x07,
551 0x41}}, /* 0x62 */
552 {{0xce,0x9f,0x9f,0x92,0xa5,0x17,0x28,0xde, /* 1280x854 (1280x1024) 75 Hz */
553 0xbd,0x81,0x55,0xbc,0x29,0x01,0x00,0x07,
554 0x41}}, /* 0x63 */
555 {{0xd3,0x9f,0x9f,0x97,0xab,0x1f,0x2e,0xde, /* 1280x854 (1280x1024) 85 Hz */
556 0xc0,0x84,0x55,0xbf,0x2f,0x01,0x00,0x07,
557 0x41}} /* 0x64 */
558};
559
560static const struct SiS_MCLKData SiS310_MCLKData_0_315[] =
608{ 561{
609 { 0x3b,0x22,0x01,143}, 562 { 0x3b,0x22,0x01,143},
610 { 0x5c,0x23,0x01,166}, 563 { 0x5c,0x23,0x01,166},
@@ -616,7 +569,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_315[] =
616 { 0x5c,0x23,0x01,166} 569 { 0x5c,0x23,0x01,166}
617}; 570};
618 571
619static const SiS_MCLKDataStruct SiS310_MCLKData_0_650[] = 572static const struct SiS_MCLKData SiS310_MCLKData_0_650[] =
620{ 573{
621 { 0x5a,0x64,0x82, 66}, 574 { 0x5a,0x64,0x82, 66},
622 { 0xb3,0x45,0x82, 83}, 575 { 0xb3,0x45,0x82, 83},
@@ -628,7 +581,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_650[] =
628 { 0x37,0x22,0x82,133} 581 { 0x37,0x22,0x82,133}
629}; 582};
630 583
631static const SiS_MCLKDataStruct SiS310_MCLKData_0_330[] = 584static const struct SiS_MCLKData SiS310_MCLKData_0_330[] =
632{ 585{
633 { 0x5c,0x23,0x01,166}, 586 { 0x5c,0x23,0x01,166},
634 { 0x5c,0x23,0x01,166}, 587 { 0x5c,0x23,0x01,166},
@@ -640,7 +593,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_330[] =
640 { 0x79,0x06,0x01,250} 593 { 0x79,0x06,0x01,250}
641}; 594};
642 595
643static const SiS_MCLKDataStruct SiS310_MCLKData_0_660[] = 596static const struct SiS_MCLKData SiS310_MCLKData_0_660[] =
644{ 597{
645 { 0x5c,0x23,0x82,166}, 598 { 0x5c,0x23,0x82,166},
646 { 0x5c,0x23,0x82,166}, 599 { 0x5c,0x23,0x82,166},
@@ -652,7 +605,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_660[] =
652 { 0x37,0x21,0x82,200} 605 { 0x37,0x21,0x82,200}
653}; 606};
654 607
655static const SiS_MCLKDataStruct SiS310_MCLKData_0_760[] = 608static const struct SiS_MCLKData SiS310_MCLKData_0_760[] =
656{ 609{
657 { 0x37,0x22,0x82,133}, 610 { 0x37,0x22,0x82,133},
658 { 0x5c,0x23,0x82,166}, 611 { 0x5c,0x23,0x82,166},
@@ -664,7 +617,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_760[] =
664 { 0x37,0x21,0x82,200} 617 { 0x37,0x21,0x82,200}
665}; 618};
666 619
667static const SiS_MCLKDataStruct SiS310_MCLKData_0_761[] = 620static const struct SiS_MCLKData SiS310_MCLKData_0_761[] =
668{ 621{
669 { 0x37,0x22,0x82,133}, /* Preliminary */ 622 { 0x37,0x22,0x82,133}, /* Preliminary */
670 { 0x5c,0x23,0x82,166}, 623 { 0x5c,0x23,0x82,166},
@@ -676,7 +629,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_761[] =
676 { 0x37,0x21,0x82,200} 629 { 0x37,0x21,0x82,200}
677}; 630};
678 631
679static const SiS_MCLKDataStruct SiS310_MCLKData_0_340[] = 632static const struct SiS_MCLKData SiS310_MCLKData_0_340[] =
680{ 633{
681 { 0x79,0x06,0x01,250}, 634 { 0x79,0x06,0x01,250},
682 { 0x7c,0x08,0x01,200}, 635 { 0x7c,0x08,0x01,200},
@@ -688,9 +641,9 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_0_340[] =
688 { 0x29,0x01,0x81,300} 641 { 0x29,0x01,0x81,300}
689}; 642};
690 643
691static const SiS_MCLKDataStruct SiS310_MCLKData_1[] = /* ECLK */ 644static const struct SiS_MCLKData SiS310_MCLKData_1[] = /* ECLK */
692{ 645{
693 { 0x29,0x21,0x82,150}, 646 { 0x29,0x21,0x82,150},
694 { 0x5c,0x23,0x82,166}, 647 { 0x5c,0x23,0x82,166},
695 { 0x65,0x23,0x82,183}, 648 { 0x65,0x23,0x82,183},
696 { 0x37,0x21,0x82,200}, 649 { 0x37,0x21,0x82,200},
@@ -700,7 +653,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_1[] = /* ECLK */
700 { 0x37,0x22,0x82,133} 653 { 0x37,0x22,0x82,133}
701}; 654};
702 655
703static const SiS_MCLKDataStruct SiS310_MCLKData_1_340[] = 656static const struct SiS_MCLKData SiS310_MCLKData_1_340[] =
704{ 657{
705 { 0x7c,0x08,0x01,200}, 658 { 0x7c,0x08,0x01,200},
706 { 0x7c,0x08,0x01,200}, 659 { 0x7c,0x08,0x01,200},
@@ -712,7 +665,7 @@ static const SiS_MCLKDataStruct SiS310_MCLKData_1_340[] =
712 { 0x29,0x01,0x81,300} 665 { 0x29,0x01,0x81,300}
713}; 666};
714 667
715static SiS_VCLKDataStruct SiS310_VCLKData[]= 668static struct SiS_VCLKData SiS310_VCLKData[] =
716{ 669{
717 { 0x1b,0xe1, 25}, /* 0x00 */ 670 { 0x1b,0xe1, 25}, /* 0x00 */
718 { 0x4e,0xe4, 28}, /* 0x01 */ 671 { 0x4e,0xe4, 28}, /* 0x01 */
@@ -805,7 +758,7 @@ static SiS_VCLKDataStruct SiS310_VCLKData[]=
805 { 0x30,0x23, 88}, /* 0x58 1360x768-62 (is 60Hz!) */ 758 { 0x30,0x23, 88}, /* 0x58 1360x768-62 (is 60Hz!) */
806 { 0x52,0x07,149}, /* 0x59 1280x960-85 */ 759 { 0x52,0x07,149}, /* 0x59 1280x960-85 */
807 { 0x56,0x07,156}, /* 0x5a 1400x1050-75 */ 760 { 0x56,0x07,156}, /* 0x5a 1400x1050-75 */
808 { 0x70,0x29, 81}, /* 0x5b 1280x768 LCD */ 761 { 0x70,0x29, 81}, /* 0x5b 1280x768 LCD */
809 { 0x45,0x25, 83}, /* 0x5c 1280x800 */ 762 { 0x45,0x25, 83}, /* 0x5c 1280x800 */
810 { 0x70,0x0a,147}, /* 0x5d 1680x1050 */ 763 { 0x70,0x0a,147}, /* 0x5d 1680x1050 */
811 { 0x70,0x24,162}, /* 0x5e 1600x1200 */ 764 { 0x70,0x24,162}, /* 0x5e 1600x1200 */
@@ -823,10 +776,19 @@ static SiS_VCLKDataStruct SiS310_VCLKData[]=
823 { 0x7c,0x6b, 38}, /* 0x6a 960x540@60 */ 776 { 0x7c,0x6b, 38}, /* 0x6a 960x540@60 */
824 { 0xe3,0x56, 41}, /* 0x6b 960x600@60 */ 777 { 0xe3,0x56, 41}, /* 0x6b 960x600@60 */
825 { 0x45,0x25, 83}, /* 0x6c 1280x800 */ 778 { 0x45,0x25, 83}, /* 0x6c 1280x800 */
826 { 0x70,0x28, 90} /* 0x6d 1152x864@60 */ 779 { 0x70,0x28, 90}, /* 0x6d 1152x864@60 */
780 { 0x15,0xe1, 20}, /* 0x6e 640x400@60 (fake, not actually used) */
781 { 0x5f,0xc6, 33}, /* 0x6f 720x576@60 */
782 { 0x37,0x5a, 10}, /* 0x70 320x200@60 (fake, not actually used) */
783 { 0x2b,0xc2, 35}, /* 0x71 768x576@60 */
784 { 0xa8,0x42,131}, /* 0x72 1600x1200@60 for LCDA */
785 { 0x1b,0xc1, 34}, /* 0x73 800x480 60Hz (wide) */
786 { 0x41,0x64, 48}, /* 0x74 1024x576 60Hz (wide) */
787 { 0x52,0x27, 75}, /* 0x75 1280x720 60Hz (wide) */
788 { 0x75,0x13, 84} /* 0x76 1280x854 60Hz (wide) */
827}; 789};
828 790
829static SiS_VBVCLKDataStruct SiS310_VBVCLKData[]= 791static struct SiS_VBVCLKData SiS310_VBVCLKData[] =
830{ 792{
831 { 0x1b,0xe1, 25}, /* 0x00 */ 793 { 0x1b,0xe1, 25}, /* 0x00 */
832 { 0x4e,0xe4, 28}, /* 0x01 */ 794 { 0x4e,0xe4, 28}, /* 0x01 */
@@ -858,12 +820,6 @@ static SiS_VBVCLKDataStruct SiS310_VBVCLKData[]=
858 { 0x5e,0x43,113}, /* 0x1b */ 820 { 0x5e,0x43,113}, /* 0x1b */
859 { 0xbc,0x44,116}, /* 0x1c */ 821 { 0xbc,0x44,116}, /* 0x1c */
860 { 0xe0,0x46,132}, /* 0x1d */ 822 { 0xe0,0x46,132}, /* 0x1d */
861#if 0
862 { 0xd4,0x28,135}, /* 0x1e */
863 { 0xea,0x2a,139}, /* 0x1f */
864 { 0x41,0x22,157}, /* 0x20 */
865 { 0x70,0x24,162}, /* 0x21 */
866#endif
867 { 0xe2,0x46,135}, /* 0x1e */ /* 1280x1024-75, better clock for VGA2 */ 823 { 0xe2,0x46,135}, /* 0x1e */ /* 1280x1024-75, better clock for VGA2 */
868 { 0xe5,0x46,139}, /* 0x1f */ /* 1024x768-120, better clock for VGA2 */ 824 { 0xe5,0x46,139}, /* 0x1f */ /* 1024x768-120, better clock for VGA2 */
869 { 0x15,0x01,157}, /* 0x20 */ /* 1280x1024-85, better clock for VGA2 */ 825 { 0x15,0x01,157}, /* 0x20 */ /* 1280x1024-85, better clock for VGA2 */
@@ -912,7 +868,7 @@ static SiS_VBVCLKDataStruct SiS310_VBVCLKData[]=
912 { 0x34,0x61, 95}, /* 0x4b UNUSED */ 868 { 0x34,0x61, 95}, /* 0x4b UNUSED */
913 { 0x78,0x27,108}, /* 0x4c UNUSED */ 869 { 0x78,0x27,108}, /* 0x4c UNUSED */
914 { 0x66,0x43,123}, /* 0x4d 1400x1050-60 */ 870 { 0x66,0x43,123}, /* 0x4d 1400x1050-60 */
915 { 0x41,0x4e, 21}, /* 0x4e UNUSED */ 871 { 0x41,0x4e, 21}, /* 0x4e */
916 { 0xa1,0x4a, 29}, /* 0x4f UNUSED */ 872 { 0xa1,0x4a, 29}, /* 0x4f UNUSED */
917 { 0x19,0x42, 42}, /* 0x50 UNUSED */ 873 { 0x19,0x42, 42}, /* 0x50 UNUSED */
918 { 0x54,0x46, 58}, /* 0x51 UNUSED */ 874 { 0x54,0x46, 58}, /* 0x51 UNUSED */
@@ -925,7 +881,7 @@ static SiS_VBVCLKDataStruct SiS310_VBVCLKData[]=
925 { 0x30,0x23, 88}, /* 0x58 1360x768-62 (is 60Hz!) TEMP, UNUSED */ 881 { 0x30,0x23, 88}, /* 0x58 1360x768-62 (is 60Hz!) TEMP, UNUSED */
926 { 0x52,0x07,149}, /* 0x59 1280x960-85 */ 882 { 0x52,0x07,149}, /* 0x59 1280x960-85 */
927 { 0x56,0x07,156}, /* 0x5a 1400x1050-75 */ 883 { 0x56,0x07,156}, /* 0x5a 1400x1050-75 */
928 { 0x70,0x29, 81}, /* 0x5b 1280x768 LCD (TMDS) */ 884 { 0x70,0x29, 81}, /* 0x5b 1280x768 LCD (TMDS) */
929 { 0xce,0x1e, 73}, /* 0x5c 1280x800_2 LCD (SiS LVDS) - (CRT1: 45 25 83) */ 885 { 0xce,0x1e, 73}, /* 0x5c 1280x800_2 LCD (SiS LVDS) - (CRT1: 45 25 83) */
930 { 0xbe,0x44,121}, /* 0x5d 1680x1050 LCD */ 886 { 0xbe,0x44,121}, /* 0x5d 1680x1050 LCD */
931 { 0x70,0x24,162}, /* 0x5e 1600x1200 LCD */ 887 { 0x70,0x24,162}, /* 0x5e 1600x1200 LCD */
@@ -943,57 +899,33 @@ static SiS_VBVCLKDataStruct SiS310_VBVCLKData[]=
943 { 0x7c,0x6b, 38}, /* 0x6a 960x540@60 */ 899 { 0x7c,0x6b, 38}, /* 0x6a 960x540@60 */
944 { 0xe3,0x56, 41}, /* 0x6b 960x600@60 */ 900 { 0xe3,0x56, 41}, /* 0x6b 960x600@60 */
945 { 0x9c,0x62, 69}, /* 0x6c 1280x800 (SiS TMDS) (special) */ 901 { 0x9c,0x62, 69}, /* 0x6c 1280x800 (SiS TMDS) (special) */
946 { 0x70,0x28, 90} /* 0x6d 1152x864@60 */ 902 { 0x70,0x28, 90}, /* 0x6d 1152x864@60 */
903 { 0x15,0xe1, 20}, /* 0x6e 640x400@60 (fake, not actually used) */
904 { 0x5f,0xc6, 33}, /* 0x6f 720x576@60 */
905 { 0x37,0x5a, 10}, /* 0x70 320x200@60 (fake, not actually used) */
906 { 0x2b,0xc2, 35}, /* 0x71 768@576@60 */
907 { 0xa8,0x42,131}, /* 0x72 1600x1200@60 for LCDA */
908 { 0x1b,0xc1, 34}, /* 0x73 800x480 60Hz (wide) */
909 { 0x41,0x64, 48}, /* 0x74 1024x576 60Hz (wide) */
910 { 0x52,0x27, 75}, /* 0x75 1280x720 60Hz (wide) */
911 { 0x75,0x13, 84} /* 0x76 1280x854 60Hz (SiS LVDS) LCD */
947}; 912};
948 913
949static const DRAM4Type SiS310_SR15[8] = { 914static const unsigned char SiS310_SR15[4 * 8] =
950 {0x00,0x04,0x60,0x60}, 915{
951 {0x0f,0x0f,0x0f,0x0f}, 916 0x00,0x04,0x60,0x60,
952 {0xba,0xba,0xba,0xba}, 917 0x0f,0x0f,0x0f,0x0f,
953 {0xa9,0xa9,0xac,0xac}, 918 0xba,0xba,0xba,0xba,
954 {0xa0,0xa0,0xa0,0xa8}, 919 0xa9,0xa9,0xac,0xac,
955 {0x00,0x00,0x02,0x02}, 920 0xa0,0xa0,0xa0,0xa8,
956 {0x30,0x30,0x40,0x40}, 921 0x00,0x00,0x02,0x02,
957 {0x00,0xa5,0xfb,0xf6} 922 0x30,0x30,0x40,0x40,
958}; 923 0x00,0xa5,0xfb,0xf6
959
960#ifdef LINUX_KERNEL
961
962static UCHAR SiS310_SR07 = 0x18;
963
964static const DRAM4Type SiS310_CR40[5] = {
965 {0x77,0x77,0x33,0x33},
966 {0x77,0x77,0x33,0x33},
967 {0x00,0x00,0x00,0x00},
968 {0x5b,0x5b,0x03,0x03},
969 {0x00,0x00,0xf0,0xf8}
970}; 924};
971 925
972static UCHAR SiS310_CR49[] = {0xaa,0x88}; 926static const struct SiS_PanelDelayTbl SiS310_PanelDelayTbl[] =
973static UCHAR SiS310_SR1F = 0x00;
974static UCHAR SiS310_SR21 = 0xa5;
975static UCHAR SiS310_SR22 = 0xfb;
976static UCHAR SiS310_SR23 = 0xf6;
977static UCHAR SiS310_SR24 = 0x0d;
978static UCHAR SiS310_SR25[] = {0x33,0x3};
979static UCHAR SiS310_SR31 = 0x00;
980static UCHAR SiS310_SR32 = 0x11;
981static UCHAR SiS310_SR33 = 0x00;
982static UCHAR SiS310_CRT2Data_1_2 = 0x00;
983static UCHAR SiS310_CRT2Data_4_D = 0x00;
984static UCHAR SiS310_CRT2Data_4_E = 0x00;
985static UCHAR SiS310_CRT2Data_4_10 = 0x80;
986static const USHORT SiS310_RGBSenseData = 0xd1;
987static const USHORT SiS310_VideoSenseData = 0xb9;
988static const USHORT SiS310_YCSenseData = 0xb3;
989static const USHORT SiS310_RGBSenseData2 = 0x0190;
990static const USHORT SiS310_VideoSenseData2 = 0x0174;
991static const USHORT SiS310_YCSenseData2 = 0x016b;
992#endif
993
994static const SiS_PanelDelayTblStruct SiS310_PanelDelayTbl[]=
995{ 927{
996 {{0x10,0x40}}, 928 {{0x10,0x40}},
997 {{0x10,0x40}}, 929 {{0x10,0x40}},
998 {{0x10,0x40}}, 930 {{0x10,0x40}},
999 {{0x10,0x40}}, 931 {{0x10,0x40}},
@@ -1011,7 +943,7 @@ static const SiS_PanelDelayTblStruct SiS310_PanelDelayTbl[]=
1011 {{0x10,0x40}} 943 {{0x10,0x40}}
1012}; 944};
1013 945
1014static const SiS_PanelDelayTblStruct SiS310_PanelDelayTblLVDS[]= 946static const struct SiS_PanelDelayTbl SiS310_PanelDelayTblLVDS[] =
1015{ 947{
1016 {{0x28,0xc8}}, 948 {{0x28,0xc8}},
1017 {{0x28,0xc8}}, 949 {{0x28,0xc8}},
@@ -1035,18 +967,18 @@ static const SiS_PanelDelayTblStruct SiS310_PanelDelayTblLVDS[]=
1035/* SIS VIDEO BRIDGE ----------------------------------------- */ 967/* SIS VIDEO BRIDGE ----------------------------------------- */
1036/**************************************************************/ 968/**************************************************************/
1037 969
1038static const SiS_LCDDataStruct SiS310_St2LCD1024x768Data[] = 970static const struct SiS_LCDData SiS310_St2LCD1024x768Data[] =
1039{ 971{
1040 { 62, 25, 800, 546,1344, 806}, 972 { 62, 25, 800, 546,1344, 806},
1041 { 32, 15, 930, 546,1344, 806}, 973 { 32, 15, 930, 546,1344, 806},
1042 { 62, 25, 800, 546,1344, 806}, 974 { 62, 25, 800, 546,1344, 806},
1043 { 104, 45, 945, 496,1344, 806}, 975 { 104, 45, 945, 496,1344, 806},
1044 { 62, 25, 800, 546,1344, 806}, 976 { 62, 25, 800, 546,1344, 806},
1045 { 31, 18,1008, 624,1344, 806}, 977 { 31, 18,1008, 624,1344, 806},
1046 { 1, 1,1344, 806,1344, 806} 978 { 1, 1,1344, 806,1344, 806}
1047}; 979};
1048 980
1049static const SiS_LCDDataStruct SiS310_ExtLCD1024x768Data[] = 981static const struct SiS_LCDData SiS310_ExtLCD1024x768Data[] =
1050{ 982{
1051 { 42, 25,1536, 419,1344, 806}, 983 { 42, 25,1536, 419,1344, 806},
1052 { 48, 25,1536, 369,1344, 806}, 984 { 48, 25,1536, 369,1344, 806},
@@ -1057,7 +989,7 @@ static const SiS_LCDDataStruct SiS310_ExtLCD1024x768Data[] =
1057 { 1, 1,1344, 806,1344, 806} 989 { 1, 1,1344, 806,1344, 806}
1058}; 990};
1059 991
1060static const SiS_LCDDataStruct SiS310_St2LCD1280x1024Data[] = 992static const struct SiS_LCDData SiS310_St2LCD1280x1024Data[] =
1061{ 993{
1062 { 22, 5, 800, 510,1650,1088}, 994 { 22, 5, 800, 510,1650,1088},
1063 { 22, 5, 800, 510,1650,1088}, 995 { 22, 5, 800, 510,1650,1088},
@@ -1069,7 +1001,7 @@ static const SiS_LCDDataStruct SiS310_St2LCD1280x1024Data[] =
1069 { 1, 1,1688,1066,1688,1066} 1001 { 1, 1,1688,1066,1688,1066}
1070}; 1002};
1071 1003
1072static const SiS_LCDDataStruct SiS310_ExtLCD1280x1024Data[] = 1004static const struct SiS_LCDData SiS310_ExtLCD1280x1024Data[] =
1073{ 1005{
1074 { 211, 60,1024, 501,1688,1066}, 1006 { 211, 60,1024, 501,1688,1066},
1075 { 211, 60,1024, 508,1688,1066}, 1007 { 211, 60,1024, 508,1688,1066},
@@ -1081,45 +1013,22 @@ static const SiS_LCDDataStruct SiS310_ExtLCD1280x1024Data[] =
1081 { 1, 1,1688,1066,1688,1066} 1013 { 1, 1,1688,1066,1688,1066}
1082}; 1014};
1083 1015
1084static const SiS_Part2PortTblStruct SiS310_CRT2Part2_1024x768_1[] = 1016static const struct SiS_Part2PortTbl SiS310_CRT2Part2_1024x768_1[] =
1085{ 1017{
1086 {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 1018 {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
1087 {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 1019 {{0x2c,0x12,0x9a,0xae,0x88,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
1088 {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 1020 {{0x25,0x12,0xc9,0xdc,0xb6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
1089 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, 1021 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
1090 {{0x38,0x13,0x16,0x0c,0xe6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 1022 {{0x38,0x13,0x16,0x0c,0xe6,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
1091 {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 1023 {{0x38,0x18,0x16,0x00,0x00,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
1092 {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}} 1024 {{0x36,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
1093}; 1025};
1094 1026
1095/* *** LCDA *** */
1096
1097#if 0
1098static const SiS_LVDSDataStruct SiS_LCDA1600x1200Data_1[]=
1099{ /* Clevo, 651+301C */
1100 {1200, 450, 2048,1250},
1101 {1200, 400, 2048,1250},
1102 {1280, 450, 2048,1250},
1103 {1280, 400, 2048,1250},
1104 {1200, 530, 2048,1250},
1105 {1360, 650, 2048,1250},
1106 {1584, 818, 2048,1250},
1107 {1688,1066, 2048,1250},
1108 {1688,1066, 2048,1250},
1109#if 0
1110 {2048,1250, 2048,1250} /* this should be correct */
1111#endif
1112#if 1
1113 {2160,1250, 2048,1250} /* ? */
1114#endif
1115};
1116#endif
1117
1118/**************************************************************/ 1027/**************************************************************/
1119/* LVDS, CHRONTEL ------------------------------------------- */ 1028/* LVDS, CHRONTEL ------------------------------------------- */
1120/**************************************************************/ 1029/**************************************************************/
1121 1030
1122static const SiS_LVDSDataStruct SiS310_CHTVUPALData[]= 1031static const struct SiS_LVDSData SiS310_CHTVUPALData[] =
1123{ 1032{
1124 {1008, 625,1008, 625}, 1033 {1008, 625,1008, 625},
1125 {1008, 625,1008, 625}, 1034 {1008, 625,1008, 625},
@@ -1130,7 +1039,7 @@ static const SiS_LVDSDataStruct SiS310_CHTVUPALData[]=
1130 {1400,1000,1400,1000} 1039 {1400,1000,1400,1000}
1131}; 1040};
1132 1041
1133static const SiS_LVDSDataStruct SiS310_CHTVOPALData[]= 1042static const struct SiS_LVDSData SiS310_CHTVOPALData[] =
1134{ 1043{
1135 {1008, 625,1008, 625}, 1044 {1008, 625,1008, 625},
1136 {1008, 625,1008, 625}, 1045 {1008, 625,1008, 625},
@@ -1138,10 +1047,10 @@ static const SiS_LVDSDataStruct SiS310_CHTVOPALData[]=
1138 {1008, 625,1008, 625}, 1047 {1008, 625,1008, 625},
1139 { 840, 625, 840, 625}, 1048 { 840, 625, 840, 625},
1140 { 944, 625, 944, 625}, 1049 { 944, 625, 944, 625},
1141 {1400, 875,1400, 875} 1050 {1400, 875,1400, 875}
1142}; 1051};
1143 1052
1144static const SiS_LVDSDataStruct SiS310_CHTVUPALMData[]= 1053static const struct SiS_LVDSData SiS310_CHTVUPALMData[] =
1145{ 1054{
1146 { 840, 600, 840, 600}, 1055 { 840, 600, 840, 600},
1147 { 840, 600, 840, 600}, 1056 { 840, 600, 840, 600},
@@ -1149,10 +1058,10 @@ static const SiS_LVDSDataStruct SiS310_CHTVUPALMData[]=
1149 { 840, 600, 840, 600}, 1058 { 840, 600, 840, 600},
1150 { 784, 600, 784, 600}, 1059 { 784, 600, 784, 600},
1151 {1064, 750,1064, 750}, 1060 {1064, 750,1064, 750},
1152 {1160, 945,1160, 945} 1061 {1160, 945,1160, 945}
1153}; 1062};
1154 1063
1155static const SiS_LVDSDataStruct SiS310_CHTVOPALMData[]= 1064static const struct SiS_LVDSData SiS310_CHTVOPALMData[] =
1156{ 1065{
1157 { 840, 525, 840, 525}, 1066 { 840, 525, 840, 525},
1158 { 840, 525, 840, 525}, 1067 { 840, 525, 840, 525},
@@ -1160,10 +1069,10 @@ static const SiS_LVDSDataStruct SiS310_CHTVOPALMData[]=
1160 { 840, 525, 840, 525}, 1069 { 840, 525, 840, 525},
1161 { 784, 525, 784, 525}, 1070 { 784, 525, 784, 525},
1162 {1040, 700,1040, 700}, 1071 {1040, 700,1040, 700},
1163 {1160, 840,1160, 840} 1072 {1160, 840,1160, 840}
1164}; 1073};
1165 1074
1166static const SiS_LVDSDataStruct SiS310_CHTVUPALNData[]= 1075static const struct SiS_LVDSData SiS310_CHTVUPALNData[] =
1167{ 1076{
1168 {1008, 625,1008, 625}, 1077 {1008, 625,1008, 625},
1169 {1008, 625,1008, 625}, 1078 {1008, 625,1008, 625},
@@ -1174,7 +1083,7 @@ static const SiS_LVDSDataStruct SiS310_CHTVUPALNData[]=
1174 {1400,1000,1400,1000} 1083 {1400,1000,1400,1000}
1175}; 1084};
1176 1085
1177static const SiS_LVDSDataStruct SiS310_CHTVOPALNData[]= 1086static const struct SiS_LVDSData SiS310_CHTVOPALNData[] =
1178{ 1087{
1179 {1008, 625,1008, 625}, 1088 {1008, 625,1008, 625},
1180 {1008, 625,1008, 625}, 1089 {1008, 625,1008, 625},
@@ -1182,10 +1091,10 @@ static const SiS_LVDSDataStruct SiS310_CHTVOPALNData[]=
1182 {1008, 625,1008, 625}, 1091 {1008, 625,1008, 625},
1183 { 840, 625, 840, 625}, 1092 { 840, 625, 840, 625},
1184 { 944, 625, 944, 625}, 1093 { 944, 625, 944, 625},
1185 {1400, 875,1400, 875} 1094 {1400, 875,1400, 875}
1186}; 1095};
1187 1096
1188static const SiS_LVDSDataStruct SiS310_CHTVSOPALData[]= /* (super overscan - no effect on 7019) */ 1097static const struct SiS_LVDSData SiS310_CHTVSOPALData[] = /* (super overscan - no effect on 7019) */
1189{ 1098{
1190 {1008, 625,1008, 625}, 1099 {1008, 625,1008, 625},
1191 {1008, 625,1008, 625}, 1100 {1008, 625,1008, 625},
@@ -1196,1333 +1105,10 @@ static const SiS_LVDSDataStruct SiS310_CHTVSOPALData[]= /* (super overscan -
1196 {1400, 875,1400, 875} 1105 {1400, 875,1400, 875}
1197}; 1106};
1198 1107
1199
1200static const SiS_LVDSDesStruct SiS310_PanelType00_1[]= /* 800x600 */
1201{
1202 { 0, 0},
1203 { 0, 0},
1204 { 0, 0},
1205 { 0, 0},
1206 { 0, 0},
1207 { 0, 0},
1208 { 0, 0},
1209 { 0, 0},
1210 { 0, 0}
1211};
1212
1213static const SiS_LVDSDesStruct SiS310_PanelType01_1[]= /* 1024x768 */
1214{
1215 { 0, 0},
1216 { 0, 0},
1217 { 0, 0},
1218 { 0, 0},
1219 { 0, 0},
1220 { 0, 0},
1221 { 0, 805},
1222 { 0, 0},
1223 { 0, 0}
1224};
1225
1226static const SiS_LVDSDesStruct SiS310_PanelType02_1[]= /* 1280x1024 */
1227{
1228 { 0, 0},
1229 { 0, 0},
1230 { 0, 0},
1231 { 0, 0},
1232 { 0, 0},
1233 { 0, 0},
1234 { 0, 0},
1235 { 0, 1065},
1236 { 0, 0},
1237 { 0, 0}
1238};
1239
1240
1241static const SiS_LVDSDesStruct SiS310_PanelType03_1[]=
1242{
1243 { 0, 0},
1244 { 0, 0},
1245 { 0, 0},
1246 { 0, 0},
1247 { 0, 0},
1248 { 0, 0},
1249 { 0, 0},
1250 { 0, 0},
1251 { 0, 0}
1252};
1253
1254static const SiS_LVDSDesStruct SiS310_PanelType04_1[]=
1255{
1256 {1343, 798},
1257 {1343, 794},
1258 {1343, 798},
1259 {1343, 794},
1260 {1343, 0},
1261 {1343, 0},
1262 { 0, 805},
1263 { 0, 794},
1264 { 0, 0}
1265};
1266
1267static const SiS_LVDSDesStruct SiS310_PanelType05_1[]=
1268{
1269 {1343, 798},
1270 {1343, 794},
1271 {1343, 798},
1272 {1343, 794},
1273 {1343, 0},
1274 {1343, 0},
1275 { 0, 805},
1276 { 0, 794},
1277 { 0, 0}
1278};
1279
1280static const SiS_LVDSDesStruct SiS310_PanelType06_1[]=
1281{
1282 {1343, 798},
1283 {1343, 794},
1284 {1343, 798},
1285 {1343, 794},
1286 {1343, 0},
1287 {1343, 0},
1288 { 0, 805},
1289 { 0, 794},
1290 { 0, 0}
1291};
1292
1293static const SiS_LVDSDesStruct SiS310_PanelType07_1[]=
1294{
1295 {1343, 798},
1296 {1343, 794},
1297 {1343, 798},
1298 {1343, 794},
1299 {1343, 0},
1300 {1343, 0},
1301 { 0, 805},
1302 { 0, 794},
1303 { 0, 0}
1304};
1305
1306static const SiS_LVDSDesStruct SiS310_PanelType08_1[]= /* 1400x1050 */
1307{
1308 { 0, 0},
1309 { 0, 0},
1310 { 0, 0},
1311 { 0, 0},
1312 { 0, 0},
1313 { 0, 0},
1314 { 0, 0},
1315 { 0, 0},
1316 { 0, 0},
1317 { 0, 0},
1318 { 0, 0}
1319};
1320
1321static const SiS_LVDSDesStruct SiS310_PanelType09_1[]= /* 1280x768 */
1322{
1323 { 0, 0},
1324 { 0, 0},
1325 { 0, 0},
1326 { 0, 0},
1327 { 0, 0},
1328 { 0, 0},
1329 { 0, 0},
1330 { 0, 0},
1331 { 0, 0},
1332 { 0, 0},
1333 { 0, 0}
1334};
1335
1336static const SiS_LVDSDesStruct SiS310_PanelType0a_1[]= /* 1600x1200 */
1337{
1338 { 0, 0},
1339 { 0, 0},
1340 { 0, 0},
1341 { 0, 0},
1342 { 0, 0},
1343 { 0, 0},
1344 { 0, 0},
1345 { 0, 0},
1346 { 0, 0},
1347 { 0, 0},
1348 { 0, 0}
1349};
1350
1351static const SiS_LVDSDesStruct SiS310_PanelType0b_1[]= /* 640x480_2 */
1352{
1353 { 0, 524},
1354 { 0, 524},
1355 { 0, 524},
1356 { 0, 524},
1357 { 0, 524},
1358 { 0, 524},
1359 { 8, 524},
1360 { 0, 524}
1361};
1362
1363static const SiS_LVDSDesStruct SiS310_PanelType0c_1[]= /* 640x480_3 */
1364{
1365 { 0, 524},
1366 { 0, 524},
1367 { 0, 524},
1368 { 0, 524},
1369 { 0, 524},
1370 { 0, 524},
1371 { 8, 524},
1372 { 0, 524}
1373};
1374
1375static const SiS_LVDSDesStruct SiS310_PanelType0d_1[]=
1376{
1377 {1343, 798},
1378 {1343, 794},
1379 {1343, 798},
1380 {1343, 794},
1381 {1343, 0},
1382 {1343, 0},
1383 { 0, 805},
1384 { 0, 794},
1385 { 0, 0}
1386};
1387
1388static const SiS_LVDSDesStruct SiS310_PanelType0e_1[]=
1389{
1390 {1343, 798},
1391 {1343, 794},
1392 {1343, 798},
1393 {1343, 794},
1394 {1343, 0},
1395 {1343, 0},
1396 { 0, 805},
1397 { 0, 794},
1398 { 0, 0}
1399};
1400
1401static const SiS_LVDSDesStruct SiS310_PanelType0f_1[]=
1402{
1403 {1343, 798},
1404 {1343, 794},
1405 {1343, 798},
1406 {1343, 794},
1407 {1343, 0},
1408 {1343, 0},
1409 { 0, 805},
1410 { 0, 794},
1411 { 0, 0}
1412};
1413
1414static const SiS_LVDSDesStruct SiS310_PanelType00_2[]=
1415{
1416 {980, 528},
1417 {980, 503},
1418 {980, 528},
1419 {980, 503},
1420 {980, 568},
1421 { 0, 628},
1422 { 0, 0},
1423 { 0, 0},
1424 { 0, 0}
1425};
1426
1427static const SiS_LVDSDesStruct SiS310_PanelType01_2[]=
1428{
1429 {1152, 622},
1430 {1152, 597},
1431 {1152, 622},
1432 {1152, 597},
1433 {1152, 662},
1434 {1232, 722},
1435 { 0, 806},
1436 { 0, 0},
1437 { 0, 0}
1438};
1439
1440static const SiS_LVDSDesStruct SiS310_PanelType02_2[]=
1441{
1442 {1368, 754},
1443 {1368, 729},
1444 {1368, 754},
1445 {1368, 729},
1446 {1368, 794},
1447 {1448, 854},
1448 {1560, 938},
1449 { 0,1066},
1450 { 0, 0},
1451 { 0, 0},
1452 { 0, 0}
1453};
1454
1455static const SiS_LVDSDesStruct SiS310_PanelType03_2[]=
1456{
1457 { 0, 0},
1458 { 0, 0},
1459 { 0, 0},
1460 { 0, 0},
1461 { 0, 0},
1462 { 0, 0},
1463 { 0, 0}
1464};
1465
1466static const SiS_LVDSDesStruct SiS310_PanelType04_2[]=
1467{
1468 { 0, 0},
1469 { 0, 0},
1470 { 0, 0},
1471 { 0, 0},
1472 { 0, 0},
1473 { 0, 0},
1474 { 0, 0},
1475 { 0, 0},
1476 { 0, 0}
1477};
1478
1479static const SiS_LVDSDesStruct SiS310_PanelType05_2[]=
1480{
1481 {1152, 622},
1482 {1152, 597},
1483 {1152, 622},
1484 {1152, 597},
1485 {1152, 662},
1486 {1232, 722},
1487 { 0, 805},
1488 { 0, 794},
1489 { 0, 0}
1490};
1491
1492static const SiS_LVDSDesStruct SiS310_PanelType06_2[]=
1493{
1494 {1152, 622},
1495 {1152, 597},
1496 {1152, 622},
1497 {1152, 597},
1498 {1152, 662},
1499 {1232, 722},
1500 { 0, 805},
1501 { 0, 794},
1502 { 0, 0}
1503};
1504
1505static const SiS_LVDSDesStruct SiS310_PanelType07_2[]=
1506{
1507 {1152, 622},
1508 {1152, 597},
1509 {1152, 622},
1510 {1152, 597},
1511 {1152, 662},
1512 {1232, 722},
1513 { 0, 805},
1514 { 0, 794},
1515 { 0, 0}
1516};
1517
1518static const SiS_LVDSDesStruct SiS310_PanelType08_2[]= /* 1400x1050 */
1519{
1520 {1308, 741},
1521 {1308, 716},
1522 {1308, 741},
1523 {1308, 716},
1524 {1308, 781},
1525 {1388, 841},
1526 {1500, 925},
1527 {1628,1053},
1528 { 0,1065},
1529 { 0, 0},
1530 { 0, 0}
1531};
1532
1533static const SiS_LVDSDesStruct SiS310_PanelType09_2[]= /* 1280x768 */
1534{
1535 {1083, 622},
1536 {1083, 597},
1537 {1083, 622},
1538 {1083, 597},
1539 {1083, 662},
1540 {1163, 722},
1541 {1286, 805},
1542 { 0, 794},
1543 { 0, 0}
1544};
1545
1546static const SiS_LVDSDesStruct SiS310_PanelType0a_2[]= /* 1600x1200 */
1547{
1548 {1568, 920},
1549 {1568, 895},
1550 {1568, 920},
1551 {1568, 895},
1552 {1568, 960},
1553 {1648,1020},
1554 {1760,1104},
1555 {1888,1232},
1556 {1948,1245},
1557 { 0, 0}
1558#if 0
1559 {1568, 850},
1560 {1568, 825},
1561 {1568, 850},
1562 {1568, 825},
1563 {1568, 890},
1564 {1648, 950},
1565 {1760,1034},
1566 {1888,1162},
1567 {1948,1175},
1568 { 0, 0}
1569#endif
1570};
1571
1572static const SiS_LVDSDesStruct SiS310_PanelType0b_2[]= /* 640x480_2 */
1573{
1574 {1152, 622},
1575 {1152, 597},
1576 {1152, 622},
1577 {1152, 597},
1578 {1152, 662},
1579 {1232, 722},
1580 { 0, 805},
1581 { 0, 794},
1582 { 0, 0}
1583};
1584
1585static const SiS_LVDSDesStruct SiS310_PanelType0c_2[]= /* 640x480_3 */
1586{
1587 {1152, 622},
1588 {1152, 597},
1589 {1152, 622},
1590 {1152, 597},
1591 {1152, 662},
1592 {1232, 722},
1593 { 0, 805},
1594 { 0, 794},
1595 { 0, 0}
1596};
1597
1598static const SiS_LVDSDesStruct SiS310_PanelType0d_2[]=
1599{
1600 {1152, 622},
1601 {1152, 597},
1602 {1152, 622},
1603 {1152, 597},
1604 {1152, 662},
1605 {1232, 722},
1606 { 0, 805},
1607 { 0, 794},
1608 { 0, 0}
1609};
1610
1611static const SiS_LVDSDesStruct SiS310_PanelType0e_2[]=
1612{
1613 {1152, 622},
1614 {1152, 597},
1615 {1152, 622},
1616 {1152, 597},
1617 {1152, 662},
1618 {1232, 722},
1619 { 0, 805},
1620 { 0, 794},
1621 { 0, 0}
1622};
1623
1624static const SiS_LVDSDesStruct SiS310_PanelType0f_2[] =
1625{
1626 {1152, 622},
1627 {1152, 597},
1628 {1152, 622},
1629 {1152, 597},
1630 {1152, 662},
1631 {1232, 722},
1632 { 0, 805},
1633 { 0, 794},
1634 { 0, 0}
1635};
1636
1637static const SiS_LVDSDesStruct SiS310_PanelTypeNS_1[]=
1638{
1639 { 8, 0},
1640 { 8, 0},
1641 { 8, 0},
1642 { 8, 0},
1643 { 8, 0},
1644 { 0, 0},
1645 { 0, 0},
1646 { 0, 0},
1647 { 0, 806},
1648 { 0, 0}
1649};
1650
1651static const SiS_LVDSDesStruct SiS310_PanelTypeNS_2[] =
1652{
1653 { 0 , 0},
1654 { 0 , 0},
1655 { 0 , 0},
1656 { 0 , 0},
1657 { 0 , 0},
1658 { 0 , 0},
1659 { 0 , 0},
1660 { 0 , 0},
1661 { 0 , 0},
1662 { 0 , 0}
1663};
1664
1665/* CRT1 CRTC for SlaveModes and LCDA */
1666
1667static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1[] =
1668{
1669 {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
1670 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
1671 0x00 }},
1672 {{0x6b,0x4f,0x8f,0x55,0x85,0x78,0x1f,
1673 0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
1674 0x00 }},
1675 {{0x6b,0x4f,0x8f,0x55,0x85,0xaa,0x1f,
1676 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
1677 0x00 }},
1678 {{0x6b,0x4f,0x8f,0x55,0x85,0x78,0x1f,
1679 0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
1680 0x00 }},
1681 {{0x6b,0x4f,0x8f,0x55,0x85,0xfa,0x1f,
1682 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
1683 0x00 }},
1684 {{0x7f,0x63,0x83,0x69,0x19,0x72,0xf0,
1685 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1686 0x01 }}
1687};
1688
1689static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_1_H[] =
1690{
1691 {{0x43,0x27,0x87,0x2d,0x1d,0xaa,0x1f,
1692 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
1693 0x00 }},
1694 {{0x43,0x27,0x87,0x2d,0x1d,0x78,0x1f,
1695 0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
1696 0x00 }},
1697 {{0x43,0x27,0x87,0x2d,0x1d,0xfa,0x1f,
1698 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
1699 0x00 }},
1700 {{0x43,0x27,0x87,0x2d,0x1d,0x78,0x1f,
1701 0x5e,0x83,0x5d,0x79,0x10,0x00,0x05,
1702 0x00 }},
1703 {{0x43,0x27,0x87,0x2d,0x1d,0xfa,0x1f,
1704 0xe0,0x85,0xdf,0xfb,0x10,0x00,0x05,
1705 0x00 }},
1706 {{0x4d,0x31,0x91,0x37,0x07,0x72,0xf0,
1707 0x58,0x8d,0x57,0x73,0x20,0x00,0x01,
1708 0x01 }}
1709};
1710
1711static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2[]=
1712{
1713 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1714 0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
1715 0x00 }},
1716 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1717 0xe6,0x8b,0x5d,0x73,0x00,0x00,0x06,
1718 0x00 }},
1719 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1720 0xff,0x84,0x8f,0x73,0x00,0x00,0x06,
1721 0x00 }},
1722 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0x3e,
1723 0xe6,0x8b,0x5d,0x73,0x00,0x00,0x06,
1724 0x00 }},
1725 {{0x7f,0x4f,0x83,0x62,0x12,0x72,0xba,
1726 0x27,0x8c,0xdf,0x73,0x00,0x00,0x06,
1727 0x00 }},
1728 {{0x7f,0x63,0x83,0x69,0x19,0x72,0xf0,
1729 0x58,0x8d,0x57,0x73,0x20,0x00,0x06,
1730 0x01 }}
1731};
1732
1733static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT1800x600_2_H[] =
1734{
1735 {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
1736 0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
1737 0x00 }},
1738 {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
1739 0xd6,0x8b,0x5d,0x73,0x00,0x00,0x01,
1740 0x00 }},
1741 {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
1742 0xff,0x84,0x8f,0x73,0x00,0x00,0x01,
1743 0x00 }},
1744 {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0x3e,
1745 0xd6,0x8b,0x5d,0x73,0x00,0x00,0x01,
1746 0x00 }},
1747 {{0x57,0x27,0x9b,0x3a,0x0a,0x72,0xba,
1748 0x27,0x8c,0xdf,0x73,0x00,0x00,0x01,
1749 0x00 }},
1750 {{0x4d,0x31,0x91,0x3a,0x0a,0x72,0xf0,
1751 0x63,0x88,0x57,0x73,0x00,0x00,0x01,
1752 0x01 }}
1753};
1754
1755static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1[] =
1756{
1757 {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
1758 0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
1759 0x00}},
1760 {{0x73,0x4f,0x97,0x53,0x84,0x82,0x1f,
1761 0x60,0x87,0x5d,0x83,0x10,0x00,0x05,
1762 0x00}},
1763 {{0x73,0x4f,0x97,0x53,0x84,0xb4,0x1f,
1764 0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
1765 0x00}},
1766 {{0x73,0x4f,0x97,0x53,0x84,0x82,0x1f,
1767 0x60,0x87,0x5d,0x83,0x10,0x00,0x05,
1768 0x00}},
1769 {{0x73,0x4f,0x97,0x53,0x84,0x04,0x3e,
1770 0xE2,0x89,0xDf,0x05,0x00,0x00,0x05,
1771 0x00}},
1772 {{0x87,0x63,0x8B,0x67,0x18,0x7c,0xf0,
1773 0x5A,0x81,0x57,0x7D,0x00,0x00,0x06,
1774 0x01}},
1775 {{0xA3,0x7f,0x87,0x83,0x94,0x24,0xf5,
1776 0x02,0x89,0xFf,0x25,0x10,0x00,0x02,
1777 0x01}}
1778};
1779
1780static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_1_H[] =
1781{
1782 {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
1783 0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
1784 0x00 }},
1785 {{0x4b,0x27,0x8f,0x2b,0x1c,0x82,0x1f,
1786 0x60,0x87,0x5D,0x83,0x01,0x00,0x05,
1787 0x00}},
1788 {{0x4b,0x27,0x8f,0x2b,0x1c,0xb4,0x1f,
1789 0x92,0x89,0x8f,0xb5,0x30,0x00,0x05,
1790 0x00}},
1791 {{0x4b,0x27,0x8f,0x2b,0x1c,0x82,0x1f,
1792 0x60,0x87,0x5D,0x83,0x01,0x00,0x05,
1793 0x00}},
1794 {{0x4b,0x27,0x8f,0x2b,0x1c,0x04,0x3e,
1795 0xE2,0x89,0xDf,0x05,0x00,0x00,0x05,
1796 0x00}},
1797 {{0x55,0x31,0x99,0x35,0x06,0x7c,0xf0,
1798 0x5A,0x81,0x57,0x7D,0x00,0x00,0x01,
1799 0x01}},
1800 {{0x63,0x3F,0x87,0x43,0x94,0x24,0xf5,
1801 0x02,0x89,0xFf,0x25,0x10,0x00,0x01,
1802 0x01 }}
1803};
1804
1805static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2[] =
1806{
1807 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1808 0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
1809 0x00 }},
1810 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1811 0x3e,0x85,0x5d,0x25,0x10,0x00,0x06,
1812 0x00 }},
1813 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1814 0x57,0x8e,0x8f,0x25,0x30,0x00,0x06,
1815 0x00 }},
1816 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1817 0x3e,0x85,0x5d,0x25,0x10,0x00,0x06,
1818 0x01 }},
1819 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1820 0x7f,0x86,0xdf,0x25,0x10,0x00,0x06,
1821 0x00 }},
1822 {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
1823 0xbb,0x82,0x57,0x25,0x10,0x00,0x02,
1824 0x01 }},
1825 {{0xa3,0x7f,0x87,0x83,0x94,0x24,0xf5,
1826 0x02,0x89,0xff,0x25,0x10,0x00,0x02,
1827 0x01 }}
1828};
1829
1830static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11024x768_2_H[] =
1831{
1832 {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
1833 0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
1834 0x00 }},
1835 {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
1836 0x3e,0x85,0x5d,0x25,0x10,0x00,0x01,
1837 0x00 }},
1838 {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
1839 0x57,0x8e,0x8f,0x25,0x30,0x00,0x01,
1840 0x00 }},
1841 {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
1842 0x3e,0x85,0x5d,0x25,0x10,0x00,0x01,
1843 0x00 }},
1844 {{0x7b,0x27,0x9f,0x46,0x97,0x24,0xbb,
1845 0x7f,0x86,0xdf,0x25,0x10,0x00,0x01,
1846 0x00 }},
1847 {{0x71,0x31,0x95,0x46,0x97,0x24,0xf1,
1848 0xbb,0x82,0x57,0x25,0x10,0x00,0x01,
1849 0x01 }},
1850 {{0x63,0x3f,0x87,0x46,0x97,0x24,0xf5,
1851 0x0f,0x86,0xff,0x25,0x30,0x00,0x01,
1852 0x01 }}
1853};
1854
1855static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1[] =
1856{
1857 {{0x7e,0x4f,0x82,0x58,0x04,0xb8,0x1f,
1858 0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
1859 0x00}},
1860 {{0x7e,0x4f,0x82,0x58,0x04,0x86,0x1f,
1861 0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
1862 0x00}},
1863 {{0x7e,0x4f,0x82,0x58,0x04,0xb8,0x1f,
1864 0x90,0x84,0x8f,0xb9,0x30,0x00,0x06,
1865 0x00}},
1866 {{0x7e,0x4f,0x82,0x58,0x04,0x86,0x1f,
1867 0x5e,0x82,0x5d,0x87,0x10,0x00,0x06,
1868 0x00}},
1869 {{0x7e,0x4f,0x82,0x58,0x04,0x08,0x3e,
1870 0xe0,0x84,0xdf,0x09,0x00,0x00,0x06,
1871 0x00}},
1872 {{0x92,0x63,0x96,0x6c,0x18,0x80,0xf0,
1873 0x58,0x8c,0x57,0x81,0x20,0x00,0x06,
1874 0x01}},
1875 {{0xae,0x7f,0x92,0x88,0x94,0x28,0xf5,
1876 0x00,0x84,0xff,0x29,0x10,0x00,0x02,
1877 0x01}},
1878 {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
1879 0x00,0x84,0xff,0x29,0x09,0x00,0x07,
1880 0x01}}
1881};
1882
1883static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_1_H[] =
1884{
1885 {{0x56,0x27,0x9a,0x31,0x1c,0xb8,0x1f,
1886 0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
1887 0x00}},
1888 {{0x56,0x27,0x9a,0x31,0x1c,0x86,0x1f,
1889 0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
1890 0x00}},
1891 {{0x56,0x27,0x9a,0x31,0x1c,0xb8,0x1f,
1892 0x90,0x84,0x8f,0xb9,0x30,0x00,0x05,
1893 0x00}},
1894 {{0x56,0x27,0x9a,0x31,0x1c,0x86,0x1f,
1895 0x5e,0x82,0x5d,0x87,0x10,0x00,0x05,
1896 0x01}},
1897 {{0x56,0x27,0x9a,0x31,0x1c,0x08,0x3e,
1898 0xe0,0x84,0xdf,0x09,0x00,0x00,0x05,
1899 0x00}},
1900 {{0x60,0x31,0x84,0x3a,0x86,0x80,0xf0,
1901 0x58,0x8c,0x57,0x81,0x20,0x00,0x01,
1902 0x01}},
1903 {{0x6e,0x3f,0x92,0x48,0x94,0x28,0xf5,
1904 0x00,0x84,0xff,0x29,0x10,0x00,0x01,
1905 0x01}}
1906};
1907
1908static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2[] =
1909{
1910 {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
1911 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x02,
1912 0x01}},
1913 {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
1914 0xaf,0x83,0x44,0x43,0x21,0x00,0x02,
1915 0x01}},
1916 {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
1917 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x02,
1918 0x01}},
1919 {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
1920 0xaf,0x83,0x44,0x43,0x21,0x00,0x02,
1921 0x01}},
1922 {{0xce,0x72,0x91,0x81,0x8f,0x28,0x92,
1923 0xf0,0x84,0x85,0x84,0x11,0x00,0x02,
1924 0x01}},
1925 {{0xce,0x63,0x92,0x8b,0x19,0x28,0xd4,
1926 0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
1927 0x01}},
1928 {{0xce,0x7f,0x92,0x99,0x07,0x28,0xd4,
1929 0x93,0x87,0xff,0x29,0x21,0x00,0x07,
1930 0x01}},
1931 {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
1932 0x00,0x84,0xff,0x29,0x09,0x00,0x07,
1933 0x01}}
1934};
1935
1936static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11280x1024_2_H[] =
1937{
1938 {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
1939 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x06,
1940 0x01}},
1941 {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
1942 0xaf,0x83,0x44,0x43,0x21,0x00,0x06,
1943 0x01}},
1944 {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
1945 0xc8,0x8c,0x5d,0x5c,0x01,0x00,0x06,
1946 0x01}},
1947 {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
1948 0xfa,0x83,0x44,0x43,0x31,0x00,0x06,
1949 0x01}},
1950 {{0xa6,0x4a,0x89,0x59,0x07,0x28,0x92,
1951 0xf0,0x84,0x85,0x84,0x11,0x00,0x06,
1952 0x01}},
1953 {{0x9c,0x31,0x80,0x59,0x87,0x28,0xd4,
1954 0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
1955 0x01}},
1956 {{0x8e,0x3f,0x92,0x59,0x07,0x28,0xd4,
1957 0x93,0x87,0xff,0x29,0x21,0x00,0x06,
1958 0x01}}
1959};
1960
1961static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_1[] =
1962{
1963 {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
1964 0x8f,0x81,0x8f,0x9f,0x30,0x00,0x05,
1965 0x00}},
1966 {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
1967 0x5e,0x81,0x5d,0x6d,0x10,0x00,0x05,
1968 0x00}},
1969 {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
1970 0x90,0x83,0x8f,0x9f,0x30,0x00,0x05,
1971 0x00}},
1972 {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
1973 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
1974 0x00}},
1975 {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f,
1976 0xdf,0x82,0xdf,0xef,0x10,0x00,0x05,
1977 0x00}},
1978 {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0,
1979 0x57,0x8e,0x57,0x67,0x20,0x00,0x06,
1980 0x01}},
1981 {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf1,
1982 0xff,0x86,0xff,0x0f,0x10,0x00,0x02,
1983 0x01,}},
1984 {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0xde,
1985 0xff,0x86,0xff,0x0f,0x01,0x00,0x07,
1986 0x01}},
1987 {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
1988 0x19,0x80,0x19,0x29,0x0f,0x00,0x03,
1989 0x00}}
1990#if 0
1991 {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
1992 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
1993 0x00}},
1994 {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
1995 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
1996 0x00}},
1997 {{0x6f,0x4f,0x93,0x54,0x82,0x9e,0x1f,
1998 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
1999 0x00}},
2000 {{0x6f,0x4f,0x93,0x54,0x82,0x6c,0x1f,
2001 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
2002 0x00}},
2003 {{0x6f,0x4f,0x93,0x54,0x82,0xee,0x1f,
2004 0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
2005 0x00}},
2006 {{0x83,0x63,0x87,0x68,0x16,0x66,0xf0,
2007 0x5a,0x8e,0x57,0x67,0x20,0x00,0x06,
2008 0x01}},
2009 {{0x9f,0x7f,0x83,0x84,0x92,0x0e,0xf5,
2010 0x02,0x86,0xff,0x0f,0x10,0x00,0x02,
2011 0x01}},
2012 {{0xbf,0x9f,0x83,0xa4,0x12,0x0e,0x5a,
2013 0x02,0x86,0xff,0x0f,0x09,0x00,0x07,
2014 0x01}},
2015 {{0xce,0xae,0x92,0xb3,0x01,0x28,0x10,
2016 0x1a,0x80,0x19,0x29,0x0f,0x00,0x03,
2017 0x00}}
2018#endif
2019};
2020
2021static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_1_H[] =
2022{
2023 {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
2024 0x8f,0x81,0x8f,0x9f,0x30,0x00,0x05,
2025 0x00}},
2026 {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
2027 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
2028 0x00}},
2029 {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
2030 0x90,0x83,0x8f,0x9f,0x30,0x00,0x05,
2031 0x00}},
2032 {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
2033 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
2034 0x00}},
2035 {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
2036 0xdf,0x86,0xdf,0xef,0x10,0x00,0x05,
2037 0x00}},
2038 {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
2039 0x57,0x8e,0x57,0x67,0x20,0x00,0x01,
2040 0x01}},
2041 {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf1,
2042 0xff,0x86,0xff,0x0f,0x10,0x00,0x01,
2043 0x01}},
2044 {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
2045 0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
2046 0x01}},
2047 {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
2048 0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
2049 0x00}}
2050#if 0
2051 {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f,
2052 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05,
2053 0x00}},
2054 {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
2055 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
2056 0x00}},
2057 {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
2058 0x92,0x86,0x8f,0x9f,0x30,0x00,0x05,
2059 0x00}},
2060 {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
2061 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
2062 0x00}},
2063 {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
2064 0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
2065 0x00}},
2066 {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0,
2067 0x5a,0x8e,0x57,0x67,0x20,0x00,0x01,
2068 0x01}},
2069 {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
2070 0x02,0x86,0xff,0x0f,0x10,0x00,0x01,
2071 0x01}},
2072 {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
2073 0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
2074 0x01}},
2075 {{0x76,0x56,0x9a,0x5b,0x89,0x28,0x10,
2076 0x1c,0x80,0x19,0x29,0x0b,0x00,0x05,
2077 0x00}}
2078#endif
2079};
2080
2081static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_2[] =
2082{
2083 {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
2084 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x02,
2085 0x01}},
2086 {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
2087 0xbe,0x82,0x44,0x43,0x01,0x00,0x02,
2088 0x01}},
2089 {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
2090 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x02,
2091 0x01}},
2092 {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
2093 0xbe,0x82,0x44,0x43,0x01,0x00,0x02,
2094 0x01}},
2095 {{0xce,0x72,0x91,0x84,0x92,0x28,0x92,
2096 0xff,0x83,0x85,0x84,0x11,0x00,0x02,
2097 0x01}},
2098 {{0xce,0x63,0x92,0x8e,0x1c,0x28,0xd4,
2099 0x3f,0x83,0x57,0x29,0x01,0x00,0x03,
2100 0x01}},
2101 {{0xce,0x7f,0x92,0x9c,0x0a,0x28,0xd4,
2102 0x93,0x87,0xff,0x29,0x21,0x00,0x07,
2103 0x01}},
2104 {{0xce,0x9f,0x92,0xac,0x1a,0x28,0x5a,
2105 0x13,0x87,0xff,0x29,0x29,0x00,0x07,
2106 0x01}},
2107 {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
2108 0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
2109 0x00}}
2110#if 0
2111 {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
2112 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
2113 0x00}},
2114 {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
2115 0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
2116 0x01}},
2117 {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
2118 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x03,
2119 0x00}},
2120 {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9a,
2121 0xc2,0x86,0x5d,0x29,0x01,0x00,0x03,
2122 0x00}},
2123 {{0xce,0x4f,0x92,0x8c,0x1a,0x28,0x9e,
2124 0x03,0x87,0xdf,0x29,0x01,0x00,0x03,
2125 0x00}},
2126 {{0xce,0x63,0x92,0x96,0x04,0x28,0xd4,
2127 0x3f,0x83,0x57,0x29,0x01,0x00,0x07,
2128 0x01}},
2129 {{0xce,0x7f,0x92,0xa4,0x12,0x28,0xd4,
2130 0x93,0x87,0xff,0x29,0x21,0x00,0x07,
2131 0x01}},
2132 {{0xce,0x9f,0x92,0xb4,0x02,0x28,0x5a,
2133 0x13,0x87,0xff,0x29,0x29,0x00,0x03,
2134 0x01}},
2135 {{0xce,0xae,0x92,0xbc,0x0a,0x28,0x10,
2136 0x20,0x84,0x19,0x29,0x0f,0x00,0x03,
2137 0x00}}
2138#endif
2139};
2140
2141static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11400x1050_2_H[] =
2142{
2143 {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
2144 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x06,
2145 0x01}},
2146 {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
2147 0xbe,0x82,0x44,0x43,0x01,0x00,0x06,
2148 0x01}},
2149 {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
2150 0xd7,0x8b,0x5d,0x5c,0x21,0x00,0x06,
2151 0x01}},
2152 {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
2153 0xbe,0x82,0x44,0x43,0x01,0x00,0x06,
2154 0x01}},
2155 {{0xa6,0x4a,0x89,0x5c,0x0a,0x28,0x92,
2156 0xff,0x83,0x85,0x84,0x11,0x00,0x06,
2157 0x01}},
2158 {{0x9c,0x31,0x80,0x5c,0x8a,0x28,0xd4,
2159 0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
2160 0x01}},
2161 {{0x8e,0x3f,0x92,0x5c,0x0a,0x28,0xd4,
2162 0x93,0x87,0xff,0x29,0x21,0x00,0x06,
2163 0x01}},
2164 {{0x7e,0x4f,0x82,0x5c,0x0a,0x28,0x5a,
2165 0x13,0x87,0xff,0x29,0x29,0x00,0x06,
2166 0x01}},
2167 {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
2168 0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
2169 0x00}}
2170#if 0
2171 {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
2172 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
2173 0x00}},
2174 {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
2175 0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
2176 0x00}},
2177 {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
2178 0xdb,0x8f,0x8f,0x29,0x21,0x00,0x06,
2179 0x00}},
2180 {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9a,
2181 0xc2,0x86,0x5d,0x29,0x01,0x00,0x06,
2182 0x00}},
2183 {{0xa6,0x27,0x8a,0x64,0x92,0x28,0x9e,
2184 0x03,0x87,0xdf,0x29,0x01,0x00,0x06,
2185 0x00}},
2186 {{0x9c,0x31,0x80,0x64,0x92,0x28,0xd4,
2187 0x3f,0x83,0x57,0x29,0x01,0x00,0x06,
2188 0x01}},
2189 {{0x8e,0x3f,0x92,0x64,0x12,0x28,0xd4,
2190 0x93,0x87,0xff,0x29,0x21,0x00,0x06,
2191 0x01}},
2192 {{0x7e,0x4f,0x82,0x64,0x12,0x28,0x5a,
2193 0x13,0x87,0xff,0x29,0x29,0x00,0x06,
2194 0x01}},
2195 {{0x76,0x56,0x9a,0x64,0x92,0x28,0x10,
2196 0x20,0x84,0x19,0x29,0x0f,0x00,0x05,
2197 0x00}}
2198#endif
2199};
2200
2201static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_1[] =
2202{
2203 {{0x83,0x4F,0x87,0x5B,0x13,0x06,0x3E,
2204 0xB3,0x86,0x8F,0x07,0x20,0x00,0x06,
2205 0x00}},
2206 {{0x83,0x4F,0x87,0x5B,0x13,0xD4,0x1F,
2207 0x81,0x84,0x5D,0xD5,0x10,0x00,0x06,
2208 0x00}},
2209 {{0x83,0x4F,0x87,0x5B,0x13,0x06,0x3E,
2210 0xB3,0x86,0x8F,0x07,0x20,0x00,0x06,
2211 0x00}},
2212 {{0x83,0x4F,0x87,0x5B,0x13,0xD4,0x1F,
2213 0x81,0x84,0x5D,0xD5,0x10,0x00,0x06,
2214 0x00}},
2215 {{0x83,0x4F,0x87,0x5B,0x13,0x56,0xBA,
2216 0x03,0x86,0xDF,0x57,0x00,0x00,0x06,
2217 0x00}},
2218 {{0x97,0x63,0x9B,0x6F,0x07,0xCE,0xF0,
2219 0x7B,0x8E,0x57,0xCF,0x20,0x00,0x02,
2220 0x01}},
2221 {{0xB3,0x7F,0x97,0x8B,0x83,0x76,0xF5,
2222 0x23,0x86,0xFF,0x77,0x10,0x00,0x06,
2223 0x01}},
2224 {{0xD3,0x9F,0x97,0xAB,0x03,0x76,0x5A,
2225 0x23,0x86,0xFF,0x77,0x09,0x00,0x03,
2226 0x01}},
2227 {{0xE2,0xAE,0x86,0xBA,0x92,0x90,0x10,
2228 0x3D,0x80,0x19,0x91,0x0F,0x00,0x03,
2229 0x00}},
2230 {{0xFB,0xC7,0x9F,0xD3,0x8B,0x26,0x11,
2231 0xD3,0x86,0xAF,0x27,0x3F,0x00,0x07,
2232 0x00}}
2233#if 0
2234 {{0x83,0x4f,0x87,0x51,0x09,0xc0,0x1f,
2235 0x90,0x84,0x8f,0xc1,0x30,0x00,0x06,
2236 0x00}},
2237 {{0x83,0x4f,0x87,0x51,0x09,0x8e,0x1f,
2238 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x06,
2239 0x00}},
2240 {{0x83,0x4f,0x87,0x51,0x09,0xc0,0x1f,
2241 0x90,0x84,0x8f,0xc1,0x30,0x00,0x06,
2242 0x00}},
2243 {{0x83,0x4f,0x87,0x51,0x09,0x8e,0x1f,
2244 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x06,
2245 0x00}},
2246 {{0x83,0x4f,0x87,0x51,0x09,0x10,0x3e,
2247 0xe0,0x84,0xdf,0x11,0x00,0x00,0x06,
2248 0x00}},
2249 {{0x97,0x63,0x9b,0x65,0x1d,0x88,0xf0,
2250 0x58,0x8c,0x57,0x89,0x20,0x00,0x06,
2251 0x01}},
2252 {{0xb3,0x7f,0x97,0x81,0x99,0x30,0xf5,
2253 0x00,0x84,0xff,0x31,0x10,0x00,0x02,
2254 0x01}},
2255 {{0xd3,0x9f,0x97,0xa1,0x19,0x30,0x5a,
2256 0x00,0x84,0xff,0x31,0x09,0x00,0x07,
2257 0x01}},
2258 {{0xe2,0xae,0x86,0xb0,0x88,0x4a,0x10,
2259 0x1a,0x8e,0x19,0x4b,0x2f,0x00,0x03,
2260 0x00}},
2261 {{0xfb,0xc7,0x9f,0xc9,0x81,0xe0,0x10,
2262 0xb0,0x84,0xaf,0xe1,0x2f,0x00,0x07,
2263 0x00}}
2264#endif
2265};
2266
2267static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_1_H[] =
2268{
2269 {{0x5B,0x27,0x9F,0x33,0x0B,0x06,0x2E,
2270 0xB3,0x86,0x8F,0x07,0x20,0x00,0x01,
2271 0x00}},
2272 {{0x5B,0x27,0x9F,0x29,0x01,0x8E,0x1F,
2273 0x81,0x84,0x5D,0xD5,0x10,0x00,0x06,
2274 0x00}},
2275 {{0x5B,0x27,0x9F,0x33,0x0B,0x06,0x2E,
2276 0xB3,0x86,0x8F,0x07,0x20,0x00,0x01,
2277 0x00}},
2278 {{0x83,0x4F,0x87,0x5B,0x13,0xD4,0x1F,
2279 0x81,0x84,0x5D,0xD5,0x10,0x00,0x06,
2280 0x00}},
2281 {{0x5B,0x27,0x9F,0x33,0x0B,0x56,0xBA,
2282 0x03,0x86,0xDF,0x57,0x00,0x00,0x01,
2283 0x00}},
2284 {{0x65,0x31,0x89,0x3D,0x95,0xCE,0xF0,
2285 0x7B,0x8E,0x57,0xCF,0x20,0x00,0x01,
2286 0x01}},
2287 {{0x73,0x3F,0x97,0x4B,0x83,0x76,0xF5,
2288 0x23,0x86,0xFF,0x77,0x10,0x00,0x05,
2289 0x01}},
2290 {{0xD3,0x9F,0x97,0xAB,0x03,0x76,0x5A,
2291 0x23,0x86,0xFF,0x77,0x09,0x00,0x03,
2292 0x01}},
2293 {{0xE2,0xAE,0x86,0xBA,0x92,0x90,0x10,
2294 0x3D,0x80,0x19,0x91,0x0F,0x00,0x03,
2295 0x00}},
2296 {{0x97,0x63,0x9B,0x6F,0x07,0xE0,0x10,
2297 0xB0,0x84,0xAF,0xE1,0x2F,0x00,0x06,
2298 0x00}}
2299#if 0
2300 {{0x5b,0x27,0x9f,0x29,0x01,0xc0,0x1f,
2301 0x90,0x84,0x8f,0xc1,0x30,0x00,0x01,
2302 0x00}},
2303 {{0x5b,0x27,0x9f,0x29,0x01,0x8e,0x1f,
2304 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x01,
2305 0x00}},
2306 {{0x5b,0x27,0x9f,0x29,0x01,0xc0,0x1f,
2307 0x90,0x84,0x8f,0xc1,0x30,0x00,0x01,
2308 0x00}},
2309 {{0x5b,0x27,0x9f,0x29,0x01,0x8e,0x1f,
2310 0x5e,0x82,0x5d,0x8f,0x10,0x00,0x01,
2311 0x00}},
2312 {{0x5b,0x27,0x9f,0x29,0x01,0x10,0x3e,
2313 0xe0,0x84,0xdf,0x11,0x00,0x00,0x01,
2314 0x00}},
2315 {{0x65,0x31,0x89,0x33,0x8b,0x88,0xf0,
2316 0x58,0x8c,0x57,0x89,0x20,0x00,0x01,
2317 0x01}},
2318 {{0x73,0x3f,0x97,0x41,0x99,0x30,0xf5,
2319 0x00,0x84,0xff,0x31,0x10,0x00,0x01,
2320 0x01}},
2321 {{0x83,0x4f,0x87,0x51,0x09,0x30,0x5a,
2322 0x00,0x84,0xff,0x31,0x09,0x00,0x06,
2323 0x01}},
2324 {{0x8a,0x56,0x8e,0x58,0x10,0x4a,0x10,
2325 0x1a,0x8e,0x19,0x4b,0x2f,0x00,0x06,
2326 0x00}},
2327 {{0x97,0x63,0x9b,0x65,0x1d,0xe0,0x10,
2328 0xb0,0x84,0xaf,0xe1,0x2f,0x00,0x06,
2329 0x00}}
2330#endif
2331};
2332
2333static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_2[] =
2334{
2335 {{0xFB,0x87,0x86,0x97,0x0F,0x26,0x97,
2336 0x43,0x86,0xDB,0xDA,0x11,0x00,0x07,
2337 0x01}},
2338 {{0xFB,0x87,0x86,0x97,0x0F,0x26,0x97,
2339 0x2A,0x8D,0xC2,0xC1,0x11,0x00,0x07,
2340 0x01}},
2341 {{0xFB,0x87,0x86,0x97,0x0F,0x26,0x97,
2342 0x43,0x86,0xDB,0xDA,0x11,0x00,0x07,
2343 0x01}},
2344 {{0xFB,0x87,0x86,0x97,0x0F,0x26,0x97,
2345 0x2A,0x8D,0xC2,0xC1,0x11,0x00,0x07,
2346 0x01}},
2347 {{0xFB,0x87,0x86,0x97,0x0F,0x26,0x9F,
2348 0x6B,0x8E,0x03,0x02,0x01,0x00,0x07,
2349 0x01}},
2350 {{0xFB,0x63,0x9F,0xA1,0x99,0x26,0xD5,
2351 0xA7,0x8A,0xBF,0xBE,0x01,0x00,0x07,
2352 0x01}},
2353 {{0xFB,0x7F,0x9F,0xAF,0x87,0x26,0xDD,
2354 0xFB,0x8E,0x13,0x12,0x31,0x00,0x03,
2355 0x01}},
2356 {{0xFB,0x9F,0x9F,0xBF,0x97,0x26,0x5B,
2357 0x7B,0x8E,0xFF,0x27,0x39,0x00,0x03,
2358 0x01}},
2359 {{0xFB,0xAE,0x9F,0xC6,0x9E,0x26,0x11,
2360 0x88,0x8B,0x19,0x27,0x1F,0x00,0x03,
2361 0x00}},
2362 {{0xFB,0xC7,0x9F,0xD3,0x8B,0x26,0x11,
2363 0xD3,0x86,0xAF,0x27,0x3F,0x00,0x07,
2364 0x00}}
2365#if 0
2366 {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
2367 0x20,0x84,0xb9,0xb8,0x01,0x00,0x07,
2368 0x01}},
2369 {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
2370 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x07,
2371 0x01}},
2372 {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
2373 0x20,0x84,0xb9,0xb8,0x01,0x00,0x07,
2374 0x01}},
2375 {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
2376 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x07,
2377 0x01}},
2378 {{0xfb,0x88,0x87,0x90,0x08,0xe0,0x96,
2379 0x48,0x8c,0xe1,0xe0,0x11,0x00,0x07,
2380 0x01}},
2381 {{0xfb,0x63,0x9f,0x9a,0x92,0xe0,0xd4,
2382 0x9b,0x8f,0x9d,0x9c,0x21,0x00,0x07,
2383 0x01}},
2384 {{0xfb,0x7f,0x9f,0xa8,0x80,0xe0,0xd4,
2385 0xef,0x83,0xff,0xe1,0x21,0x00,0x03,
2386 0x01}},
2387 {{0xfb,0x9f,0x9f,0xb8,0x90,0xe0,0x5a,
2388 0x6f,0x83,0xff,0xe1,0x29,0x00,0x03,
2389 0x01}},
2390 {{0xfb,0xae,0x9f,0xbf,0x97,0xe0,0x10,
2391 0x7c,0x80,0x19,0xe1,0x0f,0x00,0x03,
2392 0x00}},
2393 {{0xfb,0xc7,0x9f,0xc9,0x84,0xe0,0x10,
2394 0xc7,0x8b,0xaf,0xe1,0x0f,0x00,0x07,
2395 0x00}}
2396#endif
2397};
2398
2399static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT11600x1200_2_H[] =
2400{
2401 {{0xD3,0x5F,0x9E,0x6F,0x07,0x26,0x97,
2402 0x43,0x86,0xDB,0xDA,0x11,0x00,0x02,
2403 0x01}},
2404 {{0xD3,0x27,0x97,0x6F,0x07,0x26,0x97,
2405 0x6B,0x8E,0x83,0x82,0x01,0x00,0x03,
2406 0x01}},
2407 {{0xD3,0x5F,0x9E,0x6F,0x07,0x26,0x97,
2408 0x43,0x86,0xDB,0xDA,0x11,0x00,0x02,
2409 0x01}},
2410 {{0xD3,0x27,0x97,0x6F,0x07,0x26,0x97,
2411 0x07,0x8B,0xA0,0x9F,0x01,0x00,0x02,
2412 0x01}},
2413 {{0xD3,0x27,0x97,0x6F,0x07,0x26,0x97,
2414 0x6B,0x8E,0x83,0x82,0x01,0x00,0x03,
2415 0x01}},
2416 {{0xC9,0x31,0x8D,0x6F,0x07,0x26,0xD5,
2417 0xA7,0x8A,0xBF,0xBE,0x01,0x00,0x03,
2418 0x01}},
2419 {{0xBB,0x3F,0x9F,0x6F,0x87,0x26,0xDD,
2420 0xFB,0x8E,0x13,0x12,0x31,0x00,0x02,
2421 0x01}},
2422 {{0xAB,0x4F,0x8F,0x68,0x80,0xE0,0x5A,
2423 0x6F,0x83,0xFF,0xE1,0x29,0x00,0x02,
2424 0x01}},
2425 {{0xA3,0x56,0x87,0x67,0x9F,0xE0,0x10,
2426 0x7C,0x80,0x19,0xE1,0x0F,0x00,0x06,
2427 0x00}},
2428 {{0x97,0x63,0x9B,0x68,0x00,0xE0,0x10,
2429 0xC7,0x8B,0xAF,0xE1,0x0F,0x00,0x02,
2430 0x00}}
2431#if 0
2432 {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
2433 0x20,0x84,0xb9,0xb8,0x01,0x00,0x02,
2434 0x01}},
2435 {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
2436 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x02,
2437 0x01}},
2438 {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
2439 0x20,0x84,0xb9,0xb8,0x01,0x00,0x02,
2440 0x01}},
2441 {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
2442 0x07,0x8b,0xa0,0x9f,0x01,0x00,0x02,
2443 0x01}},
2444 {{0xd3,0x60,0x9f,0x68,0x00,0xe0,0x96,
2445 0x48,0x8c,0xe1,0xe0,0x11,0x00,0x02,
2446 0x01}},
2447 {{0xc9,0x31,0x8d,0x68,0x00,0xe0,0xd4,
2448 0x9b,0x8f,0x9d,0x9c,0x21,0x00,0x03,
2449 0x01}},
2450 {{0xbb,0x3f,0x9f,0x68,0x80,0xe0,0xd4,
2451 0xef,0x83,0xff,0xe1,0x21,0x00,0x02,
2452 0x01}},
2453 {{0xab,0x4f,0x8f,0x68,0x80,0xe0,0x5a,
2454 0x6f,0x83,0xff,0xe1,0x29,0x00,0x02,
2455 0x01}},
2456 {{0xa3,0x56,0x87,0x67,0x9f,0xe0,0x10,
2457 0x7c,0x80,0x19,0xe1,0x0f,0x00,0x06,
2458 0x00}},
2459 {{0x97,0x63,0x9b,0x68,0x00,0xe0,0x10,
2460 0xc7,0x8b,0xaf,0xe1,0x0f,0x00,0x02,
2461 0x00}}
2462#endif
2463};
2464
2465static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT1XXXxXXX_1[] =
2466{
2467 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
2468 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
2469 0x00}},
2470 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
2471 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
2472 0x00}},
2473 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
2474 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
2475 0x00}},
2476 {{0x5f,0x4f,0x82,0x55,0x81,0xbf,0x1f,
2477 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x05,
2478 0x00}},
2479 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
2480 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x05,
2481 0x00}},
2482 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
2483 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
2484 0x01}},
2485 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
2486 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
2487 0x01}},
2488 {{0xce,0x9f,0x92,0xa8,0x14,0x28,0x5a,
2489 0x00,0x84,0xff,0x29,0x09,0x00,0x07,
2490 0x01}},
2491 {{0xce,0x9f,0x92,0xa9,0x17,0x24,0xf5,
2492 0x02,0x88,0xff,0x25,0x10,0x00,0x07,
2493 0x01}}
2494};
2495
2496static const SiS_LVDSCRT1DataStruct SiS310_LVDSCRT1XXXxXXX_1_H[] =
2497{
2498 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
2499 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
2500 0x00}},
2501 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
2502 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
2503 0x00}},
2504 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
2505 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
2506 0x00}},
2507 {{0x38,0x27,0x9c,0x2c,0x80,0xbf,0x1f,
2508 0x9c,0x8e,0x96,0xb9,0x30,0x00,0x00,
2509 0x00}},
2510 {{0x38,0x27,0x9c,0x2c,0x80,0x0b,0x3e,
2511 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
2512 0x00}},
2513 {{0x4d,0x31,0x91,0x3b,0x03,0x72,0xf0,
2514 0x58,0x8c,0x57,0x73,0x20,0x00,0x01,
2515 0x01}},
2516 {{0x63,0x3f,0x87,0x4a,0x92,0x24,0xf5,
2517 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
2518 0x01}}
2519};
2520
2521
2522/* CRT1 CRTC for Chrontel TV slave modes */ 1108/* CRT1 CRTC for Chrontel TV slave modes */
2523 1109
2524static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1UNTSC[] = 1110static const struct SiS_LVDSCRT1Data SiS310_CHTVCRT1UNTSC[] =
2525{ 1111{
2526 {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e, 1112 {{0x64,0x4f,0x88,0x56,0x9f,0x56,0x3e,
2527 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01, 1113 0xe8,0x84,0x8f,0x57,0x20,0x00,0x01,
2528 0x00 }}, 1114 0x00 }},
@@ -2546,7 +1132,7 @@ static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1UNTSC[] =
2546 0x01}} 1132 0x01}}
2547}; 1133};
2548 1134
2549static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1ONTSC[] = 1135static const struct SiS_LVDSCRT1Data SiS310_CHTVCRT1ONTSC[] =
2550{ 1136{
2551 {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e, 1137 {{0x63,0x4f,0x87,0x5a,0x9f,0x0b,0x3e,
2552 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01, 1138 0xc0,0x84,0x8f,0x0c,0x20,0x00,0x01,
@@ -2571,8 +1157,8 @@ static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1ONTSC[] =
2571 0x01 }} 1157 0x01 }}
2572}; 1158};
2573 1159
2574static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1UPAL[] = 1160static const struct SiS_LVDSCRT1Data SiS310_CHTVCRT1UPAL[] =
2575{ 1161{
2576 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 1162 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
2577 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05, 1163 0xf8,0x83,0x8f,0x70,0x20,0x00,0x05,
2578 0x00 }}, 1164 0x00 }},
@@ -2596,7 +1182,7 @@ static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1UPAL[] =
2596 0x01}} 1182 0x01}}
2597}; 1183};
2598 1184
2599static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1OPAL[] = 1185static const struct SiS_LVDSCRT1Data SiS310_CHTVCRT1OPAL[] =
2600{ 1186{
2601 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e, 1187 {{0x79,0x4f,0x9d,0x5a,0x90,0x6f,0x3e,
2602 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05, 1188 0xf0,0x83,0x8f,0x70,0x20,0x00,0x05,
@@ -2621,8 +1207,7 @@ static const SiS_LVDSCRT1DataStruct SiS310_CHTVCRT1OPAL[] =
2621 0x01 }} 1207 0x01 }}
2622}; 1208};
2623 1209
2624 1210static const struct SiS_CHTVRegData SiS310_CHTVReg_UNTSC[] =
2625static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] =
2626{ 1211{
2627 {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1212 {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
2628 {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1213 {{0x4a,0x77,0xbb,0x94,0x84,0x48,0xfe,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -2642,7 +1227,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UNTSC[] =
2642 for PAL-M and PAL-N all above is corrected. 1227 for PAL-M and PAL-N all above is corrected.
2643 */ 1228 */
2644 1229
2645static const SiS_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] = 1230static const struct SiS_CHTVRegData SiS310_CHTVReg_ONTSC[] =
2646{ 1231{
2647 {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1232 {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
2648 {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1233 {{0x49,0x77,0xbb,0x7b,0x84,0x34,0x00,0x50,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -2653,7 +1238,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_ONTSC[] =
2653 {{0xed,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x9f,0xc1,0x0c,0x00}} 1238 {{0xed,0x77,0xbb,0x66,0x8c,0x21,0x02,0x5a,0x04,0x00,0x80,0x1f,0x9f,0xc1,0x0c,0x00}}
2654}; 1239};
2655 1240
2656static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] = 1241static const struct SiS_CHTVRegData SiS310_CHTVReg_UPAL[] =
2657{ 1242{
2658 {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1243 {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
2659 {{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1244 {{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -2664,7 +1249,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UPAL[] =
2664 {{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x20,0x3e,0xe4,0x22,0x00}} 1249 {{0xe5,0x7f,0xb7,0x1d,0xa7,0x3e,0x04,0x5a,0x05,0x00,0x80,0x20,0x3e,0xe4,0x22,0x00}}
2665}; 1250};
2666 1251
2667static const SiS_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] = 1252static const struct SiS_CHTVRegData SiS310_CHTVReg_OPAL[] =
2668{ 1253{
2669 {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1254 {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
2670 {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1255 {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x83,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -2675,7 +1260,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_OPAL[] =
2675 {{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}} 1260 {{0xe4,0x7f,0xb7,0x1e,0xaf,0x29,0x37,0x5a,0x05,0x00,0x80,0x25,0x8c,0xb2,0x2a,0x00}}
2676}; 1261};
2677 1262
2678static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UPALM[] = 1263static const struct SiS_CHTVRegData SiS310_CHTVReg_UPALM[] =
2679{ 1264{
2680 {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1265 {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
2681 {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1266 {{0x52,0x77,0xbb,0x94,0x84,0x48,0xfe,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -2691,7 +1276,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UPALM[] =
2691#endif 1276#endif
2692}; 1277};
2693 1278
2694static const SiS_CHTVRegDataStruct SiS310_CHTVReg_OPALM[] = 1279static const struct SiS_CHTVRegData SiS310_CHTVReg_OPALM[] =
2695{ 1280{
2696 {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1281 {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
2697 {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}}, 1282 {{0x51,0x77,0xbb,0x7b,0x84,0x34,0x00,0x83,0x04,0x00,0x80,0x00,0x00,0x00,0x00,0x01}},
@@ -2707,7 +1292,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_OPALM[] =
2707#endif 1292#endif
2708}; 1293};
2709 1294
2710static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UPALN[] = 1295static const struct SiS_CHTVRegData SiS310_CHTVReg_UPALN[] =
2711{ 1296{
2712 {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}}, 1297 {{0x41,0x7f,0xb7,0x34,0xad,0x50,0x34,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}},
2713 {{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}}, 1298 {{0x41,0x7f,0xb7,0x80,0x85,0x50,0x00,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}},
@@ -2723,7 +1308,7 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_UPALN[] =
2723#endif 1308#endif
2724}; 1309};
2725 1310
2726static const SiS_CHTVRegDataStruct SiS310_CHTVReg_OPALN[] = 1311static const struct SiS_CHTVRegData SiS310_CHTVReg_OPALN[] =
2727{ 1312{
2728 {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}}, 1313 {{0x41,0x7f,0xb7,0x36,0xad,0x50,0x34,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}},
2729 {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}}, 1314 {{0x41,0x7f,0xb7,0x86,0x85,0x50,0x00,0x6e,0x05,0x00,0x80,0x00,0x00,0x00,0x00,0x03}},
@@ -2739,16 +1324,16 @@ static const SiS_CHTVRegDataStruct SiS310_CHTVReg_OPALN[] =
2739#endif 1324#endif
2740}; 1325};
2741 1326
2742static const UCHAR SiS310_CHTVVCLKUNTSC[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53}; 1327static const unsigned char SiS310_CHTVVCLKUNTSC[] = { 0x41,0x41,0x41,0x41,0x42,0x46,0x53 };
2743static const UCHAR SiS310_CHTVVCLKONTSC[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51}; 1328static const unsigned char SiS310_CHTVVCLKONTSC[] = { 0x48,0x48,0x48,0x48,0x45,0x43,0x51 };
2744 1329
2745static const UCHAR SiS310_CHTVVCLKUPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54}; 1330static const unsigned char SiS310_CHTVVCLKUPAL[] = { 0x47,0x47,0x47,0x47,0x48,0x4a,0x54 };
2746static const UCHAR SiS310_CHTVVCLKOPAL[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52}; 1331static const unsigned char SiS310_CHTVVCLKOPAL[] = { 0x47,0x47,0x47,0x47,0x48,0x4f,0x52 };
2747 1332
2748static const UCHAR SiS310_CHTVVCLKUPALM[] = {0x41,0x41,0x41,0x41,0x42,0x46,0x53}; 1333static const unsigned char SiS310_CHTVVCLKUPALM[] = { 0x41,0x41,0x41,0x41,0x42,0x46,0x53 };
2749static const UCHAR SiS310_CHTVVCLKOPALM[] = {0x48,0x48,0x48,0x48,0x45,0x43,0x51}; 1334static const unsigned char SiS310_CHTVVCLKOPALM[] = { 0x48,0x48,0x48,0x48,0x45,0x43,0x51 };
2750 1335
2751static const UCHAR SiS310_CHTVVCLKUPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4a,0x54}; 1336static const unsigned char SiS310_CHTVVCLKUPALN[] = { 0x47,0x47,0x47,0x47,0x48,0x4a,0x54 };
2752static const UCHAR SiS310_CHTVVCLKOPALN[] = {0x47,0x47,0x47,0x47,0x48,0x4f,0x52}; 1337static const unsigned char SiS310_CHTVVCLKOPALN[] = { 0x47,0x47,0x47,0x47,0x48,0x4f,0x52 };
2753 1338
2754 1339
diff --git a/drivers/video/sis/Makefile b/drivers/video/sis/Makefile
index aaed8c2b4a64..f7c0046e5b1d 100644
--- a/drivers/video/sis/Makefile
+++ b/drivers/video/sis/Makefile
@@ -4,4 +4,4 @@
4 4
5obj-$(CONFIG_FB_SIS) += sisfb.o 5obj-$(CONFIG_FB_SIS) += sisfb.o
6 6
7sisfb-objs := sis_main.o sis_accel.o init.o init301.o 7sisfb-objs := sis_main.o sis_accel.o init.o init301.o initextlfb.o
diff --git a/drivers/video/sis/init.c b/drivers/video/sis/init.c
index ecfd72178dbb..2ab3868efde3 100644
--- a/drivers/video/sis/init.c
+++ b/drivers/video/sis/init.c
@@ -2,11 +2,12 @@
2/* $XdotOrg$ */ 2/* $XdotOrg$ */
3/* 3/*
4 * Mode initializing code (CRT1 section) for 4 * Mode initializing code (CRT1 section) for
5 * for SiS 300/305/540/630/730 and 5 * for SiS 300/305/540/630/730,
6 * SiS 315/550/650/M650/651/661FX/M661FX/740/741(GX)/M741/330/660/M660/760/M760 6 * SiS 315/550/[M]650/651/[M]661[FGM]X/[M]74x[GX]/330/[M]76x[GX],
7 * (Universal module for Linux kernel framebuffer and XFree86 4.x) 7 * XGI Volari V3XT/V5/V8, Z7
8 * (Universal module for Linux kernel framebuffer and X.org/XFree86 4.x)
8 * 9 *
9 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 10 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
10 * 11 *
11 * If distributed as part of the Linux kernel, the following license terms 12 * If distributed as part of the Linux kernel, the following license terms
12 * apply: 13 * apply:
@@ -53,17 +54,12 @@
53 * 54 *
54 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc. 55 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
55 * Used by permission. 56 * Used by permission.
56 *
57 * TW says: This code looks awful, I know. But please don't do anything about
58 * this otherwise debugging will be hell.
59 * The code is extremely fragile as regards the different chipsets, different
60 * video bridges and combinations thereof. If anything is changed, extreme
61 * care has to be taken that that change doesn't break it for other chipsets,
62 * bridges or combinations thereof.
63 * All comments in this file are by me, regardless if they are marked TW or not.
64 *
65 */ 57 */
66 58
59#ifdef HAVE_CONFIG_H
60#include "config.h"
61#endif
62
67#include "init.h" 63#include "init.h"
68 64
69#ifdef SIS300 65#ifdef SIS300
@@ -84,24 +80,13 @@
84 80
85#if defined(SIS300) || defined(SIS315H) 81#if defined(SIS300) || defined(SIS315H)
86static void 82static void
87InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 83InitCommonPointer(struct SiS_Private *SiS_Pr)
88{ 84{
85 SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable;
89 SiS_Pr->SiS_StResInfo = SiS_StResInfo; 86 SiS_Pr->SiS_StResInfo = SiS_StResInfo;
90 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo; 87 SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
91 SiS_Pr->SiS_StandTable = SiS_StandTable; 88 SiS_Pr->SiS_StandTable = SiS_StandTable;
92 89
93 SiS_Pr->SiS_NTSCPhase = SiS_NTSCPhase;
94 SiS_Pr->SiS_PALPhase = SiS_PALPhase;
95 SiS_Pr->SiS_NTSCPhase2 = SiS_NTSCPhase2;
96 SiS_Pr->SiS_PALPhase2 = SiS_PALPhase2;
97 SiS_Pr->SiS_PALMPhase = SiS_PALMPhase;
98 SiS_Pr->SiS_PALNPhase = SiS_PALNPhase;
99 SiS_Pr->SiS_PALMPhase2 = SiS_PALMPhase2;
100 SiS_Pr->SiS_PALNPhase2 = SiS_PALNPhase2;
101 SiS_Pr->SiS_SpecialPhase = SiS_SpecialPhase;
102 SiS_Pr->SiS_SpecialPhaseM = SiS_SpecialPhaseM;
103 SiS_Pr->SiS_SpecialPhaseJ = SiS_SpecialPhaseJ;
104
105 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming; 90 SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
106 SiS_Pr->SiS_PALTiming = SiS_PALTiming; 91 SiS_Pr->SiS_PALTiming = SiS_PALTiming;
107 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing; 92 SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
@@ -137,6 +122,7 @@ InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
137 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data; 122 SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
138 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data; 123 SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
139 SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data; 124 SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
125 SiS_Pr->SiS_LCD1280x854Data = SiS_LCD1280x854Data;
140 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data; 126 SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
141 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data; 127 SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
142 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data; 128 SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
@@ -145,67 +131,30 @@ InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
145 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data; 131 SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
146 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData; 132 SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
147 133
148 SiS_Pr->SiS_LVDS320x480Data_1 = SiS_LVDS320x480Data_1; 134 SiS_Pr->SiS_LVDS320x240Data_1 = SiS_LVDS320x240Data_1;
135 SiS_Pr->SiS_LVDS320x240Data_2 = SiS_LVDS320x240Data_2;
136 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
149 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1; 137 SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
150 SiS_Pr->SiS_LVDS800x600Data_2 = SiS_LVDS800x600Data_2;
151 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
152 SiS_Pr->SiS_LVDS1024x768Data_2 = SiS_LVDS1024x768Data_2;
153 SiS_Pr->SiS_LVDS1280x1024Data_1 = SiS_LVDS1280x1024Data_1;
154 SiS_Pr->SiS_LVDS1280x1024Data_2 = SiS_LVDS1280x1024Data_2;
155 SiS_Pr->SiS_LVDS1400x1050Data_1 = SiS_LVDS1400x1050Data_1;
156 SiS_Pr->SiS_LVDS1400x1050Data_2 = SiS_LVDS1400x1050Data_2;
157 SiS_Pr->SiS_LVDS1600x1200Data_1 = SiS_LVDS1600x1200Data_1;
158 SiS_Pr->SiS_LVDS1600x1200Data_2 = SiS_LVDS1600x1200Data_2;
159 SiS_Pr->SiS_LVDS1280x768Data_1 = SiS_LVDS1280x768Data_1;
160 SiS_Pr->SiS_LVDS1280x768Data_2 = SiS_LVDS1280x768Data_2;
161 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1; 138 SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
162 SiS_Pr->SiS_LVDS1024x600Data_2 = SiS_LVDS1024x600Data_2; 139 SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
163 SiS_Pr->SiS_LVDS1152x768Data_1 = SiS_LVDS1152x768Data_1;
164 SiS_Pr->SiS_LVDS1152x768Data_2 = SiS_LVDS1152x768Data_2;
165 SiS_Pr->SiS_LVDSXXXxXXXData_1 = SiS_LVDSXXXxXXXData_1;
166 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x960Data_1;
167 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x960Data_2;
168 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
169 SiS_Pr->SiS_LVDS1280x960Data_1 = SiS_LVDS1280x1024Data_1;
170 SiS_Pr->SiS_LVDS1280x960Data_2 = SiS_LVDS1280x1024Data_2;
171 SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
172 SiS_Pr->SiS_LVDS640x480Data_2 = SiS_LVDS640x480Data_2;
173
174 SiS_Pr->SiS_LVDS848x480Data_1 = SiS_LVDS848x480Data_1;
175 SiS_Pr->SiS_LVDS848x480Data_2 = SiS_LVDS848x480Data_2;
176 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS_LVDSBARCO1024Data_1;
177 SiS_Pr->SiS_LVDSBARCO1024Data_2 = SiS_LVDSBARCO1024Data_2;
178 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS_LVDSBARCO1366Data_1;
179 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS_LVDSBARCO1366Data_2;
180 140
181 SiS_Pr->SiS_LVDSCRT11280x768_1 = SiS_LVDSCRT11280x768_1; 141 SiS_Pr->SiS_LVDSCRT1320x240_1 = SiS_LVDSCRT1320x240_1;
142 SiS_Pr->SiS_LVDSCRT1320x240_2 = SiS_LVDSCRT1320x240_2;
143 SiS_Pr->SiS_LVDSCRT1320x240_2_H = SiS_LVDSCRT1320x240_2_H;
144 SiS_Pr->SiS_LVDSCRT1320x240_3 = SiS_LVDSCRT1320x240_3;
145 SiS_Pr->SiS_LVDSCRT1320x240_3_H = SiS_LVDSCRT1320x240_3_H;
146 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
147 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
148#if 0
182 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1; 149 SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
183 SiS_Pr->SiS_LVDSCRT11152x768_1 = SiS_LVDSCRT11152x768_1;
184 SiS_Pr->SiS_LVDSCRT11280x768_1_H = SiS_LVDSCRT11280x768_1_H;
185 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H; 150 SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
186 SiS_Pr->SiS_LVDSCRT11152x768_1_H = SiS_LVDSCRT11152x768_1_H;
187 SiS_Pr->SiS_LVDSCRT11280x768_2 = SiS_LVDSCRT11280x768_2;
188 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2; 151 SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
189 SiS_Pr->SiS_LVDSCRT11152x768_2 = SiS_LVDSCRT11152x768_2;
190 SiS_Pr->SiS_LVDSCRT11280x768_2_H = SiS_LVDSCRT11280x768_2_H;
191 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H; 152 SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
192 SiS_Pr->SiS_LVDSCRT11152x768_2_H = SiS_LVDSCRT11152x768_2_H; 153#endif
193 SiS_Pr->SiS_LVDSCRT1320x480_1 = SiS_LVDSCRT1320x480_1;
194 SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
195 SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
196 SiS_Pr->SiS_LVDSCRT1640x480_2 = SiS_LVDSCRT1640x480_2;
197 SiS_Pr->SiS_LVDSCRT1640x480_2_H = SiS_LVDSCRT1640x480_2_H;
198 SiS_Pr->SiS_LVDSCRT1640x480_3 = SiS_LVDSCRT1640x480_3;
199 SiS_Pr->SiS_LVDSCRT1640x480_3_H = SiS_LVDSCRT1640x480_3_H;
200 154
201 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData; 155 SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
202 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData; 156 SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
203 157
204 SiS_Pr->SiS_CHTVUNTSCDesData = SiS_CHTVUNTSCDesData;
205 SiS_Pr->SiS_CHTVONTSCDesData = SiS_CHTVONTSCDesData;
206 SiS_Pr->SiS_CHTVUPALDesData = SiS_CHTVUPALDesData;
207 SiS_Pr->SiS_CHTVOPALDesData = SiS_CHTVOPALDesData;
208
209 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */ 158 SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
210 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */ 159 SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
211} 160}
@@ -213,50 +162,24 @@ InitCommonPointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
213 162
214#ifdef SIS300 163#ifdef SIS300
215static void 164static void
216InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 165InitTo300Pointer(struct SiS_Private *SiS_Pr)
217{ 166{
218 InitCommonPointer(SiS_Pr, HwInfo); 167 InitCommonPointer(SiS_Pr);
219 168
220 SiS_Pr->SiS_SModeIDTable = SiS300_SModeIDTable;
221 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable; 169 SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
222 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable; 170 SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
223 SiS_Pr->SiS_RefIndex = SiS300_RefIndex; 171 SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
224 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table; 172 SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
225 if(HwInfo->jChipType == SIS_300) { 173 if(SiS_Pr->ChipType == SIS_300) {
226 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */ 174 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
227 } else { 175 } else {
228 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */ 176 SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
229 } 177 }
230 SiS_Pr->SiS_VCLKData = SiS300_VCLKData; 178 SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
231 SiS_Pr->SiS_VBVCLKData = (SiS_VBVCLKDataStruct *)SiS300_VCLKData; 179 SiS_Pr->SiS_VBVCLKData = (struct SiS_VBVCLKData *)SiS300_VCLKData;
232 180
233 SiS_Pr->SiS_SR15 = SiS300_SR15; 181 SiS_Pr->SiS_SR15 = SiS300_SR15;
234 182
235#ifdef LINUX_KERNEL
236 SiS_Pr->pSiS_SR07 = &SiS300_SR07;
237 SiS_Pr->SiS_CR40 = SiS300_CR40;
238 SiS_Pr->SiS_CR49 = SiS300_CR49;
239 SiS_Pr->pSiS_SR1F = &SiS300_SR1F;
240 SiS_Pr->pSiS_SR21 = &SiS300_SR21;
241 SiS_Pr->pSiS_SR22 = &SiS300_SR22;
242 SiS_Pr->pSiS_SR23 = &SiS300_SR23;
243 SiS_Pr->pSiS_SR24 = &SiS300_SR24;
244 SiS_Pr->SiS_SR25 = SiS300_SR25;
245 SiS_Pr->pSiS_SR31 = &SiS300_SR31;
246 SiS_Pr->pSiS_SR32 = &SiS300_SR32;
247 SiS_Pr->pSiS_SR33 = &SiS300_SR33;
248 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS300_CRT2Data_1_2;
249 SiS_Pr->pSiS_CRT2Data_4_D = &SiS300_CRT2Data_4_D;
250 SiS_Pr->pSiS_CRT2Data_4_E = &SiS300_CRT2Data_4_E;
251 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS300_CRT2Data_4_10;
252 SiS_Pr->pSiS_RGBSenseData = &SiS300_RGBSenseData;
253 SiS_Pr->pSiS_VideoSenseData = &SiS300_VideoSenseData;
254 SiS_Pr->pSiS_YCSenseData = &SiS300_YCSenseData;
255 SiS_Pr->pSiS_RGBSenseData2 = &SiS300_RGBSenseData2;
256 SiS_Pr->pSiS_VideoSenseData2 = &SiS300_VideoSenseData2;
257 SiS_Pr->pSiS_YCSenseData2 = &SiS300_YCSenseData2;
258#endif
259
260 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl; 183 SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
261 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl; 184 SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
262 185
@@ -266,11 +189,8 @@ InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
266 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data; 189 SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
267 190
268 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1; 191 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
269 SiS_Pr->SiS_CRT2Part2_1280x1024_1 = SiS300_CRT2Part2_1280x1024_1;
270 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2; 192 SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
271 SiS_Pr->SiS_CRT2Part2_1280x1024_2 = SiS300_CRT2Part2_1280x1024_2;
272 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3; 193 SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
273 SiS_Pr->SiS_CRT2Part2_1280x1024_3 = SiS300_CRT2Part2_1280x1024_3;
274 194
275 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData; 195 SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
276 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData; 196 SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
@@ -280,64 +200,16 @@ InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
280 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */ 200 SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
281 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData; 201 SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
282 202
283 SiS_Pr->SiS_PanelType00_1 = SiS300_PanelType00_1; 203 SiS_Pr->SiS_LVDS848x480Data_1 = SiS300_LVDS848x480Data_1;
284 SiS_Pr->SiS_PanelType01_1 = SiS300_PanelType01_1; 204 SiS_Pr->SiS_LVDS848x480Data_2 = SiS300_LVDS848x480Data_2;
285 SiS_Pr->SiS_PanelType02_1 = SiS300_PanelType02_1; 205 SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS300_LVDSBARCO1024Data_1;
286 SiS_Pr->SiS_PanelType03_1 = SiS300_PanelType03_1; 206 SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS300_LVDSBARCO1366Data_1;
287 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1; 207 SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS300_LVDSBARCO1366Data_2;
288 SiS_Pr->SiS_PanelType05_1 = SiS300_PanelType05_1; 208
289 SiS_Pr->SiS_PanelType06_1 = SiS300_PanelType06_1; 209 SiS_Pr->SiS_PanelType04_1a = SiS300_PanelType04_1a;
290 SiS_Pr->SiS_PanelType07_1 = SiS300_PanelType07_1; 210 SiS_Pr->SiS_PanelType04_2a = SiS300_PanelType04_2a;
291 SiS_Pr->SiS_PanelType08_1 = SiS300_PanelType08_1; 211 SiS_Pr->SiS_PanelType04_1b = SiS300_PanelType04_1b;
292 SiS_Pr->SiS_PanelType09_1 = SiS300_PanelType09_1; 212 SiS_Pr->SiS_PanelType04_2b = SiS300_PanelType04_2b;
293 SiS_Pr->SiS_PanelType0a_1 = SiS300_PanelType0a_1;
294 SiS_Pr->SiS_PanelType0b_1 = SiS300_PanelType0b_1;
295 SiS_Pr->SiS_PanelType0c_1 = SiS300_PanelType0c_1;
296 SiS_Pr->SiS_PanelType0d_1 = SiS300_PanelType0d_1;
297 SiS_Pr->SiS_PanelType0e_1 = SiS300_PanelType0e_1;
298 SiS_Pr->SiS_PanelType0f_1 = SiS300_PanelType0f_1;
299 SiS_Pr->SiS_PanelType00_2 = SiS300_PanelType00_2;
300 SiS_Pr->SiS_PanelType01_2 = SiS300_PanelType01_2;
301 SiS_Pr->SiS_PanelType02_2 = SiS300_PanelType02_2;
302 SiS_Pr->SiS_PanelType03_2 = SiS300_PanelType03_2;
303 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2;
304 SiS_Pr->SiS_PanelType05_2 = SiS300_PanelType05_2;
305 SiS_Pr->SiS_PanelType06_2 = SiS300_PanelType06_2;
306 SiS_Pr->SiS_PanelType07_2 = SiS300_PanelType07_2;
307 SiS_Pr->SiS_PanelType08_2 = SiS300_PanelType08_2;
308 SiS_Pr->SiS_PanelType09_2 = SiS300_PanelType09_2;
309 SiS_Pr->SiS_PanelType0a_2 = SiS300_PanelType0a_2;
310 SiS_Pr->SiS_PanelType0b_2 = SiS300_PanelType0b_2;
311 SiS_Pr->SiS_PanelType0c_2 = SiS300_PanelType0c_2;
312 SiS_Pr->SiS_PanelType0d_2 = SiS300_PanelType0d_2;
313 SiS_Pr->SiS_PanelType0e_2 = SiS300_PanelType0e_2;
314 SiS_Pr->SiS_PanelType0f_2 = SiS300_PanelType0f_2;
315 SiS_Pr->SiS_PanelTypeNS_1 = SiS300_PanelTypeNS_1;
316 SiS_Pr->SiS_PanelTypeNS_2 = SiS300_PanelTypeNS_2;
317
318 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
319 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1a;
320 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2a;
321 }
322 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
323 SiS_Pr->SiS_PanelType04_1 = SiS300_PanelType04_1b;
324 SiS_Pr->SiS_PanelType04_2 = SiS300_PanelType04_2b;
325 }
326
327 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS300_LVDSCRT1800x600_1;
328 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS300_LVDSCRT1800x600_1_H;
329 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS300_LVDSCRT1800x600_2;
330 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS300_LVDSCRT1800x600_2_H;
331 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS300_LVDSCRT11024x768_1;
332 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS300_LVDSCRT11024x768_1_H;
333 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS300_LVDSCRT11024x768_2;
334 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS300_LVDSCRT11024x768_2_H;
335 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS300_LVDSCRT11280x1024_1;
336 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS300_LVDSCRT11280x1024_1_H;
337 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS300_LVDSCRT11280x1024_2;
338 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS300_LVDSCRT11280x1024_2_H;
339 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS300_LVDSCRT1XXXxXXX_1;
340 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS300_LVDSCRT1XXXxXXX_1_H;
341 213
342 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC; 214 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
343 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC; 215 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
@@ -367,64 +239,38 @@ InitTo300Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
367 239
368#ifdef SIS315H 240#ifdef SIS315H
369static void 241static void
370InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 242InitTo310Pointer(struct SiS_Private *SiS_Pr)
371{ 243{
372 InitCommonPointer(SiS_Pr, HwInfo); 244 InitCommonPointer(SiS_Pr);
373 245
374 SiS_Pr->SiS_SModeIDTable = SiS310_SModeIDTable;
375 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable; 246 SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
376 SiS_Pr->SiS_RefIndex = (SiS_Ext2Struct *)SiS310_RefIndex; 247 SiS_Pr->SiS_RefIndex = SiS310_RefIndex;
377 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table; 248 SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
378 if(HwInfo->jChipType >= SIS_340) { 249 if(SiS_Pr->ChipType >= SIS_340) {
379 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 */ 250 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 + XGI */
380 } else if(HwInfo->jChipType >= SIS_761) { 251 } else if(SiS_Pr->ChipType >= SIS_761) {
381 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */ 252 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
382 } else if(HwInfo->jChipType >= SIS_760) { 253 } else if(SiS_Pr->ChipType >= SIS_760) {
383 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */ 254 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
384 } else if(HwInfo->jChipType >= SIS_661) { 255 } else if(SiS_Pr->ChipType >= SIS_661) {
385 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */ 256 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
386 } else if(HwInfo->jChipType == SIS_330) { 257 } else if(SiS_Pr->ChipType == SIS_330) {
387 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */ 258 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
388 } else if(HwInfo->jChipType > SIS_315PRO) { 259 } else if(SiS_Pr->ChipType > SIS_315PRO) {
389 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */ 260 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
390 } else { 261 } else {
391 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */ 262 SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
392 } 263 }
393 if(HwInfo->jChipType >= SIS_340) { 264 if(SiS_Pr->ChipType >= SIS_340) {
394 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340; 265 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
395 } else { 266 } else {
396 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1; 267 SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
397 } 268 }
398 SiS_Pr->SiS_VCLKData = SiS310_VCLKData; 269 SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
399 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData; 270 SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
400 271
401 SiS_Pr->SiS_SR15 = SiS310_SR15; 272 SiS_Pr->SiS_SR15 = SiS310_SR15;
402 273
403#ifdef LINUX_KERNEL
404 SiS_Pr->pSiS_SR07 = &SiS310_SR07;
405 SiS_Pr->SiS_CR40 = SiS310_CR40;
406 SiS_Pr->SiS_CR49 = SiS310_CR49;
407 SiS_Pr->pSiS_SR1F = &SiS310_SR1F;
408 SiS_Pr->pSiS_SR21 = &SiS310_SR21;
409 SiS_Pr->pSiS_SR22 = &SiS310_SR22;
410 SiS_Pr->pSiS_SR23 = &SiS310_SR23;
411 SiS_Pr->pSiS_SR24 = &SiS310_SR24;
412 SiS_Pr->SiS_SR25 = SiS310_SR25;
413 SiS_Pr->pSiS_SR31 = &SiS310_SR31;
414 SiS_Pr->pSiS_SR32 = &SiS310_SR32;
415 SiS_Pr->pSiS_SR33 = &SiS310_SR33;
416 SiS_Pr->pSiS_CRT2Data_1_2 = &SiS310_CRT2Data_1_2;
417 SiS_Pr->pSiS_CRT2Data_4_D = &SiS310_CRT2Data_4_D;
418 SiS_Pr->pSiS_CRT2Data_4_E = &SiS310_CRT2Data_4_E;
419 SiS_Pr->pSiS_CRT2Data_4_10 = &SiS310_CRT2Data_4_10;
420 SiS_Pr->pSiS_RGBSenseData = &SiS310_RGBSenseData;
421 SiS_Pr->pSiS_VideoSenseData = &SiS310_VideoSenseData;
422 SiS_Pr->pSiS_YCSenseData = &SiS310_YCSenseData;
423 SiS_Pr->pSiS_RGBSenseData2 = &SiS310_RGBSenseData2;
424 SiS_Pr->pSiS_VideoSenseData2 = &SiS310_VideoSenseData2;
425 SiS_Pr->pSiS_YCSenseData2 = &SiS310_YCSenseData2;
426#endif
427
428 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl; 274 SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
429 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS; 275 SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
430 276
@@ -435,41 +281,6 @@ InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
435 281
436 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1; 282 SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
437 283
438 SiS_Pr->SiS_PanelType00_1 = SiS310_PanelType00_1;
439 SiS_Pr->SiS_PanelType01_1 = SiS310_PanelType01_1;
440 SiS_Pr->SiS_PanelType02_1 = SiS310_PanelType02_1;
441 SiS_Pr->SiS_PanelType03_1 = SiS310_PanelType03_1;
442 SiS_Pr->SiS_PanelType04_1 = SiS310_PanelType04_1;
443 SiS_Pr->SiS_PanelType05_1 = SiS310_PanelType05_1;
444 SiS_Pr->SiS_PanelType06_1 = SiS310_PanelType06_1;
445 SiS_Pr->SiS_PanelType07_1 = SiS310_PanelType07_1;
446 SiS_Pr->SiS_PanelType08_1 = SiS310_PanelType08_1;
447 SiS_Pr->SiS_PanelType09_1 = SiS310_PanelType09_1;
448 SiS_Pr->SiS_PanelType0a_1 = SiS310_PanelType0a_1;
449 SiS_Pr->SiS_PanelType0b_1 = SiS310_PanelType0b_1;
450 SiS_Pr->SiS_PanelType0c_1 = SiS310_PanelType0c_1;
451 SiS_Pr->SiS_PanelType0d_1 = SiS310_PanelType0d_1;
452 SiS_Pr->SiS_PanelType0e_1 = SiS310_PanelType0e_1;
453 SiS_Pr->SiS_PanelType0f_1 = SiS310_PanelType0f_1;
454 SiS_Pr->SiS_PanelType00_2 = SiS310_PanelType00_2;
455 SiS_Pr->SiS_PanelType01_2 = SiS310_PanelType01_2;
456 SiS_Pr->SiS_PanelType02_2 = SiS310_PanelType02_2;
457 SiS_Pr->SiS_PanelType03_2 = SiS310_PanelType03_2;
458 SiS_Pr->SiS_PanelType04_2 = SiS310_PanelType04_2;
459 SiS_Pr->SiS_PanelType05_2 = SiS310_PanelType05_2;
460 SiS_Pr->SiS_PanelType06_2 = SiS310_PanelType06_2;
461 SiS_Pr->SiS_PanelType07_2 = SiS310_PanelType07_2;
462 SiS_Pr->SiS_PanelType08_2 = SiS310_PanelType08_2;
463 SiS_Pr->SiS_PanelType09_2 = SiS310_PanelType09_2;
464 SiS_Pr->SiS_PanelType0a_2 = SiS310_PanelType0a_2;
465 SiS_Pr->SiS_PanelType0b_2 = SiS310_PanelType0b_2;
466 SiS_Pr->SiS_PanelType0c_2 = SiS310_PanelType0c_2;
467 SiS_Pr->SiS_PanelType0d_2 = SiS310_PanelType0d_2;
468 SiS_Pr->SiS_PanelType0e_2 = SiS310_PanelType0e_2;
469 SiS_Pr->SiS_PanelType0f_2 = SiS310_PanelType0f_2;
470 SiS_Pr->SiS_PanelTypeNS_1 = SiS310_PanelTypeNS_1;
471 SiS_Pr->SiS_PanelTypeNS_2 = SiS310_PanelTypeNS_2;
472
473 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData; 284 SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
474 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData; 285 SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
475 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData; 286 SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
@@ -478,33 +289,11 @@ InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
478 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData; 289 SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
479 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData; 290 SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
480 291
481 SiS_Pr->SiS_LVDSCRT1800x600_1 = SiS310_LVDSCRT1800x600_1; 292 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
482 SiS_Pr->SiS_LVDSCRT11024x768_1 = SiS310_LVDSCRT11024x768_1; 293 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
483 SiS_Pr->SiS_LVDSCRT11280x1024_1 = SiS310_LVDSCRT11280x1024_1; 294 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
484 SiS_Pr->SiS_LVDSCRT11400x1050_1 = SiS310_LVDSCRT11400x1050_1; 295 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
485 SiS_Pr->SiS_LVDSCRT11600x1200_1 = SiS310_LVDSCRT11600x1200_1; 296 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
486 SiS_Pr->SiS_LVDSCRT1800x600_1_H = SiS310_LVDSCRT1800x600_1_H;
487 SiS_Pr->SiS_LVDSCRT11024x768_1_H = SiS310_LVDSCRT11024x768_1_H;
488 SiS_Pr->SiS_LVDSCRT11280x1024_1_H = SiS310_LVDSCRT11280x1024_1_H;
489 SiS_Pr->SiS_LVDSCRT11400x1050_1_H = SiS310_LVDSCRT11400x1050_1_H;
490 SiS_Pr->SiS_LVDSCRT11600x1200_1_H = SiS310_LVDSCRT11600x1200_1_H;
491 SiS_Pr->SiS_LVDSCRT1800x600_2 = SiS310_LVDSCRT1800x600_2;
492 SiS_Pr->SiS_LVDSCRT11024x768_2 = SiS310_LVDSCRT11024x768_2;
493 SiS_Pr->SiS_LVDSCRT11280x1024_2 = SiS310_LVDSCRT11280x1024_2;
494 SiS_Pr->SiS_LVDSCRT11400x1050_2 = SiS310_LVDSCRT11400x1050_2;
495 SiS_Pr->SiS_LVDSCRT11600x1200_2 = SiS310_LVDSCRT11600x1200_2;
496 SiS_Pr->SiS_LVDSCRT1800x600_2_H = SiS310_LVDSCRT1800x600_2_H;
497 SiS_Pr->SiS_LVDSCRT11024x768_2_H = SiS310_LVDSCRT11024x768_2_H;
498 SiS_Pr->SiS_LVDSCRT11280x1024_2_H = SiS310_LVDSCRT11280x1024_2_H;
499 SiS_Pr->SiS_LVDSCRT11400x1050_2_H = SiS310_LVDSCRT11400x1050_2_H;
500 SiS_Pr->SiS_LVDSCRT11600x1200_2_H = SiS310_LVDSCRT11600x1200_2_H;
501 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1 = SiS310_LVDSCRT1XXXxXXX_1;
502 SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H = SiS310_LVDSCRT1XXXxXXX_1_H;
503 SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
504 SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
505 SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
506 SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
507 SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
508 297
509 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC; 298 SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
510 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC; 299 SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
@@ -528,208 +317,203 @@ InitTo310Pointer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
528} 317}
529#endif 318#endif
530 319
531static void 320BOOLEAN
532SiSInitPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 321SiSInitPtr(struct SiS_Private *SiS_Pr)
533{ 322{
534 switch(HwInfo->jChipType) { 323 if(SiS_Pr->ChipType < SIS_315H) {
535#ifdef SIS315H
536 case SIS_315H:
537 case SIS_315:
538 case SIS_315PRO:
539 case SIS_550:
540 case SIS_650:
541 case SIS_740:
542 case SIS_330:
543 case SIS_661:
544 case SIS_741:
545 case SIS_660:
546 case SIS_760:
547 case SIS_761:
548 case SIS_340:
549 InitTo310Pointer(SiS_Pr, HwInfo);
550 break;
551#endif
552#ifdef SIS300 324#ifdef SIS300
553 case SIS_300: 325 InitTo300Pointer(SiS_Pr);
554 case SIS_540: 326#else
555 case SIS_630: 327 return FALSE;
556 case SIS_730: 328#endif
557 InitTo300Pointer(SiS_Pr, HwInfo); 329 } else {
558 break; 330#ifdef SIS315H
331 InitTo310Pointer(SiS_Pr);
332#else
333 return FALSE;
559#endif 334#endif
560 default:
561 break;
562 } 335 }
336 return TRUE;
563} 337}
564 338
565/*********************************************/ 339/*********************************************/
566/* HELPER: Get ModeID */ 340/* HELPER: Get ModeID */
567/*********************************************/ 341/*********************************************/
568 342
569#ifdef LINUX_XF86 343#ifndef SIS_XORG_XF86
570USHORT 344static
571SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, 345#endif
572 int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight) 346unsigned short
347SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
348 int Depth, BOOLEAN FSTN, int LCDwidth, int LCDheight)
573{ 349{
574 USHORT ModeIndex = 0; 350 unsigned short ModeIndex = 0;
575 351
576 switch(HDisplay) 352 switch(HDisplay)
577 { 353 {
578 case 320: 354 case 320:
579 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 355 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
580 else if(VDisplay == 240) { 356 else if(VDisplay == 240) {
581 if(FSTN) ModeIndex = ModeIndex_320x240_FSTN[Depth]; 357 if((VBFlags & CRT2_LCD) && (FSTN))
582 else ModeIndex = ModeIndex_320x240[Depth]; 358 ModeIndex = ModeIndex_320x240_FSTN[Depth];
583 } 359 else
584 break; 360 ModeIndex = ModeIndex_320x240[Depth];
585 case 400: 361 }
586 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) { 362 break;
587 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 363 case 400:
588 } 364 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) {
589 break; 365 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
590 case 512: 366 }
591 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) { 367 break;
592 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 368 case 512:
593 } 369 if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) {
594 break; 370 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
595 case 640: 371 }
596 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth]; 372 break;
597 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth]; 373 case 640:
598 break; 374 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
599 case 720: 375 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
600 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth]; 376 break;
601 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth]; 377 case 720:
602 break; 378 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
603 case 768: 379 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
604 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth]; 380 break;
605 break; 381 case 768:
606 case 800: 382 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
607 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth]; 383 break;
608 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth]; 384 case 800:
609 break; 385 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
610 case 848: 386 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
611 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth]; 387 break;
612 break; 388 case 848:
613 case 856: 389 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
614 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth]; 390 break;
615 break; 391 case 856:
616 case 960: 392 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
617 if(VGAEngine == SIS_315_VGA) { 393 break;
618 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth]; 394 case 960:
619 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth]; 395 if(VGAEngine == SIS_315_VGA) {
620 } 396 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
621 break; 397 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
622 case 1024: 398 }
623 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth]; 399 break;
624 else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 400 case 1024:
625 else if(VGAEngine == SIS_300_VGA) { 401 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
626 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth]; 402 else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
627 } 403 else if(VGAEngine == SIS_300_VGA) {
628 break; 404 if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
629 case 1152: 405 }
630 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth]; 406 break;
631 if(VGAEngine == SIS_300_VGA) { 407 case 1152:
632 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth]; 408 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
633 } 409 if(VGAEngine == SIS_300_VGA) {
634 break; 410 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
635 case 1280: 411 }
636 switch(VDisplay) { 412 break;
637 case 720: 413 case 1280:
638 ModeIndex = ModeIndex_1280x720[Depth]; 414 switch(VDisplay) {
639 break; 415 case 720:
640 case 768: 416 ModeIndex = ModeIndex_1280x720[Depth];
641 if(VGAEngine == SIS_300_VGA) { 417 break;
642 ModeIndex = ModeIndex_300_1280x768[Depth]; 418 case 768:
643 } else { 419 if(VGAEngine == SIS_300_VGA) {
644 ModeIndex = ModeIndex_310_1280x768[Depth]; 420 ModeIndex = ModeIndex_300_1280x768[Depth];
645 } 421 } else {
646 break; 422 ModeIndex = ModeIndex_310_1280x768[Depth];
647 case 800: 423 }
648 if(VGAEngine == SIS_315_VGA) { 424 break;
649 ModeIndex = ModeIndex_1280x800[Depth]; 425 case 800:
650 } 426 if(VGAEngine == SIS_315_VGA) {
651 break; 427 ModeIndex = ModeIndex_1280x800[Depth];
652 case 960: 428 }
653 ModeIndex = ModeIndex_1280x960[Depth]; 429 break;
654 break; 430 case 854:
655 case 1024: 431 if(VGAEngine == SIS_315_VGA) {
656 ModeIndex = ModeIndex_1280x1024[Depth]; 432 ModeIndex = ModeIndex_1280x854[Depth];
657 break; 433 }
658 } 434 break;
659 break; 435 case 960:
660 case 1360: 436 ModeIndex = ModeIndex_1280x960[Depth];
661 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth]; 437 break;
662 if(VGAEngine == SIS_300_VGA) { 438 case 1024:
663 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth]; 439 ModeIndex = ModeIndex_1280x1024[Depth];
664 } 440 break;
665 break; 441 }
666 case 1400: 442 break;
667 if(VGAEngine == SIS_315_VGA) { 443 case 1360:
668 if(VDisplay == 1050) { 444 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
669 ModeIndex = ModeIndex_1400x1050[Depth]; 445 if(VGAEngine == SIS_300_VGA) {
670 } 446 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
671 } 447 }
672 break; 448 break;
673 case 1600: 449 case 1400:
674 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 450 if(VGAEngine == SIS_315_VGA) {
675 break; 451 if(VDisplay == 1050) {
676 case 1680: 452 ModeIndex = ModeIndex_1400x1050[Depth];
677 if(VGAEngine == SIS_315_VGA) { 453 }
678 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth]; 454 }
679 } 455 break;
680 break; 456 case 1600:
681 case 1920: 457 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
682 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth]; 458 break;
683 else if(VGAEngine == SIS_315_VGA) { 459 case 1680:
684 if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth]; 460 if(VGAEngine == SIS_315_VGA) {
685 } 461 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
686 break; 462 }
687 case 2048: 463 break;
688 if(VDisplay == 1536) { 464 case 1920:
689 if(VGAEngine == SIS_300_VGA) { 465 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
690 ModeIndex = ModeIndex_300_2048x1536[Depth]; 466 else if(VGAEngine == SIS_315_VGA) {
691 } else { 467 if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
692 ModeIndex = ModeIndex_310_2048x1536[Depth]; 468 }
693 } 469 break;
694 } 470 case 2048:
695 break; 471 if(VDisplay == 1536) {
472 if(VGAEngine == SIS_300_VGA) {
473 ModeIndex = ModeIndex_300_2048x1536[Depth];
474 } else {
475 ModeIndex = ModeIndex_310_2048x1536[Depth];
476 }
477 }
478 break;
696 } 479 }
697 480
698 return(ModeIndex); 481 return ModeIndex;
699} 482}
700#endif
701 483
702USHORT 484unsigned short
703SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, 485SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
704 int Depth, BOOLEAN FSTN, USHORT CustomT, int LCDwidth, int LCDheight) 486 int Depth, BOOLEAN FSTN, unsigned short CustomT, int LCDwidth, int LCDheight,
487 unsigned int VBFlags2)
705{ 488{
706 USHORT ModeIndex = 0; 489 unsigned short ModeIndex = 0;
707 490
708 if(VBFlags & (VB_LVDS | VB_30xBDH)) { 491 if(VBFlags2 & (VB2_LVDS | VB2_30xBDH)) {
709 492
710 switch(HDisplay) 493 switch(HDisplay)
711 { 494 {
712 case 320: 495 case 320:
713 if(CustomT != CUT_PANEL848) { 496 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
714 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 497 if(VDisplay == 200) {
715 else if(VDisplay == 240) { 498 if(!FSTN) ModeIndex = ModeIndex_320x200[Depth];
499 } else if(VDisplay == 240) {
716 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth]; 500 if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
717 else if(VGAEngine == SIS_315_VGA) { 501 else if(VGAEngine == SIS_315_VGA) {
718 ModeIndex = ModeIndex_320x240_FSTN[Depth]; 502 ModeIndex = ModeIndex_320x240_FSTN[Depth];
719 } 503 }
720 } 504 }
721 } 505 }
722 break; 506 break;
723 case 400: 507 case 400:
724 if(CustomT != CUT_PANEL848) { 508 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
725 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) { 509 if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
726 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 510 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
727 } 511 }
728 } 512 }
729 break; 513 break;
730 case 512: 514 case 512:
731 if(CustomT != CUT_PANEL848) { 515 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
732 if(!((VGAEngine == SIS_300_VGA) && (VBFlags & VB_TRUMPION))) { 516 if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
733 if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) { 517 if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) {
734 if(VDisplay == 384) { 518 if(VDisplay == 384) {
735 ModeIndex = ModeIndex_512x384[Depth]; 519 ModeIndex = ModeIndex_512x384[Depth];
@@ -739,9 +523,10 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
739 } 523 }
740 break; 524 break;
741 case 640: 525 case 640:
742 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth]; 526 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
743 else if(VDisplay == 400) { 527 else if(VDisplay == 400) {
744 if(CustomT != CUT_PANEL848) ModeIndex = ModeIndex_640x400[Depth]; 528 if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856))
529 ModeIndex = ModeIndex_640x400[Depth];
745 } 530 }
746 break; 531 break;
747 case 800: 532 case 800:
@@ -752,6 +537,11 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
752 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth]; 537 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
753 } 538 }
754 break; 539 break;
540 case 856:
541 if(CustomT == CUT_PANEL856) {
542 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
543 }
544 break;
755 case 1024: 545 case 1024:
756 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 546 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
757 else if(VGAEngine == SIS_300_VGA) { 547 else if(VGAEngine == SIS_300_VGA) {
@@ -762,7 +552,7 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
762 break; 552 break;
763 case 1152: 553 case 1152:
764 if(VGAEngine == SIS_300_VGA) { 554 if(VGAEngine == SIS_300_VGA) {
765 if((VDisplay == 768) && (LCDheight == 768)) { 555 if((VDisplay == 768) && (LCDheight == 768)) {
766 ModeIndex = ModeIndex_1152x768[Depth]; 556 ModeIndex = ModeIndex_1152x768[Depth];
767 } 557 }
768 } 558 }
@@ -770,49 +560,49 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
770 case 1280: 560 case 1280:
771 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth]; 561 if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
772 else if(VGAEngine == SIS_315_VGA) { 562 else if(VGAEngine == SIS_315_VGA) {
773 if((VDisplay == 768) && (LCDheight == 768)) { 563 if((VDisplay == 768) && (LCDheight == 768)) {
774 ModeIndex = ModeIndex_310_1280x768[Depth]; 564 ModeIndex = ModeIndex_310_1280x768[Depth];
775 } 565 }
776 } 566 }
777 break; 567 break;
778 case 1360: 568 case 1360:
779 if(VGAEngine == SIS_300_VGA) { 569 if(VGAEngine == SIS_300_VGA) {
780 if(CustomT == CUT_BARCO1366) { 570 if(CustomT == CUT_BARCO1366) {
781 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth]; 571 if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
782 } 572 }
783 } 573 }
784 if(CustomT == CUT_PANEL848) { 574 if(CustomT == CUT_PANEL848) {
785 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth]; 575 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
786 } 576 }
787 break; 577 break;
788 case 1400: 578 case 1400:
789 if(VGAEngine == SIS_315_VGA) { 579 if(VGAEngine == SIS_315_VGA) {
790 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth]; 580 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
791 } 581 }
792 break; 582 break;
793 case 1600: 583 case 1600:
794 if(VGAEngine == SIS_315_VGA) { 584 if(VGAEngine == SIS_315_VGA) {
795 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 585 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
796 } 586 }
797 break; 587 break;
798 } 588 }
799 589
800 } else if(VBFlags & VB_SISBRIDGE) { 590 } else if(VBFlags2 & VB2_SISBRIDGE) {
801 591
802 switch(HDisplay) 592 switch(HDisplay)
803 { 593 {
804 case 320: 594 case 320:
805 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 595 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
806 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth]; 596 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
807 break; 597 break;
808 case 400: 598 case 400:
809 if(LCDwidth >= 800 && LCDheight >= 600) { 599 if(LCDwidth >= 800 && LCDheight >= 600) {
810 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 600 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
811 } 601 }
812 break; 602 break;
813 case 512: 603 case 512:
814 if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) { 604 if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) {
815 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 605 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
816 } 606 }
817 break; 607 break;
818 case 640: 608 case 640:
@@ -821,96 +611,115 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
821 break; 611 break;
822 case 720: 612 case 720:
823 if(VGAEngine == SIS_315_VGA) { 613 if(VGAEngine == SIS_315_VGA) {
824 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth]; 614 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
825 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth]; 615 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
826 } 616 }
827 break; 617 break;
828 case 768: 618 case 768:
829 if(VGAEngine == SIS_315_VGA) { 619 if(VGAEngine == SIS_315_VGA) {
830 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth]; 620 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
831 } 621 }
832 break; 622 break;
833 case 800: 623 case 800:
834 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth]; 624 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
835 if(VGAEngine == SIS_315_VGA) { 625 if(VGAEngine == SIS_315_VGA) {
836 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth]; 626 if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
837 } 627 }
838 break; 628 break;
839 case 848: 629 case 848:
840 if(VGAEngine == SIS_315_VGA) { 630 if(VGAEngine == SIS_315_VGA) {
841 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth]; 631 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
842 } 632 }
843 break; 633 break;
844 case 856: 634 case 856:
845 if(VGAEngine == SIS_315_VGA) { 635 if(VGAEngine == SIS_315_VGA) {
846 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth]; 636 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
847 } 637 }
848 break; 638 break;
849 case 960: 639 case 960:
850 if(VGAEngine == SIS_315_VGA) { 640 if(VGAEngine == SIS_315_VGA) {
851 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth]; 641 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
852 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth]; 642 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
853 } 643 }
854 break; 644 break;
855 case 1024: 645 case 1024:
856 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 646 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
857 if(VGAEngine == SIS_315_VGA) { 647 if(VGAEngine == SIS_315_VGA) {
858 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth]; 648 if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
859 } 649 }
860 break; 650 break;
861 case 1152: 651 case 1152:
862 if(VGAEngine == SIS_315_VGA) { 652 if(VGAEngine == SIS_315_VGA) {
863 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth]; 653 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
864 } 654 }
865 break; 655 break;
866 case 1280: 656 case 1280:
867 switch(VDisplay) { 657 switch(VDisplay) {
868 case 720: 658 case 720:
869 ModeIndex = ModeIndex_1280x720[Depth]; 659 ModeIndex = ModeIndex_1280x720[Depth];
870 case 768: 660 case 768:
871 if(VGAEngine == SIS_300_VGA) { 661 if(VGAEngine == SIS_300_VGA) {
872 ModeIndex = ModeIndex_300_1280x768[Depth]; 662 ModeIndex = ModeIndex_300_1280x768[Depth];
873 } else { 663 } else {
874 ModeIndex = ModeIndex_310_1280x768[Depth]; 664 ModeIndex = ModeIndex_310_1280x768[Depth];
875 } 665 }
876 break; 666 break;
877 case 800: 667 case 800:
878 if(VGAEngine == SIS_315_VGA) { 668 if(VGAEngine == SIS_315_VGA) {
879 ModeIndex = ModeIndex_1280x800[Depth]; 669 ModeIndex = ModeIndex_1280x800[Depth];
880 } 670 }
881 break; 671 break;
672 case 854:
673 if(VGAEngine == SIS_315_VGA) {
674 ModeIndex = ModeIndex_1280x854[Depth];
675 }
676 break;
882 case 960: 677 case 960:
883 ModeIndex = ModeIndex_1280x960[Depth]; 678 ModeIndex = ModeIndex_1280x960[Depth];
884 break; 679 break;
885 case 1024: 680 case 1024:
886 ModeIndex = ModeIndex_1280x1024[Depth]; 681 ModeIndex = ModeIndex_1280x1024[Depth];
887 break; 682 break;
888 } 683 }
889 break; 684 break;
890 case 1360: 685 case 1360:
891 if(VGAEngine == SIS_315_VGA) { 686 if(VGAEngine == SIS_315_VGA) { /* OVER1280 only? */
892 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth]; 687 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
893 } 688 }
894 break; 689 break;
895 case 1400: 690 case 1400:
896 if(VGAEngine == SIS_315_VGA) { 691 if(VGAEngine == SIS_315_VGA) {
897 if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) { 692 if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
898 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth]; 693 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
899 } 694 }
900 } 695 }
901 break; 696 break;
902 case 1600: 697 case 1600:
903 if(VGAEngine == SIS_315_VGA) { 698 if(VGAEngine == SIS_315_VGA) {
904 if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) { 699 if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
905 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 700 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
906 } 701 }
907 } 702 }
908 break; 703 break;
909#ifndef VB_FORBID_CRT2LCD_OVER_1600 704#ifndef VB_FORBID_CRT2LCD_OVER_1600
910 case 1680: 705 case 1680:
911 if(VGAEngine == SIS_315_VGA) { 706 if(VGAEngine == SIS_315_VGA) {
912 if(VBFlags & (VB_301C | VB_302LV | VB_302ELV)) { 707 if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
913 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth]; 708 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
709 }
710 }
711 break;
712 case 1920:
713 if(VGAEngine == SIS_315_VGA) {
714 if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
715 if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
716 }
717 }
718 break;
719 case 2048:
720 if(VGAEngine == SIS_315_VGA) {
721 if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
722 if(VDisplay == 1536) ModeIndex = ModeIndex_310_2048x1536[Depth];
914 } 723 }
915 } 724 }
916 break; 725 break;
@@ -921,16 +730,17 @@ SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay,
921 return ModeIndex; 730 return ModeIndex;
922} 731}
923 732
924USHORT 733unsigned short
925SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth) 734SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
735 unsigned int VBFlags2)
926{ 736{
927 USHORT ModeIndex = 0; 737 unsigned short ModeIndex = 0;
928 738
929 if(VBFlags & VB_CHRONTEL) { 739 if(VBFlags2 & VB2_CHRONTEL) {
930 740
931 switch(HDisplay) 741 switch(HDisplay)
932 { 742 {
933 case 512: 743 case 512:
934 if(VGAEngine == SIS_315_VGA) { 744 if(VGAEngine == SIS_315_VGA) {
935 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 745 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
936 } 746 }
@@ -944,27 +754,27 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
944 break; 754 break;
945 case 1024: 755 case 1024:
946 if(VGAEngine == SIS_315_VGA) { 756 if(VGAEngine == SIS_315_VGA) {
947 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth]; 757 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
948 } 758 }
949 break; 759 break;
950 } 760 }
951 761
952 } else if(VBFlags & VB_SISTVBRIDGE) { 762 } else if(VBFlags2 & VB2_SISTVBRIDGE) {
953 763
954 switch(HDisplay) 764 switch(HDisplay)
955 { 765 {
956 case 320: 766 case 320:
957 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth]; 767 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
958 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth]; 768 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
959 break; 769 break;
960 case 400: 770 case 400:
961 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth]; 771 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
962 break; 772 break;
963 case 512: 773 case 512:
964 if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) || 774 if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
965 (VBFlags & TV_HIVISION) || 775 (VBFlags & TV_HIVISION) ||
966 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) { 776 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
967 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth]; 777 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
968 } 778 }
969 break; 779 break;
970 case 640: 780 case 640:
@@ -973,34 +783,34 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
973 break; 783 break;
974 case 720: 784 case 720:
975 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) { 785 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
976 if(VDisplay == 480) { 786 if(VDisplay == 480) {
977 ModeIndex = ModeIndex_720x480[Depth]; 787 ModeIndex = ModeIndex_720x480[Depth];
978 } else if(VDisplay == 576) { 788 } else if(VDisplay == 576) {
979 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) || 789 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
980 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) 790 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
981 ModeIndex = ModeIndex_720x576[Depth]; 791 ModeIndex = ModeIndex_720x576[Depth];
982 } 792 }
983 } 793 }
984 break; 794 break;
985 case 768: 795 case 768:
986 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) { 796 if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
987 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) || 797 if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
988 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) { 798 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
989 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth]; 799 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
990 } 800 }
991 } 801 }
992 break; 802 break;
993 case 800: 803 case 800:
994 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth]; 804 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
995 else if(VDisplay == 480) { 805 else if(VDisplay == 480) {
996 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 806 if(!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P))) {
997 ModeIndex = ModeIndex_800x480[Depth]; 807 ModeIndex = ModeIndex_800x480[Depth];
998 } 808 }
999 } 809 }
1000 break; 810 break;
1001 case 960: 811 case 960:
1002 if(VGAEngine == SIS_315_VGA) { 812 if(VGAEngine == SIS_315_VGA) {
1003 if(VDisplay == 600) { 813 if(VDisplay == 600) {
1004 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 814 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1005 ModeIndex = ModeIndex_960x600[Depth]; 815 ModeIndex = ModeIndex_960x600[Depth];
1006 } 816 }
@@ -1009,25 +819,28 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
1009 break; 819 break;
1010 case 1024: 820 case 1024:
1011 if(VDisplay == 768) { 821 if(VDisplay == 768) {
1012 if(VBFlags & (VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)) { 822 if(VBFlags2 & VB2_30xBLV) {
1013 ModeIndex = ModeIndex_1024x768[Depth]; 823 ModeIndex = ModeIndex_1024x768[Depth];
1014 } 824 }
1015 } else if(VDisplay == 576) { 825 } else if(VDisplay == 576) {
1016 if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 826 if( (VBFlags & TV_HIVISION) ||
827 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)) ||
828 ((VBFlags2 & VB2_30xBLV) &&
829 ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL))) ) {
1017 ModeIndex = ModeIndex_1024x576[Depth]; 830 ModeIndex = ModeIndex_1024x576[Depth];
1018 } 831 }
1019 } 832 }
1020 break; 833 break;
1021 case 1280: 834 case 1280:
1022 if(VDisplay == 720) { 835 if(VDisplay == 720) {
1023 if((VBFlags & TV_HIVISION) || 836 if((VBFlags & TV_HIVISION) ||
1024 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) { 837 ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
1025 ModeIndex = ModeIndex_1280x720[Depth]; 838 ModeIndex = ModeIndex_1280x720[Depth];
1026 } 839 }
1027 } else if(VDisplay == 1024) { 840 } else if(VDisplay == 1024) {
1028 if((VBFlags & TV_HIVISION) || 841 if((VBFlags & TV_HIVISION) ||
1029 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) { 842 ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
1030 ModeIndex = ModeIndex_1280x1024[Depth]; 843 ModeIndex = ModeIndex_1280x1024[Depth];
1031 } 844 }
1032 } 845 }
1033 break; 846 break;
@@ -1036,99 +849,31 @@ SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int D
1036 return ModeIndex; 849 return ModeIndex;
1037} 850}
1038 851
1039USHORT 852unsigned short
1040SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth) 853SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
854 unsigned int VBFlags2)
1041{ 855{
1042 USHORT ModeIndex = 0; 856 if(!(VBFlags2 & VB2_SISVGA2BRIDGE)) return 0;
1043 857
1044 if(!(VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0; 858 if(HDisplay >= 1920) return 0;
1045 859
1046 switch(HDisplay) 860 switch(HDisplay)
1047 { 861 {
1048 case 320:
1049 if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
1050 else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
1051 break;
1052 case 400:
1053 if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
1054 break;
1055 case 512:
1056 if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
1057 break;
1058 case 640:
1059 if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
1060 else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
1061 break;
1062 case 720:
1063 if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
1064 else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
1065 break;
1066 case 768:
1067 if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
1068 break;
1069 case 800:
1070 if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
1071 else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
1072 break;
1073 case 848:
1074 if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
1075 break;
1076 case 856:
1077 if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
1078 break;
1079 case 960:
1080 if(VGAEngine == SIS_315_VGA) {
1081 if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
1082 else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
1083 }
1084 break;
1085 case 1024:
1086 if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
1087 else if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
1088 break;
1089 case 1152:
1090 if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
1091 else if(VGAEngine == SIS_300_VGA) {
1092 if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
1093 }
1094 break;
1095 case 1280:
1096 if(VDisplay == 768) {
1097 if(VGAEngine == SIS_300_VGA) {
1098 ModeIndex = ModeIndex_300_1280x768[Depth];
1099 } else {
1100 ModeIndex = ModeIndex_310_1280x768[Depth];
1101 }
1102 } else if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
1103 else if(VDisplay == 720) ModeIndex = ModeIndex_1280x720[Depth];
1104 else if(VDisplay == 800) ModeIndex = ModeIndex_1280x800[Depth];
1105 else if(VDisplay == 960) ModeIndex = ModeIndex_1280x960[Depth];
1106 break;
1107 case 1360:
1108 if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
1109 break;
1110 case 1400:
1111 if(VGAEngine == SIS_315_VGA) {
1112 if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
1113 }
1114 break;
1115 case 1600: 862 case 1600:
1116 if(VGAEngine == SIS_315_VGA) { 863 if(VDisplay == 1200) {
1117 if(VBFlags & (VB_301B|VB_301C|VB_302B)) { 864 if(VGAEngine != SIS_315_VGA) return 0;
1118 if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth]; 865 if(!(VBFlags2 & VB2_30xB)) return 0;
1119 }
1120 } 866 }
1121 break; 867 break;
1122 case 1680: 868 case 1680:
1123 if(VGAEngine == SIS_315_VGA) { 869 if(VDisplay == 1050) {
1124 if(VBFlags & (VB_301B|VB_301C|VB_302B)) { 870 if(VGAEngine != SIS_315_VGA) return 0;
1125 if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth]; 871 if(!(VBFlags2 & VB2_30xB)) return 0;
1126 }
1127 } 872 }
1128 break; 873 break;
1129 } 874 }
1130 875
1131 return ModeIndex; 876 return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, FALSE, 0, 0);
1132} 877}
1133 878
1134 879
@@ -1137,83 +882,83 @@ SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int
1137/*********************************************/ 882/*********************************************/
1138 883
1139void 884void
1140SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data) 885SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data)
1141{ 886{
1142 OutPortByte(port,index); 887 OutPortByte(port, index);
1143 OutPortByte(port + 1,data); 888 OutPortByte(port + 1, data);
1144} 889}
1145 890
1146void 891void
1147SiS_SetRegByte(SISIOADDRESS port, USHORT data) 892SiS_SetRegByte(SISIOADDRESS port, unsigned short data)
1148{ 893{
1149 OutPortByte(port,data); 894 OutPortByte(port, data);
1150} 895}
1151 896
1152void 897void
1153SiS_SetRegShort(SISIOADDRESS port, USHORT data) 898SiS_SetRegShort(SISIOADDRESS port, unsigned short data)
1154{ 899{
1155 OutPortWord(port,data); 900 OutPortWord(port, data);
1156} 901}
1157 902
1158void 903void
1159SiS_SetRegLong(SISIOADDRESS port, ULONG data) 904SiS_SetRegLong(SISIOADDRESS port, unsigned int data)
1160{ 905{
1161 OutPortLong(port,data); 906 OutPortLong(port, data);
1162} 907}
1163 908
1164UCHAR 909unsigned char
1165SiS_GetReg(SISIOADDRESS port, USHORT index) 910SiS_GetReg(SISIOADDRESS port, unsigned short index)
1166{ 911{
1167 OutPortByte(port,index); 912 OutPortByte(port, index);
1168 return(InPortByte(port + 1)); 913 return(InPortByte(port + 1));
1169} 914}
1170 915
1171UCHAR 916unsigned char
1172SiS_GetRegByte(SISIOADDRESS port) 917SiS_GetRegByte(SISIOADDRESS port)
1173{ 918{
1174 return(InPortByte(port)); 919 return(InPortByte(port));
1175} 920}
1176 921
1177USHORT 922unsigned short
1178SiS_GetRegShort(SISIOADDRESS port) 923SiS_GetRegShort(SISIOADDRESS port)
1179{ 924{
1180 return(InPortWord(port)); 925 return(InPortWord(port));
1181} 926}
1182 927
1183ULONG 928unsigned int
1184SiS_GetRegLong(SISIOADDRESS port) 929SiS_GetRegLong(SISIOADDRESS port)
1185{ 930{
1186 return(InPortLong(port)); 931 return(InPortLong(port));
1187} 932}
1188 933
1189void 934void
1190SiS_SetRegANDOR(SISIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR) 935SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND, unsigned short DataOR)
1191{ 936{
1192 USHORT temp; 937 unsigned short temp;
1193 938
1194 temp = SiS_GetReg(Port,Index); 939 temp = SiS_GetReg(Port, Index);
1195 temp = (temp & (DataAND)) | DataOR; 940 temp = (temp & (DataAND)) | DataOR;
1196 SiS_SetReg(Port,Index,temp); 941 SiS_SetReg(Port, Index, temp);
1197} 942}
1198 943
1199void 944void
1200SiS_SetRegAND(SISIOADDRESS Port,USHORT Index,USHORT DataAND) 945SiS_SetRegAND(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND)
1201{ 946{
1202 USHORT temp; 947 unsigned short temp;
1203 948
1204 temp = SiS_GetReg(Port,Index); 949 temp = SiS_GetReg(Port, Index);
1205 temp &= DataAND; 950 temp &= DataAND;
1206 SiS_SetReg(Port,Index,temp); 951 SiS_SetReg(Port, Index, temp);
1207} 952}
1208 953
1209void 954void
1210SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR) 955SiS_SetRegOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataOR)
1211{ 956{
1212 USHORT temp; 957 unsigned short temp;
1213 958
1214 temp = SiS_GetReg(Port,Index); 959 temp = SiS_GetReg(Port, Index);
1215 temp |= DataOR; 960 temp |= DataOR;
1216 SiS_SetReg(Port,Index,temp); 961 SiS_SetReg(Port, Index, temp);
1217} 962}
1218 963
1219/*********************************************/ 964/*********************************************/
@@ -1221,13 +966,13 @@ SiS_SetRegOR(SISIOADDRESS Port,USHORT Index,USHORT DataOR)
1221/*********************************************/ 966/*********************************************/
1222 967
1223void 968void
1224SiS_DisplayOn(SiS_Private *SiS_Pr) 969SiS_DisplayOn(struct SiS_Private *SiS_Pr)
1225{ 970{
1226 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF); 971 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
1227} 972}
1228 973
1229void 974void
1230SiS_DisplayOff(SiS_Private *SiS_Pr) 975SiS_DisplayOff(struct SiS_Private *SiS_Pr)
1231{ 976{
1232 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20); 977 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
1233} 978}
@@ -1238,7 +983,7 @@ SiS_DisplayOff(SiS_Private *SiS_Pr)
1238/*********************************************/ 983/*********************************************/
1239 984
1240void 985void
1241SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr) 986SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1242{ 987{
1243 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14; 988 SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
1244 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24; 989 SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
@@ -1251,16 +996,17 @@ SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1251 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18; 996 SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
1252 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19; 997 SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
1253 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b; 998 SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
999 SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
1254 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d; 1000 SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
1255 SiS_Pr->SiS_P3da = BaseAddr + 0x2a; 1001 SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
1256 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04; /* Digital video interface registers (LCD) */ 1002 SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
1257 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10; /* 301 TV Encoder registers */ 1003 SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
1258 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12; /* 301 Macrovision registers */ 1004 SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
1259 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14; /* 301 VGA2 (and LCD) registers */ 1005 SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
1260 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2; /* 301 palette address port registers */ 1006 SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
1261 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14; /* DDC Port ( = P3C4, SR11/0A) */ 1007 SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;
1262 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE; 1008 SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
1263 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK; 1009 SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
1264} 1010}
1265 1011
1266/*********************************************/ 1012/*********************************************/
@@ -1268,7 +1014,7 @@ SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
1268/*********************************************/ 1014/*********************************************/
1269 1015
1270static void 1016static void
1271SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1017SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
1272{ 1018{
1273 unsigned char cr5f, temp1, temp2; 1019 unsigned char cr5f, temp1, temp2;
1274 1020
@@ -1276,9 +1022,9 @@ SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1276 /* (SR11 is used for DDC and in enable/disablebridge) */ 1022 /* (SR11 is used for DDC and in enable/disablebridge) */
1277 SiS_Pr->SiS_SensibleSR11 = FALSE; 1023 SiS_Pr->SiS_SensibleSR11 = FALSE;
1278 SiS_Pr->SiS_MyCR63 = 0x63; 1024 SiS_Pr->SiS_MyCR63 = 0x63;
1279 if(HwInfo->jChipType >= SIS_330) { 1025 if(SiS_Pr->ChipType >= SIS_330) {
1280 SiS_Pr->SiS_MyCR63 = 0x53; 1026 SiS_Pr->SiS_MyCR63 = 0x53;
1281 if(HwInfo->jChipType >= SIS_661) { 1027 if(SiS_Pr->ChipType >= SIS_661) {
1282 SiS_Pr->SiS_SensibleSR11 = TRUE; 1028 SiS_Pr->SiS_SensibleSR11 = TRUE;
1283 } 1029 }
1284 } 1030 }
@@ -1286,43 +1032,52 @@ SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1286 /* You should use the macros, not these flags directly */ 1032 /* You should use the macros, not these flags directly */
1287 1033
1288 SiS_Pr->SiS_SysFlags = 0; 1034 SiS_Pr->SiS_SysFlags = 0;
1289 if(HwInfo->jChipType == SIS_650) { 1035 if(SiS_Pr->ChipType == SIS_650) {
1290 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0; 1036 cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
1291 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07); 1037 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
1292 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8; 1038 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1293 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8); 1039 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
1294 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8; 1040 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1295 if((!temp1) || (temp2)) { 1041 if((!temp1) || (temp2)) {
1296 switch(cr5f) { 1042 switch(cr5f) {
1297 case 0x80: 1043 case 0x80:
1298 case 0x90: 1044 case 0x90:
1299 case 0xc0: 1045 case 0xc0:
1300 SiS_Pr->SiS_SysFlags |= SF_IsM650; break; 1046 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1047 break;
1301 case 0xa0: 1048 case 0xa0:
1302 case 0xb0: 1049 case 0xb0:
1303 case 0xe0: 1050 case 0xe0:
1304 SiS_Pr->SiS_SysFlags |= SF_Is651; break; 1051 SiS_Pr->SiS_SysFlags |= SF_Is651;
1052 break;
1305 } 1053 }
1306 } else { 1054 } else {
1307 switch(cr5f) { 1055 switch(cr5f) {
1308 case 0x90: 1056 case 0x90:
1309 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8; 1057 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
1310 switch(temp1) { 1058 switch(temp1) {
1311 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break; 1059 case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
1312 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break; 1060 case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
1313 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break; 1061 default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
1314 } 1062 }
1315 break; 1063 break;
1316 case 0xb0: 1064 case 0xb0:
1317 SiS_Pr->SiS_SysFlags |= SF_Is652; break; 1065 SiS_Pr->SiS_SysFlags |= SF_Is652;
1066 break;
1318 default: 1067 default:
1319 SiS_Pr->SiS_SysFlags |= SF_IsM650; break; 1068 SiS_Pr->SiS_SysFlags |= SF_IsM650;
1069 break;
1320 } 1070 }
1321 } 1071 }
1322 } 1072 }
1323 if(HwInfo->jChipType == SIS_760) { 1073
1324 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78); 1074 if(SiS_Pr->ChipType >= SIS_760 && SiS_Pr->ChipType <= SIS_761) {
1325 if(temp1 & 0x30) SiS_Pr->SiS_SysFlags |= SF_760LFB; 1075 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x30) {
1076 SiS_Pr->SiS_SysFlags |= SF_760LFB;
1077 }
1078 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0xf0) {
1079 SiS_Pr->SiS_SysFlags |= SF_760UMA;
1080 }
1326 } 1081 }
1327} 1082}
1328 1083
@@ -1331,18 +1086,20 @@ SiS_GetSysFlags(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1331/*********************************************/ 1086/*********************************************/
1332 1087
1333static void 1088static void
1334SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1089SiSInitPCIetc(struct SiS_Private *SiS_Pr)
1335{ 1090{
1336 switch(HwInfo->jChipType) { 1091 switch(SiS_Pr->ChipType) {
1092#ifdef SIS300
1337 case SIS_300: 1093 case SIS_300:
1338 case SIS_540: 1094 case SIS_540:
1339 case SIS_630: 1095 case SIS_630:
1340 case SIS_730: 1096 case SIS_730:
1341 /* Set - PCI LINEAR ADDRESSING ENABLE (0x80) 1097 /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
1342 * - RELOCATED VGA IO (0x20) 1098 * - RELOCATED VGA IO ENABLED (0x20)
1343 * - MMIO ENABLE (0x1) 1099 * - MMIO ENABLED (0x01)
1100 * Leave other bits untouched.
1344 */ 1101 */
1345 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1); 1102 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1346 /* - Enable 2D (0x40) 1103 /* - Enable 2D (0x40)
1347 * - Enable 3D (0x02) 1104 * - Enable 3D (0x02)
1348 * - Enable 3D Vertex command fetch (0x10) ? 1105 * - Enable 3D Vertex command fetch (0x10) ?
@@ -1350,6 +1107,8 @@ SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1350 */ 1107 */
1351 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A); 1108 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
1352 break; 1109 break;
1110#endif
1111#ifdef SIS315H
1353 case SIS_315H: 1112 case SIS_315H:
1354 case SIS_315: 1113 case SIS_315:
1355 case SIS_315PRO: 1114 case SIS_315PRO:
@@ -1362,21 +1121,30 @@ SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1362 case SIS_760: 1121 case SIS_760:
1363 case SIS_761: 1122 case SIS_761:
1364 case SIS_340: 1123 case SIS_340:
1365 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1); 1124 case XGI_40:
1366 /* - Enable 2D (0x40) 1125 /* See above */
1367 * - Enable 3D (0x02) 1126 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1127 /* - Enable 3D G/L transformation engine (0x80)
1128 * - Enable 2D (0x40)
1368 * - Enable 3D vertex command fetch (0x10) 1129 * - Enable 3D vertex command fetch (0x10)
1369 * - Enable 3D command parser (0x08) 1130 * - Enable 3D command parser (0x08)
1370 * - Enable 3D G/L transformation engine (0x80) 1131 * - Enable 3D (0x02)
1371 */ 1132 */
1372 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA); 1133 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
1373 break; 1134 break;
1135 case XGI_20:
1374 case SIS_550: 1136 case SIS_550:
1375 SiS_SetReg(SiS_Pr->SiS_P3c4,0x20,0xa1); 1137 /* See above */
1138 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
1376 /* No 3D engine ! */ 1139 /* No 3D engine ! */
1377 /* - Enable 2D (0x40) 1140 /* - Enable 2D (0x40)
1141 * - disable 3D
1378 */ 1142 */
1379 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x40); 1143 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0x60,0x40);
1144 break;
1145#endif
1146 default:
1147 break;
1380 } 1148 }
1381} 1149}
1382 1150
@@ -1384,38 +1152,40 @@ SiSInitPCIetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1384/* HELPER: SetLVDSetc */ 1152/* HELPER: SetLVDSetc */
1385/*********************************************/ 1153/*********************************************/
1386 1154
1387static void 1155#ifdef SIS_LINUX_KERNEL
1388SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1156static
1157#endif
1158void
1159SiSSetLVDSetc(struct SiS_Private *SiS_Pr)
1389{ 1160{
1390 USHORT temp; 1161 unsigned short temp;
1391 1162
1392 SiS_Pr->SiS_IF_DEF_LVDS = 0; 1163 SiS_Pr->SiS_IF_DEF_LVDS = 0;
1393 SiS_Pr->SiS_IF_DEF_TRUMPION = 0; 1164 SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
1394 SiS_Pr->SiS_IF_DEF_CH70xx = 0; 1165 SiS_Pr->SiS_IF_DEF_CH70xx = 0;
1395 SiS_Pr->SiS_IF_DEF_DSTN = 0;
1396 SiS_Pr->SiS_IF_DEF_FSTN = 0;
1397 SiS_Pr->SiS_IF_DEF_CONEX = 0; 1166 SiS_Pr->SiS_IF_DEF_CONEX = 0;
1398 1167
1399 SiS_Pr->SiS_ChrontelInit = 0; 1168 SiS_Pr->SiS_ChrontelInit = 0;
1400 1169
1170 if(SiS_Pr->ChipType == XGI_20) return;
1171
1401 /* Check for SiS30x first */ 1172 /* Check for SiS30x first */
1402 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); 1173 temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1403 if((temp == 1) || (temp == 2)) return; 1174 if((temp == 1) || (temp == 2)) return;
1404 1175
1405 switch(HwInfo->jChipType) { 1176 switch(SiS_Pr->ChipType) {
1406#ifdef SIS300 1177#ifdef SIS300
1407 case SIS_540: 1178 case SIS_540:
1408 case SIS_630: 1179 case SIS_630:
1409 case SIS_730: 1180 case SIS_730:
1410 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37); 1181 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1411 temp = (temp & 0x0E) >> 1; 1182 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1412 if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1; 1183 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
1413 if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1; 1184 if((temp == 4) || (temp == 5)) {
1414 if((temp == 4) || (temp == 5)) {
1415 /* Save power status (and error check) - UNUSED */ 1185 /* Save power status (and error check) - UNUSED */
1416 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e); 1186 SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
1417 SiS_Pr->SiS_IF_DEF_CH70xx = 1; 1187 SiS_Pr->SiS_IF_DEF_CH70xx = 1;
1418 } 1188 }
1419 break; 1189 break;
1420#endif 1190#endif
1421#ifdef SIS315H 1191#ifdef SIS315H
@@ -1423,26 +1193,26 @@ SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1423 case SIS_650: 1193 case SIS_650:
1424 case SIS_740: 1194 case SIS_740:
1425 case SIS_330: 1195 case SIS_330:
1426 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37); 1196 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
1427 temp = (temp & 0x0E) >> 1; 1197 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1428 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1; 1198 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1429 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2; 1199 break;
1430 break;
1431 case SIS_661: 1200 case SIS_661:
1432 case SIS_741: 1201 case SIS_741:
1433 case SIS_660: 1202 case SIS_660:
1434 case SIS_760: 1203 case SIS_760:
1435 case SIS_761: 1204 case SIS_761:
1436 case SIS_340: 1205 case SIS_340:
1437 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 1206 case XGI_20:
1438 temp = (temp & 0xe0) >> 5; 1207 case XGI_40:
1439 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1; 1208 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5;
1440 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2; 1209 if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
1441 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */ 1210 if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
1442 break; 1211 if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
1212 break;
1443#endif 1213#endif
1444 default: 1214 default:
1445 break; 1215 break;
1446 } 1216 }
1447} 1217}
1448 1218
@@ -1451,35 +1221,55 @@ SiSSetLVDSetc(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1451/*********************************************/ 1221/*********************************************/
1452 1222
1453void 1223void
1454SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable) 1224SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable)
1455{ 1225{
1456 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0; 1226 SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
1457} 1227}
1458 1228
1459void 1229void
1460SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable) 1230SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable)
1461{ 1231{
1462 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0; 1232 SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
1463} 1233}
1464 1234
1465/*********************************************/ 1235/*********************************************/
1236/* HELPER: Get modeflag */
1237/*********************************************/
1238
1239unsigned short
1240SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1241 unsigned short ModeIdIndex)
1242{
1243 if(SiS_Pr->UseCustomMode) {
1244 return SiS_Pr->CModeFlag;
1245 } else if(ModeNo <= 0x13) {
1246 return SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1247 } else {
1248 return SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1249 }
1250}
1251
1252/*********************************************/
1466/* HELPER: Determine ROM usage */ 1253/* HELPER: Determine ROM usage */
1467/*********************************************/ 1254/*********************************************/
1468 1255
1469BOOLEAN 1256BOOLEAN
1470SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1257SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr)
1471{ 1258{
1472 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1259 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1473 USHORT romversoffs, romvmaj = 1, romvmin = 0; 1260 unsigned short romversoffs, romvmaj = 1, romvmin = 0;
1474 1261
1475 if(HwInfo->jChipType >= SIS_761) { 1262 if(SiS_Pr->ChipType >= XGI_20) {
1476 /* I very much assume 761 and 340 will use new layout */ 1263 /* XGI ROMs don't qualify */
1264 return FALSE;
1265 } else if(SiS_Pr->ChipType >= SIS_761) {
1266 /* I very much assume 761, 340 and newer will use new layout */
1477 return TRUE; 1267 return TRUE;
1478 } else if(HwInfo->jChipType >= SIS_661) { 1268 } else if(SiS_Pr->ChipType >= SIS_661) {
1479 if((ROMAddr[0x1a] == 'N') && 1269 if((ROMAddr[0x1a] == 'N') &&
1480 (ROMAddr[0x1b] == 'e') && 1270 (ROMAddr[0x1b] == 'e') &&
1481 (ROMAddr[0x1c] == 'w') && 1271 (ROMAddr[0x1c] == 'w') &&
1482 (ROMAddr[0x1d] == 'V')) { 1272 (ROMAddr[0x1d] == 'V')) {
1483 return TRUE; 1273 return TRUE;
1484 } 1274 }
1485 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8); 1275 romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
@@ -1494,9 +1284,9 @@ SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1494 } 1284 }
1495 } else if(IS_SIS650740) { 1285 } else if(IS_SIS650740) {
1496 if((ROMAddr[0x1a] == 'N') && 1286 if((ROMAddr[0x1a] == 'N') &&
1497 (ROMAddr[0x1b] == 'e') && 1287 (ROMAddr[0x1b] == 'e') &&
1498 (ROMAddr[0x1c] == 'w') && 1288 (ROMAddr[0x1c] == 'w') &&
1499 (ROMAddr[0x1d] == 'V')) { 1289 (ROMAddr[0x1d] == 'V')) {
1500 return TRUE; 1290 return TRUE;
1501 } 1291 }
1502 } 1292 }
@@ -1504,45 +1294,50 @@ SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1504} 1294}
1505 1295
1506static void 1296static void
1507SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1297SiSDetermineROMUsage(struct SiS_Private *SiS_Pr)
1508{ 1298{
1509 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1299 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1510 USHORT romptr = 0; 1300 unsigned short romptr = 0;
1511 1301
1512 SiS_Pr->SiS_UseROM = FALSE; 1302 SiS_Pr->SiS_UseROM = FALSE;
1513 SiS_Pr->SiS_ROMNew = FALSE; 1303 SiS_Pr->SiS_ROMNew = FALSE;
1304 SiS_Pr->SiS_PWDOffset = 0;
1514 1305
1515 if((ROMAddr) && (HwInfo->UseROM)) { 1306 if(SiS_Pr->ChipType >= XGI_20) return;
1516 if(HwInfo->jChipType == SIS_300) { 1307
1517 /* 300: We check if the code starts below 0x220 by 1308 if((ROMAddr) && (SiS_Pr->UseROM)) {
1309 if(SiS_Pr->ChipType == SIS_300) {
1310 /* 300: We check if the code starts below 0x220 by
1518 * checking the jmp instruction at the beginning 1311 * checking the jmp instruction at the beginning
1519 * of the BIOS image. 1312 * of the BIOS image.
1520 */ 1313 */
1521 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a) 1314 if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
1522 SiS_Pr->SiS_UseROM = TRUE; 1315 SiS_Pr->SiS_UseROM = TRUE;
1523 } else if(HwInfo->jChipType < SIS_315H) { 1316 } else if(SiS_Pr->ChipType < SIS_315H) {
1524 /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps 1317 /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
1525 * the others do as well 1318 * the others do as well
1526 */ 1319 */
1527 SiS_Pr->SiS_UseROM = TRUE; 1320 SiS_Pr->SiS_UseROM = TRUE;
1528 } else { 1321 } else {
1529 /* 315/330 series stick to the standard(s) */ 1322 /* 315/330 series stick to the standard(s) */
1530 SiS_Pr->SiS_UseROM = TRUE; 1323 SiS_Pr->SiS_UseROM = TRUE;
1531 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr, HwInfo))) { 1324 if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) {
1532 SiS_Pr->SiS_EMIOffset = 14; 1325 SiS_Pr->SiS_EMIOffset = 14;
1326 SiS_Pr->SiS_PWDOffset = 17;
1533 SiS_Pr->SiS661LCD2TableSize = 36; 1327 SiS_Pr->SiS661LCD2TableSize = 36;
1534 /* Find out about LCD data table entry size */ 1328 /* Find out about LCD data table entry size */
1535 if((romptr = SISGETROMW(0x0102))) { 1329 if((romptr = SISGETROMW(0x0102))) {
1536 if(ROMAddr[romptr + (32 * 16)] == 0xff) 1330 if(ROMAddr[romptr + (32 * 16)] == 0xff)
1537 SiS_Pr->SiS661LCD2TableSize = 32; 1331 SiS_Pr->SiS661LCD2TableSize = 32;
1538 else if(ROMAddr[romptr + (34 * 16)] == 0xff) 1332 else if(ROMAddr[romptr + (34 * 16)] == 0xff)
1539 SiS_Pr->SiS661LCD2TableSize = 34; 1333 SiS_Pr->SiS661LCD2TableSize = 34;
1540 else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94 */ 1334 else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94, 2.05.00+ */
1541 SiS_Pr->SiS661LCD2TableSize = 36; 1335 SiS_Pr->SiS661LCD2TableSize = 36;
1542 else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */ 1336 else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */
1543 (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00+ */ 1337 (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00 - <2.05.00 */
1544 SiS_Pr->SiS661LCD2TableSize = 38; 1338 SiS_Pr->SiS661LCD2TableSize = 38; /* UMC data layout abandoned at 2.05.00 */
1545 SiS_Pr->SiS_EMIOffset = 16; 1339 SiS_Pr->SiS_EMIOffset = 16;
1340 SiS_Pr->SiS_PWDOffset = 19;
1546 } 1341 }
1547 } 1342 }
1548 } 1343 }
@@ -1555,9 +1350,9 @@ SiSDetermineROMUsage(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1555/*********************************************/ 1350/*********************************************/
1556 1351
1557static void 1352static void
1558SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value) 1353SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
1559{ 1354{
1560 USHORT temp; 1355 unsigned short temp;
1561 1356
1562 value &= 0x00ff; 1357 value &= 0x00ff;
1563 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0; 1358 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
@@ -1569,9 +1364,9 @@ SiS_SetSegRegLower(SiS_Private *SiS_Pr, USHORT value)
1569} 1364}
1570 1365
1571static void 1366static void
1572SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value) 1367SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
1573{ 1368{
1574 USHORT temp; 1369 unsigned short temp;
1575 1370
1576 value &= 0x00ff; 1371 value &= 0x00ff;
1577 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f; 1372 temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
@@ -1583,22 +1378,22 @@ SiS_SetSegRegUpper(SiS_Private *SiS_Pr, USHORT value)
1583} 1378}
1584 1379
1585static void 1380static void
1586SiS_SetSegmentReg(SiS_Private *SiS_Pr, USHORT value) 1381SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
1587{ 1382{
1588 SiS_SetSegRegLower(SiS_Pr, value); 1383 SiS_SetSegRegLower(SiS_Pr, value);
1589 SiS_SetSegRegUpper(SiS_Pr, value); 1384 SiS_SetSegRegUpper(SiS_Pr, value);
1590} 1385}
1591 1386
1592static void 1387static void
1593SiS_ResetSegmentReg(SiS_Private *SiS_Pr) 1388SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
1594{ 1389{
1595 SiS_SetSegmentReg(SiS_Pr, 0); 1390 SiS_SetSegmentReg(SiS_Pr, 0);
1596} 1391}
1597 1392
1598static void 1393static void
1599SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value) 1394SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
1600{ 1395{
1601 USHORT temp = value >> 8; 1396 unsigned short temp = value >> 8;
1602 1397
1603 temp &= 0x07; 1398 temp &= 0x07;
1604 temp |= (temp << 4); 1399 temp |= (temp << 4);
@@ -1607,15 +1402,15 @@ SiS_SetSegmentRegOver(SiS_Private *SiS_Pr, USHORT value)
1607} 1402}
1608 1403
1609static void 1404static void
1610SiS_ResetSegmentRegOver(SiS_Private *SiS_Pr) 1405SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
1611{ 1406{
1612 SiS_SetSegmentRegOver(SiS_Pr, 0); 1407 SiS_SetSegmentRegOver(SiS_Pr, 0);
1613} 1408}
1614 1409
1615static void 1410static void
1616SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo) 1411SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
1617{ 1412{
1618 if((IS_SIS65x) || (HwInfo->jChipType >= SIS_661)) { 1413 if((IS_SIS65x) || (SiS_Pr->ChipType >= SIS_661)) {
1619 SiS_ResetSegmentReg(SiS_Pr); 1414 SiS_ResetSegmentReg(SiS_Pr);
1620 SiS_ResetSegmentRegOver(SiS_Pr); 1415 SiS_ResetSegmentRegOver(SiS_Pr);
1621 } 1416 }
@@ -1625,89 +1420,86 @@ SiS_ResetSegmentRegisters(SiS_Private *SiS_Pr,PSIS_HW_INFO HwInfo)
1625/* HELPER: GetVBType */ 1420/* HELPER: GetVBType */
1626/*********************************************/ 1421/*********************************************/
1627 1422
1628static void 1423#ifdef SIS_LINUX_KERNEL
1629SiS_GetVBType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1424static
1425#endif
1426void
1427SiS_GetVBType(struct SiS_Private *SiS_Pr)
1630{ 1428{
1631 USHORT flag=0, rev=0, nolcd=0, p4_0f, p4_25, p4_27; 1429 unsigned short flag = 0, rev = 0, nolcd = 0;
1632 1430 unsigned short p4_0f, p4_25, p4_27;
1633 SiS_Pr->SiS_VBType = 0; 1431
1634 1432 SiS_Pr->SiS_VBType = 0;
1635 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX)) 1433
1636 return; 1434 if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
1637 1435 return;
1638 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); 1436
1639 1437 if(SiS_Pr->ChipType == XGI_20)
1640 if(flag > 3) return; 1438 return;
1641 1439
1642 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01); 1440 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
1643 1441
1644 if(flag >= 2) { 1442 if(flag > 3)
1645 SiS_Pr->SiS_VBType = VB_SIS302B; 1443 return;
1646 } else if(flag == 1) { 1444
1647 if(rev >= 0xC0) { 1445 rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
1648 SiS_Pr->SiS_VBType = VB_SIS301C; 1446
1649 } else if(rev >= 0xB0) { 1447 if(flag >= 2) {
1650 SiS_Pr->SiS_VBType = VB_SIS301B; 1448 SiS_Pr->SiS_VBType = VB_SIS302B;
1651 /* Check if 30xB DH version (no LCD support, use Panel Link instead) */ 1449 } else if(flag == 1) {
1652 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23); 1450 if(rev >= 0xC0) {
1653 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD; 1451 SiS_Pr->SiS_VBType = VB_SIS301C;
1654 } else { 1452 } else if(rev >= 0xB0) {
1655 SiS_Pr->SiS_VBType = VB_SIS301; 1453 SiS_Pr->SiS_VBType = VB_SIS301B;
1656 } 1454 /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
1657 } 1455 nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
1658 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) { 1456 if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
1659 if(rev >= 0xE0) { 1457 } else {
1660 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39); 1458 SiS_Pr->SiS_VBType = VB_SIS301;
1661 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV; 1459 }
1662 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */ 1460 }
1663 } else if(rev >= 0xD0) { 1461 if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
1664 SiS_Pr->SiS_VBType = VB_SIS301LV; 1462 if(rev >= 0xE0) {
1665 } 1463 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
1666 } 1464 if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
1667 if(SiS_Pr->SiS_VBType & (VB_301C | VB_301LV | VB_302LV | VB_302ELV)) { 1465 else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
1668 p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f); 1466 } else if(rev >= 0xD0) {
1669 p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25); 1467 SiS_Pr->SiS_VBType = VB_SIS301LV;
1670 p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27); 1468 }
1671 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f); 1469 }
1672 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08); 1470 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) {
1673 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd); 1471 p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
1674 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) { 1472 p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
1675 SiS_Pr->SiS_VBType |= VB_UMC; 1473 p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
1676 } 1474 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
1677 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27); 1475 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
1678 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25); 1476 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
1679 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f); 1477 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
1680 } 1478 SiS_Pr->SiS_VBType |= VB_UMC;
1479 }
1480 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
1481 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
1482 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
1483 }
1681} 1484}
1682 1485
1683/*********************************************/ 1486/*********************************************/
1684/* HELPER: Check RAM size */ 1487/* HELPER: Check RAM size */
1685/*********************************************/ 1488/*********************************************/
1686 1489
1687#ifdef LINUX_KERNEL 1490#ifdef SIS_LINUX_KERNEL
1688static BOOLEAN 1491static BOOLEAN
1689SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1492SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1690 USHORT ModeNo, USHORT ModeIdIndex) 1493 unsigned short ModeIdIndex)
1691{ 1494{
1692 USHORT AdapterMemSize = HwInfo->ulVideoMemorySize / (1024*1024); 1495 unsigned short AdapterMemSize = SiS_Pr->VideoMemorySize / (1024*1024);
1693 USHORT memorysize,modeflag; 1496 unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
1694 1497 unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1;
1695 if(SiS_Pr->UseCustomMode) { 1498
1696 modeflag = SiS_Pr->CModeFlag; 1499 if(!AdapterMemSize) return TRUE;
1697 } else { 1500
1698 if(ModeNo <= 0x13) { 1501 if(AdapterMemSize < memorysize) return FALSE;
1699 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 1502 return TRUE;
1700 } else {
1701 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1702 }
1703 }
1704
1705 memorysize = modeflag & MemoryInfoFlag;
1706 memorysize >>= MemorySizeShift; /* Get required memory size */
1707 memorysize++;
1708
1709 if(AdapterMemSize < memorysize) return FALSE;
1710 return TRUE;
1711} 1503}
1712#endif 1504#endif
1713 1505
@@ -1716,63 +1508,65 @@ SiS_CheckMemorySize(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
1716/*********************************************/ 1508/*********************************************/
1717 1509
1718#ifdef SIS315H 1510#ifdef SIS315H
1719static UCHAR 1511static unsigned char
1720SiS_Get310DRAMType(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1512SiS_Get310DRAMType(struct SiS_Private *SiS_Pr)
1721{ 1513{
1722 UCHAR data, temp; 1514 unsigned char data;
1723 1515
1724 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) { 1516 if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
1725 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03; 1517 data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
1726 } else { 1518 } else {
1727 if(HwInfo->jChipType >= SIS_340) { 1519 if(SiS_Pr->ChipType >= XGI_20) {
1728 /* TODO */ 1520 /* Do I need this? SR17 seems to be zero anyway... */
1729 data = 0; 1521 data = 0;
1730 } if(HwInfo->jChipType >= SIS_661) { 1522 } else if(SiS_Pr->ChipType >= SIS_340) {
1731 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07; 1523 /* TODO */
1732 if(SiS_Pr->SiS_ROMNew) { 1524 data = 0;
1733 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6); 1525 } if(SiS_Pr->ChipType >= SIS_661) {
1734 } 1526 if(SiS_Pr->SiS_ROMNew) {
1735 } else if(IS_SIS550650740) { 1527 data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
1736 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07; 1528 } else {
1737 } else { /* 315, 330 */ 1529 data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
1738 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03; 1530 }
1739 if(HwInfo->jChipType == SIS_330) { 1531 } else if(IS_SIS550650740) {
1740 if(data > 1) { 1532 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
1741 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30; 1533 } else { /* 315, 330 */
1742 switch(temp) { 1534 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
1743 case 0x00: data = 1; break; 1535 if(SiS_Pr->ChipType == SIS_330) {
1744 case 0x10: data = 3; break; 1536 if(data > 1) {
1745 case 0x20: data = 3; break; 1537 switch(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30) {
1746 case 0x30: data = 2; break; 1538 case 0x00: data = 1; break;
1747 } 1539 case 0x10: data = 3; break;
1748 } else { 1540 case 0x20: data = 3; break;
1749 data = 0; 1541 case 0x30: data = 2; break;
1750 } 1542 }
1751 } 1543 } else {
1752 } 1544 data = 0;
1545 }
1546 }
1547 }
1753 } 1548 }
1754 1549
1755 return data; 1550 return data;
1756} 1551}
1757 1552
1758static USHORT 1553static unsigned short
1759SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1554SiS_GetMCLK(struct SiS_Private *SiS_Pr)
1760{ 1555{
1761 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1556 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1762 USHORT index; 1557 unsigned short index;
1763 1558
1764 index = SiS_Get310DRAMType(SiS_Pr, HwInfo); 1559 index = SiS_Get310DRAMType(SiS_Pr);
1765 if(HwInfo->jChipType >= SIS_661) { 1560 if(SiS_Pr->ChipType >= SIS_661) {
1766 if(SiS_Pr->SiS_ROMNew) { 1561 if(SiS_Pr->SiS_ROMNew) {
1767 return((USHORT)(SISGETROMW((0x90 + (index * 5) + 3)))); 1562 return((unsigned short)(SISGETROMW((0x90 + (index * 5) + 3))));
1768 } 1563 }
1769 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK); 1564 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1770 } else if(index >= 4) { 1565 } else if(index >= 4) {
1771 index -= 4; 1566 return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
1772 return(SiS_Pr->SiS_MCLKData_1[index].CLOCK); 1567 } else {
1773 } else { 1568 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
1774 return(SiS_Pr->SiS_MCLKData_0[index].CLOCK); 1569 }
1775 }
1776} 1570}
1777#endif 1571#endif
1778 1572
@@ -1780,30 +1574,30 @@ SiS_GetMCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1780/* HELPER: ClearBuffer */ 1574/* HELPER: ClearBuffer */
1781/*********************************************/ 1575/*********************************************/
1782 1576
1783#ifdef LINUX_KERNEL 1577#ifdef SIS_LINUX_KERNEL
1784static void 1578static void
1785SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo) 1579SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1786{ 1580{
1787 UCHAR SISIOMEMTYPE *VideoMemoryAddress = HwInfo->pjVideoMemoryAddress; 1581 unsigned char SISIOMEMTYPE *memaddr = SiS_Pr->VideoMemoryAddress;
1788 ULONG AdapterMemorySize = HwInfo->ulVideoMemorySize; 1582 unsigned int memsize = SiS_Pr->VideoMemorySize;
1789 USHORT SISIOMEMTYPE *pBuffer; 1583 unsigned short SISIOMEMTYPE *pBuffer;
1790 int i; 1584 int i;
1791 1585
1792 if(SiS_Pr->SiS_ModeType >= ModeEGA) { 1586 if(!memaddr || !memsize) return;
1793 if(ModeNo > 0x13) { 1587
1794 SiS_SetMemory(VideoMemoryAddress, AdapterMemorySize, 0); 1588 if(SiS_Pr->SiS_ModeType >= ModeEGA) {
1795 } else { 1589 if(ModeNo > 0x13) {
1796 pBuffer = (USHORT SISIOMEMTYPE *)VideoMemoryAddress; 1590 SiS_SetMemory(memaddr, memsize, 0);
1797 for(i=0; i<0x4000; i++) writew(0x0000, &pBuffer[i]); 1591 } else {
1798 } 1592 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
1799 } else { 1593 for(i = 0; i < 0x4000; i++) writew(0x0000, &pBuffer[i]);
1800 if(SiS_Pr->SiS_ModeType < ModeCGA) { 1594 }
1801 pBuffer = (USHORT SISIOMEMTYPE *)VideoMemoryAddress; 1595 } else if(SiS_Pr->SiS_ModeType < ModeCGA) {
1802 for(i=0; i<0x4000; i++) writew(0x0720, &pBuffer[i]); 1596 pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
1803 } else { 1597 for(i = 0; i < 0x4000; i++) writew(0x0720, &pBuffer[i]);
1804 SiS_SetMemory(VideoMemoryAddress, 0x8000, 0); 1598 } else {
1805 } 1599 SiS_SetMemory(memaddr, 0x8000, 0);
1806 } 1600 }
1807} 1601}
1808#endif 1602#endif
1809 1603
@@ -1812,35 +1606,36 @@ SiS_ClearBuffer(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
1812/*********************************************/ 1606/*********************************************/
1813 1607
1814BOOLEAN 1608BOOLEAN
1815SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex) 1609SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
1610 unsigned short *ModeIdIndex)
1816{ 1611{
1817 UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO; 1612 unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
1818 1613
1819 if(*ModeNo <= 0x13) { 1614 if((*ModeNo) <= 0x13) {
1820 1615
1821 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01; 1616 if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
1822 1617
1823 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) { 1618 for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
1824 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == (*ModeNo)) break; 1619 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break;
1825 if(SiS_Pr->SiS_SModeIDTable[*ModeIdIndex].St_ModeID == 0xFF) return FALSE; 1620 if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return FALSE;
1826 } 1621 }
1827 1622
1828 if(*ModeNo == 0x07) { 1623 if((*ModeNo) == 0x07) {
1829 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */ 1624 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1830 /* else 350 lines */ 1625 /* else 350 lines */
1831 } 1626 }
1832 if(*ModeNo <= 0x03) { 1627 if((*ModeNo) <= 0x03) {
1833 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++; 1628 if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
1834 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */ 1629 if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
1835 /* else 350 lines */ 1630 /* else 350 lines */
1836 } 1631 }
1837 /* else 200 lines */ 1632 /* else 200 lines */
1838 1633
1839 } else { 1634 } else {
1840 1635
1841 for(*ModeIdIndex = 0; ;(*ModeIdIndex)++) { 1636 for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
1842 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == (*ModeNo)) break; 1637 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break;
1843 if(SiS_Pr->SiS_EModeIDTable[*ModeIdIndex].Ext_ModeID == 0xFF) return FALSE; 1638 if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return FALSE;
1844 } 1639 }
1845 1640
1846 } 1641 }
@@ -1851,10 +1646,10 @@ SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex)
1851/* HELPER: GetModePtr */ 1646/* HELPER: GetModePtr */
1852/*********************************************/ 1647/*********************************************/
1853 1648
1854UCHAR 1649unsigned short
1855SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex) 1650SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
1856{ 1651{
1857 UCHAR index; 1652 unsigned short index;
1858 1653
1859 if(ModeNo <= 0x13) { 1654 if(ModeNo <= 0x13) {
1860 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex; 1655 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
@@ -1866,79 +1661,125 @@ SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex)
1866} 1661}
1867 1662
1868/*********************************************/ 1663/*********************************************/
1664/* HELPERS: Get some indices */
1665/*********************************************/
1666
1667unsigned short
1668SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1669{
1670 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1671 if(UseWide == 1) {
1672 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_WIDE;
1673 } else {
1674 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK_NORM;
1675 }
1676 } else {
1677 return SiS_Pr->SiS_RefIndex[Index].Ext_CRTVCLK;
1678 }
1679}
1680
1681unsigned short
1682SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide)
1683{
1684 if(SiS_Pr->SiS_RefIndex[Index].Ext_InfoFlag & HaveWideTiming) {
1685 if(UseWide == 1) {
1686 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_WIDE;
1687 } else {
1688 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC_NORM;
1689 }
1690 } else {
1691 return SiS_Pr->SiS_RefIndex[Index].Ext_CRT1CRTC;
1692 }
1693}
1694
1695/*********************************************/
1869/* HELPER: LowModeTests */ 1696/* HELPER: LowModeTests */
1870/*********************************************/ 1697/*********************************************/
1871 1698
1872static BOOLEAN 1699static BOOLEAN
1873SiS_DoLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo) 1700SiS_DoLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1874{ 1701{
1875 USHORT temp,temp1,temp2; 1702 unsigned short temp, temp1, temp2;
1876 1703
1877 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12)) 1704 if((ModeNo != 0x03) && (ModeNo != 0x10) && (ModeNo != 0x12))
1878 return(TRUE); 1705 return TRUE;
1879 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11); 1706 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x11);
1880 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80); 1707 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x11,0x80);
1881 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); 1708 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1882 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55); 1709 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,0x55);
1883 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00); 1710 temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x00);
1884 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1); 1711 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,temp1);
1885 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp); 1712 SiS_SetReg(SiS_Pr->SiS_P3d4,0x11,temp);
1886 if((HwInfo->jChipType >= SIS_315H) || 1713 if((SiS_Pr->ChipType >= SIS_315H) ||
1887 (HwInfo->jChipType == SIS_300)) { 1714 (SiS_Pr->ChipType == SIS_300)) {
1888 if(temp2 == 0x55) return(FALSE); 1715 if(temp2 == 0x55) return FALSE;
1889 else return(TRUE); 1716 else return TRUE;
1890 } else { 1717 } else {
1891 if(temp2 != 0x55) return(TRUE); 1718 if(temp2 != 0x55) return TRUE;
1892 else { 1719 else {
1893 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 1720 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
1894 return(FALSE); 1721 return FALSE;
1895 } 1722 }
1896 } 1723 }
1897} 1724}
1898 1725
1899static void 1726static void
1900SiS_SetLowModeTest(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo) 1727SiS_SetLowModeTest(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
1901{ 1728{
1902 if(SiS_DoLowModeTest(SiS_Pr, ModeNo, HwInfo)) { 1729 if(SiS_DoLowModeTest(SiS_Pr, ModeNo)) {
1903 SiS_Pr->SiS_SetFlag |= LowModeTests; 1730 SiS_Pr->SiS_SetFlag |= LowModeTests;
1904 } 1731 }
1905} 1732}
1906 1733
1907/*********************************************/ 1734/*********************************************/
1908/* HELPER: ENABLE CRT1 */ 1735/* HELPER: OPEN/CLOSE CRT1 CRTC */
1909/*********************************************/ 1736/*********************************************/
1910 1737
1911static void 1738static void
1912SiS_SetupCR5x(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1739SiS_OpenCRTC(struct SiS_Private *SiS_Pr)
1740{
1741 if(IS_SIS650) {
1742 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1743 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20);
1744 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1745 } else if(IS_SIS661741660760) {
1746 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7);
1747 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f);
1748 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7);
1749 if(!SiS_Pr->SiS_ROMNew) {
1750 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1751 }
1752 }
1753}
1754
1755static void
1756SiS_CloseCRTC(struct SiS_Private *SiS_Pr)
1913{ 1757{
1914 if(IS_SIS650) { 1758#if 0 /* This locks some CRTC registers. We don't want that. */
1915 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1759 unsigned short temp1 = 0, temp2 = 0;
1916 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f); 1760
1917 if(IS_SIS651) SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x20); 1761 if(IS_SIS661741660760) {
1918 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7); 1762 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
1919 } 1763 temp1 = 0xa0; temp2 = 0x08;
1920 } else if(IS_SIS661741660760) { 1764 }
1921 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x61,0xf7); 1765 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x51,0x1f,temp1);
1922 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x51,0x1f); 1766 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x56,0xe7,temp2);
1923 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x56,0xe7); 1767 }
1924 if(!SiS_Pr->SiS_ROMNew) { 1768#endif
1925 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x3a,0xef);
1926 }
1927 }
1928} 1769}
1929 1770
1930static void 1771static void
1931SiS_HandleCRT1(SiS_Private *SiS_Pr) 1772SiS_HandleCRT1(struct SiS_Private *SiS_Pr)
1932{ 1773{
1933 /* Enable CRT1 gating */ 1774 /* Enable CRT1 gating */
1934 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf); 1775 SiS_SetRegAND(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0xbf);
1935#if 0 1776#if 0
1936 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) { 1777 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x01)) {
1937 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) || 1778 if((SiS_GetReg(SiS_Pr->SiS_P3c4,0x15) & 0x0a) ||
1938 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) { 1779 (SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x01)) {
1939 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40); 1780 SiS_SetRegOR(SiS_Pr->SiS_P3d4,SiS_Pr->SiS_MyCR63,0x40);
1940 } 1781 }
1941 } 1782 }
1942#endif 1783#endif
1943} 1784}
1944 1785
@@ -1946,57 +1787,54 @@ SiS_HandleCRT1(SiS_Private *SiS_Pr)
1946/* HELPER: GetColorDepth */ 1787/* HELPER: GetColorDepth */
1947/*********************************************/ 1788/*********************************************/
1948 1789
1949USHORT 1790unsigned short
1950SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex) 1791SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1792 unsigned short ModeIdIndex)
1951{ 1793{
1952 USHORT ColorDepth[6] = { 1, 2, 4, 4, 6, 8}; 1794 static const unsigned short ColorDepth[6] = { 1, 2, 4, 4, 6, 8 };
1953 SHORT index; 1795 unsigned short modeflag;
1954 USHORT modeflag; 1796 short index;
1955 1797
1956 /* Do NOT check UseCustomMode, will skrew up FIFO */ 1798 /* Do NOT check UseCustomMode, will skrew up FIFO */
1957 if(ModeNo == 0xfe) { 1799 if(ModeNo == 0xfe) {
1958 modeflag = SiS_Pr->CModeFlag; 1800 modeflag = SiS_Pr->CModeFlag;
1959 } else { 1801 } else if(ModeNo <= 0x13) {
1960 if(ModeNo <= 0x13) 1802 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
1961 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 1803 } else {
1962 else 1804 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1963 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 1805 }
1964 } 1806
1965 1807 index = (modeflag & ModeTypeMask) - ModeEGA;
1966 index = (modeflag & ModeTypeMask) - ModeEGA; 1808 if(index < 0) index = 0;
1967 if(index < 0) index = 0; 1809 return ColorDepth[index];
1968 return(ColorDepth[index]);
1969} 1810}
1970 1811
1971/*********************************************/ 1812/*********************************************/
1972/* HELPER: GetOffset */ 1813/* HELPER: GetOffset */
1973/*********************************************/ 1814/*********************************************/
1974 1815
1975USHORT 1816unsigned short
1976SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 1817SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1977 USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo) 1818 unsigned short ModeIdIndex, unsigned short RRTI)
1978{ 1819{
1979 USHORT xres, temp, colordepth, infoflag; 1820 unsigned short xres, temp, colordepth, infoflag;
1980 1821
1981 if(SiS_Pr->UseCustomMode) { 1822 if(SiS_Pr->UseCustomMode) {
1982 infoflag = SiS_Pr->CInfoFlag; 1823 infoflag = SiS_Pr->CInfoFlag;
1983 xres = SiS_Pr->CHDisplay; 1824 xres = SiS_Pr->CHDisplay;
1984 } else { 1825 } else {
1985 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 1826 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
1986 xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes; 1827 xres = SiS_Pr->SiS_RefIndex[RRTI].XRes;
1987 } 1828 }
1988 1829
1989 colordepth = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex); 1830 colordepth = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex);
1990 1831
1991 temp = xres / 16; 1832 temp = xres / 16;
1992 if(infoflag & InterlaceMode) temp <<= 1; 1833 if(infoflag & InterlaceMode) temp <<= 1;
1993 temp *= colordepth; 1834 temp *= colordepth;
1994 if(xres % 16) { 1835 if(xres % 16) temp += (colordepth >> 1);
1995 colordepth >>= 1; 1836
1996 temp += colordepth; 1837 return temp;
1997 }
1998
1999 return(temp);
2000} 1838}
2001 1839
2002/*********************************************/ 1840/*********************************************/
@@ -2004,55 +1842,29 @@ SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
2004/*********************************************/ 1842/*********************************************/
2005 1843
2006static void 1844static void
2007SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo) 1845SiS_SetSeqRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2008{ 1846{
2009 UCHAR SRdata; 1847 unsigned char SRdata;
2010 USHORT i; 1848 int i;
2011 1849
2012 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03); /* Set SR0 */ 1850 SiS_SetReg(SiS_Pr->SiS_P3c4,0x00,0x03);
2013 1851
2014 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0]; 1852 /* or "display off" */
1853 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[0] | 0x20;
2015 1854
2016 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1855 /* determine whether to force x8 dotclock */
2017 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 1856 if((SiS_Pr->SiS_VBType & VB_SISVB) || (SiS_Pr->SiS_IF_DEF_LVDS)) {
2018 SRdata |= 0x01;
2019 }
2020 if(HwInfo->jChipType >= SIS_661) {
2021 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2022 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2023 SRdata |= 0x01; /* 8 dot clock */
2024 }
2025 }
2026 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2027 if(SiS_Pr->SiS_VBType & VB_NoLCD) {
2028 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2029 SRdata |= 0x01; /* 8 dot clock */
2030 }
2031 }
2032 }
2033 }
2034 1857
2035 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1858 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2036 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1859 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) SRdata |= 0x01;
2037 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 1860 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) SRdata |= 0x01;
2038 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2039 SRdata |= 0x01; /* 8 dot clock */
2040 }
2041 }
2042 }
2043 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2044 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2045 SRdata |= 0x01; /* 8 dot clock */
2046 }
2047 }
2048 }
2049 1861
2050 SRdata |= 0x20; /* screen off */ 1862 }
2051 1863
2052 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata); 1864 SiS_SetReg(SiS_Pr->SiS_P3c4,0x01,SRdata);
2053 1865
2054 for(i = 2; i <= 4; i++) { 1866 for(i = 2; i <= 4; i++) {
2055 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i-1]; 1867 SRdata = SiS_Pr->SiS_StandTable[StandTableIndex].SR[i - 1];
2056 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata); 1868 SiS_SetReg(SiS_Pr->SiS_P3c4,i,SRdata);
2057 } 1869 }
2058} 1870}
@@ -2062,17 +1874,17 @@ SiS_SetSeqRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo)
2062/*********************************************/ 1874/*********************************************/
2063 1875
2064static void 1876static void
2065SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo) 1877SiS_SetMiscRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2066{ 1878{
2067 UCHAR Miscdata; 1879 unsigned char Miscdata;
2068 1880
2069 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC; 1881 Miscdata = SiS_Pr->SiS_StandTable[StandTableIndex].MISC;
2070 1882
2071 if(HwInfo->jChipType < SIS_661) { 1883 if(SiS_Pr->ChipType < SIS_661) {
2072 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1884 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2073 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 1885 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2074 Miscdata |= 0x0C; 1886 Miscdata |= 0x0C;
2075 } 1887 }
2076 } 1888 }
2077 } 1889 }
2078 1890
@@ -2084,33 +1896,34 @@ SiS_SetMiscRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, PSIS_HW_INFO HwInfo
2084/*********************************************/ 1896/*********************************************/
2085 1897
2086static void 1898static void
2087SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1899SiS_SetCRTCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2088 USHORT StandTableIndex)
2089{ 1900{
2090 UCHAR CRTCdata; 1901 unsigned char CRTCdata;
2091 USHORT i; 1902 unsigned short i;
2092 1903
2093 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* Unlock CRTC */ 1904 /* Unlock CRTC */
2094 1905 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
2095 for(i = 0; i <= 0x18; i++) { 1906
2096 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i]; 1907 for(i = 0; i <= 0x18; i++) {
2097 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); /* Set CRTC(3d4) */ 1908 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2098 } 1909 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
2099 if(HwInfo->jChipType >= SIS_661) { 1910 }
2100 SiS_SetupCR5x(SiS_Pr, HwInfo); 1911
2101 for(i = 0x13; i <= 0x14; i++) { 1912 if(SiS_Pr->ChipType >= SIS_661) {
2102 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i]; 1913 SiS_OpenCRTC(SiS_Pr);
2103 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata); 1914 for(i = 0x13; i <= 0x14; i++) {
2104 } 1915 CRTCdata = SiS_Pr->SiS_StandTable[StandTableIndex].CRTC[i];
2105 } else if( ( (HwInfo->jChipType == SIS_630) || 1916 SiS_SetReg(SiS_Pr->SiS_P3d4,i,CRTCdata);
2106 (HwInfo->jChipType == SIS_730) ) && 1917 }
2107 (HwInfo->jChipRevision >= 0x30) ) { /* for 630S0 */ 1918 } else if( ( (SiS_Pr->ChipType == SIS_630) ||
2108 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 1919 (SiS_Pr->ChipType == SIS_730) ) &&
2109 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) { 1920 (SiS_Pr->ChipRevision >= 0x30) ) {
2110 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE); 1921 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2111 } 1922 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToTV)) {
2112 } 1923 SiS_SetReg(SiS_Pr->SiS_P3d4,0x18,0xFE);
2113 } 1924 }
1925 }
1926 }
2114} 1927}
2115 1928
2116/*********************************************/ 1929/*********************************************/
@@ -2118,64 +1931,58 @@ SiS_SetCRTCRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
2118/*********************************************/ 1931/*********************************************/
2119 1932
2120static void 1933static void
2121SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex, 1934SiS_SetATTRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2122 PSIS_HW_INFO HwInfo)
2123{ 1935{
2124 UCHAR ARdata; 1936 unsigned char ARdata;
2125 USHORT i; 1937 unsigned short i;
2126 1938
2127 for(i = 0; i <= 0x13; i++) { 1939 for(i = 0; i <= 0x13; i++) {
2128 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i]; 1940 ARdata = SiS_Pr->SiS_StandTable[StandTableIndex].ATTR[i];
2129#if 0 1941
2130 if((i <= 0x0f) || (i == 0x11)) {
2131 if(ds:489 & 0x08) {
2132 continue;
2133 }
2134 }
2135#endif
2136 if(i == 0x13) { 1942 if(i == 0x13) {
2137 /* Pixel shift. If screen on LCD or TV is shifted left or right, 1943 /* Pixel shift. If screen on LCD or TV is shifted left or right,
2138 * this might be the cause. 1944 * this might be the cause.
2139 */ 1945 */
2140 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 1946 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2141 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata=0; 1947 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) ARdata = 0;
2142 } 1948 }
2143 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1949 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2144 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1950 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2145 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 1951 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2146 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1952 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2147 } 1953 }
2148 } 1954 }
2149 } 1955 }
2150 if(HwInfo->jChipType >= SIS_661) { 1956 if(SiS_Pr->ChipType >= SIS_661) {
2151 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) { 1957 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD)) {
2152 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1958 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2153 } 1959 }
2154 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 1960 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2155 if(HwInfo->jChipType >= SIS_315H) { 1961 if(SiS_Pr->ChipType >= SIS_315H) {
2156 if(IS_SIS550650740660) { 1962 if(IS_SIS550650740660) {
2157 /* 315, 330 don't do this */ 1963 /* 315, 330 don't do this */
2158 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { 1964 if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
2159 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1965 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2160 } else { 1966 } else {
2161 ARdata = 0; 1967 ARdata = 0;
2162 } 1968 }
2163 } 1969 }
2164 } else { 1970 } else {
2165 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata=0; 1971 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) ARdata = 0;
2166 } 1972 }
2167 } 1973 }
2168 } 1974 }
2169 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */ 1975 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2170 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */ 1976 SiS_SetRegByte(SiS_Pr->SiS_P3c0,i); /* set index */
2171 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */ 1977 SiS_SetRegByte(SiS_Pr->SiS_P3c0,ARdata); /* set data */
2172 } 1978 }
2173 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */ 1979
2174 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */ 1980 SiS_GetRegByte(SiS_Pr->SiS_P3da); /* reset 3da */
2175 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */ 1981 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x14); /* set index */
1982 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x00); /* set data */
2176 1983
2177 SiS_GetRegByte(SiS_Pr->SiS_P3da); 1984 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2178 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */ 1985 SiS_SetRegByte(SiS_Pr->SiS_P3c0,0x20); /* Enable Attribute */
2179 SiS_GetRegByte(SiS_Pr->SiS_P3da); 1986 SiS_GetRegByte(SiS_Pr->SiS_P3da);
2180} 1987}
2181 1988
@@ -2184,10 +1991,10 @@ SiS_SetATTRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex,
2184/*********************************************/ 1991/*********************************************/
2185 1992
2186static void 1993static void
2187SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex) 1994SiS_SetGRCRegs(struct SiS_Private *SiS_Pr, unsigned short StandTableIndex)
2188{ 1995{
2189 UCHAR GRdata; 1996 unsigned char GRdata;
2190 USHORT i; 1997 unsigned short i;
2191 1998
2192 for(i = 0; i <= 0x08; i++) { 1999 for(i = 0; i <= 0x08; i++) {
2193 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i]; 2000 GRdata = SiS_Pr->SiS_StandTable[StandTableIndex].GRC[i];
@@ -2205,22 +2012,22 @@ SiS_SetGRCRegs(SiS_Private *SiS_Pr, USHORT StandTableIndex)
2205/*********************************************/ 2012/*********************************************/
2206 2013
2207static void 2014static void
2208SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo) 2015SiS_ClearExt1Regs(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
2209{ 2016{
2210 USHORT i; 2017 unsigned short i;
2211 2018
2212 for(i = 0x0A; i <= 0x0E; i++) { 2019 for(i = 0x0A; i <= 0x0E; i++) {
2213 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00); 2020 SiS_SetReg(SiS_Pr->SiS_P3c4,i,0x00);
2214 } 2021 }
2215 2022
2216 if(HwInfo->jChipType >= SIS_315H) { 2023 if(SiS_Pr->ChipType >= SIS_315H) {
2217 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE); 2024 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x37,0xFE);
2218 if(ModeNo <= 0x13) { 2025 if(ModeNo <= 0x13) {
2219 if(ModeNo == 0x06 || ModeNo >= 0x0e) { 2026 if(ModeNo == 0x06 || ModeNo >= 0x0e) {
2220 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20); 2027 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0e,0x20);
2221 } 2028 }
2222 } 2029 }
2223 } 2030 }
2224} 2031}
2225 2032
2226/*********************************************/ 2033/*********************************************/
@@ -2228,32 +2035,24 @@ SiS_ClearExt1Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
2228/*********************************************/ 2035/*********************************************/
2229 2036
2230static void 2037static void
2231SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 2038SiS_ResetCRT1VCLK(struct SiS_Private *SiS_Pr)
2232{ 2039{
2233 if(HwInfo->jChipType >= SIS_315H) { 2040 if(SiS_Pr->ChipType >= SIS_315H) {
2234 if(HwInfo->jChipType < SIS_661) { 2041 if(SiS_Pr->ChipType < SIS_661) {
2235 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return; 2042 if(SiS_Pr->SiS_IF_DEF_LVDS == 0) return;
2236 } 2043 }
2237 } else { 2044 } else {
2238 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) && 2045 if((SiS_Pr->SiS_IF_DEF_LVDS == 0) &&
2239 (!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) { 2046 (!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) ) {
2240 return; 2047 return;
2241 } 2048 }
2242 } 2049 }
2243 2050
2244 if(HwInfo->jChipType >= SIS_315H) { 2051 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x20);
2245 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xCF,0x20);
2246 } else {
2247 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x20);
2248 }
2249 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B); 2052 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[1].SR2B);
2250 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C); 2053 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[1].SR2C);
2251 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80); 2054 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2252 if(HwInfo->jChipType >= SIS_315H) { 2055 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2253 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x31,0xcf,0x10);
2254 } else {
2255 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x10);
2256 }
2257 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B); 2056 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,SiS_Pr->SiS_VCLKData[0].SR2B);
2258 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C); 2057 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,SiS_Pr->SiS_VCLKData[0].SR2C);
2259 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80); 2058 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
@@ -2264,19 +2063,19 @@ SiS_ResetCRT1VCLK(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
2264/*********************************************/ 2063/*********************************************/
2265 2064
2266static void 2065static void
2267SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex) 2066SiS_SetCRT1Sync(struct SiS_Private *SiS_Pr, unsigned short RRTI)
2268{ 2067{
2269 USHORT sync; 2068 unsigned short sync;
2270 2069
2271 if(SiS_Pr->UseCustomMode) { 2070 if(SiS_Pr->UseCustomMode) {
2272 sync = SiS_Pr->CInfoFlag >> 8; 2071 sync = SiS_Pr->CInfoFlag >> 8;
2273 } else { 2072 } else {
2274 sync = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag >> 8; 2073 sync = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag >> 8;
2275 } 2074 }
2276 2075
2277 sync &= 0xC0; 2076 sync &= 0xC0;
2278 sync |= 0x2f; 2077 sync |= 0x2f;
2279 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync); 2078 SiS_SetRegByte(SiS_Pr->SiS_P3c2,sync);
2280} 2079}
2281 2080
2282/*********************************************/ 2081/*********************************************/
@@ -2284,72 +2083,67 @@ SiS_SetCRT1Sync(SiS_Private *SiS_Pr, USHORT RefreshRateTableIndex)
2284/*********************************************/ 2083/*********************************************/
2285 2084
2286static void 2085static void
2287SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2086SiS_SetCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2288 USHORT RefreshRateTableIndex, 2087 unsigned short ModeIdIndex, unsigned short RRTI)
2289 PSIS_HW_INFO HwInfo)
2290{ 2088{
2291 UCHAR index; 2089 unsigned short temp, i, j, modeflag;
2292 USHORT temp,i,j,modeflag; 2090 unsigned char *crt1data = NULL;
2293 2091
2294 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); /* unlock cr0-7 */ 2092 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2295 2093
2296 if(SiS_Pr->UseCustomMode) { 2094 if(SiS_Pr->UseCustomMode) {
2297 2095
2298 modeflag = SiS_Pr->CModeFlag; 2096 crt1data = &SiS_Pr->CCRT1CRTC[0];
2299 2097
2300 for(i=0,j=0;i<=7;i++,j++) { 2098 } else {
2301 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 2099
2302 } 2100 temp = SiS_GetRefCRT1CRTC(SiS_Pr, RRTI, SiS_Pr->SiS_UseWide);
2303 for(j=0x10;i<=10;i++,j++) { 2101
2304 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 2102 /* Alternate for 1600x1200 LCDA */
2305 } 2103 if((temp == 0x20) && (SiS_Pr->Alternate1600x1200)) temp = 0x57;
2306 for(j=0x15;i<=12;i++,j++) { 2104
2307 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 2105 crt1data = (unsigned char *)&SiS_Pr->SiS_CRT1Table[temp].CR[0];
2308 } 2106
2309 for(j=0x0A;i<=15;i++,j++) { 2107 }
2310 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]); 2108
2311 } 2109 /* unlock cr0-7 */
2312 2110 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
2313 temp = SiS_Pr->CCRT1CRTC[16] & 0xE0; 2111
2314 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp); 2112 for(i = 0, j = 0; i <= 7; i++, j++) {
2315 2113 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2316 temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5; 2114 }
2317 if(modeflag & DoubleScanMode) temp |= 0x80; 2115 for(j = 0x10; i <= 10; i++, j++) {
2318 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp); 2116 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2319 2117 }
2320 } else { 2118 for(j = 0x15; i <= 12; i++, j++) {
2321 2119 SiS_SetReg(SiS_Pr->SiS_P3d4,j,crt1data[i]);
2322 if(ModeNo <= 0x13) { 2120 }
2323 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 2121 for(j = 0x0A; i <= 15; i++, j++) {
2324 } else { 2122 SiS_SetReg(SiS_Pr->SiS_P3c4,j,crt1data[i]);
2325 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2123 }
2326 } 2124
2327 2125 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,crt1data[16] & 0xE0);
2328 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 2126
2329 2127 temp = (crt1data[16] & 0x01) << 5;
2330 for(i=0,j=0;i<=7;i++,j++) { 2128 if(modeflag & DoubleScanMode) temp |= 0x80;
2331 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2129 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp);
2332 } 2130
2333 for(j=0x10;i<=10;i++,j++) { 2131 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2334 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2132 SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2335 } 2133 }
2336 for(j=0x15;i<=12;i++,j++) { 2134
2337 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2135#ifdef SIS315H
2338 } 2136 if(SiS_Pr->ChipType == XGI_20) {
2339 for(j=0x0A;i<=15;i++,j++) { 2137 SiS_SetReg(SiS_Pr->SiS_P3d4,0x04,crt1data[4] - 1);
2340 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->SiS_CRT1Table[index].CR[i]); 2138 if(!(temp = crt1data[5] & 0x1f)) {
2341 } 2139 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x0c,0xfb);
2342 2140 }
2343 temp = SiS_Pr->SiS_CRT1Table[index].CR[16] & 0xE0; 2141 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x05,0xe0,((temp - 1) & 0x1f));
2344 SiS_SetReg(SiS_Pr->SiS_P3c4,0x0E,temp); 2142 temp = (crt1data[16] >> 5) + 3;
2345 2143 if(temp > 7) temp -= 7;
2346 temp = ((SiS_Pr->SiS_CRT1Table[index].CR[16]) & 0x01) << 5; 2144 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0e,0x1f,(temp << 5));
2347 if(modeflag & DoubleScanMode) temp |= 0x80; 2145 }
2348 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,temp); 2146#endif
2349
2350 }
2351
2352 if(SiS_Pr->SiS_ModeType > ModeVGA) SiS_SetReg(SiS_Pr->SiS_P3d4,0x14,0x4F);
2353} 2147}
2354 2148
2355/*********************************************/ 2149/*********************************************/
@@ -2359,33 +2153,32 @@ SiS_SetCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2359/*********************************************/ 2153/*********************************************/
2360 2154
2361static void 2155static void
2362SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2156SiS_SetCRT1Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2363 USHORT RefreshRateTableIndex, 2157 unsigned short ModeIdIndex, unsigned short RRTI)
2364 PSIS_HW_INFO HwInfo)
2365{ 2158{
2366 USHORT temp, DisplayUnit, infoflag; 2159 unsigned short temp, DisplayUnit, infoflag;
2367 2160
2368 if(SiS_Pr->UseCustomMode) { 2161 if(SiS_Pr->UseCustomMode) {
2369 infoflag = SiS_Pr->CInfoFlag; 2162 infoflag = SiS_Pr->CInfoFlag;
2370 } else { 2163 } else {
2371 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 2164 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2372 } 2165 }
2373 2166
2374 DisplayUnit = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex, 2167 DisplayUnit = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2375 RefreshRateTableIndex,HwInfo);
2376 2168
2377 temp = (DisplayUnit >> 8) & 0x0f; 2169 temp = (DisplayUnit >> 8) & 0x0f;
2378 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp); 2170 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,temp);
2379 2171
2380 temp = DisplayUnit & 0xFF; 2172 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,DisplayUnit & 0xFF);
2381 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,temp);
2382 2173
2383 if(infoflag & InterlaceMode) DisplayUnit >>= 1; 2174 if(infoflag & InterlaceMode) DisplayUnit >>= 1;
2384 2175
2385 DisplayUnit <<= 5; 2176 DisplayUnit <<= 5;
2386 temp = (DisplayUnit & 0xff00) >> 8; 2177 temp = (DisplayUnit >> 8) + 1;
2387 if(DisplayUnit & 0xff) temp++; 2178 if(DisplayUnit & 0xff) temp++;
2388 temp++; 2179 if(SiS_Pr->ChipType == XGI_20) {
2180 if(ModeNo == 0x4a || ModeNo == 0x49) temp--;
2181 }
2389 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp); 2182 SiS_SetReg(SiS_Pr->SiS_P3c4,0x10,temp);
2390} 2183}
2391 2184
@@ -2394,39 +2187,49 @@ SiS_SetCRT1Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2394/*********************************************/ 2187/*********************************************/
2395 2188
2396static void 2189static void
2397SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2190SiS_SetCRT1VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2398 PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex) 2191 unsigned short ModeIdIndex, unsigned short RRTI)
2399{ 2192{
2400 USHORT index=0, clka, clkb; 2193 unsigned short index = 0, clka, clkb;
2401 2194
2402 if(SiS_Pr->UseCustomMode) { 2195 if(SiS_Pr->UseCustomMode) {
2403 clka = SiS_Pr->CSR2B; 2196 clka = SiS_Pr->CSR2B;
2404 clkb = SiS_Pr->CSR2C; 2197 clkb = SiS_Pr->CSR2C;
2405 } else { 2198 } else {
2406 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 2199 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
2407 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 2200 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) &&
2408 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A; 2201 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2409 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B; 2202 /* Alternate for 1600x1200 LCDA */
2410 } else { 2203 if((index == 0x21) && (SiS_Pr->Alternate1600x1200)) index = 0x72;
2411 clka = SiS_Pr->SiS_VCLKData[index].SR2B; 2204 clka = SiS_Pr->SiS_VBVCLKData[index].Part4_A;
2412 clkb = SiS_Pr->SiS_VCLKData[index].SR2C; 2205 clkb = SiS_Pr->SiS_VBVCLKData[index].Part4_B;
2413 } 2206 } else {
2414 } 2207 clka = SiS_Pr->SiS_VCLKData[index].SR2B;
2415 2208 clkb = SiS_Pr->SiS_VCLKData[index].SR2C;
2416 if(HwInfo->jChipType >= SIS_315H) { 2209 }
2417 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF); 2210 }
2418 } else { 2211
2419 SiS_SetReg(SiS_Pr->SiS_P3c4,0x31,0x00); 2212 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xCF);
2420 } 2213
2421 2214 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,clka);
2422 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2B,clka); 2215 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2423 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2C,clkb); 2216
2424 2217 if(SiS_Pr->ChipType >= SIS_315H) {
2425 if(HwInfo->jChipType >= SIS_315H) { 2218#ifdef SIS315H
2426 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01); 2219 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x01);
2427 } else { 2220 if(SiS_Pr->ChipType == XGI_20) {
2428 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80); 2221 unsigned short mf = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2429 } 2222 if(mf & HalfDCLK) {
2223 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,SiS_GetReg(SiS_Pr->SiS_P3c4,0x2b));
2224 clkb = SiS_GetReg(SiS_Pr->SiS_P3c4,0x2c);
2225 clkb = (((clkb & 0x1f) << 1) + 1) | (clkb & 0xe0);
2226 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,clkb);
2227 }
2228 }
2229#endif
2230 } else {
2231 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2D,0x80);
2232 }
2430} 2233}
2431 2234
2432/*********************************************/ 2235/*********************************************/
@@ -2434,415 +2237,358 @@ SiS_SetCRT1VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2434/*********************************************/ 2237/*********************************************/
2435 2238
2436#ifdef SIS300 2239#ifdef SIS300
2437static USHORT 2240void
2438SiS_DoCalcDelay(SiS_Private *SiS_Pr, USHORT MCLK, USHORT VCLK, USHORT colordepth, USHORT key) 2241SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
2242 unsigned short *idx2)
2243{
2244 unsigned short temp1, temp2;
2245 static const unsigned char ThTiming[8] = {
2246 1, 2, 2, 3, 0, 1, 1, 2
2247 };
2248
2249 temp1 = temp2 = (SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x62) >> 1;
2250 (*idx2) = (unsigned short)(ThTiming[((temp2 >> 3) | temp1) & 0x07]);
2251 (*idx1) = (unsigned short)(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6) & 0x03;
2252 (*idx1) |= (unsigned short)(((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 4) & 0x0c));
2253 (*idx1) <<= 1;
2254}
2255
2256static unsigned short
2257SiS_GetFIFOThresholdA300(unsigned short idx1, unsigned short idx2)
2258{
2259 static const unsigned char ThLowA[8 * 3] = {
2260 61, 3,52, 5,68, 7,100,11,
2261 43, 3,42, 5,54, 7, 78,11,
2262 34, 3,37, 5,47, 7, 67,11
2263 };
2264
2265 return (unsigned short)((ThLowA[idx1 + 1] * idx2) + ThLowA[idx1]);
2266}
2267
2268unsigned short
2269SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2)
2270{
2271 static const unsigned char ThLowB[8 * 3] = {
2272 81, 4,72, 6,88, 8,120,12,
2273 55, 4,54, 6,66, 8, 90,12,
2274 42, 4,45, 6,55, 8, 75,12
2275 };
2276
2277 return (unsigned short)((ThLowB[idx1 + 1] * idx2) + ThLowB[idx1]);
2278}
2279
2280static unsigned short
2281SiS_DoCalcDelay(struct SiS_Private *SiS_Pr, unsigned short MCLK, unsigned short VCLK,
2282 unsigned short colordepth, unsigned short key)
2439{ 2283{
2440 const UCHAR ThLowA[] = { 61, 3,52, 5,68, 7,100,11, 2284 unsigned short idx1, idx2;
2441 43, 3,42, 5,54, 7, 78,11, 2285 unsigned int longtemp = VCLK * colordepth;
2442 34, 3,37, 5,47, 7, 67,11 }; 2286
2443 2287 SiS_GetFIFOThresholdIndex300(SiS_Pr, &idx1, &idx2);
2444 const UCHAR ThLowB[] = { 81, 4,72, 6,88, 8,120,12, 2288
2445 55, 4,54, 6,66, 8, 90,12, 2289 if(key == 0) {
2446 42, 4,45, 6,55, 8, 75,12 }; 2290 longtemp *= SiS_GetFIFOThresholdA300(idx1, idx2);
2447 2291 } else {
2448 const UCHAR ThTiming[] = { 1, 2, 2, 3, 0, 1, 1, 2 }; 2292 longtemp *= SiS_GetFIFOThresholdB300(idx1, idx2);
2449 2293 }
2450 USHORT tempah, tempal, tempcl, tempbx, temp; 2294 idx1 = longtemp % (MCLK * 16);
2451 ULONG longtemp; 2295 longtemp /= (MCLK * 16);
2452 2296 if(idx1) longtemp++;
2453 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18); 2297 return (unsigned short)longtemp;
2454 tempah &= 0x62;
2455 tempah >>= 1;
2456 tempal = tempah;
2457 tempah >>= 3;
2458 tempal |= tempah;
2459 tempal &= 0x07;
2460 tempcl = ThTiming[tempal];
2461 tempbx = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2462 tempbx >>= 6;
2463 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2464 tempah >>= 4;
2465 tempah &= 0x0c;
2466 tempbx |= tempah;
2467 tempbx <<= 1;
2468 if(key == 0) {
2469 tempal = ThLowA[tempbx + 1];
2470 tempal *= tempcl;
2471 tempal += ThLowA[tempbx];
2472 } else {
2473 tempal = ThLowB[tempbx + 1];
2474 tempal *= tempcl;
2475 tempal += ThLowB[tempbx];
2476 }
2477 longtemp = tempal * VCLK * colordepth;
2478 temp = longtemp % (MCLK * 16);
2479 longtemp /= (MCLK * 16);
2480 if(temp) longtemp++;
2481 return((USHORT)longtemp);
2482} 2298}
2483 2299
2484static USHORT 2300static unsigned short
2485SiS_CalcDelay(SiS_Private *SiS_Pr, USHORT VCLK, USHORT colordepth, USHORT MCLK) 2301SiS_CalcDelay(struct SiS_Private *SiS_Pr, unsigned short VCLK,
2302 unsigned short colordepth, unsigned short MCLK)
2486{ 2303{
2487 USHORT tempax, tempbx; 2304 unsigned short temp1, temp2;
2488 2305
2489 tempbx = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0); 2306 temp2 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 0);
2490 tempax = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1); 2307 temp1 = SiS_DoCalcDelay(SiS_Pr, MCLK, VCLK, colordepth, 1);
2491 if(tempax < 4) tempax = 4; 2308 if(temp1 < 4) temp1 = 4;
2492 tempax -= 4; 2309 temp1 -= 4;
2493 if(tempbx < tempax) tempbx = tempax; 2310 if(temp2 < temp1) temp2 = temp1;
2494 return(tempbx); 2311 return temp2;
2495} 2312}
2496 2313
2497static void 2314static void
2498SiS_SetCRT1FIFO_300(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo, 2315SiS_SetCRT1FIFO_300(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2499 USHORT RefreshRateTableIndex) 2316 unsigned short RefreshRateTableIndex)
2317{
2318 unsigned short ThresholdLow = 0;
2319 unsigned short temp, index, VCLK, MCLK, colorth;
2320 static const unsigned short colortharray[6] = { 1, 1, 2, 2, 3, 4 };
2321
2322 if(ModeNo > 0x13) {
2323
2324 /* Get VCLK */
2325 if(SiS_Pr->UseCustomMode) {
2326 VCLK = SiS_Pr->CSRClock;
2327 } else {
2328 index = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2329 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2330 }
2331
2332 /* Get half colordepth */
2333 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2334
2335 /* Get MCLK */
2336 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A) & 0x07;
2337 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
2338
2339 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xc3;
2340 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,temp);
2341
2342 do {
2343 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK) + 1;
2344 if(ThresholdLow < 0x13) break;
2345 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2346 ThresholdLow = 0x13;
2347 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) >> 6;
2348 if(!temp) break;
2349 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,((temp - 1) << 6));
2350 } while(0);
2351
2352 } else ThresholdLow = 2;
2353
2354 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2355 temp = (ThresholdLow << 4) | 0x0f;
2356 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2357
2358 temp = (ThresholdLow & 0x10) << 1;
2359 if(ModeNo > 0x13) temp |= 0x40;
2360 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2361
2362 /* What is this? */
2363 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2364
2365 /* Write CRT/CPU threshold high */
2366 temp = ThresholdLow + 3;
2367 if(temp > 0x0f) temp = 0x0f;
2368 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2369}
2370
2371unsigned short
2372SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index)
2500{ 2373{
2501 USHORT ThresholdLow = 0; 2374 static const unsigned char LatencyFactor[] = {
2502 USHORT index, VCLK, MCLK, colorth=0; 2375 97, 88, 86, 79, 77, 0, /* 64 bit BQ=2 */
2503 USHORT tempah, temp; 2376 0, 87, 85, 78, 76, 54, /* 64 bit BQ=1 */
2504 2377 97, 88, 86, 79, 77, 0, /* 128 bit BQ=2 */
2505 if(ModeNo > 0x13) { 2378 0, 79, 77, 70, 68, 48, /* 128 bit BQ=1 */
2506 2379 80, 72, 69, 63, 61, 0, /* 64 bit BQ=2 */
2507 if(SiS_Pr->UseCustomMode) { 2380 0, 70, 68, 61, 59, 37, /* 64 bit BQ=1 */
2508 VCLK = SiS_Pr->CSRClock; 2381 86, 77, 75, 68, 66, 0, /* 128 bit BQ=2 */
2509 } else { 2382 0, 68, 66, 59, 57, 37 /* 128 bit BQ=1 */
2510 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 2383 };
2511 index &= 0x3F; 2384 static const unsigned char LatencyFactor730[] = {
2512 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ 2385 69, 63, 61,
2513 } 2386 86, 79, 77,
2514 2387 103, 96, 94,
2515 switch (SiS_Pr->SiS_ModeType - ModeEGA) { /* Get half colordepth */ 2388 120,113,111,
2516 case 0 : colorth = 1; break; 2389 137,130,128
2517 case 1 : colorth = 1; break; 2390 };
2518 case 2 : colorth = 2; break; 2391
2519 case 3 : colorth = 2; break; 2392 if(SiS_Pr->ChipType == SIS_730) {
2520 case 4 : colorth = 3; break; 2393 return (unsigned short)LatencyFactor730[index];
2521 case 5 : colorth = 4; break; 2394 } else {
2522 } 2395 return (unsigned short)LatencyFactor[index];
2523 2396 }
2524 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A);
2525 index &= 0x07;
2526 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2527
2528 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
2529 tempah &= 0xc3;
2530 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3c,tempah);
2531
2532 do {
2533 ThresholdLow = SiS_CalcDelay(SiS_Pr, VCLK, colorth, MCLK);
2534 ThresholdLow++;
2535 if(ThresholdLow < 0x13) break;
2536 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x16,0xfc);
2537 ThresholdLow = 0x13;
2538 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
2539 tempah >>= 6;
2540 if(!(tempah)) break;
2541 tempah--;
2542 tempah <<= 6;
2543 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x16,0x3f,tempah);
2544 } while(0);
2545
2546 } else ThresholdLow = 2;
2547
2548 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2549 temp = (ThresholdLow << 4) | 0x0f;
2550 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,temp);
2551
2552 temp = (ThresholdLow & 0x10) << 1;
2553 if(ModeNo > 0x13) temp |= 0x40;
2554 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0f,0x9f,temp);
2555
2556 /* What is this? */
2557 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2558
2559 /* Write CRT/CPU threshold high */
2560 temp = ThresholdLow + 3;
2561 if(temp > 0x0f) temp = 0x0f;
2562 SiS_SetReg(SiS_Pr->SiS_P3c4,0x09,temp);
2563} 2397}
2564 2398
2565static USHORT 2399static unsigned short
2566SiS_CalcDelay2(SiS_Private *SiS_Pr, UCHAR key, PSIS_HW_INFO HwInfo) 2400SiS_CalcDelay2(struct SiS_Private *SiS_Pr, unsigned char key)
2567{ 2401{
2568 USHORT data,index; 2402 unsigned short index;
2569 const UCHAR LatencyFactor[] = { 2403
2570 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */ 2404 if(SiS_Pr->ChipType == SIS_730) {
2571 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */ 2405 index = ((key & 0x0f) * 3) + ((key & 0xc0) >> 6);
2572 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */ 2406 } else {
2573 00, 79, 77, 70, 68, 48, /*; 128 bit BQ=1 */ 2407 index = (key & 0xe0) >> 5;
2574 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */ 2408 if(key & 0x10) index += 6;
2575 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */ 2409 if(!(key & 0x01)) index += 24;
2576 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */ 2410 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80) index += 12;
2577 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */ 2411 }
2578 }; 2412 return SiS_GetLatencyFactor630(SiS_Pr, index);
2579 const UCHAR LatencyFactor730[] = {
2580 69, 63, 61,
2581 86, 79, 77,
2582 103, 96, 94,
2583 120,113,111,
2584 137,130,128, /* --- Table ends with this entry, data below */
2585 137,130,128, /* to avoid using illegal values */
2586 137,130,128,
2587 137,130,128,
2588 137,130,128,
2589 137,130,128,
2590 137,130,128,
2591 137,130,128,
2592 137,130,128,
2593 137,130,128,
2594 137,130,128,
2595 137,130,128,
2596 };
2597
2598 if(HwInfo->jChipType == SIS_730) {
2599 index = ((key & 0x0f) * 3) + ((key & 0xC0) >> 6);
2600 data = LatencyFactor730[index];
2601 } else {
2602 index = (key & 0xE0) >> 5;
2603 if(key & 0x10) index +=6;
2604 if(!(key & 0x01)) index += 24;
2605 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
2606 if(data & 0x0080) index += 12;
2607 data = LatencyFactor[index];
2608 }
2609 return(data);
2610} 2413}
2611 2414
2612static void 2415static void
2613SiS_SetCRT1FIFO_630(SiS_Private *SiS_Pr, USHORT ModeNo, 2416SiS_SetCRT1FIFO_630(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2614 PSIS_HW_INFO HwInfo, 2417 unsigned short RefreshRateTableIndex)
2615 USHORT RefreshRateTableIndex)
2616{ 2418{
2617 USHORT i,index,data,VCLK,MCLK,colorth=0; 2419 unsigned short ThresholdLow = 0;
2618 ULONG B,eax,bl,data2; 2420 unsigned short i, data, VCLK, MCLK16, colorth = 0;
2619 USHORT ThresholdLow=0; 2421 unsigned int templ, datal;
2620 UCHAR FQBQData[]= { 2422 const unsigned char *queuedata = NULL;
2621 0x01,0x21,0x41,0x61,0x81, 2423 static const unsigned char FQBQData[21] = {
2622 0x31,0x51,0x71,0x91,0xb1, 2424 0x01,0x21,0x41,0x61,0x81,
2623 0x00,0x20,0x40,0x60,0x80, 2425 0x31,0x51,0x71,0x91,0xb1,
2624 0x30,0x50,0x70,0x90,0xb0, 2426 0x00,0x20,0x40,0x60,0x80,
2625 0xFF 2427 0x30,0x50,0x70,0x90,0xb0,
2626 }; 2428 0xff
2627 UCHAR FQBQData730[]= { 2429 };
2628 0x34,0x74,0xb4, 2430 static const unsigned char FQBQData730[16] = {
2629 0x23,0x63,0xa3, 2431 0x34,0x74,0xb4,
2630 0x12,0x52,0x92, 2432 0x23,0x63,0xa3,
2631 0x01,0x41,0x81, 2433 0x12,0x52,0x92,
2632 0x00,0x40,0x80, 2434 0x01,0x41,0x81,
2633 0xff 2435 0x00,0x40,0x80,
2634 }; 2436 0xff
2635 2437 };
2636 i=0; 2438 static const unsigned short colortharray[6] = {
2637 if(ModeNo > 0x13) { 2439 1, 1, 2, 2, 3, 4
2638 if(SiS_Pr->UseCustomMode) { 2440 };
2639 VCLK = SiS_Pr->CSRClock;
2640 } else {
2641 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2642 index &= 0x3F;
2643 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
2644 }
2645
2646 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A);
2647 index &= 0x07;
2648 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */
2649
2650 data2 = SiS_Pr->SiS_ModeType - ModeEGA; /* Get half colordepth */
2651 switch (data2) {
2652 case 0 : colorth = 1; break;
2653 case 1 : colorth = 1; break;
2654 case 2 : colorth = 2; break;
2655 case 3 : colorth = 2; break;
2656 case 4 : colorth = 3; break;
2657 case 5 : colorth = 4; break;
2658 }
2659
2660 if(HwInfo->jChipType == SIS_730) {
2661
2662 do {
2663 B = SiS_CalcDelay2(SiS_Pr, FQBQData730[i], HwInfo) * VCLK * colorth;
2664 bl = B / (MCLK * 16);
2665
2666 if(B == bl * 16 * MCLK) {
2667 bl = bl + 1;
2668 } else {
2669 bl = bl + 2;
2670 }
2671
2672 if(bl > 0x13) {
2673 if(FQBQData730[i+1] == 0xFF) {
2674 ThresholdLow = 0x13;
2675 break;
2676 }
2677 i++;
2678 } else {
2679 ThresholdLow = bl;
2680 break;
2681 }
2682 } while(FQBQData730[i] != 0xFF);
2683 2441
2684 } else { 2442 i = 0;
2685 2443
2686 do { 2444 if(ModeNo > 0x13) {
2687 B = SiS_CalcDelay2(SiS_Pr, FQBQData[i], HwInfo) * VCLK * colorth;
2688 bl = B / (MCLK * 16);
2689 2445
2690 if(B == bl * 16 * MCLK) { 2446 /* Get VCLK */
2691 bl = bl + 1; 2447 if(SiS_Pr->UseCustomMode) {
2692 } else { 2448 VCLK = SiS_Pr->CSRClock;
2693 bl = bl + 2; 2449 } else {
2694 } 2450 data = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWide);
2451 VCLK = SiS_Pr->SiS_VCLKData[data].CLOCK;
2452 }
2695 2453
2696 if(bl > 0x13) { 2454 /* Get MCLK * 16 */
2697 if(FQBQData[i+1] == 0xFF) { 2455 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A) & 0x07;
2698 ThresholdLow = 0x13; 2456 MCLK16 = SiS_Pr->SiS_MCLKData_0[data].CLOCK * 16;
2699 break; 2457
2700 } 2458 /* Get half colordepth */
2701 i++; 2459 colorth = colortharray[(SiS_Pr->SiS_ModeType - ModeEGA)];
2702 } else { 2460
2703 ThresholdLow = bl; 2461 if(SiS_Pr->ChipType == SIS_730) {
2704 break; 2462 queuedata = &FQBQData730[0];
2705 } 2463 } else {
2706 } while(FQBQData[i] != 0xFF); 2464 queuedata = &FQBQData[0];
2707 } 2465 }
2708 } 2466
2709 else { 2467 do {
2710 if(HwInfo->jChipType == SIS_730) { 2468 templ = SiS_CalcDelay2(SiS_Pr, queuedata[i]) * VCLK * colorth;
2711 } else { 2469
2712 i = 9; 2470 datal = templ % MCLK16;
2713 } 2471 templ = (templ / MCLK16) + 1;
2714 ThresholdLow = 0x02; 2472 if(datal) templ++;
2715 } 2473
2474 if(templ > 0x13) {
2475 if(queuedata[i + 1] == 0xFF) {
2476 ThresholdLow = 0x13;
2477 break;
2478 }
2479 i++;
2480 } else {
2481 ThresholdLow = templ;
2482 break;
2483 }
2484 } while(queuedata[i] != 0xFF);
2485
2486 } else {
2487
2488 if(SiS_Pr->ChipType != SIS_730) i = 9;
2489 ThresholdLow = 0x02;
2490
2491 }
2492
2493 /* Write CRT/CPU threshold low, CRT/Engine threshold high */
2494 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2495 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2496
2497 data = (ThresholdLow & 0x10) << 1;
2498 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data);
2499
2500 /* What is this? */
2501 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2502
2503 /* Write CRT/CPU threshold high (gap = 3) */
2504 data = ThresholdLow + 3;
2505 if(data > 0x0f) data = 0x0f;
2506 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data);
2716 2507
2717 /* Write foreground and background queue */ 2508 /* Write foreground and background queue */
2718 if(HwInfo->jChipType == SIS_730) { 2509#ifdef SIS_LINUX_KERNEL
2719 2510 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
2720 data2 = FQBQData730[i];
2721 data2 = (data2 & 0xC0) >> 5;
2722 data2 <<= 8;
2723
2724#ifdef LINUX_KERNEL
2725 SiS_SetRegLong(0xcf8,0x80000050);
2726 eax = SiS_GetRegLong(0xcfc);
2727 eax &= 0xfffff9ff;
2728 eax |= data2;
2729 SiS_SetRegLong(0xcfc,eax);
2730#else 2511#else
2731 /* We use pci functions X offers. We use pcitag 0, because 2512 templ = pciReadLong(0x00000000, 0x50);
2732 * we want to read/write to the host bridge (which is always
2733 * 00:00.0 on 630, 730 and 540), not the VGA device.
2734 */
2735 eax = pciReadLong(0x00000000, 0x50);
2736 eax &= 0xfffff9ff;
2737 eax |= data2;
2738 pciWriteLong(0x00000000, 0x50, eax);
2739#endif 2513#endif
2740 2514
2741 /* Write GUI grant timer (PCI config 0xA3) */ 2515 if(SiS_Pr->ChipType == SIS_730) {
2742 data2 = FQBQData730[i] << 8;
2743 data2 = (data2 & 0x0f00) | ((data2 & 0x3000) >> 8);
2744 data2 <<= 20;
2745
2746#ifdef LINUX_KERNEL
2747 SiS_SetRegLong(0xcf8,0x800000A0);
2748 eax = SiS_GetRegLong(0xcfc);
2749 eax &= 0x00ffffff;
2750 eax |= data2;
2751 SiS_SetRegLong(0xcfc,eax);
2752#else
2753 eax = pciReadLong(0x00000000, 0xA0);
2754 eax &= 0x00ffffff;
2755 eax |= data2;
2756 pciWriteLong(0x00000000, 0xA0, eax);
2757#endif
2758 2516
2759 } else { 2517 templ &= 0xfffff9ff;
2518 templ |= ((queuedata[i] & 0xc0) << 3);
2760 2519
2761 data2 = FQBQData[i]; 2520 } else {
2762 data2 = (data2 & 0xf0) >> 4;
2763 data2 <<= 24;
2764 2521
2765#ifdef LINUX_KERNEL 2522 templ &= 0xf0ffffff;
2766 SiS_SetRegLong(0xcf8,0x80000050); 2523 if( (ModeNo <= 0x13) &&
2767 eax = SiS_GetRegLong(0xcfc); 2524 (SiS_Pr->ChipType == SIS_630) &&
2768 eax &= 0xf0ffffff; 2525 (SiS_Pr->ChipRevision >= 0x30) ) {
2769 eax |= data2; 2526 templ |= 0x0b000000;
2770 SiS_SetRegLong(0xcfc,eax); 2527 } else {
2771#else 2528 templ |= ((queuedata[i] & 0xf0) << 20);
2772 eax = pciReadLong(0x00000000, 0x50); 2529 }
2773 eax &= 0xf0ffffff; 2530
2774 eax |= data2; 2531 }
2775 pciWriteLong(0x00000000, 0x50, eax);
2776#endif
2777 2532
2778 /* Write GUI grant timer (PCI config 0xA3) */ 2533#ifdef SIS_LINUX_KERNEL
2779 data2 = FQBQData[i]; 2534 sisfb_write_nbridge_pci_dword(SiS_Pr, 0x50, templ);
2780 data2 &= 0x0f; 2535 templ = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xA0);
2781 data2 <<= 24;
2782
2783#ifdef LINUX_KERNEL
2784 SiS_SetRegLong(0xcf8,0x800000A0);
2785 eax = SiS_GetRegLong(0xcfc);
2786 eax &= 0xf0ffffff;
2787 eax |= data2;
2788 SiS_SetRegLong(0xcfc,eax);
2789#else 2536#else
2790 eax = pciReadLong(0x00000000, 0xA0); 2537 pciWriteLong(0x00000000, 0x50, templ);
2791 eax &= 0xf0ffffff; 2538 templ = pciReadLong(0x00000000, 0xA0);
2792 eax |= data2;
2793 pciWriteLong(0x00000000, 0xA0, eax);
2794#endif 2539#endif
2795 2540
2796 } 2541 /* GUI grant timer (PCI config 0xA3) */
2542 if(SiS_Pr->ChipType == SIS_730) {
2543
2544 templ &= 0x00ffffff;
2545 datal = queuedata[i] << 8;
2546 templ |= (((datal & 0x0f00) | ((datal & 0x3000) >> 8)) << 20);
2797 2547
2798 /* Write CRT/CPU threshold low, CRT/Engine threshold high */ 2548 } else {
2799 data = ((ThresholdLow & 0x0f) << 4) | 0x0f;
2800 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,data);
2801 2549
2802 data = (ThresholdLow & 0x10) << 1; 2550 templ &= 0xf0ffffff;
2803 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xDF,data); 2551 templ |= ((queuedata[i] & 0x0f) << 24);
2804 2552
2805 /* What is this? */ 2553 }
2806 SiS_SetReg(SiS_Pr->SiS_P3c4,0x3B,0x09);
2807 2554
2808 /* Write CRT/CPU threshold high (gap = 3) */ 2555#ifdef SIS_LINUX_KERNEL
2809 data = ThresholdLow + 3; 2556 sisfb_write_nbridge_pci_dword(SiS_Pr, 0xA0, templ);
2810 if(data > 0x0f) data = 0x0f; 2557#else
2811 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x09,0x80,data); 2558 pciWriteLong(0x00000000, 0xA0, templ);
2812}
2813#endif 2559#endif
2560}
2561#endif /* SIS300 */
2814 2562
2815#ifdef SIS315H 2563#ifdef SIS315H
2816static void 2564static void
2817SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2565SiS_SetCRT1FIFO_310(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2818 PSIS_HW_INFO HwInfo)
2819{ 2566{
2820 USHORT modeflag; 2567 unsigned short modeflag;
2821 2568
2822 /* disable auto-threshold */ 2569 /* disable auto-threshold */
2823 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE); 2570 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x3D,0xFE);
2824 2571
2825 if(SiS_Pr->UseCustomMode) { 2572 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2826 modeflag = SiS_Pr->CModeFlag; 2573
2827 } else { 2574 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE);
2828 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2575 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0);
2829 } 2576 if(ModeNo > 0x13) {
2830 2577 if(SiS_Pr->ChipType >= XGI_20) {
2831 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0xAE); 2578 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2832 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x09,0xF0); 2579 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2833 if(ModeNo > 0x13) { 2580 } else if(SiS_Pr->ChipType >= SIS_661) {
2834 if(HwInfo->jChipType >= SIS_661) { 2581 if(!(modeflag & HalfDCLK)) {
2835 if(!(modeflag & HalfDCLK)) { 2582 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2836 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34); 2583 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2837 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01); 2584 }
2838 } 2585 } else {
2839 } else { 2586 if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) {
2840 if((!(modeflag & DoubleScanMode)) || (!(modeflag & HalfDCLK))) { 2587 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34);
2841 SiS_SetReg(SiS_Pr->SiS_P3c4,0x08,0x34); 2588 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01);
2842 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x3D,0x01); 2589 }
2843 } 2590 }
2844 } 2591 }
2845 }
2846} 2592}
2847#endif 2593#endif
2848 2594
@@ -2851,385 +2597,370 @@ SiS_SetCRT1FIFO_310(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2851/*********************************************/ 2597/*********************************************/
2852 2598
2853static void 2599static void
2854SiS_SetVCLKState(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2600SiS_SetVCLKState(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2855 USHORT ModeNo, USHORT RefreshRateTableIndex, 2601 unsigned short RefreshRateTableIndex, unsigned short ModeIdIndex)
2856 USHORT ModeIdIndex)
2857{ 2602{
2858 USHORT data=0, VCLK=0, index=0; 2603 unsigned short data = 0, VCLK = 0, index = 0;
2859 2604
2860 if(ModeNo > 0x13) { 2605 if(ModeNo > 0x13) {
2861 if(SiS_Pr->UseCustomMode) { 2606 if(SiS_Pr->UseCustomMode) {
2862 VCLK = SiS_Pr->CSRClock; 2607 VCLK = SiS_Pr->CSRClock;
2863 } else { 2608 } else {
2864 index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex, 2609 index = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
2865 RefreshRateTableIndex,HwInfo); 2610 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
2866 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; 2611 }
2867 } 2612 }
2868 }
2869
2870 if(HwInfo->jChipType < SIS_315H) {
2871
2872 if(VCLK > 150) data |= 0x80;
2873 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2874
2875 data = 0x00;
2876 if(VCLK >= 150) data |= 0x08;
2877 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2878 2613
2879 } else { 2614 if(SiS_Pr->ChipType < SIS_315H) {
2615#ifdef SIS300
2616 if(VCLK > 150) data |= 0x80;
2617 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0x7B,data);
2880 2618
2881 if(VCLK >= 166) data |= 0x0c; 2619 data = 0x00;
2882 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data); 2620 if(VCLK >= 150) data |= 0x08;
2621 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xF7,data);
2622#endif
2623 } else if(SiS_Pr->ChipType < XGI_20) {
2624#ifdef SIS315H
2625 if(VCLK >= 166) data |= 0x0c;
2626 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2883 2627
2884 if(VCLK >= 166) { 2628 if(VCLK >= 166) {
2885 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7); 2629 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1f,0xe7);
2886 } 2630 }
2887 } 2631#endif
2632 } else {
2633#ifdef SIS315H
2634 if(VCLK >= 200) data |= 0x0c;
2635 if(SiS_Pr->ChipType == XGI_20) data &= ~0x04;
2636 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x32,0xf3,data);
2637 if(SiS_Pr->ChipType != XGI_20) {
2638 data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xe7;
2639 if(VCLK < 200) data |= 0x10;
2640 SiS_SetReg(SiS_Pr->SiS_P3c4,0x1f,data);
2641 }
2642#endif
2643 }
2888 2644
2889 /* DAC speed */ 2645 /* DAC speed */
2890 if(HwInfo->jChipType >= SIS_661) { 2646 if(SiS_Pr->ChipType >= SIS_661) {
2891 2647
2892 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10); 2648 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xE8,0x10);
2893 2649
2894 } else { 2650 } else {
2895 2651
2896 data = 0x03; 2652 data = 0x03;
2897 if((VCLK >= 135) && (VCLK < 160)) data = 0x02; 2653 if(VCLK >= 260) data = 0x00;
2898 else if((VCLK >= 160) && (VCLK < 260)) data = 0x01; 2654 else if(VCLK >= 160) data = 0x01;
2899 else if(VCLK >= 260) data = 0x00; 2655 else if(VCLK >= 135) data = 0x02;
2900 2656
2901 if(HwInfo->jChipType == SIS_540) { 2657 if(SiS_Pr->ChipType == SIS_540) {
2902 if((VCLK == 203) || (VCLK < 234)) data = 0x02; 2658 if((VCLK == 203) || (VCLK < 234)) data = 0x02;
2903 } 2659 }
2904 2660
2905 if(HwInfo->jChipType < SIS_315H) { 2661 if(SiS_Pr->ChipType < SIS_315H) {
2906 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data); 2662 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xFC,data);
2907 } else { 2663 } else {
2908 if(HwInfo->jChipType > SIS_315PRO) { 2664 if(SiS_Pr->ChipType > SIS_315PRO) {
2909 if(ModeNo > 0x13) data &= 0xfc; 2665 if(ModeNo > 0x13) data &= 0xfc;
2910 } 2666 }
2911 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data); 2667 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x07,0xF8,data);
2912 } 2668 }
2913 2669
2914 } 2670 }
2915} 2671}
2916 2672
2917static void 2673static void
2918SiS_SetCRT1ModeRegs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2674SiS_SetCRT1ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2919 USHORT ModeNo,USHORT ModeIdIndex,USHORT RefreshRateTableIndex) 2675 unsigned short ModeIdIndex, unsigned short RRTI)
2920{ 2676{
2921 USHORT data,infoflag=0,modeflag; 2677 unsigned short data, infoflag = 0, modeflag, resindex;
2922 USHORT resindex,xres;
2923#ifdef SIS315H 2678#ifdef SIS315H
2924 USHORT data2,data3; 2679 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
2925 ULONG longdata; 2680 unsigned short data2, data3;
2926 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase;
2927#endif 2681#endif
2928 2682
2929 if(SiS_Pr->UseCustomMode) { 2683 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2930 modeflag = SiS_Pr->CModeFlag; 2684
2931 infoflag = SiS_Pr->CInfoFlag; 2685 if(SiS_Pr->UseCustomMode) {
2932 xres = SiS_Pr->CHDisplay; 2686 infoflag = SiS_Pr->CInfoFlag;
2933 } else { 2687 } else {
2934 resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex); 2688 resindex = SiS_GetResInfo(SiS_Pr, ModeNo, ModeIdIndex);
2935 if(ModeNo > 0x13) { 2689 if(ModeNo > 0x13) {
2936 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2690 infoflag = SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag;
2937 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 2691 }
2938 xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal; 2692 }
2939 } else { 2693
2940 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 2694 /* Disable DPMS */
2941 xres = SiS_Pr->SiS_StResInfo[resindex].HTotal; 2695 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F);
2942 } 2696
2943 } 2697 data = 0;
2944 2698 if(ModeNo > 0x13) {
2945 /* Disable DPMS */ 2699 if(SiS_Pr->SiS_ModeType > ModeEGA) {
2946 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1F,0x3F); 2700 data |= 0x02;
2947 2701 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2);
2948 data = 0; 2702 }
2949 if(ModeNo > 0x13) { 2703 if(infoflag & InterlaceMode) data |= 0x20;
2950 if(SiS_Pr->SiS_ModeType > ModeEGA) { 2704 }
2951 data |= 0x02; 2705 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data);
2952 data |= ((SiS_Pr->SiS_ModeType - ModeVGA) << 2); 2706
2953 } 2707 if(SiS_Pr->ChipType != SIS_300) {
2954 if(infoflag & InterlaceMode) data |= 0x20; 2708 data = 0;
2955 } 2709 if(infoflag & InterlaceMode) {
2956 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x06,0xC0,data); 2710 /* data = (Hsync / 8) - ((Htotal / 8) / 2) + 3 */
2957 2711 int hrs = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x04) |
2958 if(HwInfo->jChipType != SIS_300) { 2712 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2)) - 3;
2959 data = 0; 2713 int hto = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x00) |
2960 if(infoflag & InterlaceMode) { 2714 ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0x03) << 8)) + 5;
2961 if(xres <= 800) data = 0x0020; 2715 data = hrs - (hto >> 1) + 3;
2962 else if(xres <= 1024) data = 0x0035; 2716 }
2963 else data = 0x0048; 2717 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,data);
2964 } 2718 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,((data >> 8) & 0x03));
2965 SiS_SetReg(SiS_Pr->SiS_P3d4,0x19,(data & 0xFF)); 2719 }
2966 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x1a,0xFC,(data >> 8)); 2720
2967 } 2721 if(modeflag & HalfDCLK) {
2968 2722 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08);
2969 if(modeflag & HalfDCLK) { 2723 }
2970 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x08); 2724
2971 } 2725 data = 0;
2972 2726 if(modeflag & LineCompareOff) data = 0x08;
2973 data = 0; 2727 if(SiS_Pr->ChipType == SIS_300) {
2974 if(modeflag & LineCompareOff) data = 0x08; 2728 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data);
2975 if(HwInfo->jChipType == SIS_300) { 2729 } else {
2976 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xF7,data); 2730 if(SiS_Pr->ChipType >= XGI_20) data |= 0x20;
2977 } else { 2731 if(SiS_Pr->SiS_ModeType == ModeEGA) {
2978 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data); 2732 if(ModeNo > 0x13) {
2979 if(SiS_Pr->SiS_ModeType == ModeEGA) { 2733 data |= 0x40;
2980 if(ModeNo > 0x13) { 2734 }
2981 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x0F,0x40); 2735 }
2982 } 2736 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0F,0xB7,data);
2983 } 2737 }
2984 }
2985
2986 if(HwInfo->jChipType >= SIS_661) {
2987 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2988 }
2989 2738
2990#ifdef SIS315H 2739#ifdef SIS315H
2991 if(HwInfo->jChipType == SIS_315PRO) { 2740 if(SiS_Pr->ChipType >= SIS_315H) {
2992 2741 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x31,0xfb);
2993 data = SiS_Get310DRAMType(SiS_Pr, HwInfo); 2742 }
2994 data = SiS_Pr->SiS_SR15[2][data];
2995 if(SiS_Pr->SiS_ModeType == ModeText) {
2996 data &= 0xc7;
2997 } else {
2998 data2 = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,
2999 RefreshRateTableIndex,HwInfo);
3000 data2 >>= 1;
3001 if(infoflag & InterlaceMode) data2 >>= 1;
3002 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1;
3003 if(!data3) data3++;
3004 data2 /= data3;
3005 if(data2 >= 0x50) {
3006 data &= 0x0f;
3007 data |= 0x50;
3008 }
3009 }
3010 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3011
3012 } else if( (HwInfo->jChipType == SIS_330) ||
3013 ((HwInfo->jChipType == SIS_760) && (SiS_Pr->SiS_SysFlags & SF_760LFB))) {
3014
3015 data = SiS_Get310DRAMType(SiS_Pr, HwInfo);
3016 if(HwInfo->jChipType == SIS_330) {
3017 data = SiS_Pr->SiS_SR15[2][data];
3018 } else {
3019 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
3020 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
3021 else data = 0xba;
3022 }
3023 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
3024 data &= 0xc7;
3025 } else {
3026 if(SiS_Pr->UseCustomMode) {
3027 data2 = SiS_Pr->CSRClock;
3028 } else {
3029 data2 = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,
3030 RefreshRateTableIndex,HwInfo);
3031 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
3032 }
3033 2743
3034 data3 = SiS_GetColorDepth(SiS_Pr,ModeNo,ModeIdIndex) >> 1; 2744 if(SiS_Pr->ChipType == SIS_315PRO) {
3035 if(data3) data2 *= data3; 2745
3036 2746 data = SiS_Pr->SiS_SR15[(2 * 4) + SiS_Get310DRAMType(SiS_Pr)];
3037 longdata = SiS_GetMCLK(SiS_Pr, HwInfo) * 1024; 2747 if(SiS_Pr->SiS_ModeType == ModeText) {
3038 2748 data &= 0xc7;
3039 data2 = longdata / data2; 2749 } else {
3040 2750 data2 = SiS_GetOffset(SiS_Pr, ModeNo, ModeIdIndex, RRTI) >> 1;
3041 if(HwInfo->jChipType == SIS_330) { 2751 if(infoflag & InterlaceMode) data2 >>= 1;
3042 if(SiS_Pr->SiS_ModeType != Mode16Bpp) { 2752 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
3043 if (data2 >= 0x19c) data = 0xba; 2753 if(data3) data2 /= data3;
3044 else if(data2 >= 0x140) data = 0x7a; 2754 if(data2 >= 0x50) {
3045 else if(data2 >= 0x101) data = 0x3a; 2755 data &= 0x0f;
3046 else if(data2 >= 0xf5) data = 0x32; 2756 data |= 0x50;
3047 else if(data2 >= 0xe2) data = 0x2a; 2757 }
3048 else if(data2 >= 0xc4) data = 0x22; 2758 }
3049 else if(data2 >= 0xac) data = 0x1a; 2759 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
3050 else if(data2 >= 0x9e) data = 0x12; 2760
3051 else if(data2 >= 0x8e) data = 0x0a; 2761 } else if((SiS_Pr->ChipType == SIS_330) || (SiS_Pr->SiS_SysFlags & SF_760LFB)) {
3052 else data = 0x02; 2762
3053 } else { 2763 data = SiS_Get310DRAMType(SiS_Pr);
3054 if(data2 >= 0x127) data = 0xba; 2764 if(SiS_Pr->ChipType == SIS_330) {
3055 else data = 0x7a; 2765 data = SiS_Pr->SiS_SR15[(2 * 4) + data];
3056 } 2766 } else {
3057 } else { /* 760+LFB */ 2767 if(SiS_Pr->SiS_ROMNew) data = ROMAddr[0xf6];
3058 if (data2 >= 0x190) data = 0xba; 2768 else if(SiS_Pr->SiS_UseROM) data = ROMAddr[0x100 + data];
3059 else if(data2 >= 0xff) data = 0x7a; 2769 else data = 0xba;
3060 else if(data2 >= 0xd3) data = 0x3a; 2770 }
3061 else if(data2 >= 0xa9) data = 0x1a; 2771 if(SiS_Pr->SiS_ModeType <= ModeEGA) {
3062 else if(data2 >= 0x93) data = 0x0a; 2772 data &= 0xc7;
3063 else data = 0x02; 2773 } else {
3064 } 2774 if(SiS_Pr->UseCustomMode) {
3065 } 2775 data2 = SiS_Pr->CSRClock;
3066 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data); 2776 } else {
3067 } else if(HwInfo->jChipType == SIS_340) { 2777 data2 = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
3068 /* TODO */ 2778 data2 = SiS_Pr->SiS_VCLKData[data2].CLOCK;
3069 } 2779 }
2780
2781 data3 = SiS_GetColorDepth(SiS_Pr, ModeNo, ModeIdIndex) >> 1;
2782 if(data3) data2 *= data3;
2783
2784 data2 = ((unsigned int)(SiS_GetMCLK(SiS_Pr) * 1024)) / data2;
2785
2786 if(SiS_Pr->ChipType == SIS_330) {
2787 if(SiS_Pr->SiS_ModeType != Mode16Bpp) {
2788 if (data2 >= 0x19c) data = 0xba;
2789 else if(data2 >= 0x140) data = 0x7a;
2790 else if(data2 >= 0x101) data = 0x3a;
2791 else if(data2 >= 0xf5) data = 0x32;
2792 else if(data2 >= 0xe2) data = 0x2a;
2793 else if(data2 >= 0xc4) data = 0x22;
2794 else if(data2 >= 0xac) data = 0x1a;
2795 else if(data2 >= 0x9e) data = 0x12;
2796 else if(data2 >= 0x8e) data = 0x0a;
2797 else data = 0x02;
2798 } else {
2799 if(data2 >= 0x127) data = 0xba;
2800 else data = 0x7a;
2801 }
2802 } else { /* 76x+LFB */
2803 if (data2 >= 0x190) data = 0xba;
2804 else if(data2 >= 0xff) data = 0x7a;
2805 else if(data2 >= 0xd3) data = 0x3a;
2806 else if(data2 >= 0xa9) data = 0x1a;
2807 else if(data2 >= 0x93) data = 0x0a;
2808 else data = 0x02;
2809 }
2810 }
2811 SiS_SetReg(SiS_Pr->SiS_P3c4,0x17,data);
2812
2813 }
2814 /* XGI: Nothing. */
2815 /* TODO: Check SiS340 */
3070#endif 2816#endif
3071 2817
3072 data = 0x60; 2818 data = 0x60;
3073 if(SiS_Pr->SiS_ModeType != ModeText) { 2819 if(SiS_Pr->SiS_ModeType != ModeText) {
3074 data ^= 0x60; 2820 data ^= 0x60;
3075 if(SiS_Pr->SiS_ModeType != ModeEGA) { 2821 if(SiS_Pr->SiS_ModeType != ModeEGA) {
3076 data ^= 0xA0; 2822 data ^= 0xA0;
3077 } 2823 }
3078 } 2824 }
3079 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data); 2825 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x21,0x1F,data);
3080 2826
3081 SiS_SetVCLKState(SiS_Pr, HwInfo, ModeNo, RefreshRateTableIndex, ModeIdIndex); 2827 SiS_SetVCLKState(SiS_Pr, ModeNo, RRTI, ModeIdIndex);
3082 2828
3083#ifdef SIS315H 2829#ifdef SIS315H
3084 if(HwInfo->jChipType >= SIS_315H) { 2830 if(((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) ||
3085 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) { 2831 (SiS_Pr->ChipType == XGI_40)) {
3086 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c); 2832 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3087 } else { 2833 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x2c);
3088 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c); 2834 } else {
3089 } 2835 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x6c);
3090 } 2836 }
2837 } else if(SiS_Pr->ChipType == XGI_20) {
2838 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
2839 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x33);
2840 } else {
2841 SiS_SetReg(SiS_Pr->SiS_P3d4,0x52,0x73);
2842 }
2843 SiS_SetReg(SiS_Pr->SiS_P3d4,0x51,0x02);
2844 }
3091#endif 2845#endif
3092} 2846}
3093 2847
3094/*********************************************/ 2848#ifdef SIS315H
3095/* LOAD DAC */
3096/*********************************************/
3097
3098#if 0
3099static void 2849static void
3100SiS_ClearDAC(SiS_Private *SiS_Pr, ULONG port) 2850SiS_SetupDualChip(struct SiS_Private *SiS_Pr)
3101{ 2851{
2852#if 0
2853 /* TODO: Find out about IOAddress2 */
2854 SISIOADDRESS P2_3c2 = SiS_Pr->IOAddress2 + 0x12;
2855 SISIOADDRESS P2_3c4 = SiS_Pr->IOAddress2 + 0x14;
2856 SISIOADDRESS P2_3ce = SiS_Pr->IOAddress2 + 0x1e;
3102 int i; 2857 int i;
3103 2858
3104 OutPortByte(port, 0); 2859 if((SiS_Pr->ChipRevision != 0) ||
3105 port++; 2860 (!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x04)))
3106 for (i=0; i < (256 * 3); i++) { 2861 return;
3107 OutPortByte(port, 0); 2862
2863 for(i = 0; i <= 4; i++) { /* SR00 - SR04 */
2864 SiS_SetReg(P2_3c4,i,SiS_GetReg(SiS_Pr->SiS_P3c4,i));
3108 } 2865 }
2866 for(i = 0; i <= 8; i++) { /* GR00 - GR08 */
2867 SiS_SetReg(P2_3ce,i,SiS_GetReg(SiS_Pr->SiS_P3ce,i));
2868 }
2869 SiS_SetReg(P2_3c4,0x05,0x86);
2870 SiS_SetReg(P2_3c4,0x06,SiS_GetReg(SiS_Pr->SiS_P3c4,0x06)); /* SR06 */
2871 SiS_SetReg(P2_3c4,0x21,SiS_GetReg(SiS_Pr->SiS_P3c4,0x21)); /* SR21 */
2872 SiS_SetRegByte(P2_3c2,SiS_GetRegByte(SiS_Pr->SiS_P3cc)); /* MISC */
2873 SiS_SetReg(P2_3c4,0x05,0x00);
2874#endif
3109} 2875}
3110#endif 2876#endif
3111 2877
2878/*********************************************/
2879/* LOAD DAC */
2880/*********************************************/
2881
3112static void 2882static void
3113SiS_WriteDAC(SiS_Private *SiS_Pr, SISIOADDRESS DACData, USHORT shiftflag, 2883SiS_WriteDAC(struct SiS_Private *SiS_Pr, SISIOADDRESS DACData, unsigned short shiftflag,
3114 USHORT dl, USHORT ah, USHORT al, USHORT dh) 2884 unsigned short dl, unsigned short ah, unsigned short al, unsigned short dh)
3115{ 2885{
3116 USHORT temp,bh,bl; 2886 unsigned short d1, d2, d3;
3117 2887
3118 bh = ah; 2888 switch(dl) {
3119 bl = al; 2889 case 0: d1 = dh; d2 = ah; d3 = al; break;
3120 if(dl != 0) { 2890 case 1: d1 = ah; d2 = al; d3 = dh; break;
3121 temp = bh; 2891 default: d1 = al; d2 = dh; d3 = ah;
3122 bh = dh; 2892 }
3123 dh = temp; 2893 SiS_SetRegByte(DACData, (d1 << shiftflag));
3124 if(dl == 1) { 2894 SiS_SetRegByte(DACData, (d2 << shiftflag));
3125 temp = bl; 2895 SiS_SetRegByte(DACData, (d3 << shiftflag));
3126 bl = dh;
3127 dh = temp;
3128 } else {
3129 temp = bl;
3130 bl = bh;
3131 bh = temp;
3132 }
3133 }
3134 if(shiftflag) {
3135 dh <<= 2;
3136 bh <<= 2;
3137 bl <<= 2;
3138 }
3139 SiS_SetRegByte(DACData,(USHORT)dh);
3140 SiS_SetRegByte(DACData,(USHORT)bh);
3141 SiS_SetRegByte(DACData,(USHORT)bl);
3142} 2896}
3143 2897
3144void 2898void
3145SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2899SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
3146 USHORT ModeNo, USHORT ModeIdIndex)
3147{ 2900{
3148 USHORT data,data2; 2901 unsigned short data, data2, time, i, j, k, m, n, o;
3149 USHORT time,i,j,k,m,n,o; 2902 unsigned short si, di, bx, sf;
3150 USHORT si,di,bx,dl,al,ah,dh;
3151 USHORT shiftflag;
3152 SISIOADDRESS DACAddr, DACData; 2903 SISIOADDRESS DACAddr, DACData;
3153 const USHORT *table = NULL; 2904 const unsigned char *table = NULL;
3154 2905
3155 if(ModeNo <= 0x13) { 2906 data = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex) & DACInfoFlag;
3156 data = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
3157 } else {
3158 if(SiS_Pr->UseCustomMode) {
3159 data = SiS_Pr->CModeFlag;
3160 } else {
3161 data = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3162 }
3163 }
3164 2907
3165 data &= DACInfoFlag; 2908 j = time = 64;
3166 time = 64; 2909 if(data == 0x00) table = SiS_MDA_DAC;
3167 if(data == 0x00) table = SiS_MDA_DAC; 2910 else if(data == 0x08) table = SiS_CGA_DAC;
3168 if(data == 0x08) table = SiS_CGA_DAC; 2911 else if(data == 0x10) table = SiS_EGA_DAC;
3169 if(data == 0x10) table = SiS_EGA_DAC; 2912 else if(data == 0x18) {
3170 if(data == 0x18) { 2913 j = 16;
3171 time = 256; 2914 time = 256;
3172 table = SiS_VGA_DAC; 2915 table = SiS_VGA_DAC;
3173 } 2916 }
3174 if(time == 256) j = 16;
3175 else j = time;
3176 2917
3177 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */ 2918 if( ( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && /* 301B-DH LCD */
3178 (SiS_Pr->SiS_VBType & VB_NoLCD) ) || 2919 (SiS_Pr->SiS_VBType & VB_NoLCD) ) ||
3179 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */ 2920 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) || /* LCDA */
3180 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */ 2921 (!(SiS_Pr->SiS_SetFlag & ProgrammingCRT2)) ) { /* Programming CRT1 */
2922 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3181 DACAddr = SiS_Pr->SiS_P3c8; 2923 DACAddr = SiS_Pr->SiS_P3c8;
3182 DACData = SiS_Pr->SiS_P3c9; 2924 DACData = SiS_Pr->SiS_P3c9;
3183 shiftflag = 0; 2925 sf = 0;
3184 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3185 } else { 2926 } else {
3186 shiftflag = 1;
3187 DACAddr = SiS_Pr->SiS_Part5Port; 2927 DACAddr = SiS_Pr->SiS_Part5Port;
3188 DACData = SiS_Pr->SiS_Part5Port + 1; 2928 DACData = SiS_Pr->SiS_Part5Port + 1;
2929 sf = 2;
3189 } 2930 }
3190 2931
3191 SiS_SetRegByte(DACAddr,0x00); 2932 SiS_SetRegByte(DACAddr,0x00);
3192 2933
3193 for(i=0; i<j; i++) { 2934 for(i = 0; i < j; i++) {
3194 data = table[i]; 2935 data = table[i];
3195 for(k=0; k<3; k++) { 2936 for(k = 0; k < 3; k++) {
3196 data2 = 0; 2937 data2 = 0;
3197 if(data & 0x01) data2 = 0x2A; 2938 if(data & 0x01) data2 += 0x2A;
3198 if(data & 0x02) data2 += 0x15; 2939 if(data & 0x02) data2 += 0x15;
3199 if(shiftflag) data2 <<= 2; 2940 SiS_SetRegByte(DACData, (data2 << sf));
3200 SiS_SetRegByte(DACData, data2);
3201 data >>= 2; 2941 data >>= 2;
3202 } 2942 }
3203 } 2943 }
3204 2944
3205 if(time == 256) { 2945 if(time == 256) {
3206 for(i = 16; i < 32; i++) { 2946 for(i = 16; i < 32; i++) {
3207 data = table[i]; 2947 data = table[i] << sf;
3208 if(shiftflag) data <<= 2;
3209 for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data); 2948 for(k = 0; k < 3; k++) SiS_SetRegByte(DACData, data);
3210 } 2949 }
3211 si = 32; 2950 si = 32;
3212 for(m = 0; m < 9; m++) { 2951 for(m = 0; m < 9; m++) {
3213 di = si; 2952 di = si;
3214 bx = si + 4; 2953 bx = si + 4;
3215 dl = 0; 2954 for(n = 0; n < 3; n++) {
3216 for(n = 0; n < 3; n++) { 2955 for(o = 0; o < 5; o++) {
3217 for(o = 0; o < 5; o++) { 2956 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[bx], table[si]);
3218 dh = table[si];
3219 ah = table[di];
3220 al = table[bx];
3221 si++; 2957 si++;
3222 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3223 } 2958 }
3224 si -= 2; 2959 si -= 2;
3225 for(o = 0; o < 3; o++) { 2960 for(o = 0; o < 3; o++) {
3226 dh = table[bx]; 2961 SiS_WriteDAC(SiS_Pr, DACData, sf, n, table[di], table[si], table[bx]);
3227 ah = table[di];
3228 al = table[si];
3229 si--; 2962 si--;
3230 SiS_WriteDAC(SiS_Pr, DACData, shiftflag, dl, ah, al, dh);
3231 } 2963 }
3232 dl++;
3233 } /* for n < 3 */ 2964 } /* for n < 3 */
3234 si += 5; 2965 si += 5;
3235 } /* for m < 9 */ 2966 } /* for m < 9 */
@@ -3241,89 +2972,114 @@ SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3241/*********************************************/ 2972/*********************************************/
3242 2973
3243static void 2974static void
3244SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 2975SiS_SetCRT1Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
3245 USHORT ModeNo, USHORT ModeIdIndex)
3246{ 2976{
3247 USHORT StandTableIndex,RefreshRateTableIndex; 2977 unsigned short StandTableIndex, RefreshRateTableIndex;
3248 2978
3249 SiS_Pr->SiS_CRT1Mode = ModeNo; 2979 SiS_Pr->SiS_CRT1Mode = ModeNo;
3250 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex); 2980
3251 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 2981 StandTableIndex = SiS_GetModePtr(SiS_Pr, ModeNo, ModeIdIndex);
3252 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) { 2982
3253 SiS_DisableBridge(SiS_Pr, HwInfo); 2983 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
3254 } 2984 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2)) {
3255 } 2985 SiS_DisableBridge(SiS_Pr);
3256 2986 }
3257 SiS_ResetSegmentRegisters(SiS_Pr, HwInfo); 2987 }
3258 2988
3259 SiS_SetSeqRegs(SiS_Pr, StandTableIndex, HwInfo); 2989 SiS_ResetSegmentRegisters(SiS_Pr);
3260 SiS_SetMiscRegs(SiS_Pr, StandTableIndex, HwInfo); 2990
3261 SiS_SetCRTCRegs(SiS_Pr, HwInfo, StandTableIndex); 2991 SiS_SetSeqRegs(SiS_Pr, StandTableIndex);
3262 SiS_SetATTRegs(SiS_Pr, StandTableIndex, HwInfo); 2992 SiS_SetMiscRegs(SiS_Pr, StandTableIndex);
3263 SiS_SetGRCRegs(SiS_Pr, StandTableIndex); 2993 SiS_SetCRTCRegs(SiS_Pr, StandTableIndex);
3264 SiS_ClearExt1Regs(SiS_Pr, HwInfo, ModeNo); 2994 SiS_SetATTRegs(SiS_Pr, StandTableIndex);
3265 SiS_ResetCRT1VCLK(SiS_Pr, HwInfo); 2995 SiS_SetGRCRegs(SiS_Pr, StandTableIndex);
3266 2996 SiS_ClearExt1Regs(SiS_Pr, ModeNo);
3267 SiS_Pr->SiS_SelectCRT2Rate = 0; 2997 SiS_ResetCRT1VCLK(SiS_Pr);
3268 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); 2998
3269 2999 SiS_Pr->SiS_SelectCRT2Rate = 0;
3270#ifdef LINUX_XF86 3000 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
3271 xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n", 3001
3002#ifdef SIS_XORG_XF86
3003 xf86DrvMsgVerb(0, X_PROBED, 4, "(init: VBType=0x%04x, VBInfo=0x%04x)\n",
3272 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo); 3004 SiS_Pr->SiS_VBType, SiS_Pr->SiS_VBInfo);
3273#endif 3005#endif
3274 3006
3275 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) { 3007 if(SiS_Pr->SiS_VBInfo & SetSimuScanMode) {
3276 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 3008 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
3277 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 3009 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3278 } 3010 }
3279 } 3011 }
3280 3012
3281 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3013 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3282 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 3014 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
3283 } 3015 }
3284 3016
3285 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3017 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
3286 3018
3287 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3019 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3288 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2; 3020 SiS_Pr->SiS_SetFlag &= ~ProgrammingCRT2;
3289 } 3021 }
3290 3022
3291 if(RefreshRateTableIndex != 0xFFFF) { 3023 if(RefreshRateTableIndex != 0xFFFF) {
3292 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex); 3024 SiS_SetCRT1Sync(SiS_Pr, RefreshRateTableIndex);
3293 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3025 SiS_SetCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3294 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3026 SiS_SetCRT1Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3295 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 3027 SiS_SetCRT1VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3296 } 3028 }
3297 3029
3030 switch(SiS_Pr->ChipType) {
3298#ifdef SIS300 3031#ifdef SIS300
3299 if(HwInfo->jChipType == SIS_300) { 3032 case SIS_300:
3300 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo,HwInfo,RefreshRateTableIndex); 3033 SiS_SetCRT1FIFO_300(SiS_Pr, ModeNo, RefreshRateTableIndex);
3301 } else if((HwInfo->jChipType == SIS_630) || 3034 break;
3302 (HwInfo->jChipType == SIS_730) || 3035 case SIS_540:
3303 (HwInfo->jChipType == SIS_540)) { 3036 case SIS_630:
3304 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, HwInfo, RefreshRateTableIndex); 3037 case SIS_730:
3305 } 3038 SiS_SetCRT1FIFO_630(SiS_Pr, ModeNo, RefreshRateTableIndex);
3039 break;
3306#endif 3040#endif
3041 default:
3307#ifdef SIS315H 3042#ifdef SIS315H
3308 if(HwInfo->jChipType >= SIS_315H) { 3043 if(SiS_Pr->ChipType == XGI_20) {
3309 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3044 unsigned char sr2b = 0, sr2c = 0;
3310 } 3045 switch(ModeNo) {
3046 case 0x00:
3047 case 0x01: sr2b = 0x4e; sr2c = 0xe9; break;
3048 case 0x04:
3049 case 0x05:
3050 case 0x0d: sr2b = 0x1b; sr2c = 0xe3; break;
3051 }
3052 if(sr2b) {
3053 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2b,sr2b);
3054 SiS_SetReg(SiS_Pr->SiS_P3c4,0x2c,sr2c);
3055 SiS_SetRegByte(SiS_Pr->SiS_P3c2,(SiS_GetRegByte(SiS_Pr->SiS_P3cc) | 0x0c));
3056 }
3057 }
3058 SiS_SetCRT1FIFO_310(SiS_Pr, ModeNo, ModeIdIndex);
3311#endif 3059#endif
3060 break;
3061 }
3062
3063 SiS_SetCRT1ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3312 3064
3313 SiS_SetCRT1ModeRegs(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex); 3065#ifdef SIS315H
3066 if(SiS_Pr->ChipType == XGI_40) {
3067 SiS_SetupDualChip(SiS_Pr);
3068 }
3069#endif
3314 3070
3315 SiS_LoadDAC(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3071 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
3316 3072
3317#ifdef LINUX_KERNEL 3073#ifdef SIS_LINUX_KERNEL
3318 if(SiS_Pr->SiS_flag_clearbuffer) { 3074 if(SiS_Pr->SiS_flag_clearbuffer) {
3319 SiS_ClearBuffer(SiS_Pr,HwInfo,ModeNo); 3075 SiS_ClearBuffer(SiS_Pr, ModeNo);
3320 } 3076 }
3321#endif 3077#endif
3322 3078
3323 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) { 3079 if(!(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA))) {
3324 SiS_WaitRetrace1(SiS_Pr); 3080 SiS_WaitRetrace1(SiS_Pr);
3325 SiS_DisplayOn(SiS_Pr); 3081 SiS_DisplayOn(SiS_Pr);
3326 } 3082 }
3327} 3083}
3328 3084
3329/*********************************************/ 3085/*********************************************/
@@ -3331,33 +3087,62 @@ SiS_SetCRT1Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
3331/*********************************************/ 3087/*********************************************/
3332 3088
3333static void 3089static void
3334SiS_ResetVB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 3090SiS_InitVB(struct SiS_Private *SiS_Pr)
3091{
3092 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3093
3094 SiS_Pr->Init_P4_0E = 0;
3095 if(SiS_Pr->SiS_ROMNew) {
3096 SiS_Pr->Init_P4_0E = ROMAddr[0x82];
3097 } else if(SiS_Pr->ChipType >= XGI_40) {
3098 if(SiS_Pr->SiS_XGIROM) {
3099 SiS_Pr->Init_P4_0E = ROMAddr[0x80];
3100 }
3101 }
3102}
3103
3104static void
3105SiS_ResetVB(struct SiS_Private *SiS_Pr)
3335{ 3106{
3336 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 3107#ifdef SIS315H
3337 USHORT temp; 3108 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3109 unsigned short temp;
3338 3110
3339 /* VB programming clock */ 3111 /* VB programming clock */
3340 if(SiS_Pr->SiS_UseROM) { 3112 if(SiS_Pr->SiS_UseROM) {
3341 if(HwInfo->jChipType < SIS_330) { 3113 if(SiS_Pr->ChipType < SIS_330) {
3342 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40; 3114 temp = ROMAddr[VB310Data_1_2_Offset] | 0x40;
3343 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40; 3115 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3344 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); 3116 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3345 } else if(HwInfo->jChipType >= SIS_661) { 3117 } else if(SiS_Pr->ChipType >= SIS_661 && SiS_Pr->ChipType < XGI_20) {
3346 temp = ROMAddr[0x7e] | 0x40; 3118 temp = ROMAddr[0x7e] | 0x40;
3347 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40; 3119 if(SiS_Pr->SiS_ROMNew) temp = ROMAddr[0x80] | 0x40;
3348 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp); 3120 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3349 } 3121 }
3122 } else if(SiS_Pr->ChipType >= XGI_40) {
3123 temp = 0x40;
3124 if(SiS_Pr->SiS_XGIROM) temp |= ROMAddr[0x7e];
3125 /* Can we do this on any chipset? */
3126 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x02,temp);
3350 } 3127 }
3128#endif
3351} 3129}
3352 3130
3353/*********************************************/ 3131/*********************************************/
3354/* HELPER: SET VIDEO REGISTERS */ 3132/* HELPER: SET VIDEO/CAPTURE REGISTERS */
3355/*********************************************/ 3133/*********************************************/
3356 3134
3357static void 3135static void
3358SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 3136SiS_StrangeStuff(struct SiS_Private *SiS_Pr)
3359{ 3137{
3360 if((IS_SIS651) || (IS_SISM650)) { 3138 /* SiS65x and XGI set up some sort of "lock mode" for text
3139 * which locks CRT2 in some way to CRT1 timing. Disable
3140 * this here.
3141 */
3142#ifdef SIS315H
3143 if((IS_SIS651) || (IS_SISM650) ||
3144 SiS_Pr->ChipType == SIS_340 ||
3145 SiS_Pr->ChipType == XGI_40) {
3361 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */ 3146 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x3f, 0x00); /* Fiddle with capture regs */
3362 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00); 3147 SiS_SetReg(SiS_Pr->SiS_VidCapt, 0x00, 0x00);
3363 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */ 3148 SiS_SetReg(SiS_Pr->SiS_VidPlay, 0x00, 0x86); /* (BIOS does NOT unlock) */
@@ -3365,49 +3150,99 @@ SiS_StrangeStuff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3365 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef); 3150 SiS_SetRegAND(SiS_Pr->SiS_VidPlay, 0x3f, 0xef);
3366 } 3151 }
3367 /* !!! This does not support modes < 0x13 !!! */ 3152 /* !!! This does not support modes < 0x13 !!! */
3153#endif
3368} 3154}
3369 3155
3370/*********************************************/ 3156/*********************************************/
3371/* XFree86: SET SCREEN PITCH */ 3157/* HELPER: SET AGP TIMING FOR SiS760 */
3372/*********************************************/ 3158/*********************************************/
3373 3159
3374#ifdef LINUX_XF86
3375static void 3160static void
3376SiS_SetPitchCRT1(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3161SiS_Handle760(struct SiS_Private *SiS_Pr)
3162{
3163#ifdef SIS315H
3164 unsigned int somebase;
3165 unsigned char temp1, temp2, temp3;
3166
3167 if( (SiS_Pr->ChipType != SIS_760) ||
3168 ((SiS_GetReg(SiS_Pr->SiS_P3d4, 0x5c) & 0xf8) != 0x80) ||
3169 (!(SiS_Pr->SiS_SysFlags & SF_760LFB)) ||
3170 (!(SiS_Pr->SiS_SysFlags & SF_760UMA)) )
3171 return;
3172
3173#ifdef SIS_LINUX_KERNEL
3174 somebase = sisfb_read_mio_pci_word(SiS_Pr, 0x74);
3175#else
3176 somebase = pciReadWord(0x00001000, 0x74);
3177#endif
3178 somebase &= 0xffff;
3179
3180 if(somebase == 0) return;
3181
3182 temp3 = SiS_GetRegByte((somebase + 0x85)) & 0xb7;
3183
3184 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40) {
3185 temp1 = 0x21;
3186 temp2 = 0x03;
3187 temp3 |= 0x08;
3188 } else {
3189 temp1 = 0x25;
3190 temp2 = 0x0b;
3191 }
3192
3193#ifdef SIS_LINUX_KERNEL
3194 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x7e, temp1);
3195 sisfb_write_nbridge_pci_byte(SiS_Pr, 0x8d, temp2);
3196#else
3197 pciWriteByte(0x00000000, 0x7e, temp1);
3198 pciWriteByte(0x00000000, 0x8d, temp2);
3199#endif
3200
3201 SiS_SetRegByte((somebase + 0x85), temp3);
3202#endif
3203}
3204
3205/*********************************************/
3206/* X.org/XFree86: SET SCREEN PITCH */
3207/*********************************************/
3208
3209#ifdef SIS_XORG_XF86
3210static void
3211SiS_SetPitchCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3377{ 3212{
3378 SISPtr pSiS = SISPTR(pScrn); 3213 SISPtr pSiS = SISPTR(pScrn);
3379 UShort HDisplay = pSiS->scrnPitch >> 3; 3214 unsigned short HDisplay = pSiS->scrnPitch >> 3;
3380 3215
3381 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF)); 3216 SiS_SetReg(SiS_Pr->SiS_P3d4,0x13,(HDisplay & 0xFF));
3382 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay>>8)); 3217 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0xF0,(HDisplay >> 8));
3383} 3218}
3384 3219
3385static void 3220static void
3386SiS_SetPitchCRT2(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3221SiS_SetPitchCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3387{ 3222{
3388 SISPtr pSiS = SISPTR(pScrn); 3223 SISPtr pSiS = SISPTR(pScrn);
3389 UShort HDisplay = pSiS->scrnPitch2 >> 3; 3224 unsigned short HDisplay = pSiS->scrnPitch2 >> 3;
3390 3225
3391 /* Unlock CRT2 */ 3226 /* Unlock CRT2 */
3392 if(pSiS->VGAEngine == SIS_315_VGA) 3227 if(pSiS->VGAEngine == SIS_315_VGA)
3393 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01); 3228 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2F, 0x01);
3394 else 3229 else
3395 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01); 3230 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24, 0x01);
3396 3231
3397 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF)); 3232 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(HDisplay & 0xFF));
3398 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8)); 3233 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0xF0,(HDisplay >> 8));
3399} 3234}
3400 3235
3401static void 3236static void
3402SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn) 3237SiS_SetPitch(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3403{ 3238{
3404 SISPtr pSiS = SISPTR(pScrn); 3239 SISPtr pSiS = SISPTR(pScrn);
3405 BOOLEAN isslavemode = FALSE; 3240 BOOLEAN isslavemode = FALSE;
3406 3241
3407 if( (pSiS->VBFlags & VB_VIDEOBRIDGE) && 3242 if( (pSiS->VBFlags2 & VB2_VIDEOBRIDGE) &&
3408 ( ((pSiS->VGAEngine == SIS_300_VGA) && 3243 ( ((pSiS->VGAEngine == SIS_300_VGA) &&
3409 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) || 3244 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0xa0) == 0x20) ||
3410 ((pSiS->VGAEngine == SIS_315_VGA) && 3245 ((pSiS->VGAEngine == SIS_315_VGA) &&
3411 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) { 3246 (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x50) == 0x10) ) ) {
3412 isslavemode = TRUE; 3247 isslavemode = TRUE;
3413 } 3248 }
@@ -3427,59 +3262,59 @@ SiS_SetPitch(SiS_Private *SiS_Pr, ScrnInfoPtr pScrn)
3427/* SiSSetMode() */ 3262/* SiSSetMode() */
3428/*********************************************/ 3263/*********************************************/
3429 3264
3430#ifdef LINUX_XF86 3265#ifdef SIS_XORG_XF86
3431/* We need pScrn for setting the pitch correctly */ 3266/* We need pScrn for setting the pitch correctly */
3432BOOLEAN 3267BOOLEAN
3433SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch) 3268SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo, BOOLEAN dosetpitch)
3434#else 3269#else
3435BOOLEAN 3270BOOLEAN
3436SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo) 3271SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
3437#endif 3272#endif
3438{ 3273{
3439 USHORT ModeIdIndex; 3274 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3440 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress; 3275 unsigned short RealModeNo, ModeIdIndex;
3441 unsigned char backupreg=0; 3276 unsigned char backupreg = 0;
3442#ifdef LINUX_KERNEL 3277#ifdef SIS_LINUX_KERNEL
3443 USHORT KeepLockReg; 3278 unsigned short KeepLockReg;
3444 ULONG temp;
3445 3279
3446 SiS_Pr->UseCustomMode = FALSE; 3280 SiS_Pr->UseCustomMode = FALSE;
3447 SiS_Pr->CRT1UsesCustomMode = FALSE; 3281 SiS_Pr->CRT1UsesCustomMode = FALSE;
3448#endif 3282#endif
3449 3283
3284 SiS_Pr->SiS_flag_clearbuffer = 0;
3285
3450 if(SiS_Pr->UseCustomMode) { 3286 if(SiS_Pr->UseCustomMode) {
3451 ModeNo = 0xfe; 3287 ModeNo = 0xfe;
3288 } else {
3289#ifdef SIS_LINUX_KERNEL
3290 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3291#endif
3292 ModeNo &= 0x7f;
3452 } 3293 }
3453 3294
3454 SiSInitPtr(SiS_Pr, HwInfo); 3295 /* Don't use FSTN mode for CRT1 */
3296 RealModeNo = ModeNo;
3297 if(ModeNo == 0x5b) ModeNo = 0x56;
3298
3299 SiSInitPtr(SiS_Pr);
3455 SiSRegInit(SiS_Pr, BaseAddr); 3300 SiSRegInit(SiS_Pr, BaseAddr);
3456 SiS_GetSysFlags(SiS_Pr, HwInfo); 3301 SiS_GetSysFlags(SiS_Pr);
3457 3302
3458#if defined(LINUX_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__)) 3303 SiS_Pr->SiS_VGAINFO = 0x11;
3304#if defined(SIS_XORG_XF86) && (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__))
3459 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3305 if(pScrn) SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3460 else
3461#endif
3462 SiS_Pr->SiS_VGAINFO = 0x11;
3463
3464 SiSInitPCIetc(SiS_Pr, HwInfo);
3465 SiSSetLVDSetc(SiS_Pr, HwInfo);
3466 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3467
3468 SiS_Pr->SiS_flag_clearbuffer = 0;
3469
3470 if(!SiS_Pr->UseCustomMode) {
3471#ifdef LINUX_KERNEL
3472 if(!(ModeNo & 0x80)) SiS_Pr->SiS_flag_clearbuffer = 1;
3473#endif 3306#endif
3474 ModeNo &= 0x7f;
3475 }
3476 3307
3477#ifdef LINUX_KERNEL 3308#ifdef SIS_LINUX_KERNEL
3478 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05); 3309 KeepLockReg = SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
3479#endif 3310#endif
3480 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3311 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3481 3312
3482 SiS_UnLockCRT2(SiS_Pr, HwInfo); 3313 SiSInitPCIetc(SiS_Pr);
3314 SiSSetLVDSetc(SiS_Pr);
3315 SiSDetermineROMUsage(SiS_Pr);
3316
3317 SiS_UnLockCRT2(SiS_Pr);
3483 3318
3484 if(!SiS_Pr->UseCustomMode) { 3319 if(!SiS_Pr->UseCustomMode) {
3485 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; 3320 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
@@ -3487,13 +3322,13 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3487 ModeIdIndex = 0; 3322 ModeIdIndex = 0;
3488 } 3323 }
3489 3324
3490 SiS_GetVBType(SiS_Pr, HwInfo); 3325 SiS_GetVBType(SiS_Pr);
3491 3326
3492 /* Init/restore some VB registers */ 3327 /* Init/restore some VB registers */
3493 3328 SiS_InitVB(SiS_Pr);
3494 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3329 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3495 if(HwInfo->jChipType >= SIS_315H) { 3330 if(SiS_Pr->ChipType >= SIS_315H) {
3496 SiS_ResetVB(SiS_Pr, HwInfo); 3331 SiS_ResetVB(SiS_Pr);
3497 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10); 3332 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3498 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c); 3333 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3499 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3334 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
@@ -3503,21 +3338,20 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3503 } 3338 }
3504 3339
3505 /* Get VB information (connectors, connected devices) */ 3340 /* Get VB information (connectors, connected devices) */
3506 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, (SiS_Pr->UseCustomMode) ? 0 : 1); 3341 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, (SiS_Pr->UseCustomMode) ? 0 : 1);
3507 SiS_SetYPbPr(SiS_Pr, HwInfo); 3342 SiS_SetYPbPr(SiS_Pr);
3508 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3343 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3509 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3344 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3510 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo); 3345 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3511 3346
3512#ifdef LINUX_KERNEL 3347#ifdef SIS_LINUX_KERNEL
3513 /* 3. Check memory size (Kernel framebuffer driver only) */ 3348 /* Check memory size (kernel framebuffer driver only) */
3514 temp = SiS_CheckMemorySize(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3349 if(!SiS_CheckMemorySize(SiS_Pr, ModeNo, ModeIdIndex)) {
3515 if(!temp) return(0); 3350 return FALSE;
3351 }
3516#endif 3352#endif
3517 3353
3518 if(HwInfo->jChipType >= SIS_315H) { 3354 SiS_OpenCRTC(SiS_Pr);
3519 SiS_SetupCR5x(SiS_Pr, HwInfo);
3520 }
3521 3355
3522 if(SiS_Pr->UseCustomMode) { 3356 if(SiS_Pr->UseCustomMode) {
3523 SiS_Pr->CRT1UsesCustomMode = TRUE; 3357 SiS_Pr->CRT1UsesCustomMode = TRUE;
@@ -3530,38 +3364,41 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3530 /* Set mode on CRT1 */ 3364 /* Set mode on CRT1 */
3531 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) || 3365 if( (SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SetCRT2ToLCDA)) ||
3532 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) { 3366 (!(SiS_Pr->SiS_VBInfo & SwitchCRT2)) ) {
3533 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3367 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3534 } 3368 }
3535 3369
3536 /* Set mode on CRT2 */ 3370 /* Set mode on CRT2 */
3537 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) { 3371 if(SiS_Pr->SiS_VBInfo & (SetSimuScanMode | SwitchCRT2 | SetCRT2ToLCDA)) {
3538 if( (SiS_Pr->SiS_VBType & VB_SISVB) || 3372 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3539 (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 3373 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3540 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) || 3374 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3541 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) { 3375 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3542 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo); 3376 SiS_SetCRT2Group(SiS_Pr, RealModeNo);
3543 } 3377 }
3544 } 3378 }
3545 3379
3546 SiS_HandleCRT1(SiS_Pr); 3380 SiS_HandleCRT1(SiS_Pr);
3547 3381
3548 SiS_StrangeStuff(SiS_Pr, HwInfo); 3382 SiS_StrangeStuff(SiS_Pr);
3549 3383
3550 SiS_DisplayOn(SiS_Pr); 3384 SiS_DisplayOn(SiS_Pr);
3551 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3385 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3552 3386
3553 if(HwInfo->jChipType >= SIS_315H) { 3387#ifdef SIS315H
3388 if(SiS_Pr->ChipType >= SIS_315H) {
3554 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3389 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3555 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) { 3390 if(!(SiS_IsDualEdge(SiS_Pr))) {
3556 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 3391 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3557 } 3392 }
3558 } 3393 }
3559 } 3394 }
3395#endif
3560 3396
3561 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3397 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3562 if(HwInfo->jChipType >= SIS_315H) { 3398 if(SiS_Pr->ChipType >= SIS_315H) {
3563 if(!SiS_Pr->SiS_ROMNew) { 3399#ifdef SIS315H
3564 if(SiS_IsVAMode(SiS_Pr,HwInfo)) { 3400 if(!SiS_Pr->SiS_ROMNew) {
3401 if(SiS_IsVAMode(SiS_Pr)) {
3565 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 3402 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3566 } else { 3403 } else {
3567 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE); 3404 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
@@ -3574,23 +3411,24 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3574 if((ModeNo == 0x03) || (ModeNo == 0x10)) { 3411 if((ModeNo == 0x03) || (ModeNo == 0x10)) {
3575 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80); 3412 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x51,0x80);
3576 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08); 3413 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x56,0x08);
3577 } 3414 }
3578 } 3415 }
3579 3416
3580 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) { 3417 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3581 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); 3418 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3582 } 3419 }
3583 } else if((HwInfo->jChipType == SIS_630) || 3420#endif
3584 (HwInfo->jChipType == SIS_730)) { 3421 } else if((SiS_Pr->ChipType == SIS_630) ||
3585 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3422 (SiS_Pr->ChipType == SIS_730)) {
3423 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3586 } 3424 }
3587 } 3425 }
3588 3426
3589#ifdef LINUX_XF86 3427#ifdef SIS_XORG_XF86
3590 if(pScrn) { 3428 if(pScrn) {
3591 /* SetPitch: Adapt to virtual size & position */ 3429 /* SetPitch: Adapt to virtual size & position */
3592 if((ModeNo > 0x13) && (dosetpitch)) { 3430 if((ModeNo > 0x13) && (dosetpitch)) {
3593 SiS_SetPitch(SiS_Pr, pScrn); 3431 SiS_SetPitch(SiS_Pr, pScrn);
3594 } 3432 }
3595 3433
3596 /* Backup/Set ModeNo in BIOS scratch area */ 3434 /* Backup/Set ModeNo in BIOS scratch area */
@@ -3598,33 +3436,37 @@ SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo)
3598 } 3436 }
3599#endif 3437#endif
3600 3438
3601#ifdef LINUX_KERNEL /* We never lock registers in XF86 */ 3439 SiS_CloseCRTC(SiS_Pr);
3602 if(KeepLockReg == 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3440
3603 else SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00); 3441 SiS_Handle760(SiS_Pr);
3442
3443#ifdef SIS_LINUX_KERNEL
3444 /* We never lock registers in XF86 */
3445 if(KeepLockReg != 0xA1) SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x00);
3604#endif 3446#endif
3605 3447
3606 return TRUE; 3448 return TRUE;
3607} 3449}
3608 3450
3609/*********************************************/ 3451/*********************************************/
3610/* XFree86: SiSBIOSSetMode() */ 3452/* X.org/XFree86: SiSBIOSSetMode() */
3611/* for non-Dual-Head mode */ 3453/* for non-Dual-Head mode */
3612/*********************************************/ 3454/*********************************************/
3613 3455
3614#ifdef LINUX_XF86 3456#ifdef SIS_XORG_XF86
3615BOOLEAN 3457BOOLEAN
3616SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn, 3458SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3617 DisplayModePtr mode, BOOLEAN IsCustom) 3459 DisplayModePtr mode, BOOLEAN IsCustom)
3618{ 3460{
3619 SISPtr pSiS = SISPTR(pScrn); 3461 SISPtr pSiS = SISPTR(pScrn);
3620 UShort ModeNo = 0; 3462 unsigned short ModeNo = 0;
3621 3463
3622 SiS_Pr->UseCustomMode = FALSE; 3464 SiS_Pr->UseCustomMode = FALSE;
3623 3465
3624 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3466 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3625 3467
3626 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n", 3468 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting custom mode %dx%d\n",
3627 SiS_Pr->CHDisplay, 3469 SiS_Pr->CHDisplay,
3628 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 : 3470 (mode->Flags & V_INTERLACE ? SiS_Pr->CVDisplay * 2 :
3629 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 : 3471 (mode->Flags & V_DBLSCAN ? SiS_Pr->CVDisplay / 2 :
3630 SiS_Pr->CVDisplay))); 3472 SiS_Pr->CVDisplay)));
@@ -3632,32 +3474,33 @@ SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3632 } else { 3474 } else {
3633 3475
3634 /* Don't need vbflags here; checks done earlier */ 3476 /* Don't need vbflags here; checks done earlier */
3635 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); 3477 ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags);
3636 if(!ModeNo) return FALSE; 3478 if(!ModeNo) return FALSE;
3637 3479
3638 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo); 3480 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, "Setting standard mode 0x%x\n", ModeNo);
3639 3481
3640 } 3482 }
3641 3483
3642 return(SiSSetMode(SiS_Pr, HwInfo, pScrn, ModeNo, TRUE)); 3484 return(SiSSetMode(SiS_Pr, pScrn, ModeNo, TRUE));
3643} 3485}
3644 3486
3645/*********************************************/ 3487/*********************************************/
3646/* XFree86: SiSBIOSSetModeCRT2() */ 3488/* X.org/XFree86: SiSBIOSSetModeCRT2() */
3647/* for Dual-Head modes */ 3489/* for Dual-Head modes */
3648/*********************************************/ 3490/*********************************************/
3491
3649BOOLEAN 3492BOOLEAN
3650SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn, 3493SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3651 DisplayModePtr mode, BOOLEAN IsCustom) 3494 DisplayModePtr mode, BOOLEAN IsCustom)
3652{ 3495{
3653 USHORT ModeIdIndex; 3496 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3654 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress; 3497 SISPtr pSiS = SISPTR(pScrn);
3655 UShort ModeNo = 0;
3656 unsigned char backupreg=0;
3657 SISPtr pSiS = SISPTR(pScrn);
3658#ifdef SISDUALHEAD 3498#ifdef SISDUALHEAD
3659 SISEntPtr pSiSEnt = pSiS->entityPrivate; 3499 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3660#endif 3500#endif
3501 unsigned short ModeIdIndex;
3502 unsigned short ModeNo = 0;
3503 unsigned char backupreg = 0;
3661 3504
3662 SiS_Pr->UseCustomMode = FALSE; 3505 SiS_Pr->UseCustomMode = FALSE;
3663 3506
@@ -3672,22 +3515,25 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3672 3515
3673 } else { 3516 } else {
3674 3517
3675 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); 3518 ModeNo = SiS_GetModeNumber(pScrn, mode, pSiS->VBFlags);
3676 if(!ModeNo) return FALSE; 3519 if(!ModeNo) return FALSE;
3677 3520
3678 } 3521 }
3679 3522
3680 SiSRegInit(SiS_Pr, BaseAddr); 3523 SiSRegInit(SiS_Pr, BaseAddr);
3681 SiSInitPtr(SiS_Pr, HwInfo); 3524 SiSInitPtr(SiS_Pr);
3682 SiS_GetSysFlags(SiS_Pr, HwInfo); 3525 SiS_GetSysFlags(SiS_Pr);
3683#if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__)) 3526#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__)
3684 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3527 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3685#else 3528#else
3686 SiS_Pr->SiS_VGAINFO = 0x11; 3529 SiS_Pr->SiS_VGAINFO = 0x11;
3687#endif 3530#endif
3688 SiSInitPCIetc(SiS_Pr, HwInfo); 3531
3689 SiSSetLVDSetc(SiS_Pr, HwInfo); 3532 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3690 SiSDetermineROMUsage(SiS_Pr, HwInfo); 3533
3534 SiSInitPCIetc(SiS_Pr);
3535 SiSSetLVDSetc(SiS_Pr);
3536 SiSDetermineROMUsage(SiS_Pr);
3691 3537
3692 /* Save mode info so we can set it from within SetMode for CRT1 */ 3538 /* Save mode info so we can set it from within SetMode for CRT1 */
3693#ifdef SISDUALHEAD 3539#ifdef SISDUALHEAD
@@ -3700,23 +3546,20 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3700 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3546 pSiSEnt->CRT2CR35 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3701 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3547 pSiSEnt->CRT2CR38 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3702#if 0 3548#if 0
3703 /* We can't set CRT2 mode before CRT1 mode is set */ 3549 /* We can't set CRT2 mode before CRT1 mode is set - says who...? */
3704 if(pSiSEnt->CRT1ModeNo == -1) { 3550 if(pSiSEnt->CRT1ModeNo == -1) {
3705 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3551 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3706 "Setting CRT2 mode delayed until after setting CRT1 mode\n"); 3552 "Setting CRT2 mode delayed until after setting CRT1 mode\n");
3707 return TRUE; 3553 return TRUE;
3708 } 3554 }
3709#endif 3555#endif
3710 pSiSEnt->CRT2ModeSet = TRUE; 3556 pSiSEnt->CRT2ModeSet = TRUE;
3711 } 3557 }
3712#endif 3558#endif
3713 3559
3714 /* We don't clear the buffer in X */
3715 SiS_Pr->SiS_flag_clearbuffer=0;
3716
3717 if(SiS_Pr->UseCustomMode) { 3560 if(SiS_Pr->UseCustomMode) {
3718 3561
3719 USHORT temptemp = SiS_Pr->CVDisplay; 3562 unsigned short temptemp = SiS_Pr->CVDisplay;
3720 3563
3721 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1; 3564 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3722 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1; 3565 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
@@ -3728,13 +3571,11 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3728 } else { 3571 } else {
3729 3572
3730 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3573 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3731 "Setting standard mode 0x%x on CRT2\n", ModeNo); 3574 "Setting standard mode 0x%x on CRT2\n", ModeNo);
3732 3575
3733 } 3576 }
3734 3577
3735 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3578 SiS_UnLockCRT2(SiS_Pr);
3736
3737 SiS_UnLockCRT2(SiS_Pr, HwInfo);
3738 3579
3739 if(!SiS_Pr->UseCustomMode) { 3580 if(!SiS_Pr->UseCustomMode) {
3740 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; 3581 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
@@ -3742,56 +3583,59 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3742 ModeIdIndex = 0; 3583 ModeIdIndex = 0;
3743 } 3584 }
3744 3585
3745 SiS_GetVBType(SiS_Pr, HwInfo); 3586 SiS_GetVBType(SiS_Pr);
3746 3587
3747 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3588 SiS_InitVB(SiS_Pr);
3748 if(HwInfo->jChipType >= SIS_315H) { 3589 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3749 SiS_ResetVB(SiS_Pr, HwInfo); 3590 if(SiS_Pr->ChipType >= SIS_315H) {
3591 SiS_ResetVB(SiS_Pr);
3750 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10); 3592 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x32,0x10);
3751 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c); 3593 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x00,0x0c);
3752 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3594 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3753 } else { 3595 } else {
3754 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3596 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
3755 } 3597 }
3756 } 3598 }
3757 3599
3758 /* Get VB information (connectors, connected devices) */ 3600 /* Get VB information (connectors, connected devices) */
3759 if(!SiS_Pr->UseCustomMode) { 3601 if(!SiS_Pr->UseCustomMode) {
3760 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 1); 3602 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 1);
3761 } else { 3603 } else {
3762 /* If this is a custom mode, we don't check the modeflag for CRT2Mode */ 3604 /* If this is a custom mode, we don't check the modeflag for CRT2Mode */
3763 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0); 3605 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0);
3764 } 3606 }
3765 SiS_SetYPbPr(SiS_Pr, HwInfo); 3607 SiS_SetYPbPr(SiS_Pr);
3766 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3608 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3767 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3609 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3768 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo); 3610 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3611
3612 SiS_ResetSegmentRegisters(SiS_Pr);
3769 3613
3770 /* Set mode on CRT2 */ 3614 /* Set mode on CRT2 */
3771 if( (SiS_Pr->SiS_VBType & VB_SISVB) || 3615 if( (SiS_Pr->SiS_VBType & VB_SISVB) ||
3772 (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 3616 (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
3773 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) || 3617 (SiS_Pr->SiS_IF_DEF_CH70xx != 0) ||
3774 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) { 3618 (SiS_Pr->SiS_IF_DEF_TRUMPION != 0) ) {
3775 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo); 3619 SiS_SetCRT2Group(SiS_Pr, ModeNo);
3776 } 3620 }
3777 3621
3778 SiS_StrangeStuff(SiS_Pr, HwInfo); 3622 SiS_StrangeStuff(SiS_Pr);
3779 3623
3780 SiS_DisplayOn(SiS_Pr); 3624 SiS_DisplayOn(SiS_Pr);
3781 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3625 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3782 3626
3783 if(HwInfo->jChipType >= SIS_315H) { 3627 if(SiS_Pr->ChipType >= SIS_315H) {
3784 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 3628 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
3785 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) { 3629 if(!(SiS_IsDualEdge(SiS_Pr))) {
3786 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 3630 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
3787 } 3631 }
3788 } 3632 }
3789 } 3633 }
3790 3634
3791 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3635 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3792 if(HwInfo->jChipType >= SIS_315H) { 3636 if(SiS_Pr->ChipType >= SIS_315H) {
3793 if(!SiS_Pr->SiS_ROMNew) { 3637 if(!SiS_Pr->SiS_ROMNew) {
3794 if(SiS_IsVAMode(SiS_Pr,HwInfo)) { 3638 if(SiS_IsVAMode(SiS_Pr)) {
3795 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01); 3639 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x35,0x01);
3796 } else { 3640 } else {
3797 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE); 3641 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x35,0xFE);
@@ -3803,8 +3647,8 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3803 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) { 3647 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & SetCRT2ToLCD) {
3804 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); 3648 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
3805 } 3649 }
3806 } else if((HwInfo->jChipType == SIS_630) || 3650 } else if((SiS_Pr->ChipType == SIS_630) ||
3807 (HwInfo->jChipType == SIS_730)) { 3651 (SiS_Pr->ChipType == SIS_730)) {
3808 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3652 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3809 } 3653 }
3810 } 3654 }
@@ -3812,25 +3656,27 @@ SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3812 /* SetPitch: Adapt to virtual size & position */ 3656 /* SetPitch: Adapt to virtual size & position */
3813 SiS_SetPitchCRT2(SiS_Pr, pScrn); 3657 SiS_SetPitchCRT2(SiS_Pr, pScrn);
3814 3658
3659 SiS_Handle760(SiS_Pr);
3660
3815 return TRUE; 3661 return TRUE;
3816} 3662}
3817 3663
3818/*********************************************/ 3664/*********************************************/
3819/* XFree86: SiSBIOSSetModeCRT1() */ 3665/* X.org/XFree86: SiSBIOSSetModeCRT1() */
3820/* for Dual-Head modes */ 3666/* for Dual-Head modes */
3821/*********************************************/ 3667/*********************************************/
3822 3668
3823BOOLEAN 3669BOOLEAN
3824SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn, 3670SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
3825 DisplayModePtr mode, BOOLEAN IsCustom) 3671 DisplayModePtr mode, BOOLEAN IsCustom)
3826{ 3672{
3673 SISIOADDRESS BaseAddr = SiS_Pr->IOAddress;
3827 SISPtr pSiS = SISPTR(pScrn); 3674 SISPtr pSiS = SISPTR(pScrn);
3828 SISIOADDRESS BaseAddr = HwInfo->ulIOAddress; 3675 unsigned short ModeIdIndex, ModeNo = 0;
3829 USHORT ModeIdIndex, ModeNo=0; 3676 unsigned char backupreg = 0;
3830 UCHAR backupreg=0;
3831#ifdef SISDUALHEAD 3677#ifdef SISDUALHEAD
3832 SISEntPtr pSiSEnt = pSiS->entityPrivate; 3678 SISEntPtr pSiSEnt = pSiS->entityPrivate;
3833 UCHAR backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0; 3679 unsigned char backupcr30, backupcr31, backupcr38, backupcr35, backupp40d=0;
3834 BOOLEAN backupcustom; 3680 BOOLEAN backupcustom;
3835#endif 3681#endif
3836 3682
@@ -3838,43 +3684,41 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3838 3684
3839 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) { 3685 if((IsCustom) && (SiS_CheckBuildCustomMode(pScrn, mode, pSiS->VBFlags))) {
3840 3686
3841 USHORT temptemp = SiS_Pr->CVDisplay; 3687 unsigned short temptemp = SiS_Pr->CVDisplay;
3842 3688
3843 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1; 3689 if(SiS_Pr->CModeFlag & DoubleScanMode) temptemp >>= 1;
3844 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1; 3690 else if(SiS_Pr->CInfoFlag & InterlaceMode) temptemp <<= 1;
3845 3691
3846 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3692 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3847 "Setting custom mode %dx%d on CRT1\n", 3693 "Setting custom mode %dx%d on CRT1\n",
3848 SiS_Pr->CHDisplay, temptemp); 3694 SiS_Pr->CHDisplay, temptemp);
3849 ModeNo = 0xfe; 3695 ModeNo = 0xfe;
3850 3696
3851 } else { 3697 } else {
3852 3698
3853 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); 3699 ModeNo = SiS_GetModeNumber(pScrn, mode, 0); /* don't give VBFlags */
3854 if(!ModeNo) return FALSE; 3700 if(!ModeNo) return FALSE;
3855 3701
3856 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3702 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3857 "Setting standard mode 0x%x on CRT1\n", ModeNo); 3703 "Setting standard mode 0x%x on CRT1\n", ModeNo);
3858 } 3704 }
3859 3705
3860 SiSInitPtr(SiS_Pr, HwInfo); 3706 SiSInitPtr(SiS_Pr);
3861 SiSRegInit(SiS_Pr, BaseAddr); 3707 SiSRegInit(SiS_Pr, BaseAddr);
3862 SiS_GetSysFlags(SiS_Pr, HwInfo); 3708 SiS_GetSysFlags(SiS_Pr);
3863#if (defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__)) 3709#if defined(i386) || defined(__i386) || defined(__i386__) || defined(__AMD64__) || defined(__amd64__) || defined(__x86_64__)
3864 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff); 3710 SiS_Pr->SiS_VGAINFO = SiS_GetSetBIOSScratch(pScrn, 0x489, 0xff);
3865#else 3711#else
3866 SiS_Pr->SiS_VGAINFO = 0x11; 3712 SiS_Pr->SiS_VGAINFO = 0x11;
3867#endif 3713#endif
3868 SiSInitPCIetc(SiS_Pr, HwInfo);
3869 SiSSetLVDSetc(SiS_Pr, HwInfo);
3870 SiSDetermineROMUsage(SiS_Pr, HwInfo);
3871
3872 /* We don't clear the buffer in X */
3873 SiS_Pr->SiS_flag_clearbuffer = 0;
3874 3714
3875 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86); 3715 SiS_SetReg(SiS_Pr->SiS_P3c4,0x05,0x86);
3876 3716
3877 SiS_UnLockCRT2(SiS_Pr, HwInfo); 3717 SiSInitPCIetc(SiS_Pr);
3718 SiSSetLVDSetc(SiS_Pr);
3719 SiSDetermineROMUsage(SiS_Pr);
3720
3721 SiS_UnLockCRT2(SiS_Pr);
3878 3722
3879 if(!SiS_Pr->UseCustomMode) { 3723 if(!SiS_Pr->UseCustomMode) {
3880 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE; 3724 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
@@ -3883,10 +3727,11 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3883 } 3727 }
3884 3728
3885 /* Determine VBType */ 3729 /* Determine VBType */
3886 SiS_GetVBType(SiS_Pr, HwInfo); 3730 SiS_GetVBType(SiS_Pr);
3887 3731
3888 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3732 SiS_InitVB(SiS_Pr);
3889 if(HwInfo->jChipType >= SIS_315H) { 3733 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3734 if(SiS_Pr->ChipType >= SIS_315H) {
3890 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 3735 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
3891 } else { 3736 } else {
3892 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 3737 backupreg = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
@@ -3895,25 +3740,29 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3895 3740
3896 /* Get VB information (connectors, connected devices) */ 3741 /* Get VB information (connectors, connected devices) */
3897 /* (We don't care if the current mode is a CRT2 mode) */ 3742 /* (We don't care if the current mode is a CRT2 mode) */
3898 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, 0); 3743 SiS_GetVBInfo(SiS_Pr, ModeNo, ModeIdIndex, 0);
3899 SiS_SetYPbPr(SiS_Pr, HwInfo); 3744 SiS_SetYPbPr(SiS_Pr);
3900 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3745 SiS_SetTVMode(SiS_Pr, ModeNo, ModeIdIndex);
3901 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3746 SiS_GetLCDResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3902 SiS_SetLowModeTest(SiS_Pr, ModeNo, HwInfo); 3747 SiS_SetLowModeTest(SiS_Pr, ModeNo);
3903 3748
3904 if(HwInfo->jChipType >= SIS_315H) { 3749 SiS_OpenCRTC(SiS_Pr);
3905 SiS_SetupCR5x(SiS_Pr, HwInfo);
3906 }
3907 3750
3908 /* Set mode on CRT1 */ 3751 /* Set mode on CRT1 */
3909 SiS_SetCRT1Group(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 3752 SiS_SetCRT1Group(SiS_Pr, ModeNo, ModeIdIndex);
3910 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3753 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3911 SiS_SetCRT2Group(SiS_Pr, HwInfo, ModeNo); 3754 SiS_SetCRT2Group(SiS_Pr, ModeNo);
3912 } 3755 }
3913 3756
3914 /* SetPitch: Adapt to virtual size & position */ 3757 /* SetPitch: Adapt to virtual size & position */
3915 SiS_SetPitchCRT1(SiS_Pr, pScrn); 3758 SiS_SetPitchCRT1(SiS_Pr, pScrn);
3916 3759
3760 SiS_HandleCRT1(SiS_Pr);
3761
3762 SiS_StrangeStuff(SiS_Pr);
3763
3764 SiS_CloseCRTC(SiS_Pr);
3765
3917#ifdef SISDUALHEAD 3766#ifdef SISDUALHEAD
3918 if(pSiS->DualHeadMode) { 3767 if(pSiS->DualHeadMode) {
3919 pSiSEnt->CRT1ModeNo = ModeNo; 3768 pSiSEnt->CRT1ModeNo = ModeNo;
@@ -3933,7 +3782,7 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3933#ifdef SISDUALHEAD 3782#ifdef SISDUALHEAD
3934 if(pSiS->DualHeadMode) { 3783 if(pSiS->DualHeadMode) {
3935 if(pSiSEnt->CRT2ModeNo != -1) { 3784 if(pSiSEnt->CRT2ModeNo != -1) {
3936 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3, 3785 xf86DrvMsgVerb(pScrn->scrnIndex, X_INFO, 3,
3937 "(Re-)Setting mode for CRT2\n"); 3786 "(Re-)Setting mode for CRT2\n");
3938 backupcustom = SiS_Pr->UseCustomMode; 3787 backupcustom = SiS_Pr->UseCustomMode;
3939 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 3788 backupcr30 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
@@ -3952,9 +3801,11 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3952 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35); 3801 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,pSiSEnt->CRT2CR35);
3953 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38); 3802 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,pSiSEnt->CRT2CR38);
3954 } 3803 }
3955 SiSBIOSSetModeCRT2(SiS_Pr, HwInfo, pSiSEnt->pScrn_1, 3804
3805 SiSBIOSSetModeCRT2(SiS_Pr, pSiSEnt->pScrn_1,
3956 pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom); 3806 pSiSEnt->CRT2DMode, pSiSEnt->CRT2IsCustom);
3957 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30); 3807
3808 SiS_SetReg(SiS_Pr->SiS_P3d4,0x30,backupcr30);
3958 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31); 3809 SiS_SetReg(SiS_Pr->SiS_P3d4,0x31,backupcr31);
3959 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35); 3810 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupcr35);
3960 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38); 3811 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupcr38);
@@ -3970,22 +3821,20 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3970 * possibly overwritten 3821 * possibly overwritten
3971 */ 3822 */
3972 3823
3973 SiS_HandleCRT1(SiS_Pr);
3974
3975 SiS_StrangeStuff(SiS_Pr, HwInfo);
3976
3977 SiS_DisplayOn(SiS_Pr); 3824 SiS_DisplayOn(SiS_Pr);
3978 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF); 3825 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0xFF);
3979 3826
3980 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 3827 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
3981 if(HwInfo->jChipType >= SIS_315H) { 3828 if(SiS_Pr->ChipType >= SIS_315H) {
3982 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg); 3829 SiS_SetReg(SiS_Pr->SiS_P3d4,0x38,backupreg);
3983 } else if((HwInfo->jChipType == SIS_630) || 3830 } else if((SiS_Pr->ChipType == SIS_630) ||
3984 (HwInfo->jChipType == SIS_730)) { 3831 (SiS_Pr->ChipType == SIS_730)) {
3985 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg); 3832 SiS_SetReg(SiS_Pr->SiS_P3d4,0x35,backupreg);
3986 } 3833 }
3987 } 3834 }
3988 3835
3836 SiS_Handle760(SiS_Pr);
3837
3989 /* Backup/Set ModeNo in BIOS scratch area */ 3838 /* Backup/Set ModeNo in BIOS scratch area */
3990 SiS_GetSetModeID(pScrn,ModeNo); 3839 SiS_GetSetModeID(pScrn,ModeNo);
3991 3840
@@ -3993,84 +3842,6 @@ SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
3993} 3842}
3994#endif /* Linux_XF86 */ 3843#endif /* Linux_XF86 */
3995 3844
3996
3997#ifdef LINUX_XF86
3998BOOLEAN
3999SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4000{
4001 const USHORT PanelTypeTable300[16] = {
4002 0xc101, 0xc117, 0x0121, 0xc135, 0xc142, 0xc152, 0xc162, 0xc072,
4003 0xc181, 0xc192, 0xc1a1, 0xc1b6, 0xc1c2, 0xc0d2, 0xc1e2, 0xc1f2
4004 };
4005 const USHORT PanelTypeTable31030x[16] = {
4006 0xc102, 0xc112, 0x0122, 0xc132, 0xc142, 0xc152, 0xc169, 0xc179,
4007 0x0189, 0xc192, 0xc1a2, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4008 };
4009 const USHORT PanelTypeTable310LVDS[16] = {
4010 0xc111, 0xc122, 0xc133, 0xc144, 0xc155, 0xc166, 0xc177, 0xc188,
4011 0xc199, 0xc0aa, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
4012 };
4013 USHORT tempax,tempbx,temp;
4014
4015 if(HwInfo->jChipType < SIS_315H) {
4016
4017 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18);
4018 tempbx = tempax & 0x0F;
4019 if(!(tempax & 0x10)){
4020 if(SiS_Pr->SiS_IF_DEF_LVDS == 1){
4021 tempbx = 0;
4022 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x38);
4023 if(temp & 0x40) tempbx |= 0x08;
4024 if(temp & 0x20) tempbx |= 0x02;
4025 if(temp & 0x01) tempbx |= 0x01;
4026 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x39);
4027 if(temp & 0x80) tempbx |= 0x04;
4028 } else {
4029 return 0;
4030 }
4031 }
4032 tempbx = PanelTypeTable300[tempbx];
4033 tempbx |= LCDSync;
4034 temp = tempbx & 0x00FF;
4035 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4036 temp = (tempbx & 0xFF00) >> 8;
4037 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4038
4039 } else {
4040
4041 if(HwInfo->jChipType >= SIS_661) return 0;
4042
4043 tempax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1a);
4044 tempax &= 0x1e;
4045 tempax >>= 1;
4046 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
4047 if(tempax == 0) {
4048 /* TODO: Include HUGE detection routine
4049 (Probably not worth bothering)
4050 */
4051 return 0;
4052 }
4053 temp = tempax & 0xff;
4054 tempax--;
4055 tempbx = PanelTypeTable310LVDS[tempax];
4056 } else {
4057 tempbx = PanelTypeTable31030x[tempax];
4058 temp = tempbx & 0xff;
4059 }
4060 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,temp);
4061 tempbx = (tempbx & 0xff00) >> 8;
4062 temp = tempbx & 0xc1;
4063 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,~(LCDSyncBit|LCDRGB18Bit),temp);
4064 if(SiS_Pr->SiS_VBType & VB_SISVB) {
4065 temp = tempbx & 0x04;
4066 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x39,0xfb,temp);
4067 }
4068
4069 }
4070 return 1;
4071}
4072#endif
4073
4074#ifndef GETBITSTR 3845#ifndef GETBITSTR
4075#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l)) 3846#define BITMASK(h,l) (((unsigned)(1U << ((h)-(l)+1))-1)<<(l))
4076#define GENMASK(mask) BITMASK(1?mask,0?mask) 3847#define GENMASK(mask) BITMASK(1?mask,0?mask)
@@ -4078,26 +3849,28 @@ SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4078#define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to)) 3849#define GETBITSTR(val,from,to) ((GETBITS(val,from)) << (0?to))
4079#endif 3850#endif
4080 3851
4081static void 3852void
4082SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth) 3853SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth)
4083{ 3854{
3855 int x = 1; /* Fix sync */
3856
4084 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */ 3857 SiS_Pr->CCRT1CRTC[0] = ((SiS_Pr->CHTotal >> 3) - 5) & 0xff; /* CR0 */
4085 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */ 3858 SiS_Pr->CCRT1CRTC[1] = (SiS_Pr->CHDisplay >> 3) - 1; /* CR1 */
4086 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */ 3859 SiS_Pr->CCRT1CRTC[2] = (SiS_Pr->CHBlankStart >> 3) - 1; /* CR2 */
4087 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */ 3860 SiS_Pr->CCRT1CRTC[3] = (((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x1F) | 0x80; /* CR3 */
4088 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */ 3861 SiS_Pr->CCRT1CRTC[4] = (SiS_Pr->CHSyncStart >> 3) + 3; /* CR4 */
4089 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */ 3862 SiS_Pr->CCRT1CRTC[5] = ((((SiS_Pr->CHBlankEnd >> 3) - 1) & 0x20) << 2) | /* CR5 */
4090 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F); 3863 (((SiS_Pr->CHSyncEnd >> 3) + 3) & 0x1F);
4091 3864
4092 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */ 3865 SiS_Pr->CCRT1CRTC[6] = (SiS_Pr->CVTotal - 2) & 0xFF; /* CR6 */
4093 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */ 3866 SiS_Pr->CCRT1CRTC[7] = (((SiS_Pr->CVTotal - 2) & 0x100) >> 8) /* CR7 */
4094 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7) 3867 | (((SiS_Pr->CVDisplay - 1) & 0x100) >> 7)
4095 | ((SiS_Pr->CVSyncStart & 0x100) >> 6) 3868 | (((SiS_Pr->CVSyncStart - x) & 0x100) >> 6)
4096 | (((SiS_Pr->CVBlankStart - 1) & 0x100) >> 5) 3869 | (((SiS_Pr->CVBlankStart- 1) & 0x100) >> 5)
4097 | 0x10 3870 | 0x10
4098 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4) 3871 | (((SiS_Pr->CVTotal - 2) & 0x200) >> 4)
4099 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3) 3872 | (((SiS_Pr->CVDisplay - 1) & 0x200) >> 3)
4100 | ((SiS_Pr->CVSyncStart & 0x200) >> 2); 3873 | (((SiS_Pr->CVSyncStart - x) & 0x200) >> 2);
4101 3874
4102 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */ 3875 SiS_Pr->CCRT1CRTC[16] = ((((SiS_Pr->CVBlankStart - 1) & 0x200) >> 4) >> 5); /* CR9 */
4103 3876
@@ -4106,55 +3879,44 @@ SiS_CalcCRRegisters(SiS_Private *SiS_Pr, int depth)
4106 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40; 3879 else if(SiS_Pr->CHDisplay >= 640) SiS_Pr->CCRT1CRTC[16] |= 0x40;
4107 } 3880 }
4108 3881
4109#if 0 3882 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart - x) & 0xFF; /* CR10 */
4110 if (mode->VScan >= 32) 3883 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd - x) & 0x0F) | 0x80; /* CR11 */
4111 regp->CRTC[9] |= 0x1F;
4112 else if (mode->VScan > 1)
4113 regp->CRTC[9] |= mode->VScan - 1;
4114#endif
4115
4116 SiS_Pr->CCRT1CRTC[8] = (SiS_Pr->CVSyncStart ) & 0xFF; /* CR10 */
4117 SiS_Pr->CCRT1CRTC[9] = ((SiS_Pr->CVSyncEnd ) & 0x0F) | 0x80; /* CR11 */
4118 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */ 3884 SiS_Pr->CCRT1CRTC[10] = (SiS_Pr->CVDisplay - 1) & 0xFF; /* CR12 */
4119 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */ 3885 SiS_Pr->CCRT1CRTC[11] = (SiS_Pr->CVBlankStart - 1) & 0xFF; /* CR15 */
4120 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */ 3886 SiS_Pr->CCRT1CRTC[12] = (SiS_Pr->CVBlankEnd - 1) & 0xFF; /* CR16 */
4121 3887
4122 SiS_Pr->CCRT1CRTC[13] = /* SRA */ 3888 SiS_Pr->CCRT1CRTC[13] = /* SRA */
4123 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) | 3889 GETBITSTR((SiS_Pr->CVTotal -2), 10:10, 0:0) |
4124 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) | 3890 GETBITSTR((SiS_Pr->CVDisplay -1), 10:10, 1:1) |
4125 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) | 3891 GETBITSTR((SiS_Pr->CVBlankStart-1), 10:10, 2:2) |
4126 GETBITSTR((SiS_Pr->CVSyncStart ), 10:10, 3:3) | 3892 GETBITSTR((SiS_Pr->CVSyncStart -x), 10:10, 3:3) |
4127 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) | 3893 GETBITSTR((SiS_Pr->CVBlankEnd -1), 8:8, 4:4) |
4128 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ; 3894 GETBITSTR((SiS_Pr->CVSyncEnd ), 4:4, 5:5) ;
4129 3895
4130 SiS_Pr->CCRT1CRTC[14] = /* SRB */ 3896 SiS_Pr->CCRT1CRTC[14] = /* SRB */
4131 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) | 3897 GETBITSTR((SiS_Pr->CHTotal >> 3) - 5, 9:8, 1:0) |
4132 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) | 3898 GETBITSTR((SiS_Pr->CHDisplay >> 3) - 1, 9:8, 3:2) |
4133 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) | 3899 GETBITSTR((SiS_Pr->CHBlankStart >> 3) - 1, 9:8, 5:4) |
4134 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ; 3900 GETBITSTR((SiS_Pr->CHSyncStart >> 3) + 3, 9:8, 7:6) ;
4135 3901
4136 3902
4137 SiS_Pr->CCRT1CRTC[15] = /* SRC */ 3903 SiS_Pr->CCRT1CRTC[15] = /* SRC */
4138 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) | 3904 GETBITSTR((SiS_Pr->CHBlankEnd >> 3) - 1, 7:6, 1:0) |
4139 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ; 3905 GETBITSTR((SiS_Pr->CHSyncEnd >> 3) + 3, 5:5, 2:2) ;
4140} 3906}
4141 3907
4142void 3908void
4143SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex) 3909SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
3910 unsigned short ModeIdIndex)
4144{ 3911{
4145 USHORT modeflag, tempax, tempbx, VGAHDE = SiS_Pr->SiS_VGAHDE; 3912 unsigned short modeflag, tempax, tempbx = 0, remaining = 0;
4146 int i,j; 3913 unsigned short VGAHDE = SiS_Pr->SiS_VGAHDE;
3914 int i, j;
4147 3915
4148 /* 1:1 data: use data set by setcrt1crtc() */ 3916 /* 1:1 data: use data set by setcrt1crtc() */
4149 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return; 3917 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
4150 3918
4151 if(ModeNo <= 0x13) { 3919 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
4152 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
4153 } else if(SiS_Pr->UseCustomMode) {
4154 modeflag = SiS_Pr->CModeFlag;
4155 } else {
4156 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
4157 }
4158 3920
4159 if(modeflag & HalfDCLK) VGAHDE >>= 1; 3921 if(modeflag & HalfDCLK) VGAHDE >>= 1;
4160 3922
@@ -4164,32 +3926,91 @@ SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4164 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE; 3926 SiS_Pr->CVDisplay = SiS_Pr->SiS_VGAVDE;
4165 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE; 3927 SiS_Pr->CVBlankStart = SiS_Pr->SiS_VGAVDE;
4166 3928
4167 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes; 3929 if(SiS_Pr->ChipType < SIS_315H) {
4168 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */ 3930#ifdef SIS300
4169 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3931 tempbx = SiS_Pr->SiS_VGAHT;
4170 tempax = SiS_Pr->PanelXRes; 3932 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3933 tempbx = SiS_Pr->PanelHT;
3934 }
3935 if(modeflag & HalfDCLK) tempbx >>= 1;
3936 remaining = tempbx % 8;
3937#endif
3938 } else {
3939#ifdef SIS315H
3940 /* OK for LCDA, LVDS */
3941 tempbx = SiS_Pr->PanelHT - SiS_Pr->PanelXRes;
3942 tempax = SiS_Pr->SiS_VGAHDE; /* not /2 ! */
3943 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3944 tempax = SiS_Pr->PanelXRes;
3945 }
3946 tempbx += tempax;
3947 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
3948#endif
4171 } 3949 }
4172 tempbx += tempax;
4173 if(modeflag & HalfDCLK) tempbx -= VGAHDE;
4174 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx; 3950 SiS_Pr->CHTotal = SiS_Pr->CHBlankEnd = tempbx;
4175 3951
4176 tempax = VGAHDE; 3952 if(SiS_Pr->ChipType < SIS_315H) {
4177 tempbx = SiS_Pr->CHTotal; 3953#ifdef SIS300
4178 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3954 if(SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) {
4179 tempbx = SiS_Pr->PanelXRes; 3955 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE + ((SiS_Pr->PanelHRS + 1) & ~1);
4180 if(modeflag & HalfDCLK) tempbx >>= 1; 3956 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + SiS_Pr->PanelHRE;
4181 tempax += ((tempbx - tempax) >> 1); 3957 if(modeflag & HalfDCLK) {
3958 SiS_Pr->CHSyncStart >>= 1;
3959 SiS_Pr->CHSyncEnd >>= 1;
3960 }
3961 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3962 tempax = (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) >> 1;
3963 tempbx = (SiS_Pr->PanelHRS + 1) & ~1;
3964 if(modeflag & HalfDCLK) {
3965 tempax >>= 1;
3966 tempbx >>= 1;
3967 }
3968 SiS_Pr->CHSyncStart = (VGAHDE + tempax + tempbx + 7) & ~7;
3969 tempax = SiS_Pr->PanelHRE + 7;
3970 if(modeflag & HalfDCLK) tempax >>= 1;
3971 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + tempax) & ~7;
3972 } else {
3973 SiS_Pr->CHSyncStart = SiS_Pr->SiS_VGAHDE;
3974 if(modeflag & HalfDCLK) {
3975 SiS_Pr->CHSyncStart >>= 1;
3976 tempax = ((SiS_Pr->CHTotal - SiS_Pr->CHSyncStart) / 3) << 1;
3977 SiS_Pr->CHSyncEnd = SiS_Pr->CHSyncStart + tempax;
3978 } else {
3979 SiS_Pr->CHSyncEnd = (SiS_Pr->CHSyncStart + (SiS_Pr->CHTotal / 10) + 7) & ~7;
3980 SiS_Pr->CHSyncStart += 8;
3981 }
3982 }
3983#endif
3984 } else {
3985#ifdef SIS315H
3986 tempax = VGAHDE;
3987 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3988 tempbx = SiS_Pr->PanelXRes;
3989 if(modeflag & HalfDCLK) tempbx >>= 1;
3990 tempax += ((tempbx - tempax) >> 1);
3991 }
3992 tempax += SiS_Pr->PanelHRS;
3993 SiS_Pr->CHSyncStart = tempax;
3994 tempax += SiS_Pr->PanelHRE;
3995 SiS_Pr->CHSyncEnd = tempax;
3996#endif
4182 } 3997 }
4183 3998
4184 tempax += SiS_Pr->PanelHRS;
4185 SiS_Pr->CHSyncStart = tempax;
4186 tempax += SiS_Pr->PanelHRE;
4187 SiS_Pr->CHSyncEnd = tempax;
4188
4189 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes; 3999 tempbx = SiS_Pr->PanelVT - SiS_Pr->PanelYRes;
4190 tempax = SiS_Pr->SiS_VGAVDE; 4000 tempax = SiS_Pr->SiS_VGAVDE;
4191 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 4001 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
4192 tempax = SiS_Pr->PanelYRes; 4002 tempax = SiS_Pr->PanelYRes;
4003 } else if(SiS_Pr->ChipType < SIS_315H) {
4004#ifdef SIS300
4005 /* Stupid hack for 640x400/320x200 */
4006 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
4007 if((tempax + tempbx) == 438) tempbx += 16;
4008 } else if((SiS_Pr->SiS_LCDResInfo == Panel_800x600) ||
4009 (SiS_Pr->SiS_LCDResInfo == Panel_1024x600)) {
4010 tempax = 0;
4011 tempbx = SiS_Pr->SiS_VGAVT;
4012 }
4013#endif
4193 } 4014 }
4194 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax; 4015 SiS_Pr->CVTotal = SiS_Pr->CVBlankEnd = tempbx + tempax;
4195 4016
@@ -4201,22 +4022,28 @@ SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4201 SiS_Pr->CVSyncStart = tempax; 4022 SiS_Pr->CVSyncStart = tempax;
4202 tempax += SiS_Pr->PanelVRE; 4023 tempax += SiS_Pr->PanelVRE;
4203 SiS_Pr->CVSyncEnd = tempax; 4024 SiS_Pr->CVSyncEnd = tempax;
4025 if(SiS_Pr->ChipType < SIS_315H) {
4026 SiS_Pr->CVSyncStart--;
4027 SiS_Pr->CVSyncEnd--;
4028 }
4204 4029
4205 SiS_CalcCRRegisters(SiS_Pr, 8); 4030 SiS_CalcCRRegisters(SiS_Pr, 8);
4031 SiS_Pr->CCRT1CRTC[15] &= ~0xF8;
4032 SiS_Pr->CCRT1CRTC[15] |= (remaining << 4);
4206 SiS_Pr->CCRT1CRTC[16] &= ~0xE0; 4033 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
4207 4034
4208 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f); 4035 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
4209 4036
4210 for(i=0,j=0;i<=7;i++,j++) { 4037 for(i = 0, j = 0; i <= 7; i++, j++) {
4211 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 4038 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4212 } 4039 }
4213 for(j=0x10;i<=10;i++,j++) { 4040 for(j = 0x10; i <= 10; i++, j++) {
4214 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 4041 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4215 } 4042 }
4216 for(j=0x15;i<=12;i++,j++) { 4043 for(j = 0x15; i <= 12; i++, j++) {
4217 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]); 4044 SiS_SetReg(SiS_Pr->SiS_P3d4,j,SiS_Pr->CCRT1CRTC[i]);
4218 } 4045 }
4219 for(j=0x0A;i<=15;i++,j++) { 4046 for(j = 0x0A; i <= 15; i++, j++) {
4220 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]); 4047 SiS_SetReg(SiS_Pr->SiS_P3c4,j,SiS_Pr->CCRT1CRTC[i]);
4221 } 4048 }
4222 4049
@@ -4227,1092 +4054,192 @@ SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex)
4227 if(modeflag & DoubleScanMode) tempax |= 0x80; 4054 if(modeflag & DoubleScanMode) tempax |= 0x80;
4228 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax); 4055 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,0x5F,tempax);
4229 4056
4057#ifdef SIS_XORG_XF86
4230#ifdef TWDEBUG 4058#ifdef TWDEBUG
4231 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n", 4059 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n",
4232 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal, 4060 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
4233 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal, 4061 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
4234 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd); 4062 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
4235
4236 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 4063 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4237 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1], 4064 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
4238 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3], 4065 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
4239 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5], 4066 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
4240 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]); 4067 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
4241 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n", 4068 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4242 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9], 4069 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
4243 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11], 4070 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
4244 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13], 4071 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
4245 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]); 4072 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
4246 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]); 4073 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
4247#endif 4074#endif
4075#endif
4248} 4076}
4249 4077
4250#ifdef LINUX_XF86
4251
4252void 4078void
4253SiS_MakeClockRegs(ScrnInfoPtr pScrn, int clock, UCHAR *p2b, UCHAR *p2c) 4079SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
4254{ 4080 int xres, int yres,
4255 int out_n, out_dn, out_div, out_sbit, out_scale; 4081#ifdef SIS_XORG_XF86
4256 unsigned int vclk[5]; 4082 DisplayModePtr current
4257
4258#define Midx 0
4259#define Nidx 1
4260#define VLDidx 2
4261#define Pidx 3
4262#define PSNidx 4
4263
4264 if(SiS_compute_vclk(clock, &out_n, &out_dn, &out_div, &out_sbit, &out_scale)) {
4265 (*p2b) = (out_div == 2) ? 0x80 : 0x00;
4266 (*p2b) |= ((out_n - 1) & 0x7f);
4267 (*p2c) = (out_dn - 1) & 0x1f;
4268 (*p2c) |= (((out_scale - 1) & 3) << 5);
4269 (*p2c) |= ((out_sbit & 0x01) << 7);
4270#ifdef TWDEBUG
4271 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sb %d sc %d\n",
4272 clock, out_n, out_dn, out_div, out_sbit, out_scale);
4273#endif 4083#endif
4274 } else { 4084#ifdef SIS_LINUX_KERNEL
4275 SiSCalcClock(pScrn, clock, 2, vclk); 4085 struct fb_var_screeninfo *var, BOOLEAN writeres
4276 (*p2b) = (vclk[VLDidx] == 2) ? 0x80 : 0x00;
4277 (*p2b) |= (vclk[Midx] - 1) & 0x7f;
4278 (*p2c) = (vclk[Nidx] - 1) & 0x1f;
4279 if(vclk[Pidx] <= 4) {
4280 /* postscale 1,2,3,4 */
4281 (*p2c) |= ((vclk[Pidx] - 1) & 3) << 5;
4282 } else {
4283 /* postscale 6,8 */
4284 (*p2c) |= (((vclk[Pidx] / 2) - 1) & 3) << 5;
4285 (*p2c) |= 0x80;
4286 }
4287#ifdef TWDEBUG
4288 xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Clock %d: n %d dn %d div %d sc %d\n",
4289 clock, vclk[Midx], vclk[Nidx], vclk[VLDidx], vclk[Pidx]);
4290#endif 4086#endif
4291 } 4087)
4292}
4293
4294#endif
4295
4296/* ================ XFREE86/X.ORG ================= */
4297
4298/* Helper functions */
4299
4300#ifdef LINUX_XF86
4301
4302USHORT
4303SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags)
4304{ 4088{
4305 SISPtr pSiS = SISPTR(pScrn); 4089 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
4306 int depth = pSiS->CurrentLayout.bitsPerPixel; 4090 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
4307 4091 unsigned char sr_data, cr_data, cr_data2;
4308 pSiS->SiS_Pr->CModeFlag = 0; 4092 int A, B, C, D, E, F, temp;
4309
4310 pSiS->SiS_Pr->CDClock = mode->Clock;
4311
4312 pSiS->SiS_Pr->CHDisplay = mode->HDisplay;
4313 pSiS->SiS_Pr->CHSyncStart = mode->HSyncStart;
4314 pSiS->SiS_Pr->CHSyncEnd = mode->HSyncEnd;
4315 pSiS->SiS_Pr->CHTotal = mode->HTotal;
4316
4317 pSiS->SiS_Pr->CVDisplay = mode->VDisplay;
4318 pSiS->SiS_Pr->CVSyncStart = mode->VSyncStart;
4319 pSiS->SiS_Pr->CVSyncEnd = mode->VSyncEnd;
4320 pSiS->SiS_Pr->CVTotal = mode->VTotal;
4321
4322 pSiS->SiS_Pr->CFlags = mode->Flags;
4323
4324 if(pSiS->SiS_Pr->CFlags & V_INTERLACE) {
4325 pSiS->SiS_Pr->CVDisplay >>= 1;
4326 pSiS->SiS_Pr->CVSyncStart >>= 1;
4327 pSiS->SiS_Pr->CVSyncEnd >>= 1;
4328 pSiS->SiS_Pr->CVTotal >>= 1;
4329 }
4330 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) {
4331 /* pSiS->SiS_Pr->CDClock <<= 1; */
4332 pSiS->SiS_Pr->CVDisplay <<= 1;
4333 pSiS->SiS_Pr->CVSyncStart <<= 1;
4334 pSiS->SiS_Pr->CVSyncEnd <<= 1;
4335 pSiS->SiS_Pr->CVTotal <<= 1;
4336 }
4337
4338 pSiS->SiS_Pr->CHBlankStart = pSiS->SiS_Pr->CHDisplay;
4339 pSiS->SiS_Pr->CHBlankEnd = pSiS->SiS_Pr->CHTotal;
4340 pSiS->SiS_Pr->CVBlankStart = pSiS->SiS_Pr->CVSyncStart - 1;
4341 pSiS->SiS_Pr->CVBlankEnd = pSiS->SiS_Pr->CVTotal;
4342 4093
4343 SiS_MakeClockRegs(pScrn, pSiS->SiS_Pr->CDClock, &pSiS->SiS_Pr->CSR2B, &pSiS->SiS_Pr->CSR2C); 4094 sr_data = crdata[14];
4344 4095
4345 pSiS->SiS_Pr->CSRClock = (pSiS->SiS_Pr->CDClock / 1000) + 1; 4096 /* Horizontal total */
4097 HT = crdata[0] | ((unsigned short)(sr_data & 0x03) << 8);
4098 A = HT + 5;
4346 4099
4347 SiS_CalcCRRegisters(pSiS->SiS_Pr, depth); 4100 /* Horizontal display enable end */
4101 HDE = crdata[1] | ((unsigned short)(sr_data & 0x0C) << 6);
4102 E = HDE + 1;
4348 4103
4349 switch(depth) { 4104 /* Horizontal retrace (=sync) start */
4350 case 8: pSiS->SiS_Pr->CModeFlag |= 0x223b; break; 4105 HRS = crdata[4] | ((unsigned short)(sr_data & 0xC0) << 2);
4351 case 16: pSiS->SiS_Pr->CModeFlag |= 0x227d; break; 4106 F = HRS - E - 3;
4352 case 32: pSiS->SiS_Pr->CModeFlag |= 0x22ff; break;
4353 default: return 0;
4354 }
4355 4107
4356 if(pSiS->SiS_Pr->CFlags & V_DBLSCAN) 4108 /* Horizontal blank start */
4357 pSiS->SiS_Pr->CModeFlag |= DoubleScanMode; 4109 HBS = crdata[2] | ((unsigned short)(sr_data & 0x30) << 4);
4358 4110
4359 if((pSiS->SiS_Pr->CVDisplay >= 1024) || 4111 sr_data = crdata[15];
4360 (pSiS->SiS_Pr->CVTotal >= 1024) || 4112 cr_data = crdata[5];
4361 (pSiS->SiS_Pr->CHDisplay >= 1024))
4362 pSiS->SiS_Pr->CModeFlag |= LineCompareOff;
4363 4113
4364 if(pSiS->SiS_Pr->CFlags & V_CLKDIV2) 4114 /* Horizontal blank end */
4365 pSiS->SiS_Pr->CModeFlag |= HalfDCLK; 4115 HBE = (crdata[3] & 0x1f) |
4116 ((unsigned short)(cr_data & 0x80) >> 2) |
4117 ((unsigned short)(sr_data & 0x03) << 6);
4366 4118
4367 pSiS->SiS_Pr->CInfoFlag = 0x0007; 4119 /* Horizontal retrace (=sync) end */
4120 HRE = (cr_data & 0x1f) | ((sr_data & 0x04) << 3);
4368 4121
4369 if(pSiS->SiS_Pr->CFlags & V_NHSYNC) 4122 temp = HBE - ((E - 1) & 255);
4370 pSiS->SiS_Pr->CInfoFlag |= 0x4000; 4123 B = (temp > 0) ? temp : (temp + 256);
4371 4124
4372 if(pSiS->SiS_Pr->CFlags & V_NVSYNC) 4125 temp = HRE - ((E + F + 3) & 63);
4373 pSiS->SiS_Pr->CInfoFlag |= 0x8000; 4126 C = (temp > 0) ? temp : (temp + 64);
4374 4127
4375 if(pSiS->SiS_Pr->CFlags & V_INTERLACE) 4128 D = B - F - C;
4376 pSiS->SiS_Pr->CInfoFlag |= InterlaceMode;
4377 4129
4378 pSiS->SiS_Pr->UseCustomMode = TRUE; 4130#ifdef SIS_XORG_XF86
4131 current->HDisplay = (E * 8);
4132 current->HSyncStart = (E * 8) + (F * 8);
4133 current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
4134 current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
4379#ifdef TWDEBUG 4135#ifdef TWDEBUG
4380 xf86DrvMsg(0, X_INFO, "Custom mode %dx%d:\n", 4136 xf86DrvMsg(0, X_INFO,
4381 pSiS->SiS_Pr->CHDisplay,pSiS->SiS_Pr->CVDisplay); 4137 "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
4382 xf86DrvMsg(0, X_INFO, "Modeflag %04x, Infoflag %04x\n", 4138 A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
4383 pSiS->SiS_Pr->CModeFlag, pSiS->SiS_Pr->CInfoFlag);
4384 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4385 pSiS->SiS_Pr->CCRT1CRTC[0], pSiS->SiS_Pr->CCRT1CRTC[1],
4386 pSiS->SiS_Pr->CCRT1CRTC[2], pSiS->SiS_Pr->CCRT1CRTC[3],
4387 pSiS->SiS_Pr->CCRT1CRTC[4], pSiS->SiS_Pr->CCRT1CRTC[5],
4388 pSiS->SiS_Pr->CCRT1CRTC[6], pSiS->SiS_Pr->CCRT1CRTC[7]);
4389 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
4390 pSiS->SiS_Pr->CCRT1CRTC[8], pSiS->SiS_Pr->CCRT1CRTC[9],
4391 pSiS->SiS_Pr->CCRT1CRTC[10], pSiS->SiS_Pr->CCRT1CRTC[11],
4392 pSiS->SiS_Pr->CCRT1CRTC[12], pSiS->SiS_Pr->CCRT1CRTC[13],
4393 pSiS->SiS_Pr->CCRT1CRTC[14], pSiS->SiS_Pr->CCRT1CRTC[15]);
4394 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", pSiS->SiS_Pr->CCRT1CRTC[16]);
4395 xf86DrvMsg(0, X_INFO, "Clock: 0x%02x, 0x%02x, %d\n",
4396 pSiS->SiS_Pr->CSR2B, pSiS->SiS_Pr->CSR2C, pSiS->SiS_Pr->CSRClock);
4397#endif
4398 return 1;
4399}
4400
4401int
4402SiS_FindPanelFromDB(SISPtr pSiS, USHORT panelvendor, USHORT panelproduct, int *maxx, int *maxy, int *prefx, int *prefy)
4403{
4404 int i, j;
4405 BOOLEAN done = FALSE;
4406
4407 i = 0;
4408 while((!done) && (SiS_PlasmaTable[i].vendor) && panelvendor) {
4409 if(SiS_PlasmaTable[i].vendor == panelvendor) {
4410 for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
4411 if(SiS_PlasmaTable[i].product[j] == panelproduct) {
4412 if(SiS_PlasmaTable[i].maxx && SiS_PlasmaTable[i].maxy) {
4413 (*maxx) = (int)SiS_PlasmaTable[i].maxx;
4414 (*maxy) = (int)SiS_PlasmaTable[i].maxy;
4415 (*prefx) = (int)SiS_PlasmaTable[i].prefx;
4416 (*prefy) = (int)SiS_PlasmaTable[i].prefy;
4417 done = TRUE;
4418 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
4419 "Identified %s, correcting max X res %d, max Y res %d\n",
4420 SiS_PlasmaTable[i].plasmaname,
4421 SiS_PlasmaTable[i].maxx, SiS_PlasmaTable[i].maxy);
4422 break;
4423 }
4424 }
4425 }
4426 }
4427 i++;
4428 }
4429 return (done) ? 1 : 0;
4430}
4431
4432/* Build a list of supported modes:
4433 * Built-in modes for which we have all data are M_T_DEFAULT,
4434 * modes derived from DDC or database data are M_T_BUILTIN
4435 */
4436DisplayModePtr
4437SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, BOOLEAN isfordvi)
4438{
4439 SISPtr pSiS = SISPTR(pScrn);
4440 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
4441 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
4442 unsigned char sr_data, cr_data, cr_data2, cr_data3;
4443 unsigned char sr2b, sr2c;
4444 float num, denum, postscalar, divider;
4445 int A, B, C, D, E, F, temp, i, j, k, l, index, vclkindex;
4446 DisplayModePtr new = NULL, current = NULL, first = NULL;
4447 BOOLEAN done = FALSE;
4448#if 0
4449 DisplayModePtr backup = NULL;
4450#endif
4451
4452 pSiS->backupmodelist = NULL;
4453 pSiS->AddedPlasmaModes = FALSE;
4454
4455 /* Initialize our pointers */
4456 if(pSiS->VGAEngine == SIS_300_VGA) {
4457#ifdef SIS300
4458 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4459#else 4139#else
4460 return NULL; 4140 (void)VBS; (void)HBS; (void)A;
4461#endif 4141#endif
4462 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4463#ifdef SIS315H
4464 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4465#else
4466 return NULL;
4467#endif
4468 } else return NULL;
4469
4470 i = 0;
4471 while(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag != 0xFFFF) {
4472
4473 index = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRT1CRTC;
4474
4475 /* 0x5a (320x240) is a pure FTSN mode, not DSTN! */
4476 if((!pSiS->FSTN) &&
4477 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID == 0x5a)) {
4478 i++;
4479 continue;
4480 }
4481 if((pSiS->FSTN) &&
4482 (pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4483 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240) &&
4484 (pSiS->SiS_Pr->SiS_RefIndex[i].ModeID != 0x5a)) {
4485 i++;
4486 continue;
4487 }
4488
4489 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4490 memset(new, 0, sizeof(DisplayModeRec));
4491 if(!(new->name = xalloc(10))) {
4492 xfree(new);
4493 return first;
4494 }
4495 if(!first) first = new;
4496 if(current) {
4497 current->next = new;
4498 new->prev = current;
4499 }
4500
4501 current = new;
4502
4503 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->SiS_RefIndex[i].XRes,
4504 pSiS->SiS_Pr->SiS_RefIndex[i].YRes);
4505
4506 current->status = MODE_OK;
4507
4508 current->type = M_T_DEFAULT;
4509
4510 vclkindex = pSiS->SiS_Pr->SiS_RefIndex[i].Ext_CRTVCLK;
4511 if(pSiS->VGAEngine == SIS_300_VGA) vclkindex &= 0x3F;
4512
4513 sr2b = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
4514 sr2c = pSiS->SiS_Pr->SiS_VCLKData[vclkindex].SR2C;
4515
4516 divider = (sr2b & 0x80) ? 2.0 : 1.0;
4517 postscalar = (sr2c & 0x80) ?
4518 ( (((sr2c >> 5) & 0x03) == 0x02) ? 6.0 : 8.0) : (((sr2c >> 5) & 0x03) + 1.0);
4519 num = (sr2b & 0x7f) + 1.0;
4520 denum = (sr2c & 0x1f) + 1.0;
4521
4522#ifdef TWDEBUG
4523 xf86DrvMsg(0, X_INFO, "------------\n");
4524 xf86DrvMsg(0, X_INFO, "sr2b: %x sr2c %x div %f ps %f num %f denum %f\n",
4525 sr2b, sr2c, divider, postscalar, num, denum);
4526#endif 4142#endif
4527 4143#ifdef SIS_LINUX_KERNEL
4528 current->Clock = (int)(14318 * (divider / postscalar) * (num / denum)); 4144 if(writeres) var->xres = xres = E * 8;
4529 4145 var->left_margin = D * 8;
4530 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[14]; 4146 var->right_margin = F * 8;
4531 /* inSISIDXREG(SISSR, 0x0b, sr_data); */ 4147 var->hsync_len = C * 8;
4532
4533 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[0];
4534 /* inSISIDXREG(SISCR, 0x00, cr_data); */
4535
4536 /* Horizontal total */
4537 HT = (cr_data & 0xff) |
4538 ((unsigned short) (sr_data & 0x03) << 8);
4539 A = HT + 5;
4540
4541 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[1];
4542 /* inSISIDXREG(SISCR, 0x01, cr_data); */
4543
4544 /* Horizontal display enable end */
4545 HDE = (cr_data & 0xff) |
4546 ((unsigned short) (sr_data & 0x0C) << 6);
4547 E = HDE + 1; /* 0x80 0x64 */
4548
4549 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[4];
4550 /* inSISIDXREG(SISCR, 0x04, cr_data); */
4551
4552 /* Horizontal retrace (=sync) start */
4553 HRS = (cr_data & 0xff) |
4554 ((unsigned short) (sr_data & 0xC0) << 2);
4555 F = HRS - E - 3; /* 0x06 0x06 */
4556
4557 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[2];
4558 /* inSISIDXREG(SISCR, 0x02, cr_data); */
4559
4560 /* Horizontal blank start */
4561 HBS = (cr_data & 0xff) |
4562 ((unsigned short) (sr_data & 0x30) << 4);
4563
4564 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[15];
4565 /* inSISIDXREG(SISSR, 0x0c, sr_data); */
4566
4567 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[3];
4568 /* inSISIDXREG(SISCR, 0x03, cr_data); */
4569
4570 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[5];
4571 /* inSISIDXREG(SISCR, 0x05, cr_data2); */
4572
4573 /* Horizontal blank end */
4574 HBE = (cr_data & 0x1f) |
4575 ((unsigned short) (cr_data2 & 0x80) >> 2) |
4576 ((unsigned short) (sr_data & 0x03) << 6);
4577
4578 /* Horizontal retrace (=sync) end */
4579 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
4580
4581 temp = HBE - ((E - 1) & 255);
4582 B = (temp > 0) ? temp : (temp + 256);
4583
4584 temp = HRE - ((E + F + 3) & 63);
4585 C = (temp > 0) ? temp : (temp + 64); /* 0x0b 0x0b */
4586
4587 D = B - F - C;
4588
4589 if((pSiS->SiS_Pr->SiS_RefIndex[i].XRes == 320) &&
4590 ((pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 200) ||
4591 (pSiS->SiS_Pr->SiS_RefIndex[i].YRes == 240))) {
4592
4593 /* Terrible hack, but correct CRTC data for
4594 * these modes only produces a black screen...
4595 * (HRE is 0, leading into a too large C and
4596 * a negative D. The CRT controller does not
4597 * seem to like correcting HRE to 50
4598 */
4599 current->HDisplay = 320;
4600 current->HSyncStart = 328;
4601 current->HSyncEnd = 376;
4602 current->HTotal = 400;
4603
4604 } else {
4605
4606 current->HDisplay = (E * 8);
4607 current->HSyncStart = (E * 8) + (F * 8);
4608 current->HSyncEnd = (E * 8) + (F * 8) + (C * 8);
4609 current->HTotal = (E * 8) + (F * 8) + (C * 8) + (D * 8);
4610
4611 }
4612
4613#ifdef TWDEBUG
4614 xf86DrvMsg(0, X_INFO,
4615 "H: A %d B %d C %d D %d E %d F %d HT %d HDE %d HRS %d HBS %d HBE %d HRE %d\n",
4616 A, B, C, D, E, F, HT, HDE, HRS, HBS, HBE, HRE);
4617#endif 4148#endif
4618 4149
4619 sr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[13]; 4150 /* Vertical */
4620 /* inSISIDXREG(SISSR, 0x0A, sr_data); */ 4151 sr_data = crdata[13];
4621 4152 cr_data = crdata[7];
4622 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[6]; 4153
4623 /* inSISIDXREG(SISCR, 0x06, cr_data); */ 4154 /* Vertical total */
4624 4155 VT = crdata[6] |
4625 cr_data2 = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[7]; 4156 ((unsigned short)(cr_data & 0x01) << 8) |
4626 /* inSISIDXREG(SISCR, 0x07, cr_data2); */ 4157 ((unsigned short)(cr_data & 0x20) << 4) |
4627 4158 ((unsigned short)(sr_data & 0x01) << 10);
4628 /* Vertical total */ 4159 A = VT + 2;
4629 VT = (cr_data & 0xFF) | 4160
4630 ((unsigned short) (cr_data2 & 0x01) << 8) | 4161 /* Vertical display enable end */
4631 ((unsigned short)(cr_data2 & 0x20) << 4) | 4162 VDE = crdata[10] |
4632 ((unsigned short) (sr_data & 0x01) << 10); 4163 ((unsigned short)(cr_data & 0x02) << 7) |
4633 A = VT + 2; 4164 ((unsigned short)(cr_data & 0x40) << 3) |
4634 4165 ((unsigned short)(sr_data & 0x02) << 9);
4635 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[10]; 4166 E = VDE + 1;
4636 /* inSISIDXREG(SISCR, 0x12, cr_data); */ 4167
4637 4168 /* Vertical retrace (=sync) start */
4638 /* Vertical display enable end */ 4169 VRS = crdata[8] |
4639 VDE = (cr_data & 0xff) | 4170 ((unsigned short)(cr_data & 0x04) << 6) |
4640 ((unsigned short) (cr_data2 & 0x02) << 7) | 4171 ((unsigned short)(cr_data & 0x80) << 2) |
4641 ((unsigned short) (cr_data2 & 0x40) << 3) | 4172 ((unsigned short)(sr_data & 0x08) << 7);
4642 ((unsigned short) (sr_data & 0x02) << 9); 4173 F = VRS + 1 - E;
4643 E = VDE + 1; 4174
4644 4175 cr_data2 = (crdata[16] & 0x01) << 5;
4645 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[8]; 4176
4646 /* inSISIDXREG(SISCR, 0x10, cr_data); */ 4177 /* Vertical blank start */
4647 4178 VBS = crdata[11] |
4648 /* Vertical retrace (=sync) start */ 4179 ((unsigned short)(cr_data & 0x08) << 5) |
4649 VRS = (cr_data & 0xff) | 4180 ((unsigned short)(cr_data2 & 0x20) << 4) |
4650 ((unsigned short) (cr_data2 & 0x04) << 6) | 4181 ((unsigned short)(sr_data & 0x04) << 8);
4651 ((unsigned short) (cr_data2 & 0x80) << 2) | 4182
4652 ((unsigned short) (sr_data & 0x08) << 7); 4183 /* Vertical blank end */
4653 F = VRS + 1 - E; 4184 VBE = crdata[12] | ((unsigned short)(sr_data & 0x10) << 4);
4654 4185 temp = VBE - ((E - 1) & 511);
4655 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[11]; 4186 B = (temp > 0) ? temp : (temp + 512);
4656 /* inSISIDXREG(SISCR, 0x15, cr_data); */ 4187
4657 4188 /* Vertical retrace (=sync) end */
4658 cr_data3 = (pSiS->SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5; 4189 VRE = (crdata[9] & 0x0f) | ((sr_data & 0x20) >> 1);
4659 /* inSISIDXREG(SISCR, 0x09, cr_data3); */ 4190 temp = VRE - ((E + F - 1) & 31);
4660 4191 C = (temp > 0) ? temp : (temp + 32);
4661 /* Vertical blank start */ 4192
4662 VBS = (cr_data & 0xff) | 4193 D = B - F - C;
4663 ((unsigned short) (cr_data2 & 0x08) << 5) | 4194
4664 ((unsigned short) (cr_data3 & 0x20) << 4) | 4195#ifdef SIS_XORG_XF86
4665 ((unsigned short) (sr_data & 0x04) << 8); 4196 current->VDisplay = VDE + 1;
4666 4197 current->VSyncStart = VRS + 1;
4667 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[12]; 4198 current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
4668 /* inSISIDXREG(SISCR, 0x16, cr_data); */ 4199 if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
4669 4200 current->VTotal = E + D + C + F;
4670 /* Vertical blank end */
4671 VBE = (cr_data & 0xff) |
4672 ((unsigned short) (sr_data & 0x10) << 4);
4673 temp = VBE - ((E - 1) & 511);
4674 B = (temp > 0) ? temp : (temp + 512);
4675
4676 cr_data = pSiS->SiS_Pr->SiS_CRT1Table[index].CR[9];
4677 /* inSISIDXREG(SISCR, 0x11, cr_data); */
4678
4679 /* Vertical retrace (=sync) end */
4680 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
4681 temp = VRE - ((E + F - 1) & 31);
4682 C = (temp > 0) ? temp : (temp + 32);
4683
4684 D = B - F - C;
4685
4686 current->VDisplay = VDE + 1;
4687 current->VSyncStart = VRS + 1;
4688 current->VSyncEnd = ((VRS & ~0x1f) | VRE) + 1;
4689 if(VRE <= (VRS & 0x1f)) current->VSyncEnd += 32;
4690 current->VTotal = E + D + C + F;
4691
4692#if 0 4201#if 0
4693 current->VDisplay = E; 4202 current->VDisplay = E;
4694 current->VSyncStart = E + D; 4203 current->VSyncStart = E + D;
4695 current->VSyncEnd = E + D + C; 4204 current->VSyncEnd = E + D + C;
4696 current->VTotal = E + D + C + F; 4205 current->VTotal = E + D + C + F;
4697#endif 4206#endif
4698
4699#ifdef TWDEBUG 4207#ifdef TWDEBUG
4700 xf86DrvMsg(0, X_INFO, 4208 xf86DrvMsg(0, X_INFO,
4701 "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n", 4209 "V: A %d B %d C %d D %d E %d F %d VT %d VDE %d VRS %d VBS %d VBE %d VRE %d\n",
4702 A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE); 4210 A, B, C, D, E, F, VT, VDE, VRS, VBS, VBE, VRE);
4703#endif 4211#endif
4704
4705 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x4000)
4706 current->Flags |= V_NHSYNC;
4707 else
4708 current->Flags |= V_PHSYNC;
4709
4710 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x8000)
4711 current->Flags |= V_NVSYNC;
4712 else
4713 current->Flags |= V_PVSYNC;
4714
4715 if(pSiS->SiS_Pr->SiS_RefIndex[i].Ext_InfoFlag & 0x0080)
4716 current->Flags |= V_INTERLACE;
4717
4718 j = 0;
4719 while(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
4720 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
4721 pSiS->SiS_Pr->SiS_RefIndex[i].ModeID) {
4722 if(pSiS->SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
4723 current->Flags |= V_DBLSCAN;
4724 }
4725 break;
4726 }
4727 j++;
4728 }
4729
4730 if(current->Flags & V_INTERLACE) {
4731 current->VDisplay <<= 1;
4732 current->VSyncStart <<= 1;
4733 current->VSyncEnd <<= 1;
4734 current->VTotal <<= 1;
4735 current->VTotal |= 1;
4736 }
4737 if(current->Flags & V_DBLSCAN) {
4738 current->Clock >>= 1;
4739 current->VDisplay >>= 1;
4740 current->VSyncStart >>= 1;
4741 current->VSyncEnd >>= 1;
4742 current->VTotal >>= 1;
4743 }
4744
4745#ifdef TWDEBUG
4746 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
4747 "Built-in: %s %.2f %d %d %d %d %d %d %d %d\n",
4748 current->name, (float)current->Clock / 1000,
4749 current->HDisplay, current->HSyncStart, current->HSyncEnd, current->HTotal,
4750 current->VDisplay, current->VSyncStart, current->VSyncEnd, current->VTotal);
4751#else
4752 (void)VBS; (void)HBS; (void)A;
4753#endif 4212#endif
4754 4213#ifdef SIS_LINUX_KERNEL
4755 i++; 4214 if(writeres) var->yres = yres = E;
4756 } 4215 var->upper_margin = D;
4757 4216 var->lower_margin = F;
4758 /* Add non-standard LCD modes for panel's detailed timings */ 4217 var->vsync_len = C;
4759
4760 if(!includelcdmodes) return first;
4761
4762 if(pSiS->SiS_Pr->CP_Vendor) {
4763 xf86DrvMsg(0, X_INFO, "Checking database for vendor %x, product %x\n",
4764 pSiS->SiS_Pr->CP_Vendor, pSiS->SiS_Pr->CP_Product);
4765 }
4766
4767 i = 0;
4768 while((!done) && (SiS_PlasmaTable[i].vendor) && (pSiS->SiS_Pr->CP_Vendor)) {
4769
4770 if(SiS_PlasmaTable[i].vendor == pSiS->SiS_Pr->CP_Vendor) {
4771
4772 for(j=0; j<SiS_PlasmaTable[i].productnum; j++) {
4773
4774 if(SiS_PlasmaTable[i].product[j] == pSiS->SiS_Pr->CP_Product) {
4775
4776 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
4777 "Identified %s panel, adding specific modes\n",
4778 SiS_PlasmaTable[i].plasmaname);
4779
4780 for(k=0; k<SiS_PlasmaTable[i].modenum; k++) {
4781
4782 if(isfordvi) {
4783 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x80)) continue;
4784 } else {
4785 if(!(SiS_PlasmaTable[i].plasmamodes[k] & 0x40)) continue;
4786 }
4787
4788 l = SiS_PlasmaTable[i].plasmamodes[k] & 0x3f;
4789
4790 if(pSiS->VBFlags & (VB_301|VB_301B|VB_302B|VB_301LV)) {
4791 if(isfordvi) {
4792 if(SiS_PlasmaMode[l].VDisplay > 1024) continue;
4793 }
4794 }
4795
4796 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4797
4798 memset(new, 0, sizeof(DisplayModeRec));
4799 if(!(new->name = xalloc(12))) {
4800 xfree(new);
4801 return first;
4802 }
4803 if(!first) first = new;
4804 if(current) {
4805 current->next = new;
4806 new->prev = current;
4807 }
4808
4809 current = new;
4810
4811 pSiS->AddedPlasmaModes = TRUE;
4812
4813 strcpy(current->name, SiS_PlasmaMode[l].name);
4814 /* sprintf(current->name, "%dx%d", SiS_PlasmaMode[l].HDisplay,
4815 SiS_PlasmaMode[l].VDisplay); */
4816
4817 current->status = MODE_OK;
4818
4819 current->type = M_T_BUILTIN;
4820
4821 current->Clock = SiS_PlasmaMode[l].clock;
4822 current->SynthClock = current->Clock;
4823
4824 current->HDisplay = SiS_PlasmaMode[l].HDisplay;
4825 current->HSyncStart = current->HDisplay + SiS_PlasmaMode[l].HFrontPorch;
4826 current->HSyncEnd = current->HSyncStart + SiS_PlasmaMode[l].HSyncWidth;
4827 current->HTotal = SiS_PlasmaMode[l].HTotal;
4828
4829 current->VDisplay = SiS_PlasmaMode[l].VDisplay;
4830 current->VSyncStart = current->VDisplay + SiS_PlasmaMode[l].VFrontPorch;
4831 current->VSyncEnd = current->VSyncStart + SiS_PlasmaMode[l].VSyncWidth;
4832 current->VTotal = SiS_PlasmaMode[l].VTotal;
4833
4834 current->CrtcHDisplay = current->HDisplay;
4835 current->CrtcHBlankStart = current->HSyncStart;
4836 current->CrtcHSyncStart = current->HSyncStart;
4837 current->CrtcHSyncEnd = current->HSyncEnd;
4838 current->CrtcHBlankEnd = current->HSyncEnd;
4839 current->CrtcHTotal = current->HTotal;
4840
4841 current->CrtcVDisplay = current->VDisplay;
4842 current->CrtcVBlankStart = current->VSyncStart;
4843 current->CrtcVSyncStart = current->VSyncStart;
4844 current->CrtcVSyncEnd = current->VSyncEnd;
4845 current->CrtcVBlankEnd = current->VSyncEnd;
4846 current->CrtcVTotal = current->VTotal;
4847
4848 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_HSYNCP)
4849 current->Flags |= V_PHSYNC;
4850 else
4851 current->Flags |= V_NHSYNC;
4852
4853 if(SiS_PlasmaMode[l].SyncFlags & SIS_PL_VSYNCP)
4854 current->Flags |= V_PVSYNC;
4855 else
4856 current->Flags |= V_NVSYNC;
4857
4858 if(current->HDisplay > pSiS->LCDwidth)
4859 pSiS->LCDwidth = pSiS->SiS_Pr->CP_MaxX = current->HDisplay;
4860 if(current->VDisplay > pSiS->LCDheight)
4861 pSiS->LCDheight = pSiS->SiS_Pr->CP_MaxY = current->VDisplay;
4862
4863 xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
4864 "\tAdding \"%s\" to list of built-in modes\n", current->name);
4865
4866 }
4867 done = TRUE;
4868 break;
4869 }
4870 }
4871 }
4872
4873 i++;
4874
4875 }
4876
4877 if(pSiS->SiS_Pr->CP_HaveCustomData) {
4878
4879 for(i=0; i<7; i++) {
4880
4881 if(pSiS->SiS_Pr->CP_DataValid[i]) {
4882
4883 if(!(new = xalloc(sizeof(DisplayModeRec)))) return first;
4884
4885 memset(new, 0, sizeof(DisplayModeRec));
4886 if(!(new->name = xalloc(10))) {
4887 xfree(new);
4888 return first;
4889 }
4890 if(!first) first = new;
4891 if(current) {
4892 current->next = new;
4893 new->prev = current;
4894 }
4895
4896 current = new;
4897
4898 sprintf(current->name, "%dx%d", pSiS->SiS_Pr->CP_HDisplay[i],
4899 pSiS->SiS_Pr->CP_VDisplay[i]);
4900
4901 current->status = MODE_OK;
4902
4903 current->type = M_T_BUILTIN;
4904
4905 current->Clock = pSiS->SiS_Pr->CP_Clock[i];
4906 current->SynthClock = current->Clock;
4907
4908 current->HDisplay = pSiS->SiS_Pr->CP_HDisplay[i];
4909 current->HSyncStart = pSiS->SiS_Pr->CP_HSyncStart[i];
4910 current->HSyncEnd = pSiS->SiS_Pr->CP_HSyncEnd[i];
4911 current->HTotal = pSiS->SiS_Pr->CP_HTotal[i];
4912
4913 current->VDisplay = pSiS->SiS_Pr->CP_VDisplay[i];
4914 current->VSyncStart = pSiS->SiS_Pr->CP_VSyncStart[i];
4915 current->VSyncEnd = pSiS->SiS_Pr->CP_VSyncEnd[i];
4916 current->VTotal = pSiS->SiS_Pr->CP_VTotal[i];
4917
4918 current->CrtcHDisplay = current->HDisplay;
4919 current->CrtcHBlankStart = pSiS->SiS_Pr->CP_HBlankStart[i];
4920 current->CrtcHSyncStart = current->HSyncStart;
4921 current->CrtcHSyncEnd = current->HSyncEnd;
4922 current->CrtcHBlankEnd = pSiS->SiS_Pr->CP_HBlankEnd[i];
4923 current->CrtcHTotal = current->HTotal;
4924
4925 current->CrtcVDisplay = current->VDisplay;
4926 current->CrtcVBlankStart = pSiS->SiS_Pr->CP_VBlankStart[i];
4927 current->CrtcVSyncStart = current->VSyncStart;
4928 current->CrtcVSyncEnd = current->VSyncEnd;
4929 current->CrtcVBlankEnd = pSiS->SiS_Pr->CP_VBlankEnd[i];
4930 current->CrtcVTotal = current->VTotal;
4931
4932 if(pSiS->SiS_Pr->CP_SyncValid[i]) {
4933 if(pSiS->SiS_Pr->CP_HSync_P[i])
4934 current->Flags |= V_PHSYNC;
4935 else
4936 current->Flags |= V_NHSYNC;
4937
4938 if(pSiS->SiS_Pr->CP_VSync_P[i])
4939 current->Flags |= V_PVSYNC;
4940 else
4941 current->Flags |= V_NVSYNC;
4942 } else {
4943 /* No sync data? Use positive sync... */
4944 current->Flags |= V_PHSYNC;
4945 current->Flags |= V_PVSYNC;
4946 }
4947 }
4948 }
4949 }
4950
4951 return first;
4952
4953}
4954
4955/* Translate a mode number into the VESA pendant */
4956int
4957SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber)
4958{
4959 SISPtr pSiS = SISPTR(pScrn);
4960 int i = 0;
4961
4962 /* Initialize our pointers */
4963 if(pSiS->VGAEngine == SIS_300_VGA) {
4964#ifdef SIS300
4965 InitTo300Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4966#else
4967 return -1;
4968#endif
4969 } else if(pSiS->VGAEngine == SIS_315_VGA) {
4970#ifdef SIS315H
4971 InitTo310Pointer(pSiS->SiS_Pr, &pSiS->sishw_ext);
4972#else
4973 return -1;
4974#endif 4218#endif
4975 } else return -1;
4976
4977 if(modenumber <= 0x13) return modenumber;
4978 4219
4979#ifdef SIS315H 4220 if((xres == 320) && ((yres == 200) || (yres == 240))) {
4980 if(pSiS->ROM661New) { 4221 /* Terrible hack, but correct CRTC data for
4981 while(SiS_EModeIDTable661[i].Ext_ModeID != 0xff) { 4222 * these modes only produces a black screen...
4982 if(SiS_EModeIDTable661[i].Ext_ModeID == modenumber) { 4223 * (HRE is 0, leading into a too large C and
4983 return (int)SiS_EModeIDTable661[i].Ext_VESAID; 4224 * a negative D. The CRT controller does not
4984 } 4225 * seem to like correcting HRE to 50)
4985 i++; 4226 */
4986 } 4227#ifdef SIS_XORG_XF86
4987 } else { 4228 current->HDisplay = 320;
4229 current->HSyncStart = 328;
4230 current->HSyncEnd = 376;
4231 current->HTotal = 400;
4988#endif 4232#endif
4989 while(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID != 0xff) { 4233#ifdef SIS_LINUX_KERNEL
4990 if(pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_ModeID == modenumber) { 4234 var->left_margin = (400 - 376);
4991 return (int)pSiS->SiS_Pr->SiS_EModeIDTable[i].Ext_VESAID; 4235 var->right_margin = (328 - 320);
4992 } 4236 var->hsync_len = (376 - 328);
4993 i++;
4994 }
4995#ifdef SIS315H
4996 }
4997#endif 4237#endif
4998 return -1;
4999}
5000 4238
5001/* Translate a new BIOS mode number into the driver's pendant */
5002int
5003SiSTranslateToOldMode(int modenumber)
5004{
5005#ifdef SIS315H
5006 int i = 0;
5007
5008 while(SiS_EModeIDTable661[i].Ext_ModeID != 0xff) {
5009 if(SiS_EModeIDTable661[i].Ext_ModeID == modenumber) {
5010 if(SiS_EModeIDTable661[i].Ext_MyModeID)
5011 return (int)SiS_EModeIDTable661[i].Ext_MyModeID;
5012 else
5013 return modenumber;
5014 }
5015 i++;
5016 } 4239 }
5017#endif
5018 return modenumber;
5019}
5020
5021#endif /* Xfree86 */
5022
5023#ifdef LINUX_KERNEL
5024int
5025sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5026 unsigned char modeno, unsigned char rateindex)
5027{
5028 USHORT ModeNo = modeno;
5029 USHORT ModeIdIndex = 0, ClockIndex = 0;
5030 USHORT RefreshRateTableIndex = 0;
5031 int Clock;
5032
5033 if(HwInfo->jChipType < SIS_315H) {
5034#ifdef SIS300
5035 InitTo300Pointer(SiS_Pr, HwInfo);
5036#else
5037 return 65 * 1000;
5038#endif
5039 } else {
5040#ifdef SIS315H
5041 InitTo310Pointer(SiS_Pr, HwInfo);
5042#else
5043 return 65 * 1000;
5044#endif
5045 }
5046
5047 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
5048 printk(KERN_ERR "Could not find mode %x\n", ModeNo);
5049 return 65 * 1000;
5050 }
5051
5052 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5053 RefreshRateTableIndex += (rateindex - 1);
5054 ClockIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
5055 if(HwInfo->jChipType < SIS_315H) {
5056 ClockIndex &= 0x3F;
5057 }
5058 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
5059
5060 return(Clock);
5061}
5062
5063BOOLEAN
5064sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5065 unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex)
5066{
5067 USHORT ModeNo = modeno;
5068 USHORT ModeIdIndex = 0, CRT1Index = 0;
5069 USHORT RefreshRateTableIndex = 0;
5070 unsigned char sr_data, cr_data, cr_data2;
5071
5072 if(HwInfo->jChipType < SIS_315H) {
5073#ifdef SIS300
5074 InitTo300Pointer(SiS_Pr, HwInfo);
5075#else
5076 return FALSE;
5077#endif
5078 } else {
5079#ifdef SIS315H
5080 InitTo310Pointer(SiS_Pr, HwInfo);
5081#else
5082 return FALSE;
5083#endif
5084 }
5085
5086 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
5087
5088 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5089 RefreshRateTableIndex += (rateindex - 1);
5090 CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5091
5092 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
5093 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
5094 *htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
5095 4240
5096 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
5097 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
5098 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
5099 *vtotal = ((cr_data & 0xFF) |
5100 ((unsigned short)(cr_data2 & 0x01) << 8) |
5101 ((unsigned short)(cr_data2 & 0x20) << 4) |
5102 ((unsigned short)(sr_data & 0x01) << 10)) + 2;
5103
5104 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & InterlaceMode)
5105 *vtotal *= 2;
5106
5107 return TRUE;
5108} 4241}
5109 4242
5110int
5111sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
5112 unsigned char modeno, unsigned char rateindex,
5113 struct fb_var_screeninfo *var)
5114{
5115 USHORT ModeNo = modeno;
5116 USHORT ModeIdIndex = 0, index = 0;
5117 USHORT RefreshRateTableIndex = 0;
5118 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
5119 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
5120 unsigned char sr_data, cr_data, cr_data2, cr_data3;
5121 int A, B, C, D, E, F, temp, j;
5122
5123 if(HwInfo->jChipType < SIS_315H) {
5124#ifdef SIS300
5125 InitTo300Pointer(SiS_Pr, HwInfo);
5126#else
5127 return 0;
5128#endif
5129 } else {
5130#ifdef SIS315H
5131 InitTo310Pointer(SiS_Pr, HwInfo);
5132#else
5133 return 0;
5134#endif
5135 }
5136
5137 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
5138
5139 RefreshRateTableIndex = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
5140 RefreshRateTableIndex += (rateindex - 1);
5141 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
5142
5143 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[14];
5144
5145 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[0];
5146
5147 /* Horizontal total */
5148 HT = (cr_data & 0xff) |
5149 ((unsigned short) (sr_data & 0x03) << 8);
5150 A = HT + 5;
5151
5152 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[1];
5153
5154 /* Horizontal display enable end */
5155 HDE = (cr_data & 0xff) |
5156 ((unsigned short) (sr_data & 0x0C) << 6);
5157 E = HDE + 1;
5158
5159 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[4];
5160
5161 /* Horizontal retrace (=sync) start */
5162 HRS = (cr_data & 0xff) |
5163 ((unsigned short) (sr_data & 0xC0) << 2);
5164 F = HRS - E - 3;
5165
5166 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[2];
5167
5168 /* Horizontal blank start */
5169 HBS = (cr_data & 0xff) |
5170 ((unsigned short) (sr_data & 0x30) << 4);
5171
5172 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[15];
5173
5174 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[3];
5175
5176 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[5];
5177
5178 /* Horizontal blank end */
5179 HBE = (cr_data & 0x1f) |
5180 ((unsigned short) (cr_data2 & 0x80) >> 2) |
5181 ((unsigned short) (sr_data & 0x03) << 6);
5182
5183 /* Horizontal retrace (=sync) end */
5184 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
5185 4243
5186 temp = HBE - ((E - 1) & 255);
5187 B = (temp > 0) ? temp : (temp + 256);
5188 4244
5189 temp = HRE - ((E + F + 3) & 63);
5190 C = (temp > 0) ? temp : (temp + 64);
5191
5192 D = B - F - C;
5193
5194 if((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes == 320) &&
5195 ((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 200) ||
5196 (SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].YRes == 240))) {
5197
5198 /* Terrible hack, but the correct CRTC data for
5199 * these modes only produces a black screen...
5200 */
5201 var->left_margin = (400 - 376);
5202 var->right_margin = (328 - 320);
5203 var->hsync_len = (376 - 328);
5204
5205 } else {
5206
5207 var->left_margin = D * 8;
5208 var->right_margin = F * 8;
5209 var->hsync_len = C * 8;
5210
5211 }
5212
5213 sr_data = SiS_Pr->SiS_CRT1Table[index].CR[13];
5214
5215 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[6];
5216
5217 cr_data2 = SiS_Pr->SiS_CRT1Table[index].CR[7];
5218
5219 /* Vertical total */
5220 VT = (cr_data & 0xFF) |
5221 ((unsigned short) (cr_data2 & 0x01) << 8) |
5222 ((unsigned short)(cr_data2 & 0x20) << 4) |
5223 ((unsigned short) (sr_data & 0x01) << 10);
5224 A = VT + 2;
5225
5226 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[10];
5227
5228 /* Vertical display enable end */
5229 VDE = (cr_data & 0xff) |
5230 ((unsigned short) (cr_data2 & 0x02) << 7) |
5231 ((unsigned short) (cr_data2 & 0x40) << 3) |
5232 ((unsigned short) (sr_data & 0x02) << 9);
5233 E = VDE + 1;
5234
5235 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[8];
5236
5237 /* Vertical retrace (=sync) start */
5238 VRS = (cr_data & 0xff) |
5239 ((unsigned short) (cr_data2 & 0x04) << 6) |
5240 ((unsigned short) (cr_data2 & 0x80) << 2) |
5241 ((unsigned short) (sr_data & 0x08) << 7);
5242 F = VRS + 1 - E;
5243
5244 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[11];
5245
5246 cr_data3 = (SiS_Pr->SiS_CRT1Table[index].CR[16] & 0x01) << 5;
5247
5248 /* Vertical blank start */
5249 VBS = (cr_data & 0xff) |
5250 ((unsigned short) (cr_data2 & 0x08) << 5) |
5251 ((unsigned short) (cr_data3 & 0x20) << 4) |
5252 ((unsigned short) (sr_data & 0x04) << 8);
5253
5254 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[12];
5255
5256 /* Vertical blank end */
5257 VBE = (cr_data & 0xff) |
5258 ((unsigned short) (sr_data & 0x10) << 4);
5259 temp = VBE - ((E - 1) & 511);
5260 B = (temp > 0) ? temp : (temp + 512);
5261
5262 cr_data = SiS_Pr->SiS_CRT1Table[index].CR[9];
5263
5264 /* Vertical retrace (=sync) end */
5265 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
5266 temp = VRE - ((E + F - 1) & 31);
5267 C = (temp > 0) ? temp : (temp + 32);
5268
5269 D = B - F - C;
5270
5271 var->upper_margin = D;
5272 var->lower_margin = F;
5273 var->vsync_len = C;
5274
5275 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
5276 var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
5277 else
5278 var->sync |= FB_SYNC_VERT_HIGH_ACT;
5279
5280 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
5281 var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
5282 else
5283 var->sync |= FB_SYNC_HOR_HIGH_ACT;
5284
5285 var->vmode = FB_VMODE_NONINTERLACED;
5286 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
5287 var->vmode = FB_VMODE_INTERLACED;
5288 else {
5289 j = 0;
5290 while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
5291 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
5292 SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].ModeID) {
5293 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
5294 var->vmode = FB_VMODE_DOUBLE;
5295 }
5296 break;
5297 }
5298 j++;
5299 }
5300 }
5301
5302 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
5303#if 0 /* Do this? */
5304 var->upper_margin <<= 1;
5305 var->lower_margin <<= 1;
5306 var->vsync_len <<= 1;
5307#endif
5308 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
5309 var->upper_margin >>= 1;
5310 var->lower_margin >>= 1;
5311 var->vsync_len >>= 1;
5312 }
5313
5314 return 1;
5315}
5316
5317#endif
5318 4245
diff --git a/drivers/video/sis/init.h b/drivers/video/sis/init.h
index 7e36b7ac1470..634c0a9d219b 100644
--- a/drivers/video/sis/init.h
+++ b/drivers/video/sis/init.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * Data and prototypes for init.c 4 * Data and prototypes for init.c
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,18 +50,24 @@
50 * 50 *
51 */ 51 */
52 52
53#ifndef _INIT_ 53#ifndef _INIT_H_
54#define _INIT_ 54#define _INIT_H_
55 55
56#include "osdef.h" 56#include "osdef.h"
57#include "initdef.h" 57#include "initdef.h"
58 58
59#ifdef LINUX_XF86 59#ifdef SIS_XORG_XF86
60#include "sis.h" 60#include "sis.h"
61#define SIS_NEED_inSISREG
62#define SIS_NEED_inSISREGW
63#define SIS_NEED_inSISREGL
64#define SIS_NEED_outSISREG
65#define SIS_NEED_outSISREGW
66#define SIS_NEED_outSISREGL
61#include "sis_regs.h" 67#include "sis_regs.h"
62#endif 68#endif
63 69
64#ifdef LINUX_KERNEL 70#ifdef SIS_LINUX_KERNEL
65#include "vgatypes.h" 71#include "vgatypes.h"
66#include "vstruct.h" 72#include "vstruct.h"
67#ifdef SIS_CP 73#ifdef SIS_CP
@@ -73,6 +79,10 @@
73#include <asm/io.h> 79#include <asm/io.h>
74#include <linux/fb.h> 80#include <linux/fb.h>
75#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 81#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
82#include <video/fbcon.h>
83#endif
84#include "sis.h"
85#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
76#include <linux/sisfb.h> 86#include <linux/sisfb.h>
77#else 87#else
78#include <video/sisfb.h> 88#include <video/sisfb.h>
@@ -80,44 +90,45 @@
80#endif 90#endif
81 91
82/* Mode numbers */ 92/* Mode numbers */
83static const USHORT ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f}; 93static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f};
84static const USHORT ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53}; 94static const unsigned short ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53};
85static const USHORT ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */ 95static const unsigned short ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */
86static const USHORT ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54}; 96static const unsigned short ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54};
87static const USHORT ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c}; 97static const unsigned short ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c};
88static const USHORT ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e}; 98static const unsigned short ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e};
89static const USHORT ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62}; 99static const unsigned short ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62};
90static const USHORT ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35}; 100static const unsigned short ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35};
91static const USHORT ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36}; 101static const unsigned short ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36};
92static const USHORT ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61}; 102static const unsigned short ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61};
93static const USHORT ModeIndex_800x480[] = {0x70, 0x7a, 0x00, 0x76}; 103static const unsigned short ModeIndex_800x480[] = {0x70, 0x7a, 0x00, 0x76};
94static const USHORT ModeIndex_800x600[] = {0x30, 0x47, 0x00, 0x63}; 104static const unsigned short ModeIndex_800x600[] = {0x30, 0x47, 0x00, 0x63};
95static const USHORT ModeIndex_848x480[] = {0x39, 0x3b, 0x00, 0x3e}; 105static const unsigned short ModeIndex_848x480[] = {0x39, 0x3b, 0x00, 0x3e};
96static const USHORT ModeIndex_856x480[] = {0x3f, 0x42, 0x00, 0x45}; 106static const unsigned short ModeIndex_856x480[] = {0x3f, 0x42, 0x00, 0x45};
97static const USHORT ModeIndex_960x540[] = {0x1d, 0x1e, 0x00, 0x1f}; /* 315 series only */ 107static const unsigned short ModeIndex_960x540[] = {0x1d, 0x1e, 0x00, 0x1f}; /* 315 series only */
98static const USHORT ModeIndex_960x600[] = {0x20, 0x21, 0x00, 0x22}; /* 315 series only */ 108static const unsigned short ModeIndex_960x600[] = {0x20, 0x21, 0x00, 0x22}; /* 315 series only */
99static const USHORT ModeIndex_1024x768[] = {0x38, 0x4a, 0x00, 0x64}; 109static const unsigned short ModeIndex_1024x768[] = {0x38, 0x4a, 0x00, 0x64};
100static const USHORT ModeIndex_1024x576[] = {0x71, 0x74, 0x00, 0x77}; 110static const unsigned short ModeIndex_1024x576[] = {0x71, 0x74, 0x00, 0x77};
101static const USHORT ModeIndex_1024x600[] = {0x20, 0x21, 0x00, 0x22}; /* 300 series only */ 111static const unsigned short ModeIndex_1024x600[] = {0x20, 0x21, 0x00, 0x22}; /* 300 series only */
102static const USHORT ModeIndex_1280x1024[] = {0x3a, 0x4d, 0x00, 0x65}; 112static const unsigned short ModeIndex_1280x1024[] = {0x3a, 0x4d, 0x00, 0x65};
103static const USHORT ModeIndex_1280x960[] = {0x7c, 0x7d, 0x00, 0x7e}; 113static const unsigned short ModeIndex_1280x960[] = {0x7c, 0x7d, 0x00, 0x7e};
104static const USHORT ModeIndex_1152x768[] = {0x23, 0x24, 0x00, 0x25}; /* 300 series only */ 114static const unsigned short ModeIndex_1152x768[] = {0x23, 0x24, 0x00, 0x25}; /* 300 series only */
105static const USHORT ModeIndex_1152x864[] = {0x29, 0x2a, 0x00, 0x2b}; 115static const unsigned short ModeIndex_1152x864[] = {0x29, 0x2a, 0x00, 0x2b};
106static const USHORT ModeIndex_300_1280x768[] = {0x55, 0x5a, 0x00, 0x5b}; 116static const unsigned short ModeIndex_300_1280x768[] = {0x55, 0x5a, 0x00, 0x5b};
107static const USHORT ModeIndex_310_1280x768[] = {0x23, 0x24, 0x00, 0x25}; 117static const unsigned short ModeIndex_310_1280x768[] = {0x23, 0x24, 0x00, 0x25};
108static const USHORT ModeIndex_1280x720[] = {0x79, 0x75, 0x00, 0x78}; 118static const unsigned short ModeIndex_1280x720[] = {0x79, 0x75, 0x00, 0x78};
109static const USHORT ModeIndex_1280x800[] = {0x14, 0x15, 0x00, 0x16}; 119static const unsigned short ModeIndex_1280x800[] = {0x14, 0x15, 0x00, 0x16};
110static const USHORT ModeIndex_1360x768[] = {0x48, 0x4b, 0x00, 0x4e}; 120static const unsigned short ModeIndex_1280x854[] = {0x1a, 0x1b, 0x00, 0x1c};
111static const USHORT ModeIndex_300_1360x1024[]= {0x67, 0x6f, 0x00, 0x72}; /* 300 series, BARCO only */ 121static const unsigned short ModeIndex_1360x768[] = {0x48, 0x4b, 0x00, 0x4e};
112static const USHORT ModeIndex_1400x1050[] = {0x26, 0x27, 0x00, 0x28}; /* 315 series only */ 122static const unsigned short ModeIndex_300_1360x1024[]= {0x67, 0x6f, 0x00, 0x72}; /* 300 series, BARCO only */
113static const USHORT ModeIndex_1680x1050[] = {0x17, 0x18, 0x00, 0x19}; /* 315 series only */ 123static const unsigned short ModeIndex_1400x1050[] = {0x26, 0x27, 0x00, 0x28}; /* 315 series only */
114static const USHORT ModeIndex_1600x1200[] = {0x3c, 0x3d, 0x00, 0x66}; 124static const unsigned short ModeIndex_1680x1050[] = {0x17, 0x18, 0x00, 0x19}; /* 315 series only */
115static const USHORT ModeIndex_1920x1080[] = {0x2c, 0x2d, 0x00, 0x73}; /* 315 series only */ 125static const unsigned short ModeIndex_1600x1200[] = {0x3c, 0x3d, 0x00, 0x66};
116static const USHORT ModeIndex_1920x1440[] = {0x68, 0x69, 0x00, 0x6b}; 126static const unsigned short ModeIndex_1920x1080[] = {0x2c, 0x2d, 0x00, 0x73}; /* 315 series only */
117static const USHORT ModeIndex_300_2048x1536[]= {0x6c, 0x6d, 0x00, 0x00}; 127static const unsigned short ModeIndex_1920x1440[] = {0x68, 0x69, 0x00, 0x6b};
118static const USHORT ModeIndex_310_2048x1536[]= {0x6c, 0x6d, 0x00, 0x6e}; 128static const unsigned short ModeIndex_300_2048x1536[]= {0x6c, 0x6d, 0x00, 0x00};
119 129static const unsigned short ModeIndex_310_2048x1536[]= {0x6c, 0x6d, 0x00, 0x6e};
120static const USHORT SiS_DRAMType[17][5]={ 130
131static const unsigned short SiS_DRAMType[17][5]={
121 {0x0C,0x0A,0x02,0x40,0x39}, 132 {0x0C,0x0A,0x02,0x40,0x39},
122 {0x0D,0x0A,0x01,0x40,0x48}, 133 {0x0D,0x0A,0x01,0x40,0x48},
123 {0x0C,0x09,0x02,0x20,0x35}, 134 {0x0C,0x09,0x02,0x20,0x35},
@@ -137,7 +148,7 @@ static const USHORT SiS_DRAMType[17][5]={
137 {0x09,0x08,0x01,0x01,0x00} 148 {0x09,0x08,0x01,0x01,0x00}
138}; 149};
139 150
140static const USHORT SiS_SDRDRAM_TYPE[13][5] = 151static const unsigned short SiS_SDRDRAM_TYPE[13][5] =
141{ 152{
142 { 2,12, 9,64,0x35}, 153 { 2,12, 9,64,0x35},
143 { 1,13, 9,64,0x44}, 154 { 1,13, 9,64,0x44},
@@ -154,7 +165,7 @@ static const USHORT SiS_SDRDRAM_TYPE[13][5] =
154 { 1, 9, 8, 2,0x00} 165 { 1, 9, 8, 2,0x00}
155}; 166};
156 167
157static const USHORT SiS_DDRDRAM_TYPE[4][5] = 168static const unsigned short SiS_DDRDRAM_TYPE[4][5] =
158{ 169{
159 { 2,12, 9,64,0x35}, 170 { 2,12, 9,64,0x35},
160 { 2,12, 8,32,0x31}, 171 { 2,12, 8,32,0x31},
@@ -162,7 +173,7 @@ static const USHORT SiS_DDRDRAM_TYPE[4][5] =
162 { 2, 9, 8, 4,0x01} 173 { 2, 9, 8, 4,0x01}
163}; 174};
164 175
165static const USHORT SiS_MDA_DAC[] = 176static const unsigned char SiS_MDA_DAC[] =
166{ 177{
167 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 178 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
168 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15, 179 0x15,0x15,0x15,0x15,0x15,0x15,0x15,0x15,
@@ -174,7 +185,7 @@ static const USHORT SiS_MDA_DAC[] =
174 0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F 185 0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F,0x3F
175}; 186};
176 187
177static const USHORT SiS_CGA_DAC[] = 188static const unsigned char SiS_CGA_DAC[] =
178{ 189{
179 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 190 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
180 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 191 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
@@ -186,7 +197,7 @@ static const USHORT SiS_CGA_DAC[] =
186 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F 197 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
187}; 198};
188 199
189static const USHORT SiS_EGA_DAC[] = 200static const unsigned char SiS_EGA_DAC[] =
190{ 201{
191 0x00,0x10,0x04,0x14,0x01,0x11,0x05,0x15, 202 0x00,0x10,0x04,0x14,0x01,0x11,0x05,0x15,
192 0x20,0x30,0x24,0x34,0x21,0x31,0x25,0x35, 203 0x20,0x30,0x24,0x34,0x21,0x31,0x25,0x35,
@@ -198,7 +209,7 @@ static const USHORT SiS_EGA_DAC[] =
198 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F 209 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F
199}; 210};
200 211
201static const USHORT SiS_VGA_DAC[] = 212static const unsigned char SiS_VGA_DAC[] =
202{ 213{
203 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15, 214 0x00,0x10,0x04,0x14,0x01,0x11,0x09,0x15,
204 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F, 215 0x2A,0x3A,0x2E,0x3E,0x2B,0x3B,0x2F,0x3F,
@@ -212,7 +223,31 @@ static const USHORT SiS_VGA_DAC[] =
212 0x0B,0x0C,0x0D,0x0F,0x10 223 0x0B,0x0C,0x0D,0x0F,0x10
213}; 224};
214 225
215static const SiS_StResInfoStruct SiS_StResInfo[]= 226static const struct SiS_St SiS_SModeIDTable[] =
227{
228 {0x01,0x9208,0x01,0x00,0x00,0x00,0x01,0x00,0x40},
229 {0x01,0x1210,0x14,0x01,0x01,0x00,0x01,0x00,0x40},
230 {0x01,0x1010,0x17,0x02,0x02,0x00,0x01,0x01,0x40},
231 {0x03,0x8208,0x03,0x00,0x00,0x00,0x01,0x02,0x40},
232 {0x03,0x0210,0x16,0x01,0x01,0x00,0x01,0x02,0x40},
233 {0x03,0x0010,0x18,0x02,0x02,0x00,0x01,0x03,0x40},
234 {0x05,0x9209,0x05,0x00,0x00,0x00,0x00,0x04,0x40},
235 {0x06,0x8209,0x06,0x00,0x00,0x00,0x00,0x05,0x40},
236 {0x07,0x0000,0x07,0x03,0x03,0x00,0x01,0x03,0x40},
237 {0x07,0x0000,0x19,0x02,0x02,0x00,0x01,0x03,0x40},
238 {0x0d,0x920a,0x0d,0x00,0x00,0x00,0x00,0x04,0x40},
239 {0x0e,0x820a,0x0e,0x00,0x00,0x00,0x00,0x05,0x40},
240 {0x0f,0x0202,0x11,0x01,0x01,0x00,0x00,0x05,0x40},
241 {0x10,0x0212,0x12,0x01,0x01,0x00,0x00,0x05,0x40},
242 {0x11,0x0212,0x1a,0x04,0x04,0x00,0x00,0x05,0x40},
243 {0x12,0x0212,0x1b,0x04,0x04,0x00,0x00,0x05,0x40},
244 {0x13,0x021b,0x1c,0x00,0x00,0x00,0x00,0x04,0x40},
245 {0x12,0x0010,0x18,0x02,0x02,0x00,0x00,0x05,0x40},
246 {0x12,0x0210,0x18,0x01,0x01,0x00,0x00,0x05,0x40},
247 {0xff,0x0000,0x00,0x00,0x00,0x00,0x00,0x00,0x00}
248};
249
250static const struct SiS_StResInfo_S SiS_StResInfo[]=
216{ 251{
217 { 640,400}, 252 { 640,400},
218 { 640,350}, 253 { 640,350},
@@ -221,7 +256,7 @@ static const SiS_StResInfoStruct SiS_StResInfo[]=
221 { 640,480} 256 { 640,480}
222}; 257};
223 258
224static const SiS_ModeResInfoStruct SiS_ModeResInfo[] = 259static const struct SiS_ModeResInfo_S SiS_ModeResInfo[] =
225{ 260{
226 { 320, 200, 8, 8}, /* 0x00 */ 261 { 320, 200, 8, 8}, /* 0x00 */
227 { 320, 240, 8, 8}, /* 0x01 */ 262 { 320, 240, 8, 8}, /* 0x01 */
@@ -256,11 +291,12 @@ static const SiS_ModeResInfoStruct SiS_ModeResInfo[] =
256 { 1280, 800, 8,16}, /* 0x1e */ 291 { 1280, 800, 8,16}, /* 0x1e */
257 { 1920,1080, 8,16}, /* 0x1f */ 292 { 1920,1080, 8,16}, /* 0x1f */
258 { 960, 540, 8,16}, /* 0x20 */ 293 { 960, 540, 8,16}, /* 0x20 */
259 { 960, 600, 8,16} /* 0x21 */ 294 { 960, 600, 8,16}, /* 0x21 */
295 { 1280, 854, 8,16} /* 0x22 */
260}; 296};
261 297
262#if defined(SIS300) || defined(SIS315H) 298#if defined(SIS300) || defined(SIS315H)
263static const SiS_StandTableStruct SiS_StandTable[]= 299static const struct SiS_StandTable_S SiS_StandTable[]=
264{ 300{
265/* 0x00: MD_0_200 */ 301/* 0x00: MD_0_200 */
266 { 302 {
@@ -704,11 +740,11 @@ static const SiS_StandTableStruct SiS_StandTable[]=
704/* SIS VIDEO BRIDGE ----------------------------------------- */ 740/* SIS VIDEO BRIDGE ----------------------------------------- */
705/**************************************************************/ 741/**************************************************************/
706 742
707static const UCHAR SiS_SoftSetting = 0x30; /* RAM setting */ 743static const unsigned char SiS_SoftSetting = 0x30; /* RAM setting */
708 744
709static const UCHAR SiS_OutputSelect = 0x40; 745static const unsigned char SiS_OutputSelect = 0x40;
710 746
711static const UCHAR SiS_NTSCTiming[] = { 747static const unsigned char SiS_NTSCTiming[] = {
712 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, 748 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
713 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, 749 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
714 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b, 750 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x1b,
@@ -719,7 +755,7 @@ static const UCHAR SiS_NTSCTiming[] = {
719 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00 755 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
720}; 756};
721 757
722static const UCHAR SiS_PALTiming[] = { 758static const unsigned char SiS_PALTiming[] = {
723 0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70, 759 0x19,0x52,0x35,0x6e,0x04,0x38,0x3d,0x70,
724 0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d, 760 0x94,0x49,0x01,0x12,0x06,0x3e,0x35,0x6d,
725 0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b, 761 0x06,0x14,0x3e,0x35,0x6d,0x00,0x45,0x2b,
@@ -730,8 +766,8 @@ static const UCHAR SiS_PALTiming[] = {
730 0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00 766 0x00,0x40,0x3e,0x00,0xe1,0x02,0x28,0x00
731}; 767};
732 768
733static const UCHAR SiS_HiTVExtTiming[] = { 769static const unsigned char SiS_HiTVExtTiming[] = {
734 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64, 770 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
735 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 771 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
736 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, 772 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
737 0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13, 773 0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
@@ -741,8 +777,8 @@ static const UCHAR SiS_HiTVExtTiming[] = {
741 0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00 777 0x63,0x4f,0x27,0x00,0xfc,0xff,0x6a,0x00
742}; 778};
743 779
744static const UCHAR SiS_HiTVSt1Timing[] = { 780static const unsigned char SiS_HiTVSt1Timing[] = {
745 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65, 781 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
746 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 782 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
747 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, 783 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
748 0x65,0x90,0x7b,0xa8,0x03,0xf0,0x87,0x03, 784 0x65,0x90,0x7b,0xa8,0x03,0xf0,0x87,0x03,
@@ -752,8 +788,8 @@ static const UCHAR SiS_HiTVSt1Timing[] = {
752 0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00 788 0xaf,0x5d,0x0e,0x00,0xfc,0xff,0x2d,0x00
753}; 789};
754 790
755static const UCHAR SiS_HiTVSt2Timing[] = { 791static const unsigned char SiS_HiTVSt2Timing[] = {
756 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64, 792 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x64,
757 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 793 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
758 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, 794 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
759 0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13, 795 0x64,0x90,0x33,0x8c,0x18,0x36,0x3e,0x13,
@@ -764,8 +800,8 @@ static const UCHAR SiS_HiTVSt2Timing[] = {
764}; 800};
765 801
766#if 0 802#if 0
767static const UCHAR SiS_HiTVTextTiming[] = { 803static const unsigned char SiS_HiTVTextTiming[] = {
768 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65, 804 0x32,0x65,0x2c,0x5f,0x08,0x31,0x3a,0x65,
769 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d, 805 0x28,0x02,0x01,0x3d,0x06,0x3e,0x35,0x6d,
770 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f, 806 0x06,0x14,0x3e,0x35,0x6d,0x00,0xc5,0x3f,
771 0x65,0x90,0xe7,0xbc,0x03,0x0c,0x97,0x03, 807 0x65,0x90,0xe7,0xbc,0x03,0x0c,0x97,0x03,
@@ -776,8 +812,8 @@ static const UCHAR SiS_HiTVTextTiming[] = {
776}; 812};
777#endif 813#endif
778 814
779static const UCHAR SiS_HiTVGroup3Data[] = { 815static const unsigned char SiS_HiTVGroup3Data[] = {
780 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f, 816 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x5f,
781 0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6, 817 0x05,0x21,0xb2,0xb2,0x55,0x77,0x2a,0xa6,
782 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, 818 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
783 0x8c,0x6e,0x60,0x2e,0x58,0x48,0x72,0x44, 819 0x8c,0x6e,0x60,0x2e,0x58,0x48,0x72,0x44,
@@ -787,8 +823,8 @@ static const UCHAR SiS_HiTVGroup3Data[] = {
787 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01 823 0x18,0x05,0x18,0x05,0x4c,0xa8,0x01
788}; 824};
789 825
790static const UCHAR SiS_HiTVGroup3Simu[] = { 826static const unsigned char SiS_HiTVGroup3Simu[] = {
791 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95, 827 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0x95,
792 0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6, 828 0xdb,0x20,0xb8,0xb8,0x55,0x47,0x2a,0xa6,
793 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, 829 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
794 0x8c,0x6e,0x60,0x15,0x26,0xd3,0xe4,0x11, 830 0x8c,0x6e,0x60,0x15,0x26,0xd3,0xe4,0x11,
@@ -799,8 +835,8 @@ static const UCHAR SiS_HiTVGroup3Simu[] = {
799}; 835};
800 836
801#if 0 837#if 0
802static const UCHAR SiS_HiTVGroup3Text[] = { 838static const unsigned char SiS_HiTVGroup3Text[] = {
803 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7, 839 0x00,0x1a,0x22,0x63,0x62,0x22,0x08,0xa7,
804 0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6, 840 0xf5,0x20,0xce,0xce,0x55,0x47,0x2a,0xa6,
805 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20, 841 0x25,0x2f,0x47,0xfa,0xc8,0xff,0x8e,0x20,
806 0x8c,0x6e,0x60,0x18,0x2c,0x0c,0x20,0x22, 842 0x8c,0x6e,0x60,0x18,0x2c,0x0c,0x20,0x22,
@@ -811,136 +847,141 @@ static const UCHAR SiS_HiTVGroup3Text[] = {
811}; 847};
812#endif 848#endif
813 849
814static const UCHAR SiS_NTSCPhase[] = {0x21,0xed,0xba,0x08}; 850static const struct SiS_TVData SiS_StPALData[] =
815static const UCHAR SiS_PALPhase[] = {0x2a,0x05,0xe3,0x00};
816static const UCHAR SiS_PALMPhase[] = {0x21,0xE4,0x2E,0x9B};
817static const UCHAR SiS_PALNPhase[] = {0x21,0xF4,0x3E,0xBA};
818static const UCHAR SiS_NTSCPhase2[] = {0x21,0xF0,0x7B,0xD6};
819static const UCHAR SiS_PALPhase2[] = {0x2a,0x09,0x86,0xe9};
820static const UCHAR SiS_PALMPhase2[] = {0x21,0xE6,0xEF,0xA4};
821static const UCHAR SiS_PALNPhase2[] = {0x21,0xF6,0x94,0x46};
822static const UCHAR SiS_SpecialPhase[] = {0x1e,0x8c,0x5c,0x7a};
823static const UCHAR SiS_SpecialPhaseM[]= {0x1e,0x83,0x0a,0xe0};
824static const UCHAR SiS_SpecialPhaseJ[]= {0x25,0xd4,0xfd,0x5e};
825
826static const SiS_TVDataStruct SiS_StPALData[] =
827{ 851{
828 { 1, 1, 864, 525,1270, 400, 100, 0, 760,0xf4,0xff,0x1c,0x22}, 852 { 1, 1, 864, 525,1270, 400, 100, 0, 760, 0,0xf4,0xff,0x1c,0x22},
829 { 1, 1, 864, 525,1270, 350, 100, 0, 760,0xf4,0xff,0x1c,0x22}, 853 { 1, 1, 864, 525,1270, 350, 100, 0, 760, 0,0xf4,0xff,0x1c,0x22},
830 { 1, 1, 864, 525,1270, 400, 0, 0, 720,0xf1,0x04,0x1f,0x18}, 854 { 1, 1, 864, 525,1270, 400, 0, 0, 720, 0,0xf1,0x04,0x1f,0x18},
831 { 1, 1, 864, 525,1270, 350, 0, 0, 720,0xf4,0x0b,0x1c,0x0a}, 855 { 1, 1, 864, 525,1270, 350, 0, 0, 720, 0,0xf4,0x0b,0x1c,0x0a},
832 { 1, 1, 864, 525,1270, 480, 50, 0, 760,0xf4,0xff,0x1c,0x22}, 856 { 1, 1, 864, 525,1270, 480, 50, 0, 760, 0,0xf4,0xff,0x1c,0x22},
833 { 1, 1, 864, 525,1270, 600, 50, 0, 0,0xf4,0xff,0x1c,0x22} 857 { 1, 1, 864, 525,1270, 600, 50, 0, 0,0x300,0xf4,0xff,0x1c,0x22}
834}; 858};
835 859
836static const SiS_TVDataStruct SiS_ExtPALData[] = 860static const struct SiS_TVData SiS_ExtPALData[] =
837{ 861{
838 { 27, 10, 848, 448,1270, 530, 50, 0, 50,0xf4,0xff,0x1c,0x22}, /* 640x400, 320x200 */ 862 { 27, 10, 848, 448,1270, 530, 50, 0, 50, 0,0xf4,0xff,0x1c,0x22}, /* 640x400, 320x200 */
839 { 108, 35, 848, 398,1270, 530, 50, 0, 50,0xf4,0xff,0x1c,0x22}, 863 { 108, 35, 848, 398,1270, 530, 50, 0, 50, 0,0xf4,0xff,0x1c,0x22},
840 { 12, 5, 954, 448,1270, 530, 50, 0, 50,0xf1,0x04,0x1f,0x18}, 864 { 12, 5, 954, 448,1270, 530, 50, 0, 50, 0,0xf1,0x04,0x1f,0x18},
841 { 9, 4, 960, 463,1644, 438, 50, 0, 50,0xf4,0x0b,0x1c,0x0a}, 865 { 9, 4, 960, 463,1644, 438, 50, 0, 50, 0,0xf4,0x0b,0x1c,0x0a},
842 { 9, 4, 848, 528,1270, 530, 0, 0, 50,0xf5,0xfb,0x1b,0x2a}, /* 640x480, 320x240 */ 866 { 9, 4, 848, 528,1270, 530, 0, 0, 50, 0,0xf5,0xfb,0x1b,0x2a}, /* 640x480, 320x240 */
843/*{ 36, 25,1060, 648,1316, 530, 438, 0, 438,0xeb,0x05,0x25,0x16},*//* 800x600, 400x300 */ 867 { 36, 25,1060, 648,1270, 530, 438, 0, 438, 0,0xeb,0x05,0x25,0x16}, /* 800x600, 400x300 */
844 { 36, 25,1060, 648,1270, 530, 438, 0, 438,0xeb,0x05,0x25,0x16}, /* 800x600, 400x300 - better */ 868 { 3, 2,1080, 619,1270, 540, 438, 0, 438, 0,0xf3,0x00,0x1d,0x20}, /* 720x576 */
845 { 3, 2,1080, 619,1270, 540, 438, 0, 438,0xf3,0x00,0x1d,0x20}, /* 720x576 */ 869 { 1, 1,1170, 821,1270, 520, 686, 0, 686, 0,0xF3,0x00,0x1D,0x20}, /* 1024x768 */
846 { 1, 1,1170, 821,1270, 520, 686, 0, 686,0xF3,0x00,0x1D,0x20}, /* 1024x768 */ 870 { 1, 1,1170, 821,1270, 520, 686, 0, 686, 0,0xF3,0x00,0x1D,0x20}, /* 1024x768 (for NTSC equ) */
847 { 1, 1,1170, 821,1270, 520, 686, 0, 686,0xF3,0x00,0x1D,0x20}, /* 1024x768 (for NTSC equ) */ 871 { 9, 4, 848, 528,1270, 530, 0, 0, 50, 0,0xf5,0xfb,0x1b,0x2a} /* 720x480 */
848 { 9, 4, 848, 528,1270, 530, 0, 0, 50,0xf5,0xfb,0x1b,0x2a} /* 720x480 test */
849}; 872};
850 873
851static const SiS_TVDataStruct SiS_StNTSCData[] = 874static const struct SiS_TVData SiS_StNTSCData[] =
852{ 875{
853 { 1, 1, 858, 525,1270, 400, 50, 0, 760,0xf1,0x04,0x1f,0x18}, 876 { 1, 1, 858, 525,1270, 400, 50, 0, 760, 0,0xf1,0x04,0x1f,0x18},
854 { 1, 1, 858, 525,1270, 350, 50, 0, 640,0xf1,0x04,0x1f,0x18}, 877 { 1, 1, 858, 525,1270, 350, 50, 0, 640, 0,0xf1,0x04,0x1f,0x18},
855 { 1, 1, 858, 525,1270, 400, 0, 0, 720,0xf1,0x04,0x1f,0x18}, 878 { 1, 1, 858, 525,1270, 400, 0, 0, 720, 0,0xf1,0x04,0x1f,0x18},
856 { 1, 1, 858, 525,1270, 350, 0, 0, 720,0xf4,0x0b,0x1c,0x0a}, 879 { 1, 1, 858, 525,1270, 350, 0, 0, 720, 0,0xf4,0x0b,0x1c,0x0a},
857 { 1, 1, 858, 525,1270, 480, 0, 0, 760,0xf1,0x04,0x1f,0x18} 880 { 1, 1, 858, 525,1270, 480, 0, 0, 760, 0,0xf1,0x04,0x1f,0x18}
858}; 881};
859 882
860static const SiS_TVDataStruct SiS_ExtNTSCData[] = 883static const struct SiS_TVData SiS_ExtNTSCData[] =
861{ 884{
862 { 143, 65, 858, 443,1270, 440, 171, 0, 171,0xf1,0x04,0x1f,0x18}, /* 640x400, 320x200 */ 885 { 143, 65, 858, 443,1270, 440, 171, 0, 171, 0,0xf1,0x04,0x1f,0x18}, /* 640x400, 320x200 */
863 { 88, 35, 858, 393,1270, 440, 171, 0, 171,0xf1,0x04,0x1f,0x18}, 886 { 88, 35, 858, 393,1270, 440, 171, 0, 171, 0,0xf1,0x04,0x1f,0x18},
864 { 143, 70, 924, 443,1270, 440, 92, 0, 92,0xf1,0x04,0x1f,0x18}, 887 { 143, 70, 924, 443,1270, 440, 92, 0, 92, 0,0xf1,0x04,0x1f,0x18},
865 { 143, 70, 924, 393,1270, 440, 92, 0, 92,0xf4,0x0b,0x1c,0x0a}, 888 { 143, 70, 924, 393,1270, 440, 92, 0, 92, 0,0xf4,0x0b,0x1c,0x0a},
866 { 143, 76, 836, 523,1270, 440, 224, 0, 0,0xf1,0x05,0x1f,0x16}, /* 640x480, 320x240 */ 889 { 143, 76, 836, 523,1270, 440, 224, 0, 0, 0,0xf1,0x05,0x1f,0x16}, /* 640x480, 320x240 */
867 { 143, 120,1056, 643,1270, 440, 0, 128, 0,0xf4,0x10,0x1c,0x00}, /* 800x600, 400x300 */ 890 { 143, 120,1056, 643,1270, 440, 0, 1, 0, 0,0xf4,0x10,0x1c,0x00}, /* 800x600, 400x300 */
868/*{ 2, 1, 858, 503,1270, 480, 0, 128, 0,0xee,0x0c,0x22,0x08},*/ /* 720x480 (old, from 650) */ 891 { 143, 76, 836, 523,1270, 440, 0, 1, 0, 0,0xee,0x0c,0x22,0x08}, /* 720x480 - BETTER (from 300 series) */
869 { 143, 76, 836, 523,1270, 440, 0, 128, 0,0xee,0x0c,0x22,0x08}, /* 720x480 - BETTER (from 300 series) */ 892 { 1, 1,1100, 811,1412, 440, 0, 1, 0, 0,0xee,0x0c,0x22,0x08}, /* 1024x768 (525i) CORRECTED */
870/*{ 65, 64,1056, 791,1270, 480, 638, 0, 0,0xEE,0x0C,0x22,0x08} */ /* 1024x768 (525i) */ 893#if 0 /* flimmert und ist unten abgeschnitten (NTSCHT, NTSC clock) */
871 { 1, 1,1100, 811,1412, 440, 0, 128, 0,0xee,0x0c,0x22,0x08}, /* 1024x768 (525i) CORRECTED */ 894 { 65, 64,1056, 791,1270, 480, 455, 0, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
872 { 65, 64,1056, 791,1270, 480, 455, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */ 895#endif
896#if 0
897 { 1, 1,1100, 811,1412, 440, 0, 1, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
898#endif
899#if 0
900 { 1, 1,1120, 821,1516, 420, 0, 1, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
901#endif
902#if 0
903 { 1, 1, 938, 821,1516, 420, 0, 1, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
904#endif
905#if 0 /* zoom hin, unten abgeschnitten (NTSC2HT, NTSC1024 clock) */
906 { 1, 1,1072, 791,1270, 480, 455, 0, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
907#endif
908#if 1 /* zu weit links (squeezed) (NTSC2HT, NTSC1024 clock) */
909 { 1, 1,1100, 846,1270, 440, 455, 0, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
910#endif
911#if 0 /* zu weit links, rechts abgeschnitten (NTSC2HT, NTSC1024 clock) */
912 { 1, 1,1100, 846,1412, 440, 455, 0, 0, 0,0x00,0x00,0x00,0x00} /* 1024x768 (525p) */
913#endif
873}; 914};
874 915
875static const SiS_TVDataStruct SiS_StHiTVData[] = /* Slave + TVSimu */ 916static const struct SiS_TVData SiS_StHiTVData[] = /* Slave + TVSimu */
876{ 917{
877 { 1, 1, 0x37c,0x233,0x2b2,0x320, 0, 0, 0, 0x00,0x00,0x00,0x00}, 918 { 1, 1, 0x37c,0x233,0x2b2,0x320, 0, 0, 0, 0, 0, 0, 0, 0},
878 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, 919 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0, 0, 0, 0, 0},
879 { 1, 1, 0x37c,0x233,0x2b2,0x320, 0, 0, 0, 0x00,0x00,0x00,0x00}, 920 { 1, 1, 0x37c,0x233,0x2b2,0x320, 0, 0, 0, 0, 0, 0, 0, 0},
880 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, 921 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0, 0, 0, 0, 0},
881 { 1, 1, 0x37c,0x233,0x2b2,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, 922 { 1, 1, 0x37c,0x233,0x2b2,0x3c0, 0, 0, 0, 0, 0, 0, 0, 0},
882 { 8, 5, 0x41a,0x2ab,0x670,0x3c0,0x150,128, 0, 0x00,0x00,0x00,0x00} 923 { 8, 5, 0x41a,0x2ab,0x670,0x3c0,0x150, 1, 0, 0, 0, 0, 0, 0}
883}; 924};
884 925
885static const SiS_TVDataStruct SiS_St2HiTVData[] = /* Slave */ 926static const struct SiS_TVData SiS_St2HiTVData[] = /* Slave */
886{ 927{
887 { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, 928 { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0, 0, 0, 0, 0},
888 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, 929 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0, 0, 0, 0, 0},
889 { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, 930 { 3, 1, 0x348,0x1e3,0x670,0x3c0,0x032, 0, 0, 0, 0, 0, 0, 0},
890 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0x00,0x00,0x00,0x00}, 931 { 1, 1, 0x37c,0x233,0x2b2,0x2bc, 0, 0, 0, 0, 0, 0, 0, 0},
891 { 5, 2, 0x348,0x233,0x670,0x3c0,0x08d,128, 0, 0x00,0x00,0x00,0x00}, 932 { 5, 2, 0x348,0x233,0x670,0x3c0,0x08d, 1, 0, 0, 0, 0, 0, 0},
892 { 8, 5, 0x41a,0x2ab,0x670,0x3c0,0x17c,128, 0, 0x00,0x00,0x00,0x00} 933 { 8, 5, 0x41a,0x2ab,0x670,0x3c0,0x17c, 1, 0, 0, 0, 0, 0, 0}
893}; 934};
894 935
895static const SiS_TVDataStruct SiS_ExtHiTVData[] = 936static const struct SiS_TVData SiS_ExtHiTVData[] =
896{ 937{ /* all ok */
897 { 6, 1, 0x348,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, 938 { 6, 1, 0x348,0x233,0x660,0x3c0, 0, 0, 0, 0, 0, 0, 0, 0},
898 { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, 939 { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0, 0, 0, 0, 0},
899 { 6, 1, 0x348,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, 940 { 6, 1, 0x348,0x233,0x660,0x3c0, 0, 0, 0, 0, 0, 0, 0, 0},
900 { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0x00,0x00,0x00,0x00}, 941 { 3, 1, 0x3c0,0x233,0x660,0x3c0, 0, 0, 0, 0, 0, 0, 0, 0},
901 { 5, 1, 0x348,0x233,0x670,0x3c0,0x166,128, 0, 0x00,0x00,0x00,0x00}, /* 640x480 */ 942 { 5, 1, 0x348,0x233,0x670,0x3c0,0x166, 1, 0, 0, 0, 0, 0, 0}, /* 640x480 */
902 { 16, 5, 0x41a,0x2ab,0x670,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00}, /* 800x600 */ 943 { 16, 5, 0x41a,0x2ab,0x670,0x3c0,0x143, 1, 0, 0, 0, 0, 0, 0}, /* 800x600 */
903 { 25, 12, 0x4ec,0x353,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, /* 1024x768 */ 944 { 25, 12, 0x4ec,0x353,0x670,0x3c0,0x032, 0, 0, 0, 0, 0, 0, 0}, /* 1024x768 */
904 { 5, 4, 0x627,0x464,0x670,0x3c0,0x128, 0, 0, 0x00,0x00,0x00,0x00}, /* 1280x1024 */ 945 { 5, 4, 0x627,0x464,0x670,0x3c0,0x128, 0, 0, 0, 0, 0, 0, 0}, /* 1280x1024 */
905 { 4, 1, 0x41a,0x233,0x60c,0x3c0,0x143,128, 0, 0x00,0x00,0x00,0x00}, /* 800x480 */ 946 { 4, 1, 0x41a,0x233,0x60c,0x3c0,0x143, 1, 0, 0, 0, 0, 0, 0}, /* 800x480 */
906 { 5, 2, 0x578,0x293,0x670,0x3c0,0x032, 0, 0, 0x00,0x00,0x00,0x00}, /* 1024x576 */ 947 { 5, 2, 0x578,0x293,0x670,0x3c0,0x032, 0, 0, 0, 0, 0, 0, 0}, /* 1024x576 */
907 { 8, 5, 0x6d6,0x323,0x670,0x3c0,0x128, 0, 0, 0x00,0x00,0x00,0x00}, /* 1280x720 */ 948 { 8, 5, 0x6d6,0x323,0x670,0x3c0,0x128, 0, 0, 0, 0, 0, 0, 0}, /* 1280x720 */
908 { 137, 32, 0x3d4,0x233,0x663,0x3bf,0x143, 0, 0, 0x00,0x00,0x00,0x00} /* 960x600 */ 949 { 8, 3, 0x4ec,0x353,0x670,0x3c0,0x032, 0, 0, 0, 0, 0, 0, 0}, /* 960x600 */
909}; 950};
910 951
911static const SiS_TVDataStruct SiS_St525pData[] = 952static const struct SiS_TVData SiS_St525pData[] =
912{ 953{
913 { 1, 1, 0x6b4,0x20d,0x4f6,0x190, 50, 0, 0x2f8, 0x00,0x00,0x00,0x00}, 954 { 1, 1, 0x6b4,0x20d,0x4f6,0x190, 50, 0, 0x2f8, 0, 0, 0, 0, 0},
914 { 1, 1, 0x6b4,0x20d,0x4f6,0x15e, 50, 0, 0x280, 0x00,0x00,0x00,0x00}, 955 { 1, 1, 0x6b4,0x20d,0x4f6,0x15e, 50, 0, 0x280, 0, 0, 0, 0, 0},
915 { 1, 1, 0x6b4,0x20d,0x4f6,0x190, 50, 0, 0x2f8, 0x00,0x00,0x00,0x00}, 956 { 1, 1, 0x6b4,0x20d,0x4f6,0x190, 50, 0, 0x2f8, 0, 0, 0, 0, 0},
916 { 1, 1, 0x6b4,0x20d,0x4f6,0x15e, 50, 0, 0x280, 0x00,0x00,0x00,0x00}, 957 { 1, 1, 0x6b4,0x20d,0x4f6,0x15e, 50, 0, 0x280, 0, 0, 0, 0, 0},
917 { 1, 1, 0x6b4,0x20d,0x4f6,0x1e0, 0, 0, 0x2f8, 0x00,0x00,0x00,0x00} 958 { 1, 1, 0x6b4,0x20d,0x4f6,0x1e0, 0, 0, 0x2f8, 0, 0, 0, 0, 0}
918}; 959};
919 960
920static const SiS_TVDataStruct SiS_St750pData[] = 961static const struct SiS_TVData SiS_St750pData[] =
921{ 962{
922 { 1, 1, 0x672,0x2ee,0x500,0x190, 50, 0, 0x2f8, 0x00,0x00,0x00,0x00}, 963 { 1, 1, 0x672,0x2ee,0x500,0x190, 50, 0, 0x2f8, 0, 0, 0, 0, 0},
923 { 1, 1, 0x672,0x2ee,0x500,0x15e, 50, 0, 0x280, 0x00,0x00,0x00,0x00}, 964 { 1, 1, 0x672,0x2ee,0x500,0x15e, 50, 0, 0x280, 0, 0, 0, 0, 0},
924 { 1, 1, 0x672,0x2ee,0x500,0x190, 0, 0, 0x2d0, 0x00,0x00,0x00,0x00}, 965 { 1, 1, 0x672,0x2ee,0x500,0x190, 0, 0, 0x2d0, 0, 0, 0, 0, 0},
925 { 1, 1, 0x672,0x2ee,0x500,0x15e, 0, 0, 0x2d0, 0x00,0x00,0x00,0x00}, 966 { 1, 1, 0x672,0x2ee,0x500,0x15e, 0, 0, 0x2d0, 0, 0, 0, 0, 0},
926 { 1, 1, 0x672,0x2ee,0x500,0x1e0, 0, 0, 0x2f8, 0x00,0x00,0x00,0x00} 967 { 1, 1, 0x672,0x2ee,0x500,0x1e0, 0, 0, 0x2f8, 0, 0, 0, 0, 0}
927}; 968};
928 969
929static const SiS_TVDataStruct SiS_Ext750pData[] = 970static const struct SiS_TVData SiS_Ext750pData[] =
930{ 971{ /* all ok */
931 { 143, 65, 0x35a,0x1bb,0x4f6,0x1b8,0x0ab, 0, 0x0ab, 0x00,0x00,0x00,0x00}, 972 { 3, 1, 935, 470, 1130, 680, 50, 0, 0, 0, 0, 0, 0, 0}, /* 320x200/640x400 */
932 { 88, 35, 0x35a,0x189,0x4f6,0x1b8,0x0ab, 0, 0x0ab, 0x00,0x00,0x00,0x00}, 973 { 24, 7, 935, 420, 1130, 680, 50, 0, 0, 0, 0, 0, 0, 0},
933 { 18, 5, 0x339,0x1ae,0x500,0x2d0,0x05c, 0, 0x05c, 0x00,0x00,0x00,0x00}, 974 { 3, 1, 935, 470, 1130, 680, 50, 0, 0, 0, 0, 0, 0, 0},
934 { 143, 70, 0x39c,0x189,0x4f6,0x1b8,0x05c, 0, 0x05c, 0x00,0x00,0x00,0x00}, 975 { 24, 7, 935, 420, 1130, 680, 50, 0, 0, 0, 0, 0, 0, 0},
935 { 99, 32, 0x320,0x1fe,0x500,0x2d0, 50, 0, 0, 0x00,0x00,0x00,0x00}, /* 640x480 */ 976 { 2, 1, 1100, 590, 1130, 640, 50, 0, 0, 0, 0, 0, 0, 0}, /* 640x480 */
936 { 5, 4, 0x5d8,0x29e,0x500,0x2a8, 50, 0, 0, 0x00,0x00,0x00,0x00}, /* 800x600 */ 977 { 3, 2, 1210, 690, 1130, 660, 50, 0, 0, 0, 0, 0, 0, 0}, /* 800x600 OK */
937 { 99, 32, 0x320,0x1fe,0x500,0x2d0, 50, 0, 0, 0x00,0x00,0x00,0x00}, /* 720x480 test WORKS */ 978 { 2, 1, 1100, 562, 1130, 640, 0, 1, 0, 0, 0, 0, 0, 0}, /* 720x480 OK */
938 { 68, 64, 0x55f,0x346,0x500,0x2a8,0x27e, 0, 0, 0x00,0x00,0x00,0x00}, /* 1024x768 */ 979 { 1, 1, 1375, 878, 1130, 640, 638, 0, 0, 0, 0, 0, 0, 0}, /* 1024x768 OK */
939 { 5, 2, 0x3a7,0x226,0x500,0x2a8, 0,128, 0, 0x00,0x00,0x00,0x00}, /* 720x576 */ 980 { 5, 3, 1100, 675, 1130, 640, 0, 1, 0, 0, 0, 0, 0, 0}, /* 720/768x576 OK */
940 { 25, 24, 0x5d8,0x2f3,0x460,0x2a8, 50, 0, 0, 0x00,0x00,0x00,0x00} /* 1280x720 WORKS */ 981 { 25, 24, 1496, 755, 1120, 680, 50, 0, 0, 0, 0, 0, 0, 0} /* 1280x720 OK */
941}; 982};
942 983
943static const SiS_LCDDataStruct SiS_LCD1280x720Data[] = /* 2.03.00 */ 984static const struct SiS_LCDData SiS_LCD1280x720Data[] = /* 2.03.00 */
944{ 985{
945 { 44, 15, 864, 430, 1408, 806 }, /* 640x400 */ 986 { 44, 15, 864, 430, 1408, 806 }, /* 640x400 */
946 { 128, 35, 792, 385, 1408, 806 }, 987 { 128, 35, 792, 385, 1408, 806 },
@@ -962,7 +1003,7 @@ static const SiS_LCDDataStruct SiS_LCD1280x720Data[] = /* 2.03.00 */
962 * (Note: 1280x768_3 is now special for SiS301/NetVista 1003 * (Note: 1280x768_3 is now special for SiS301/NetVista
963 */ 1004 */
964 1005
965static const SiS_LCDDataStruct SiS_StLCD1280x768_2Data[] = /* 2.03.00 */ 1006static const struct SiS_LCDData SiS_StLCD1280x768_2Data[] = /* 2.03.00 */
966{ 1007{
967 { 64, 21, 858, 434, 1408, 806 }, /* 640x400 */ 1008 { 64, 21, 858, 434, 1408, 806 }, /* 640x400 */
968 { 32, 9, 858, 372, 1408, 806 }, 1009 { 32, 9, 858, 372, 1408, 806 },
@@ -977,7 +1018,7 @@ static const SiS_LCDDataStruct SiS_StLCD1280x768_2Data[] = /* 2.03.00 */
977 { 16, 15, 1600, 750, 1600, 806 } /* 1280x720 - from Ext */ 1018 { 16, 15, 1600, 750, 1600, 806 } /* 1280x720 - from Ext */
978}; 1019};
979 1020
980static const SiS_LCDDataStruct SiS_ExtLCD1280x768_2Data[] = /* 2.03.00 */ 1021static const struct SiS_LCDData SiS_ExtLCD1280x768_2Data[] = /* 2.03.00 */
981{ 1022{
982 { 16, 5, 960, 410, 1600, 806 }, /* 640x400 */ 1023 { 16, 5, 960, 410, 1600, 806 }, /* 640x400 */
983 { 64, 21, 1152, 364, 1600, 806 }, 1024 { 64, 21, 1152, 364, 1600, 806 },
@@ -993,7 +1034,7 @@ static const SiS_LCDDataStruct SiS_ExtLCD1280x768_2Data[] = /* 2.03.00 */
993}; 1034};
994 1035
995#if 0 /* Not used; _3 now reserved for NetVista (SiS301) */ 1036#if 0 /* Not used; _3 now reserved for NetVista (SiS301) */
996static const SiS_LCDDataStruct SiS_LCD1280x768_3Data[] = 1037static const struct SiS_LCDData SiS_LCD1280x768_3Data[] =
997{ 1038{
998 { 64, 25, 1056, 422, 1664, 798 }, /* 640x400 */ 1039 { 64, 25, 1056, 422, 1664, 798 }, /* 640x400 */
999 { 128, 39, 884, 396, 1408, 806 }, /* ,640 */ 1040 { 128, 39, 884, 396, 1408, 806 }, /* ,640 */
@@ -1009,7 +1050,7 @@ static const SiS_LCDDataStruct SiS_LCD1280x768_3Data[] =
1009}; 1050};
1010#endif 1051#endif
1011 1052
1012static const SiS_LCDDataStruct SiS_LCD1280x800Data[] = /* 0.93.12a (TMDS) */ 1053static const struct SiS_LCDData SiS_LCD1280x800Data[] = /* 0.93.12a (TMDS) */
1013{ 1054{
1014 { 128, 51, 1122, 412, 1408, 816 }, /* 640x400 */ 1055 { 128, 51, 1122, 412, 1408, 816 }, /* 640x400 */
1015 { 128, 49, 1232, 361, 1408, 816 }, 1056 { 128, 49, 1232, 361, 1408, 816 },
@@ -1024,7 +1065,7 @@ static const SiS_LCDDataStruct SiS_LCD1280x800Data[] = /* 0.93.12a (TMDS) */
1024 { 0, 0, 0, 0, 0, 0 } /* 1280x720 */ 1065 { 0, 0, 0, 0, 0, 0 } /* 1280x720 */
1025}; 1066};
1026 1067
1027static const SiS_LCDDataStruct SiS_LCD1280x800_2Data[] = /* 2.03.00 (LVDS) */ 1068static const struct SiS_LCDData SiS_LCD1280x800_2Data[] = /* 2.03.00 (LVDS) */
1028{ 1069{
1029 { 97, 42, 1344, 409, 1552, 812 }, /* 640x400 */ 1070 { 97, 42, 1344, 409, 1552, 812 }, /* 640x400 */
1030 { 97, 35, 1280, 358, 1552, 812 }, 1071 { 97, 35, 1280, 358, 1552, 812 },
@@ -1039,7 +1080,42 @@ static const SiS_LCDDataStruct SiS_LCD1280x800_2Data[] = /* 2.03.00 (LVDS) */
1039 { 97, 90, 1600, 730, 1552, 812 } /* 1280x720 */ 1080 { 97, 90, 1600, 730, 1552, 812 } /* 1280x720 */
1040}; 1081};
1041 1082
1042static const SiS_LCDDataStruct SiS_LCD1280x960Data[] = 1083#if 0
1084static const struct SiS_LCDData SiS_LCD1280x800_3Data[] = /* 2.02.05a (LVDS); m250 */
1085{
1086 { 128, 51, 1122, 412, 1408, 816 }, /* 640x400 */
1087 { 128, 49, 1232, 361, 1408, 816 },
1088 { 128, 51, 1122, 412, 1408, 816 },
1089 { 128, 49, 1232, 361, 1408, 816 },
1090 { 8, 3, 880, 491, 1408, 816 }, /* 640x480 */
1091 { 11, 6, 1024, 612, 1408, 816 }, /* 800x600 */
1092 { 22, 21, 1400, 784, 1408, 816 }, /* 1024x768 */
1093 { 0, 0, 0, 0, 0, 0 }, /* 1280x1024 */
1094 { 1, 1, 1408, 816, 1408, 816 }, /* 1280x800 */
1095 { 0, 0, 0, 0, 0, 0 }, /* 1280x768 - patch index */
1096 { 0, 0, 0, 0, 0, 0 } /* 1280x720 */
1097};
1098#endif
1099
1100static const struct SiS_LCDData SiS_LCD1280x854Data[] = /* 2.21.00CS (LVDS) */
1101{
1102 { 56, 15, 936, 410, 1664, 861 }, /* 640x400 */
1103 { 64, 25, 1586, 355, 1664, 861 },
1104 { 56, 15, 936, 410, 1664, 861 },
1105 { 64, 25, 1586, 355, 1664, 861 },
1106 { 91, 45, 1464, 485, 1664, 861 }, /* 640x480 */
1107 { 182, 75, 976, 605, 1664, 861 }, /* 800x600 */
1108 { 91, 66, 1342, 774, 1664, 861 }, /* 1024x768 */
1109 { 0, 0, 0, 0, 0, 0 }, /* 1280x1024 */
1110 { 26, 25, 1708, 807, 1664, 861 }, /* 1280x800 */
1111 { 13, 12, 1708, 774, 1664, 861 }, /* 1280x768 - patch index */
1112 { 52, 45, 1708, 725, 1664, 861 }, /* 1280x720 */
1113 { 0, 0, 0, 0, 0, 0 },
1114 { 0, 0, 0, 0, 0, 0 },
1115 { 1, 1, 1664, 861, 1664, 861 } /* 1280x854 */
1116};
1117
1118static const struct SiS_LCDData SiS_LCD1280x960Data[] =
1043{ 1119{
1044 { 9, 2, 800, 500, 1800, 1000 }, 1120 { 9, 2, 800, 500, 1800, 1000 },
1045 { 9, 2, 800, 500, 1800, 1000 }, 1121 { 9, 2, 800, 500, 1800, 1000 },
@@ -1049,10 +1125,15 @@ static const SiS_LCDDataStruct SiS_LCD1280x960Data[] =
1049 { 30, 11, 1056, 625, 1800, 1000 }, 1125 { 30, 11, 1056, 625, 1800, 1000 },
1050 { 5, 3, 1350, 800, 1800, 1000 }, 1126 { 5, 3, 1350, 800, 1800, 1000 },
1051 { 1, 1, 1576, 1050, 1576, 1050 }, 1127 { 1, 1, 1576, 1050, 1576, 1050 },
1052 { 1, 1, 1800, 1000, 1800, 1000 } 1128 { 1, 1, 1800, 1000, 1800, 1000 },
1129 { 0, 0, 0, 0, 0, 0 },
1130 { 0, 0, 0, 0, 0, 0 },
1131 { 0, 0, 0, 0, 0, 0 },
1132 { 0, 0, 0, 0, 0, 0 },
1133 { 0, 0, 0, 0, 0, 0 }
1053}; 1134};
1054 1135
1055static const SiS_LCDDataStruct SiS_StLCD1400x1050Data[] = 1136static const struct SiS_LCDData SiS_StLCD1400x1050Data[] =
1056{ 1137{
1057 { 211, 100, 2100, 408, 1688, 1066 }, 1138 { 211, 100, 2100, 408, 1688, 1066 },
1058 { 211, 64, 1536, 358, 1688, 1066 }, 1139 { 211, 64, 1536, 358, 1688, 1066 },
@@ -1062,10 +1143,15 @@ static const SiS_LCDDataStruct SiS_StLCD1400x1050Data[] =
1062 { 211, 72, 1008, 609, 1688, 1066 }, 1143 { 211, 72, 1008, 609, 1688, 1066 },
1063 { 211, 128, 1400, 776, 1688, 1066 }, 1144 { 211, 128, 1400, 776, 1688, 1066 },
1064 { 211, 205, 1680, 1041, 1688, 1066 }, 1145 { 211, 205, 1680, 1041, 1688, 1066 },
1065 { 1, 1, 1688, 1066, 1688, 1066 } 1146 { 1, 1, 1688, 1066, 1688, 1066 },
1147 { 0, 0, 0, 0, 0, 0 },
1148 { 0, 0, 0, 0, 0, 0 },
1149 { 0, 0, 0, 0, 0, 0 },
1150 { 0, 0, 0, 0, 0, 0 },
1151 { 0, 0, 0, 0, 0, 0 }
1066}; 1152};
1067 1153
1068static const SiS_LCDDataStruct SiS_ExtLCD1400x1050Data[] = 1154static const struct SiS_LCDData SiS_ExtLCD1400x1050Data[] =
1069{ 1155{
1070/* { 211, 60, 1260, 410, 1688, 1066 }, 640x400 (6330) */ 1156/* { 211, 60, 1260, 410, 1688, 1066 }, 640x400 (6330) */
1071 { 211, 100, 2100, 408, 1688, 1066 }, /* 640x400 (6325) WORKS */ 1157 { 211, 100, 2100, 408, 1688, 1066 }, /* 640x400 (6325) WORKS */
@@ -1080,10 +1166,13 @@ static const SiS_LCDDataStruct SiS_ExtLCD1400x1050Data[] =
1080 { 211, 205, 1680, 1041, 1688, 1066 }, /* 1280x1024 - not used (always unscaled) */ 1166 { 211, 205, 1680, 1041, 1688, 1066 }, /* 1280x1024 - not used (always unscaled) */
1081 { 1, 1, 1688, 1066, 1688, 1066 }, /* 1400x1050 */ 1167 { 1, 1, 1688, 1066, 1688, 1066 }, /* 1400x1050 */
1082 { 0, 0, 0, 0, 0, 0 }, /* kludge */ 1168 { 0, 0, 0, 0, 0, 0 }, /* kludge */
1083 { 211, 120, 1400, 730, 1688, 1066 } /* 1280x720 */ 1169 { 211, 120, 1400, 730, 1688, 1066 }, /* 1280x720 */
1170 { 0, 0, 0, 0, 0, 0 },
1171 { 0, 0, 0, 0, 0, 0 },
1172 { 0, 0, 0, 0, 0, 0 }
1084}; 1173};
1085 1174
1086static const SiS_LCDDataStruct SiS_LCD1680x1050Data[] = 1175static const struct SiS_LCDData SiS_LCD1680x1050Data[] =
1087{ 1176{
1088 { 95, 24, 1260, 410, 1900, 1066 }, /* 0 640x400 */ 1177 { 95, 24, 1260, 410, 1900, 1066 }, /* 0 640x400 */
1089 { 10, 3, 1710, 362, 1900, 1066 }, 1178 { 10, 3, 1710, 362, 1900, 1066 },
@@ -1097,10 +1186,11 @@ static const SiS_LCDDataStruct SiS_LCD1680x1050Data[] =
1097 { 95, 69, 1800, 817, 1900, 1066 }, /* 9 1280x800 patch index */ 1186 { 95, 69, 1800, 817, 1900, 1066 }, /* 9 1280x800 patch index */
1098 { 13, 9, 1900, 739, 1900, 1066 }, /* 10 1280x720 */ 1187 { 13, 9, 1900, 739, 1900, 1066 }, /* 10 1280x720 */
1099 { 95, 94, 1880, 1066, 1900, 1066 }, /* 11 1400x1050 patch index */ 1188 { 95, 94, 1880, 1066, 1900, 1066 }, /* 11 1400x1050 patch index */
1100 { 1, 1, 1900, 1066, 1900, 1066 } /* 12 1680x1050 */ 1189 { 1, 1, 1900, 1066, 1900, 1066 }, /* 12 1680x1050 */
1190 { 0, 0, 0, 0, 0, 0 }
1101}; 1191};
1102 1192
1103static const SiS_LCDDataStruct SiS_StLCD1600x1200Data[] = 1193static const struct SiS_LCDData SiS_StLCD1600x1200Data[] =
1104{ 1194{
1105 {27, 4, 800, 500, 2160, 1250 }, 1195 {27, 4, 800, 500, 2160, 1250 },
1106 {27, 4, 800, 500, 2160, 1250 }, 1196 {27, 4, 800, 500, 2160, 1250 },
@@ -1111,10 +1201,14 @@ static const SiS_LCDDataStruct SiS_StLCD1600x1200Data[] =
1111 { 5, 2,1350, 800, 2160, 1250 }, 1201 { 5, 2,1350, 800, 2160, 1250 },
1112 {135,88,1600,1100, 2160, 1250 }, 1202 {135,88,1600,1100, 2160, 1250 },
1113 {72, 49,1680,1092, 2160, 1250 }, 1203 {72, 49,1680,1092, 2160, 1250 },
1114 { 1, 1,2160,1250, 2160, 1250 } 1204 { 1, 1,2160,1250, 2160, 1250 },
1205 { 0, 0, 0, 0, 0, 0 },
1206 { 0, 0, 0, 0, 0, 0 },
1207 { 0, 0, 0, 0, 0, 0 },
1208 { 0, 0, 0, 0, 0, 0 }
1115}; 1209};
1116 1210
1117static const SiS_LCDDataStruct SiS_ExtLCD1600x1200Data[] = 1211static const struct SiS_LCDData SiS_ExtLCD1600x1200Data[] =
1118{ 1212{
1119 {72,11, 990, 422, 2160, 1250 }, /* 640x400 (6330) WORKS */ 1213 {72,11, 990, 422, 2160, 1250 }, /* 640x400 (6330) WORKS */
1120/* {27, 4, 800, 500, 2160, 1250 }, 640x400 (6235) */ 1214/* {27, 4, 800, 500, 2160, 1250 }, 640x400 (6235) */
@@ -1127,10 +1221,14 @@ static const SiS_LCDDataStruct SiS_ExtLCD1600x1200Data[] =
1127 { 5, 2,1350, 800, 2160, 1250 }, 1221 { 5, 2,1350, 800, 2160, 1250 },
1128 {27,16,1500,1064, 2160, 1250 }, /* 1280x1024 */ 1222 {27,16,1500,1064, 2160, 1250 }, /* 1280x1024 */
1129 {72,49,1680,1092, 2160, 1250 }, /* 1400x1050 (6330, was not supported on 6325) */ 1223 {72,49,1680,1092, 2160, 1250 }, /* 1400x1050 (6330, was not supported on 6325) */
1130 { 1, 1,2160,1250, 2160, 1250 } 1224 { 1, 1,2160,1250, 2160, 1250 },
1225 { 0, 0, 0, 0, 0, 0 },
1226 { 0, 0, 0, 0, 0, 0 },
1227 { 0, 0, 0, 0, 0, 0 },
1228 { 0, 0, 0, 0, 0, 0 }
1131}; 1229};
1132 1230
1133static const SiS_LCDDataStruct SiS_NoScaleData[] = 1231static const struct SiS_LCDData SiS_NoScaleData[] =
1134{ 1232{
1135 { 1, 1, 800, 449, 800, 449 }, /* 0x00: 320x200, 640x400 */ 1233 { 1, 1, 800, 449, 800, 449 }, /* 0x00: 320x200, 640x400 */
1136 { 1, 1, 800, 449, 800, 449 }, 1234 { 1, 1, 800, 449, 800, 449 },
@@ -1162,14 +1260,18 @@ static const SiS_LCDDataStruct SiS_NoScaleData[] =
1162 { 1, 1,1808, 808,1808, 808 }, /* 0x1b: 1360x768 */ 1260 { 1, 1,1808, 808,1808, 808 }, /* 0x1b: 1360x768 */
1163 { 1, 1,1104, 563,1104, 563 }, /* 0x1c: 960x540 */ 1261 { 1, 1,1104, 563,1104, 563 }, /* 0x1c: 960x540 */
1164 { 1, 1,1120, 618,1120, 618 }, /* 0x1d: 960x600 */ 1262 { 1, 1,1120, 618,1120, 618 }, /* 0x1d: 960x600 */
1165 { 1, 1,1408, 816,1408, 816 } /* 0x1f: 1280x800 (TMDS special) */ 1263 { 1, 1,1408, 816,1408, 816 }, /* 0x1f: 1280x800 (TMDS special) */
1264 { 1, 1,1760,1235,1760,1235 }, /* 0x20: 1600x1200 for LCDA */
1265 { 1, 1,2048,1320,2048,1320 }, /* 0x21: 1600x1200 for non-SiS LVDS */
1266 { 1, 1,1664, 861,1664, 861 } /* 0x22: 1280x854 */
1166}; 1267};
1167 1268
1168/**************************************************************/ 1269/**************************************************************/
1169/* LVDS ----------------------------------------------------- */ 1270/* LVDS ----------------------------------------------------- */
1170/**************************************************************/ 1271/**************************************************************/
1171 1272
1172static const SiS_LVDSDataStruct SiS_LVDS320x480Data_1[]= 1273/* FSTN/DSTN 320x240, 2 variants */
1274static const struct SiS_LVDSData SiS_LVDS320x240Data_1[]=
1173{ 1275{
1174 { 848, 433, 400, 525}, 1276 { 848, 433, 400, 525},
1175 { 848, 389, 400, 525}, 1277 { 848, 389, 400, 525},
@@ -1177,157 +1279,40 @@ static const SiS_LVDSDataStruct SiS_LVDS320x480Data_1[]=
1177 { 848, 389, 400, 525}, 1279 { 848, 389, 400, 525},
1178 { 848, 518, 400, 525}, 1280 { 848, 518, 400, 525},
1179 {1056, 628, 400, 525}, 1281 {1056, 628, 400, 525},
1180 { 400, 525, 400, 525}, 1282 { 400, 525, 400, 525} /* xSTN */
1181 { 800, 449,1000, 644},
1182 { 800, 525,1000, 635}
1183}; 1283};
1184 1284
1185static const SiS_LVDSDataStruct SiS_LVDS640x480Data_1[]= 1285static const struct SiS_LVDSData SiS_LVDS320x240Data_2[]=
1186{ 1286{
1187 { 800, 445, 800, 525}, /* 800, 449, 800, 449 */ 1287 { 800, 445, 800, 525},
1188 { 800, 395, 800, 525}, 1288 { 800, 395, 800, 525},
1189 { 800, 445, 800, 525}, 1289 { 800, 445, 800, 525},
1190 { 800, 395, 800, 525}, 1290 { 800, 395, 800, 525},
1191 { 800, 525, 800, 525}, 1291 { 800, 525, 800, 525},
1192 { 800, 525, 800, 525}, /* pseudo */ 1292 {1056, 628,1056, 628},
1193 { 800, 525, 800, 525} /* pseudo */ 1293 { 480, 525, 480, 525} /* xSTN */
1194}; 1294};
1195 1295
1196/* FSTN 320x240 */ 1296static const struct SiS_LVDSData SiS_LVDS640x480Data_1[]=
1197static const SiS_LVDSDataStruct SiS_LVDS640x480Data_2[]=
1198{ 1297{
1199 { 800, 445, 800, 525}, 1298 { 800, 445, 800, 525}, /* 800, 449, 800, 449 */
1200 { 800, 395, 800, 525}, 1299 { 800, 395, 800, 525},
1201 { 800, 445, 800, 525}, 1300 { 800, 445, 800, 525},
1202 { 800, 395, 800, 525}, 1301 { 800, 395, 800, 525},
1203 { 800, 525, 800, 525}, 1302 { 800, 525, 800, 525}
1204 { 800, 525, 800, 525}, /* pseudo */
1205 { 800, 525, 800, 525} /* pseudo */
1206}; 1303};
1207 1304
1208static const SiS_LVDSDataStruct SiS_LVDS800x600Data_1[]= 1305static const struct SiS_LVDSData SiS_LVDS800x600Data_1[]=
1209{ 1306{
1210 { 848, 433,1060, 629}, 1307 { 848, 433,1060, 629},
1211 { 848, 389,1060, 629}, 1308 { 848, 389,1060, 629},
1212 { 848, 433,1060, 629}, 1309 { 848, 433,1060, 629},
1213 { 848, 389,1060, 629}, 1310 { 848, 389,1060, 629},
1214 { 848, 518,1060, 629}, 1311 { 848, 518,1060, 629},
1215 {1056, 628,1056, 628},
1216 {1056, 628,1056, 628} 1312 {1056, 628,1056, 628}
1217}; 1313};
1218 1314
1219static const SiS_LVDSDataStruct SiS_LVDS800x600Data_2[]= 1315static const struct SiS_LVDSData SiS_LVDS1024x600Data_1[] =
1220{
1221 {1056, 628,1056, 628}
1222};
1223
1224static const SiS_LVDSDataStruct SiS_LVDS1024x768Data_1[]=
1225{
1226 { 840, 438,1344, 806},
1227 { 840, 409,1344, 806},
1228 { 840, 438,1344, 806},
1229 { 840, 409,1344, 806},
1230 { 840, 518,1344, 806}, /* 640x480 */
1231 {1050, 638,1344, 806}, /* 800x600 */
1232 {1344, 806,1344, 806}, /* 1024x768 */
1233};
1234
1235static const SiS_LVDSDataStruct SiS_LVDS1024x768Data_2[]=
1236{
1237 {1344, 806,1344, 806}
1238};
1239
1240static const SiS_LVDSDataStruct SiS_LVDS1280x1024Data_1[]=
1241{
1242 {1048, 442,1688,1066},
1243 {1048, 392,1688,1066},
1244 {1048, 442,1688,1066},
1245 {1048, 392,1688,1066},
1246 {1048, 522,1688,1066},
1247 {1208, 642,1688,1066},
1248 {1432, 810,1688,1066},
1249 {1688,1066,1688,1066}
1250};
1251
1252static const SiS_LVDSDataStruct SiS_LVDS1280x1024Data_2[]=
1253{
1254 {1688,1066,1688,1066}
1255};
1256
1257static const SiS_LVDSDataStruct SiS_LVDS1400x1050Data_1[]=
1258{
1259 { 928, 416, 1688,1066},
1260 { 928, 366, 1688,1066},
1261 { 928, 416, 1688,1066},
1262 { 928, 366, 1688,1066},
1263 { 928, 496, 1688,1066},
1264 {1088, 616, 1688,1066},
1265 {1312, 784, 1688,1066},
1266 {1568,1040, 1688,1066},
1267 {1688,1066, 1688,1066}
1268};
1269
1270static const SiS_LVDSDataStruct SiS_LVDS1400x1050Data_2[]=
1271{
1272 {1688,1066, 1688,1066}
1273};
1274
1275static const SiS_LVDSDataStruct SiS_LVDS1600x1200Data_1[]=
1276{
1277 {1088, 520, 2048,1320},
1278 {1088, 470, 2048,1320},
1279 {1088, 520, 2048,1320},
1280 {1088, 470, 2048,1320},
1281 {1088, 600, 2048,1320},
1282 {1248, 720, 2048,1320},
1283 {1472, 888, 2048,1320},
1284 {1728,1144, 2048,1320},
1285 {1848,1170, 2048,1320},
1286 {2048,1320, 2048,1320}
1287};
1288
1289static const SiS_LVDSDataStruct SiS_LVDS1600x1200Data_2[]=
1290{
1291 {2048,1320, 2048,1320}
1292};
1293
1294static const SiS_LVDSDataStruct SiS_LVDS1280x960Data_1[]=
1295{
1296 { 840, 438,1344, 806},
1297 { 840, 409,1344, 806},
1298 { 840, 438,1344, 806},
1299 { 840, 409,1344, 806},
1300 { 840, 518,1344, 806},
1301 {1050, 638,1344, 806},
1302 {1344, 806,1344, 806},
1303 { 800, 449,1280, 801},
1304 { 800, 525,1280, 813}
1305};
1306
1307static const SiS_LVDSDataStruct SiS_LVDS1280x960Data_2[]=
1308{
1309 {1344, 806,1344, 806}
1310};
1311
1312static const SiS_LVDSDataStruct SiS_LVDS1280x768Data_1[]=
1313{
1314 { 768, 438, 1408, 806},
1315 { 768, 388, 1408, 806},
1316 { 768, 438, 1408, 806},
1317 { 768, 388, 1408, 806},
1318 { 768, 518, 1408, 806},
1319 { 928, 638, 1408, 806},
1320 {1152, 806, 1408, 806},
1321 {1408, 806, 1408, 806},
1322 {1408, 806, 1408, 806}
1323};
1324
1325static const SiS_LVDSDataStruct SiS_LVDS1280x768Data_2[]=
1326{
1327 {1408, 806, 1408, 806}
1328};
1329
1330static const SiS_LVDSDataStruct SiS_LVDS1024x600Data_1[] =
1331{ 1316{
1332 { 840, 604,1344, 800}, 1317 { 840, 604,1344, 800},
1333 { 840, 560,1344, 800}, 1318 { 840, 560,1344, 800},
@@ -1338,124 +1323,18 @@ static const SiS_LVDSDataStruct SiS_LVDS1024x600Data_1[] =
1338 {1344, 800,1344, 800} 1323 {1344, 800,1344, 800}
1339}; 1324};
1340 1325
1341static const SiS_LVDSDataStruct SiS_LVDS1024x600Data_2[] = 1326static const struct SiS_LVDSData SiS_LVDS1024x768Data_1[]=
1342{
1343 {1344, 800,1344, 800}
1344};
1345
1346static const SiS_LVDSDataStruct SiS_LVDS1152x768Data_1[] =
1347{ 1327{
1348 { 840, 438,1344, 806}, 1328 { 840, 438,1344, 806},
1349 { 840, 409,1344, 806}, 1329 { 840, 409,1344, 806},
1350 { 840, 438,1344, 806}, 1330 { 840, 438,1344, 806},
1351 { 840, 409,1344, 806}, 1331 { 840, 409,1344, 806},
1352 { 840, 518,1344, 806}, 1332 { 840, 518,1344, 806}, /* 640x480 */
1353 {1050, 638,1344, 806},
1354 {1344, 806,1344, 806}
1355};
1356
1357static const SiS_LVDSDataStruct SiS_LVDS1152x768Data_2[] =
1358{
1359 {1344, 806,1344, 806}
1360};
1361
1362/* Pass 1:1 data */
1363static const SiS_LVDSDataStruct SiS_LVDSXXXxXXXData_1[]=
1364{
1365 { 800, 449, 800, 449},
1366 { 800, 449, 800, 449},
1367 { 900, 449, 900, 449},
1368 { 900, 449, 900, 449},
1369 { 800, 525, 800, 525}, /* 640x480 */
1370 {1056, 628, 1056, 628}, /* 800x600 */
1371 {1344, 806, 1344, 806}, /* 1024x768 */
1372 {1688,1066, 1688,1066}, /* 1280x1024 */ /* INSERTED */
1373 {1688, 806, 1688, 806}, /* 1280x768 */
1374};
1375
1376/* Custom data for Barco iQ R series */
1377static const SiS_LVDSDataStruct SiS_LVDSBARCO1366Data_1[]=
1378{
1379 { 832, 438,1331, 806},
1380 { 832, 388,1331, 806},
1381 { 832, 438,1331, 806},
1382 { 832, 388,1331, 806},
1383 { 832, 518,1331, 806},
1384 {1050, 638,1344, 806},
1385 {1344, 806,1344, 806},
1386 {1688,1066,1688,1066},
1387 {1688,1066,1688,1066} /* 1360x1024 */
1388};
1389
1390/* Custom data for Barco iQ R series */
1391static const SiS_LVDSDataStruct SiS_LVDSBARCO1366Data_2[]=
1392{
1393 {1344, 806,1344, 806},
1394 {1344, 806,1344, 806},
1395 {1344, 806,1344, 806},
1396 {1344, 806,1344, 806},
1397 {1344, 806,1344, 806},
1398 {1344, 806,1344, 806},
1399 {1344, 806,1344, 806},
1400 {1688,1066,1688,1066},
1401 {1688,1066,1688,1066} /* 1360x1024 */
1402};
1403
1404/* Custom data for Barco iQ G series */
1405static const SiS_LVDSDataStruct SiS_LVDSBARCO1024Data_1[]=
1406{
1407 { 832, 438,1331, 806},
1408 { 832, 409,1331, 806},
1409 { 832, 438,1331, 806},
1410 { 832, 409,1331, 806},
1411 { 832, 518,1331, 806}, /* 640x480 */
1412 {1050, 638,1344, 806}, /* 800x600 */ 1333 {1050, 638,1344, 806}, /* 800x600 */
1413 {1344, 806,1344, 806}, /* 1024x768 */ 1334 {1344, 806,1344, 806}, /* 1024x768 */
1414}; 1335};
1415 1336
1416/* Custom data for Barco iQ G series */ 1337static const struct SiS_LVDSData SiS_CHTVUNTSCData[]=
1417static const SiS_LVDSDataStruct SiS_LVDSBARCO1024Data_2[]=
1418{
1419 {1344, 806,1344, 806}
1420};
1421
1422/* Custom data for 848x480 parallel panel */
1423static const SiS_LVDSDataStruct SiS_LVDS848x480Data_1[]=
1424{
1425 { 0, 0, 0, 0},
1426 { 0, 0, 0, 0},
1427 { 0, 0, 0, 0},
1428 { 0, 0, 0, 0},
1429 {1088, 525,1088, 525}, /* 640x480 TODO */
1430 {1088, 525,1088, 525}, /* 800x600 TODO */
1431 {1088, 525,1088, 525}, /* 1024x768 TODO */
1432 { 0, 0, 0, 0},
1433 { 0, 0, 0, 0},
1434 { 0, 0, 0, 0},
1435 { 0, 0, 0, 0},
1436 {1088, 525,1088, 525}, /* 848x480 */
1437 {1088, 525,1088, 525} /* 1360x768 TODO */
1438};
1439
1440/* Custom data for 848x480 parallel panel */
1441static const SiS_LVDSDataStruct SiS_LVDS848x480Data_2[]=
1442{
1443 { 0, 0, 0, 0},
1444 { 0, 0, 0, 0},
1445 { 0, 0, 0, 0},
1446 { 0, 0, 0, 0},
1447 {1088, 525,1088, 525}, /* 640x480 */
1448 {1088, 525,1088, 525}, /* 800x600 */
1449 {1088, 525,1088, 525}, /* 1024x768 */
1450 { 0, 0, 0, 0},
1451 { 0, 0, 0, 0},
1452 { 0, 0, 0, 0},
1453 { 0, 0, 0, 0},
1454 {1088, 525,1088, 525}, /* 848x480 */
1455 {1088, 525,1088, 525} /* 1360x768 TODO */
1456};
1457
1458static const SiS_LVDSDataStruct SiS_CHTVUNTSCData[]=
1459{ 1338{
1460 { 840, 600, 840, 600}, 1339 { 840, 600, 840, 600},
1461 { 840, 600, 840, 600}, 1340 { 840, 600, 840, 600},
@@ -1466,7 +1345,7 @@ static const SiS_LVDSDataStruct SiS_CHTVUNTSCData[]=
1466 {1160, 945,1160, 945} 1345 {1160, 945,1160, 945}
1467}; 1346};
1468 1347
1469static const SiS_LVDSDataStruct SiS_CHTVONTSCData[]= 1348static const struct SiS_LVDSData SiS_CHTVONTSCData[]=
1470{ 1349{
1471 { 840, 525, 840, 525}, 1350 { 840, 525, 840, 525},
1472 { 840, 525, 840, 525}, 1351 { 840, 525, 840, 525},
@@ -1477,55 +1356,9 @@ static const SiS_LVDSDataStruct SiS_CHTVONTSCData[]=
1477 {1160, 840,1160, 840} 1356 {1160, 840,1160, 840}
1478}; 1357};
1479 1358
1480/* Chrontel TV Skew */
1481
1482static const SiS_LVDSDesStruct SiS_CHTVUNTSCDesData[]=
1483{
1484 { 0, 0},
1485 { 0, 0},
1486 { 0, 0},
1487 { 0, 0},
1488 { 0, 0},
1489 { 0, 0},
1490 { 0, 0}
1491};
1492
1493static const SiS_LVDSDesStruct SiS_CHTVONTSCDesData[]=
1494{
1495 { 0, 0},
1496 { 0, 0},
1497 { 0, 0},
1498 { 0, 0},
1499 { 0, 0},
1500 { 0, 0},
1501 { 0, 0}
1502};
1503
1504static const SiS_LVDSDesStruct SiS_CHTVUPALDesData[]=
1505{
1506 {256, 0},
1507 {256, 0},
1508 {256, 0},
1509 {256, 0},
1510 { 0, 0},
1511 { 0, 0},
1512 { 0, 0}
1513};
1514
1515static const SiS_LVDSDesStruct SiS_CHTVOPALDesData[]=
1516{
1517 {256, 0},
1518 {256, 0},
1519 {256, 0},
1520 {256, 0},
1521 { 0, 0},
1522 { 0, 0},
1523 { 0, 0}
1524};
1525
1526/* CRT1 CRTC data for slave modes */ 1359/* CRT1 CRTC data for slave modes */
1527 1360
1528static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1320x480_1[] = 1361static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1320x240_1[] =
1529{ 1362{
1530 {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f, 1363 {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f,
1531 0x90,0x85,0x8f,0xab,0x30,0x00,0x05, 1364 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -1550,48 +1383,7 @@ static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1320x480_1[] =
1550 0x00 }} 1383 0x00 }}
1551}; 1384};
1552 1385
1553static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_1[] = 1386static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1320x240_2[] =
1554{
1555 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1556 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1557 0x00}},
1558 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1559 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1560 0x00}},
1561 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1562 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1563 0x00}},
1564 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1565 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1566 0x00}},
1567 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1568 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1569 0x00}},
1570 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
1571 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1572 0x01}}
1573};
1574
1575static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_1_H[] =
1576{
1577 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1578 0x9c,0x8e,0x96,0xb9,0x00,0x00,0x00,
1579 0x00}},
1580 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1581 0x83,0x85,0x63,0xba,0x00,0x00,0x00,
1582 0x00}},
1583 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1584 0x9c,0x8e,0x96,0xb9,0x00,0x00,0x00,
1585 0x00}},
1586 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1587 0x83,0x85,0x63,0xba,0x00,0x00,0x00,
1588 0x00}},
1589 {{0x2d,0x28,0x90,0x2c,0x80,0x0b,0x3e,
1590 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
1591 0x00}}
1592};
1593
1594static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_2[] =
1595{ 1387{
1596 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e, 1388 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1597 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05, 1389 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
@@ -1611,12 +1403,17 @@ static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_2[] =
1611 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0, 1403 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
1612 0x58,0x8c,0x57,0x73,0x20,0x00,0x06, 1404 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1613 0x01}}, 1405 0x01}},
1406#if 0
1614 {{0x2d,0x27,0x90,0x2c,0x80,0x0b,0x3e, 1407 {{0x2d,0x27,0x90,0x2c,0x80,0x0b,0x3e,
1615 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00, 1408 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
1616 0x00}} 1409 0x00}}
1410#endif
1411 {{0x5f,0x4f,0x83,0x55,0x81,0x0b,0x3e,
1412 0xe9,0x8b,0xe8,0x0c,0x00,0x00,0x05,
1413 0x00}},
1617}; 1414};
1618 1415
1619static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_2_H[] = 1416static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1320x240_2_H[] =
1620{ 1417{
1621 {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f, 1418 {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f,
1622 0x90,0x85,0x8f,0xab,0x30,0x00,0x05, 1419 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -1641,7 +1438,7 @@ static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_2_H[] =
1641 0x00}} 1438 0x00}}
1642}; 1439};
1643 1440
1644static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_3[] = 1441static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1320x240_3[] =
1645{ 1442{
1646 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e, 1443 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1647 0xe9,0x8b,0xdf,0x04,0x00,0x00,0x05, 1444 0xe9,0x8b,0xdf,0x04,0x00,0x00,0x05,
@@ -1666,7 +1463,7 @@ static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_3[] =
1666 0x00}} 1463 0x00}}
1667}; 1464};
1668 1465
1669static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_3_H[] = 1466static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1320x240_3_H[] =
1670{ 1467{
1671 {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f, 1468 {{0x65,0x4f,0x89,0x56,0x83,0xaa,0x1f,
1672 0x90,0x85,0x8f,0xab,0x30,0x00,0x05, 1469 0x90,0x85,0x8f,0xab,0x30,0x00,0x05,
@@ -1691,778 +1488,175 @@ static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT1640x480_3_H[] =
1691 0x00}} 1488 0x00}}
1692}; 1489};
1693 1490
1694static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11024x600_1[] = 1491static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1640x480_1[] =
1695{
1696 {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
1697 0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
1698 0x00}},
1699 {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
1700 0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
1701 0x00}},
1702 {{0x64,0x4f,0x88,0x54,0x9f,0x5a,0x3e,
1703 0xe8,0x8f,0x8f,0x5b,0x00,0x00,0x01,
1704 0x00}},
1705 {{0x64,0x4f,0x88,0x54,0x9f,0x2e,0x3e,
1706 0xb9,0x80,0x5d,0x2f,0x00,0x00,0x01,
1707 0x00}},
1708 {{0x64,0x4f,0x88,0x54,0x9f,0xaf,0xba,
1709 0x3b,0x82,0xdf,0xb0,0x00,0x00,0x01,
1710 0x00}},
1711 {{0x7e,0x63,0x82,0x68,0x15,0x1e,0xf1,
1712 0xae,0x85,0x57,0x1f,0x30,0x00,0x26,
1713 0x01}},
1714 {{0xa3,0x7f,0x87,0x86,0x97,0x1e,0xf1,
1715 0xae,0x85,0x57,0x1f,0x30,0x00,0x02,
1716 0x01}}
1717};
1718
1719static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11024x600_1_H[] =
1720{
1721 {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
1722 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1723 0x00}},
1724 {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
1725 0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
1726 0x00}},
1727 {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
1728 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1729 0x00}},
1730 {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
1731 0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
1732 0x00}},
1733 {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
1734 0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
1735 0x00}},
1736 {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
1737 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
1738 0x01}},
1739 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1740 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1741 0x01}}
1742};
1743
1744static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11024x600_2[] =
1745{
1746 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1747 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1748 0x00}},
1749 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1750 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1751 0x00}},
1752 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1753 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1754 0x00}},
1755 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1756 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1757 0x00}},
1758 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1759 0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
1760 0x00}},
1761 {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
1762 0xae,0x84,0x57,0x25,0x30,0x00,0x02,
1763 0x01}},
1764 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1765 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1766 0x01}}
1767};
1768
1769static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11024x600_2_H[] =
1770{
1771 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1772 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1773 0x00}},
1774 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1775 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1776 0x00}},
1777 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1778 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1779 0x00}},
1780 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1781 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1782 0x00}},
1783 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1784 0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
1785 0x00}},
1786 {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
1787 0xae,0x84,0x57,0x25,0x30,0x00,0x01,
1788 0x01}},
1789 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1790 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1791 0x01}}
1792};
1793
1794static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11152x768_1[] =
1795{
1796 {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
1797 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
1798 0x00}},
1799 {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
1800 0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
1801 0x00}},
1802 {{0x64,0x4f,0x88,0x54,0x9f,0xc4,0x1f,
1803 0x92,0x89,0x8f,0xb5,0x30,0x00,0x01,
1804 0x00}},
1805 {{0x64,0x4f,0x88,0x54,0x9f,0x97,0x1f,
1806 0x60,0x87,0x5d,0x83,0x10,0x00,0x01,
1807 0x00}},
1808 {{0x64,0x4f,0x88,0x54,0x9f,0x04,0x3e,
1809 0xe2,0x89,0xdf,0x05,0x00,0x00,0x01,
1810 0x00}},
1811 {{0x7e,0x63,0x82,0x68,0x15,0x7c,0xf0,
1812 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x26,
1813 0x01}},
1814 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1815 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1816 0x01}}
1817};
1818
1819static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11152x768_1_H[] =
1820{
1821 {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
1822 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1823 0x00}},
1824 {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
1825 0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
1826 0x00}},
1827 {{0x2f,0x27,0x93,0x2b,0x90,0xc4,0x1f,
1828 0x92,0x89,0x8f,0xb5,0x30,0x00,0x44,
1829 0x00}},
1830 {{0x2f,0x27,0x93,0x2b,0x90,0x97,0x1f,
1831 0x60,0x87,0x5d,0x83,0x10,0x00,0x44,
1832 0x00}},
1833 {{0x2f,0x27,0x93,0x2b,0x90,0x04,0x3e,
1834 0xe2,0x89,0xdf,0x05,0x00,0x00,0x44,
1835 0x00}},
1836 {{0x3c,0x31,0x80,0x35,0x1c,0x7c,0xf0,
1837 0x5a,0x8f,0x57,0x7d,0x20,0x00,0x55,
1838 0x01}},
1839 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1840 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1841 0x01}}
1842};
1843
1844static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11152x768_2[] =
1845{
1846 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1847 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1848 0x00}},
1849 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1850 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1851 0x00}},
1852 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1853 0x4a,0x80,0x8f,0x25,0x30,0x00,0x06,
1854 0x00}},
1855 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1856 0x31,0x87,0x5d,0x25,0x30,0x00,0x06,
1857 0x00}},
1858 {{0xa3,0x4f,0x87,0x6e,0x9f,0x24,0xbb,
1859 0x72,0x88,0xdf,0x25,0x30,0x00,0x06,
1860 0x00}},
1861 {{0xa3,0x63,0x87,0x78,0x89,0x24,0xf1,
1862 0xae,0x84,0x57,0x25,0x30,0x00,0x02,
1863 0x01}},
1864 {{0xa3,0x7f,0x87,0x86,0x97,0x24,0xf5,
1865 0x02,0x88,0xff,0x25,0x10,0x00,0x02,
1866 0x01}}
1867};
1868
1869static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11152x768_2_H[] =
1870{
1871 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1872 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1873 0x00}},
1874 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1875 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1876 0x00}},
1877 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1878 0x4a,0x80,0x8f,0x25,0x30,0x00,0x01,
1879 0x00}},
1880 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1881 0x31,0x87,0x5d,0x25,0x30,0x00,0x01,
1882 0x00}},
1883 {{0x4f,0x27,0x93,0x39,0x01,0x24,0xbb,
1884 0x72,0x88,0xdf,0x25,0x30,0x00,0x01,
1885 0x00}},
1886 {{0x4f,0x31,0x93,0x3e,0x06,0x24,0xf1,
1887 0xae,0x84,0x57,0x25,0x30,0x00,0x01,
1888 0x01}},
1889 {{0x4f,0x3f,0x93,0x45,0x0d,0x24,0xf5,
1890 0x02,0x88,0xff,0x25,0x10,0x00,0x01,
1891 0x01}}
1892};
1893
1894static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11280x768_1[] =
1895{
1896 {{0x5b,0x4f,0x9f,0x55,0x19,0xb4,0x1f,
1897 0x9c,0x8e,0x8f,0xb5,0x10,0x00,0x01,
1898 0x00}},
1899 {{0x5b,0x4f,0x9f,0x55,0x19,0x82,0x1f,
1900 0x6a,0x8c,0x5d,0x83,0x30,0x00,0x01,
1901 0x00}},
1902 {{0x5b,0x4f,0x9f,0x55,0x19,0xb4,0x1f,
1903 0x9c,0x8e,0x8f,0xb5,0x10,0x00,0x01,
1904 0x00}},
1905 {{0x5b,0x4f,0x9f,0x55,0x19,0x82,0x1f,
1906 0x6a,0x8c,0x5d,0x83,0x30,0x00,0x01,
1907 0x00}},
1908 {{0x5b,0x4f,0x9f,0x55,0x19,0x04,0x3e,
1909 0xec,0x8e,0xdf,0x05,0x20,0x00,0x01,
1910 0x00}},
1911 {{0x6f,0x63,0x93,0x69,0x8d,0x7c,0xf0,
1912 0x64,0x86,0x57,0x7d,0x20,0x00,0x05,
1913 0x01}},
1914 {{0x8b,0x7f,0x8f,0x85,0x09,0x24,0xf5,
1915 0x0c,0x8e,0xff,0x25,0x30,0x00,0x02,
1916 0x01}},
1917 {{0xab,0x9f,0x8f,0xa5,0x89,0x24,0xf5,
1918 0x0c,0x8e,0xff,0x25,0x30,0x00,0x06,
1919 0x01}},
1920 {{0xab,0x9f,0x8f,0xa5,0x89,0x24,0xf5,
1921 0x0c,0x8e,0xff,0x25,0x30,0x00,0x06,
1922 0x01}}
1923};
1924
1925static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11280x768_1_H[] =
1926{ 1492{
1927 {{0x47,0x27,0x8b,0x2c,0x1a,0x9e,0x1f, 1493 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1928 0x93,0x86,0x8f,0x9f,0x30,0x00,0x05, 1494 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1929 0x00}},
1930 {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
1931 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
1932 0x00}},
1933 {{0x47,0x27,0x8b,0x30,0x1e,0x9e,0x1f,
1934 0x92,0x86,0x8f,0x9f,0x30,0x00,0x05,
1935 0x00}},
1936 {{0x47,0x27,0x8b,0x2c,0x1a,0x6c,0x1f,
1937 0x60,0x84,0x5d,0x6d,0x10,0x00,0x05,
1938 0x00}},
1939 {{0x47,0x27,0x8b,0x2c,0x1a,0xee,0x1f,
1940 0xe2,0x86,0xdf,0xef,0x10,0x00,0x05,
1941 0x00}}, 1495 0x00}},
1942 {{0x51,0x31,0x95,0x36,0x04,0x66,0xf0, 1496 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1943 0x5a,0x8e,0x57,0x67,0x20,0x00,0x01, 1497 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1944 0x01}},
1945 {{0x5f,0x3f,0x83,0x44,0x92,0x0e,0xf5,
1946 0x02,0x86,0xff,0x0f,0x10,0x00,0x01,
1947 0x01}},
1948 {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
1949 0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
1950 0x01}},
1951 {{0x6f,0x4f,0x93,0x54,0x82,0x0e,0x5a,
1952 0x02,0x86,0xff,0x0f,0x09,0x00,0x05,
1953 0x01}}
1954};
1955
1956static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11280x768_2[] =
1957{
1958 {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb,
1959 0x54,0x86,0xdb,0xda,0x00,0x00,0x02,
1960 0x00}}, 1498 0x00}},
1961 {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, 1499 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1962 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x02, 1500 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1963 0x00}}, 1501 0x00}},
1964 {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, 1502 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1965 0x54,0x86,0xdb,0xda,0x00,0x00,0x02, 1503 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1966 0x00}}, 1504 0x00}},
1967 {{0xab,0x60,0x9f,0x80,0x04,0x24,0xbb, 1505 {{0x5f,0x4f,0x82,0x55,0x81,0x0b,0x3e,
1968 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x02, 1506 0xe9,0x8b,0xdf,0x04,0x30,0x00,0x05,
1969 0x00}}, 1507 0x00}},
1970 {{0xab,0x60,0x9f,0x80,0x04,0x24,0xb3, 1508 {{0x7f,0x63,0x83,0x6c,0x1c,0x72,0xf0,
1971 0x7c,0x8e,0x03,0x02,0x10,0x00,0x02, 1509 0x58,0x8c,0x57,0x73,0x20,0x00,0x06,
1972 0x01}},
1973 {{0xab,0x63,0x8f,0x8a,0x8e,0x24,0xf1,
1974 0xb6,0x88,0x57,0x25,0x10,0x00,0x02,
1975 0x01}},
1976 {{0xab,0x7f,0x8f,0x98,0x9c,0x24,0xf5,
1977 0x0a,0x8c,0xff,0x25,0x30,0x00,0x02,
1978 0x01}},
1979 {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
1980 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
1981 0x01}},
1982 {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
1983 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
1984 0x01}} 1510 0x01}}
1985}; 1511};
1986 1512
1987static const SiS_LVDSCRT1DataStruct SiS_LVDSCRT11280x768_2_H[] = 1513static const struct SiS_LVDSCRT1Data SiS_LVDSCRT1640x480_1_H[] =
1988{ 1514{
1989 {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, 1515 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1990 0x54,0x86,0xdb,0xda,0x00,0x00,0x01, 1516 0x9c,0x8e,0x96,0xb9,0x00,0x00,0x00,
1991 0x00}}, 1517 0x00}},
1992 {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, 1518 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1993 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x01, 1519 0x83,0x85,0x63,0xba,0x00,0x00,0x00,
1994 0x00}}, 1520 0x00}},
1995 {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, 1521 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1996 0x54,0x86,0xdb,0xda,0x00,0x00,0x01, 1522 0x9c,0x8e,0x96,0xb9,0x00,0x00,0x00,
1997 0x00}}, 1523 0x00}},
1998 {{0x83,0x38,0x97,0x58,0x9c,0x24,0xbb, 1524 {{0x2d,0x28,0x90,0x2b,0xa0,0xbf,0x1f,
1999 0x3b,0x8d,0xc2,0xc1,0x00,0x00,0x01, 1525 0x83,0x85,0x63,0xba,0x00,0x00,0x00,
2000 0x00}}, 1526 0x00}},
2001 {{0x83,0x38,0x97,0x58,0x9c,0x24,0xb3, 1527 {{0x2d,0x28,0x90,0x2c,0x80,0x0b,0x3e,
2002 0x7c,0x8e,0x03,0x02,0x10,0x00,0x01, 1528 0xe9,0x8b,0xe7,0x04,0x00,0x00,0x00,
2003 0x01}}, 1529 0x00}}
2004 {{0x79,0x31,0x9d,0x58,0x9c,0x24,0xf1,
2005 0xb6,0x88,0x57,0x25,0x10,0x00,0x01,
2006 0x01}},
2007 {{0x6b,0x3f,0x8f,0x58,0x9c,0x24,0xf5,
2008 0x0a,0x8c,0xff,0x25,0x30,0x00,0x01,
2009 0x01}},
2010 {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
2011 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
2012 0x01}},
2013 {{0xab,0x9f,0x8f,0xa8,0x8c,0x24,0xf5,
2014 0x0a,0x8c,0xff,0x25,0x30,0x00,0x06,
2015 0x01}}
2016};
2017
2018/**************************************************************/
2019/* COMMON --------------------------------------------------- */
2020/**************************************************************/
2021
2022#ifdef LINUX_XF86
2023
2024#define SIS_PL_HSYNCP 0x01
2025#define SIS_PL_HSYNCN 0x02
2026#define SIS_PL_VSYNCP 0x04
2027#define SIS_PL_VSYNCN 0x08
2028#define SIS_PL_DVI 0x80
2029
2030typedef struct _SiS_PlasmaModes
2031{
2032 const char *name;
2033 ULONG clock;
2034 USHORT HDisplay, HTotal, HFrontPorch, HSyncWidth;
2035 USHORT VDisplay, VTotal, VFrontPorch, VSyncWidth;
2036 UCHAR SyncFlags;
2037} SiS_PlasmaModes;
2038
2039typedef struct _SiS_PlasmaTables
2040{
2041 USHORT vendor;
2042 UCHAR productnum;
2043 USHORT product[5];
2044 const char *DDCnames[5];
2045 const char *plasmaname;
2046 USHORT maxx,maxy;
2047 USHORT prefx, prefy;
2048 UCHAR modenum;
2049 UCHAR plasmamodes[20]; /* | 0x80 = DVI-capable, | 0x40 = analog */
2050} SiS_PlasmaTables;
2051
2052static const SiS_PlasmaModes SiS_PlasmaMode[] = {
2053 { "640x400", /* 00: IBM 400@70 */
2054 25175,
2055 640, 800, 17, 64,
2056 400, 449, 13, 2,
2057 SIS_PL_HSYNCN | SIS_PL_VSYNCN },
2058 { "640x480", /* 01: VESA 480@72 */
2059 31500,
2060 640, 832, 24, 40,
2061 480, 520, 9, 3,
2062 SIS_PL_HSYNCN | SIS_PL_VSYNCN },
2063 { "800x600", /* 02: VESA 600@72 */
2064 50000,
2065 800, 1040, 56, 120,
2066 600, 666, 37, 6,
2067 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2068 { "864x480", /* 03: Cereb wide 1 */
2069 42526,
2070 864, 1134, 22, 86,
2071 480, 500, 1, 3,
2072 SIS_PL_HSYNCP | SIS_PL_VSYNCN },
2073 { "848x480", /* 04: VESA wide (NEC1) */
2074 33750,
2075 848, 1088, 16, 112,
2076 480, 517, 6, 8,
2077 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2078 { "1024x576", /* 05: VESA wide (NEC2) */
2079 47250,
2080 1024, 1320, 16, 144,
2081 576, 596, 2, 4,
2082 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2083 { "1280x720", /* 06: VESA wide (NEC3) */
2084 76500,
2085 1280, 1696, 48, 176,
2086 720, 750, 4, 8,
2087 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2088 { "1360x765", /* 07: VESA wide (NEC4) */
2089 85500,
2090 1360, 1792, 64, 176,
2091 765, 795, 4, 8,
2092 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2093 { "1024x600", /* 08: CEREB wide 2 */
2094 51200,
2095 1024, 1352, 51, 164,
2096 600, 628, 1, 4,
2097 SIS_PL_HSYNCN | SIS_PL_VSYNCP },
2098 { "1024x768", /* 09: VESA 768@75 */
2099 78750,
2100 1024, 1312, 16, 96,
2101 768, 800, 1, 3,
2102 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2103 { "1152x864", /* 10: VESA 1152x864@75 */
2104 108000,
2105 1152, 1600, 64, 128,
2106 864, 900, 1, 3,
2107 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2108 { "1280x1024", /* 11: VESA 1024@60 */
2109 108000,
2110 1280, 1688, 48, 112,
2111 1024, 1066, 1, 3,
2112 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2113 { "1280x768", /* 12: W_XGA */
2114 81000,
2115 1280, 1688, 48, 112,
2116 768, 802, 3, 6,
2117 SIS_PL_HSYNCP | SIS_PL_VSYNCN },
2118 { "1280x768", /* 13: I/O Data W_XGA@56Hz */
2119 76064,
2120 1280, 1688, 48, 112,
2121 768, 802, 2, 3,
2122 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2123 { "1376x768", /* 14: I/O Wide XGA */
2124 87340,
2125 1376, 1808, 32, 128,
2126 768, 806, 3, 6,
2127 SIS_PL_HSYNCN | SIS_PL_VSYNCP },
2128 { "1280x960", /* 15: VESA 960@60 */
2129 108000,
2130 1280, 1800, 96, 112,
2131 960, 1000, 1, 3,
2132 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2133 { "1400x1050", /* 16: VESA 1050@60Hz */
2134 108000,
2135 1400, 1688, 48, 112,
2136 1050, 1066, 1, 3,
2137 SIS_PL_HSYNCN | SIS_PL_VSYNCN },
2138 { "1360x768", /* 17: VESA wide (NEC4/2) */
2139 85500,
2140 1360, 1792, 64, 112,
2141 765, 795, 3, 6,
2142 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2143 { "800x600", /* 18: VESA 600@56 */
2144 36000,
2145 800, 1024, 24, 2,
2146 600, 625, 1, 2,
2147 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2148 { "1072x600", /* 19: Panasonic 1072x600 (sync?) */
2149 54100,
2150 1072, 1424, 48, 176,
2151 600, 628, 16, 1,
2152 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2153 { "848x480", /* 20: Panasonic 848x480 (sync?) */
2154 33070, /* is 852x480, but we can't use 852 */
2155 848, 1068, 20, 40, /* differs from DDC data, better centered */
2156 480, 516, 3, 5, /* won't work assumingly, because data is % 8 */
2157 SIS_PL_HSYNCN | SIS_PL_VSYNCN },
2158 { "1280x720", /* 21: WIDE720(60) (aka "750p") (Panasonic) */
2159 74300,
2160 1280, 1650,110, 40,
2161 720, 750, 5, 5,
2162 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2163 { "1280x768", /* 22: 1280x768@56.5 (Panasonic) */
2164 76200, /* (According to manual not supported for HDMI; but works) */
2165 1280, 1680, 16, 24,
2166 768, 802, 2, 5,
2167 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2168 { "1280x720@50", /* 23: WIDE720(50) (aka "750p") (Panasonic) */
2169 74300, /* Panasonic states 45.0kHz. Not possible. This one works (with some overscan) */
2170 1280, 1980,400, 80,
2171 720, 750, 1, 2,
2172 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2173 { "720x480", /* 24: 720x480 (aka "525p" and "480p") (Panasonic) */
2174 27000,
2175 720, 856, 40, 32,
2176 480, 525, 1, 3,
2177 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2178 { "720x576", /* 25: 720x576 (aka "625p"and "576p") (Panasonic) */
2179 27500,
2180 720, 864, 16, 64,
2181 576, 625, 5, 6,
2182 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2183 { "1280x720@50", /* 26: WIDE720(50) (aka "750p") (Generic) */
2184 74300,
2185 1280, 1980,400, 80,
2186 720, 750, 5, 5,
2187 SIS_PL_HSYNCP | SIS_PL_VSYNCP },
2188}; 1530};
2189 1531
2190/* 1532BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr);
219127.00 720 755 791 858 480 480 484 525 1533#ifdef SIS_XORG_XF86
219227.50 720 732 795 864 576 581 587 625 1534unsigned short SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
2193*/ 1535 int Depth, BOOLEAN FSTN, int LCDwith, int LCDheight);
2194
2195static const SiS_PlasmaTables SiS_PlasmaTable[] = {
2196#if 0 /* Product IDs missing */
2197 { 0x38a3, 4,
2198 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2199 { "", "", "", "", "" },
2200 "NEC PlasmaSync 42VP4/42VP4D/42VP4G/42VP4DG",
2201 0, 0,
2202 0, 0,
2203 11, /* All DVI, except 0, 7, 13 */
2204 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,10|0xc0,11|0xc0,13|0x40,14|0xc0,
2205 17|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2206 },
2207#endif 1536#endif
2208#if 0 /* Product IDs missing */ 1537unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
2209 { 0x38a3, 3, 1538 int VDisplay, int Depth, BOOLEAN FSTN,
2210 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 1539 unsigned short CustomT, int LCDwith, int LCDheight,
2211 { "", "", "", "", "" }, 1540 unsigned int VBFlags2);
2212 "NEC PlasmaSync 42PD1/50PD1/50PD2", 1541unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
2213 0, 0, 1542 int VDisplay, int Depth, unsigned int VBFlags2);
2214 0, 0, 1543unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
2215 5, /* DVI entirely unknown */ 1544 int VDisplay, int Depth, unsigned int VBFlags2);
2216 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 9|0xc0, 0 , 0 , 0 , 0 , 0 , 1545
2217 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 1546void SiS_SetReg(SISIOADDRESS port, unsigned short index, unsigned short data);
2218 }, 1547void SiS_SetRegByte(SISIOADDRESS port, unsigned short data);
2219 { 0x38a3, 1, 1548void SiS_SetRegShort(SISIOADDRESS port, unsigned short data);
2220 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 1549void SiS_SetRegLong(SISIOADDRESS port, unsigned int data);
2221 { "", "", "", "", "" }, 1550unsigned char SiS_GetReg(SISIOADDRESS port, unsigned short index);
2222 "NEC PlasmaSync 42PD3", 1551unsigned char SiS_GetRegByte(SISIOADDRESS port);
2223 0, 0, 1552unsigned short SiS_GetRegShort(SISIOADDRESS port);
2224 0, 0, 1553unsigned int SiS_GetRegLong(SISIOADDRESS port);
2225 10, /* DVI entirely unknown */ 1554void SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND,
2226 { 0|0x40, 1|0xc0, 2|0xc0, 3|0xc0, 4|0xc0, 5|0xc0, 6|0xc0, 7|0x40, 8|0xc0, 9|0xc0, 1555 unsigned short DataOR);
2227 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 } 1556void SiS_SetRegAND(SISIOADDRESS Port,unsigned short Index, unsigned short DataAND);
2228 }, 1557void SiS_SetRegOR(SISIOADDRESS Port,unsigned short Index, unsigned short DataOR);
2229 { 0x38a3, 2, 1558
2230 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }, 1559void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
2231 { "", "", "", "", "" }, 1560void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
2232 "NEC PlasmaSync 42VM3/61XM1", 1561void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
2233 0, 0, 1562#ifndef SIS_LINUX_KERNEL
2234 0, 0, 1563void SiSSetLVDSetc(struct SiS_Private *SiS_Pr);
2235 11, /* DVI entirely unknown */
2236 { 0|0x40, 1|0xc0, 2|0xc0, 3|0xc0, 4|0xc0, 5|0xc0, 6|0xc0, 8|0xc0, 9|0xc0,11|0xc0,
2237 17|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2238 },
2239 { 0x38a3, 2,
2240 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2241 { "", "", "", "", "" },
2242 "NEC PlasmaSync 42MP1/42MP2",
2243 0, 0,
2244 0, 0,
2245 6, /* DVI entirely unknown */
2246 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 9|0xc0,11|0xc0, 0 , 0 , 0 , 0 ,
2247 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2248 },
2249 { 0x38a3, 1,
2250 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2251 { "", "", "", "", "" },
2252 "NEC PlasmaSync 50MP1",
2253 0, 0,
2254 0, 0,
2255 10, /* DVI entirely unknown */
2256 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,10|0xc0,11|0xc0,13|0x40,14|0xc0,
2257 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2258 },
2259#endif 1564#endif
2260 { 0x38a3, 4, 1565void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
2261 { 0xa482, 0xa483, 0x0000, 0x0000, 0x0000 }, 1566void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
2262 { "PX-42VM", "", "", "", "" }, 1567unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2263 "NEC PlasmaSync 42MP3/42MP4/50MP2/61MP1", 1568 unsigned short ModeIdIndex);
2264 0, 0, 1569BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
2265 0, 0, 1570#ifndef SIS_LINUX_KERNEL
2266 11, /* All DVI except 0, 7, 13, 17 */ 1571void SiS_GetVBType(struct SiS_Private *SiS_Pr);
2267 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,10|0xc0,11|0xc0,13|0x40,14|0xc0,
2268 17|0x40, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2269 },
2270#if 0 /* Product IDs missing */
2271 { 0x38a3, 1,
2272 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2273 { "", "", "", "", "" },
2274 "NEC PlasmaSync 3300W",
2275 0, 0,
2276 0, 0,
2277 3,
2278 { 0|0x40, 1|0xc0,18|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
2279 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2280 },
2281 { 0x38a3, 1,
2282 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2283 { "", "", "", "", "" },
2284 "NEC PlasmaSync 4200W",
2285 4, /* DVI entirely unknown */
2286 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 0 , 0 , 0 , 0 , 0 , 0 ,
2287 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2288 },
2289 { 0x38a3, 1,
2290 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2291 { "", "", "", "", "" },
2292 "NEC PlasmaSync 4210W",
2293 0, 0,
2294 0, 0,
2295 6, /* DVI entirely unknown */
2296 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 9|0xc0,11|0xc0, 0 , 0 , 0 , 0 ,
2297 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2298 },
2299 { 0x38a3, 1,
2300 { 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 },
2301 { "", "", "", "", "" },
2302 "NEC PlasmaSync 5000W",
2303 0, 0,
2304 0, 0,
2305 7, /* DVI entirely unknown */
2306 { 0|0x40, 1|0xc0, 2|0xc0, 4|0xc0, 7|0x40, 9|0xc0,11|0xc0, 0 , 0 , 0 ,
2307 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2308 },
2309#endif
2310 { 0x412f, 2,
2311 { 0x000c, 0x000b, 0x0000, 0x0000, 0x0000 },
2312 { "", "", "", "", "" },
2313 "Pioneer 503CMX/PDA-5002",
2314 0, 0,
2315 0, 0,
2316 6, /* DVI unknown */
2317 { 1|0xc0, 2|0xc0, 9|0xc0,11|0xc0,12|0xc0,15|0xc0, 0 , 0 , 0 , 0 ,
2318 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2319 },
2320 { 0x34a9, 1,
2321 { 0xa00e, 0x0000, 0x0000, 0x0000, 0x0000 },
2322 { "", "", "", "", "" },
2323 "Panasonic TH-42",
2324 0, 0,
2325 0, 0,
2326 5, /* No DVI output */
2327 { 1|0x40, 2|0x40, 4|0x40, 9|0x40,15|0x40, 0 , 0 , 0 , 0 , 0 ,
2328 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2329 },
2330 { 0x34a9, 1,
2331 { 0xa005, 0x0000, 0x0000, 0x0000, 0x0000 },
2332 { "TH-42PW*4", "", "", "", "" },
2333 "Panasonic TH-42PW5",
2334 0, 0,
2335 0, 0,
2336 1, /* No special modes otherwise; no DVI. */
2337 {20|0x40,19|0x40, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
2338 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2339 },
2340 { 0x4c2e, 1,
2341 { 0x9b05, 0x0000, 0x0000, 0x0000, 0x0000 },
2342 { "PLV-Z2", "", "", "", "" },
2343 "Sanyo PLV-Z2 (non HDCP-mode)", /* HDCP mode would be id 9b06, but not needed */
2344 1280, 768, /* as it then advertises correct size */
2345 1280, 720,
2346 1, /* 1280x720, no special modes otherwise */
2347 {21|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
2348 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2349 },
2350 { 0x34a9, 1,
2351 { 0xd034, 0x0000, 0x0000, 0x0000, 0x0000 },
2352 { "AE500U (DVI-D)", "", "", "", "" },
2353 "Panasonic AE500U",
2354 1280, 768,
2355 1280, 720,
2356 1, /* 1280x720, no special modes otherwise */
2357 {21|0xc0, 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 ,
2358 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2359 },
2360 { 0x34a9, 1,
2361 { 0xd043, 0x0000, 0x0000, 0x0000, 0x0000 },
2362 { "AE700U (HDMI)", "", "", "", "" },
2363 "Panasonic AE700U",
2364 1360, 768,
2365 1280, 720,
2366 6, /* 1280x720/60, 1280x720/50, 1280x768@56(digital/analog), 720x480, 720x576 */
2367 {21|0xc0,23|0xc0,22|0x80,13|0x40,24|0x80,25|0x80, 0 , 0 , 0 , 0 ,
2368 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 , 0 }
2369 },
2370 { 0x0000 }
2371};
2372#endif 1572#endif
2373 1573
2374#ifdef LINUX_XF86 1574BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
2375USHORT SiS_GetModeID(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, 1575 unsigned short *ModeIdIndex);
2376 int Depth, BOOLEAN FSTN, int LCDwith, int LCDheight); 1576unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1577 unsigned short ModeIdIndex);
1578unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
1579unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
1580unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1581 unsigned short ModeIdIndex);
1582unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr,unsigned short ModeNo,
1583 unsigned short ModeIdIndex, unsigned short RRTI);
1584#ifdef SIS300
1585void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *idx1,
1586 unsigned short *idx2);
1587unsigned short SiS_GetFIFOThresholdB300(unsigned short idx1, unsigned short idx2);
1588unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
2377#endif 1589#endif
2378USHORT SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth, BOOLEAN FSTN, 1590void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
2379 USHORT CustomT, int LCDwith, int LCDheight); 1591#ifdef SIS_XORG_XF86
2380USHORT SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth); 1592BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn, unsigned short ModeNo,
2381USHORT SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth); 1593 BOOLEAN dosetpitch);
2382 1594BOOLEAN SiSBIOSSetMode(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
2383void SiS_SetReg(SISIOADDRESS port, USHORT index, USHORT data); 1595 DisplayModePtr mode, BOOLEAN IsCustom);
2384void SiS_SetRegByte(SISIOADDRESS port, USHORT data); 1596BOOLEAN SiSBIOSSetModeCRT2(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
2385void SiS_SetRegShort(SISIOADDRESS port, USHORT data); 1597 DisplayModePtr mode, BOOLEAN IsCustom);
2386void SiS_SetRegLong(SISIOADDRESS port, ULONG data); 1598BOOLEAN SiSBIOSSetModeCRT1(struct SiS_Private *SiS_Pr, ScrnInfoPtr pScrn,
2387UCHAR SiS_GetReg(SISIOADDRESS port, USHORT index); 1599 DisplayModePtr mode, BOOLEAN IsCustom);
2388UCHAR SiS_GetRegByte(SISIOADDRESS port); 1600#endif
2389USHORT SiS_GetRegShort(SISIOADDRESS port); 1601#ifdef SIS_LINUX_KERNEL
2390ULONG SiS_GetRegLong(SISIOADDRESS port); 1602BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
2391void SiS_SetRegANDOR(SISIOADDRESS Port, USHORT Index, USHORT DataAND, USHORT DataOR); 1603#endif
2392void SiS_SetRegAND(SISIOADDRESS Port,USHORT Index, USHORT DataAND); 1604void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
2393void SiS_SetRegOR(SISIOADDRESS Port,USHORT Index, USHORT DataOR); 1605void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2394void SiS_DisplayOn(SiS_Private *SiS_Pr); 1606 unsigned short ModeIdIndex);
2395void SiS_DisplayOff(SiS_Private *SiS_Pr); 1607#ifdef SIS_XORG_XF86
2396void SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); 1608void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
2397BOOLEAN SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 1609 int yres, DisplayModePtr current);
2398void SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable); 1610#endif
2399void SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable); 1611#ifdef SIS_LINUX_KERNEL
2400BOOLEAN SiS_SearchModeID(SiS_Private *SiS_Pr, USHORT *ModeNo, USHORT *ModeIdIndex); 1612void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
2401UCHAR SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex); 1613 int yres, struct fb_var_screeninfo *var, BOOLEAN writeres);
2402USHORT SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
2403USHORT SiS_GetOffset(SiS_Private *SiS_Pr,USHORT ModeNo, USHORT ModeIdIndex,
2404 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo);
2405void SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo, USHORT ModeIdIndex);
2406void SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
2407
2408#ifdef LINUX_XF86
2409BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,ScrnInfoPtr pScrn,USHORT ModeNo, BOOLEAN dosetpitch);
2410BOOLEAN SiSBIOSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
2411 DisplayModePtr mode, BOOLEAN IsCustom);
2412BOOLEAN SiSBIOSSetModeCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
2413 DisplayModePtr mode, BOOLEAN IsCustom);
2414BOOLEAN SiSBIOSSetModeCRT1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, ScrnInfoPtr pScrn,
2415 DisplayModePtr mode, BOOLEAN IsCustom);
2416int SiSTranslateToVESA(ScrnInfoPtr pScrn, int modenumber);
2417int SiSTranslateToOldMode(int modenumber);
2418BOOLEAN SiS_GetPanelID(SiS_Private *SiS_Pr, PSIS_HW_INFO);
2419USHORT SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode, int VBFlags);
2420DisplayModePtr SiSBuildBuiltInModeList(ScrnInfoPtr pScrn, BOOLEAN includelcdmodes, BOOLEAN isfordvi);
2421int SiS_FindPanelFromDB(SISPtr pSiS, USHORT panelvendor, USHORT panelproduct, int *maxx, int *maxy, int *prefx, int *prefy);
2422void SiS_MakeClockRegs(ScrnInfoPtr pScrn, int clock, UCHAR *p2b, UCHAR *p2c);
2423#else
2424BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,USHORT ModeNo);
2425#endif 1614#endif
2426 1615
2427#ifdef LINUX_KERNEL 1616/* From init301.c: */
2428int sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1617extern void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2429 UCHAR modeno, UCHAR rateindex); 1618 unsigned short ModeIdIndex, int chkcrt2mode);
2430int sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1619extern void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2431 UCHAR modeno, UCHAR rateindex, 1620 unsigned short ModeIdIndex);
2432 struct fb_var_screeninfo *var); 1621extern void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
2433BOOLEAN sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 1622extern void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
2434 UCHAR modeno, int *htotal, int *vtotal, UCHAR rateindex); 1623 unsigned short ModeIdIndex);
1624extern void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
1625extern void SiS_DisableBridge(struct SiS_Private *);
1626extern BOOLEAN SiS_SetCRT2Group(struct SiS_Private *, unsigned short);
1627extern unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1628 unsigned short ModeIdIndex);
1629extern void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
1630extern unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1631 unsigned short ModeIdIndex);
1632extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
1633extern unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
1634 unsigned short ModeIdIndex, unsigned short RRTI);
1635extern BOOLEAN SiS_IsVAMode(struct SiS_Private *);
1636extern BOOLEAN SiS_IsDualEdge(struct SiS_Private *);
1637
1638#ifdef SIS_XORG_XF86
1639/* From other modules: */
1640extern unsigned short SiS_CheckBuildCustomMode(ScrnInfoPtr pScrn, DisplayModePtr mode,
1641 unsigned int VBFlags);
1642extern unsigned char SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, unsigned short offset,
1643 unsigned char value);
1644extern unsigned char SiS_GetSetModeID(ScrnInfoPtr pScrn, unsigned char id);
1645extern unsigned short SiS_GetModeNumber(ScrnInfoPtr pScrn, DisplayModePtr mode,
1646 unsigned int VBFlags);
2435#endif 1647#endif
2436 1648
2437/* init301.c: */ 1649#ifdef SIS_LINUX_KERNEL
2438extern void SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 1650#ifdef SIS300
2439 PSIS_HW_INFO HwInfo, int chkcrt2mode); 1651extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
2440extern void SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 1652extern void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg,
2441 PSIS_HW_INFO HwInfo); 1653 unsigned int val);
2442extern void SiS_SetYPbPr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 1654#endif
2443extern void SiS_SetTVMode(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo); 1655#ifdef SIS315H
2444extern void SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 1656extern void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg,
2445extern void SiS_DisableBridge(SiS_Private *, PSIS_HW_INFO); 1657 unsigned char val);
2446extern BOOLEAN SiS_SetCRT2Group(SiS_Private *, PSIS_HW_INFO, USHORT); 1658extern unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
2447extern USHORT SiS_GetRatePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 1659#endif
2448 PSIS_HW_INFO HwInfo);
2449extern void SiS_WaitRetrace1(SiS_Private *SiS_Pr);
2450extern USHORT SiS_GetResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
2451extern USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax);
2452extern USHORT SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2453 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo);
2454extern BOOLEAN SiS_IsVAMode(SiS_Private *, PSIS_HW_INFO);
2455extern BOOLEAN SiS_IsDualEdge(SiS_Private *, PSIS_HW_INFO);
2456
2457#ifdef LINUX_XF86
2458/* From other sis driver modules: */
2459extern int SiS_compute_vclk(int Clock, int *out_n, int *out_dn, int *out_div,
2460 int *out_sbit, int *out_scale);
2461extern void SiSCalcClock(ScrnInfoPtr pScrn, int clock, int max_VLD, unsigned int *vclk);
2462
2463extern UCHAR SiS_GetSetBIOSScratch(ScrnInfoPtr pScrn, USHORT offset, UCHAR value);
2464extern UCHAR SiS_GetSetModeID(ScrnInfoPtr pScrn, UCHAR id);
2465extern USHORT SiS_GetModeNumber(ScrnInfoPtr pScrn, DisplayModePtr mode, ULONG VBFlags);
2466#endif 1660#endif
2467 1661
2468#endif 1662#endif
diff --git a/drivers/video/sis/init301.c b/drivers/video/sis/init301.c
index 274dacd54bb8..2d88f908170a 100644
--- a/drivers/video/sis/init301.c
+++ b/drivers/video/sis/init301.c
@@ -2,11 +2,12 @@
2/* $XdotOrg$ */ 2/* $XdotOrg$ */
3/* 3/*
4 * Mode initializing code (CRT2 section) 4 * Mode initializing code (CRT2 section)
5 * for SiS 300/305/540/630/730 and 5 * for SiS 300/305/540/630/730,
6 * SiS 315/550/650/M650/651/661FX/M661xX/740/741(GX)/M741/330/660/M660/760/M760 6 * SiS 315/550/[M]650/651/[M]661[FGM]X/[M]74x[GX]/330/[M]76x[GX],
7 * (Universal module for Linux kernel framebuffer and XFree86/X.org 4.x) 7 * XGI V3XT/V5/V8, Z7
8 * (Universal module for Linux kernel framebuffer and X.org/XFree86 4.x)
8 * 9 *
9 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 10 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
10 * 11 *
11 * If distributed as part of the Linux kernel, the following license terms 12 * If distributed as part of the Linux kernel, the following license terms
12 * apply: 13 * apply:
@@ -38,7 +39,7 @@
38 * * 3) The name of the author may not be used to endorse or promote products 39 * * 3) The name of the author may not be used to endorse or promote products
39 * * derived from this software without specific prior written permission. 40 * * derived from this software without specific prior written permission.
40 * * 41 * *
41 * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESSED OR 42 * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
42 * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 43 * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
43 * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 44 * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
44 * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 45 * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
@@ -54,20 +55,20 @@
54 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc. 55 * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
55 * Used by permission. 56 * Used by permission.
56 * 57 *
57 * TW says: This code looks awful, I know. But please don't do anything about
58 * this otherwise debugging will be hell.
59 * The code is extremely fragile as regards the different chipsets, different
60 * video bridges and combinations thereof. If anything is changed, extreme
61 * care has to be taken that that change doesn't break it for other chipsets,
62 * bridges or combinations thereof.
63 * All comments in this file are by me, regardless if marked TW or not.
64 *
65 */ 58 */
66 59
60#ifdef HAVE_CONFIG_H
61#include "config.h"
62#endif
63
67#if 1 64#if 1
68#define SET_EMI /* 302LV/ELV: Set EMI values */ 65#define SET_EMI /* 302LV/ELV: Set EMI values */
69#endif 66#endif
70 67
68#if 1
69#define SET_PWD /* 301/302LV: Set PWD */
70#endif
71
71#define COMPAL_HACK /* Needed for Compal 1400x1050 (EMI) */ 72#define COMPAL_HACK /* Needed for Compal 1400x1050 (EMI) */
72#define COMPAQ_HACK /* Needed for Inventec/Compaq 1280x1024 (EMI) */ 73#define COMPAQ_HACK /* Needed for Inventec/Compaq 1280x1024 (EMI) */
73#define ASUS_HACK /* Needed for Asus A2H 1024x768 (EMI) */ 74#define ASUS_HACK /* Needed for Asus A2H 1024x768 (EMI) */
@@ -85,26 +86,35 @@
85#define SiS_I2CDELAY 1000 86#define SiS_I2CDELAY 1000
86#define SiS_I2CDELAYSHORT 150 87#define SiS_I2CDELAYSHORT 150
87 88
88static USHORT SiS_GetBIOSLCDResInfo(SiS_Private *SiS_Pr); 89static unsigned short SiS_GetBIOSLCDResInfo(struct SiS_Private *SiS_Pr);
89static void SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx); 90#ifdef SIS_LINUX_KERNEL
91static void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
92#endif
90 93
91/*********************************************/ 94/*********************************************/
92/* HELPER: Lock/Unlock CRT2 */ 95/* HELPER: Lock/Unlock CRT2 */
93/*********************************************/ 96/*********************************************/
94 97
95void 98void
96SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 99SiS_UnLockCRT2(struct SiS_Private *SiS_Pr)
97{ 100{
98 if(HwInfo->jChipType >= SIS_315H) 101 if(SiS_Pr->ChipType == XGI_20)
102 return;
103 else if(SiS_Pr->ChipType >= SIS_315H)
99 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2f,0x01); 104 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2f,0x01);
100 else 105 else
101 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24,0x01); 106 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x24,0x01);
102} 107}
103 108
104static void 109#ifdef SIS_LINUX_KERNEL
105SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 110static
111#endif
112void
113SiS_LockCRT2(struct SiS_Private *SiS_Pr)
106{ 114{
107 if(HwInfo->jChipType >= SIS_315H) 115 if(SiS_Pr->ChipType == XGI_20)
116 return;
117 else if(SiS_Pr->ChipType >= SIS_315H)
108 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2F,0xFE); 118 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2F,0xFE);
109 else 119 else
110 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x24,0xFE); 120 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x24,0xFE);
@@ -115,9 +125,9 @@ SiS_LockCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
115/*********************************************/ 125/*********************************************/
116 126
117static void 127static void
118SiS_SetRegSR11ANDOR(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT DataAND, USHORT DataOR) 128SiS_SetRegSR11ANDOR(struct SiS_Private *SiS_Pr, unsigned short DataAND, unsigned short DataOR)
119{ 129{
120 if(HwInfo->jChipType >= SIS_661) { 130 if(SiS_Pr->ChipType >= SIS_661) {
121 DataAND &= 0x0f; 131 DataAND &= 0x0f;
122 DataOR &= 0x0f; 132 DataOR &= 0x0f;
123 } 133 }
@@ -129,12 +139,12 @@ SiS_SetRegSR11ANDOR(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT DataAND, US
129/*********************************************/ 139/*********************************************/
130 140
131#ifdef SIS315H 141#ifdef SIS315H
132static UCHAR * 142static unsigned char *
133GetLCDStructPtr661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 143GetLCDStructPtr661(struct SiS_Private *SiS_Pr)
134{ 144{
135 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 145 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
136 UCHAR *myptr = NULL; 146 unsigned char *myptr = NULL;
137 USHORT romindex = 0, reg = 0, idx = 0; 147 unsigned short romindex = 0, reg = 0, idx = 0;
138 148
139 /* Use the BIOS tables only for LVDS panels; TMDS is unreliable 149 /* Use the BIOS tables only for LVDS panels; TMDS is unreliable
140 * due to the variaty of panels the BIOS doesn't know about. 150 * due to the variaty of panels the BIOS doesn't know about.
@@ -144,15 +154,15 @@ GetLCDStructPtr661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
144 */ 154 */
145 155
146 if((SiS_Pr->SiS_ROMNew) && 156 if((SiS_Pr->SiS_ROMNew) &&
147 ((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) || (!SiS_Pr->PanelSelfDetected))) { 157 ((SiS_Pr->SiS_VBType & VB_SISLVDS) || (!SiS_Pr->PanelSelfDetected))) {
148 158
149 if(HwInfo->jChipType < SIS_661) reg = 0x3c; 159 if(SiS_Pr->ChipType < SIS_661) reg = 0x3c;
150 else reg = 0x7d; 160 else reg = 0x7d;
151 161
152 idx = (SiS_GetReg(SiS_Pr->SiS_P3d4,reg) & 0x1f) * 26; 162 idx = (SiS_GetReg(SiS_Pr->SiS_P3d4,reg) & 0x1f) * 26;
153 163
154 if(idx < (8*26)) { 164 if(idx < (8*26)) {
155 myptr = (UCHAR *)&SiS_LCDStruct661[idx]; 165 myptr = (unsigned char *)&SiS_LCDStruct661[idx];
156 } 166 }
157 romindex = SISGETROMW(0x100); 167 romindex = SISGETROMW(0x100);
158 if(romindex) { 168 if(romindex) {
@@ -163,11 +173,11 @@ GetLCDStructPtr661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
163 return myptr; 173 return myptr;
164} 174}
165 175
166static USHORT 176static unsigned short
167GetLCDStructPtr661_2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 177GetLCDStructPtr661_2(struct SiS_Private *SiS_Pr)
168{ 178{
169 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 179 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
170 USHORT romptr = 0; 180 unsigned short romptr = 0;
171 181
172 /* Use the BIOS tables only for LVDS panels; TMDS is unreliable 182 /* Use the BIOS tables only for LVDS panels; TMDS is unreliable
173 * due to the variaty of panels the BIOS doesn't know about. 183 * due to the variaty of panels the BIOS doesn't know about.
@@ -177,12 +187,12 @@ GetLCDStructPtr661_2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
177 */ 187 */
178 188
179 if((SiS_Pr->SiS_ROMNew) && 189 if((SiS_Pr->SiS_ROMNew) &&
180 ((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) || (!SiS_Pr->PanelSelfDetected))) { 190 ((SiS_Pr->SiS_VBType & VB_SISLVDS) || (!SiS_Pr->PanelSelfDetected))) {
181 romptr = SISGETROMW(0x102); 191 romptr = SISGETROMW(0x102);
182 romptr += ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) * SiS_Pr->SiS661LCD2TableSize); 192 romptr += ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) * SiS_Pr->SiS661LCD2TableSize);
183 } 193 }
184 194
185 return(romptr); 195 return romptr;
186} 196}
187#endif 197#endif
188 198
@@ -191,186 +201,187 @@ GetLCDStructPtr661_2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
191/*********************************************/ 201/*********************************************/
192 202
193static BOOLEAN 203static BOOLEAN
194SiS_AdjustCRT2Rate(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 204SiS_AdjustCRT2Rate(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
195 USHORT RRTI, USHORT *i, PSIS_HW_INFO HwInfo) 205 unsigned short RRTI, unsigned short *i)
196{ 206{
197 USHORT checkmask=0,modeid,infoflag; 207 unsigned short checkmask=0, modeid, infoflag;
198 208
199 modeid = SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID; 209 modeid = SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID;
200 210
201 if(SiS_Pr->SiS_VBType & VB_SISVB) { 211 if(SiS_Pr->SiS_VBType & VB_SISVB) {
202 212
203 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { 213 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) {
204 214
205 checkmask |= SupportRAMDAC2; 215 checkmask |= SupportRAMDAC2;
206 if(HwInfo->jChipType >= SIS_315H) { 216 if(SiS_Pr->ChipType >= SIS_315H) {
207 checkmask |= SupportRAMDAC2_135; 217 checkmask |= SupportRAMDAC2_135;
208 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 218 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
209 checkmask |= SupportRAMDAC2_162; 219 checkmask |= SupportRAMDAC2_162;
210 if(SiS_Pr->SiS_VBType & VB_SIS301C) { 220 if(SiS_Pr->SiS_VBType & VB_SISRAMDAC202) {
211 checkmask |= SupportRAMDAC2_202; 221 checkmask |= SupportRAMDAC2_202;
212 } 222 }
213 } 223 }
214 } 224 }
215 225
216 } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 226 } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
217 227
218 checkmask |= SupportLCD; 228 checkmask |= SupportLCD;
219 if(HwInfo->jChipType >= SIS_315H) { 229 if(SiS_Pr->ChipType >= SIS_315H) {
220 if(SiS_Pr->SiS_VBType & VB_SISVB) { 230 if(SiS_Pr->SiS_VBType & VB_SISVB) {
221 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (SiS_Pr->SiS_LCDInfo & LCDPass11)) { 231 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (SiS_Pr->SiS_LCDInfo & LCDPass11)) {
222 if(modeid == 0x2e) checkmask |= Support64048060Hz; 232 if(modeid == 0x2e) checkmask |= Support64048060Hz;
223 } 233 }
224 } 234 }
225 } 235 }
226 236
227 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 237 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
228 238
229 checkmask |= SupportHiVision; 239 checkmask |= SupportHiVision;
230 240
231 } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToYPbPr525750|SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) { 241 } else if(SiS_Pr->SiS_VBInfo & (SetCRT2ToYPbPr525750|SetCRT2ToAVIDEO|SetCRT2ToSVIDEO|SetCRT2ToSCART)) {
232 242
233 checkmask |= SupportTV; 243 checkmask |= SupportTV;
234 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 244 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
235 checkmask |= SupportTV1024; 245 checkmask |= SupportTV1024;
236 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 246 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
237 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) { 247 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) {
238 checkmask |= SupportYPbPr750p; 248 checkmask |= SupportYPbPr750p;
239 } 249 }
240 } 250 }
241 } 251 }
242 252
243 } 253 }
244 254
245 } else { /* LVDS */ 255 } else { /* LVDS */
246 256
247 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 257 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
248 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 258 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
249 checkmask |= SupportCHTV; 259 checkmask |= SupportCHTV;
250 } 260 }
251 } 261 }
252 262
253 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 263 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
254 checkmask |= SupportLCD; 264 checkmask |= SupportLCD;
255 } 265 }
256 266
257 } 267 }
258 268
259 /* Look backwards in table for matching CRT2 mode */ 269 /* Look backwards in table for matching CRT2 mode */
260 for(; SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID == modeid; (*i)--) { 270 for(; SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID == modeid; (*i)--) {
261 infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; 271 infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag;
262 if(infoflag & checkmask) return TRUE; 272 if(infoflag & checkmask) return TRUE;
263 if((*i) == 0) break; 273 if((*i) == 0) break;
264 } 274 }
265 275
266 /* Look through the whole mode-section of the table from the beginning 276 /* Look through the whole mode-section of the table from the beginning
267 * for a matching CRT2 mode if no mode was found yet. 277 * for a matching CRT2 mode if no mode was found yet.
268 */ 278 */
269 for((*i) = 0; ; (*i)++) { 279 for((*i) = 0; ; (*i)++) {
270 if(SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID != modeid) break; 280 if(SiS_Pr->SiS_RefIndex[RRTI + (*i)].ModeID != modeid) break;
271 infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag; 281 infoflag = SiS_Pr->SiS_RefIndex[RRTI + (*i)].Ext_InfoFlag;
272 if(infoflag & checkmask) return TRUE; 282 if(infoflag & checkmask) return TRUE;
273 } 283 }
274 return FALSE; 284 return FALSE;
275} 285}
276 286
277/*********************************************/ 287/*********************************************/
278/* Get rate index */ 288/* Get rate index */
279/*********************************************/ 289/*********************************************/
280 290
281USHORT 291unsigned short
282SiS_GetRatePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 292SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
283 PSIS_HW_INFO HwInfo) 293{
284{ 294 unsigned short RRTI,i,backup_i;
285 SHORT LCDRefreshIndex[] = { 0x00, 0x00, 0x01, 0x01, 295 unsigned short modeflag,index,temp,backupindex;
286 0x01, 0x01, 0x01, 0x01, 296 static const unsigned short LCDRefreshIndex[] = {
287 0x01, 0x01, 0x01, 0x01, 297 0x00, 0x00, 0x01, 0x01,
288 0x01, 0x01, 0x01, 0x01, 298 0x01, 0x01, 0x01, 0x01,
289 0x00, 0x00, 0x00, 0x00 }; 299 0x01, 0x01, 0x01, 0x01,
290 USHORT RRTI,i,backup_i; 300 0x01, 0x01, 0x01, 0x01,
291 USHORT modeflag,index,temp,backupindex; 301 0x00, 0x00, 0x00, 0x00
302 };
292 303
293 /* Do NOT check for UseCustomMode here, will skrew up FIFO */ 304 /* Do NOT check for UseCustomMode here, will skrew up FIFO */
294 if(ModeNo == 0xfe) return 0; 305 if(ModeNo == 0xfe) return 0;
295 306
296 if(ModeNo <= 0x13) { 307 if(ModeNo <= 0x13) {
297 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 308 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
298 } else { 309 } else {
299 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 310 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
300 } 311 }
301 312
302 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 313 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
303 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 314 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
304 if(modeflag & HalfDCLK) return 0; 315 if(modeflag & HalfDCLK) return 0;
305 } 316 }
306 } 317 }
307 318
308 if(ModeNo < 0x14) return 0xFFFF; 319 if(ModeNo < 0x14) return 0xFFFF;
309 320
310 index = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x33) >> SiS_Pr->SiS_SelectCRT2Rate) & 0x0F; 321 index = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x33) >> SiS_Pr->SiS_SelectCRT2Rate) & 0x0F;
311 backupindex = index; 322 backupindex = index;
312 323
313 if(index > 0) index--; 324 if(index > 0) index--;
314 325
315 if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) { 326 if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {
316 if(SiS_Pr->SiS_VBType & VB_SISVB) { 327 if(SiS_Pr->SiS_VBType & VB_SISVB) {
317 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 328 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
318 if(SiS_Pr->SiS_VBType & VB_NoLCD) index = 0; 329 if(SiS_Pr->SiS_VBType & VB_NoLCD) index = 0;
319 else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index = backupindex = 0; 330 else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index = backupindex = 0;
320 } 331 }
321 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 332 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
322 if(!(SiS_Pr->SiS_VBType & VB_NoLCD)) { 333 if(!(SiS_Pr->SiS_VBType & VB_NoLCD)) {
323 temp = LCDRefreshIndex[SiS_GetBIOSLCDResInfo(SiS_Pr)]; 334 temp = LCDRefreshIndex[SiS_GetBIOSLCDResInfo(SiS_Pr)];
324 if(index > temp) index = temp; 335 if(index > temp) index = temp;
325 } 336 }
326 } 337 }
327 } else { 338 } else {
328 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) index = 0; 339 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) index = 0;
329 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 340 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
330 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) index = 0; 341 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) index = 0;
331 } 342 }
332 } 343 }
333 } 344 }
334 345
335 RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex; 346 RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
336 ModeNo = SiS_Pr->SiS_RefIndex[RRTI].ModeID; 347 ModeNo = SiS_Pr->SiS_RefIndex[RRTI].ModeID;
337 348
338 if(HwInfo->jChipType >= SIS_315H) { 349 if(SiS_Pr->ChipType >= SIS_315H) {
339 if(!(SiS_Pr->SiS_VBInfo & DriverMode)) { 350 if(!(SiS_Pr->SiS_VBInfo & DriverMode)) {
340 if( (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) || 351 if( (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x105) ||
341 (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) { 352 (SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_VESAID == 0x107) ) {
342 if(backupindex <= 1) RRTI++; 353 if(backupindex <= 1) RRTI++;
343 } 354 }
344 } 355 }
345 } 356 }
346 357
347 i = 0; 358 i = 0;
348 do { 359 do {
349 if(SiS_Pr->SiS_RefIndex[RRTI + i].ModeID != ModeNo) break; 360 if(SiS_Pr->SiS_RefIndex[RRTI + i].ModeID != ModeNo) break;
350 temp = SiS_Pr->SiS_RefIndex[RRTI + i].Ext_InfoFlag; 361 temp = SiS_Pr->SiS_RefIndex[RRTI + i].Ext_InfoFlag;
351 temp &= ModeTypeMask; 362 temp &= ModeTypeMask;
352 if(temp < SiS_Pr->SiS_ModeType) break; 363 if(temp < SiS_Pr->SiS_ModeType) break;
353 i++; 364 i++;
354 index--; 365 index--;
355 } while(index != 0xFFFF); 366 } while(index != 0xFFFF);
356 367
357 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) { 368 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
358 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 369 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
359 temp = SiS_Pr->SiS_RefIndex[RRTI + i - 1].Ext_InfoFlag; 370 temp = SiS_Pr->SiS_RefIndex[RRTI + i - 1].Ext_InfoFlag;
360 if(temp & InterlaceMode) i++; 371 if(temp & InterlaceMode) i++;
361 } 372 }
362 } 373 }
363 374
364 i--; 375 i--;
365 376
366 if((SiS_Pr->SiS_SetFlag & ProgrammingCRT2) && (!(SiS_Pr->SiS_VBInfo & DisableCRT2Display))) { 377 if((SiS_Pr->SiS_SetFlag & ProgrammingCRT2) && (!(SiS_Pr->SiS_VBInfo & DisableCRT2Display))) {
367 backup_i = i; 378 backup_i = i;
368 if(!(SiS_AdjustCRT2Rate(SiS_Pr, ModeNo, ModeIdIndex, RRTI, &i, HwInfo))) { 379 if(!(SiS_AdjustCRT2Rate(SiS_Pr, ModeNo, ModeIdIndex, RRTI, &i))) {
369 i = backup_i; 380 i = backup_i;
370 } 381 }
371 } 382 }
372 383
373 return(RRTI + i); 384 return (RRTI + i);
374} 385}
375 386
376/*********************************************/ 387/*********************************************/
@@ -378,15 +389,15 @@ SiS_GetRatePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
378/*********************************************/ 389/*********************************************/
379 390
380static void 391static void
381SiS_SaveCRT2Info(SiS_Private *SiS_Pr, USHORT ModeNo) 392SiS_SaveCRT2Info(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
382{ 393{
383 USHORT temp1,temp2; 394 unsigned short temp1, temp2;
384 395
385 /* Store CRT1 ModeNo in CR34 */ 396 /* Store CRT1 ModeNo in CR34 */
386 SiS_SetReg(SiS_Pr->SiS_P3d4,0x34,ModeNo); 397 SiS_SetReg(SiS_Pr->SiS_P3d4,0x34,ModeNo);
387 temp1 = (SiS_Pr->SiS_VBInfo & SetInSlaveMode) >> 8; 398 temp1 = (SiS_Pr->SiS_VBInfo & SetInSlaveMode) >> 8;
388 temp2 = ~(SetInSlaveMode >> 8); 399 temp2 = ~(SetInSlaveMode >> 8);
389 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x31,temp2,temp1); 400 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x31,temp2,temp1);
390} 401}
391 402
392/*********************************************/ 403/*********************************************/
@@ -395,35 +406,35 @@ SiS_SaveCRT2Info(SiS_Private *SiS_Pr, USHORT ModeNo)
395 406
396#ifdef SIS300 407#ifdef SIS300
397static BOOLEAN 408static BOOLEAN
398SiS_CR36BIOSWord23b(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 409SiS_CR36BIOSWord23b(struct SiS_Private *SiS_Pr)
399{ 410{
400 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 411 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
401 USHORT temp,temp1; 412 unsigned short temp,temp1;
402 413
403 if(SiS_Pr->SiS_UseROM) { 414 if(SiS_Pr->SiS_UseROM) {
404 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { 415 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
405 temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); 416 temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f);
406 temp1 = SISGETROMW(0x23b); 417 temp1 = SISGETROMW(0x23b);
407 if(temp1 & temp) return TRUE; 418 if(temp1 & temp) return TRUE;
408 } 419 }
409 } 420 }
410 return FALSE; 421 return FALSE;
411} 422}
412 423
413static BOOLEAN 424static BOOLEAN
414SiS_CR36BIOSWord23d(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 425SiS_CR36BIOSWord23d(struct SiS_Private *SiS_Pr)
415{ 426{
416 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 427 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
417 USHORT temp,temp1; 428 unsigned short temp,temp1;
418 429
419 if(SiS_Pr->SiS_UseROM) { 430 if(SiS_Pr->SiS_UseROM) {
420 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { 431 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
421 temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f); 432 temp = 1 << ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4) & 0x0f);
422 temp1 = SISGETROMW(0x23d); 433 temp1 = SISGETROMW(0x23d);
423 if(temp1 & temp) return TRUE; 434 if(temp1 & temp) return TRUE;
424 } 435 }
425 } 436 }
426 return FALSE; 437 return FALSE;
427} 438}
428#endif 439#endif
429 440
@@ -432,85 +443,76 @@ SiS_CR36BIOSWord23d(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
432/*********************************************/ 443/*********************************************/
433 444
434void 445void
435SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime) 446SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime)
436{ 447{
437 USHORT i, j; 448 unsigned int i, j;
438 449
439 for(i=0; i<delaytime; i++) { 450 for(i = 0; i < delaytime; i++) {
440 j += SiS_GetReg(SiS_Pr->SiS_P3c4,0x05); 451 j += SiS_GetReg(SiS_Pr->SiS_P3c4,0x05);
441 } 452 }
442} 453}
443 454
444#if defined(SIS300) || defined(SIS315H) 455#if defined(SIS300) || defined(SIS315H)
445static void 456static void
446SiS_GenericDelay(SiS_Private *SiS_Pr, USHORT delay) 457SiS_GenericDelay(struct SiS_Private *SiS_Pr, unsigned short delay)
447{ 458{
448 USHORT temp,flag; 459 SiS_DDC2Delay(SiS_Pr, delay * 36);
449
450 flag = SiS_GetRegByte(0x61) & 0x10;
451
452 while(delay) {
453 temp = SiS_GetRegByte(0x61) & 0x10;
454 if(temp == flag) continue;
455 flag = temp;
456 delay--;
457 }
458} 460}
459#endif 461#endif
460 462
461#ifdef SIS315H 463#ifdef SIS315H
462static void 464static void
463SiS_LongDelay(SiS_Private *SiS_Pr, USHORT delay) 465SiS_LongDelay(struct SiS_Private *SiS_Pr, unsigned short delay)
464{ 466{
465 while(delay--) { 467 while(delay--) {
466 SiS_GenericDelay(SiS_Pr,0x19df); 468 SiS_GenericDelay(SiS_Pr, 6623);
467 } 469 }
468} 470}
469#endif 471#endif
470 472
471#if defined(SIS300) || defined(SIS315H) 473#if defined(SIS300) || defined(SIS315H)
472static void 474static void
473SiS_ShortDelay(SiS_Private *SiS_Pr, USHORT delay) 475SiS_ShortDelay(struct SiS_Private *SiS_Pr, unsigned short delay)
474{ 476{
475 while(delay--) { 477 while(delay--) {
476 SiS_GenericDelay(SiS_Pr,0x42); 478 SiS_GenericDelay(SiS_Pr, 66);
477 } 479 }
478} 480}
479#endif 481#endif
480 482
481static void 483static void
482SiS_PanelDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT DelayTime) 484SiS_PanelDelay(struct SiS_Private *SiS_Pr, unsigned short DelayTime)
483{ 485{
484#if defined(SIS300) || defined(SIS315H) 486#if defined(SIS300) || defined(SIS315H)
485 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 487 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
486 USHORT PanelID, DelayIndex, Delay=0; 488 unsigned short PanelID, DelayIndex, Delay=0;
487#endif 489#endif
488 490
489 if(HwInfo->jChipType < SIS_315H) { 491 if(SiS_Pr->ChipType < SIS_315H) {
490 492
491#ifdef SIS300 493#ifdef SIS300
492 494
493 PanelID = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36); 495 PanelID = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36);
494 if(SiS_Pr->SiS_VBType & VB_SISVB) { 496 if(SiS_Pr->SiS_VBType & VB_SISVB) {
495 if(SiS_Pr->SiS_VBType & VB_SIS301) PanelID &= 0xf7; 497 if(SiS_Pr->SiS_VBType & VB_SIS301) PanelID &= 0xf7;
496 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x10)) PanelID = 0x12; 498 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x18) & 0x10)) PanelID = 0x12;
497 } 499 }
498 DelayIndex = PanelID >> 4; 500 DelayIndex = PanelID >> 4;
499 if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) { 501 if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) {
500 Delay = 3; 502 Delay = 3;
501 } else { 503 } else {
502 if(DelayTime >= 2) DelayTime -= 2; 504 if(DelayTime >= 2) DelayTime -= 2;
503 if(!(DelayTime & 0x01)) { 505 if(!(DelayTime & 0x01)) {
504 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0]; 506 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0];
505 } else { 507 } else {
506 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1]; 508 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1];
507 } 509 }
508 if(SiS_Pr->SiS_UseROM) { 510 if(SiS_Pr->SiS_UseROM) {
509 if(ROMAddr[0x220] & 0x40) { 511 if(ROMAddr[0x220] & 0x40) {
510 if(!(DelayTime & 0x01)) Delay = (USHORT)ROMAddr[0x225]; 512 if(!(DelayTime & 0x01)) Delay = (unsigned short)ROMAddr[0x225];
511 else Delay = (USHORT)ROMAddr[0x226]; 513 else Delay = (unsigned short)ROMAddr[0x226];
512 } 514 }
513 } 515 }
514 } 516 }
515 SiS_ShortDelay(SiS_Pr, Delay); 517 SiS_ShortDelay(SiS_Pr, Delay);
516 518
@@ -520,23 +522,23 @@ SiS_PanelDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT DelayTime)
520 522
521#ifdef SIS315H 523#ifdef SIS315H
522 524
523 if((HwInfo->jChipType >= SIS_661) || 525 if((SiS_Pr->ChipType >= SIS_661) ||
524 (HwInfo->jChipType <= SIS_315PRO) || 526 (SiS_Pr->ChipType <= SIS_315PRO) ||
525 (HwInfo->jChipType == SIS_330) || 527 (SiS_Pr->ChipType == SIS_330) ||
526 (SiS_Pr->SiS_ROMNew)) { 528 (SiS_Pr->SiS_ROMNew)) {
527 529
528 if(!(DelayTime & 0x01)) { 530 if(!(DelayTime & 0x01)) {
529 SiS_DDC2Delay(SiS_Pr, 0x1000); 531 SiS_DDC2Delay(SiS_Pr, 0x1000);
530 } else { 532 } else {
531 SiS_DDC2Delay(SiS_Pr, 0x4000); 533 SiS_DDC2Delay(SiS_Pr, 0x4000);
532 } 534 }
533 535
534 } else if((SiS_Pr->SiS_IF_DEF_LVDS == 1) /* || 536 } else if((SiS_Pr->SiS_IF_DEF_LVDS == 1) /* ||
535 (SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || 537 (SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) ||
536 (SiS_Pr->SiS_CustomT == CUT_CLEVO1400) */ ) { /* 315 series, LVDS; Special */ 538 (SiS_Pr->SiS_CustomT == CUT_CLEVO1400) */ ) { /* 315 series, LVDS; Special */
537 539
538 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 540 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
539 PanelID = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36); 541 PanelID = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36);
540 if(SiS_Pr->SiS_CustomT == CUT_CLEVO1400) { 542 if(SiS_Pr->SiS_CustomT == CUT_CLEVO1400) {
541 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x1b) & 0x10)) PanelID = 0x12; 543 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x1b) & 0x10)) PanelID = 0x12;
542 } 544 }
@@ -546,35 +548,35 @@ SiS_PanelDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT DelayTime)
546 DelayIndex = PanelID >> 4; 548 DelayIndex = PanelID >> 4;
547 } 549 }
548 if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) { 550 if((DelayTime >= 2) && ((PanelID & 0x0f) == 1)) {
549 Delay = 3; 551 Delay = 3;
550 } else { 552 } else {
551 if(DelayTime >= 2) DelayTime -= 2; 553 if(DelayTime >= 2) DelayTime -= 2;
552 if(!(DelayTime & 0x01)) { 554 if(!(DelayTime & 0x01)) {
553 Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[0]; 555 Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[0];
554 } else { 556 } else {
555 Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[1]; 557 Delay = SiS_Pr->SiS_PanelDelayTblLVDS[DelayIndex].timer[1];
556 } 558 }
557 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) { 559 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) {
558 if(ROMAddr[0x13c] & 0x40) { 560 if(ROMAddr[0x13c] & 0x40) {
559 if(!(DelayTime & 0x01)) { 561 if(!(DelayTime & 0x01)) {
560 Delay = (USHORT)ROMAddr[0x17e]; 562 Delay = (unsigned short)ROMAddr[0x17e];
561 } else { 563 } else {
562 Delay = (USHORT)ROMAddr[0x17f]; 564 Delay = (unsigned short)ROMAddr[0x17f];
563 } 565 }
564 } 566 }
565 } 567 }
566 } 568 }
567 SiS_ShortDelay(SiS_Pr, Delay); 569 SiS_ShortDelay(SiS_Pr, Delay);
568 } 570 }
569 571
570 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { /* 315 series, all bridges */ 572 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { /* 315 series, all bridges */
571 573
572 DelayIndex = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4; 574 DelayIndex = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) >> 4;
573 if(!(DelayTime & 0x01)) { 575 if(!(DelayTime & 0x01)) {
574 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0]; 576 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[0];
575 } else { 577 } else {
576 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1]; 578 Delay = SiS_Pr->SiS_PanelDelayTbl[DelayIndex].timer[1];
577 } 579 }
578 Delay <<= 8; 580 Delay <<= 8;
579 SiS_DDC2Delay(SiS_Pr, Delay); 581 SiS_DDC2Delay(SiS_Pr, Delay);
580 582
@@ -587,12 +589,11 @@ SiS_PanelDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT DelayTime)
587 589
588#ifdef SIS315H 590#ifdef SIS315H
589static void 591static void
590SiS_PanelDelayLoop(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 592SiS_PanelDelayLoop(struct SiS_Private *SiS_Pr, unsigned short DelayTime, unsigned short DelayLoop)
591 USHORT DelayTime, USHORT DelayLoop)
592{ 593{
593 int i; 594 int i;
594 for(i=0; i<DelayLoop; i++) { 595 for(i = 0; i < DelayLoop; i++) {
595 SiS_PanelDelay(SiS_Pr, HwInfo, DelayTime); 596 SiS_PanelDelay(SiS_Pr, DelayTime);
596 } 597 }
597} 598}
598#endif 599#endif
@@ -602,86 +603,86 @@ SiS_PanelDelayLoop(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
602/*********************************************/ 603/*********************************************/
603 604
604void 605void
605SiS_WaitRetrace1(SiS_Private *SiS_Pr) 606SiS_WaitRetrace1(struct SiS_Private *SiS_Pr)
606{ 607{
607 USHORT watchdog; 608 unsigned short watchdog;
608 609
609 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return; 610 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f) & 0xc0) return;
610 if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x17) & 0x80)) return; 611 if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x17) & 0x80)) return;
611 612
612 watchdog = 65535; 613 watchdog = 65535;
613 while((SiS_GetRegByte(SiS_Pr->SiS_P3da) & 0x08) && --watchdog); 614 while((SiS_GetRegByte(SiS_Pr->SiS_P3da) & 0x08) && --watchdog);
614 watchdog = 65535; 615 watchdog = 65535;
615 while((!(SiS_GetRegByte(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog); 616 while((!(SiS_GetRegByte(SiS_Pr->SiS_P3da) & 0x08)) && --watchdog);
616} 617}
617 618
618#if defined(SIS300) || defined(SIS315H) 619#if defined(SIS300) || defined(SIS315H)
619static void 620static void
620SiS_WaitRetrace2(SiS_Private *SiS_Pr, USHORT reg) 621SiS_WaitRetrace2(struct SiS_Private *SiS_Pr, unsigned short reg)
621{ 622{
622 USHORT watchdog; 623 unsigned short watchdog;
623 624
624 watchdog = 65535; 625 watchdog = 65535;
625 while((SiS_GetReg(SiS_Pr->SiS_Part1Port,reg) & 0x02) && --watchdog); 626 while((SiS_GetReg(SiS_Pr->SiS_Part1Port,reg) & 0x02) && --watchdog);
626 watchdog = 65535; 627 watchdog = 65535;
627 while((!(SiS_GetReg(SiS_Pr->SiS_Part1Port,reg) & 0x02)) && --watchdog); 628 while((!(SiS_GetReg(SiS_Pr->SiS_Part1Port,reg) & 0x02)) && --watchdog);
628} 629}
629#endif 630#endif
630 631
631static void 632static void
632SiS_WaitVBRetrace(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 633SiS_WaitVBRetrace(struct SiS_Private *SiS_Pr)
633{ 634{
634 if(HwInfo->jChipType < SIS_315H) { 635 if(SiS_Pr->ChipType < SIS_315H) {
635#ifdef SIS300 636#ifdef SIS300
636 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 637 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
637 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x20)) return; 638 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x20)) return;
638 } 639 }
639 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x80)) { 640 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x80)) {
640 SiS_WaitRetrace1(SiS_Pr); 641 SiS_WaitRetrace1(SiS_Pr);
641 } else { 642 } else {
642 SiS_WaitRetrace2(SiS_Pr, 0x25); 643 SiS_WaitRetrace2(SiS_Pr, 0x25);
643 } 644 }
644#endif 645#endif
645 } else { 646 } else {
646#ifdef SIS315H 647#ifdef SIS315H
647 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x40)) { 648 if(!(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x40)) {
648 SiS_WaitRetrace1(SiS_Pr); 649 SiS_WaitRetrace1(SiS_Pr);
649 } else { 650 } else {
650 SiS_WaitRetrace2(SiS_Pr, 0x30); 651 SiS_WaitRetrace2(SiS_Pr, 0x30);
651 } 652 }
652#endif 653#endif
653 } 654 }
654} 655}
655 656
656static void 657static void
657SiS_VBWait(SiS_Private *SiS_Pr) 658SiS_VBWait(struct SiS_Private *SiS_Pr)
658{ 659{
659 USHORT tempal,temp,i,j; 660 unsigned short tempal,temp,i,j;
660 661
661 temp = 0; 662 temp = 0;
662 for(i=0; i<3; i++) { 663 for(i = 0; i < 3; i++) {
663 for(j=0; j<100; j++) { 664 for(j = 0; j < 100; j++) {
664 tempal = SiS_GetRegByte(SiS_Pr->SiS_P3da); 665 tempal = SiS_GetRegByte(SiS_Pr->SiS_P3da);
665 if(temp & 0x01) { 666 if(temp & 0x01) {
666 if((tempal & 0x08)) continue; 667 if((tempal & 0x08)) continue;
667 else break; 668 else break;
668 } else { 669 } else {
669 if(!(tempal & 0x08)) continue; 670 if(!(tempal & 0x08)) continue;
670 else break; 671 else break;
671 } 672 }
672 } 673 }
673 temp ^= 0x01; 674 temp ^= 0x01;
674 } 675 }
675} 676}
676 677
677static void 678static void
678SiS_VBLongWait(SiS_Private *SiS_Pr) 679SiS_VBLongWait(struct SiS_Private *SiS_Pr)
679{ 680{
680 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 681 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
681 SiS_VBWait(SiS_Pr); 682 SiS_VBWait(SiS_Pr);
682 } else { 683 } else {
683 SiS_WaitRetrace1(SiS_Pr); 684 SiS_WaitRetrace1(SiS_Pr);
684 } 685 }
685} 686}
686 687
687/*********************************************/ 688/*********************************************/
@@ -690,237 +691,225 @@ SiS_VBLongWait(SiS_Private *SiS_Pr)
690 691
691#ifdef SIS300 692#ifdef SIS300
692static BOOLEAN 693static BOOLEAN
693SiS_Is301B(SiS_Private *SiS_Pr) 694SiS_Is301B(struct SiS_Private *SiS_Pr)
694{ 695{
695 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01) >= 0xb0) return TRUE; 696 if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01) >= 0xb0) return TRUE;
696 return FALSE; 697 return FALSE;
697} 698}
698#endif 699#endif
699 700
700static BOOLEAN 701static BOOLEAN
701SiS_CRT2IsLCD(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 702SiS_CRT2IsLCD(struct SiS_Private *SiS_Pr)
702{ 703{
703 USHORT flag; 704 if(SiS_Pr->ChipType == SIS_730) {
704 705 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x20) return TRUE;
705 if(HwInfo->jChipType == SIS_730) { 706 }
706 flag = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13); 707 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x30) & 0x20) return TRUE;
707 if(flag & 0x20) return TRUE; 708 return FALSE;
708 }
709 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
710 if(flag & 0x20) return TRUE;
711 return FALSE;
712} 709}
713 710
714BOOLEAN 711BOOLEAN
715SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 712SiS_IsDualEdge(struct SiS_Private *SiS_Pr)
716{ 713{
717#ifdef SIS315H 714#ifdef SIS315H
718 USHORT flag; 715 if(SiS_Pr->ChipType >= SIS_315H) {
719 716 if((SiS_Pr->ChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) {
720 if(HwInfo->jChipType >= SIS_315H) { 717 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableDualEdge) return TRUE;
721 if((HwInfo->jChipType != SIS_650) || (SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0)) { 718 }
722 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 719 }
723 if(flag & EnableDualEdge) return TRUE;
724 }
725 }
726#endif 720#endif
727 return FALSE; 721 return FALSE;
728} 722}
729 723
730BOOLEAN 724BOOLEAN
731SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 725SiS_IsVAMode(struct SiS_Private *SiS_Pr)
732{ 726{
733#ifdef SIS315H 727#ifdef SIS315H
734 USHORT flag; 728 unsigned short flag;
735 729
736 if(HwInfo->jChipType >= SIS_315H) { 730 if(SiS_Pr->ChipType >= SIS_315H) {
737 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 731 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
738 if((flag & EnableDualEdge) && (flag & SetToLCDA)) return TRUE; 732 if((flag & EnableDualEdge) && (flag & SetToLCDA)) return TRUE;
739 } 733 }
740#endif 734#endif
741 return FALSE; 735 return FALSE;
742} 736}
743 737
744#ifdef SIS315H 738#ifdef SIS315H
745static BOOLEAN 739static BOOLEAN
746SiS_IsVAorLCD(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 740SiS_IsVAorLCD(struct SiS_Private *SiS_Pr)
747{ 741{
748 if(SiS_IsVAMode(SiS_Pr,HwInfo)) return TRUE; 742 if(SiS_IsVAMode(SiS_Pr)) return TRUE;
749 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) return TRUE; 743 if(SiS_CRT2IsLCD(SiS_Pr)) return TRUE;
750 return FALSE; 744 return FALSE;
751} 745}
752#endif 746#endif
753 747
754static BOOLEAN 748static BOOLEAN
755SiS_IsDualLink(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 749SiS_IsDualLink(struct SiS_Private *SiS_Pr)
756{ 750{
757#ifdef SIS315H 751#ifdef SIS315H
758 if(HwInfo->jChipType >= SIS_315H) { 752 if(SiS_Pr->ChipType >= SIS_315H) {
759 if((SiS_CRT2IsLCD(SiS_Pr, HwInfo)) || 753 if((SiS_CRT2IsLCD(SiS_Pr)) ||
760 (SiS_IsVAMode(SiS_Pr, HwInfo))) { 754 (SiS_IsVAMode(SiS_Pr))) {
761 if(SiS_Pr->SiS_LCDInfo & LCDDualLink) return TRUE; 755 if(SiS_Pr->SiS_LCDInfo & LCDDualLink) return TRUE;
762 } 756 }
763 } 757 }
764#endif 758#endif
765 return FALSE; 759 return FALSE;
766} 760}
767 761
768#ifdef SIS315H 762#ifdef SIS315H
769static BOOLEAN 763static BOOLEAN
770SiS_TVEnabled(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 764SiS_TVEnabled(struct SiS_Private *SiS_Pr)
771{ 765{
772 if((SiS_GetReg(SiS_Pr->SiS_Part2Port,0x00) & 0x0f) != 0x0c) return TRUE; 766 if((SiS_GetReg(SiS_Pr->SiS_Part2Port,0x00) & 0x0f) != 0x0c) return TRUE;
773 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV302LV)) { 767 if(SiS_Pr->SiS_VBType & VB_SISYPBPR) {
774 if(SiS_GetReg(SiS_Pr->SiS_Part2Port,0x4d) & 0x10) return TRUE; 768 if(SiS_GetReg(SiS_Pr->SiS_Part2Port,0x4d) & 0x10) return TRUE;
775 } 769 }
776 return FALSE; 770 return FALSE;
777} 771}
778#endif 772#endif
779 773
780#ifdef SIS315H 774#ifdef SIS315H
781static BOOLEAN 775static BOOLEAN
782SiS_LCDAEnabled(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 776SiS_LCDAEnabled(struct SiS_Private *SiS_Pr)
783{ 777{
784 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x13) & 0x04) return TRUE; 778 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x13) & 0x04) return TRUE;
785 return FALSE; 779 return FALSE;
786} 780}
787#endif 781#endif
788 782
789#ifdef SIS315H 783#ifdef SIS315H
790static BOOLEAN 784static BOOLEAN
791SiS_WeHaveBacklightCtrl(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 785SiS_WeHaveBacklightCtrl(struct SiS_Private *SiS_Pr)
792{ 786{
793 if((HwInfo->jChipType >= SIS_315H) && (HwInfo->jChipType < SIS_661)) { 787 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) {
794 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0x10) return TRUE; 788 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0x10) return TRUE;
795 } 789 }
796 return FALSE; 790 return FALSE;
797} 791}
798#endif 792#endif
799 793
800#ifdef SIS315H 794#ifdef SIS315H
801static BOOLEAN 795static BOOLEAN
802SiS_IsNotM650orLater(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 796SiS_IsNotM650orLater(struct SiS_Private *SiS_Pr)
803{ 797{
804 USHORT flag; 798 unsigned short flag;
805 799
806 if(HwInfo->jChipType == SIS_650) { 800 if(SiS_Pr->ChipType == SIS_650) {
807 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f); 801 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
808 flag &= 0xF0; 802 /* Check for revision != A0 only */
809 /* Check for revision != A0 only */ 803 if((flag == 0xe0) || (flag == 0xc0) ||
810 if((flag == 0xe0) || (flag == 0xc0) || 804 (flag == 0xb0) || (flag == 0x90)) return FALSE;
811 (flag == 0xb0) || (flag == 0x90)) return FALSE; 805 } else if(SiS_Pr->ChipType >= SIS_661) return FALSE;
812 } else if(HwInfo->jChipType >= SIS_661) return FALSE; 806 return TRUE;
813 return TRUE;
814} 807}
815#endif 808#endif
816 809
817#ifdef SIS315H 810#ifdef SIS315H
818static BOOLEAN 811static BOOLEAN
819SiS_IsYPbPr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 812SiS_IsYPbPr(struct SiS_Private *SiS_Pr)
820{ 813{
821 USHORT flag; 814 if(SiS_Pr->ChipType >= SIS_315H) {
822 815 /* YPrPb = 0x08 */
823 if(HwInfo->jChipType >= SIS_315H) { 816 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHYPbPr) return TRUE;
824 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 817 }
825 if(flag & EnableCHYPbPr) return TRUE; /* = YPrPb = 0x08 */ 818 return FALSE;
826 }
827 return FALSE;
828} 819}
829#endif 820#endif
830 821
831#ifdef SIS315H 822#ifdef SIS315H
832static BOOLEAN 823static BOOLEAN
833SiS_IsChScart(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 824SiS_IsChScart(struct SiS_Private *SiS_Pr)
834{ 825{
835 USHORT flag; 826 if(SiS_Pr->ChipType >= SIS_315H) {
836 827 /* Scart = 0x04 */
837 if(HwInfo->jChipType >= SIS_315H) { 828 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & EnableCHScart) return TRUE;
838 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 829 }
839 if(flag & EnableCHScart) return TRUE; /* = Scart = 0x04 */ 830 return FALSE;
840 }
841 return FALSE;
842} 831}
843#endif 832#endif
844 833
845#ifdef SIS315H 834#ifdef SIS315H
846static BOOLEAN 835static BOOLEAN
847SiS_IsTVOrYPbPrOrScart(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 836SiS_IsTVOrYPbPrOrScart(struct SiS_Private *SiS_Pr)
848{ 837{
849 USHORT flag; 838 unsigned short flag;
850 839
851 if(HwInfo->jChipType >= SIS_315H) { 840 if(SiS_Pr->ChipType >= SIS_315H) {
852 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 841 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
853 if(flag & SetCRT2ToTV) return TRUE; 842 if(flag & SetCRT2ToTV) return TRUE;
854 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 843 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
855 if(flag & EnableCHYPbPr) return TRUE; /* = YPrPb = 0x08 */ 844 if(flag & EnableCHYPbPr) return TRUE; /* = YPrPb = 0x08 */
856 if(flag & EnableCHScart) return TRUE; /* = Scart = 0x04 - TW */ 845 if(flag & EnableCHScart) return TRUE; /* = Scart = 0x04 - TW */
857 } else { 846 } else {
858 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 847 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
859 if(flag & SetCRT2ToTV) return TRUE; 848 if(flag & SetCRT2ToTV) return TRUE;
860 } 849 }
861 return FALSE; 850 return FALSE;
862} 851}
863#endif 852#endif
864 853
865#ifdef SIS315H 854#ifdef SIS315H
866static BOOLEAN 855static BOOLEAN
867SiS_IsLCDOrLCDA(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 856SiS_IsLCDOrLCDA(struct SiS_Private *SiS_Pr)
868{ 857{
869 USHORT flag; 858 unsigned short flag;
870 859
871 if(HwInfo->jChipType >= SIS_315H) { 860 if(SiS_Pr->ChipType >= SIS_315H) {
872 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 861 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
873 if(flag & SetCRT2ToLCD) return TRUE; 862 if(flag & SetCRT2ToLCD) return TRUE;
874 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 863 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
875 if(flag & SetToLCDA) return TRUE; 864 if(flag & SetToLCDA) return TRUE;
876 } else { 865 } else {
877 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 866 flag = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
878 if(flag & SetCRT2ToLCD) return TRUE; 867 if(flag & SetCRT2ToLCD) return TRUE;
879 } 868 }
880 return FALSE; 869 return FALSE;
881} 870}
882#endif 871#endif
883 872
884static BOOLEAN 873static BOOLEAN
885SiS_BridgeIsOn(SiS_Private *SiS_Pr) 874SiS_HaveBridge(struct SiS_Private *SiS_Pr)
886{ 875{
887 USHORT flag; 876 unsigned short flag;
888 877
889 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 878 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
890 return TRUE; 879 return TRUE;
891 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { 880 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
892 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00); 881 flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
893 if((flag == 1) || (flag == 2)) return TRUE; 882 if((flag == 1) || (flag == 2)) return TRUE;
894 } 883 }
895 return FALSE; 884 return FALSE;
896} 885}
897 886
898static BOOLEAN 887static BOOLEAN
899SiS_BridgeIsEnabled(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 888SiS_BridgeIsEnabled(struct SiS_Private *SiS_Pr)
900{ 889{
901 USHORT flag; 890 unsigned short flag;
902 891
903 if(SiS_BridgeIsOn(SiS_Pr)) { 892 if(SiS_HaveBridge(SiS_Pr)) {
904 flag = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); 893 flag = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00);
905 if(HwInfo->jChipType < SIS_315H) { 894 if(SiS_Pr->ChipType < SIS_315H) {
906 flag &= 0xa0; 895 flag &= 0xa0;
907 if((flag == 0x80) || (flag == 0x20)) return TRUE; 896 if((flag == 0x80) || (flag == 0x20)) return TRUE;
908 } else { 897 } else {
909 flag &= 0x50; 898 flag &= 0x50;
910 if((flag == 0x40) || (flag == 0x10)) return TRUE; 899 if((flag == 0x40) || (flag == 0x10)) return TRUE;
911 } 900 }
912 } 901 }
913 return FALSE; 902 return FALSE;
914} 903}
915 904
916static BOOLEAN 905static BOOLEAN
917SiS_BridgeInSlavemode(SiS_Private *SiS_Pr) 906SiS_BridgeInSlavemode(struct SiS_Private *SiS_Pr)
918{ 907{
919 USHORT flag1; 908 unsigned short flag1;
920 909
921 flag1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31); 910 flag1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31);
922 if(flag1 & (SetInSlaveMode >> 8)) return TRUE; 911 if(flag1 & (SetInSlaveMode >> 8)) return TRUE;
923 return FALSE; 912 return FALSE;
924} 913}
925 914
926/*********************************************/ 915/*********************************************/
@@ -928,119 +917,97 @@ SiS_BridgeInSlavemode(SiS_Private *SiS_Pr)
928/*********************************************/ 917/*********************************************/
929 918
930/* Setup general purpose IO for Chrontel communication */ 919/* Setup general purpose IO for Chrontel communication */
920#ifdef SIS300
931void 921void
932SiS_SetChrontelGPIO(SiS_Private *SiS_Pr, USHORT myvbinfo) 922SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo)
933{ 923{
934 unsigned long acpibase; 924 unsigned int acpibase;
935 unsigned short temp; 925 unsigned short temp;
936 926
937 if(!(SiS_Pr->SiS_ChSW)) return; 927 if(!(SiS_Pr->SiS_ChSW)) return;
938 928
939#ifdef LINUX_KERNEL 929#ifdef SIS_LINUX_KERNEL
940 SiS_SetRegLong(0xcf8,0x80000874); /* get ACPI base */ 930 acpibase = sisfb_read_lpc_pci_dword(SiS_Pr, 0x74);
941 acpibase = SiS_GetRegLong(0xcfc);
942#else 931#else
943 acpibase = pciReadLong(0x00000800, 0x74); 932 acpibase = pciReadLong(0x00000800, 0x74);
944#endif 933#endif
945 acpibase &= 0xFFFF; 934 acpibase &= 0xFFFF;
946 temp = SiS_GetRegShort((USHORT)(acpibase + 0x3c)); /* ACPI register 0x3c: GP Event 1 I/O mode select */ 935 if(!acpibase) return;
936 temp = SiS_GetRegShort((acpibase + 0x3c)); /* ACPI register 0x3c: GP Event 1 I/O mode select */
947 temp &= 0xFEFF; 937 temp &= 0xFEFF;
948 SiS_SetRegShort((USHORT)(acpibase + 0x3c), temp); 938 SiS_SetRegShort((acpibase + 0x3c), temp);
949 temp = SiS_GetRegShort((USHORT)(acpibase + 0x3c)); 939 temp = SiS_GetRegShort((acpibase + 0x3c));
950 temp = SiS_GetRegShort((USHORT)(acpibase + 0x3a)); /* ACPI register 0x3a: GP Pin Level (low/high) */ 940 temp = SiS_GetRegShort((acpibase + 0x3a)); /* ACPI register 0x3a: GP Pin Level (low/high) */
951 temp &= 0xFEFF; 941 temp &= 0xFEFF;
952 if(!(myvbinfo & SetCRT2ToTV)) temp |= 0x0100; 942 if(!(myvbinfo & SetCRT2ToTV)) temp |= 0x0100;
953 SiS_SetRegShort((USHORT)(acpibase + 0x3a), temp); 943 SiS_SetRegShort((acpibase + 0x3a), temp);
954 temp = SiS_GetRegShort((USHORT)(acpibase + 0x3a)); 944 temp = SiS_GetRegShort((acpibase + 0x3a));
955} 945}
946#endif
956 947
957void 948void
958SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 949SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
959 PSIS_HW_INFO HwInfo, int checkcrt2mode) 950 unsigned short ModeIdIndex, int checkcrt2mode)
960{ 951{
961 USHORT tempax,tempbx,temp; 952 unsigned short tempax, tempbx, temp;
962 USHORT modeflag, resinfo=0; 953 unsigned short modeflag, resinfo = 0;
963 954
964 if(ModeNo <= 0x13) { 955 SiS_Pr->SiS_SetFlag = 0;
965 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
966 } else if(SiS_Pr->UseCustomMode) {
967 modeflag = SiS_Pr->CModeFlag;
968 } else {
969 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
970 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
971 }
972 956
973 SiS_Pr->SiS_SetFlag = 0; 957 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
974 958
975 SiS_Pr->SiS_ModeType = modeflag & ModeTypeMask; 959 SiS_Pr->SiS_ModeType = modeflag & ModeTypeMask;
976 960
977 tempbx = 0; 961 if((ModeNo > 0x13) && (!SiS_Pr->UseCustomMode)) {
978 if(SiS_BridgeIsOn(SiS_Pr)) { 962 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
979 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 963 }
980#if 0 964
981 if(HwInfo->jChipType < SIS_661) { 965 tempbx = 0;
982 /* NO - YPbPr not set yet ! */ 966
983 if(SiS_Pr->SiS_YPbPr & <all ypbpr except 525i>) { 967 if(SiS_HaveBridge(SiS_Pr)) {
984 temp &= (SetCRT2ToHiVision | SwitchCRT2 | SetSimuScanMode); /* 0x83 */ 968
985 temp |= SetCRT2ToHiVision; /* 0x80 */ 969 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
986 } 970 tempbx |= temp;
987 if(SiS_Pr->SiS_YPbPr & <ypbpr525i>) { 971 tempax = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) << 8;
988 temp &= (SetCRT2ToHiVision | SwitchCRT2 | SetSimuScanMode); /* 0x83 */ 972 tempax &= (DriverMode | LoadDACFlag | SetNotSimuMode | SetPALTV);
989 temp |= SetCRT2ToSVIDEO; /* 0x08 */ 973 tempbx |= tempax;
990 }
991 }
992#endif
993 tempbx |= temp;
994 tempax = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) << 8;
995 tempax &= (DriverMode | LoadDACFlag | SetNotSimuMode | SetPALTV);
996 tempbx |= tempax;
997 974
998#ifdef SIS315H 975#ifdef SIS315H
999 if(HwInfo->jChipType >= SIS_315H) { 976 if(SiS_Pr->ChipType >= SIS_315H) {
1000 if(SiS_Pr->SiS_VBType & VB_SISLCDA) { 977 if(SiS_Pr->SiS_VBType & VB_SISLCDA) {
1001 if(ModeNo == 0x03) { 978 if(ModeNo == 0x03) {
1002 /* Mode 0x03 is never in driver mode */ 979 /* Mode 0x03 is never in driver mode */
1003 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x31,0xbf); 980 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x31,0xbf);
1004 } 981 }
1005 if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8))) { 982 if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8))) {
1006 /* Reset LCDA setting if not driver mode */ 983 /* Reset LCDA setting if not driver mode */
1007 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc); 984 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x38,0xfc);
1008 } 985 }
1009 if(IS_SIS650) { 986 if(IS_SIS650) {
1010 if(SiS_Pr->SiS_UseLCDA) { 987 if(SiS_Pr->SiS_UseLCDA) {
1011 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) { 988 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xF0) {
1012 if((ModeNo <= 0x13) || (!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) { 989 if((ModeNo <= 0x13) || (!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & (DriverMode >> 8)))) {
1013 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA)); 990 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x38,(EnableDualEdge | SetToLCDA));
1014 } 991 }
1015 } 992 }
1016 } 993 }
1017 } 994 }
1018 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 995 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
1019 if((temp & (EnableDualEdge | SetToLCDA)) == (EnableDualEdge | SetToLCDA)) { 996 if((temp & (EnableDualEdge | SetToLCDA)) == (EnableDualEdge | SetToLCDA)) {
1020 tempbx |= SetCRT2ToLCDA; 997 tempbx |= SetCRT2ToLCDA;
1021 } 998 }
1022 } 999 }
1023 1000
1024 if(SiS_Pr->SiS_VBType & (VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV)) { 1001 if(SiS_Pr->ChipType >= SIS_661) { /* New CR layout */
1025 tempbx &= ~(SetCRT2ToRAMDAC);
1026 }
1027
1028 if(HwInfo->jChipType >= SIS_661) {
1029 tempbx &= ~(SetCRT2ToYPbPr525750 | SetCRT2ToHiVision); 1002 tempbx &= ~(SetCRT2ToYPbPr525750 | SetCRT2ToHiVision);
1030 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 1003 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0x04) {
1031 if(SiS_Pr->SiS_VBType & VB_SISYPBPR) { 1004 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xe0;
1032 if(temp & 0x04) { 1005 if(temp == 0x60) tempbx |= SetCRT2ToHiVision;
1033 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xe0; 1006 else if(SiS_Pr->SiS_VBType & VB_SISYPBPR) {
1034 if(temp == 0x60) tempbx |= SetCRT2ToHiVision; 1007 tempbx |= SetCRT2ToYPbPr525750;
1035 else tempbx |= SetCRT2ToYPbPr525750;
1036 }
1037 } else if(SiS_Pr->SiS_VBType & VB_SISHIVISION) {
1038 if(temp & 0x04) {
1039 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35) & 0xe0;
1040 if(temp == 0x60) tempbx |= SetCRT2ToHiVision;
1041 } 1008 }
1042 } 1009 }
1043 } 1010 }
1044 1011
1045 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1012 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
1046 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 1013 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
@@ -1048,7 +1015,7 @@ SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1048 tempbx |= SetCRT2ToLCDA; 1015 tempbx |= SetCRT2ToLCDA;
1049 } 1016 }
1050 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1017 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1051 if(temp & EnableCHYPbPr) { 1018 if(temp & EnableCHYPbPr) {
1052 tempbx |= SetCRT2ToCHYPbPr; 1019 tempbx |= SetCRT2ToCHYPbPr;
1053 } 1020 }
1054 } 1021 }
@@ -1057,44 +1024,49 @@ SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1057 1024
1058#endif /* SIS315H */ 1025#endif /* SIS315H */
1059 1026
1060 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1027 if(!(SiS_Pr->SiS_VBType & VB_SISVGA2)) {
1028 tempbx &= ~(SetCRT2ToRAMDAC);
1029 }
1030
1031 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1061 temp = SetCRT2ToSVIDEO | 1032 temp = SetCRT2ToSVIDEO |
1062 SetCRT2ToAVIDEO | 1033 SetCRT2ToAVIDEO |
1063 SetCRT2ToSCART | 1034 SetCRT2ToSCART |
1064 SetCRT2ToLCDA | 1035 SetCRT2ToLCDA |
1065 SetCRT2ToLCD | 1036 SetCRT2ToLCD |
1066 SetCRT2ToRAMDAC | 1037 SetCRT2ToRAMDAC |
1067 SetCRT2ToHiVision | 1038 SetCRT2ToHiVision |
1068 SetCRT2ToYPbPr525750; 1039 SetCRT2ToYPbPr525750;
1069 } else { 1040 } else {
1070 if(HwInfo->jChipType >= SIS_315H) { 1041 if(SiS_Pr->ChipType >= SIS_315H) {
1071 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1042 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1072 temp = SetCRT2ToAVIDEO | 1043 temp = SetCRT2ToAVIDEO |
1073 SetCRT2ToSVIDEO | 1044 SetCRT2ToSVIDEO |
1074 SetCRT2ToSCART | 1045 SetCRT2ToSCART |
1075 SetCRT2ToLCDA | 1046 SetCRT2ToLCDA |
1076 SetCRT2ToLCD | 1047 SetCRT2ToLCD |
1077 SetCRT2ToCHYPbPr; 1048 SetCRT2ToCHYPbPr;
1078 } else { 1049 } else {
1079 temp = SetCRT2ToLCDA | 1050 temp = SetCRT2ToLCDA |
1080 SetCRT2ToLCD; 1051 SetCRT2ToLCD;
1081 } 1052 }
1082 } else { 1053 } else {
1083 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1054 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1084 temp = SetCRT2ToTV | SetCRT2ToLCD; 1055 temp = SetCRT2ToTV | SetCRT2ToLCD;
1085 } else { 1056 } else {
1086 temp = SetCRT2ToLCD; 1057 temp = SetCRT2ToLCD;
1087 } 1058 }
1088 } 1059 }
1089 } 1060 }
1061
1062 if(!(tempbx & temp)) {
1063 tempax = DisableCRT2Display;
1064 tempbx = 0;
1065 }
1090 1066
1091 if(!(tempbx & temp)) { 1067 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1092 tempax = DisableCRT2Display;
1093 tempbx = 0;
1094 }
1095 1068
1096 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1069 unsigned short clearmask = ( DriverMode |
1097 USHORT clearmask = ( DriverMode |
1098 DisableCRT2Display | 1070 DisableCRT2Display |
1099 LoadDACFlag | 1071 LoadDACFlag |
1100 SetNotSimuMode | 1072 SetNotSimuMode |
@@ -1102,106 +1074,104 @@ SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1102 SetPALTV | 1074 SetPALTV |
1103 SwitchCRT2 | 1075 SwitchCRT2 |
1104 SetSimuScanMode ); 1076 SetSimuScanMode );
1105 if(tempbx & SetCRT2ToLCDA) tempbx &= (clearmask | SetCRT2ToLCDA); 1077
1078 if(tempbx & SetCRT2ToLCDA) tempbx &= (clearmask | SetCRT2ToLCDA);
1106 if(tempbx & SetCRT2ToRAMDAC) tempbx &= (clearmask | SetCRT2ToRAMDAC); 1079 if(tempbx & SetCRT2ToRAMDAC) tempbx &= (clearmask | SetCRT2ToRAMDAC);
1107 if(tempbx & SetCRT2ToLCD) tempbx &= (clearmask | SetCRT2ToLCD); 1080 if(tempbx & SetCRT2ToLCD) tempbx &= (clearmask | SetCRT2ToLCD);
1108 if(tempbx & SetCRT2ToSCART) tempbx &= (clearmask | SetCRT2ToSCART); 1081 if(tempbx & SetCRT2ToSCART) tempbx &= (clearmask | SetCRT2ToSCART);
1109 if(tempbx & SetCRT2ToHiVision) tempbx &= (clearmask | SetCRT2ToHiVision); 1082 if(tempbx & SetCRT2ToHiVision) tempbx &= (clearmask | SetCRT2ToHiVision);
1110 if(tempbx & SetCRT2ToYPbPr525750) tempbx &= (clearmask | SetCRT2ToYPbPr525750); 1083 if(tempbx & SetCRT2ToYPbPr525750) tempbx &= (clearmask | SetCRT2ToYPbPr525750);
1111 } else { 1084
1112 if(HwInfo->jChipType >= SIS_315H) { 1085 } else {
1086
1087 if(SiS_Pr->ChipType >= SIS_315H) {
1113 if(tempbx & SetCRT2ToLCDA) { 1088 if(tempbx & SetCRT2ToLCDA) {
1114 tempbx &= (0xFF00|SwitchCRT2|SetSimuScanMode); 1089 tempbx &= (0xFF00|SwitchCRT2|SetSimuScanMode);
1115 } 1090 }
1116 } 1091 }
1117 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1092 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1118 if(tempbx & SetCRT2ToTV) { 1093 if(tempbx & SetCRT2ToTV) {
1119 tempbx &= (0xFF00|SetCRT2ToTV|SwitchCRT2|SetSimuScanMode); 1094 tempbx &= (0xFF00|SetCRT2ToTV|SwitchCRT2|SetSimuScanMode);
1120 } 1095 }
1121 }
1122 if(tempbx & SetCRT2ToLCD) {
1123 tempbx &= (0xFF00|SetCRT2ToLCD|SwitchCRT2|SetSimuScanMode);
1124 } 1096 }
1125 if(HwInfo->jChipType >= SIS_315H) { 1097 if(tempbx & SetCRT2ToLCD) {
1098 tempbx &= (0xFF00|SetCRT2ToLCD|SwitchCRT2|SetSimuScanMode);
1099 }
1100 if(SiS_Pr->ChipType >= SIS_315H) {
1126 if(tempbx & SetCRT2ToLCDA) { 1101 if(tempbx & SetCRT2ToLCDA) {
1127 tempbx |= SetCRT2ToLCD; 1102 tempbx |= SetCRT2ToLCD;
1128 } 1103 }
1129 } 1104 }
1105
1130 } 1106 }
1131 1107
1132 if(tempax & DisableCRT2Display) { 1108 if(tempax & DisableCRT2Display) {
1133 if(!(tempbx & (SwitchCRT2 | SetSimuScanMode))) { 1109 if(!(tempbx & (SwitchCRT2 | SetSimuScanMode))) {
1134 tempbx = SetSimuScanMode | DisableCRT2Display; 1110 tempbx = SetSimuScanMode | DisableCRT2Display;
1135 } 1111 }
1136 } 1112 }
1137 1113
1138 if(!(tempbx & DriverMode)) tempbx |= SetSimuScanMode; 1114 if(!(tempbx & DriverMode)) tempbx |= SetSimuScanMode;
1139 1115
1140 /* LVDS/CHRONTEL (LCD/TV) and 301BDH (LCD) can only be slave in 8bpp modes */ 1116 /* LVDS/CHRONTEL (LCD/TV) and 301BDH (LCD) can only be slave in 8bpp modes */
1141 if(SiS_Pr->SiS_ModeType <= ModeVGA) { 1117 if(SiS_Pr->SiS_ModeType <= ModeVGA) {
1142 if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 1118 if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
1143 ((SiS_Pr->SiS_VBType & VB_NoLCD) && (tempbx & SetCRT2ToLCD)) ) { 1119 ((SiS_Pr->SiS_VBType & VB_NoLCD) && (tempbx & SetCRT2ToLCD)) ) {
1144 modeflag &= (~CRT2Mode); 1120 modeflag &= (~CRT2Mode);
1145 } 1121 }
1146 } 1122 }
1147 1123
1148 if(!(tempbx & SetSimuScanMode)) { 1124 if(!(tempbx & SetSimuScanMode)) {
1149 if(tempbx & SwitchCRT2) { 1125 if(tempbx & SwitchCRT2) {
1150 if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) { 1126 if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) {
1151 if( (HwInfo->jChipType >= SIS_315H) && 1127 if(resinfo != SIS_RI_1600x1200) {
1152 (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) { 1128 tempbx |= SetSimuScanMode;
1153 if(resinfo != SIS_RI_1600x1200) { 1129 }
1154 tempbx |= SetSimuScanMode;
1155 }
1156 } else {
1157 tempbx |= SetSimuScanMode;
1158 }
1159 } 1130 }
1160 } else { 1131 } else {
1161 if(SiS_BridgeIsEnabled(SiS_Pr,HwInfo)) { 1132 if(SiS_BridgeIsEnabled(SiS_Pr)) {
1162 if(!(tempbx & DriverMode)) { 1133 if(!(tempbx & DriverMode)) {
1163 if(SiS_BridgeInSlavemode(SiS_Pr)) { 1134 if(SiS_BridgeInSlavemode(SiS_Pr)) {
1164 tempbx |= SetSimuScanMode; 1135 tempbx |= SetSimuScanMode;
1165 } 1136 }
1166 } 1137 }
1167 } 1138 }
1168 } 1139 }
1169 } 1140 }
1170
1171 if(!(tempbx & DisableCRT2Display)) {
1172 if(tempbx & DriverMode) {
1173 if(tempbx & SetSimuScanMode) {
1174 if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) {
1175 if( (HwInfo->jChipType >= SIS_315H) &&
1176 (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) ) {
1177 if(resinfo != SIS_RI_1600x1200) {
1178 tempbx |= SetInSlaveMode;
1179 }
1180 } else {
1181 tempbx |= SetInSlaveMode;
1182 }
1183 }
1184 }
1185 } else {
1186 tempbx |= SetInSlaveMode;
1187 }
1188 }
1189 1141
1190 } 1142 if(!(tempbx & DisableCRT2Display)) {
1143 if(tempbx & DriverMode) {
1144 if(tempbx & SetSimuScanMode) {
1145 if((!(modeflag & CRT2Mode)) && (checkcrt2mode)) {
1146 if(resinfo != SIS_RI_1600x1200) {
1147 tempbx |= SetInSlaveMode;
1148 }
1149 }
1150 }
1151 } else {
1152 tempbx |= SetInSlaveMode;
1153 }
1154 }
1191 1155
1192 SiS_Pr->SiS_VBInfo = tempbx; 1156 }
1193 1157
1194 if(HwInfo->jChipType == SIS_630) { 1158 SiS_Pr->SiS_VBInfo = tempbx;
1195 SiS_SetChrontelGPIO(SiS_Pr, SiS_Pr->SiS_VBInfo);
1196 }
1197 1159
1198#ifdef TWDEBUG 1160#ifdef SIS300
1199#ifdef LINUX_KERNEL 1161 if(SiS_Pr->ChipType == SIS_630) {
1200 printk(KERN_DEBUG "sisfb: (VBInfo= 0x%04x, SetFlag=0x%04x)\n", 1162 SiS_SetChrontelGPIO(SiS_Pr, SiS_Pr->SiS_VBInfo);
1163 }
1164#endif
1165
1166#ifdef SIS_LINUX_KERNEL
1167#if 0
1168 printk(KERN_DEBUG "sisfb: (init301: VBInfo= 0x%04x, SetFlag=0x%04x)\n",
1201 SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); 1169 SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag);
1202#endif 1170#endif
1203#ifdef LINUX_XF86 1171#endif
1204 xf86DrvMsgVerb(0, X_PROBED, 3, "(init301: VBInfo=0x%04x, SetFlag=0x%04x)\n", 1172#ifdef SIS_XORG_XF86
1173#ifdef TWDEBUG
1174 xf86DrvMsg(0, X_PROBED, "(init301: VBInfo=0x%04x, SetFlag=0x%04x)\n",
1205 SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag); 1175 SiS_Pr->SiS_VBInfo, SiS_Pr->SiS_SetFlag);
1206#endif 1176#endif
1207#endif 1177#endif
@@ -1212,41 +1182,41 @@ SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1212/*********************************************/ 1182/*********************************************/
1213 1183
1214void 1184void
1215SiS_SetYPbPr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1185SiS_SetYPbPr(struct SiS_Private *SiS_Pr)
1216{ 1186{
1217 1187
1218 UCHAR temp; 1188 unsigned char temp;
1219 1189
1220 /* Note: This variable is only used on 30xLV systems. 1190 /* Note: This variable is only used on 30xLV systems.
1221 * CR38 has a different meaning on LVDS/CH7019 systems. 1191 * CR38 has a different meaning on LVDS/CH7019 systems.
1222 * On 661 and later, these bits moved to CR35. 1192 * On 661 and later, these bits moved to CR35.
1223 * 1193 *
1224 * On 301, 301B, only HiVision 1080i is supported. 1194 * On 301, 301B, only HiVision 1080i is supported.
1225 * On 30xLV, 301C, only YPbPr 1080i is supported. 1195 * On 30xLV, 301C, only YPbPr 1080i is supported.
1226 */ 1196 */
1227 1197
1228 SiS_Pr->SiS_YPbPr = 0; 1198 SiS_Pr->SiS_YPbPr = 0;
1229 if(HwInfo->jChipType >= SIS_661) return; 1199 if(SiS_Pr->ChipType >= SIS_661) return;
1230 1200
1231 if(SiS_Pr->SiS_VBType) { 1201 if(SiS_Pr->SiS_VBType) {
1232 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 1202 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
1233 SiS_Pr->SiS_YPbPr = YPbPrHiVision; 1203 SiS_Pr->SiS_YPbPr = YPbPrHiVision;
1234 } 1204 }
1235 } 1205 }
1236 1206
1237 if(HwInfo->jChipType >= SIS_315H) { 1207 if(SiS_Pr->ChipType >= SIS_315H) {
1238 if(SiS_Pr->SiS_VBType & (VB_SIS301LV302LV | VB_SIS301C)) { 1208 if(SiS_Pr->SiS_VBType & VB_SISYPBPR) {
1239 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 1209 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
1240 if(temp & 0x08) { 1210 if(temp & 0x08) {
1241 switch((temp >> 4)) { 1211 switch((temp >> 4)) {
1242 case 0x00: SiS_Pr->SiS_YPbPr = YPbPr525i; break; 1212 case 0x00: SiS_Pr->SiS_YPbPr = YPbPr525i; break;
1243 case 0x01: SiS_Pr->SiS_YPbPr = YPbPr525p; break; 1213 case 0x01: SiS_Pr->SiS_YPbPr = YPbPr525p; break;
1244 case 0x02: SiS_Pr->SiS_YPbPr = YPbPr750p; break; 1214 case 0x02: SiS_Pr->SiS_YPbPr = YPbPr750p; break;
1245 case 0x03: SiS_Pr->SiS_YPbPr = YPbPrHiVision; break; 1215 case 0x03: SiS_Pr->SiS_YPbPr = YPbPrHiVision; break;
1246 } 1216 }
1247 } 1217 }
1248 } 1218 }
1249 } 1219 }
1250 1220
1251} 1221}
1252 1222
@@ -1255,199 +1225,204 @@ SiS_SetYPbPr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1255/*********************************************/ 1225/*********************************************/
1256 1226
1257void 1227void
1258SiS_SetTVMode(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo) 1228SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
1259{ 1229{
1260 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1230 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1261 USHORT temp, temp1, resinfo = 0, romindex = 0; 1231 unsigned short temp, temp1, resinfo = 0, romindex = 0;
1262 UCHAR OutputSelect = *SiS_Pr->pSiS_OutputSelect; 1232 unsigned char OutputSelect = *SiS_Pr->pSiS_OutputSelect;
1263 1233
1264 SiS_Pr->SiS_TVMode = 0; 1234 SiS_Pr->SiS_TVMode = 0;
1265 1235
1266 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) return; 1236 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) return;
1267 if(SiS_Pr->UseCustomMode) return; 1237 if(SiS_Pr->UseCustomMode) return;
1268 1238
1269 if(ModeNo > 0x13) { 1239 if(ModeNo > 0x13) {
1270 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 1240 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
1271 } 1241 }
1272 1242
1273 if(HwInfo->jChipType < SIS_661) { 1243 if(SiS_Pr->ChipType < SIS_661) {
1274 1244
1275 if(SiS_Pr->SiS_VBInfo & SetPALTV) SiS_Pr->SiS_TVMode |= TVSetPAL; 1245 if(SiS_Pr->SiS_VBInfo & SetPALTV) SiS_Pr->SiS_TVMode |= TVSetPAL;
1276 1246
1277 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1247 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1278 temp = 0; 1248 temp = 0;
1279 if((HwInfo->jChipType == SIS_630) || 1249 if((SiS_Pr->ChipType == SIS_630) ||
1280 (HwInfo->jChipType == SIS_730)) { 1250 (SiS_Pr->ChipType == SIS_730)) {
1281 temp = 0x35; 1251 temp = 0x35;
1282 romindex = 0xfe; 1252 romindex = 0xfe;
1283 } else if(HwInfo->jChipType >= SIS_315H) { 1253 } else if(SiS_Pr->ChipType >= SIS_315H) {
1284 temp = 0x38; 1254 temp = 0x38;
1285 romindex = 0xf3; 1255 if(SiS_Pr->ChipType < XGI_20) {
1286 if(HwInfo->jChipType >= SIS_330) romindex = 0x11b; 1256 romindex = 0xf3;
1287 } 1257 if(SiS_Pr->ChipType >= SIS_330) romindex = 0x11b;
1288 if(temp) { 1258 }
1289 if(romindex && SiS_Pr->SiS_UseROM && (!(SiS_Pr->SiS_ROMNew))) { 1259 }
1290 OutputSelect = ROMAddr[romindex]; 1260 if(temp) {
1291 if(!(OutputSelect & EnablePALMN)) { 1261 if(romindex && SiS_Pr->SiS_UseROM && (!(SiS_Pr->SiS_ROMNew))) {
1292 SiS_SetRegAND(SiS_Pr->SiS_P3d4,temp,0x3F); 1262 OutputSelect = ROMAddr[romindex];
1293 } 1263 if(!(OutputSelect & EnablePALMN)) {
1294 } 1264 SiS_SetRegAND(SiS_Pr->SiS_P3d4,temp,0x3F);
1295 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,temp); 1265 }
1296 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 1266 }
1297 if(temp1 & EnablePALM) { /* 0x40 */ 1267 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,temp);
1298 SiS_Pr->SiS_TVMode |= TVSetPALM; 1268 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
1299 SiS_Pr->SiS_TVMode &= ~TVSetPAL; 1269 if(temp1 & EnablePALM) { /* 0x40 */
1300 } else if(temp1 & EnablePALN) { /* 0x80 */ 1270 SiS_Pr->SiS_TVMode |= TVSetPALM;
1301 SiS_Pr->SiS_TVMode |= TVSetPALN; 1271 SiS_Pr->SiS_TVMode &= ~TVSetPAL;
1302 } 1272 } else if(temp1 & EnablePALN) { /* 0x80 */
1303 } else { 1273 SiS_Pr->SiS_TVMode |= TVSetPALN;
1304 if(temp1 & EnableNTSCJ) { /* 0x40 */ 1274 }
1305 SiS_Pr->SiS_TVMode |= TVSetNTSCJ; 1275 } else {
1306 } 1276 if(temp1 & EnableNTSCJ) { /* 0x40 */
1307 } 1277 SiS_Pr->SiS_TVMode |= TVSetNTSCJ;
1308 } 1278 }
1309 /* Translate HiVision/YPbPr to our new flags */ 1279 }
1310 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 1280 }
1311 if(SiS_Pr->SiS_YPbPr == YPbPr750p) SiS_Pr->SiS_TVMode |= TVSetYPbPr750p; 1281 /* Translate HiVision/YPbPr to our new flags */
1312 else if(SiS_Pr->SiS_YPbPr == YPbPr525p) SiS_Pr->SiS_TVMode |= TVSetYPbPr525p; 1282 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
1313 else if(SiS_Pr->SiS_YPbPr == YPbPrHiVision) SiS_Pr->SiS_TVMode |= TVSetHiVision; 1283 if(SiS_Pr->SiS_YPbPr == YPbPr750p) SiS_Pr->SiS_TVMode |= TVSetYPbPr750p;
1314 else SiS_Pr->SiS_TVMode |= TVSetYPbPr525i; 1284 else if(SiS_Pr->SiS_YPbPr == YPbPr525p) SiS_Pr->SiS_TVMode |= TVSetYPbPr525p;
1315 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p | TVSetYPbPr525p | TVSetYPbPr525i)) { 1285 else if(SiS_Pr->SiS_YPbPr == YPbPrHiVision) SiS_Pr->SiS_TVMode |= TVSetHiVision;
1316 SiS_Pr->SiS_VBInfo &= ~SetCRT2ToHiVision; 1286 else SiS_Pr->SiS_TVMode |= TVSetYPbPr525i;
1317 SiS_Pr->SiS_VBInfo |= SetCRT2ToYPbPr525750; 1287 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p | TVSetYPbPr525p | TVSetYPbPr525i)) {
1318 } else if(SiS_Pr->SiS_TVMode & TVSetHiVision) { 1288 SiS_Pr->SiS_VBInfo &= ~SetCRT2ToHiVision;
1319 SiS_Pr->SiS_TVMode |= TVSetPAL; 1289 SiS_Pr->SiS_VBInfo |= SetCRT2ToYPbPr525750;
1320 } 1290 } else if(SiS_Pr->SiS_TVMode & TVSetHiVision) {
1321 } 1291 SiS_Pr->SiS_TVMode |= TVSetPAL;
1322 } else if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 1292 }
1323 if(SiS_Pr->SiS_CHOverScan) { 1293 }
1324 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 1294 } else if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
1325 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 1295 if(SiS_Pr->SiS_CHOverScan) {
1326 if((temp & TVOverScan) || (SiS_Pr->SiS_CHOverScan == 1)) { 1296 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
1327 SiS_Pr->SiS_TVMode |= TVSetCHOverScan; 1297 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
1328 } 1298 if((temp & TVOverScan) || (SiS_Pr->SiS_CHOverScan == 1)) {
1329 } else if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 1299 SiS_Pr->SiS_TVMode |= TVSetCHOverScan;
1330 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x79); 1300 }
1331 if((temp & 0x80) || (SiS_Pr->SiS_CHOverScan == 1)) { 1301 } else if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
1332 SiS_Pr->SiS_TVMode |= TVSetCHOverScan; 1302 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x79);
1333 } 1303 if((temp & 0x80) || (SiS_Pr->SiS_CHOverScan == 1)) {
1334 } 1304 SiS_Pr->SiS_TVMode |= TVSetCHOverScan;
1335 if(SiS_Pr->SiS_CHSOverScan) { 1305 }
1336 SiS_Pr->SiS_TVMode |= TVSetCHOverScan; 1306 }
1337 } 1307 if(SiS_Pr->SiS_CHSOverScan) {
1338 } 1308 SiS_Pr->SiS_TVMode |= TVSetCHOverScan;
1339 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 1309 }
1340 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38); 1310 }
1341 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 1311 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
1342 if(temp & EnablePALM) SiS_Pr->SiS_TVMode |= TVSetPALM; 1312 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x38);
1343 else if(temp & EnablePALN) SiS_Pr->SiS_TVMode |= TVSetPALN; 1313 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
1344 } else { 1314 if(temp & EnablePALM) SiS_Pr->SiS_TVMode |= TVSetPALM;
1345 if(temp & EnableNTSCJ) { 1315 else if(temp & EnablePALN) SiS_Pr->SiS_TVMode |= TVSetPALN;
1346 SiS_Pr->SiS_TVMode |= TVSetNTSCJ; 1316 } else {
1347 } 1317 if(temp & EnableNTSCJ) {
1348 } 1318 SiS_Pr->SiS_TVMode |= TVSetNTSCJ;
1349 } 1319 }
1350 } 1320 }
1321 }
1322 }
1351 1323
1352 } else { /* 661 and later */ 1324 } else { /* 661 and later */
1353 1325
1354 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 1326 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
1355 if(temp1 & 0x01) { 1327 if(temp1 & 0x01) {
1356 SiS_Pr->SiS_TVMode |= TVSetPAL; 1328 SiS_Pr->SiS_TVMode |= TVSetPAL;
1357 if(temp1 & 0x08) { 1329 if(temp1 & 0x08) {
1358 SiS_Pr->SiS_TVMode |= TVSetPALN; 1330 SiS_Pr->SiS_TVMode |= TVSetPALN;
1359 } else if(temp1 & 0x04) { 1331 } else if(temp1 & 0x04) {
1360 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1332 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1361 SiS_Pr->SiS_TVMode &= ~TVSetPAL; 1333 SiS_Pr->SiS_TVMode &= ~TVSetPAL;
1362 } 1334 }
1363 SiS_Pr->SiS_TVMode |= TVSetPALM; 1335 SiS_Pr->SiS_TVMode |= TVSetPALM;
1364 } 1336 }
1365 } else { 1337 } else {
1366 if(temp1 & 0x02) { 1338 if(temp1 & 0x02) {
1367 SiS_Pr->SiS_TVMode |= TVSetNTSCJ; 1339 SiS_Pr->SiS_TVMode |= TVSetNTSCJ;
1368 } 1340 }
1369 } 1341 }
1370 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 1342 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
1371 if(SiS_Pr->SiS_CHOverScan) { 1343 if(SiS_Pr->SiS_CHOverScan) {
1372 if((temp1 & 0x10) || (SiS_Pr->SiS_CHOverScan == 1)) { 1344 if((temp1 & 0x10) || (SiS_Pr->SiS_CHOverScan == 1)) {
1373 SiS_Pr->SiS_TVMode |= TVSetCHOverScan; 1345 SiS_Pr->SiS_TVMode |= TVSetCHOverScan;
1374 } 1346 }
1375 } 1347 }
1376 } 1348 }
1377 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1349 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1378 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 1350 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
1379 temp1 &= 0xe0; 1351 temp1 &= 0xe0;
1380 if(temp1 == 0x00) SiS_Pr->SiS_TVMode |= TVSetYPbPr525i; 1352 if(temp1 == 0x00) SiS_Pr->SiS_TVMode |= TVSetYPbPr525i;
1381 else if(temp1 == 0x20) SiS_Pr->SiS_TVMode |= TVSetYPbPr525p; 1353 else if(temp1 == 0x20) SiS_Pr->SiS_TVMode |= TVSetYPbPr525p;
1382 else if(temp1 == 0x40) SiS_Pr->SiS_TVMode |= TVSetYPbPr750p; 1354 else if(temp1 == 0x40) SiS_Pr->SiS_TVMode |= TVSetYPbPr750p;
1383 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 1355 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
1384 SiS_Pr->SiS_TVMode |= (TVSetHiVision | TVSetPAL); 1356 SiS_Pr->SiS_TVMode |= (TVSetHiVision | TVSetPAL);
1385 } 1357 }
1386 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToYPbPr525750 | SetCRT2ToHiVision)) { 1358 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToYPbPr525750 | SetCRT2ToHiVision)) {
1387 if(resinfo == SIS_RI_800x480 || resinfo == SIS_RI_1024x576 || resinfo == SIS_RI_1280x720) { 1359 if(resinfo == SIS_RI_800x480 || resinfo == SIS_RI_1024x576 || resinfo == SIS_RI_1280x720) {
1388 SiS_Pr->SiS_TVMode |= TVAspect169; 1360 SiS_Pr->SiS_TVMode |= TVAspect169;
1389 } else { 1361 } else {
1390 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x39); 1362 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x39);
1391 if(temp1 & 0x02) { 1363 if(temp1 & 0x02) {
1392 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p | TVSetHiVision)) { 1364 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p | TVSetHiVision)) {
1393 SiS_Pr->SiS_TVMode |= TVAspect169; 1365 SiS_Pr->SiS_TVMode |= TVAspect169;
1394 } else { 1366 } else {
1395 SiS_Pr->SiS_TVMode |= TVAspect43LB; 1367 SiS_Pr->SiS_TVMode |= TVAspect43LB;
1396 } 1368 }
1397 } else { 1369 } else {
1398 SiS_Pr->SiS_TVMode |= TVAspect43; 1370 SiS_Pr->SiS_TVMode |= TVAspect43;
1399 } 1371 }
1400 } 1372 }
1401 } 1373 }
1402 } 1374 }
1403 } 1375 }
1404 1376
1405 if(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART) SiS_Pr->SiS_TVMode |= TVSetPAL; 1377 if(SiS_Pr->SiS_VBInfo & SetCRT2ToSCART) SiS_Pr->SiS_TVMode |= TVSetPAL;
1406 1378
1407 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1379 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1408 1380
1409 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 1381 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
1410 SiS_Pr->SiS_TVMode |= TVSetPAL; 1382 SiS_Pr->SiS_TVMode |= TVSetPAL;
1411 SiS_Pr->SiS_TVMode &= ~(TVSetPALM | TVSetPALN | TVSetNTSCJ); 1383 SiS_Pr->SiS_TVMode &= ~(TVSetPALM | TVSetPALN | TVSetNTSCJ);
1412 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 1384 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
1413 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525i | TVSetYPbPr525p | TVSetYPbPr750p)) { 1385 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525i | TVSetYPbPr525p | TVSetYPbPr750p)) {
1414 SiS_Pr->SiS_TVMode &= ~(TVSetPAL | TVSetNTSCJ | TVSetPALM | TVSetPALN); 1386 SiS_Pr->SiS_TVMode &= ~(TVSetPAL | TVSetNTSCJ | TVSetPALM | TVSetPALN);
1415 } 1387 }
1416 } 1388 }
1417 1389
1418 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 1390 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
1419 if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) { 1391 if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) {
1420 SiS_Pr->SiS_TVMode |= TVSetTVSimuMode; 1392 SiS_Pr->SiS_TVMode |= TVSetTVSimuMode;
1421 } 1393 }
1422 } 1394 }
1423 1395
1424 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) { 1396 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) {
1425 /* BIOS sets TVNTSC1024 without checking 525p here. Wrong? */ 1397 if(resinfo == SIS_RI_1024x768) {
1426 if(!(SiS_Pr->SiS_TVMode & (TVSetHiVision | TVSetYPbPr525p | TVSetYPbPr750p))) { 1398 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) {
1427 if(resinfo == SIS_RI_1024x768) { 1399 SiS_Pr->SiS_TVMode |= TVSet525p1024;
1428 SiS_Pr->SiS_TVMode |= TVSetNTSC1024; 1400 } else if(!(SiS_Pr->SiS_TVMode & (TVSetHiVision | TVSetYPbPr750p))) {
1429 } 1401 SiS_Pr->SiS_TVMode |= TVSetNTSC1024;
1430 } 1402 }
1431 } 1403 }
1404 }
1432 1405
1433 SiS_Pr->SiS_TVMode |= TVRPLLDIV2XO; 1406 SiS_Pr->SiS_TVMode |= TVRPLLDIV2XO;
1434 if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) && 1407 if((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) &&
1435 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 1408 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
1436 SiS_Pr->SiS_TVMode &= ~TVRPLLDIV2XO; 1409 SiS_Pr->SiS_TVMode &= ~TVRPLLDIV2XO;
1437 } else if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p)) { 1410 } else if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p)) {
1438 SiS_Pr->SiS_TVMode &= ~TVRPLLDIV2XO; 1411 SiS_Pr->SiS_TVMode &= ~TVRPLLDIV2XO;
1439 } else if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { 1412 } else if(!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) {
1440 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) { 1413 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
1441 SiS_Pr->SiS_TVMode &= ~TVRPLLDIV2XO; 1414 SiS_Pr->SiS_TVMode &= ~TVRPLLDIV2XO;
1442 } 1415 }
1443 } 1416 }
1444 1417
1445 } 1418 }
1446 1419
1447 SiS_Pr->SiS_VBInfo &= ~SetPALTV; 1420 SiS_Pr->SiS_VBInfo &= ~SetPALTV;
1448 1421
1422#ifdef SIS_XORG_XF86
1449#ifdef TWDEBUG 1423#ifdef TWDEBUG
1450 xf86DrvMsg(0, X_INFO, "(init301: TVMode %x, VBInfo %x)\n", SiS_Pr->SiS_TVMode, SiS_Pr->SiS_VBInfo); 1424 xf86DrvMsg(0, X_INFO, "(init301: TVMode %x, VBInfo %x)\n", SiS_Pr->SiS_TVMode, SiS_Pr->SiS_VBInfo);
1425#endif
1451#endif 1426#endif
1452} 1427}
1453 1428
@@ -1455,41 +1430,46 @@ SiS_SetTVMode(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_IN
1455/* GET LCD INFO */ 1430/* GET LCD INFO */
1456/*********************************************/ 1431/*********************************************/
1457 1432
1458static USHORT 1433static unsigned short
1459SiS_GetBIOSLCDResInfo(SiS_Private *SiS_Pr) 1434SiS_GetBIOSLCDResInfo(struct SiS_Private *SiS_Pr)
1460{ 1435{
1461 USHORT temp = SiS_Pr->SiS_LCDResInfo; 1436 unsigned short temp = SiS_Pr->SiS_LCDResInfo;
1462 /* Translate my LCDResInfo to BIOS value */ 1437 /* Translate my LCDResInfo to BIOS value */
1463 if(temp == Panel_1280x768_2) temp = Panel_1280x768; 1438 switch(temp) {
1464 if(temp == Panel_1280x800_2) temp = Panel_1280x800; 1439 case Panel_1280x768_2: temp = Panel_1280x768; break;
1440 case Panel_1280x800_2: temp = Panel_1280x800; break;
1441 case Panel_1280x854: temp = Panel661_1280x854; break;
1442 }
1465 return temp; 1443 return temp;
1466} 1444}
1467 1445
1468static void 1446static void
1469SiS_GetLCDInfoBIOS(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 1447SiS_GetLCDInfoBIOS(struct SiS_Private *SiS_Pr)
1470{ 1448{
1471#ifdef SIS315H 1449#ifdef SIS315H
1472 UCHAR *ROMAddr; 1450 unsigned char *ROMAddr;
1473 USHORT temp; 1451 unsigned short temp;
1474 1452
1453#ifdef SIS_XORG_XF86
1475#ifdef TWDEBUG 1454#ifdef TWDEBUG
1476 xf86DrvMsg(0, X_INFO, "Paneldata driver: [%d %d] [H %d %d] [V %d %d] [C %d 0x%02x 0x%02x]\n", 1455 xf86DrvMsg(0, X_INFO, "Paneldata driver: [%d %d] [H %d %d] [V %d %d] [C %d 0x%02x 0x%02x]\n",
1477 SiS_Pr->PanelHT, SiS_Pr->PanelVT, 1456 SiS_Pr->PanelHT, SiS_Pr->PanelVT,
1478 SiS_Pr->PanelHRS, SiS_Pr->PanelHRE, 1457 SiS_Pr->PanelHRS, SiS_Pr->PanelHRE,
1479 SiS_Pr->PanelVRS, SiS_Pr->PanelVRE, 1458 SiS_Pr->PanelVRS, SiS_Pr->PanelVRE,
1480 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK, 1459 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK,
1481 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_A, 1460 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_A,
1482 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_B); 1461 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_B);
1483#endif 1462#endif
1463#endif
1484 1464
1485 if((ROMAddr = GetLCDStructPtr661(SiS_Pr, HwInfo))) { 1465 if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) {
1486 if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) { 1466 if((temp = SISGETROMW(6)) != SiS_Pr->PanelHT) {
1487 SiS_Pr->SiS_NeedRomModeData = TRUE; 1467 SiS_Pr->SiS_NeedRomModeData = TRUE;
1488 SiS_Pr->PanelHT = temp; 1468 SiS_Pr->PanelHT = temp;
1489 } 1469 }
1490 if((temp = SISGETROMW(8)) != SiS_Pr->PanelVT) { 1470 if((temp = SISGETROMW(8)) != SiS_Pr->PanelVT) {
1491 SiS_Pr->SiS_NeedRomModeData = TRUE; 1471 SiS_Pr->SiS_NeedRomModeData = TRUE;
1492 SiS_Pr->PanelVT = temp; 1472 SiS_Pr->PanelVT = temp;
1493 } 1473 }
1494 SiS_Pr->PanelHRS = SISGETROMW(10); 1474 SiS_Pr->PanelHRS = SISGETROMW(10);
1495 SiS_Pr->PanelHRE = SISGETROMW(12); 1475 SiS_Pr->PanelHRE = SISGETROMW(12);
@@ -1497,56 +1477,58 @@ SiS_GetLCDInfoBIOS(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
1497 SiS_Pr->PanelVRE = SISGETROMW(16); 1477 SiS_Pr->PanelVRE = SISGETROMW(16);
1498 SiS_Pr->PanelVCLKIdx315 = VCLK_CUSTOM_315; 1478 SiS_Pr->PanelVCLKIdx315 = VCLK_CUSTOM_315;
1499 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].CLOCK = 1479 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].CLOCK =
1500 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].CLOCK = (USHORT)((UCHAR)ROMAddr[18]); 1480 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].CLOCK = (unsigned short)((unsigned char)ROMAddr[18]);
1501 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].SR2B = 1481 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].SR2B =
1502 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_A = ROMAddr[19]; 1482 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_A = ROMAddr[19];
1503 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].SR2C = 1483 SiS_Pr->SiS_VCLKData[VCLK_CUSTOM_315].SR2C =
1504 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_B = ROMAddr[20]; 1484 SiS_Pr->SiS_VBVCLKData[VCLK_CUSTOM_315].Part4_B = ROMAddr[20];
1505 1485
1486#ifdef SIS_XORG_XF86
1506#ifdef TWDEBUG 1487#ifdef TWDEBUG
1507 xf86DrvMsg(0, X_INFO, "Paneldata BIOS: [%d %d] [H %d %d] [V %d %d] [C %d 0x%02x 0x%02x]\n", 1488 xf86DrvMsg(0, X_INFO, "Paneldata BIOS: [%d %d] [H %d %d] [V %d %d] [C %d 0x%02x 0x%02x]\n",
1508 SiS_Pr->PanelHT, SiS_Pr->PanelVT, 1489 SiS_Pr->PanelHT, SiS_Pr->PanelVT,
1509 SiS_Pr->PanelHRS, SiS_Pr->PanelHRE, 1490 SiS_Pr->PanelHRS, SiS_Pr->PanelHRE,
1510 SiS_Pr->PanelVRS, SiS_Pr->PanelVRE, 1491 SiS_Pr->PanelVRS, SiS_Pr->PanelVRE,
1511 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK, 1492 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].CLOCK,
1512 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_A, 1493 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_A,
1513 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_B); 1494 SiS_Pr->SiS_VBVCLKData[SiS_Pr->PanelVCLKIdx315].Part4_B);
1514#endif 1495#endif
1496#endif
1515 1497
1516 } 1498 }
1517#endif 1499#endif
1518} 1500}
1519 1501
1520static void 1502static void
1521SiS_CheckScaling(SiS_Private *SiS_Pr, USHORT resinfo, const UCHAR *nonscalingmodes) 1503SiS_CheckScaling(struct SiS_Private *SiS_Pr, unsigned short resinfo,
1522{ 1504 const unsigned char *nonscalingmodes)
1523 int i = 0; 1505{
1524 while(nonscalingmodes[i] != 0xff) { 1506 int i = 0;
1525 if(nonscalingmodes[i++] == resinfo) { 1507 while(nonscalingmodes[i] != 0xff) {
1526 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) || 1508 if(nonscalingmodes[i++] == resinfo) {
1527 (SiS_Pr->UsePanelScaler == -1)) { 1509 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) ||
1528 SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 1510 (SiS_Pr->UsePanelScaler == -1)) {
1529 } 1511 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
1530 break; 1512 }
1531 } 1513 break;
1532 } 1514 }
1515 }
1533} 1516}
1534 1517
1535void 1518void
1536SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 1519SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
1537 PSIS_HW_INFO HwInfo)
1538{ 1520{
1521 unsigned short temp,modeflag,resinfo=0,modexres=0,modeyres=0;
1522 BOOLEAN panelcanscale = FALSE;
1539#ifdef SIS300 1523#ifdef SIS300
1540 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 1524 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
1541 const unsigned char SiS300SeriesLCDRes[] = 1525 static const unsigned char SiS300SeriesLCDRes[] =
1542 { 0, 1, 2, 3, 7, 4, 5, 8, 1526 { 0, 1, 2, 3, 7, 4, 5, 8,
1543 0, 0, 10, 0, 0, 0, 0, 15 }; 1527 0, 0, 10, 0, 0, 0, 0, 15 };
1544#endif 1528#endif
1545#ifdef SIS315H 1529#ifdef SIS315H
1546 UCHAR *myptr = NULL; 1530 unsigned char *myptr = NULL;
1547#endif 1531#endif
1548 USHORT temp,modeflag,resinfo=0,modexres=0,modeyres=0;
1549 BOOLEAN panelcanscale = FALSE;
1550 1532
1551 SiS_Pr->SiS_LCDResInfo = 0; 1533 SiS_Pr->SiS_LCDResInfo = 0;
1552 SiS_Pr->SiS_LCDTypeInfo = 0; 1534 SiS_Pr->SiS_LCDTypeInfo = 0;
@@ -1557,14 +1539,14 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1557 SiS_Pr->PanelVRE = 999; /* VSync end */ 1539 SiS_Pr->PanelVRE = 999; /* VSync end */
1558 SiS_Pr->SiS_NeedRomModeData = FALSE; 1540 SiS_Pr->SiS_NeedRomModeData = FALSE;
1559 1541
1542 /* Alternative 1600x1200@60 timing for 1600x1200 LCDA */
1543 SiS_Pr->Alternate1600x1200 = FALSE;
1544
1560 if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) return; 1545 if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA))) return;
1561 1546
1562 if(ModeNo <= 0x13) { 1547 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
1563 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 1548
1564 } else if(SiS_Pr->UseCustomMode) { 1549 if((ModeNo > 0x13) && (!SiS_Pr->UseCustomMode)) {
1565 modeflag = SiS_Pr->CModeFlag;
1566 } else {
1567 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
1568 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 1550 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
1569 modexres = SiS_Pr->SiS_ModeResInfo[resinfo].HTotal; 1551 modexres = SiS_Pr->SiS_ModeResInfo[resinfo].HTotal;
1570 modeyres = SiS_Pr->SiS_ModeResInfo[resinfo].VTotal; 1552 modeyres = SiS_Pr->SiS_ModeResInfo[resinfo].VTotal;
@@ -1575,16 +1557,16 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1575 /* For broken BIOSes: Assume 1024x768 */ 1557 /* For broken BIOSes: Assume 1024x768 */
1576 if(temp == 0) temp = 0x02; 1558 if(temp == 0) temp = 0x02;
1577 1559
1578 if((HwInfo->jChipType >= SIS_661) || (SiS_Pr->SiS_ROMNew)) { 1560 if((SiS_Pr->ChipType >= SIS_661) || (SiS_Pr->SiS_ROMNew)) {
1579 SiS_Pr->SiS_LCDTypeInfo = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x39) & 0x7c) >> 2; 1561 SiS_Pr->SiS_LCDTypeInfo = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x39) & 0x7c) >> 2;
1580 } else if((HwInfo->jChipType < SIS_315H) || (HwInfo->jChipType >= SIS_661)) { 1562 } else if((SiS_Pr->ChipType < SIS_315H) || (SiS_Pr->ChipType >= SIS_661)) {
1581 SiS_Pr->SiS_LCDTypeInfo = temp >> 4; 1563 SiS_Pr->SiS_LCDTypeInfo = temp >> 4;
1582 } else { 1564 } else {
1583 SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1; 1565 SiS_Pr->SiS_LCDTypeInfo = (temp & 0x0F) - 1;
1584 } 1566 }
1585 temp &= 0x0f; 1567 temp &= 0x0f;
1586#ifdef SIS300 1568#ifdef SIS300
1587 if(HwInfo->jChipType < SIS_315H) { 1569 if(SiS_Pr->ChipType < SIS_315H) {
1588 /* Very old BIOSes only know 7 sizes (NetVista 2179, 1.01g) */ 1570 /* Very old BIOSes only know 7 sizes (NetVista 2179, 1.01g) */
1589 if(SiS_Pr->SiS_VBType & VB_SIS301) { 1571 if(SiS_Pr->SiS_VBType & VB_SIS301) {
1590 if(temp < 0x0f) temp &= 0x07; 1572 if(temp < 0x0f) temp &= 0x07;
@@ -1595,17 +1577,22 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1595#endif 1577#endif
1596 1578
1597 /* Translate to our internal types */ 1579 /* Translate to our internal types */
1598 if(HwInfo->jChipType == SIS_550) { 1580#ifdef SIS315H
1599 if(temp == Panel310_640x480_2) temp = Panel_640x480_2; 1581 if(SiS_Pr->ChipType == SIS_550) {
1600 if(temp == Panel310_640x480_3) temp = Panel_640x480_3; 1582 if (temp == Panel310_1152x768) temp = Panel_320x240_2; /* Verified working */
1583 else if(temp == Panel310_320x240_2) temp = Panel_320x240_2;
1584 else if(temp == Panel310_320x240_3) temp = Panel_320x240_3;
1585 } else if(SiS_Pr->ChipType >= SIS_661) {
1586 if(temp == Panel661_1280x854) temp = Panel_1280x854;
1601 } 1587 }
1588#endif
1602 1589
1603 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { /* SiS LVDS */ 1590 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { /* SiS LVDS */
1604 if(temp == Panel310_1280x768) { 1591 if(temp == Panel310_1280x768) {
1605 temp = Panel_1280x768_2; 1592 temp = Panel_1280x768_2;
1606 } 1593 }
1607 if(SiS_Pr->SiS_ROMNew) { 1594 if(SiS_Pr->SiS_ROMNew) {
1608 if(temp == Panel661_1280x800) { 1595 if(temp == Panel661_1280x800) {
1609 temp = Panel_1280x800_2; 1596 temp = Panel_1280x800_2;
1610 } 1597 }
1611 } 1598 }
@@ -1613,13 +1600,17 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1613 1600
1614 SiS_Pr->SiS_LCDResInfo = temp; 1601 SiS_Pr->SiS_LCDResInfo = temp;
1615 1602
1603#ifdef SIS300
1616 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1604 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
1617 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) { 1605 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
1618 SiS_Pr->SiS_LCDResInfo = Panel_Barco1366; 1606 SiS_Pr->SiS_LCDResInfo = Panel_Barco1366;
1619 } else if(SiS_Pr->SiS_CustomT == CUT_PANEL848) { 1607 } else if(SiS_Pr->SiS_CustomT == CUT_PANEL848) {
1620 SiS_Pr->SiS_LCDResInfo = Panel_848x480; 1608 SiS_Pr->SiS_LCDResInfo = Panel_848x480;
1609 } else if(SiS_Pr->SiS_CustomT == CUT_PANEL856) {
1610 SiS_Pr->SiS_LCDResInfo = Panel_856x480;
1621 } 1611 }
1622 } 1612 }
1613#endif
1623 1614
1624 if(SiS_Pr->SiS_VBType & VB_SISVB) { 1615 if(SiS_Pr->SiS_VBType & VB_SISVB) {
1625 if(SiS_Pr->SiS_LCDResInfo < SiS_Pr->SiS_PanelMin301) 1616 if(SiS_Pr->SiS_LCDResInfo < SiS_Pr->SiS_PanelMin301)
@@ -1633,10 +1624,16 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1633 SiS_Pr->SiS_LCDInfo = temp & ~0x000e; 1624 SiS_Pr->SiS_LCDInfo = temp & ~0x000e;
1634 /* Need temp below! */ 1625 /* Need temp below! */
1635 1626
1636 /* These can't scale no matter what */ 1627 /* These must/can't scale no matter what */
1637 switch(SiS_Pr->SiS_LCDResInfo) { 1628 switch(SiS_Pr->SiS_LCDResInfo) {
1629 case Panel_320x240_1:
1630 case Panel_320x240_2:
1631 case Panel_320x240_3:
1638 case Panel_1280x960: 1632 case Panel_1280x960:
1639 SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD; 1633 SiS_Pr->SiS_LCDInfo &= ~DontExpandLCD;
1634 break;
1635 case Panel_640x480:
1636 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
1640 } 1637 }
1641 1638
1642 panelcanscale = (SiS_Pr->SiS_LCDInfo & DontExpandLCD) ? TRUE : FALSE; 1639 panelcanscale = (SiS_Pr->SiS_LCDInfo & DontExpandLCD) ? TRUE : FALSE;
@@ -1646,41 +1643,41 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1646 1643
1647 /* Dual link, Pass 1:1 BIOS default, etc. */ 1644 /* Dual link, Pass 1:1 BIOS default, etc. */
1648#ifdef SIS315H 1645#ifdef SIS315H
1649 if(HwInfo->jChipType >= SIS_661) { 1646 if(SiS_Pr->ChipType >= SIS_661) {
1650 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 1647 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
1651 if(temp & 0x08) SiS_Pr->SiS_LCDInfo |= LCDPass11; 1648 if(temp & 0x08) SiS_Pr->SiS_LCDInfo |= LCDPass11;
1652 } 1649 }
1653 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 1650 if(SiS_Pr->SiS_VBType & VB_SISDUALLINK) {
1654 if(SiS_Pr->SiS_ROMNew) { 1651 if(SiS_Pr->SiS_ROMNew) {
1655 if(temp & 0x02) SiS_Pr->SiS_LCDInfo |= LCDDualLink; 1652 if(temp & 0x02) SiS_Pr->SiS_LCDInfo |= LCDDualLink;
1656 } else if((myptr = GetLCDStructPtr661(SiS_Pr, HwInfo))) { 1653 } else if((myptr = GetLCDStructPtr661(SiS_Pr))) {
1657 if(myptr[2] & 0x01) SiS_Pr->SiS_LCDInfo |= LCDDualLink; 1654 if(myptr[2] & 0x01) SiS_Pr->SiS_LCDInfo |= LCDDualLink;
1658 } 1655 }
1659 } 1656 }
1660 } else if(HwInfo->jChipType >= SIS_315H) { 1657 } else if(SiS_Pr->ChipType >= SIS_315H) {
1661 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 1658 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
1662 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x39) & 0x01) SiS_Pr->SiS_LCDInfo |= LCDPass11; 1659 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x39) & 0x01) SiS_Pr->SiS_LCDInfo |= LCDPass11;
1663 } 1660 }
1664 if((SiS_Pr->SiS_ROMNew) && (!(SiS_Pr->PanelSelfDetected))) { 1661 if((SiS_Pr->SiS_ROMNew) && (!(SiS_Pr->PanelSelfDetected))) {
1665 SiS_Pr->SiS_LCDInfo &= ~(LCDRGB18Bit); 1662 SiS_Pr->SiS_LCDInfo &= ~(LCDRGB18Bit);
1666 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35); 1663 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x35);
1667 if(temp & 0x01) SiS_Pr->SiS_LCDInfo |= LCDRGB18Bit; 1664 if(temp & 0x01) SiS_Pr->SiS_LCDInfo |= LCDRGB18Bit;
1668 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 1665 if(SiS_Pr->SiS_VBType & VB_SISDUALLINK) {
1669 if(temp & 0x02) SiS_Pr->SiS_LCDInfo |= LCDDualLink; 1666 if(temp & 0x02) SiS_Pr->SiS_LCDInfo |= LCDDualLink;
1670 } 1667 }
1671 } else if(!(SiS_Pr->SiS_ROMNew)) { 1668 } else if(!(SiS_Pr->SiS_ROMNew)) {
1672 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 1669 if(SiS_Pr->SiS_VBType & VB_SISDUALLINK) {
1673 if((SiS_Pr->SiS_CustomT == CUT_CLEVO1024) && 1670 if((SiS_Pr->SiS_CustomT == CUT_CLEVO1024) &&
1674 (SiS_Pr->SiS_LCDResInfo == Panel_1024x768)) { 1671 (SiS_Pr->SiS_LCDResInfo == Panel_1024x768)) {
1675 SiS_Pr->SiS_LCDInfo |= LCDDualLink; 1672 SiS_Pr->SiS_LCDInfo |= LCDDualLink;
1676 } 1673 }
1677 if((SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) || 1674 if((SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) ||
1678 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) || 1675 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) ||
1679 (SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) || 1676 (SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) ||
1680 (SiS_Pr->SiS_LCDResInfo == Panel_1680x1050)) { 1677 (SiS_Pr->SiS_LCDResInfo == Panel_1680x1050)) {
1681 SiS_Pr->SiS_LCDInfo |= LCDDualLink; 1678 SiS_Pr->SiS_LCDInfo |= LCDDualLink;
1682 } 1679 }
1683 } 1680 }
1684 } 1681 }
1685 } 1682 }
1686#endif 1683#endif
@@ -1691,12 +1688,12 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1691 SiS_Pr->SiS_LCDInfo &= ~LCDPass11; 1688 SiS_Pr->SiS_LCDInfo &= ~LCDPass11;
1692 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { 1689 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
1693 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { 1690 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
1694 /* Always center screen on SiS LVDS (if scaling is disabled) */ 1691 /* Always center screen on SiS LVDS (if scaling is disabled) */
1695 SiS_Pr->SiS_LCDInfo &= ~LCDPass11; 1692 SiS_Pr->SiS_LCDInfo &= ~LCDPass11;
1696 } else { 1693 } else {
1697 /* By default, pass 1:1 on SiS TMDS (if scaling is supported) */ 1694 /* By default, pass 1:1 on SiS TMDS (if scaling is supported) */
1698 if(panelcanscale) SiS_Pr->SiS_LCDInfo |= LCDPass11; 1695 if(panelcanscale) SiS_Pr->SiS_LCDInfo |= LCDPass11;
1699 if(SiS_Pr->CenterScreen == 1) SiS_Pr->SiS_LCDInfo &= ~LCDPass11; 1696 if(SiS_Pr->CenterScreen == 1) SiS_Pr->SiS_LCDInfo &= ~LCDPass11;
1700 } 1697 }
1701 } 1698 }
1702 1699
@@ -1704,19 +1701,15 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1704 SiS_Pr->PanelVCLKIdx315 = VCLK108_2_315; 1701 SiS_Pr->PanelVCLKIdx315 = VCLK108_2_315;
1705 1702
1706 switch(SiS_Pr->SiS_LCDResInfo) { 1703 switch(SiS_Pr->SiS_LCDResInfo) {
1707 case Panel_320x480: SiS_Pr->PanelXRes = 320; SiS_Pr->PanelYRes = 480; 1704 case Panel_320x240_1:
1708 SiS_Pr->PanelHT = 400; SiS_Pr->PanelVT = 525; 1705 case Panel_320x240_2:
1709 SiS_Pr->PanelVCLKIdx300 = VCLK28; 1706 case Panel_320x240_3: SiS_Pr->PanelXRes = 640; SiS_Pr->PanelYRes = 480;
1710 SiS_Pr->PanelVCLKIdx315 = VCLK28; 1707 SiS_Pr->PanelVRS = 24; SiS_Pr->PanelVRE = 3;
1711 break;
1712 case Panel_640x480_2:
1713 case Panel_640x480_3: SiS_Pr->PanelXRes = 640; SiS_Pr->PanelYRes = 480;
1714 SiS_Pr->PanelVRS = 24; SiS_Pr->PanelVRE = 3;
1715 SiS_Pr->PanelVCLKIdx300 = VCLK28; 1708 SiS_Pr->PanelVCLKIdx300 = VCLK28;
1716 SiS_Pr->PanelVCLKIdx315 = VCLK28; 1709 SiS_Pr->PanelVCLKIdx315 = VCLK28;
1717 break; 1710 break;
1718 case Panel_640x480: SiS_Pr->PanelXRes = 640; SiS_Pr->PanelYRes = 480; 1711 case Panel_640x480: SiS_Pr->PanelXRes = 640; SiS_Pr->PanelYRes = 480;
1719 SiS_Pr->PanelVRE = 3; 1712 SiS_Pr->PanelVRE = 3;
1720 SiS_Pr->PanelVCLKIdx300 = VCLK28; 1713 SiS_Pr->PanelVCLKIdx300 = VCLK28;
1721 SiS_Pr->PanelVCLKIdx315 = VCLK28; 1714 SiS_Pr->PanelVCLKIdx315 = VCLK28;
1722 break; 1715 break;
@@ -1728,52 +1721,52 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1728 SiS_Pr->PanelVCLKIdx315 = VCLK40; 1721 SiS_Pr->PanelVCLKIdx315 = VCLK40;
1729 break; 1722 break;
1730 case Panel_1024x600: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 600; 1723 case Panel_1024x600: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 600;
1731 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 800; 1724 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 800;
1732 SiS_Pr->PanelHRS = 24; SiS_Pr->PanelHRE = 136; 1725 SiS_Pr->PanelHRS = 24; SiS_Pr->PanelHRE = 136;
1733 SiS_Pr->PanelVRS = 2 /* 88 */ ; SiS_Pr->PanelVRE = 6; 1726 SiS_Pr->PanelVRS = 2 /* 88 */ ; SiS_Pr->PanelVRE = 6;
1734 SiS_Pr->PanelVCLKIdx300 = VCLK65_300; 1727 SiS_Pr->PanelVCLKIdx300 = VCLK65_300;
1735 SiS_Pr->PanelVCLKIdx315 = VCLK65_315; 1728 SiS_Pr->PanelVCLKIdx315 = VCLK65_315;
1736 break; 1729 break;
1737 case Panel_1024x768: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 768; 1730 case Panel_1024x768: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 768;
1738 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 806; 1731 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 806;
1739 SiS_Pr->PanelHRS = 24; SiS_Pr->PanelHRE = 136; 1732 SiS_Pr->PanelHRS = 24; SiS_Pr->PanelHRE = 136;
1740 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6; 1733 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6;
1741 if(HwInfo->jChipType < SIS_315H) { 1734 if(SiS_Pr->ChipType < SIS_315H) {
1742 SiS_Pr->PanelHRS = 23; 1735 SiS_Pr->PanelHRS = 23;
1743 SiS_Pr->PanelVRE = 5; 1736 SiS_Pr->PanelVRE = 5;
1744 } 1737 }
1745 SiS_Pr->PanelVCLKIdx300 = VCLK65_300; 1738 SiS_Pr->PanelVCLKIdx300 = VCLK65_300;
1746 SiS_Pr->PanelVCLKIdx315 = VCLK65_315; 1739 SiS_Pr->PanelVCLKIdx315 = VCLK65_315;
1747 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1740 SiS_GetLCDInfoBIOS(SiS_Pr);
1748 break; 1741 break;
1749 case Panel_1152x768: SiS_Pr->PanelXRes = 1152; SiS_Pr->PanelYRes = 768; 1742 case Panel_1152x768: SiS_Pr->PanelXRes = 1152; SiS_Pr->PanelYRes = 768;
1750 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 806; 1743 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 806;
1751 SiS_Pr->PanelHRS = 24; 1744 SiS_Pr->PanelHRS = 24; SiS_Pr->PanelHRE = 136;
1752 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6; 1745 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6;
1753 if(HwInfo->jChipType < SIS_315H) { 1746 if(SiS_Pr->ChipType < SIS_315H) {
1754 SiS_Pr->PanelHRS = 23; 1747 SiS_Pr->PanelHRS = 23;
1755 SiS_Pr->PanelVRE = 5; 1748 SiS_Pr->PanelVRE = 5;
1756 } 1749 }
1757 SiS_Pr->PanelVCLKIdx300 = VCLK65_300; 1750 SiS_Pr->PanelVCLKIdx300 = VCLK65_300;
1758 SiS_Pr->PanelVCLKIdx315 = VCLK65_315; 1751 SiS_Pr->PanelVCLKIdx315 = VCLK65_315;
1759 break; 1752 break;
1760 case Panel_1152x864: SiS_Pr->PanelXRes = 1152; SiS_Pr->PanelYRes = 864; 1753 case Panel_1152x864: SiS_Pr->PanelXRes = 1152; SiS_Pr->PanelYRes = 864;
1761 break; 1754 break;
1762 case Panel_1280x720: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 720; 1755 case Panel_1280x720: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 720;
1763 SiS_Pr->PanelHT = 1650; SiS_Pr->PanelVT = 750; 1756 SiS_Pr->PanelHT = 1650; SiS_Pr->PanelVT = 750;
1764 SiS_Pr->PanelHRS = 110; SiS_Pr->PanelHRE = 40; 1757 SiS_Pr->PanelHRS = 110; SiS_Pr->PanelHRE = 40;
1765 SiS_Pr->PanelVRS = 5; SiS_Pr->PanelVRE = 5; 1758 SiS_Pr->PanelVRS = 5; SiS_Pr->PanelVRE = 5;
1766 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x720; 1759 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x720;
1767 /* Data above for TMDS (projector); get from BIOS for LVDS */ 1760 /* Data above for TMDS (projector); get from BIOS for LVDS */
1768 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1761 SiS_GetLCDInfoBIOS(SiS_Pr);
1769 break; 1762 break;
1770 case Panel_1280x768: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 768; 1763 case Panel_1280x768: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 768;
1771 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 1764 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
1772 SiS_Pr->PanelHT = 1408; SiS_Pr->PanelVT = 806; 1765 SiS_Pr->PanelHT = 1408; SiS_Pr->PanelVT = 806;
1773 SiS_Pr->PanelVCLKIdx300 = VCLK81_300; /* ? */ 1766 SiS_Pr->PanelVCLKIdx300 = VCLK81_300; /* ? */
1774 SiS_Pr->PanelVCLKIdx315 = VCLK81_315; /* ? */ 1767 SiS_Pr->PanelVCLKIdx315 = VCLK81_315; /* ? */
1775 } else { 1768 } else {
1776 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 802; 1769 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 802;
1777 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRS = 112; 1770 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRS = 112;
1778 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6; 1771 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6;
1779 SiS_Pr->PanelVCLKIdx300 = VCLK81_300; 1772 SiS_Pr->PanelVCLKIdx300 = VCLK81_300;
@@ -1781,77 +1774,100 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1781 } 1774 }
1782 break; 1775 break;
1783 case Panel_1280x768_2: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 768; 1776 case Panel_1280x768_2: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 768;
1784 SiS_Pr->PanelHT = 1660; SiS_Pr->PanelVT = 806; 1777 SiS_Pr->PanelHT = 1660; SiS_Pr->PanelVT = 806;
1785 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112; 1778 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112;
1786 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6; 1779 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6;
1787 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x768_2; 1780 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x768_2;
1788 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1781 SiS_GetLCDInfoBIOS(SiS_Pr);
1789 break; 1782 break;
1790 case Panel_1280x800: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 800; 1783 case Panel_1280x800: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 800;
1791 SiS_Pr->PanelHT = 1408; SiS_Pr->PanelVT = 816; 1784 SiS_Pr->PanelHT = 1408; SiS_Pr->PanelVT = 816;
1792 SiS_Pr->PanelHRS = 21; SiS_Pr->PanelHRE = 24; 1785 SiS_Pr->PanelHRS = 21; SiS_Pr->PanelHRE = 24;
1793 SiS_Pr->PanelVRS = 4; SiS_Pr->PanelVRE = 3; 1786 SiS_Pr->PanelVRS = 4; SiS_Pr->PanelVRE = 3;
1794 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x800_315; 1787 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x800_315;
1795 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1788 SiS_GetLCDInfoBIOS(SiS_Pr);
1796 break; 1789 break;
1797 case Panel_1280x800_2: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 800; 1790 case Panel_1280x800_2: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 800;
1798 SiS_Pr->PanelHT = 1552; SiS_Pr->PanelVT = 812; 1791 SiS_Pr->PanelHT = 1552; SiS_Pr->PanelVT = 812;
1799 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112; 1792 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112;
1800 SiS_Pr->PanelVRS = 4; SiS_Pr->PanelVRE = 3; 1793 SiS_Pr->PanelVRS = 4; SiS_Pr->PanelVRE = 3;
1801 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x800_315_2; 1794 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x800_315_2;
1802 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1795 SiS_GetLCDInfoBIOS(SiS_Pr);
1796 break;
1797 case Panel_1280x854: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 854;
1798 SiS_Pr->PanelHT = 1664; SiS_Pr->PanelVT = 861;
1799 SiS_Pr->PanelHRS = 16; SiS_Pr->PanelHRE = 112;
1800 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3;
1801 SiS_Pr->PanelVCLKIdx315 = VCLK_1280x854;
1802 SiS_GetLCDInfoBIOS(SiS_Pr);
1803 break; 1803 break;
1804 case Panel_1280x960: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 960; 1804 case Panel_1280x960: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 960;
1805 SiS_Pr->PanelHT = 1800; SiS_Pr->PanelVT = 1000; 1805 SiS_Pr->PanelHT = 1800; SiS_Pr->PanelVT = 1000;
1806 SiS_Pr->PanelVCLKIdx300 = VCLK108_3_300; 1806 SiS_Pr->PanelVCLKIdx300 = VCLK108_3_300;
1807 SiS_Pr->PanelVCLKIdx315 = VCLK108_3_315; 1807 SiS_Pr->PanelVCLKIdx315 = VCLK108_3_315;
1808 if(resinfo == SIS_RI_1280x1024) { 1808 if(resinfo == SIS_RI_1280x1024) {
1809 SiS_Pr->PanelVCLKIdx300 = VCLK100_300; 1809 SiS_Pr->PanelVCLKIdx300 = VCLK100_300;
1810 SiS_Pr->PanelVCLKIdx315 = VCLK100_315; 1810 SiS_Pr->PanelVCLKIdx315 = VCLK100_315;
1811 } 1811 }
1812 break; 1812 break;
1813 case Panel_1280x1024: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 1024; 1813 case Panel_1280x1024: SiS_Pr->PanelXRes = 1280; SiS_Pr->PanelYRes = 1024;
1814 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 1066; 1814 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 1066;
1815 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112; 1815 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112;
1816 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3; 1816 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3;
1817 SiS_Pr->PanelVCLKIdx300 = VCLK108_3_300; 1817 SiS_Pr->PanelVCLKIdx300 = VCLK108_3_300;
1818 SiS_Pr->PanelVCLKIdx315 = VCLK108_2_315; 1818 SiS_Pr->PanelVCLKIdx315 = VCLK108_2_315;
1819 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1819 SiS_GetLCDInfoBIOS(SiS_Pr);
1820 break; 1820 break;
1821 case Panel_1400x1050: SiS_Pr->PanelXRes = 1400; SiS_Pr->PanelYRes = 1050; 1821 case Panel_1400x1050: SiS_Pr->PanelXRes = 1400; SiS_Pr->PanelYRes = 1050;
1822 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 1066; 1822 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 1066;
1823 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112; /* HRE OK for LVDS, not for LCDA */ 1823 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 112;
1824 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3; 1824 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3;
1825 SiS_Pr->PanelVCLKIdx315 = VCLK108_2_315; 1825 SiS_Pr->PanelVCLKIdx315 = VCLK108_2_315;
1826 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1826 SiS_GetLCDInfoBIOS(SiS_Pr);
1827 break; 1827 break;
1828 case Panel_1600x1200: SiS_Pr->PanelXRes = 1600; SiS_Pr->PanelYRes = 1200; 1828 case Panel_1600x1200: SiS_Pr->PanelXRes = 1600; SiS_Pr->PanelYRes = 1200;
1829 SiS_Pr->PanelHT = 2160; SiS_Pr->PanelVT = 1250; 1829 SiS_Pr->PanelHT = 2160; SiS_Pr->PanelVT = 1250;
1830 SiS_Pr->PanelHRS = 64; SiS_Pr->PanelHRE = 192; 1830 SiS_Pr->PanelHRS = 64; SiS_Pr->PanelHRE = 192;
1831 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3; 1831 SiS_Pr->PanelVRS = 1; SiS_Pr->PanelVRE = 3;
1832 SiS_Pr->PanelVCLKIdx315 = VCLK162_315; 1832 SiS_Pr->PanelVCLKIdx315 = VCLK162_315;
1833 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1833 if(SiS_Pr->SiS_VBType & VB_SISTMDSLCDA) {
1834 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
1835 SiS_Pr->PanelHT = 1760; SiS_Pr->PanelVT = 1235;
1836 SiS_Pr->PanelHRS = 48; SiS_Pr->PanelHRE = 32;
1837 SiS_Pr->PanelVRS = 2; SiS_Pr->PanelVRE = 4;
1838 SiS_Pr->PanelVCLKIdx315 = VCLK130_315;
1839 SiS_Pr->Alternate1600x1200 = TRUE;
1840 }
1841 } else if(SiS_Pr->SiS_IF_DEF_LVDS) {
1842 SiS_Pr->PanelHT = 2048; SiS_Pr->PanelVT = 1320;
1843 SiS_Pr->PanelHRS = SiS_Pr->PanelHRE = 999;
1844 SiS_Pr->PanelVRS = SiS_Pr->PanelVRE = 999;
1845 }
1846 SiS_GetLCDInfoBIOS(SiS_Pr);
1834 break; 1847 break;
1835 case Panel_1680x1050: SiS_Pr->PanelXRes = 1680; SiS_Pr->PanelYRes = 1050; 1848 case Panel_1680x1050: SiS_Pr->PanelXRes = 1680; SiS_Pr->PanelYRes = 1050;
1836 SiS_Pr->PanelHT = 1900; SiS_Pr->PanelVT = 1066; 1849 SiS_Pr->PanelHT = 1900; SiS_Pr->PanelVT = 1066;
1837 SiS_Pr->PanelHRS = 26; SiS_Pr->PanelHRE = 76; 1850 SiS_Pr->PanelHRS = 26; SiS_Pr->PanelHRE = 76;
1838 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6; 1851 SiS_Pr->PanelVRS = 3; SiS_Pr->PanelVRE = 6;
1839 SiS_Pr->PanelVCLKIdx315 = VCLK121_315; 1852 SiS_Pr->PanelVCLKIdx315 = VCLK121_315;
1840 SiS_GetLCDInfoBIOS(SiS_Pr, HwInfo); 1853 SiS_GetLCDInfoBIOS(SiS_Pr);
1841 break; 1854 break;
1842 case Panel_Barco1366: SiS_Pr->PanelXRes = 1360; SiS_Pr->PanelYRes = 1024; 1855 case Panel_Barco1366: SiS_Pr->PanelXRes = 1360; SiS_Pr->PanelYRes = 1024;
1843 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 1066; 1856 SiS_Pr->PanelHT = 1688; SiS_Pr->PanelVT = 1066;
1844 break; 1857 break;
1845 case Panel_848x480: SiS_Pr->PanelXRes = 848; SiS_Pr->PanelYRes = 480; 1858 case Panel_848x480: SiS_Pr->PanelXRes = 848; SiS_Pr->PanelYRes = 480;
1846 SiS_Pr->PanelHT = 1088; SiS_Pr->PanelVT = 525; 1859 SiS_Pr->PanelHT = 1088; SiS_Pr->PanelVT = 525;
1847 break; 1860 break;
1861 case Panel_856x480: SiS_Pr->PanelXRes = 856; SiS_Pr->PanelYRes = 480;
1862 SiS_Pr->PanelHT = 1088; SiS_Pr->PanelVT = 525;
1863 break;
1848 case Panel_Custom: SiS_Pr->PanelXRes = SiS_Pr->CP_MaxX; 1864 case Panel_Custom: SiS_Pr->PanelXRes = SiS_Pr->CP_MaxX;
1849 SiS_Pr->PanelYRes = SiS_Pr->CP_MaxY; 1865 SiS_Pr->PanelYRes = SiS_Pr->CP_MaxY;
1850 SiS_Pr->PanelHT = SiS_Pr->CHTotal; 1866 SiS_Pr->PanelHT = SiS_Pr->CHTotal;
1851 SiS_Pr->PanelVT = SiS_Pr->CVTotal; 1867 SiS_Pr->PanelVT = SiS_Pr->CVTotal;
1852 if(SiS_Pr->CP_PreferredIndex != -1) { 1868 if(SiS_Pr->CP_PreferredIndex != -1) {
1853 SiS_Pr->PanelXRes = SiS_Pr->CP_HDisplay[SiS_Pr->CP_PreferredIndex]; 1869 SiS_Pr->PanelXRes = SiS_Pr->CP_HDisplay[SiS_Pr->CP_PreferredIndex];
1854 SiS_Pr->PanelYRes = SiS_Pr->CP_VDisplay[SiS_Pr->CP_PreferredIndex]; 1870 SiS_Pr->PanelYRes = SiS_Pr->CP_VDisplay[SiS_Pr->CP_PreferredIndex];
1855 SiS_Pr->PanelHT = SiS_Pr->CP_HTotal[SiS_Pr->CP_PreferredIndex]; 1871 SiS_Pr->PanelHT = SiS_Pr->CP_HTotal[SiS_Pr->CP_PreferredIndex];
1856 SiS_Pr->PanelVT = SiS_Pr->CP_VTotal[SiS_Pr->CP_PreferredIndex]; 1872 SiS_Pr->PanelVT = SiS_Pr->CP_VTotal[SiS_Pr->CP_PreferredIndex];
1857 SiS_Pr->PanelHRS = SiS_Pr->CP_HSyncStart[SiS_Pr->CP_PreferredIndex]; 1873 SiS_Pr->PanelHRS = SiS_Pr->CP_HSyncStart[SiS_Pr->CP_PreferredIndex];
@@ -1863,22 +1879,22 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1863 SiS_Pr->PanelVRS -= SiS_Pr->PanelYRes; 1879 SiS_Pr->PanelVRS -= SiS_Pr->PanelYRes;
1864 SiS_Pr->PanelVRE -= SiS_Pr->PanelVRS; 1880 SiS_Pr->PanelVRE -= SiS_Pr->PanelVRS;
1865 if(SiS_Pr->CP_PrefClock) { 1881 if(SiS_Pr->CP_PrefClock) {
1866 int idx; 1882 int idx;
1867 SiS_Pr->PanelVCLKIdx315 = VCLK_CUSTOM_315; 1883 SiS_Pr->PanelVCLKIdx315 = VCLK_CUSTOM_315;
1868 SiS_Pr->PanelVCLKIdx300 = VCLK_CUSTOM_300; 1884 SiS_Pr->PanelVCLKIdx300 = VCLK_CUSTOM_300;
1869 if(HwInfo->jChipType < SIS_315H) idx = VCLK_CUSTOM_300; 1885 if(SiS_Pr->ChipType < SIS_315H) idx = VCLK_CUSTOM_300;
1870 else idx = VCLK_CUSTOM_315; 1886 else idx = VCLK_CUSTOM_315;
1871 SiS_Pr->SiS_VCLKData[idx].CLOCK = 1887 SiS_Pr->SiS_VCLKData[idx].CLOCK =
1872 SiS_Pr->SiS_VBVCLKData[idx].CLOCK = SiS_Pr->CP_PrefClock; 1888 SiS_Pr->SiS_VBVCLKData[idx].CLOCK = SiS_Pr->CP_PrefClock;
1873 SiS_Pr->SiS_VCLKData[idx].SR2B = 1889 SiS_Pr->SiS_VCLKData[idx].SR2B =
1874 SiS_Pr->SiS_VBVCLKData[idx].Part4_A = SiS_Pr->CP_PrefSR2B; 1890 SiS_Pr->SiS_VBVCLKData[idx].Part4_A = SiS_Pr->CP_PrefSR2B;
1875 SiS_Pr->SiS_VCLKData[idx].SR2C = 1891 SiS_Pr->SiS_VCLKData[idx].SR2C =
1876 SiS_Pr->SiS_VBVCLKData[idx].Part4_B = SiS_Pr->CP_PrefSR2C; 1892 SiS_Pr->SiS_VBVCLKData[idx].Part4_B = SiS_Pr->CP_PrefSR2C;
1877 } 1893 }
1878 } 1894 }
1879 break; 1895 break;
1880 default: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 768; 1896 default: SiS_Pr->PanelXRes = 1024; SiS_Pr->PanelYRes = 768;
1881 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 806; 1897 SiS_Pr->PanelHT = 1344; SiS_Pr->PanelVT = 806;
1882 break; 1898 break;
1883 } 1899 }
1884 1900
@@ -1887,14 +1903,16 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1887 (SiS_Pr->SiS_IF_DEF_DSTN) || 1903 (SiS_Pr->SiS_IF_DEF_DSTN) ||
1888 (SiS_Pr->SiS_CustomT == CUT_BARCO1366) || 1904 (SiS_Pr->SiS_CustomT == CUT_BARCO1366) ||
1889 (SiS_Pr->SiS_CustomT == CUT_BARCO1024) || 1905 (SiS_Pr->SiS_CustomT == CUT_BARCO1024) ||
1890 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ) { 1906 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ||
1907 (SiS_Pr->SiS_CustomT == CUT_PANEL856) ) {
1891 SiS_Pr->PanelHRS = 999; 1908 SiS_Pr->PanelHRS = 999;
1892 SiS_Pr->PanelHRE = 999; 1909 SiS_Pr->PanelHRE = 999;
1893 } 1910 }
1894 1911
1895 if( (SiS_Pr->SiS_CustomT == CUT_BARCO1366) || 1912 if( (SiS_Pr->SiS_CustomT == CUT_BARCO1366) ||
1896 (SiS_Pr->SiS_CustomT == CUT_BARCO1024) || 1913 (SiS_Pr->SiS_CustomT == CUT_BARCO1024) ||
1897 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ) { 1914 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ||
1915 (SiS_Pr->SiS_CustomT == CUT_PANEL856) ) {
1898 SiS_Pr->PanelVRS = 999; 1916 SiS_Pr->PanelVRS = 999;
1899 SiS_Pr->PanelVRE = 999; 1917 SiS_Pr->PanelVRE = 999;
1900 } 1918 }
@@ -1912,18 +1930,18 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1912 case Panel_Custom: 1930 case Panel_Custom:
1913 case Panel_1152x864: 1931 case Panel_1152x864:
1914 case Panel_1280x768: /* TMDS only */ 1932 case Panel_1280x768: /* TMDS only */
1915 SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 1933 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
1916 break; 1934 break;
1917 1935
1918 case Panel_800x600: { 1936 case Panel_800x600: {
1919 static const UCHAR nonscalingmodes[] = { 1937 static const unsigned char nonscalingmodes[] = {
1920 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, 0xff 1938 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, 0xff
1921 }; 1939 };
1922 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 1940 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1923 break; 1941 break;
1924 } 1942 }
1925 case Panel_1024x768: { 1943 case Panel_1024x768: {
1926 static const UCHAR nonscalingmodes[] = { 1944 static const unsigned char nonscalingmodes[] = {
1927 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 1945 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1928 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 1946 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
1929 0xff 1947 0xff
@@ -1932,7 +1950,7 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1932 break; 1950 break;
1933 } 1951 }
1934 case Panel_1280x720: { 1952 case Panel_1280x720: {
1935 static const UCHAR nonscalingmodes[] = { 1953 static const unsigned char nonscalingmodes[] = {
1936 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 1954 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1937 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 1955 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
1938 0xff 1956 0xff
@@ -1944,7 +1962,7 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1944 break; 1962 break;
1945 } 1963 }
1946 case Panel_1280x768_2: { /* LVDS only */ 1964 case Panel_1280x768_2: { /* LVDS only */
1947 static const UCHAR nonscalingmodes[] = { 1965 static const unsigned char nonscalingmodes[] = {
1948 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 1966 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1949 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 1967 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
1950 SIS_RI_1152x768,0xff 1968 SIS_RI_1152x768,0xff
@@ -1952,23 +1970,23 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1952 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 1970 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1953 switch(resinfo) { 1971 switch(resinfo) {
1954 case SIS_RI_1280x720: if(SiS_Pr->UsePanelScaler == -1) { 1972 case SIS_RI_1280x720: if(SiS_Pr->UsePanelScaler == -1) {
1955 SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 1973 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
1956 } 1974 }
1957 break; 1975 break;
1958 } 1976 }
1959 break; 1977 break;
1960 } 1978 }
1961 case Panel_1280x800: { /* SiS TMDS special (Averatec 6200 series) */ 1979 case Panel_1280x800: { /* SiS TMDS special (Averatec 6200 series) */
1962 static const UCHAR nonscalingmodes[] = { 1980 static const unsigned char nonscalingmodes[] = {
1963 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 1981 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1964 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 1982 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
1965 SIS_RI_1152x768,SIS_RI_1280x720,SIS_RI_1280x768,0xff 1983 SIS_RI_1152x768,SIS_RI_1280x720,SIS_RI_1280x768,0xff
1966 }; 1984 };
1967 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 1985 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1968 break; 1986 break;
1969 } 1987 }
1970 case Panel_1280x800_2: { /* SiS LVDS */ 1988 case Panel_1280x800_2: { /* SiS LVDS */
1971 static const UCHAR nonscalingmodes[] = { 1989 static const unsigned char nonscalingmodes[] = {
1972 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 1990 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1973 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 1991 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
1974 SIS_RI_1152x768,0xff 1992 SIS_RI_1152x768,0xff
@@ -1977,66 +1995,83 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
1977 switch(resinfo) { 1995 switch(resinfo) {
1978 case SIS_RI_1280x720: 1996 case SIS_RI_1280x720:
1979 case SIS_RI_1280x768: if(SiS_Pr->UsePanelScaler == -1) { 1997 case SIS_RI_1280x768: if(SiS_Pr->UsePanelScaler == -1) {
1980 SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 1998 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
1981 } 1999 }
1982 break; 2000 break;
1983 } 2001 }
1984 break; 2002 break;
2003 }
2004 case Panel_1280x854: { /* SiS LVDS */
2005 static const unsigned char nonscalingmodes[] = {
2006 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
2007 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
2008 SIS_RI_1152x768,0xff
2009 };
2010 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2011 switch(resinfo) {
2012 case SIS_RI_1280x720:
2013 case SIS_RI_1280x768:
2014 case SIS_RI_1280x800: if(SiS_Pr->UsePanelScaler == -1) {
2015 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
2016 }
2017 break;
2018 }
2019 break;
1985 } 2020 }
1986 case Panel_1280x960: { 2021 case Panel_1280x960: {
1987 static const UCHAR nonscalingmodes[] = { 2022 static const unsigned char nonscalingmodes[] = {
1988 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 2023 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1989 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 2024 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
1990 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x720,SIS_RI_1280x768,SIS_RI_1280x800, 2025 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x720,SIS_RI_1280x768,SIS_RI_1280x800,
1991 0xff 2026 SIS_RI_1280x854,0xff
1992 }; 2027 };
1993 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 2028 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
1994 break; 2029 break;
1995 } 2030 }
1996 case Panel_1280x1024: { 2031 case Panel_1280x1024: {
1997 static const UCHAR nonscalingmodes[] = { 2032 static const unsigned char nonscalingmodes[] = {
1998 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 2033 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
1999 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 2034 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
2000 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x720,SIS_RI_1280x768,SIS_RI_1280x800, 2035 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x720,SIS_RI_1280x768,SIS_RI_1280x800,
2001 SIS_RI_1280x960,0xff 2036 SIS_RI_1280x854,SIS_RI_1280x960,0xff
2002 }; 2037 };
2003 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 2038 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2004 break; 2039 break;
2005 } 2040 }
2006 case Panel_1400x1050: { 2041 case Panel_1400x1050: {
2007 static const UCHAR nonscalingmodes[] = { 2042 static const unsigned char nonscalingmodes[] = {
2008 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 2043 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
2009 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 2044 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
2010 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x768,SIS_RI_1280x800,SIS_RI_1280x960, 2045 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x768,SIS_RI_1280x800,SIS_RI_1280x854,
2011 0xff 2046 SIS_RI_1280x960,0xff
2012 }; 2047 };
2013 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 2048 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2014 switch(resinfo) { 2049 switch(resinfo) {
2015 case SIS_RI_1280x720: if(SiS_Pr->UsePanelScaler == -1) { 2050 case SIS_RI_1280x720: if(SiS_Pr->UsePanelScaler == -1) {
2016 SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 2051 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
2017 } 2052 }
2018 break; 2053 break;
2019 case SIS_RI_1280x1024: SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 2054 case SIS_RI_1280x1024: SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
2020 break; 2055 break;
2021 } 2056 }
2022 break; 2057 break;
2023 } 2058 }
2024 case Panel_1600x1200: { 2059 case Panel_1600x1200: {
2025 static const UCHAR nonscalingmodes[] = { 2060 static const unsigned char nonscalingmodes[] = {
2026 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 2061 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
2027 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 2062 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
2028 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x720,SIS_RI_1280x768,SIS_RI_1280x800, 2063 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x720,SIS_RI_1280x768,SIS_RI_1280x800,
2029 SIS_RI_1280x960,SIS_RI_1360x768,SIS_RI_1360x1024,0xff 2064 SIS_RI_1280x854,SIS_RI_1280x960,SIS_RI_1360x768,SIS_RI_1360x1024,0xff
2030 }; 2065 };
2031 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 2066 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2032 break; 2067 break;
2033 } 2068 }
2034 case Panel_1680x1050: { 2069 case Panel_1680x1050: {
2035 static const UCHAR nonscalingmodes[] = { 2070 static const unsigned char nonscalingmodes[] = {
2036 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480, 2071 SIS_RI_720x480, SIS_RI_720x576, SIS_RI_768x576, SIS_RI_800x480, SIS_RI_848x480,
2037 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600, 2072 SIS_RI_856x480, SIS_RI_960x540, SIS_RI_960x600, SIS_RI_1024x576,SIS_RI_1024x600,
2038 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x960,SIS_RI_1360x768,SIS_RI_1360x1024, 2073 SIS_RI_1152x768,SIS_RI_1152x864,SIS_RI_1280x854,SIS_RI_1280x960,SIS_RI_1360x768,
2039 0xff 2074 SIS_RI_1360x1024,0xff
2040 }; 2075 };
2041 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes); 2076 SiS_CheckScaling(SiS_Pr, resinfo, nonscalingmodes);
2042 break; 2077 break;
@@ -2044,25 +2079,25 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2044 } 2079 }
2045 } 2080 }
2046 2081
2082#ifdef SIS300
2047 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2083 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2048 if(SiS_Pr->SiS_CustomT == CUT_PANEL848) { 2084 if(SiS_Pr->SiS_CustomT == CUT_PANEL848 || SiS_Pr->SiS_CustomT == CUT_PANEL856) {
2049 SiS_Pr->SiS_LCDInfo = 0x80 | 0x40 | 0x20; /* neg h/v sync, RGB24(D0 = 0) */ 2085 SiS_Pr->SiS_LCDInfo = 0x80 | 0x40 | 0x20; /* neg h/v sync, RGB24(D0 = 0) */
2050 } 2086 }
2051 } 2087 }
2052 2088
2053#ifdef SIS300 2089 if(SiS_Pr->ChipType < SIS_315H) {
2054 if(HwInfo->jChipType < SIS_315H) {
2055 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2090 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2056 if(SiS_Pr->SiS_UseROM) { 2091 if(SiS_Pr->SiS_UseROM) {
2057 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { 2092 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
2058 if(!(ROMAddr[0x235] & 0x02)) { 2093 if(!(ROMAddr[0x235] & 0x02)) {
2059 SiS_Pr->SiS_LCDInfo &= (~DontExpandLCD); 2094 SiS_Pr->SiS_LCDInfo &= (~DontExpandLCD);
2060 } 2095 }
2061 } 2096 }
2062 } 2097 }
2063 } else if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 2098 } else if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2064 if((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo == 0x10))) { 2099 if((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo == 0x10))) {
2065 SiS_Pr->SiS_LCDInfo &= (~DontExpandLCD); 2100 SiS_Pr->SiS_LCDInfo &= (~DontExpandLCD);
2066 } 2101 }
2067 } 2102 }
2068 } 2103 }
@@ -2080,7 +2115,7 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2080 2115
2081 switch(SiS_Pr->SiS_LCDResInfo) { 2116 switch(SiS_Pr->SiS_LCDResInfo) {
2082 case Panel_640x480: 2117 case Panel_640x480:
2083 SiS_Pr->SiS_LCDInfo |= LCDPass11; 2118 SiS_Pr->SiS_LCDInfo |= (DontExpandLCD | LCDPass11);
2084 break; 2119 break;
2085 case Panel_1280x800: 2120 case Panel_1280x800:
2086 /* Don't pass 1:1 by default (TMDS special) */ 2121 /* Don't pass 1:1 by default (TMDS special) */
@@ -2097,7 +2132,7 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2097 break; 2132 break;
2098 } 2133 }
2099 2134
2100 if(SiS_Pr->UseCustomMode) { 2135 if((SiS_Pr->UseCustomMode) || (SiS_Pr->SiS_CustomT == CUT_UNKNOWNLCD)) {
2101 SiS_Pr->SiS_LCDInfo |= (DontExpandLCD | LCDPass11); 2136 SiS_Pr->SiS_LCDInfo |= (DontExpandLCD | LCDPass11);
2102 } 2137 }
2103 2138
@@ -2107,19 +2142,19 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2107 } 2142 }
2108 2143
2109 /* LVDS DDA */ 2144 /* LVDS DDA */
2110 if(!((HwInfo->jChipType < SIS_315H) && (SiS_Pr->SiS_SetFlag & SetDOSMode))) { 2145 if(!((SiS_Pr->ChipType < SIS_315H) && (SiS_Pr->SiS_SetFlag & SetDOSMode))) {
2111 2146
2112 if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBType & VB_NoLCD)) { 2147 if((SiS_Pr->SiS_IF_DEF_LVDS == 1) || (SiS_Pr->SiS_VBType & VB_NoLCD)) {
2113 if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) { 2148 if(SiS_Pr->SiS_IF_DEF_TRUMPION == 0) {
2114 if(ModeNo == 0x12) { 2149 if(ModeNo == 0x12) {
2115 if(SiS_Pr->SiS_LCDInfo & LCDPass11) { 2150 if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
2116 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2151 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2117 } 2152 }
2118 } else if(ModeNo > 0x13) { 2153 } else if(ModeNo > 0x13) {
2119 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x600) { 2154 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x600) {
2120 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { 2155 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
2121 if((resinfo == SIS_RI_800x600) || (resinfo == SIS_RI_400x300)) { 2156 if((resinfo == SIS_RI_800x600) || (resinfo == SIS_RI_400x300)) {
2122 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2157 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2123 } 2158 }
2124 } 2159 }
2125 } 2160 }
@@ -2128,18 +2163,18 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2128 } 2163 }
2129 2164
2130 if(modeflag & HalfDCLK) { 2165 if(modeflag & HalfDCLK) {
2131 if(SiS_Pr->SiS_IF_DEF_TRUMPION == 1) { 2166 if(SiS_Pr->SiS_IF_DEF_TRUMPION == 1) {
2132 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2167 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2133 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 2168 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
2134 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2169 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2135 } else if(SiS_Pr->SiS_LCDResInfo == Panel_640x480) { 2170 } else if(SiS_Pr->SiS_LCDResInfo == Panel_640x480) {
2136 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2171 SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2137 } else if(ModeNo > 0x13) { 2172 } else if(ModeNo > 0x13) {
2138 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 2173 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
2139 if(resinfo == SIS_RI_512x384) SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2174 if(resinfo == SIS_RI_512x384) SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2140 } else if(SiS_Pr->SiS_LCDResInfo == Panel_800x600) { 2175 } else if(SiS_Pr->SiS_LCDResInfo == Panel_800x600) {
2141 if(resinfo == SIS_RI_400x300) SiS_Pr->SiS_SetFlag |= EnableLVDSDDA; 2176 if(resinfo == SIS_RI_400x300) SiS_Pr->SiS_SetFlag |= EnableLVDSDDA;
2142 } 2177 }
2143 } 2178 }
2144 } 2179 }
2145 2180
@@ -2148,21 +2183,21 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2148 /* VESA timing */ 2183 /* VESA timing */
2149 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 2184 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2150 if(SiS_Pr->SiS_VBInfo & SetNotSimuMode) { 2185 if(SiS_Pr->SiS_VBInfo & SetNotSimuMode) {
2151 SiS_Pr->SiS_SetFlag |= LCDVESATiming; 2186 SiS_Pr->SiS_SetFlag |= LCDVESATiming;
2152 } 2187 }
2153 } else { 2188 } else {
2154 SiS_Pr->SiS_SetFlag |= LCDVESATiming; 2189 SiS_Pr->SiS_SetFlag |= LCDVESATiming;
2155 } 2190 }
2156 2191
2157#ifdef LINUX_KERNEL 2192#ifdef SIS_LINUX_KERNEL
2158#ifdef TWDEBUG 2193#if 0
2159 printk(KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n", 2194 printk(KERN_DEBUG "sisfb: (LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x)\n",
2160 SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo); 2195 SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo);
2161#endif 2196#endif
2162#endif 2197#endif
2163#ifdef LINUX_XF86 2198#ifdef SIS_XORG_XF86
2164 xf86DrvMsgVerb(0, X_PROBED, 4, 2199 xf86DrvMsgVerb(0, X_PROBED, 4,
2165 "(init301: LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x SetFlag=0x%04x)\n", 2200 "(init301: LCDInfo=0x%04x LCDResInfo=0x%02x LCDTypeInfo=0x%02x SetFlag=0x%04x)\n",
2166 SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo, SiS_Pr->SiS_SetFlag); 2201 SiS_Pr->SiS_LCDInfo, SiS_Pr->SiS_LCDResInfo, SiS_Pr->SiS_LCDTypeInfo, SiS_Pr->SiS_SetFlag);
2167#endif 2202#endif
2168} 2203}
@@ -2171,45 +2206,46 @@ SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2171/* GET VCLK */ 2206/* GET VCLK */
2172/*********************************************/ 2207/*********************************************/
2173 2208
2174USHORT 2209unsigned short
2175SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2210SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
2176 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 2211 unsigned short RefreshRateTableIndex)
2177{ 2212{
2178 USHORT CRT2Index,VCLKIndex=0,VCLKIndexGEN=0; 2213 unsigned short CRT2Index, VCLKIndex = 0, VCLKIndexGEN = 0, VCLKIndexGENCRT = 0;
2179 USHORT modeflag,resinfo,tempbx; 2214 unsigned short modeflag, resinfo, tempbx;
2180 const UCHAR *CHTVVCLKPtr = NULL; 2215 const unsigned char *CHTVVCLKPtr = NULL;
2181 2216
2182 if(ModeNo <= 0x13) { 2217 if(ModeNo <= 0x13) {
2183 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 2218 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2184 resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo; 2219 resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
2185 CRT2Index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 2220 CRT2Index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
2186 VCLKIndexGEN = (SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)) >> 2) & 0x03; 2221 VCLKIndexGEN = (SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)) >> 2) & 0x03;
2222 VCLKIndexGENCRT = VCLKIndexGEN;
2187 } else { 2223 } else {
2188 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 2224 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2189 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 2225 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
2190 CRT2Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 2226 CRT2Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
2191 VCLKIndexGEN = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK; 2227 VCLKIndexGEN = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
2192 if(HwInfo->jChipType < SIS_315H) VCLKIndexGEN &= 0x3f; 2228 VCLKIndexGENCRT = SiS_GetRefCRTVCLK(SiS_Pr, RefreshRateTableIndex,
2229 (SiS_Pr->SiS_SetFlag & ProgrammingCRT2) ? SiS_Pr->SiS_UseWideCRT2 : SiS_Pr->SiS_UseWide);
2193 } 2230 }
2194 2231
2195 if(SiS_Pr->SiS_VBType & VB_SISVB) { /* 30x/B/LV */ 2232 if(SiS_Pr->SiS_VBType & VB_SISVB) { /* 30x/B/LV */
2196 2233
2197 if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) { 2234 if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {
2198 2235
2199 CRT2Index >>= 6; 2236 CRT2Index >>= 6;
2200 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { /* LCD */ 2237 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { /* LCD */
2201 2238
2202 if(HwInfo->jChipType < SIS_315H) { 2239 if(SiS_Pr->ChipType < SIS_315H) {
2203 VCLKIndex = SiS_Pr->PanelVCLKIdx300; 2240 VCLKIndex = SiS_Pr->PanelVCLKIdx300;
2204 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (SiS_Pr->SiS_LCDInfo & LCDPass11)) { 2241 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (SiS_Pr->SiS_LCDInfo & LCDPass11)) {
2205 VCLKIndex = VCLKIndexGEN; 2242 VCLKIndex = VCLKIndexGEN;
2206 } 2243 }
2207 } else { 2244 } else {
2208 VCLKIndex = SiS_Pr->PanelVCLKIdx315; 2245 VCLKIndex = SiS_Pr->PanelVCLKIdx315;
2209 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (SiS_Pr->SiS_LCDInfo & LCDPass11)) { 2246 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (SiS_Pr->SiS_LCDInfo & LCDPass11)) {
2210 switch(resinfo) { 2247 switch(resinfo) {
2211 /* Only those whose IndexGEN doesn't match VBVCLK array */ 2248 /* Correct those whose IndexGEN doesn't match VBVCLK array */
2212 case SIS_RI_1280x720: VCLKIndex = VCLK_1280x720; break;
2213 case SIS_RI_720x480: VCLKIndex = VCLK_720x480; break; 2249 case SIS_RI_720x480: VCLKIndex = VCLK_720x480; break;
2214 case SIS_RI_720x576: VCLKIndex = VCLK_720x576; break; 2250 case SIS_RI_720x576: VCLKIndex = VCLK_720x576; break;
2215 case SIS_RI_768x576: VCLKIndex = VCLK_768x576; break; 2251 case SIS_RI_768x576: VCLKIndex = VCLK_768x576; break;
@@ -2218,18 +2254,19 @@ SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2218 case SIS_RI_800x480: VCLKIndex = VCLK_800x480; break; 2254 case SIS_RI_800x480: VCLKIndex = VCLK_800x480; break;
2219 case SIS_RI_1024x576: VCLKIndex = VCLK_1024x576; break; 2255 case SIS_RI_1024x576: VCLKIndex = VCLK_1024x576; break;
2220 case SIS_RI_1152x864: VCLKIndex = VCLK_1152x864; break; 2256 case SIS_RI_1152x864: VCLKIndex = VCLK_1152x864; break;
2257 case SIS_RI_1280x720: VCLKIndex = VCLK_1280x720; break;
2221 case SIS_RI_1360x768: VCLKIndex = VCLK_1360x768; break; 2258 case SIS_RI_1360x768: VCLKIndex = VCLK_1360x768; break;
2222 default: VCLKIndex = VCLKIndexGEN; 2259 default: VCLKIndex = VCLKIndexGEN;
2223 } 2260 }
2224 2261
2225 if(ModeNo <= 0x13) { 2262 if(ModeNo <= 0x13) {
2226 if(HwInfo->jChipType <= SIS_315PRO) { 2263 if(SiS_Pr->ChipType <= SIS_315PRO) {
2227 if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42; 2264 if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x42;
2228 } else { 2265 } else {
2229 if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x00; 2266 if(SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC == 1) VCLKIndex = 0x00;
2230 } 2267 }
2231 } 2268 }
2232 if(HwInfo->jChipType <= SIS_315PRO) { 2269 if(SiS_Pr->ChipType <= SIS_315PRO) {
2233 if(VCLKIndex == 0) VCLKIndex = 0x41; 2270 if(VCLKIndex == 0) VCLKIndex = 0x41;
2234 if(VCLKIndex == 1) VCLKIndex = 0x43; 2271 if(VCLKIndex == 1) VCLKIndex = 0x43;
2235 if(VCLKIndex == 4) VCLKIndex = 0x44; 2272 if(VCLKIndex == 4) VCLKIndex = 0x44;
@@ -2237,49 +2274,46 @@ SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2237 } 2274 }
2238 } 2275 }
2239 2276
2240 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* TV */ 2277 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* TV */
2241 2278
2242 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 2279 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
2243 if(SiS_Pr->SiS_TVMode & TVRPLLDIV2XO) VCLKIndex = HiTVVCLKDIV2; 2280 if(SiS_Pr->SiS_TVMode & TVRPLLDIV2XO) VCLKIndex = HiTVVCLKDIV2;
2244 else VCLKIndex = HiTVVCLK; 2281 else VCLKIndex = HiTVVCLK;
2245 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) { 2282 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) VCLKIndex = HiTVSimuVCLK;
2246 if(modeflag & Charx8Dot) VCLKIndex = HiTVSimuVCLK; 2283 } else if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) VCLKIndex = YPbPr750pVCLK;
2247 else VCLKIndex = HiTVTextVCLK; 2284 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) VCLKIndex = TVVCLKDIV2;
2248 } 2285 else if(SiS_Pr->SiS_TVMode & TVRPLLDIV2XO) VCLKIndex = TVVCLKDIV2;
2249 } else if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) VCLKIndex = YPbPr750pVCLK; 2286 else VCLKIndex = TVVCLK;
2250 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) VCLKIndex = TVVCLKDIV2; 2287
2251 else if(SiS_Pr->SiS_TVMode & TVRPLLDIV2XO) VCLKIndex = TVVCLKDIV2; 2288 if(SiS_Pr->ChipType < SIS_315H) VCLKIndex += TVCLKBASE_300;
2252 else VCLKIndex = TVVCLK; 2289 else VCLKIndex += TVCLKBASE_315;
2253 2290
2254 if(HwInfo->jChipType < SIS_315H) VCLKIndex += TVCLKBASE_300; 2291 } else { /* VGA2 */
2255 else VCLKIndex += TVCLKBASE_315; 2292
2256 2293 VCLKIndex = VCLKIndexGENCRT;
2257 } else { /* VGA2 */ 2294 if(SiS_Pr->ChipType < SIS_315H) {
2258 2295 if(ModeNo > 0x13) {
2259 VCLKIndex = VCLKIndexGEN; 2296 if( (SiS_Pr->ChipType == SIS_630) &&
2260 if(HwInfo->jChipType < SIS_315H) { 2297 (SiS_Pr->ChipRevision >= 0x30)) {
2261 if(ModeNo > 0x13) {
2262 if( (HwInfo->jChipType == SIS_630) &&
2263 (HwInfo->jChipRevision >= 0x30)) {
2264 if(VCLKIndex == 0x14) VCLKIndex = 0x34; 2298 if(VCLKIndex == 0x14) VCLKIndex = 0x34;
2265 } 2299 }
2266 /* Better VGA2 clock for 1280x1024@75 */ 2300 /* Better VGA2 clock for 1280x1024@75 */
2267 if(VCLKIndex == 0x17) VCLKIndex = 0x45; 2301 if(VCLKIndex == 0x17) VCLKIndex = 0x45;
2268 } 2302 }
2269 } 2303 }
2270 } 2304 }
2271 2305
2272 } else { /* If not programming CRT2 */ 2306 } else { /* If not programming CRT2 */
2273 2307
2274 VCLKIndex = VCLKIndexGEN; 2308 VCLKIndex = VCLKIndexGENCRT;
2275 if(HwInfo->jChipType < SIS_315H) { 2309 if(SiS_Pr->ChipType < SIS_315H) {
2276 if(ModeNo > 0x13) { 2310 if(ModeNo > 0x13) {
2277 if( (HwInfo->jChipType != SIS_630) && 2311 if( (SiS_Pr->ChipType != SIS_630) &&
2278 (HwInfo->jChipType != SIS_300) ) { 2312 (SiS_Pr->ChipType != SIS_300) ) {
2279 if(VCLKIndex == 0x1b) VCLKIndex = 0x48; 2313 if(VCLKIndex == 0x1b) VCLKIndex = 0x48;
2280 } 2314 }
2281 } 2315 }
2282 } 2316 }
2283 } 2317 }
2284 2318
2285 } else { /* LVDS */ 2319 } else { /* LVDS */
@@ -2288,12 +2322,12 @@ SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2288 2322
2289 if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) { 2323 if(SiS_Pr->SiS_SetFlag & ProgrammingCRT2) {
2290 2324
2291 if( (SiS_Pr->SiS_IF_DEF_CH70xx != 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) ) { 2325 if( (SiS_Pr->SiS_IF_DEF_CH70xx != 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) ) {
2292 2326
2293 VCLKIndex &= 0x1f; 2327 VCLKIndex &= 0x1f;
2294 tempbx = 0; 2328 tempbx = 0;
2295 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1; 2329 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1;
2296 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 2330 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
2297 tempbx += 2; 2331 tempbx += 2;
2298 if(SiS_Pr->SiS_ModeType > ModeVGA) { 2332 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2299 if(SiS_Pr->SiS_CHSOverScan) tempbx = 8; 2333 if(SiS_Pr->SiS_CHSOverScan) tempbx = 8;
@@ -2306,66 +2340,68 @@ SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2306 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1; 2340 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1;
2307 } 2341 }
2308 } 2342 }
2309 switch(tempbx) { 2343 switch(tempbx) {
2310 case 0: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUNTSC; break; 2344 case 0: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUNTSC; break;
2311 case 1: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKONTSC; break; 2345 case 1: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKONTSC; break;
2312 case 2: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPAL; break; 2346 case 2: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPAL; break;
2313 case 3: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break; 2347 case 3: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break;
2314 case 4: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALM; break; 2348 case 4: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALM; break;
2315 case 5: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALM; break; 2349 case 5: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALM; break;
2316 case 6: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALN; break; 2350 case 6: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKUPALN; break;
2317 case 7: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALN; break; 2351 case 7: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPALN; break;
2318 case 8: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKSOPAL; break; 2352 case 8: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKSOPAL; break;
2319 default: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break; 2353 default: CHTVVCLKPtr = SiS_Pr->SiS_CHTVVCLKOPAL; break;
2320 } 2354 }
2321 VCLKIndex = CHTVVCLKPtr[VCLKIndex]; 2355 VCLKIndex = CHTVVCLKPtr[VCLKIndex];
2322 2356
2323 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 2357 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2324 2358
2325 if(HwInfo->jChipType < SIS_315H) { 2359 if(SiS_Pr->ChipType < SIS_315H) {
2326 VCLKIndex = SiS_Pr->PanelVCLKIdx300; 2360 VCLKIndex = SiS_Pr->PanelVCLKIdx300;
2327 } else { 2361 } else {
2328 VCLKIndex = SiS_Pr->PanelVCLKIdx315; 2362 VCLKIndex = SiS_Pr->PanelVCLKIdx315;
2329 } 2363 }
2330 2364
2365#ifdef SIS300
2331 /* Special Timing: Barco iQ Pro R series */ 2366 /* Special Timing: Barco iQ Pro R series */
2332 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) VCLKIndex = 0x44; 2367 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) VCLKIndex = 0x44;
2333 2368
2334 /* Special Timing: 848x480 parallel lvds */ 2369 /* Special Timing: 848x480 and 856x480 parallel lvds panels */
2335 if(SiS_Pr->SiS_CustomT == CUT_PANEL848) { 2370 if(SiS_Pr->SiS_CustomT == CUT_PANEL848 || SiS_Pr->SiS_CustomT == CUT_PANEL856) {
2336 if(HwInfo->jChipType < SIS_315H) { 2371 if(SiS_Pr->ChipType < SIS_315H) {
2337 VCLKIndex = VCLK34_300; 2372 VCLKIndex = VCLK34_300;
2338 /* if(resinfo == SIS_RI_1360x768) VCLKIndex = ?; */ 2373 /* if(resinfo == SIS_RI_1360x768) VCLKIndex = ?; */
2339 } else { 2374 } else {
2340 VCLKIndex = VCLK34_315; 2375 VCLKIndex = VCLK34_315;
2341 /* if(resinfo == SIS_RI_1360x768) VCLKIndex = ?; */ 2376 /* if(resinfo == SIS_RI_1360x768) VCLKIndex = ?; */
2342 } 2377 }
2343 } 2378 }
2379#endif
2344 2380
2345 } else { 2381 } else {
2346 2382
2347 VCLKIndex = VCLKIndexGEN; 2383 VCLKIndex = VCLKIndexGENCRT;
2348 if(HwInfo->jChipType < SIS_315H) { 2384 if(SiS_Pr->ChipType < SIS_315H) {
2349 if(ModeNo > 0x13) { 2385 if(ModeNo > 0x13) {
2350 if( (HwInfo->jChipType == SIS_630) && 2386 if( (SiS_Pr->ChipType == SIS_630) &&
2351 (HwInfo->jChipRevision >= 0x30) ) { 2387 (SiS_Pr->ChipRevision >= 0x30) ) {
2352 if(VCLKIndex == 0x14) VCLKIndex = 0x2e; 2388 if(VCLKIndex == 0x14) VCLKIndex = 0x2e;
2353 } 2389 }
2354 } 2390 }
2355 } 2391 }
2356 } 2392 }
2357 2393
2358 } else { /* if not programming CRT2 */ 2394 } else { /* if not programming CRT2 */
2359 2395
2360 VCLKIndex = VCLKIndexGEN; 2396 VCLKIndex = VCLKIndexGENCRT;
2361 if(HwInfo->jChipType < SIS_315H) { 2397 if(SiS_Pr->ChipType < SIS_315H) {
2362 if(ModeNo > 0x13) { 2398 if(ModeNo > 0x13) {
2363 if( (HwInfo->jChipType != SIS_630) && 2399 if( (SiS_Pr->ChipType != SIS_630) &&
2364 (HwInfo->jChipType != SIS_300) ) { 2400 (SiS_Pr->ChipType != SIS_300) ) {
2365 if(VCLKIndex == 0x1b) VCLKIndex = 0x48; 2401 if(VCLKIndex == 0x1b) VCLKIndex = 0x48;
2366 } 2402 }
2367#if 0 2403#if 0
2368 if(HwInfo->jChipType == SIS_730) { 2404 if(SiS_Pr->ChipType == SIS_730) {
2369 if(VCLKIndex == 0x0b) VCLKIndex = 0x40; /* 1024x768-70 */ 2405 if(VCLKIndex == 0x0b) VCLKIndex = 0x40; /* 1024x768-70 */
2370 if(VCLKIndex == 0x0d) VCLKIndex = 0x41; /* 1024x768-75 */ 2406 if(VCLKIndex == 0x0d) VCLKIndex = 0x41; /* 1024x768-75 */
2371 } 2407 }
@@ -2377,11 +2413,13 @@ SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2377 2413
2378 } 2414 }
2379 2415
2416#ifdef SIS_XORG_XF86
2380#ifdef TWDEBUG 2417#ifdef TWDEBUG
2381 xf86DrvMsg(0, X_INFO, "VCLKIndex %d (0x%x)\n", VCLKIndex, VCLKIndex); 2418 xf86DrvMsg(0, X_INFO, "VCLKIndex %d (0x%x)\n", VCLKIndex, VCLKIndex);
2382#endif 2419#endif
2420#endif
2383 2421
2384 return(VCLKIndex); 2422 return VCLKIndex;
2385} 2423}
2386 2424
2387/*********************************************/ 2425/*********************************************/
@@ -2389,26 +2427,19 @@ SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2389/*********************************************/ 2427/*********************************************/
2390 2428
2391static void 2429static void
2392SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 2430SiS_SetCRT2ModeRegs(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2393 PSIS_HW_INFO HwInfo)
2394{ 2431{
2395 USHORT i,j,modeflag; 2432 unsigned short i, j, modeflag, tempah=0;
2396 USHORT tempcl,tempah=0; 2433 short tempcl;
2397#if defined(SIS300) || defined(SIS315H) 2434#if defined(SIS300) || defined(SIS315H)
2398 USHORT tempbl; 2435 unsigned short tempbl;
2399#endif 2436#endif
2400#ifdef SIS315H 2437#ifdef SIS315H
2401 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 2438 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
2402 USHORT tempah2, tempbl2; 2439 unsigned short tempah2, tempbl2;
2403#endif 2440#endif
2404 2441
2405 if(ModeNo <= 0x13) { 2442 modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
2406 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2407 } else if(SiS_Pr->UseCustomMode) {
2408 modeflag = SiS_Pr->CModeFlag;
2409 } else {
2410 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2411 }
2412 2443
2413 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 2444 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
2414 2445
@@ -2418,18 +2449,18 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2418 } else { 2449 } else {
2419 2450
2420 for(i=0,j=4; i<3; i++,j++) SiS_SetReg(SiS_Pr->SiS_Part1Port,j,0); 2451 for(i=0,j=4; i<3; i++,j++) SiS_SetReg(SiS_Pr->SiS_Part1Port,j,0);
2421 if(HwInfo->jChipType >= SIS_315H) { 2452 if(SiS_Pr->ChipType >= SIS_315H) {
2422 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0x7F); 2453 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0x7F);
2423 } 2454 }
2424 2455
2425 tempcl = SiS_Pr->SiS_ModeType; 2456 tempcl = SiS_Pr->SiS_ModeType;
2426 2457
2427 if(HwInfo->jChipType < SIS_315H) { 2458 if(SiS_Pr->ChipType < SIS_315H) {
2428 2459
2429#ifdef SIS300 /* ---- 300 series ---- */ 2460#ifdef SIS300 /* ---- 300 series ---- */
2430 2461
2431 /* For 301BDH: (with LCD via LVDS) */ 2462 /* For 301BDH: (with LCD via LVDS) */
2432 if(SiS_Pr->SiS_VBType & VB_NoLCD) { 2463 if(SiS_Pr->SiS_VBType & VB_NoLCD) {
2433 tempbl = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32); 2464 tempbl = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32);
2434 tempbl &= 0xef; 2465 tempbl &= 0xef;
2435 tempbl |= 0x02; 2466 tempbl |= 0x02;
@@ -2438,16 +2469,16 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2438 tempbl &= 0xfd; 2469 tempbl &= 0xfd;
2439 } 2470 }
2440 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,tempbl); 2471 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,tempbl);
2441 } 2472 }
2442 2473
2443 if(ModeNo > 0x13) { 2474 if(ModeNo > 0x13) {
2444 tempcl -= ModeVGA; 2475 tempcl -= ModeVGA;
2445 if((tempcl > 0) || (tempcl == 0)) { /* tempcl is USHORT -> always true! */ 2476 if(tempcl >= 0) {
2446 tempah = ((0x10 >> tempcl) | 0x80); 2477 tempah = ((0x10 >> tempcl) | 0x80);
2447 } 2478 }
2448 } else tempah = 0x80; 2479 } else tempah = 0x80;
2449 2480
2450 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0xA0; 2481 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0xA0;
2451 2482
2452#endif /* SIS300 */ 2483#endif /* SIS300 */
2453 2484
@@ -2455,22 +2486,16 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2455 2486
2456#ifdef SIS315H /* ------- 315/330 series ------ */ 2487#ifdef SIS315H /* ------- 315/330 series ------ */
2457 2488
2458 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 2489 if(ModeNo > 0x13) {
2459 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { 2490 tempcl -= ModeVGA;
2460 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x08); 2491 if(tempcl >= 0) {
2461 } 2492 tempah = (0x08 >> tempcl);
2462 } 2493 if (tempah == 0) tempah = 1;
2463 2494 tempah |= 0x40;
2464 if(ModeNo > 0x13) { 2495 }
2465 tempcl -= ModeVGA; 2496 } else tempah = 0x40;
2466 if((tempcl > 0) || (tempcl == 0)) { /* tempcl is USHORT -> always true! */
2467 tempah = (0x08 >> tempcl);
2468 if (tempah == 0) tempah = 1;
2469 tempah |= 0x40;
2470 }
2471 } else tempah = 0x40;
2472 2497
2473 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0x50; 2498 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) tempah ^= 0x50;
2474 2499
2475#endif /* SIS315H */ 2500#endif /* SIS315H */
2476 2501
@@ -2478,84 +2503,89 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2478 2503
2479 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0; 2504 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0;
2480 2505
2481 if(HwInfo->jChipType < SIS_315H) { 2506 if(SiS_Pr->ChipType < SIS_315H) {
2482 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,tempah); 2507 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,tempah);
2483 } else { 2508 } else {
2484 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 2509#ifdef SIS315H
2485 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); 2510 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2486 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { 2511 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah);
2487 if(IS_SIS740) { 2512 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
2513 if(IS_SIS740) {
2488 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,tempah); 2514 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,tempah);
2489 } else { 2515 } else {
2490 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah); 2516 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x00,0xa0,tempah);
2491 } 2517 }
2492 } 2518 }
2519#endif
2493 } 2520 }
2494 2521
2495 if(SiS_Pr->SiS_VBType & VB_SISVB) { 2522 if(SiS_Pr->SiS_VBType & VB_SISVB) {
2496 2523
2497 tempah = 0x01; 2524 tempah = 0x01;
2498 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 2525 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
2499 tempah |= 0x02; 2526 tempah |= 0x02;
2500 } 2527 }
2501 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) { 2528 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
2502 tempah ^= 0x05; 2529 tempah ^= 0x05;
2503 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { 2530 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
2504 tempah ^= 0x01; 2531 tempah ^= 0x01;
2505 } 2532 }
2506 } 2533 }
2507 2534
2508 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0; 2535 if(SiS_Pr->ChipType < SIS_315H) {
2509 2536
2510 if(HwInfo->jChipType < SIS_315H) { 2537 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0;
2511 2538
2512 tempah = (tempah << 5) & 0xFF; 2539 tempah = (tempah << 5) & 0xFF;
2513 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x01,tempah); 2540 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x01,tempah);
2514 tempah = (tempah >> 5) & 0xFF; 2541 tempah = (tempah >> 5) & 0xFF;
2515 2542
2516 } else { 2543 } else {
2517 2544
2518 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2E,0xF8,tempah); 2545 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0x08;
2546 else if(!(SiS_IsDualEdge(SiS_Pr))) tempah |= 0x08;
2547 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2E,0xF0,tempah);
2548 tempah &= ~0x08;
2519 2549
2520 } 2550 }
2521 2551
2522 if((SiS_Pr->SiS_ModeType == ModeVGA) && (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))) { 2552 if((SiS_Pr->SiS_ModeType == ModeVGA) && (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))) {
2523 tempah |= 0x10; 2553 tempah |= 0x10;
2524 } 2554 }
2525 2555
2526 tempah |= 0x80; 2556 tempah |= 0x80;
2527 if(SiS_Pr->SiS_VBType & VB_SIS301) { 2557 if(SiS_Pr->SiS_VBType & VB_SIS301) {
2528 if(SiS_Pr->PanelXRes < 1280 && SiS_Pr->PanelYRes < 960) tempah &= ~0x80; 2558 if(SiS_Pr->PanelXRes < 1280 && SiS_Pr->PanelYRes < 960) tempah &= ~0x80;
2529 } 2559 }
2530 2560
2531 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 2561 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2532 if(!(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p | TVSetYPbPr525p))) { 2562 if(!(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p | TVSetYPbPr525p))) {
2533 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 2563 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
2534 tempah |= 0x20; 2564 tempah |= 0x20;
2535 } 2565 }
2536 } 2566 }
2537 } 2567 }
2538 2568
2539 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0D,0x40,tempah); 2569 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0D,0x40,tempah);
2540 2570
2541 tempah = 0x80; 2571 tempah = 0x80;
2542 if(SiS_Pr->SiS_VBType & VB_SIS301) { 2572 if(SiS_Pr->SiS_VBType & VB_SIS301) {
2543 if(SiS_Pr->PanelXRes < 1280 && SiS_Pr->PanelYRes < 960) tempah = 0; 2573 if(SiS_Pr->PanelXRes < 1280 && SiS_Pr->PanelYRes < 960) tempah = 0;
2544 } 2574 }
2545 2575
2546 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempah |= 0x40; 2576 if(SiS_IsDualLink(SiS_Pr)) tempah |= 0x40;
2547 2577
2548 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 2578 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
2549 if(SiS_Pr->SiS_TVMode & TVRPLLDIV2XO) { 2579 if(SiS_Pr->SiS_TVMode & TVRPLLDIV2XO) {
2550 tempah |= 0x40; 2580 tempah |= 0x40;
2551 } 2581 }
2552 } 2582 }
2553 2583
2554 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0C,tempah); 2584 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0C,tempah);
2555 2585
2556 } else { /* LVDS */ 2586 } else { /* LVDS */
2557 2587
2558 if(HwInfo->jChipType >= SIS_315H) { 2588 if(SiS_Pr->ChipType >= SIS_315H) {
2559 2589
2560#ifdef SIS315H 2590#ifdef SIS315H
2561 /* LVDS can only be slave in 8bpp modes */ 2591 /* LVDS can only be slave in 8bpp modes */
@@ -2566,36 +2596,30 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2566 } 2596 }
2567 } 2597 }
2568 2598
2569 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 2599 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) tempah |= 0x02;
2570 tempah |= 0x02;
2571 }
2572 2600
2573 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 2601 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) tempah ^= 0x01;
2574 tempah ^= 0x01;
2575 }
2576 2602
2577 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { 2603 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 1;
2578 tempah = 1;
2579 }
2580 2604
2581 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2e,0xF0,tempah); 2605 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2e,0xF0,tempah);
2582#endif 2606#endif
2583 2607
2584 } else { 2608 } else {
2585 2609
2586#ifdef SIS300 2610#ifdef SIS300
2587 tempah = 0; 2611 tempah = 0;
2588 if( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) && (SiS_Pr->SiS_ModeType > ModeVGA) ) { 2612 if( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) && (SiS_Pr->SiS_ModeType > ModeVGA) ) {
2589 tempah |= 0x02; 2613 tempah |= 0x02;
2590 } 2614 }
2591 tempah <<= 5; 2615 tempah <<= 5;
2592 2616
2593 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0; 2617 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) tempah = 0;
2594 2618
2595 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x01,tempah); 2619 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x01,tempah);
2596#endif 2620#endif
2597 2621
2598 } 2622 }
2599 2623
2600 } 2624 }
2601 2625
@@ -2603,10 +2627,10 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2603 2627
2604 if(SiS_Pr->SiS_VBType & VB_SISVB) { 2628 if(SiS_Pr->SiS_VBType & VB_SISVB) {
2605 2629
2606 if(HwInfo->jChipType >= SIS_315H) { 2630 if(SiS_Pr->ChipType >= SIS_315H) {
2607 2631
2608#ifdef SIS315H 2632#ifdef SIS315H
2609 unsigned char bridgerev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01); 2633 /* unsigned char bridgerev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01); */
2610 2634
2611 /* The following is nearly unpreditable and varies from machine 2635 /* The following is nearly unpreditable and varies from machine
2612 * to machine. Especially the 301DH seems to be a real trouble 2636 * to machine. Especially the 301DH seems to be a real trouble
@@ -2619,25 +2643,28 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2619 2643
2620 /* 740 variants match for 30xB, 301B-DH, 30xLV */ 2644 /* 740 variants match for 30xB, 301B-DH, 30xLV */
2621 2645
2622 if(!(IS_SIS740)) { 2646 if(!(IS_SIS740)) {
2623 tempah = 0x04; /* For all bridges */ 2647 tempah = 0x04; /* For all bridges */
2624 tempbl = 0xfb; 2648 tempbl = 0xfb;
2625 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 2649 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2626 tempah = 0x00; 2650 tempah = 0x00;
2627 if(SiS_IsDualEdge(SiS_Pr, HwInfo)) { 2651 if(SiS_IsDualEdge(SiS_Pr)) {
2628 tempbl = 0xff; 2652 tempbl = 0xff;
2629 } 2653 }
2630 } 2654 }
2631 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah); 2655 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah);
2632 } 2656 }
2633 2657
2634 /* The following two are responsible for eventually wrong colors 2658 /* The following two are responsible for eventually wrong colors
2635 * in TV output. The DH (VB_NoLCD) conditions are unknown; the 2659 * in TV output. The DH (VB_NoLCD) conditions are unknown; the
2636 * b0 was found in some 651 machine (Pim; P4_23=0xe5); the b1 version 2660 * b0 was found in some 651 machine (Pim; P4_23=0xe5); the b1 version
2637 * in a 650 box (Jake). What is the criteria? 2661 * in a 650 box (Jake). What is the criteria?
2662 * Addendum: Another combination 651+301B-DH(b1) (Rapo) needs same
2663 * treatment like the 651+301B-DH(b0) case. Seems more to be the
2664 * chipset than the bridge revision.
2638 */ 2665 */
2639 2666
2640 if((IS_SIS740) || (HwInfo->jChipType >= SIS_661) || (SiS_Pr->SiS_ROMNew)) { 2667 if((IS_SIS740) || (SiS_Pr->ChipType >= SIS_661) || (SiS_Pr->SiS_ROMNew)) {
2641 tempah = 0x30; 2668 tempah = 0x30;
2642 tempbl = 0xc0; 2669 tempbl = 0xc0;
2643 if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) || 2670 if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) ||
@@ -2649,20 +2676,30 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2649 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0x3f,tempbl); 2676 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0x3f,tempbl);
2650 } else if(SiS_Pr->SiS_VBType & VB_SIS301) { 2677 } else if(SiS_Pr->SiS_VBType & VB_SIS301) {
2651 /* Fixes "TV-blue-bug" on 315+301 */ 2678 /* Fixes "TV-blue-bug" on 315+301 */
2652 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2c,0xcf); /* For 301 */ 2679 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2c,0xcf); /* For 301 */
2653 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f); 2680 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f);
2654 } else if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 2681 } else if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
2655 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30); /* For 30xLV */ 2682 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30); /* For 30xLV */
2656 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x21,0xc0);
2657 } else if((SiS_Pr->SiS_VBType & VB_NoLCD) && (bridgerev == 0xb0)) {
2658 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30); /* For 30xB-DH rev b0 (or "DH on 651"?) */
2659 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x21,0xc0); 2683 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x21,0xc0);
2684 } else if(SiS_Pr->SiS_VBType & VB_NoLCD) { /* For 301B-DH */
2685 tempah = 0x30; tempah2 = 0xc0;
2686 tempbl = 0xcf; tempbl2 = 0x3f;
2687 if(SiS_Pr->SiS_TVBlue == 0) {
2688 tempah = tempah2 = 0x00;
2689 } else if(SiS_Pr->SiS_TVBlue == -1) {
2690 /* Set on 651/M650, clear on 315/650 */
2691 if(!(IS_SIS65x)) /* (bridgerev != 0xb0) */ {
2692 tempah = tempah2 = 0x00;
2693 }
2694 }
2695 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2c,tempbl,tempah);
2696 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,tempbl2,tempah2);
2660 } else { 2697 } else {
2661 tempah = 0x30; tempah2 = 0xc0; /* For 30xB (and 301BDH rev b1) */ 2698 tempah = 0x30; tempah2 = 0xc0; /* For 30xB, 301C */
2662 tempbl = 0xcf; tempbl2 = 0x3f; 2699 tempbl = 0xcf; tempbl2 = 0x3f;
2663 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 2700 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2664 tempah = tempah2 = 0x00; 2701 tempah = tempah2 = 0x00;
2665 if(SiS_IsDualEdge(SiS_Pr, HwInfo)) { 2702 if(SiS_IsDualEdge(SiS_Pr)) {
2666 tempbl = tempbl2 = 0xff; 2703 tempbl = tempbl2 = 0xff;
2667 } 2704 }
2668 } 2705 }
@@ -2676,23 +2713,23 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2676 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,0x7f,tempah); 2713 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,0x7f,tempah);
2677 } else { 2714 } else {
2678 tempah = 0x00; 2715 tempah = 0x00;
2679 tempbl = 0x7f; 2716 tempbl = 0x7f;
2680 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 2717 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2681 tempbl = 0xff; 2718 tempbl = 0xff;
2682 if(!(SiS_IsDualEdge(SiS_Pr, HwInfo))) tempah = 0x80; 2719 if(!(SiS_IsDualEdge(SiS_Pr))) tempah = 0x80;
2683 } 2720 }
2684 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah); 2721 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x23,tempbl,tempah);
2685 } 2722 }
2686 2723
2687#endif /* SIS315H */ 2724#endif /* SIS315H */
2688 2725
2689 } else if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 2726 } else if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2690 2727
2691#ifdef SIS300 2728#ifdef SIS300
2692 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f); 2729 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x21,0x3f);
2693 2730
2694 if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) || 2731 if((SiS_Pr->SiS_VBInfo & DisableCRT2Display) ||
2695 ((SiS_Pr->SiS_VBType & VB_NoLCD) && 2732 ((SiS_Pr->SiS_VBType & VB_NoLCD) &&
2696 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD))) { 2733 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD))) {
2697 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x23,0x7F); 2734 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x23,0x7F);
2698 } else { 2735 } else {
@@ -2702,9 +2739,9 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2702 2739
2703 } 2740 }
2704 2741
2705 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 2742 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
2706 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x0D,0x80); 2743 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x0D,0x80);
2707 if(SiS_Pr->SiS_VBType & VB_SIS301C) { 2744 if(SiS_Pr->SiS_VBType & VB_SIS30xCLV) {
2708 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x3A,0xC0); 2745 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x3A,0xC0);
2709 } 2746 }
2710 } 2747 }
@@ -2712,16 +2749,16 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2712 } else { /* LVDS */ 2749 } else { /* LVDS */
2713 2750
2714#ifdef SIS315H 2751#ifdef SIS315H
2715 if(HwInfo->jChipType >= SIS_315H) { 2752 if(SiS_Pr->ChipType >= SIS_315H) {
2716 2753
2717 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 2754 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
2718 2755
2719 tempah = 0x04; 2756 tempah = 0x04;
2720 tempbl = 0xfb; 2757 tempbl = 0xfb;
2721 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 2758 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2722 tempah = 0x00; 2759 tempah = 0x00;
2723 if(SiS_IsDualEdge(SiS_Pr, HwInfo)) tempbl = 0xff; 2760 if(SiS_IsDualEdge(SiS_Pr)) tempbl = 0xff;
2724 } 2761 }
2725 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah); 2762 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,tempbl,tempah);
2726 2763
2727 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { 2764 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
@@ -2730,7 +2767,7 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2730 2767
2731 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30); 2768 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30);
2732 2769
2733 } else if(HwInfo->jChipType == SIS_550) { 2770 } else if(SiS_Pr->ChipType == SIS_550) {
2734 2771
2735 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 2772 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
2736 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30); 2773 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2c,0x30);
@@ -2748,212 +2785,120 @@ SiS_SetCRT2ModeRegs(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2748/* GET RESOLUTION DATA */ 2785/* GET RESOLUTION DATA */
2749/*********************************************/ 2786/*********************************************/
2750 2787
2751USHORT 2788unsigned short
2752SiS_GetResInfo(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex) 2789SiS_GetResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2753{ 2790{
2754 if(ModeNo <= 0x13) return((USHORT)SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo); 2791 if(ModeNo <= 0x13)
2755 else return((USHORT)SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO); 2792 return ((unsigned short)SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo);
2793 else
2794 return ((unsigned short)SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO);
2756} 2795}
2757 2796
2758static void 2797static void
2759SiS_GetCRT2ResInfo(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 2798SiS_GetCRT2ResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
2760 PSIS_HW_INFO HwInfo)
2761{ 2799{
2762 USHORT xres,yres,modeflag=0,resindex; 2800 unsigned short xres, yres, modeflag=0, resindex;
2763 2801
2764 if(SiS_Pr->UseCustomMode) { 2802 if(SiS_Pr->UseCustomMode) {
2765 xres = SiS_Pr->CHDisplay; 2803 xres = SiS_Pr->CHDisplay;
2766 if(SiS_Pr->CModeFlag & HalfDCLK) xres *= 2; 2804 if(SiS_Pr->CModeFlag & HalfDCLK) xres <<= 1;
2767 SiS_Pr->SiS_VGAHDE = SiS_Pr->SiS_HDE = xres; 2805 SiS_Pr->SiS_VGAHDE = SiS_Pr->SiS_HDE = xres;
2768 yres = SiS_Pr->CVDisplay; 2806 /* DoubleScanMode-check done in CheckCalcCustomMode()! */
2769 if(SiS_Pr->CModeFlag & DoubleScanMode) yres *= 2; 2807 SiS_Pr->SiS_VGAVDE = SiS_Pr->SiS_VDE = SiS_Pr->CVDisplay;
2770 SiS_Pr->SiS_VGAVDE = SiS_Pr->SiS_VDE = yres; 2808 return;
2771 return; 2809 }
2772 }
2773
2774 resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex);
2775 2810
2776 if(ModeNo <= 0x13) { 2811 resindex = SiS_GetResInfo(SiS_Pr,ModeNo,ModeIdIndex);
2777 xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
2778 yres = SiS_Pr->SiS_StResInfo[resindex].VTotal;
2779 } else {
2780 xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
2781 yres = SiS_Pr->SiS_ModeResInfo[resindex].VTotal;
2782 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2783 }
2784 2812
2785 if(!SiS_Pr->SiS_IF_DEF_DSTN && !SiS_Pr->SiS_IF_DEF_FSTN) { 2813 if(ModeNo <= 0x13) {
2814 xres = SiS_Pr->SiS_StResInfo[resindex].HTotal;
2815 yres = SiS_Pr->SiS_StResInfo[resindex].VTotal;
2816 } else {
2817 xres = SiS_Pr->SiS_ModeResInfo[resindex].HTotal;
2818 yres = SiS_Pr->SiS_ModeResInfo[resindex].VTotal;
2819 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2820 }
2786 2821
2787 if((HwInfo->jChipType >= SIS_315H) && (SiS_Pr->SiS_IF_DEF_LVDS == 1)) { 2822 if(!SiS_Pr->SiS_IF_DEF_DSTN && !SiS_Pr->SiS_IF_DEF_FSTN) {
2788 if((ModeNo != 0x03) && (SiS_Pr->SiS_SetFlag & SetDOSMode)) {
2789 if(yres == 350) yres = 400;
2790 }
2791 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x3a) & 0x01) {
2792 if(ModeNo == 0x12) yres = 400;
2793 }
2794 }
2795 2823
2796 if(modeflag & HalfDCLK) xres *= 2; 2824 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->SiS_IF_DEF_LVDS == 1)) {
2797 if(modeflag & DoubleScanMode) yres *= 2; 2825 if((ModeNo != 0x03) && (SiS_Pr->SiS_SetFlag & SetDOSMode)) {
2826 if(yres == 350) yres = 400;
2827 }
2828 if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x3a) & 0x01) {
2829 if(ModeNo == 0x12) yres = 400;
2830 }
2831 }
2798 2832
2799 } 2833 if(modeflag & HalfDCLK) xres <<= 1;
2834 if(modeflag & DoubleScanMode) yres <<= 1;
2800 2835
2801 if((SiS_Pr->SiS_VBType & VB_SISVB) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) { 2836 }
2802 2837
2803#if 0 2838 if((SiS_Pr->SiS_VBType & VB_SISVB) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) {
2804 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCDA | SetCRT2ToLCD | SetCRT2ToHiVision)) {
2805 if(xres == 720) xres = 640;
2806 }
2807#endif
2808 2839
2809 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 2840 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
2810 switch(SiS_Pr->SiS_LCDResInfo) { 2841 switch(SiS_Pr->SiS_LCDResInfo) {
2811 case Panel_1024x768: 2842 case Panel_1024x768:
2812 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { 2843 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
2813 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { 2844 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
2814 if(yres == 350) yres = 357; 2845 if(yres == 350) yres = 357;
2815 if(yres == 400) yres = 420; 2846 if(yres == 400) yres = 420;
2816 if(yres == 480) yres = 525; 2847 if(yres == 480) yres = 525;
2817 } 2848 }
2818 } 2849 }
2819 break; 2850 break;
2820 case Panel_1280x1024: 2851 case Panel_1280x1024:
2821 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { 2852 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
2822 /* BIOS bug - does this regardless of scaling */ 2853 /* BIOS bug - does this regardless of scaling */
2823 if(yres == 400) yres = 405; 2854 if(yres == 400) yres = 405;
2855 }
2856 if(yres == 350) yres = 360;
2857 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
2858 if(yres == 360) yres = 375;
2824 } 2859 }
2825 if(yres == 350) yres = 360;
2826 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
2827 if(yres == 360) yres = 375;
2828 }
2829 break; 2860 break;
2830 case Panel_1600x1200: 2861 case Panel_1600x1200:
2831 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { 2862 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
2832 if(yres == 1024) yres = 1056; 2863 if(yres == 1024) yres = 1056;
2833 } 2864 }
2834 break; 2865 break;
2835 } 2866 }
2836 } 2867 }
2837 2868
2838 } else { 2869 } else {
2839 2870
2840 if(SiS_Pr->SiS_VBType & VB_SISVB) { 2871 if(SiS_Pr->SiS_VBType & VB_SISVB) {
2841 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToHiVision)) { 2872 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToHiVision)) {
2842 if(xres == 720) xres = 640; 2873 if(xres == 720) xres = 640;
2843 } 2874 }
2844 } else if(xres == 720) xres = 640; 2875 } else if(xres == 720) xres = 640;
2845 2876
2846 if(SiS_Pr->SiS_SetFlag & SetDOSMode) { 2877 if(SiS_Pr->SiS_SetFlag & SetDOSMode) {
2847 yres = 400; 2878 yres = 400;
2848 if(HwInfo->jChipType >= SIS_315H) { 2879 if(SiS_Pr->ChipType >= SIS_315H) {
2849 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x17) & 0x80) yres = 480; 2880 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x17) & 0x80) yres = 480;
2850 } else { 2881 } else {
2851 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x80) yres = 480; 2882 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x80) yres = 480;
2852 } 2883 }
2853 if(SiS_Pr->SiS_IF_DEF_DSTN || SiS_Pr->SiS_IF_DEF_FSTN) yres = 480; 2884 if(SiS_Pr->SiS_IF_DEF_DSTN || SiS_Pr->SiS_IF_DEF_FSTN) yres = 480;
2854 } 2885 }
2855 2886
2856 } 2887 }
2857 SiS_Pr->SiS_VGAHDE = SiS_Pr->SiS_HDE = xres; 2888 SiS_Pr->SiS_VGAHDE = SiS_Pr->SiS_HDE = xres;
2858 SiS_Pr->SiS_VGAVDE = SiS_Pr->SiS_VDE = yres; 2889 SiS_Pr->SiS_VGAVDE = SiS_Pr->SiS_VDE = yres;
2859} 2890}
2860 2891
2861/*********************************************/ 2892/*********************************************/
2862/* GET CRT2 TIMING DATA */ 2893/* GET CRT2 TIMING DATA */
2863/*********************************************/ 2894/*********************************************/
2864 2895
2865static BOOLEAN
2866SiS_GetLVDSCRT1Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
2867 USHORT RefreshRateTableIndex, USHORT *ResIndex,
2868 USHORT *DisplayType)
2869 {
2870 USHORT modeflag=0;
2871
2872 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
2873 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
2874 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return FALSE;
2875 }
2876 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
2877 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return FALSE;
2878 } else
2879 return FALSE;
2880
2881 if(ModeNo <= 0x13) {
2882 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
2883 (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
2884 } else {
2885 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
2886 (*ResIndex) = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
2887 }
2888
2889 (*ResIndex) &= 0x3F;
2890
2891 if((SiS_Pr->SiS_IF_DEF_CH70xx) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
2892 (*DisplayType) = 18;
2893 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) (*DisplayType)++;
2894 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
2895 (*DisplayType) += 2;
2896 if(SiS_Pr->SiS_ModeType > ModeVGA) {
2897 if(SiS_Pr->SiS_CHSOverScan) (*DisplayType) = 99;
2898 }
2899 if(SiS_Pr->SiS_TVMode & TVSetPALM) {
2900 (*DisplayType) = 18; /* PALM uses NTSC data */
2901 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) (*DisplayType)++;
2902 } else if(SiS_Pr->SiS_TVMode & TVSetPALN) {
2903 (*DisplayType) = 20; /* PALN uses PAL data */
2904 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) (*DisplayType)++;
2905 }
2906 }
2907 } else {
2908 switch(SiS_Pr->SiS_LCDResInfo) {
2909 case Panel_640x480: (*DisplayType) = 50; break;
2910 case Panel_640x480_2: (*DisplayType) = 52; break;
2911 case Panel_640x480_3: (*DisplayType) = 54; break;
2912 case Panel_800x600: (*DisplayType) = 0; break;
2913 case Panel_1024x600: (*DisplayType) = 23; break;
2914 case Panel_1024x768: (*DisplayType) = 4; break;
2915 case Panel_1152x768: (*DisplayType) = 27; break;
2916 case Panel_1280x768: (*DisplayType) = 40; break;
2917 case Panel_1280x1024: (*DisplayType) = 8; break;
2918 case Panel_1400x1050: (*DisplayType) = 14; break;
2919 case Panel_1600x1200: (*DisplayType) = 36; break;
2920 default: return FALSE;
2921 }
2922
2923 if(modeflag & HalfDCLK) (*DisplayType)++;
2924
2925 switch(SiS_Pr->SiS_LCDResInfo) {
2926 case Panel_640x480:
2927 case Panel_640x480_2:
2928 case Panel_640x480_3:
2929 break;
2930 default:
2931 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) (*DisplayType) += 2;
2932 }
2933
2934 if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
2935 (*DisplayType) = 12;
2936 if(modeflag & HalfDCLK) (*DisplayType)++;
2937 }
2938 }
2939
2940#if 0
2941 if(SiS_Pr->SiS_IF_DEF_FSTN) {
2942 if(SiS_Pr->SiS_LCDResInfo == SiS_Pr->SiS_Panel320x480){
2943 (*DisplayType) = 22;
2944 }
2945 }
2946#endif
2947
2948 return TRUE;
2949}
2950
2951static void 2896static void
2952SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 2897SiS_GetCRT2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
2953 USHORT RefreshRateTableIndex,USHORT *CRT2Index,USHORT *ResIndex, 2898 unsigned short RefreshRateTableIndex, unsigned short *CRT2Index,
2954 PSIS_HW_INFO HwInfo) 2899 unsigned short *ResIndex)
2955{ 2900{
2956 USHORT tempbx=0,tempal=0,resinfo=0; 2901 unsigned short tempbx=0, tempal=0, resinfo=0;
2957 2902
2958 if(ModeNo <= 0x13) { 2903 if(ModeNo <= 0x13) {
2959 tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 2904 tempal = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
@@ -2966,18 +2911,20 @@ SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
2966 2911
2967 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { /* LCD */ 2912 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { /* LCD */
2968 2913
2969 tempbx = SiS_Pr->SiS_LCDResInfo; 2914 tempbx = SiS_Pr->SiS_LCDResInfo;
2970 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx += 32; 2915 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx += 32;
2971 2916
2917 /* patch index */
2972 if(SiS_Pr->SiS_LCDResInfo == Panel_1680x1050) { 2918 if(SiS_Pr->SiS_LCDResInfo == Panel_1680x1050) {
2973 if (resinfo == SIS_RI_1280x800) tempal = 9; 2919 if (resinfo == SIS_RI_1280x800) tempal = 9;
2974 else if(resinfo == SIS_RI_1400x1050) tempal = 11; 2920 else if(resinfo == SIS_RI_1400x1050) tempal = 11;
2975 } else if((SiS_Pr->SiS_LCDResInfo == Panel_1280x800) || 2921 } else if((SiS_Pr->SiS_LCDResInfo == Panel_1280x800) ||
2976 (SiS_Pr->SiS_LCDResInfo == Panel_1280x800_2)) { 2922 (SiS_Pr->SiS_LCDResInfo == Panel_1280x800_2) ||
2923 (SiS_Pr->SiS_LCDResInfo == Panel_1280x854)) {
2977 if (resinfo == SIS_RI_1280x768) tempal = 9; 2924 if (resinfo == SIS_RI_1280x768) tempal = 9;
2978 } 2925 }
2979 2926
2980 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 2927 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
2981 /* Pass 1:1 only (center-screen handled outside) */ 2928 /* Pass 1:1 only (center-screen handled outside) */
2982 /* This is never called for the panel's native resolution */ 2929 /* This is never called for the panel's native resolution */
2983 /* since Pass1:1 will not be set in this case */ 2930 /* since Pass1:1 will not be set in this case */
@@ -2991,8 +2938,8 @@ SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
2991 if(SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) { 2938 if(SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) {
2992 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { 2939 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) {
2993 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { 2940 if(!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
2994 tempbx = 200; 2941 tempbx = 200;
2995 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx++; 2942 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) tempbx++;
2996 } 2943 }
2997 } 2944 }
2998 } 2945 }
@@ -3000,23 +2947,23 @@ SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3000 2947
3001 } else { /* TV */ 2948 } else { /* TV */
3002 2949
3003 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 2950 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
3004 /* if(SiS_Pr->SiS_VGAVDE > 480) SiS_Pr->SiS_TVMode &= (~TVSetTVSimuMode); */ 2951 /* if(SiS_Pr->SiS_VGAVDE > 480) SiS_Pr->SiS_TVMode &= (~TVSetTVSimuMode); */
3005 tempbx = 2; 2952 tempbx = 2;
3006 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 2953 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
3007 tempbx = 13; 2954 tempbx = 13;
3008 if(!(SiS_Pr->SiS_TVMode & TVSetTVSimuMode)) tempbx = 14; 2955 if(!(SiS_Pr->SiS_TVMode & TVSetTVSimuMode)) tempbx = 14;
3009 } 2956 }
3010 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 2957 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
3011 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) tempbx = 7; 2958 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) tempbx = 7;
3012 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) tempbx = 6; 2959 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) tempbx = 6;
3013 else tempbx = 5; 2960 else tempbx = 5;
3014 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) tempbx += 5; 2961 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) tempbx += 5;
3015 } else { 2962 } else {
3016 if(SiS_Pr->SiS_TVMode & TVSetPAL) tempbx = 3; 2963 if(SiS_Pr->SiS_TVMode & TVSetPAL) tempbx = 3;
3017 else tempbx = 4; 2964 else tempbx = 4;
3018 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) tempbx += 5; 2965 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) tempbx += 5;
3019 } 2966 }
3020 2967
3021 } 2968 }
3022 2969
@@ -3024,26 +2971,34 @@ SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3024 2971
3025 if(ModeNo > 0x13) { 2972 if(ModeNo > 0x13) {
3026 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision) { 2973 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision) {
3027 if(tempal == 6) tempal = 7; 2974 switch(resinfo) {
3028 if((resinfo == SIS_RI_720x480) || 2975 case SIS_RI_720x480:
3029 (resinfo == SIS_RI_720x576) ||
3030 (resinfo == SIS_RI_768x576)) {
3031 tempal = 6; 2976 tempal = 6;
3032 if(SiS_Pr->SiS_TVMode & (TVSetPAL | TVSetPALN)) { 2977 if(SiS_Pr->SiS_TVMode & (TVSetPAL | TVSetPALN)) tempal = 9;
3033 if(resinfo == SIS_RI_720x480) tempal = 9; 2978 break;
2979 case SIS_RI_720x576:
2980 case SIS_RI_768x576:
2981 case SIS_RI_1024x576: /* Not in NTSC or YPBPR mode (except 1080i)! */
2982 tempal = 6;
2983 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
2984 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) tempal = 8;
3034 } 2985 }
3035 } 2986 break;
3036 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 2987 case SIS_RI_800x480:
3037 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) { 2988 tempal = 4;
3038 if(resinfo == SIS_RI_1024x768) tempal = 8; 2989 break;
2990 case SIS_RI_512x384:
2991 case SIS_RI_1024x768:
2992 tempal = 7;
2993 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
2994 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) tempal = 8;
3039 } 2995 }
3040 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) { 2996 break;
3041 if((resinfo == SIS_RI_720x576) || 2997 case SIS_RI_1280x720:
3042 (resinfo == SIS_RI_768x576)) { 2998 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
3043 tempal = 8; 2999 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) tempal = 9;
3044 }
3045 if(resinfo == SIS_RI_1280x720) tempal = 9;
3046 } 3000 }
3001 break;
3047 } 3002 }
3048 } 3003 }
3049 } 3004 }
@@ -3056,65 +3011,60 @@ SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3056 tempbx = 0; 3011 tempbx = 0;
3057 if((SiS_Pr->SiS_IF_DEF_CH70xx) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) { 3012 if((SiS_Pr->SiS_IF_DEF_CH70xx) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
3058 3013
3059 tempbx = 10; 3014 tempbx = 90;
3060 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1; 3015 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
3061 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 3016 tempbx = 92;
3062 tempbx += 2;
3063 if(SiS_Pr->SiS_ModeType > ModeVGA) { 3017 if(SiS_Pr->SiS_ModeType > ModeVGA) {
3064 if(SiS_Pr->SiS_CHSOverScan) tempbx = 99; 3018 if(SiS_Pr->SiS_CHSOverScan) tempbx = 99;
3065 } 3019 }
3066 if(SiS_Pr->SiS_TVMode & TVSetPALM) { 3020 if(SiS_Pr->SiS_TVMode & TVSetPALM) tempbx = 94;
3067 tempbx = 90; 3021 else if(SiS_Pr->SiS_TVMode & TVSetPALN) tempbx = 96;
3068 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1; 3022 }
3069 } else if(SiS_Pr->SiS_TVMode & TVSetPALN) { 3023 if(tempbx != 99) {
3070 tempbx = 92; 3024 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx++;
3071 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) tempbx += 1; 3025 }
3072 }
3073 }
3074 3026
3075 } else { 3027 } else {
3076 3028
3077 switch(SiS_Pr->SiS_LCDResInfo) { 3029 switch(SiS_Pr->SiS_LCDResInfo) {
3078 case Panel_640x480: tempbx = 6; break; 3030 case Panel_640x480: tempbx = 12; break;
3079 case Panel_640x480_2: 3031 case Panel_320x240_1: tempbx = 10; break;
3080 case Panel_640x480_3: tempbx = 30; break; 3032 case Panel_320x240_2:
3081 case Panel_800x600: tempbx = 0; break; 3033 case Panel_320x240_3: tempbx = 14; break;
3082 case Panel_1024x600: tempbx = 15; break; 3034 case Panel_800x600: tempbx = 16; break;
3083 case Panel_1024x768: tempbx = 2; break; 3035 case Panel_1024x600: tempbx = 18; break;
3084 case Panel_1152x768: tempbx = 17; break; 3036 case Panel_1152x768:
3085 case Panel_1280x768: tempbx = 18; break; 3037 case Panel_1024x768: tempbx = 20; break;
3086 case Panel_1280x1024: tempbx = 4; break; 3038 case Panel_1280x768: tempbx = 22; break;
3087 case Panel_1400x1050: tempbx = 8; break; 3039 case Panel_1280x1024: tempbx = 24; break;
3088 case Panel_1600x1200: tempbx = 21; break; 3040 case Panel_1400x1050: tempbx = 26; break;
3041 case Panel_1600x1200: tempbx = 28; break;
3042#ifdef SIS300
3089 case Panel_Barco1366: tempbx = 80; break; 3043 case Panel_Barco1366: tempbx = 80; break;
3044#endif
3090 } 3045 }
3091 3046
3092 switch(SiS_Pr->SiS_LCDResInfo) { 3047 switch(SiS_Pr->SiS_LCDResInfo) {
3048 case Panel_320x240_1:
3049 case Panel_320x240_2:
3050 case Panel_320x240_3:
3093 case Panel_640x480: 3051 case Panel_640x480:
3094 case Panel_640x480_2:
3095 case Panel_640x480_3:
3096 break; 3052 break;
3097 default: 3053 default:
3098 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; 3054 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++;
3099 } 3055 }
3100 3056
3101 if(SiS_Pr->SiS_LCDInfo & LCDPass11) tempbx = 7; 3057 if(SiS_Pr->SiS_LCDInfo & LCDPass11) tempbx = 30;
3102 3058
3059#ifdef SIS300
3103 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) { 3060 if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
3104 tempbx = 82; 3061 tempbx = 82;
3105 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; 3062 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++;
3106 } else if(SiS_Pr->SiS_CustomT == CUT_PANEL848) { 3063 } else if(SiS_Pr->SiS_CustomT == CUT_PANEL848 || SiS_Pr->SiS_CustomT == CUT_PANEL856) {
3107 tempbx = 84; 3064 tempbx = 84;
3108 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++; 3065 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) tempbx++;
3109 } 3066 }
3110 3067#endif
3111 if((SiS_Pr->SiS_CustomT != CUT_BARCO1366) &&
3112 (SiS_Pr->SiS_CustomT != CUT_PANEL848)) {
3113 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) &&
3114 (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) {
3115 tempal = 0;
3116 }
3117 }
3118 3068
3119 } 3069 }
3120 3070
@@ -3124,12 +3074,11 @@ SiS_GetCRT2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3124} 3074}
3125 3075
3126static void 3076static void
3127SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 3077SiS_GetRAMDAC2DATA(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
3128 USHORT RefreshRateTableIndex,PSIS_HW_INFO HwInfo) 3078 unsigned short RefreshRateTableIndex)
3129{ 3079{
3130 USHORT tempax=0,tempbx=0; 3080 unsigned short tempax=0, tempbx=0, index, dotclock;
3131 USHORT temp1=0,modeflag=0,tempcx=0; 3081 unsigned short temp1=0, modeflag=0, tempcx=0;
3132 USHORT index;
3133 3082
3134 SiS_Pr->SiS_RVBHCMAX = 1; 3083 SiS_Pr->SiS_RVBHCMAX = 1;
3135 SiS_Pr->SiS_RVBHCFACT = 1; 3084 SiS_Pr->SiS_RVBHCFACT = 1;
@@ -3143,10 +3092,12 @@ SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3143 tempbx = SiS_Pr->SiS_StandTable[index].CRTC[6]; 3092 tempbx = SiS_Pr->SiS_StandTable[index].CRTC[6];
3144 temp1 = SiS_Pr->SiS_StandTable[index].CRTC[7]; 3093 temp1 = SiS_Pr->SiS_StandTable[index].CRTC[7];
3145 3094
3095 dotclock = (modeflag & Charx8Dot) ? 8 : 9;
3096
3146 } else { 3097 } else {
3147 3098
3148 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3099 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
3149 index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 3100 index = SiS_GetRefCRT1CRTC(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWideCRT2);
3150 3101
3151 tempax = SiS_Pr->SiS_CRT1Table[index].CR[0]; 3102 tempax = SiS_Pr->SiS_CRT1Table[index].CR[0];
3152 tempax |= (SiS_Pr->SiS_CRT1Table[index].CR[14] << 8); 3103 tempax |= (SiS_Pr->SiS_CRT1Table[index].CR[14] << 8);
@@ -3158,22 +3109,16 @@ SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3158 tempbx |= tempcx; 3109 tempbx |= tempcx;
3159 temp1 = SiS_Pr->SiS_CRT1Table[index].CR[7]; 3110 temp1 = SiS_Pr->SiS_CRT1Table[index].CR[7];
3160 3111
3112 dotclock = 8;
3113
3161 } 3114 }
3162 3115
3163 if(temp1 & 0x01) tempbx |= 0x0100; 3116 if(temp1 & 0x01) tempbx |= 0x0100;
3164 if(temp1 & 0x20) tempbx |= 0x0200; 3117 if(temp1 & 0x20) tempbx |= 0x0200;
3165 3118
3166 tempax += 5; 3119 tempax += 5;
3167 3120 tempax *= dotclock;
3168 /* Charx8Dot is no more used (and assumed), so we set it */ 3121 if(modeflag & HalfDCLK) tempax <<= 1;
3169 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
3170 modeflag |= Charx8Dot;
3171 }
3172
3173 if(modeflag & Charx8Dot) tempax *= 8;
3174 else tempax *= 9;
3175
3176 if(modeflag & HalfDCLK) tempax <<= 1;
3177 3122
3178 tempbx++; 3123 tempbx++;
3179 3124
@@ -3182,13 +3127,56 @@ SiS_GetRAMDAC2DATA(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3182} 3127}
3183 3128
3184static void 3129static void
3185SiS_GetCRT2DataLVDS(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 3130SiS_CalcPanelLinkTiming(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
3186 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 3131 unsigned short ModeIdIndex, unsigned short RefreshRateTableIndex)
3132{
3133 unsigned short ResIndex;
3134
3135 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3136 if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
3137 if(SiS_Pr->UseCustomMode) {
3138 ResIndex = SiS_Pr->CHTotal;
3139 if(SiS_Pr->CModeFlag & HalfDCLK) ResIndex <<= 1;
3140 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = ResIndex;
3141 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = SiS_Pr->CVTotal;
3142 } else {
3143 if(ModeNo < 0x13) {
3144 ResIndex = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
3145 } else {
3146 ResIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC_NS;
3147 }
3148 if(ResIndex == 0x09) {
3149 if(SiS_Pr->Alternate1600x1200) ResIndex = 0x20; /* 1600x1200 LCDA */
3150 else if(SiS_Pr->SiS_IF_DEF_LVDS == 1) ResIndex = 0x21; /* 1600x1200 LVDS */
3151 }
3152 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_NoScaleData[ResIndex].VGAHT;
3153 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_NoScaleData[ResIndex].VGAVT;
3154 SiS_Pr->SiS_HT = SiS_Pr->SiS_NoScaleData[ResIndex].LCDHT;
3155 SiS_Pr->SiS_VT = SiS_Pr->SiS_NoScaleData[ResIndex].LCDVT;
3156 }
3157 } else {
3158 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = SiS_Pr->PanelHT;
3159 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = SiS_Pr->PanelVT;
3160 }
3161 } else {
3162 /* This handles custom modes and custom panels */
3163 SiS_Pr->SiS_HDE = SiS_Pr->PanelXRes;
3164 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes;
3165 SiS_Pr->SiS_HT = SiS_Pr->PanelHT;
3166 SiS_Pr->SiS_VT = SiS_Pr->PanelVT;
3167 SiS_Pr->SiS_VGAHT = SiS_Pr->PanelHT - (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE);
3168 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT - (SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE);
3169 }
3170}
3171
3172static void
3173SiS_GetCRT2DataLVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
3174 unsigned short RefreshRateTableIndex)
3187{ 3175{
3188 USHORT CRT2Index, ResIndex; 3176 unsigned short CRT2Index, ResIndex, backup;
3189 const SiS_LVDSDataStruct *LVDSData = NULL; 3177 const struct SiS_LVDSData *LVDSData = NULL;
3190 3178
3191 SiS_GetCRT2ResInfo(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 3179 SiS_GetCRT2ResInfo(SiS_Pr, ModeNo, ModeIdIndex);
3192 3180
3193 if(SiS_Pr->SiS_VBType & VB_SISVB) { 3181 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3194 SiS_Pr->SiS_RVBHCMAX = 1; 3182 SiS_Pr->SiS_RVBHCMAX = 1;
@@ -3199,133 +3187,94 @@ SiS_GetCRT2DataLVDS(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3199 SiS_Pr->SiS_RY2COE = 0; 3187 SiS_Pr->SiS_RY2COE = 0;
3200 SiS_Pr->SiS_RY3COE = 0; 3188 SiS_Pr->SiS_RY3COE = 0;
3201 SiS_Pr->SiS_RY4COE = 0; 3189 SiS_Pr->SiS_RY4COE = 0;
3190 SiS_Pr->SiS_RVBHRS2 = 0;
3202 } 3191 }
3203 3192
3204 if((SiS_Pr->SiS_VBType & VB_SISVB) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3193 if((SiS_Pr->SiS_VBType & VB_SISVB) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3205 3194
3206#ifdef SIS315H 3195#ifdef SIS315H
3207 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3196 SiS_CalcPanelLinkTiming(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3208 if(SiS_Pr->SiS_LCDInfo & LCDPass11) { 3197 SiS_CalcLCDACRT1Timing(SiS_Pr, ModeNo, ModeIdIndex);
3209 if(SiS_Pr->UseCustomMode) {
3210 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = SiS_Pr->CHTotal;
3211 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = SiS_Pr->CVTotal;
3212 } else {
3213 if(ModeNo < 0x13) {
3214 ResIndex = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
3215 } else {
3216 ResIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC_NS;
3217 }
3218 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_NoScaleData[ResIndex].VGAHT;
3219 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_NoScaleData[ResIndex].VGAVT;
3220 SiS_Pr->SiS_HT = SiS_Pr->SiS_NoScaleData[ResIndex].LCDHT;
3221 SiS_Pr->SiS_VT = SiS_Pr->SiS_NoScaleData[ResIndex].LCDVT;
3222 }
3223 } else {
3224 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = SiS_Pr->PanelHT;
3225 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = SiS_Pr->PanelVT;
3226 }
3227 } else {
3228 /* This handles custom modes and custom panels */
3229 SiS_Pr->SiS_HDE = SiS_Pr->PanelXRes;
3230 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes;
3231 SiS_Pr->SiS_HT = SiS_Pr->PanelHT;
3232 SiS_Pr->SiS_VT = SiS_Pr->PanelVT;
3233 SiS_Pr->SiS_VGAHT = SiS_Pr->PanelHT - (SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE);
3234 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT - (SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE);
3235 }
3236
3237 SiS_CalcLCDACRT1Timing(SiS_Pr,ModeNo,ModeIdIndex);
3238
3239#endif 3198#endif
3240 3199
3241 } else { 3200 } else {
3242 3201
3243 /* 301BDH needs LVDS Data */ 3202 /* 301BDH needs LVDS Data */
3203 backup = SiS_Pr->SiS_IF_DEF_LVDS;
3244 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { 3204 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
3245 SiS_Pr->SiS_IF_DEF_LVDS = 1; 3205 SiS_Pr->SiS_IF_DEF_LVDS = 1;
3246 } 3206 }
3247 3207
3248 SiS_GetCRT2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 3208 SiS_GetCRT2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
3249 &CRT2Index, &ResIndex, HwInfo); 3209 &CRT2Index, &ResIndex);
3250 3210
3251 /* 301BDH needs LVDS Data */ 3211 SiS_Pr->SiS_IF_DEF_LVDS = backup;
3252 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
3253 SiS_Pr->SiS_IF_DEF_LVDS = 0;
3254 }
3255 3212
3256 switch (CRT2Index) { 3213 switch(CRT2Index) {
3257 case 0: LVDSData = SiS_Pr->SiS_LVDS800x600Data_1; break; 3214 case 10: LVDSData = SiS_Pr->SiS_LVDS320x240Data_1; break;
3258 case 1: LVDSData = SiS_Pr->SiS_LVDS800x600Data_2; break; 3215 case 14: LVDSData = SiS_Pr->SiS_LVDS320x240Data_2; break;
3259 case 2: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break; 3216 case 12: LVDSData = SiS_Pr->SiS_LVDS640x480Data_1; break;
3260 case 3: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_2; break; 3217 case 16: LVDSData = SiS_Pr->SiS_LVDS800x600Data_1; break;
3261 case 4: LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_1; break; 3218 case 18: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1; break;
3262 case 5: LVDSData = SiS_Pr->SiS_LVDS1280x1024Data_2; break; 3219 case 20: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break;
3263 case 6: LVDSData = SiS_Pr->SiS_LVDS640x480Data_1; break; 3220#ifdef SIS300
3264 case 7: LVDSData = SiS_Pr->SiS_LVDSXXXxXXXData_1; break;
3265 case 8: LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_1; break;
3266 case 9: LVDSData = SiS_Pr->SiS_LVDS1400x1050Data_2; break;
3267 case 10: LVDSData = SiS_Pr->SiS_CHTVUNTSCData; break;
3268 case 11: LVDSData = SiS_Pr->SiS_CHTVONTSCData; break;
3269 case 12: LVDSData = SiS_Pr->SiS_CHTVUPALData; break;
3270 case 13: LVDSData = SiS_Pr->SiS_CHTVOPALData; break;
3271 case 14: LVDSData = SiS_Pr->SiS_LVDS320x480Data_1; break;
3272 case 15: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_1; break;
3273 case 16: LVDSData = SiS_Pr->SiS_LVDS1024x600Data_2; break;
3274 case 17: LVDSData = SiS_Pr->SiS_LVDS1152x768Data_1; break;
3275 case 18: LVDSData = SiS_Pr->SiS_LVDS1152x768Data_2; break;
3276 case 19: LVDSData = SiS_Pr->SiS_LVDS1280x768Data_1; break;
3277 case 20: LVDSData = SiS_Pr->SiS_LVDS1280x768Data_2; break;
3278 case 21: LVDSData = SiS_Pr->SiS_LVDS1600x1200Data_1; break;
3279 case 22: LVDSData = SiS_Pr->SiS_LVDS1600x1200Data_2; break;
3280 case 30: LVDSData = SiS_Pr->SiS_LVDS640x480Data_2; break;
3281 case 80: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_1; break; 3221 case 80: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_1; break;
3282 case 81: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_2; break; 3222 case 81: LVDSData = SiS_Pr->SiS_LVDSBARCO1366Data_2; break;
3283 case 82: LVDSData = SiS_Pr->SiS_LVDSBARCO1024Data_1; break; 3223 case 82: LVDSData = SiS_Pr->SiS_LVDSBARCO1024Data_1; break;
3284 case 83: LVDSData = SiS_Pr->SiS_LVDSBARCO1024Data_2; break;
3285 case 84: LVDSData = SiS_Pr->SiS_LVDS848x480Data_1; break; 3224 case 84: LVDSData = SiS_Pr->SiS_LVDS848x480Data_1; break;
3286 case 85: LVDSData = SiS_Pr->SiS_LVDS848x480Data_2; break; 3225 case 85: LVDSData = SiS_Pr->SiS_LVDS848x480Data_2; break;
3287 case 90: LVDSData = SiS_Pr->SiS_CHTVUPALMData; break; 3226#endif
3288 case 91: LVDSData = SiS_Pr->SiS_CHTVOPALMData; break; 3227 case 90: LVDSData = SiS_Pr->SiS_CHTVUNTSCData; break;
3289 case 92: LVDSData = SiS_Pr->SiS_CHTVUPALNData; break; 3228 case 91: LVDSData = SiS_Pr->SiS_CHTVONTSCData; break;
3290 case 93: LVDSData = SiS_Pr->SiS_CHTVOPALNData; break; 3229 case 92: LVDSData = SiS_Pr->SiS_CHTVUPALData; break;
3291 case 99: LVDSData = SiS_Pr->SiS_CHTVSOPALData; break; /* Super Overscan */ 3230 case 93: LVDSData = SiS_Pr->SiS_CHTVOPALData; break;
3292 default: LVDSData = SiS_Pr->SiS_LVDS1024x768Data_1; break; 3231 case 94: LVDSData = SiS_Pr->SiS_CHTVUPALMData; break;
3232 case 95: LVDSData = SiS_Pr->SiS_CHTVOPALMData; break;
3233 case 96: LVDSData = SiS_Pr->SiS_CHTVUPALNData; break;
3234 case 97: LVDSData = SiS_Pr->SiS_CHTVOPALNData; break;
3235 case 99: LVDSData = SiS_Pr->SiS_CHTVSOPALData; break;
3293 } 3236 }
3294 3237
3295 SiS_Pr->SiS_VGAHT = (LVDSData+ResIndex)->VGAHT; 3238 if(LVDSData) {
3296 SiS_Pr->SiS_VGAVT = (LVDSData+ResIndex)->VGAVT; 3239 SiS_Pr->SiS_VGAHT = (LVDSData+ResIndex)->VGAHT;
3297 SiS_Pr->SiS_HT = (LVDSData+ResIndex)->LCDHT; 3240 SiS_Pr->SiS_VGAVT = (LVDSData+ResIndex)->VGAVT;
3298 SiS_Pr->SiS_VT = (LVDSData+ResIndex)->LCDVT; 3241 SiS_Pr->SiS_HT = (LVDSData+ResIndex)->LCDHT;
3299 3242 SiS_Pr->SiS_VT = (LVDSData+ResIndex)->LCDVT;
3300 if(!(SiS_Pr->SiS_VBType & VB_SISVB)) { 3243 } else {
3301 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { 3244 SiS_CalcPanelLinkTiming(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3302 if((!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) || (SiS_Pr->SiS_SetFlag & SetDOSMode)) { 3245 }
3303 SiS_Pr->SiS_HDE = SiS_Pr->PanelXRes; 3246
3304 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes; 3247 if( (!(SiS_Pr->SiS_VBType & VB_SISVB)) &&
3305 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) { 3248 (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) &&
3306 if(ResIndex < 0x08) { 3249 (!(SiS_Pr->SiS_LCDInfo & LCDPass11)) ) {
3307 SiS_Pr->SiS_HDE = 1280; 3250 if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ||
3308 SiS_Pr->SiS_VDE = 1024; 3251 (SiS_Pr->SiS_SetFlag & SetDOSMode) ) {
3309 } 3252 SiS_Pr->SiS_HDE = SiS_Pr->PanelXRes;
3310 } 3253 SiS_Pr->SiS_VDE = SiS_Pr->PanelYRes;
3311 } 3254#ifdef SIS300
3255 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
3256 if(ResIndex < 0x08) {
3257 SiS_Pr->SiS_HDE = 1280;
3258 SiS_Pr->SiS_VDE = 1024;
3259 }
3260 }
3261#endif
3312 } 3262 }
3313 } 3263 }
3314 } 3264 }
3315} 3265}
3316 3266
3317static void 3267static void
3318SiS_GetCRT2Data301(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 3268SiS_GetCRT2Data301(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
3319 USHORT RefreshRateTableIndex, 3269 unsigned short RefreshRateTableIndex)
3320 PSIS_HW_INFO HwInfo) 3270{
3321{ 3271 unsigned char *ROMAddr = NULL;
3322 UCHAR *ROMAddr = NULL; 3272 unsigned short tempax, tempbx, modeflag, romptr=0;
3323 USHORT tempax,tempbx,modeflag,romptr=0; 3273 unsigned short resinfo, CRT2Index, ResIndex;
3324 USHORT resinfo,CRT2Index,ResIndex; 3274 const struct SiS_LCDData *LCDPtr = NULL;
3325 const SiS_LCDDataStruct *LCDPtr = NULL; 3275 const struct SiS_TVData *TVPtr = NULL;
3326 const SiS_TVDataStruct *TVPtr = NULL;
3327#ifdef SIS315H 3276#ifdef SIS315H
3328 SHORT resinfo661; 3277 short resinfo661;
3329#endif 3278#endif
3330 3279
3331 if(ModeNo <= 0x13) { 3280 if(ModeNo <= 0x13) {
@@ -3340,67 +3289,69 @@ SiS_GetCRT2Data301(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3340#ifdef SIS315H 3289#ifdef SIS315H
3341 resinfo661 = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].ROMMODEIDX661; 3290 resinfo661 = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].ROMMODEIDX661;
3342 if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && 3291 if( (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) &&
3343 (SiS_Pr->SiS_SetFlag & LCDVESATiming) && 3292 (SiS_Pr->SiS_SetFlag & LCDVESATiming) &&
3344 (resinfo661 >= 0) && 3293 (resinfo661 >= 0) &&
3345 (SiS_Pr->SiS_NeedRomModeData) ) { 3294 (SiS_Pr->SiS_NeedRomModeData) ) {
3346 if((ROMAddr = GetLCDStructPtr661(SiS_Pr, HwInfo))) { 3295 if((ROMAddr = GetLCDStructPtr661(SiS_Pr))) {
3347 if((romptr = (SISGETROMW(21)))) { 3296 if((romptr = (SISGETROMW(21)))) {
3348 romptr += (resinfo661 * 10); 3297 romptr += (resinfo661 * 10);
3349 ROMAddr = HwInfo->pjVirtualRomBase; 3298 ROMAddr = SiS_Pr->VirtualRomBase;
3350 } 3299 }
3351 } 3300 }
3352 } 3301 }
3353#endif 3302#endif
3354 } 3303 }
3355 3304
3356 SiS_Pr->SiS_NewFlickerMode = 0; 3305 SiS_Pr->SiS_NewFlickerMode = 0;
3357 SiS_Pr->SiS_RVBHRS = 50; 3306 SiS_Pr->SiS_RVBHRS = 50;
3358 SiS_Pr->SiS_RY1COE = 0; 3307 SiS_Pr->SiS_RY1COE = 0;
3359 SiS_Pr->SiS_RY2COE = 0; 3308 SiS_Pr->SiS_RY2COE = 0;
3360 SiS_Pr->SiS_RY3COE = 0; 3309 SiS_Pr->SiS_RY3COE = 0;
3361 SiS_Pr->SiS_RY4COE = 0; 3310 SiS_Pr->SiS_RY4COE = 0;
3311 SiS_Pr->SiS_RVBHRS2 = 0;
3362 3312
3363 SiS_GetCRT2ResInfo(SiS_Pr,ModeNo,ModeIdIndex,HwInfo); 3313 SiS_GetCRT2ResInfo(SiS_Pr,ModeNo,ModeIdIndex);
3364 3314
3365 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC){ 3315 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) {
3366 3316
3367 if(SiS_Pr->UseCustomMode) { 3317 if(SiS_Pr->UseCustomMode) {
3368 3318
3369 SiS_Pr->SiS_RVBHCMAX = 1; 3319 SiS_Pr->SiS_RVBHCMAX = 1;
3370 SiS_Pr->SiS_RVBHCFACT = 1; 3320 SiS_Pr->SiS_RVBHCFACT = 1;
3371 SiS_Pr->SiS_VGAHT = SiS_Pr->CHTotal;
3372 SiS_Pr->SiS_VGAVT = SiS_Pr->CVTotal;
3373 SiS_Pr->SiS_HT = SiS_Pr->CHTotal;
3374 SiS_Pr->SiS_VT = SiS_Pr->CVTotal;
3375 SiS_Pr->SiS_HDE = SiS_Pr->SiS_VGAHDE; 3321 SiS_Pr->SiS_HDE = SiS_Pr->SiS_VGAHDE;
3376 SiS_Pr->SiS_VDE = SiS_Pr->SiS_VGAVDE; 3322 SiS_Pr->SiS_VDE = SiS_Pr->SiS_VGAVDE;
3323
3324 tempax = SiS_Pr->CHTotal;
3325 if(modeflag & HalfDCLK) tempax <<= 1;
3326 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = tempax;
3327 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = SiS_Pr->CVTotal;
3377 3328
3378 } else { 3329 } else {
3379 3330
3380 SiS_GetRAMDAC2DATA(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3331 SiS_GetRAMDAC2DATA(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3381 3332
3382 } 3333 }
3383 3334
3384 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 3335 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
3385 3336
3386 SiS_GetCRT2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex, 3337 SiS_GetCRT2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
3387 &CRT2Index,&ResIndex,HwInfo); 3338 &CRT2Index,&ResIndex);
3388 3339
3389 switch(CRT2Index) { 3340 switch(CRT2Index) {
3390 case 2: TVPtr = SiS_Pr->SiS_ExtHiTVData; break; 3341 case 2: TVPtr = SiS_Pr->SiS_ExtHiTVData; break;
3391 case 3: TVPtr = SiS_Pr->SiS_ExtPALData; break; 3342 case 3: TVPtr = SiS_Pr->SiS_ExtPALData; break;
3392 case 4: TVPtr = SiS_Pr->SiS_ExtNTSCData; break; 3343 case 4: TVPtr = SiS_Pr->SiS_ExtNTSCData; break;
3393 case 5: TVPtr = SiS_Pr->SiS_Ext525iData; break; 3344 case 5: TVPtr = SiS_Pr->SiS_Ext525iData; break;
3394 case 6: TVPtr = SiS_Pr->SiS_Ext525pData; break; 3345 case 6: TVPtr = SiS_Pr->SiS_Ext525pData; break;
3395 case 7: TVPtr = SiS_Pr->SiS_Ext750pData; break; 3346 case 7: TVPtr = SiS_Pr->SiS_Ext750pData; break;
3396 case 8: TVPtr = SiS_Pr->SiS_StPALData; break; 3347 case 8: TVPtr = SiS_Pr->SiS_StPALData; break;
3397 case 9: TVPtr = SiS_Pr->SiS_StNTSCData; break; 3348 case 9: TVPtr = SiS_Pr->SiS_StNTSCData; break;
3398 case 10: TVPtr = SiS_Pr->SiS_St525iData; break; 3349 case 10: TVPtr = SiS_Pr->SiS_St525iData; break;
3399 case 11: TVPtr = SiS_Pr->SiS_St525pData; break; 3350 case 11: TVPtr = SiS_Pr->SiS_St525pData; break;
3400 case 12: TVPtr = SiS_Pr->SiS_St750pData; break; 3351 case 12: TVPtr = SiS_Pr->SiS_St750pData; break;
3401 case 13: TVPtr = SiS_Pr->SiS_St1HiTVData; break; 3352 case 13: TVPtr = SiS_Pr->SiS_St1HiTVData; break;
3402 case 14: TVPtr = SiS_Pr->SiS_St2HiTVData; break; 3353 case 14: TVPtr = SiS_Pr->SiS_St2HiTVData; break;
3403 default: TVPtr = SiS_Pr->SiS_StPALData; break; 3354 default: TVPtr = SiS_Pr->SiS_StPALData; break;
3404 } 3355 }
3405 3356
3406 SiS_Pr->SiS_RVBHCMAX = (TVPtr+ResIndex)->RVBHCMAX; 3357 SiS_Pr->SiS_RVBHCMAX = (TVPtr+ResIndex)->RVBHCMAX;
@@ -3409,73 +3360,77 @@ SiS_GetCRT2Data301(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3409 SiS_Pr->SiS_VGAVT = (TVPtr+ResIndex)->VGAVT; 3360 SiS_Pr->SiS_VGAVT = (TVPtr+ResIndex)->VGAVT;
3410 SiS_Pr->SiS_HDE = (TVPtr+ResIndex)->TVHDE; 3361 SiS_Pr->SiS_HDE = (TVPtr+ResIndex)->TVHDE;
3411 SiS_Pr->SiS_VDE = (TVPtr+ResIndex)->TVVDE; 3362 SiS_Pr->SiS_VDE = (TVPtr+ResIndex)->TVVDE;
3412 SiS_Pr->SiS_RVBHRS = (TVPtr+ResIndex)->RVBHRS; 3363 SiS_Pr->SiS_RVBHRS2 = (TVPtr+ResIndex)->RVBHRS2 & 0x0fff;
3413 SiS_Pr->SiS_NewFlickerMode = (TVPtr+ResIndex)->FlickerMode;
3414 if(modeflag & HalfDCLK) { 3364 if(modeflag & HalfDCLK) {
3415 SiS_Pr->SiS_RVBHRS = (TVPtr+ResIndex)->HALFRVBHRS; 3365 SiS_Pr->SiS_RVBHRS = (TVPtr+ResIndex)->HALFRVBHRS;
3366 if(SiS_Pr->SiS_RVBHRS2) {
3367 SiS_Pr->SiS_RVBHRS2 = ((SiS_Pr->SiS_RVBHRS2 + 3) >> 1) - 3;
3368 tempax = ((TVPtr+ResIndex)->RVBHRS2 >> 12) & 0x07;
3369 if((TVPtr+ResIndex)->RVBHRS2 & 0x8000) SiS_Pr->SiS_RVBHRS2 -= tempax;
3370 else SiS_Pr->SiS_RVBHRS2 += tempax;
3371 }
3372 } else {
3373 SiS_Pr->SiS_RVBHRS = (TVPtr+ResIndex)->RVBHRS;
3416 } 3374 }
3375 SiS_Pr->SiS_NewFlickerMode = ((TVPtr+ResIndex)->FlickerMode) << 7;
3417 3376
3418 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 3377 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
3419 3378
3420 if((resinfo == SIS_RI_1024x768) || 3379 if((resinfo == SIS_RI_960x600) ||
3421 (resinfo == SIS_RI_1280x1024) || 3380 (resinfo == SIS_RI_1024x768) ||
3422 (resinfo == SIS_RI_1280x720)) { 3381 (resinfo == SIS_RI_1280x1024) ||
3382 (resinfo == SIS_RI_1280x720)) {
3423 SiS_Pr->SiS_NewFlickerMode = 0x40; 3383 SiS_Pr->SiS_NewFlickerMode = 0x40;
3424 } 3384 }
3425 3385
3426 if(SiS_Pr->SiS_VGAVDE == 350) SiS_Pr->SiS_TVMode |= TVSetTVSimuMode; 3386 if(SiS_Pr->SiS_VGAVDE == 350) SiS_Pr->SiS_TVMode |= TVSetTVSimuMode;
3427 3387
3428 SiS_Pr->SiS_HT = ExtHiTVHT; 3388 SiS_Pr->SiS_HT = ExtHiTVHT;
3429 SiS_Pr->SiS_VT = ExtHiTVVT; 3389 SiS_Pr->SiS_VT = ExtHiTVVT;
3430 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 3390 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
3431 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) { 3391 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
3432 SiS_Pr->SiS_HT = StHiTVHT; 3392 SiS_Pr->SiS_HT = StHiTVHT;
3433 SiS_Pr->SiS_VT = StHiTVVT; 3393 SiS_Pr->SiS_VT = StHiTVVT;
3434#if 0 3394 }
3435 if(!(modeflag & Charx8Dot)) { 3395 }
3436 SiS_Pr->SiS_HT = StHiTextTVHT;
3437 SiS_Pr->SiS_VT = StHiTextTVVT;
3438 }
3439#endif
3440 }
3441 }
3442 3396
3443 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 3397 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
3444 3398
3445 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) { 3399 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) {
3446 SiS_Pr->SiS_HT = 1650; 3400 SiS_Pr->SiS_HT = 1650;
3447 SiS_Pr->SiS_VT = 750; 3401 SiS_Pr->SiS_VT = 750;
3448 } else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) { 3402 } else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) {
3449 SiS_Pr->SiS_HT = NTSCHT; 3403 SiS_Pr->SiS_HT = NTSCHT;
3404 if(SiS_Pr->SiS_TVMode & TVSet525p1024) SiS_Pr->SiS_HT = NTSC2HT;
3450 SiS_Pr->SiS_VT = NTSCVT; 3405 SiS_Pr->SiS_VT = NTSCVT;
3451 } else { 3406 } else {
3452 SiS_Pr->SiS_HT = NTSCHT; 3407 SiS_Pr->SiS_HT = NTSCHT;
3453 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) SiS_Pr->SiS_HT = NTSC2HT; 3408 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) SiS_Pr->SiS_HT = NTSC2HT;
3454 SiS_Pr->SiS_VT = NTSCVT; 3409 SiS_Pr->SiS_VT = NTSCVT;
3455 } 3410 }
3456 3411
3457 } else { 3412 } else {
3458 3413
3459 SiS_Pr->SiS_RY1COE = (TVPtr+ResIndex)->RY1COE; 3414 SiS_Pr->SiS_RY1COE = (TVPtr+ResIndex)->RY1COE;
3460 SiS_Pr->SiS_RY2COE = (TVPtr+ResIndex)->RY2COE; 3415 SiS_Pr->SiS_RY2COE = (TVPtr+ResIndex)->RY2COE;
3461 SiS_Pr->SiS_RY3COE = (TVPtr+ResIndex)->RY3COE; 3416 SiS_Pr->SiS_RY3COE = (TVPtr+ResIndex)->RY3COE;
3462 SiS_Pr->SiS_RY4COE = (TVPtr+ResIndex)->RY4COE; 3417 SiS_Pr->SiS_RY4COE = (TVPtr+ResIndex)->RY4COE;
3463 3418
3464 if(modeflag & HalfDCLK) { 3419 if(modeflag & HalfDCLK) {
3465 SiS_Pr->SiS_RY1COE = 0x00; 3420 SiS_Pr->SiS_RY1COE = 0x00;
3466 SiS_Pr->SiS_RY2COE = 0xf4; 3421 SiS_Pr->SiS_RY2COE = 0xf4;
3467 SiS_Pr->SiS_RY3COE = 0x10; 3422 SiS_Pr->SiS_RY3COE = 0x10;
3468 SiS_Pr->SiS_RY4COE = 0x38; 3423 SiS_Pr->SiS_RY4COE = 0x38;
3469 } 3424 }
3470 3425
3471 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) { 3426 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) {
3472 SiS_Pr->SiS_HT = NTSCHT; 3427 SiS_Pr->SiS_HT = NTSCHT;
3473 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) SiS_Pr->SiS_HT = NTSC2HT; 3428 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) SiS_Pr->SiS_HT = NTSC2HT;
3474 SiS_Pr->SiS_VT = NTSCVT; 3429 SiS_Pr->SiS_VT = NTSCVT;
3475 } else { 3430 } else {
3476 SiS_Pr->SiS_HT = PALHT; 3431 SiS_Pr->SiS_HT = PALHT;
3477 SiS_Pr->SiS_VT = PALVT; 3432 SiS_Pr->SiS_VT = PALVT;
3478 } 3433 }
3479 3434
3480 } 3435 }
3481 3436
@@ -3486,42 +3441,53 @@ SiS_GetCRT2Data301(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3486 3441
3487 if(SiS_Pr->UseCustomMode) { 3442 if(SiS_Pr->UseCustomMode) {
3488 3443
3489 SiS_Pr->SiS_VGAHT = SiS_Pr->CHTotal;
3490 SiS_Pr->SiS_VGAVT = SiS_Pr->CVTotal;
3491 SiS_Pr->SiS_HT = SiS_Pr->CHTotal;
3492 SiS_Pr->SiS_VT = SiS_Pr->CVTotal;
3493 SiS_Pr->SiS_HDE = SiS_Pr->SiS_VGAHDE; 3444 SiS_Pr->SiS_HDE = SiS_Pr->SiS_VGAHDE;
3494 SiS_Pr->SiS_VDE = SiS_Pr->SiS_VGAVDE; 3445 SiS_Pr->SiS_VDE = SiS_Pr->SiS_VGAVDE;
3446
3447 tempax = SiS_Pr->CHTotal;
3448 if(modeflag & HalfDCLK) tempax <<= 1;
3449 SiS_Pr->SiS_VGAHT = SiS_Pr->SiS_HT = tempax;
3450 SiS_Pr->SiS_VGAVT = SiS_Pr->SiS_VT = SiS_Pr->CVTotal;
3495 3451
3496 } else { 3452 } else {
3497 3453
3498 BOOLEAN gotit = FALSE; 3454 BOOLEAN gotit = FALSE;
3499 3455
3500 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { 3456 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) {
3501 3457
3502 SiS_Pr->SiS_VGAHT = SiS_Pr->PanelHT; 3458 SiS_Pr->SiS_VGAHT = SiS_Pr->PanelHT;
3503 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT; 3459 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT;
3504 SiS_Pr->SiS_HT = SiS_Pr->PanelHT; 3460 SiS_Pr->SiS_HT = SiS_Pr->PanelHT;
3505 SiS_Pr->SiS_VT = SiS_Pr->PanelVT; 3461 SiS_Pr->SiS_VT = SiS_Pr->PanelVT;
3506 gotit = TRUE; 3462 gotit = TRUE;
3507 3463
3508 } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) { 3464 } else if( (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) && (romptr) && (ROMAddr) ) {
3509 3465
3510#ifdef SIS315H 3466#ifdef SIS315H
3511 SiS_Pr->SiS_RVBHCMAX = ROMAddr[romptr]; 3467 SiS_Pr->SiS_RVBHCMAX = ROMAddr[romptr];
3512 SiS_Pr->SiS_RVBHCFACT = ROMAddr[romptr+1]; 3468 SiS_Pr->SiS_RVBHCFACT = ROMAddr[romptr+1];
3513 SiS_Pr->SiS_VGAHT = ROMAddr[romptr+2] | ((ROMAddr[romptr+3] & 0x0f) << 8); 3469 SiS_Pr->SiS_VGAHT = ROMAddr[romptr+2] | ((ROMAddr[romptr+3] & 0x0f) << 8);
3514 SiS_Pr->SiS_VGAVT = ROMAddr[romptr+4] | ((ROMAddr[romptr+3] & 0xf0) << 4); 3470 SiS_Pr->SiS_VGAVT = (ROMAddr[romptr+4] << 4) | ((ROMAddr[romptr+3] & 0xf0) >> 4);
3515 SiS_Pr->SiS_HT = ROMAddr[romptr+5] | ((ROMAddr[romptr+6] & 0x0f) << 8); 3471 SiS_Pr->SiS_HT = ROMAddr[romptr+5] | ((ROMAddr[romptr+6] & 0x0f) << 8);
3516 SiS_Pr->SiS_VT = ROMAddr[romptr+7] | ((ROMAddr[romptr+6] & 0xf0) << 4); 3472 SiS_Pr->SiS_VT = (ROMAddr[romptr+7] << 4) | ((ROMAddr[romptr+6] & 0xf0) >> 4);
3473 SiS_Pr->SiS_RVBHRS2 = ROMAddr[romptr+8] | ((ROMAddr[romptr+9] & 0x0f) << 8);
3474 if((SiS_Pr->SiS_RVBHRS2) && (modeflag & HalfDCLK)) {
3475 SiS_Pr->SiS_RVBHRS2 = ((SiS_Pr->SiS_RVBHRS2 + 3) >> 1) - 3;
3476 tempax = (ROMAddr[romptr+9] >> 4) & 0x07;
3477 if(ROMAddr[romptr+9] & 0x80) SiS_Pr->SiS_RVBHRS2 -= tempax;
3478 else SiS_Pr->SiS_RVBHRS2 += tempax;
3479 }
3517 if(SiS_Pr->SiS_VGAHT) gotit = TRUE; 3480 if(SiS_Pr->SiS_VGAHT) gotit = TRUE;
3518 else { 3481 else {
3519 SiS_Pr->SiS_LCDInfo |= DontExpandLCD; 3482 SiS_Pr->SiS_LCDInfo |= DontExpandLCD;
3520 SiS_Pr->SiS_LCDInfo &= ~LCDPass11; 3483 SiS_Pr->SiS_LCDInfo &= ~LCDPass11;
3484 SiS_Pr->SiS_RVBHCMAX = 1;
3485 SiS_Pr->SiS_RVBHCFACT = 1;
3521 SiS_Pr->SiS_VGAHT = SiS_Pr->PanelHT; 3486 SiS_Pr->SiS_VGAHT = SiS_Pr->PanelHT;
3522 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT; 3487 SiS_Pr->SiS_VGAVT = SiS_Pr->PanelVT;
3523 SiS_Pr->SiS_HT = SiS_Pr->PanelHT; 3488 SiS_Pr->SiS_HT = SiS_Pr->PanelHT;
3524 SiS_Pr->SiS_VT = SiS_Pr->PanelVT; 3489 SiS_Pr->SiS_VT = SiS_Pr->PanelVT;
3490 SiS_Pr->SiS_RVBHRS2 = 0;
3525 gotit = TRUE; 3491 gotit = TRUE;
3526 } 3492 }
3527#endif 3493#endif
@@ -3530,28 +3496,30 @@ SiS_GetCRT2Data301(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3530 3496
3531 if(!gotit) { 3497 if(!gotit) {
3532 3498
3533 SiS_GetCRT2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex, 3499 SiS_GetCRT2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex,
3534 &CRT2Index,&ResIndex,HwInfo); 3500 &CRT2Index,&ResIndex);
3535 3501
3536 switch(CRT2Index) { 3502 switch(CRT2Index) {
3537 case Panel_1024x768 : LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break; 3503 case Panel_1024x768 : LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break;
3538 case Panel_1024x768 + 32: LCDPtr = SiS_Pr->SiS_St2LCD1024x768Data; break; 3504 case Panel_1024x768 + 32: LCDPtr = SiS_Pr->SiS_St2LCD1024x768Data; break;
3539 case Panel_1280x720 : 3505 case Panel_1280x720 :
3540 case Panel_1280x720 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x720Data; break; 3506 case Panel_1280x720 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x720Data; break;
3541 case Panel_1280x768_2 : LCDPtr = SiS_Pr->SiS_ExtLCD1280x768_2Data; break; 3507 case Panel_1280x768_2 : LCDPtr = SiS_Pr->SiS_ExtLCD1280x768_2Data; break;
3542 case Panel_1280x768_2+ 32: LCDPtr = SiS_Pr->SiS_StLCD1280x768_2Data; break; 3508 case Panel_1280x768_2+ 32: LCDPtr = SiS_Pr->SiS_StLCD1280x768_2Data; break;
3543 case Panel_1280x800 : 3509 case Panel_1280x800 :
3544 case Panel_1280x800 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x800Data; break; 3510 case Panel_1280x800 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x800Data; break;
3545 case Panel_1280x800_2 : 3511 case Panel_1280x800_2 :
3546 case Panel_1280x800_2+ 32: LCDPtr = SiS_Pr->SiS_LCD1280x800_2Data; break; 3512 case Panel_1280x800_2+ 32: LCDPtr = SiS_Pr->SiS_LCD1280x800_2Data; break;
3513 case Panel_1280x854 :
3514 case Panel_1280x854 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x854Data; break;
3547 case Panel_1280x960 : 3515 case Panel_1280x960 :
3548 case Panel_1280x960 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x960Data; break; 3516 case Panel_1280x960 + 32: LCDPtr = SiS_Pr->SiS_LCD1280x960Data; break;
3549 case Panel_1280x1024 : LCDPtr = SiS_Pr->SiS_ExtLCD1280x1024Data; break; 3517 case Panel_1280x1024 : LCDPtr = SiS_Pr->SiS_ExtLCD1280x1024Data; break;
3550 case Panel_1280x1024 + 32: LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data; break; 3518 case Panel_1280x1024 + 32: LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data; break;
3551 case Panel_1400x1050 : LCDPtr = SiS_Pr->SiS_ExtLCD1400x1050Data; break; 3519 case Panel_1400x1050 : LCDPtr = SiS_Pr->SiS_ExtLCD1400x1050Data; break;
3552 case Panel_1400x1050 + 32: LCDPtr = SiS_Pr->SiS_StLCD1400x1050Data; break; 3520 case Panel_1400x1050 + 32: LCDPtr = SiS_Pr->SiS_StLCD1400x1050Data; break;
3553 case Panel_1600x1200 : LCDPtr = SiS_Pr->SiS_ExtLCD1600x1200Data; break; 3521 case Panel_1600x1200 : LCDPtr = SiS_Pr->SiS_ExtLCD1600x1200Data; break;
3554 case Panel_1600x1200 + 32: LCDPtr = SiS_Pr->SiS_StLCD1600x1200Data; break; 3522 case Panel_1600x1200 + 32: LCDPtr = SiS_Pr->SiS_StLCD1600x1200Data; break;
3555 case Panel_1680x1050 : 3523 case Panel_1680x1050 :
3556 case Panel_1680x1050 + 32: LCDPtr = SiS_Pr->SiS_LCD1680x1050Data; break; 3524 case Panel_1680x1050 + 32: LCDPtr = SiS_Pr->SiS_LCD1680x1050Data; break;
3557 case 100 : LCDPtr = SiS_Pr->SiS_NoScaleData; break; 3525 case 100 : LCDPtr = SiS_Pr->SiS_NoScaleData; break;
@@ -3559,271 +3527,340 @@ SiS_GetCRT2Data301(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
3559 case 200 : LCDPtr = SiS310_ExtCompaq1280x1024Data; break; 3527 case 200 : LCDPtr = SiS310_ExtCompaq1280x1024Data; break;
3560 case 201 : LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data; break; 3528 case 201 : LCDPtr = SiS_Pr->SiS_St2LCD1280x1024Data; break;
3561#endif 3529#endif
3562 default : LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break; 3530 default : LCDPtr = SiS_Pr->SiS_ExtLCD1024x768Data; break;
3563 } 3531 }
3564 3532
3533#ifdef SIS_XORG_XF86
3565#ifdef TWDEBUG 3534#ifdef TWDEBUG
3566 xf86DrvMsg(0, X_INFO, "GetCRT2Data: Index %d ResIndex %d\n", CRT2Index, ResIndex); 3535 xf86DrvMsg(0, X_INFO, "GetCRT2Data: Index %d ResIndex %d\n", CRT2Index, ResIndex);
3536#endif
3567#endif 3537#endif
3568 3538
3569 SiS_Pr->SiS_RVBHCMAX = (LCDPtr+ResIndex)->RVBHCMAX; 3539 SiS_Pr->SiS_RVBHCMAX = (LCDPtr+ResIndex)->RVBHCMAX;
3570 SiS_Pr->SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT; 3540 SiS_Pr->SiS_RVBHCFACT = (LCDPtr+ResIndex)->RVBHCFACT;
3571 SiS_Pr->SiS_VGAHT = (LCDPtr+ResIndex)->VGAHT; 3541 SiS_Pr->SiS_VGAHT = (LCDPtr+ResIndex)->VGAHT;
3572 SiS_Pr->SiS_VGAVT = (LCDPtr+ResIndex)->VGAVT; 3542 SiS_Pr->SiS_VGAVT = (LCDPtr+ResIndex)->VGAVT;
3573 SiS_Pr->SiS_HT = (LCDPtr+ResIndex)->LCDHT; 3543 SiS_Pr->SiS_HT = (LCDPtr+ResIndex)->LCDHT;
3574 SiS_Pr->SiS_VT = (LCDPtr+ResIndex)->LCDVT; 3544 SiS_Pr->SiS_VT = (LCDPtr+ResIndex)->LCDVT;
3575 3545
3576 } 3546 }
3577 3547
3578 tempax = SiS_Pr->PanelXRes; 3548 tempax = SiS_Pr->PanelXRes;
3579 tempbx = SiS_Pr->PanelYRes; 3549 tempbx = SiS_Pr->PanelYRes;
3580 3550
3581 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 3551 switch(SiS_Pr->SiS_LCDResInfo) {
3582 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) { 3552 case Panel_1024x768:
3583 if(HwInfo->jChipType < SIS_315H) { 3553 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
3584 if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 560; 3554 if(SiS_Pr->ChipType < SIS_315H) {
3585 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640; 3555 if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 560;
3586 } 3556 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640;
3587 } else { 3557 }
3588 if (SiS_Pr->SiS_VGAVDE == 357) tempbx = 527; 3558 } else {
3589 else if(SiS_Pr->SiS_VGAVDE == 420) tempbx = 620; 3559 if (SiS_Pr->SiS_VGAVDE == 357) tempbx = 527;
3590 else if(SiS_Pr->SiS_VGAVDE == 525) tempbx = 775; 3560 else if(SiS_Pr->SiS_VGAVDE == 420) tempbx = 620;
3591 else if(SiS_Pr->SiS_VGAVDE == 600) tempbx = 775; 3561 else if(SiS_Pr->SiS_VGAVDE == 525) tempbx = 775;
3592 else if(SiS_Pr->SiS_VGAVDE == 350) tempbx = 560; 3562 else if(SiS_Pr->SiS_VGAVDE == 600) tempbx = 775;
3593 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640; 3563 else if(SiS_Pr->SiS_VGAVDE == 350) tempbx = 560;
3594 } 3564 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 640;
3595 } else if(SiS_Pr->SiS_LCDResInfo == Panel_1280x960) { 3565 }
3596 if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 700; 3566 break;
3597 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 800; 3567 case Panel_1280x960:
3598 else if(SiS_Pr->SiS_VGAVDE == 1024) tempbx = 960; 3568 if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 700;
3599 } else if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { 3569 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 800;
3600 if (SiS_Pr->SiS_VGAVDE == 360) tempbx = 768; 3570 else if(SiS_Pr->SiS_VGAVDE == 1024) tempbx = 960;
3601 else if(SiS_Pr->SiS_VGAVDE == 375) tempbx = 800; 3571 break;
3602 else if(SiS_Pr->SiS_VGAVDE == 405) tempbx = 864; 3572 case Panel_1280x1024:
3603 } else if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) { 3573 if (SiS_Pr->SiS_VGAVDE == 360) tempbx = 768;
3574 else if(SiS_Pr->SiS_VGAVDE == 375) tempbx = 800;
3575 else if(SiS_Pr->SiS_VGAVDE == 405) tempbx = 864;
3576 break;
3577 case Panel_1600x1200:
3604 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { 3578 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
3605 if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 875; 3579 if (SiS_Pr->SiS_VGAVDE == 350) tempbx = 875;
3606 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 1000; 3580 else if(SiS_Pr->SiS_VGAVDE == 400) tempbx = 1000;
3607 } 3581 }
3608 } 3582 break;
3583 }
3609 3584
3610 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3585 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3611 tempax = SiS_Pr->SiS_VGAHDE; 3586 tempax = SiS_Pr->SiS_VGAHDE;
3612 tempbx = SiS_Pr->SiS_VGAVDE; 3587 tempbx = SiS_Pr->SiS_VGAVDE;
3613 } 3588 }
3614 3589
3615 SiS_Pr->SiS_HDE = tempax; 3590 SiS_Pr->SiS_HDE = tempax;
3616 SiS_Pr->SiS_VDE = tempbx; 3591 SiS_Pr->SiS_VDE = tempbx;
3617 } 3592 }
3618 } 3593 }
3619} 3594}
3620 3595
3621static void 3596static void
3622SiS_GetCRT2Data(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 3597SiS_GetCRT2Data(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
3623 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 3598 unsigned short RefreshRateTableIndex)
3624{ 3599{
3625 3600
3626 if(SiS_Pr->SiS_VBType & VB_SISVB) { 3601 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3627 3602
3628 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 3603 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
3629 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3604 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3630 } else { 3605 } else {
3631 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { 3606 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
3632 /* Need LVDS Data for LCD on 301B-DH */ 3607 /* Need LVDS Data for LCD on 301B-DH */
3633 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3608 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3634 } else { 3609 } else {
3635 SiS_GetCRT2Data301(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3610 SiS_GetCRT2Data301(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3636 } 3611 }
3637 } 3612 }
3638 3613
3639 } else { 3614 } else {
3640 3615
3641 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 3616 SiS_GetCRT2DataLVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
3642 3617
3643 } 3618 }
3644} 3619}
3645 3620
3646/*********************************************/ 3621/*********************************************/
3647/* GET LVDS DES (SKEW) DATA */ 3622/* GET LVDS DES (SKEW) DATA */
3648/*********************************************/ 3623/*********************************************/
3649 3624
3650static void 3625static const struct SiS_LVDSDes *
3651SiS_GetLVDSDesPtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 3626SiS_GetLVDSDesPtr(struct SiS_Private *SiS_Pr)
3652 USHORT RefreshRateTableIndex, USHORT *PanelIndex,
3653 USHORT *ResIndex, PSIS_HW_INFO HwInfo)
3654{ 3627{
3655 USHORT modeflag; 3628 const struct SiS_LVDSDes *PanelDesPtr = NULL;
3656 3629
3657 if(ModeNo <= 0x13) { 3630#ifdef SIS300
3658 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 3631 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
3659 (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 3632
3660 } else { 3633 if(SiS_Pr->ChipType < SIS_315H) {
3661 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 3634 if(SiS_Pr->SiS_LCDTypeInfo == 4) {
3662 (*ResIndex) = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 3635 if(SiS_Pr->SiS_CustomT == CUT_BARCO1366) {
3663 } 3636 PanelDesPtr = SiS_Pr->SiS_PanelType04_1a;
3637 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3638 PanelDesPtr = SiS_Pr->SiS_PanelType04_2a;
3639 }
3640 } else if(SiS_Pr->SiS_CustomT == CUT_BARCO1024) {
3641 PanelDesPtr = SiS_Pr->SiS_PanelType04_1b;
3642 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3643 PanelDesPtr = SiS_Pr->SiS_PanelType04_2b;
3644 }
3645 }
3646 }
3647 }
3648 }
3649#endif
3650 return PanelDesPtr;
3651}
3664 3652
3665 (*ResIndex) &= 0x1F; 3653static void
3666 (*PanelIndex) = 0; 3654SiS_GetLVDSDesData(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
3655 unsigned short RefreshRateTableIndex)
3656{
3657 unsigned short modeflag, ResIndex;
3658 const struct SiS_LVDSDes *PanelDesPtr = NULL;
3667 3659
3668 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 3660 SiS_Pr->SiS_LCDHDES = 0;
3669 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 3661 SiS_Pr->SiS_LCDVDES = 0;
3670 (*PanelIndex) = 50;
3671 if((SiS_Pr->SiS_TVMode & TVSetPAL) && (!(SiS_Pr->SiS_TVMode & TVSetPALM))) (*PanelIndex) += 2;
3672 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) (*PanelIndex) += 1;
3673 /* Nothing special needed for SOverscan */
3674 /* PALM uses NTSC data, PALN uses PAL data */
3675 }
3676 }
3677 3662
3663 /* Some special cases */
3678 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 3664 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
3679 *PanelIndex = SiS_Pr->SiS_LCDTypeInfo; 3665
3680 if(HwInfo->jChipType >= SIS_661) { 3666 /* Trumpion */
3681 /* As long as we don's use the BIOS tables, we 3667 if(SiS_Pr->SiS_IF_DEF_TRUMPION) {
3682 * need to convert the TypeInfo as for 315 series 3668 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
3683 */ 3669 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3684 (*PanelIndex) = SiS_Pr->SiS_LCDResInfo - 1; 3670 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3685 } 3671 }
3686 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3687 (*PanelIndex) += 16;
3688 if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
3689 (*PanelIndex) = 32;
3690 if(modeflag & HalfDCLK) (*PanelIndex)++;
3691 } 3672 }
3673 return;
3692 } 3674 }
3693 }
3694 3675
3695 if(SiS_Pr->SiS_SetFlag & SetDOSMode) { 3676 /* 640x480 on LVDS */
3696 if(SiS_Pr->SiS_LCDResInfo != Panel_640x480) { 3677 if(SiS_Pr->ChipType < SIS_315H) {
3697 (*ResIndex) = 7; 3678 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480 && SiS_Pr->SiS_LCDTypeInfo == 3) {
3698 if(HwInfo->jChipType < SIS_315H) { 3679 SiS_Pr->SiS_LCDHDES = 8;
3699 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x80) (*ResIndex)++; 3680 if (SiS_Pr->SiS_VGAVDE >= 480) SiS_Pr->SiS_LCDVDES = 512;
3700 } 3681 else if(SiS_Pr->SiS_VGAVDE >= 400) SiS_Pr->SiS_LCDVDES = 436;
3682 else if(SiS_Pr->SiS_VGAVDE >= 350) SiS_Pr->SiS_LCDVDES = 440;
3683 return;
3684 }
3701 } 3685 }
3702 }
3703}
3704
3705static void
3706SiS_GetLVDSDesData(SiS_Private *SiS_Pr, USHORT ModeNo,USHORT ModeIdIndex,
3707 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo)
3708{
3709 USHORT modeflag;
3710 USHORT PanelIndex,ResIndex;
3711 const SiS_LVDSDesStruct *PanelDesPtr = NULL;
3712 3686
3713 SiS_Pr->SiS_LCDHDES = 0; 3687 } /* LCD */
3714 SiS_Pr->SiS_LCDVDES = 0;
3715 3688
3716 if( (SiS_Pr->UseCustomMode) || 3689 if( (SiS_Pr->UseCustomMode) ||
3717 (SiS_Pr->SiS_LCDResInfo == Panel_Custom) || 3690 (SiS_Pr->SiS_LCDResInfo == Panel_Custom) ||
3718 (SiS_Pr->SiS_CustomT == CUT_PANEL848) || 3691 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ||
3719 ((SiS_Pr->SiS_VBType & VB_SISVB) && 3692 (SiS_Pr->SiS_CustomT == CUT_PANEL856) ||
3720 (SiS_Pr->SiS_LCDInfo & DontExpandLCD) && 3693 (SiS_Pr->SiS_LCDInfo & LCDPass11) ) {
3721 (SiS_Pr->SiS_LCDInfo & LCDPass11)) ) {
3722 return; 3694 return;
3723 } 3695 }
3724 3696
3725 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3697 if(ModeNo <= 0x13) ResIndex = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
3698 else ResIndex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
3699
3700 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3726 3701
3727#ifdef SIS315H 3702#ifdef SIS315H
3728 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 3703 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3729 /* non-pass 1:1 only, see above */ 3704 /* non-pass 1:1 only, see above */
3730 if(SiS_Pr->SiS_VGAHDE != SiS_Pr->PanelXRes) { 3705 if(SiS_Pr->SiS_VGAHDE != SiS_Pr->PanelXRes) {
3731 SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_HT - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) / 2); 3706 SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_HT - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) / 2);
3732 } 3707 }
3733 if(SiS_Pr->SiS_VGAVDE != SiS_Pr->PanelYRes) { 3708 if(SiS_Pr->SiS_VGAVDE != SiS_Pr->PanelYRes) {
3734 SiS_Pr->SiS_LCDVDES = SiS_Pr->SiS_VT - ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE) / 2); 3709 SiS_Pr->SiS_LCDVDES = SiS_Pr->SiS_VT - ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE) / 2);
3735 } 3710 }
3736 } 3711 }
3737 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) { 3712 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3738 switch(SiS_Pr->SiS_CustomT) { 3713 switch(SiS_Pr->SiS_CustomT) {
3739 case CUT_UNIWILL1024: 3714 case CUT_UNIWILL1024:
3740 case CUT_UNIWILL10242: 3715 case CUT_UNIWILL10242:
3741 case CUT_CLEVO1400: 3716 case CUT_CLEVO1400:
3742 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 3717 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
3743 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1; 3718 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3744 } 3719 }
3745 break; 3720 break;
3746 } 3721 }
3747 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) { 3722 switch(SiS_Pr->SiS_LCDResInfo) {
3723 case Panel_1280x1024:
3748 if(SiS_Pr->SiS_CustomT != CUT_COMPAQ1280) { 3724 if(SiS_Pr->SiS_CustomT != CUT_COMPAQ1280) {
3749 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1; 3725 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3750 } 3726 }
3727 break;
3728 case Panel_1280x800: /* Verified for Averatec 6240 */
3729 case Panel_1280x800_2: /* Verified for Asus A4L */
3730 case Panel_1280x854: /* Not verified yet FIXME */
3731 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3732 break;
3751 } 3733 }
3752 } 3734 }
3753#endif 3735#endif
3754 3736
3755 } else { 3737 } else {
3756 3738
3757 SiS_GetLVDSDesPtr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 3739 if((SiS_Pr->SiS_IF_DEF_CH70xx != 0) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
3758 &PanelIndex, &ResIndex, HwInfo); 3740
3759 3741 if((SiS_Pr->SiS_TVMode & TVSetPAL) && (!(SiS_Pr->SiS_TVMode & TVSetPALM))) {
3760 switch(PanelIndex) { 3742 if(ResIndex <= 3) SiS_Pr->SiS_LCDHDES = 256;
3761 case 0: PanelDesPtr = SiS_Pr->SiS_PanelType00_1; break; /* --- */ 3743 }
3762 case 1: PanelDesPtr = SiS_Pr->SiS_PanelType01_1; break; 3744
3763 case 2: PanelDesPtr = SiS_Pr->SiS_PanelType02_1; break; 3745 } else if((PanelDesPtr = SiS_GetLVDSDesPtr(SiS_Pr))) {
3764 case 3: PanelDesPtr = SiS_Pr->SiS_PanelType03_1; break; 3746
3765 case 4: PanelDesPtr = SiS_Pr->SiS_PanelType04_1; break; 3747 SiS_Pr->SiS_LCDHDES = (PanelDesPtr+ResIndex)->LCDHDES;
3766 case 5: PanelDesPtr = SiS_Pr->SiS_PanelType05_1; break; 3748 SiS_Pr->SiS_LCDVDES = (PanelDesPtr+ResIndex)->LCDVDES;
3767 case 6: PanelDesPtr = SiS_Pr->SiS_PanelType06_1; break; 3749
3768 case 7: PanelDesPtr = SiS_Pr->SiS_PanelType07_1; break; 3750 } else if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
3769 case 8: PanelDesPtr = SiS_Pr->SiS_PanelType08_1; break; 3751
3770 case 9: PanelDesPtr = SiS_Pr->SiS_PanelType09_1; break; 3752 if(SiS_Pr->SiS_VGAHDE != SiS_Pr->PanelXRes) {
3771 case 10: PanelDesPtr = SiS_Pr->SiS_PanelType0a_1; break; 3753 SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_HT - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_VGAHDE) / 2);
3772 case 11: PanelDesPtr = SiS_Pr->SiS_PanelType0b_1; break; 3754 }
3773 case 12: PanelDesPtr = SiS_Pr->SiS_PanelType0c_1; break; 3755 if(SiS_Pr->SiS_VGAVDE != SiS_Pr->PanelYRes) {
3774 case 13: PanelDesPtr = SiS_Pr->SiS_PanelType0d_1; break; 3756 SiS_Pr->SiS_LCDVDES = SiS_Pr->SiS_VT - ((SiS_Pr->PanelYRes - SiS_Pr->SiS_VGAVDE) / 2);
3775 case 14: PanelDesPtr = SiS_Pr->SiS_PanelType0e_1; break; 3757 } else {
3776 case 15: PanelDesPtr = SiS_Pr->SiS_PanelType0f_1; break; 3758 if(SiS_Pr->ChipType < SIS_315H) {
3777 case 16: PanelDesPtr = SiS_Pr->SiS_PanelType00_2; break; /* --- */ 3759 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3778 case 17: PanelDesPtr = SiS_Pr->SiS_PanelType01_2; break; 3760 } else {
3779 case 18: PanelDesPtr = SiS_Pr->SiS_PanelType02_2; break; 3761 switch(SiS_Pr->SiS_LCDResInfo) {
3780 case 19: PanelDesPtr = SiS_Pr->SiS_PanelType03_2; break; 3762 case Panel_800x600:
3781 case 20: PanelDesPtr = SiS_Pr->SiS_PanelType04_2; break; 3763 case Panel_1024x768:
3782 case 21: PanelDesPtr = SiS_Pr->SiS_PanelType05_2; break; 3764 case Panel_1280x1024:
3783 case 22: PanelDesPtr = SiS_Pr->SiS_PanelType06_2; break; 3765 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT;
3784 case 23: PanelDesPtr = SiS_Pr->SiS_PanelType07_2; break; 3766 break;
3785 case 24: PanelDesPtr = SiS_Pr->SiS_PanelType08_2; break; 3767 case Panel_1400x1050:
3786 case 25: PanelDesPtr = SiS_Pr->SiS_PanelType09_2; break; 3768 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3787 case 26: PanelDesPtr = SiS_Pr->SiS_PanelType0a_2; break; 3769 break;
3788 case 27: PanelDesPtr = SiS_Pr->SiS_PanelType0b_2; break; 3770 }
3789 case 28: PanelDesPtr = SiS_Pr->SiS_PanelType0c_2; break; 3771 }
3790 case 29: PanelDesPtr = SiS_Pr->SiS_PanelType0d_2; break; 3772 }
3791 case 30: PanelDesPtr = SiS_Pr->SiS_PanelType0e_2; break; 3773
3792 case 31: PanelDesPtr = SiS_Pr->SiS_PanelType0f_2; break; 3774 } else {
3793 case 32: PanelDesPtr = SiS_Pr->SiS_PanelTypeNS_1; break; /* pass 1:1 */ 3775
3794 case 33: PanelDesPtr = SiS_Pr->SiS_PanelTypeNS_2; break; 3776 if(SiS_Pr->ChipType < SIS_315H) {
3795 case 50: PanelDesPtr = SiS_Pr->SiS_CHTVUNTSCDesData; break; /* TV */ 3777#ifdef SIS300
3796 case 51: PanelDesPtr = SiS_Pr->SiS_CHTVONTSCDesData; break; 3778 switch(SiS_Pr->SiS_LCDResInfo) {
3797 case 52: PanelDesPtr = SiS_Pr->SiS_CHTVUPALDesData; break; 3779 case Panel_800x600:
3798 case 53: PanelDesPtr = SiS_Pr->SiS_CHTVOPALDesData; break; 3780 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3799 default: return; 3781 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3800 } 3782 } else {
3801 3783 SiS_Pr->SiS_LCDHDES = SiS_Pr->PanelHT + 3;
3802 SiS_Pr->SiS_LCDHDES = (PanelDesPtr+ResIndex)->LCDHDES; 3784 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT;
3803 SiS_Pr->SiS_LCDVDES = (PanelDesPtr+ResIndex)->LCDVDES; 3785 if(SiS_Pr->SiS_VGAVDE == 400) SiS_Pr->SiS_LCDVDES -= 2;
3786 else SiS_Pr->SiS_LCDVDES -= 4;
3787 }
3788 break;
3789 case Panel_1024x768:
3790 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3791 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3792 } else {
3793 SiS_Pr->SiS_LCDHDES = SiS_Pr->PanelHT - 1;
3794 if(SiS_Pr->SiS_VGAVDE <= 400) SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 8;
3795 if(SiS_Pr->SiS_VGAVDE <= 350) SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 12;
3796 }
3797 break;
3798 case Panel_1024x600:
3799 default:
3800 if( (SiS_Pr->SiS_VGAHDE == SiS_Pr->PanelXRes) &&
3801 (SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) ) {
3802 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3803 } else {
3804 SiS_Pr->SiS_LCDHDES = SiS_Pr->PanelHT - 1;
3805 }
3806 break;
3807 }
3808
3809 switch(SiS_Pr->SiS_LCDTypeInfo) {
3810 case 1:
3811 SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_LCDVDES = 0;
3812 break;
3813 case 3: /* 640x480 only? */
3814 SiS_Pr->SiS_LCDHDES = 8;
3815 if (SiS_Pr->SiS_VGAVDE >= 480) SiS_Pr->SiS_LCDVDES = 512;
3816 else if(SiS_Pr->SiS_VGAVDE >= 400) SiS_Pr->SiS_LCDVDES = 436;
3817 else if(SiS_Pr->SiS_VGAVDE >= 350) SiS_Pr->SiS_LCDVDES = 440;
3818 break;
3819 }
3820#endif
3821 } else {
3822#ifdef SIS315H
3823 switch(SiS_Pr->SiS_LCDResInfo) {
3824 case Panel_1024x768:
3825 case Panel_1280x1024:
3826 if(SiS_Pr->SiS_VGAVDE == SiS_Pr->PanelYRes) {
3827 SiS_Pr->SiS_LCDVDES = SiS_Pr->PanelVT - 1;
3828 }
3829 break;
3830 case Panel_320x240_1:
3831 case Panel_320x240_2:
3832 case Panel_320x240_3:
3833 SiS_Pr->SiS_LCDVDES = 524;
3834 break;
3835 }
3836#endif
3837 }
3838 }
3804 3839
3805 if((ModeNo <= 0x13) && (SiS_Pr->SiS_LCDInfo & DontExpandLCD)) { 3840 if((ModeNo <= 0x13) && (SiS_Pr->SiS_LCDInfo & DontExpandLCD)) {
3806 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 3841 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
3807 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 3842 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
3808 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 632; 3843 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 632;
3809 } else if(!(SiS_Pr->SiS_SetFlag & SetDOSMode)) { 3844 } else if(!(SiS_Pr->SiS_SetFlag & SetDOSMode)) {
3810 if(SiS_Pr->SiS_LCDResInfo != Panel_1280x1024) { 3845 if(SiS_Pr->SiS_LCDResInfo != Panel_1280x1024) {
3811 if(SiS_Pr->SiS_LCDResInfo >= Panel_1024x768) { 3846 if(SiS_Pr->SiS_LCDResInfo >= Panel_1024x768) {
3812 if(HwInfo->jChipType < SIS_315H) { 3847 if(SiS_Pr->ChipType < SIS_315H) {
3813 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320; 3848 if(!(modeflag & HalfDCLK)) SiS_Pr->SiS_LCDHDES = 320;
3814 } else { 3849 } else {
3815 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) SiS_Pr->SiS_LCDHDES = 480; 3850#ifdef SIS315H
3816 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) SiS_Pr->SiS_LCDHDES = 804; 3851 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) SiS_Pr->SiS_LCDHDES = 480;
3852 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) SiS_Pr->SiS_LCDHDES = 804;
3817 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) SiS_Pr->SiS_LCDHDES = 704; 3853 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) SiS_Pr->SiS_LCDHDES = 704;
3818 if(!(modeflag & HalfDCLK)) { 3854 if(!(modeflag & HalfDCLK)) {
3819 SiS_Pr->SiS_LCDHDES = 320; 3855 SiS_Pr->SiS_LCDHDES = 320;
3820 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) SiS_Pr->SiS_LCDHDES = 632; 3856 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) SiS_Pr->SiS_LCDHDES = 632;
3821 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) SiS_Pr->SiS_LCDHDES = 542; 3857 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) SiS_Pr->SiS_LCDHDES = 542;
3822 } 3858 }
3823 } 3859#endif
3824 } 3860 }
3825 } 3861 }
3826 } 3862 }
3863 }
3827 } 3864 }
3828 } 3865 }
3829} 3866}
@@ -3832,54 +3869,90 @@ SiS_GetLVDSDesData(SiS_Private *SiS_Pr, USHORT ModeNo,USHORT ModeIdIndex,
3832/* DISABLE VIDEO BRIDGE */ 3869/* DISABLE VIDEO BRIDGE */
3833/*********************************************/ 3870/*********************************************/
3834 3871
3872#ifdef SIS315H
3873static int
3874SiS_HandlePWD(struct SiS_Private *SiS_Pr)
3875{
3876 int ret = 0;
3877#ifdef SET_PWD
3878 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
3879 unsigned short romptr = GetLCDStructPtr661_2(SiS_Pr);
3880 unsigned char drivermode = SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40;
3881 unsigned short temp;
3882
3883 if( (SiS_Pr->SiS_VBType & VB_SISPWD) &&
3884 (romptr) &&
3885 (SiS_Pr->SiS_PWDOffset) ) {
3886 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2b,ROMAddr[romptr + SiS_Pr->SiS_PWDOffset + 0]);
3887 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2c,ROMAddr[romptr + SiS_Pr->SiS_PWDOffset + 1]);
3888 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2d,ROMAddr[romptr + SiS_Pr->SiS_PWDOffset + 2]);
3889 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2e,ROMAddr[romptr + SiS_Pr->SiS_PWDOffset + 3]);
3890 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2f,ROMAddr[romptr + SiS_Pr->SiS_PWDOffset + 4]);
3891 temp = 0x00;
3892 if((ROMAddr[romptr + 2] & (0x06 << 1)) && !drivermode) {
3893 temp = 0x80;
3894 ret = 1;
3895 }
3896 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x27,0x7f,temp);
3897#ifdef SIS_XORG_XF86
3898#ifdef TWDEBUG
3899 xf86DrvMsg(0, 0, "Setting PWD %x\n", temp);
3900#endif
3901#endif
3902 }
3903#endif
3904 return ret;
3905}
3906#endif
3907
3835/* NEVER use any variables (VBInfo), this will be called 3908/* NEVER use any variables (VBInfo), this will be called
3836 * from outside the context of modeswitch! 3909 * from outside the context of modeswitch!
3837 * MUST call getVBType before calling this 3910 * MUST call getVBType before calling this
3838 */ 3911 */
3839void 3912void
3840SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 3913SiS_DisableBridge(struct SiS_Private *SiS_Pr)
3841{ 3914{
3842#ifdef SIS315H 3915#ifdef SIS315H
3843 USHORT tempah,pushax=0,modenum; 3916 unsigned short tempah, pushax=0, modenum;
3844#endif 3917#endif
3845 USHORT temp=0; 3918 unsigned short temp=0;
3846 3919
3847 if(SiS_Pr->SiS_VBType & VB_SISVB) { 3920 if(SiS_Pr->SiS_VBType & VB_SISVB) {
3848 3921
3849 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* ===== For 30xB/LV ===== */ 3922 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { /* ===== For 30xB/C/LV ===== */
3850 3923
3851 if(HwInfo->jChipType < SIS_315H) { 3924 if(SiS_Pr->ChipType < SIS_315H) {
3852 3925
3853#ifdef SIS300 /* 300 series */ 3926#ifdef SIS300 /* 300 series */
3854 3927
3855 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 3928 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
3856 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 3929 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3857 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFE); 3930 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFE);
3858 } else { 3931 } else {
3859 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x08); 3932 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
3860 } 3933 }
3861 SiS_PanelDelay(SiS_Pr, HwInfo, 3); 3934 SiS_PanelDelay(SiS_Pr, 3);
3862 } 3935 }
3863 if(SiS_Is301B(SiS_Pr)) { 3936 if(SiS_Is301B(SiS_Pr)) {
3864 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f); 3937 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0x3f);
3865 SiS_ShortDelay(SiS_Pr,1); 3938 SiS_ShortDelay(SiS_Pr,1);
3866 } 3939 }
3867 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); 3940 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF);
3868 SiS_DisplayOff(SiS_Pr); 3941 SiS_DisplayOff(SiS_Pr);
3869 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); 3942 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
3870 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); 3943 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
3871 SiS_UnLockCRT2(SiS_Pr,HwInfo); 3944 SiS_UnLockCRT2(SiS_Pr);
3872 if(!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { 3945 if(!(SiS_Pr->SiS_VBType & VB_SISLVDS)) {
3873 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); 3946 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80);
3874 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); 3947 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40);
3875 } 3948 }
3876 if( (!(SiS_CRT2IsLCD(SiS_Pr, HwInfo))) || 3949 if( (!(SiS_CRT2IsLCD(SiS_Pr))) ||
3877 (!(SiS_CR36BIOSWord23d(SiS_Pr, HwInfo))) ) { 3950 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) {
3878 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 3951 SiS_PanelDelay(SiS_Pr, 2);
3879 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 3952 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3880 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFD); 3953 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFD);
3881 } else { 3954 } else {
3882 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x04); 3955 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
3883 } 3956 }
3884 } 3957 }
3885 3958
@@ -3889,130 +3962,127 @@ SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
3889 3962
3890#ifdef SIS315H /* 315 series */ 3963#ifdef SIS315H /* 315 series */
3891 3964
3965 int didpwd = 0;
3892 BOOLEAN custom1 = ((SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) || 3966 BOOLEAN custom1 = ((SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) ||
3893 (SiS_Pr->SiS_CustomT == CUT_CLEVO1400)) ? TRUE : FALSE; 3967 (SiS_Pr->SiS_CustomT == CUT_CLEVO1400)) ? TRUE : FALSE;
3894 3968
3895 modenum = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34) & 0x7f; 3969 modenum = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34) & 0x7f;
3896 3970
3897 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 3971 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3898 3972
3899#ifdef SET_EMI 3973#ifdef SET_EMI
3900 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 3974 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
3901 if(SiS_Pr->SiS_CustomT != CUT_CLEVO1400) { 3975 if(SiS_Pr->SiS_CustomT != CUT_CLEVO1400) {
3902 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c); 3976 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
3903 } 3977 }
3904 } 3978 }
3905#endif 3979#endif
3906 if( (modenum <= 0x13) || 3980
3907 (SiS_IsVAMode(SiS_Pr,HwInfo)) || 3981 didpwd = SiS_HandlePWD(SiS_Pr);
3908 (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) ) { 3982
3909 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFE); 3983 if( (modenum <= 0x13) ||
3910 if(custom1) SiS_PanelDelay(SiS_Pr, HwInfo, 3); 3984 (SiS_IsVAMode(SiS_Pr)) ||
3985 (!(SiS_IsDualEdge(SiS_Pr))) ) {
3986 if(!didpwd) {
3987 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xfe);
3988 if(custom1) SiS_PanelDelay(SiS_Pr, 3);
3989 } else {
3990 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xfc);
3991 }
3911 } 3992 }
3912 3993
3913 if(!custom1) { 3994 if(!custom1) {
3914 SiS_DDC2Delay(SiS_Pr,0xff00); 3995 SiS_DDC2Delay(SiS_Pr,0xff00);
3915 SiS_DDC2Delay(SiS_Pr,0xe000); 3996 SiS_DDC2Delay(SiS_Pr,0xe000);
3916 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0x00); 3997 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0x00);
3917 pushax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x06); 3998 pushax = SiS_GetReg(SiS_Pr->SiS_P3c4,0x06);
3918 if(IS_SIS740) { 3999 if(IS_SIS740) {
3919 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3); 4000 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3);
3920 } 4001 }
3921 SiS_PanelDelay(SiS_Pr, HwInfo, 3); 4002 SiS_PanelDelay(SiS_Pr, 3);
3922 } 4003 }
3923 4004
3924 } 4005 }
3925 4006
3926 if(!(SiS_IsNotM650orLater(SiS_Pr, HwInfo))) { 4007 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
3927 if(HwInfo->jChipType < SIS_340) { 4008 /* if(SiS_Pr->ChipType < SIS_340) {*/
3928 tempah = 0xef; 4009 tempah = 0xef;
3929 if(SiS_IsVAMode(SiS_Pr,HwInfo)) tempah = 0xf7; 4010 if(SiS_IsVAMode(SiS_Pr)) tempah = 0xf7;
3930 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,tempah); 4011 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,tempah);
3931 } 4012 /*}*/
3932 } 4013 }
3933 4014
3934 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4015 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3935 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,~0x10); 4016 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,~0x10);
3936 } 4017 }
3937 4018
3938 tempah = 0x3f; 4019 tempah = 0x3f;
3939 if(SiS_IsDualEdge(SiS_Pr,HwInfo)) { 4020 if(SiS_IsDualEdge(SiS_Pr)) {
3940 tempah = 0x7f; 4021 tempah = 0x7f;
3941 if(!(SiS_IsVAMode(SiS_Pr,HwInfo))) tempah = 0xbf; 4022 if(!(SiS_IsVAMode(SiS_Pr))) tempah = 0xbf;
3942 } 4023 }
3943 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah); 4024 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1F,tempah);
3944 4025
3945 if((SiS_IsVAMode(SiS_Pr,HwInfo)) || 4026 if((SiS_IsVAMode(SiS_Pr)) ||
3946 ((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && (modenum <= 0x13))) { 4027 ((SiS_Pr->SiS_VBType & VB_SISLVDS) && (modenum <= 0x13))) {
3947 4028
3948 SiS_DisplayOff(SiS_Pr); 4029 SiS_DisplayOff(SiS_Pr);
3949 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4030 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3950 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4031 SiS_PanelDelay(SiS_Pr, 2);
3951 } 4032 }
3952 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); 4033 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
3953 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF); 4034 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1E,0xDF);
3954 4035
3955 } 4036 }
3956 4037
3957 if((!(SiS_IsVAMode(SiS_Pr,HwInfo))) || 4038 if((!(SiS_IsVAMode(SiS_Pr))) ||
3958 ((SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && (modenum <= 0x13))) { 4039 ((SiS_Pr->SiS_VBType & VB_SISLVDS) && (modenum <= 0x13))) {
3959 4040
3960 if(!(SiS_IsDualEdge(SiS_Pr,HwInfo))) { 4041 if(!(SiS_IsDualEdge(SiS_Pr))) {
3961 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf); 4042 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xdf);
3962 SiS_DisplayOff(SiS_Pr); 4043 SiS_DisplayOff(SiS_Pr);
3963 } 4044 }
3964 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); 4045 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
3965 4046
3966 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4047 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3967 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4048 SiS_PanelDelay(SiS_Pr, 2);
3968 } 4049 }
3969 4050
3970 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); 4051 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
3971 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); 4052 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00);
3972 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); 4053 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
3973 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); 4054 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
3974 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp); 4055 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp);
3975 4056
3976 } 4057 }
3977 4058
3978 if(SiS_IsNotM650orLater(SiS_Pr,HwInfo)) { 4059 if(SiS_IsNotM650orLater(SiS_Pr)) {
3979 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); 4060 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
3980 } 4061 }
3981 4062
3982 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4063 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
3983
3984 if(!custom1) {
3985
3986 if(!(SiS_IsVAMode(SiS_Pr,HwInfo))) {
3987 if(!(SiS_CRT2IsLCD(SiS_Pr,HwInfo))) {
3988 if(!(SiS_IsDualEdge(SiS_Pr,HwInfo))) {
3989 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFD);
3990 }
3991 }
3992 }
3993 4064
3994 SiS_SetReg(SiS_Pr->SiS_P3c4,0x06,pushax); 4065 if( (!(SiS_IsVAMode(SiS_Pr))) &&
4066 (!(SiS_CRT2IsLCD(SiS_Pr))) &&
4067 (!(SiS_IsDualEdge(SiS_Pr))) ) {
3995 4068
3996 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 4069 if(custom1) SiS_PanelDelay(SiS_Pr, 2);
3997 if(SiS_IsVAorLCD(SiS_Pr, HwInfo)) { 4070 if(!didpwd) {
3998 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 20); 4071 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFD);
3999 } 4072 }
4000 } 4073 if(custom1) SiS_PanelDelay(SiS_Pr, 4);
4001 4074 }
4002 } else {
4003 4075
4004 if((SiS_IsVAMode(SiS_Pr,HwInfo)) || 4076 if(!custom1) {
4005 (!(SiS_IsDualEdge(SiS_Pr,HwInfo)))) { 4077 SiS_SetReg(SiS_Pr->SiS_P3c4,0x06,pushax);
4006 if((!(SiS_WeHaveBacklightCtrl(SiS_Pr, HwInfo))) || 4078 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4007 (!(SiS_CRT2IsLCD(SiS_Pr, HwInfo)))) { 4079 if(SiS_IsVAorLCD(SiS_Pr)) {
4008 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4080 SiS_PanelDelayLoop(SiS_Pr, 3, 20);
4009 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFD);
4010 SiS_PanelDelay(SiS_Pr, HwInfo, 4);
4011 } 4081 }
4012 } 4082 }
4013
4014 } 4083 }
4015 } 4084
4085 }
4016 4086
4017#endif /* SIS315H */ 4087#endif /* SIS315H */
4018 4088
@@ -4020,36 +4090,36 @@ SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4020 4090
4021 } else { /* ============ For 301 ================ */ 4091 } else { /* ============ For 301 ================ */
4022 4092
4023 if(HwInfo->jChipType < SIS_315H) { 4093 if(SiS_Pr->ChipType < SIS_315H) {
4024#ifdef SIS300 4094#ifdef SIS300
4025 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 4095 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4026 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x08); 4096 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4027 SiS_PanelDelay(SiS_Pr, HwInfo, 3); 4097 SiS_PanelDelay(SiS_Pr, 3);
4028 } 4098 }
4029#endif 4099#endif
4030 } 4100 }
4031 4101
4032 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); /* disable VB */ 4102 SiS_SetRegAND(SiS_Pr->SiS_Part2Port,0x00,0xDF); /* disable VB */
4033 SiS_DisplayOff(SiS_Pr); 4103 SiS_DisplayOff(SiS_Pr);
4034 4104
4035 if(HwInfo->jChipType >= SIS_315H) { 4105 if(SiS_Pr->ChipType >= SIS_315H) {
4036 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); 4106 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
4037 } 4107 }
4038 4108
4039 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); /* disable lock mode */ 4109 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); /* disable lock mode */
4040 4110
4041 if(HwInfo->jChipType >= SIS_315H) { 4111 if(SiS_Pr->ChipType >= SIS_315H) {
4042 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00); 4112 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00);
4043 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10); 4113 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x10);
4044 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 4114 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
4045 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp); 4115 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,temp);
4046 } else { 4116 } else {
4047#ifdef SIS300 4117#ifdef SIS300
4048 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); /* disable CRT2 */ 4118 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); /* disable CRT2 */
4049 if( (!(SiS_CRT2IsLCD(SiS_Pr, HwInfo))) || 4119 if( (!(SiS_CRT2IsLCD(SiS_Pr))) ||
4050 (!(SiS_CR36BIOSWord23d(SiS_Pr,HwInfo))) ) { 4120 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) {
4051 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4121 SiS_PanelDelay(SiS_Pr, 2);
4052 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x04); 4122 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
4053 } 4123 }
4054#endif 4124#endif
4055 } 4125 }
@@ -4058,34 +4128,34 @@ SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4058 4128
4059 } else { /* ============ For LVDS =============*/ 4129 } else { /* ============ For LVDS =============*/
4060 4130
4061 if(HwInfo->jChipType < SIS_315H) { 4131 if(SiS_Pr->ChipType < SIS_315H) {
4062 4132
4063#ifdef SIS300 /* 300 series */ 4133#ifdef SIS300 /* 300 series */
4064 4134
4065 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 4135 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
4066 SiS_SetCH700x(SiS_Pr,0x090E); 4136 SiS_SetCH700x(SiS_Pr,0x0E,0x09);
4067 } 4137 }
4068 4138
4069 if(HwInfo->jChipType == SIS_730) { 4139 if(SiS_Pr->ChipType == SIS_730) {
4070 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x11) & 0x08)) { 4140 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x11) & 0x08)) {
4071 SiS_WaitVBRetrace(SiS_Pr,HwInfo); 4141 SiS_WaitVBRetrace(SiS_Pr);
4072 } 4142 }
4073 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 4143 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4074 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x08); 4144 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4075 SiS_PanelDelay(SiS_Pr, HwInfo, 3); 4145 SiS_PanelDelay(SiS_Pr, 3);
4076 } 4146 }
4077 } else { 4147 } else {
4078 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x11) & 0x08)) { 4148 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x11) & 0x08)) {
4079 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { 4149 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
4080 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 4150 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4081 SiS_WaitVBRetrace(SiS_Pr,HwInfo); 4151 SiS_WaitVBRetrace(SiS_Pr);
4082 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x06) & 0x1c)) { 4152 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x06) & 0x1c)) {
4083 SiS_DisplayOff(SiS_Pr); 4153 SiS_DisplayOff(SiS_Pr);
4084 } 4154 }
4085 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x08); 4155 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4086 SiS_PanelDelay(SiS_Pr, HwInfo, 3); 4156 SiS_PanelDelay(SiS_Pr, 3);
4087 } 4157 }
4088 } 4158 }
4089 } 4159 }
4090 } 4160 }
4091 4161
@@ -4094,14 +4164,14 @@ SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4094 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); 4164 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
4095 4165
4096 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); 4166 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
4097 SiS_UnLockCRT2(SiS_Pr,HwInfo); 4167 SiS_UnLockCRT2(SiS_Pr);
4098 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); 4168 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80);
4099 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); 4169 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40);
4100 4170
4101 if( (!(SiS_CRT2IsLCD(SiS_Pr, HwInfo))) || 4171 if( (!(SiS_CRT2IsLCD(SiS_Pr))) ||
4102 (!(SiS_CR36BIOSWord23d(SiS_Pr,HwInfo))) ) { 4172 (!(SiS_CR36BIOSWord23d(SiS_Pr))) ) {
4103 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4173 SiS_PanelDelay(SiS_Pr, 2);
4104 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x04); 4174 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
4105 } 4175 }
4106 4176
4107#endif /* SIS300 */ 4177#endif /* SIS300 */
@@ -4110,113 +4180,113 @@ SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4110 4180
4111#ifdef SIS315H /* 315 series */ 4181#ifdef SIS315H /* 315 series */
4112 4182
4113 if(!(SiS_IsNotM650orLater(SiS_Pr,HwInfo))) { 4183 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
4114 if(HwInfo->jChipType < SIS_340) { 4184 /*if(SiS_Pr->ChipType < SIS_340) { */ /* XGI needs this */
4115 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,~0x18); 4185 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x4c,~0x18);
4116 } 4186 /* } */
4117 } 4187 }
4118 4188
4119 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 4189 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
4120 4190
4121 if(HwInfo->jChipType == SIS_740) { 4191 if(SiS_Pr->ChipType == SIS_740) {
4122 temp = SiS_GetCH701x(SiS_Pr,0x61); 4192 temp = SiS_GetCH701x(SiS_Pr,0x61);
4123 if(temp < 1) { 4193 if(temp < 1) {
4124 SiS_SetCH701x(SiS_Pr,0xac76); 4194 SiS_SetCH701x(SiS_Pr,0x76,0xac);
4125 SiS_SetCH701x(SiS_Pr,0x0066); 4195 SiS_SetCH701x(SiS_Pr,0x66,0x00);
4126 } 4196 }
4127 4197
4128 if( (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4198 if( (!(SiS_IsDualEdge(SiS_Pr))) ||
4129 (SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwInfo)) ) { 4199 (SiS_IsTVOrYPbPrOrScart(SiS_Pr)) ) {
4130 SiS_SetCH701x(SiS_Pr,0x3e49); 4200 SiS_SetCH701x(SiS_Pr,0x49,0x3e);
4131 } 4201 }
4132 } 4202 }
4133 4203
4134 if( (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4204 if( (!(SiS_IsDualEdge(SiS_Pr))) ||
4135 (SiS_IsVAMode(SiS_Pr,HwInfo)) ) { 4205 (SiS_IsVAMode(SiS_Pr)) ) {
4136 SiS_Chrontel701xBLOff(SiS_Pr); 4206 SiS_Chrontel701xBLOff(SiS_Pr);
4137 SiS_Chrontel701xOff(SiS_Pr,HwInfo); 4207 SiS_Chrontel701xOff(SiS_Pr);
4138 } 4208 }
4139 4209
4140 if(HwInfo->jChipType != SIS_740) { 4210 if(SiS_Pr->ChipType != SIS_740) {
4141 if( (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4211 if( (!(SiS_IsDualEdge(SiS_Pr))) ||
4142 (SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwInfo)) ) { 4212 (SiS_IsTVOrYPbPrOrScart(SiS_Pr)) ) {
4143 SiS_SetCH701x(SiS_Pr,0x0149); 4213 SiS_SetCH701x(SiS_Pr,0x49,0x01);
4144 } 4214 }
4145 } 4215 }
4146 4216
4147 } 4217 }
4148 4218
4149 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 4219 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
4150 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x08); 4220 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x08);
4151 SiS_PanelDelay(SiS_Pr, HwInfo, 3); 4221 SiS_PanelDelay(SiS_Pr, 3);
4152 } 4222 }
4153 4223
4154 if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) || 4224 if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) ||
4155 (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4225 (!(SiS_IsDualEdge(SiS_Pr))) ||
4156 (!(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwInfo))) ) { 4226 (!(SiS_IsTVOrYPbPrOrScart(SiS_Pr))) ) {
4157 SiS_DisplayOff(SiS_Pr); 4227 SiS_DisplayOff(SiS_Pr);
4158 } 4228 }
4159 4229
4160 if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) || 4230 if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) ||
4161 (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4231 (!(SiS_IsDualEdge(SiS_Pr))) ||
4162 (!(SiS_IsVAMode(SiS_Pr,HwInfo))) ) { 4232 (!(SiS_IsVAMode(SiS_Pr))) ) {
4163 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80); 4233 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x00,0x80);
4164 } 4234 }
4165 4235
4166 if(HwInfo->jChipType == SIS_740) { 4236 if(SiS_Pr->ChipType == SIS_740) {
4167 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); 4237 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
4168 } 4238 }
4169 4239
4170 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF); 4240 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x32,0xDF);
4171 4241
4172 if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) || 4242 if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) ||
4173 (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4243 (!(SiS_IsDualEdge(SiS_Pr))) ||
4174 (!(SiS_IsVAMode(SiS_Pr,HwInfo))) ) { 4244 (!(SiS_IsVAMode(SiS_Pr))) ) {
4175 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF); 4245 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x1E,0xDF);
4176 } 4246 }
4177 4247
4178 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 4248 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
4179 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4249 if(SiS_CRT2IsLCD(SiS_Pr)) {
4180 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf); 4250 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf);
4181 if(HwInfo->jChipType == SIS_550) { 4251 if(SiS_Pr->ChipType == SIS_550) {
4182 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xbf); 4252 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xbf);
4183 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xef); 4253 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xef);
4184 } 4254 }
4185 } 4255 }
4186 } else { 4256 } else {
4187 if(HwInfo->jChipType == SIS_740) { 4257 if(SiS_Pr->ChipType == SIS_740) {
4188 if(SiS_IsLCDOrLCDA(SiS_Pr,HwInfo)) { 4258 if(SiS_IsLCDOrLCDA(SiS_Pr)) {
4189 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf); 4259 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf);
4190 } 4260 }
4191 } else if(SiS_IsVAMode(SiS_Pr,HwInfo)) { 4261 } else if(SiS_IsVAMode(SiS_Pr)) {
4192 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf); 4262 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x1e,0xdf);
4193 } 4263 }
4194 } 4264 }
4195 4265
4196 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 4266 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
4197 if(SiS_IsDualEdge(SiS_Pr,HwInfo)) { 4267 if(SiS_IsDualEdge(SiS_Pr)) {
4198 /* SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xff); */ 4268 /* SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xff); */
4199 } else { 4269 } else {
4200 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb); 4270 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x13,0xfb);
4201 } 4271 }
4202 } 4272 }
4203 4273
4204 SiS_UnLockCRT2(SiS_Pr,HwInfo); 4274 SiS_UnLockCRT2(SiS_Pr);
4205 4275
4206 if(HwInfo->jChipType == SIS_550) { 4276 if(SiS_Pr->ChipType == SIS_550) {
4207 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); /* DirectDVD PAL?*/ 4277 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x80); /* DirectDVD PAL?*/
4208 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); /* VB clock / 4 ? */ 4278 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x02,0x40); /* VB clock / 4 ? */
4209 } else if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) || 4279 } else if( (SiS_Pr->SiS_IF_DEF_CH70xx == 0) ||
4210 (!(SiS_IsDualEdge(SiS_Pr,HwInfo))) || 4280 (!(SiS_IsDualEdge(SiS_Pr))) ||
4211 (!(SiS_IsVAMode(SiS_Pr,HwInfo))) ) { 4281 (!(SiS_IsVAMode(SiS_Pr))) ) {
4212 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7); 4282 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7);
4213 } 4283 }
4214 4284
4215 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 4285 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
4216 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4286 if(SiS_CRT2IsLCD(SiS_Pr)) {
4217 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo))) { 4287 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4218 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4288 SiS_PanelDelay(SiS_Pr, 2);
4219 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x04); 4289 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x04);
4220 } 4290 }
4221 } 4291 }
4222 } 4292 }
@@ -4237,78 +4307,81 @@ SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4237 * from outside the context of a mode switch! 4307 * from outside the context of a mode switch!
4238 * MUST call getVBType before calling this 4308 * MUST call getVBType before calling this
4239 */ 4309 */
4240static void 4310#ifdef SIS_LINUX_KERNEL
4241SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 4311static
4312#endif
4313void
4314SiS_EnableBridge(struct SiS_Private *SiS_Pr)
4242{ 4315{
4243 USHORT temp=0,tempah; 4316 unsigned short temp=0, tempah;
4244#ifdef SIS315H 4317#ifdef SIS315H
4245 USHORT temp1,pushax=0; 4318 unsigned short temp1, pushax=0;
4246 BOOLEAN delaylong = FALSE; 4319 BOOLEAN delaylong = FALSE;
4247#endif 4320#endif
4248 4321
4249 if(SiS_Pr->SiS_VBType & VB_SISVB) { 4322 if(SiS_Pr->SiS_VBType & VB_SISVB) {
4250 4323
4251 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* ====== For 301B et al ====== */ 4324 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { /* ====== For 301B et al ====== */
4252 4325
4253 if(HwInfo->jChipType < SIS_315H) { 4326 if(SiS_Pr->ChipType < SIS_315H) {
4254 4327
4255#ifdef SIS300 /* 300 series */ 4328#ifdef SIS300 /* 300 series */
4256 4329
4257 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4330 if(SiS_CRT2IsLCD(SiS_Pr)) {
4258 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4331 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
4259 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); 4332 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
4260 } else if(SiS_Pr->SiS_VBType & VB_NoLCD) { 4333 } else if(SiS_Pr->SiS_VBType & VB_NoLCD) {
4261 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x00); 4334 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4262 } 4335 }
4263 if(SiS_Pr->SiS_VBType & (VB_SIS301LV302LV | VB_NoLCD)) { 4336 if(SiS_Pr->SiS_VBType & (VB_SISLVDS | VB_NoLCD)) {
4264 if(!(SiS_CR36BIOSWord23d(SiS_Pr, HwInfo))) { 4337 if(!(SiS_CR36BIOSWord23d(SiS_Pr))) {
4265 SiS_PanelDelay(SiS_Pr, HwInfo, 0); 4338 SiS_PanelDelay(SiS_Pr, 0);
4266 } 4339 }
4267 } 4340 }
4268 } 4341 }
4269 4342
4270 if((SiS_Pr->SiS_VBType & VB_NoLCD) && 4343 if((SiS_Pr->SiS_VBType & VB_NoLCD) &&
4271 (SiS_CRT2IsLCD(SiS_Pr, HwInfo))) { 4344 (SiS_CRT2IsLCD(SiS_Pr))) {
4272 4345
4273 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* Enable CRT2 */ 4346 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* Enable CRT2 */
4274 SiS_DisplayOn(SiS_Pr); 4347 SiS_DisplayOn(SiS_Pr);
4275 SiS_UnLockCRT2(SiS_Pr,HwInfo); 4348 SiS_UnLockCRT2(SiS_Pr);
4276 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF); 4349 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF);
4277 if(SiS_BridgeInSlavemode(SiS_Pr)) { 4350 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4278 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F); 4351 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F);
4279 } else { 4352 } else {
4280 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40); 4353 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40);
4281 } 4354 }
4282 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { 4355 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
4283 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { 4356 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x10)) {
4284 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 4357 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4285 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4358 SiS_PanelDelay(SiS_Pr, 1);
4286 } 4359 }
4287 SiS_WaitVBRetrace(SiS_Pr,HwInfo); 4360 SiS_WaitVBRetrace(SiS_Pr);
4288 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x00); 4361 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4289 } 4362 }
4290 } 4363 }
4291 4364
4292 } else { 4365 } else {
4293 4366
4294 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ 4367 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */
4295 if(SiS_BridgeInSlavemode(SiS_Pr)) { 4368 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4296 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 4369 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
4297 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; 4370 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20;
4298 } 4371 }
4299 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp); 4372 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp);
4300 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 4373 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
4301 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20); /* enable VB processor */ 4374 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1F,0x20); /* enable VB processor */
4302 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0); 4375 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,0xC0);
4303 SiS_DisplayOn(SiS_Pr); 4376 SiS_DisplayOn(SiS_Pr);
4304 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4377 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
4305 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4378 if(SiS_CRT2IsLCD(SiS_Pr)) {
4306 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { 4379 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x10)) {
4307 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 4380 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4308 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4381 SiS_PanelDelay(SiS_Pr, 1);
4309 } 4382 }
4310 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01); 4383 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01);
4311 } 4384 }
4312 } 4385 }
4313 } 4386 }
4314 4387
@@ -4322,31 +4395,32 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4322#ifdef SIS315H /* 315 series */ 4395#ifdef SIS315H /* 315 series */
4323 4396
4324#ifdef SET_EMI 4397#ifdef SET_EMI
4325 UCHAR r30=0, r31=0, r32=0, r33=0, cr36=0; 4398 unsigned char r30=0, r31=0, r32=0, r33=0, cr36=0;
4326 /* USHORT emidelay=0; */ 4399 int didpwd = 0;
4400 /* unsigned short emidelay=0; */
4327#endif 4401#endif
4328 4402
4329 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4403 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
4330 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0xef); 4404 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x1f,0xef);
4331#ifdef SET_EMI 4405#ifdef SET_EMI
4332 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 4406 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4333 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c); 4407 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
4334 } 4408 }
4335#endif 4409#endif
4336 } 4410 }
4337 4411
4338 if(!(SiS_IsNotM650orLater(SiS_Pr, HwInfo))) { 4412 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
4339 if(HwInfo->jChipType < SIS_340) { 4413 /*if(SiS_Pr->ChipType < SIS_340) { */
4340 tempah = 0x10; 4414 tempah = 0x10;
4341 if(SiS_LCDAEnabled(SiS_Pr, HwInfo)) { 4415 if(SiS_LCDAEnabled(SiS_Pr)) {
4342 if(SiS_TVEnabled(SiS_Pr, HwInfo)) tempah = 0x18; 4416 if(SiS_TVEnabled(SiS_Pr)) tempah = 0x18;
4343 else tempah = 0x08; 4417 else tempah = 0x08;
4344 } 4418 }
4345 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x4c,tempah); 4419 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x4c,tempah);
4346 } 4420 /*}*/
4347 } 4421 }
4348 4422
4349 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4423 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
4350 4424
4351 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0x00); 4425 SiS_SetRegByte(SiS_Pr->SiS_P3c6,0x00);
4352 SiS_DisplayOff(SiS_Pr); 4426 SiS_DisplayOff(SiS_Pr);
@@ -4355,42 +4429,51 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4355 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3); 4429 SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x06,0xE3);
4356 } 4430 }
4357 4431
4358 if(SiS_IsVAorLCD(SiS_Pr, HwInfo)) { 4432 didpwd = SiS_HandlePWD(SiS_Pr);
4359 if(!(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) { 4433
4360 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 2); 4434 if(SiS_IsVAorLCD(SiS_Pr)) {
4361 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); 4435 if(!didpwd) {
4362 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 2); 4436 if(!(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) {
4363 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 4437 SiS_PanelDelayLoop(SiS_Pr, 3, 2);
4364 SiS_GenericDelay(SiS_Pr, 0x4500); 4438 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
4439 SiS_PanelDelayLoop(SiS_Pr, 3, 2);
4440 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4441 SiS_GenericDelay(SiS_Pr, 17664);
4442 }
4443 }
4444 } else {
4445 SiS_PanelDelayLoop(SiS_Pr, 3, 2);
4446 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4447 SiS_GenericDelay(SiS_Pr, 17664);
4365 } 4448 }
4366 } 4449 }
4367 } 4450 }
4368 4451
4369 if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40)) { 4452 if(!(SiS_GetReg(SiS_Pr->SiS_P3d4,0x31) & 0x40)) {
4370 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 10); 4453 SiS_PanelDelayLoop(SiS_Pr, 3, 10);
4371 delaylong = TRUE; 4454 delaylong = TRUE;
4372 } 4455 }
4373 4456
4374 } 4457 }
4375 4458
4376 if(!(SiS_IsVAMode(SiS_Pr,HwInfo))) { 4459 if(!(SiS_IsVAMode(SiS_Pr))) {
4377 4460
4378 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; 4461 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF;
4379 if(SiS_BridgeInSlavemode(SiS_Pr)) { 4462 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4380 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 4463 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
4381 if(!(tempah & SetCRT2ToRAMDAC)) { 4464 if(!(tempah & SetCRT2ToRAMDAC)) {
4382 if(!(SiS_LCDAEnabled(SiS_Pr, HwInfo))) temp |= 0x20; 4465 if(!(SiS_LCDAEnabled(SiS_Pr))) temp |= 0x20;
4383 } 4466 }
4384 } 4467 }
4385 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp); 4468 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp);
4386 4469
4387 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ 4470 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */
4388 4471
4389 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); 4472 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
4390 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); 4473 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80);
4391 4474
4392 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4475 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
4393 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4476 SiS_PanelDelay(SiS_Pr, 2);
4394 } 4477 }
4395 4478
4396 } else { 4479 } else {
@@ -4402,38 +4485,48 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4402 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20); 4485 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x00,0x1f,0x20);
4403 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); 4486 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80);
4404 4487
4488 if(SiS_Pr->SiS_VBType & VB_SISPOWER) {
4489 if( (SiS_LCDAEnabled(SiS_Pr)) ||
4490 (SiS_CRT2IsLCD(SiS_Pr)) ) {
4491 /* Enable "LVDS PLL power on" (even on 301C) */
4492 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x2a,0x7f);
4493 /* Enable "LVDS Driver Power on" (even on 301C) */
4494 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x7f);
4495 }
4496 }
4497
4405 tempah = 0xc0; 4498 tempah = 0xc0;
4406 if(SiS_IsDualEdge(SiS_Pr, HwInfo)) { 4499 if(SiS_IsDualEdge(SiS_Pr)) {
4407 tempah = 0x80; 4500 tempah = 0x80;
4408 if(!(SiS_IsVAMode(SiS_Pr, HwInfo))) tempah = 0x40; 4501 if(!(SiS_IsVAMode(SiS_Pr))) tempah = 0x40;
4409 } 4502 }
4410 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah); 4503 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1F,tempah);
4411 4504
4412 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 4505 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
4413 4506
4414 SiS_PanelDelay(SiS_Pr, HwInfo, 2); 4507 SiS_PanelDelay(SiS_Pr, 2);
4415 4508
4416 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1f,0x10); 4509 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x1f,0x10);
4417 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80); 4510 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2e,0x80);
4418 4511
4419 if(SiS_Pr->SiS_CustomT != CUT_CLEVO1400) { 4512 if(SiS_Pr->SiS_CustomT != CUT_CLEVO1400) {
4420#ifdef SET_EMI 4513#ifdef SET_EMI
4421 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 4514 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4422 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c); 4515 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
4423 SiS_GenericDelay(SiS_Pr, 0x500); 4516 SiS_GenericDelay(SiS_Pr, 2048);
4424 } 4517 }
4425#endif 4518#endif
4426 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c); 4519 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x0c);
4427 4520
4428 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 4521 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4429#ifdef SET_EMI 4522#ifdef SET_EMI
4430 cr36 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36); 4523 cr36 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36);
4431 4524
4432 if(SiS_Pr->SiS_ROMNew) { 4525 if(SiS_Pr->SiS_ROMNew) {
4433 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 4526 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
4434 USHORT romptr = GetLCDStructPtr661_2(SiS_Pr, HwInfo); 4527 unsigned short romptr = GetLCDStructPtr661_2(SiS_Pr);
4435 if(romptr) { 4528 if(romptr) {
4436 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); /* Reset */ 4529 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); /* Reset */
4437 SiS_Pr->EMI_30 = 0; 4530 SiS_Pr->EMI_30 = 0;
4438 SiS_Pr->EMI_31 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 0]; 4531 SiS_Pr->EMI_31 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 0];
4439 SiS_Pr->EMI_32 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 1]; 4532 SiS_Pr->EMI_32 = ROMAddr[romptr + SiS_Pr->SiS_EMIOffset + 1];
@@ -4511,21 +4604,21 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4511 if(!SiS_Pr->OverruleEMI) { 4604 if(!SiS_Pr->OverruleEMI) {
4512#ifdef COMPAL_HACK 4605#ifdef COMPAL_HACK
4513 if(SiS_Pr->SiS_CustomT == CUT_COMPAL1400_2) { 4606 if(SiS_Pr->SiS_CustomT == CUT_COMPAL1400_2) {
4514 if((cr36 & 0x0f) == 0x09) { 4607 if((cr36 & 0x0f) == 0x09) {
4515 r30 = 0x60; r31 = 0x05; r32 = 0x60; r33 = 0x00; 4608 r30 = 0x60; r31 = 0x05; r32 = 0x60; r33 = 0x00;
4516 } 4609 }
4517 } 4610 }
4518#endif 4611#endif
4519#ifdef COMPAQ_HACK 4612#ifdef COMPAQ_HACK
4520 if(SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) { 4613 if(SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) {
4521 if((cr36 & 0x0f) == 0x03) { 4614 if((cr36 & 0x0f) == 0x03) {
4522 r30 = 0x20; r31 = 0x12; r32 = 0xd0; r33 = 0x6b; 4615 r30 = 0x20; r31 = 0x12; r32 = 0xd0; r33 = 0x6b;
4523 } 4616 }
4524 } 4617 }
4525#endif 4618#endif
4526#ifdef ASUS_HACK 4619#ifdef ASUS_HACK
4527 if(SiS_Pr->SiS_CustomT == CUT_ASUSA2H_2) { 4620 if(SiS_Pr->SiS_CustomT == CUT_ASUSA2H_2) {
4528 if((cr36 & 0x0f) == 0x02) { 4621 if((cr36 & 0x0f) == 0x02) {
4529 /* r30 = 0x60; r31 = 0x05; r32 = 0x60; r33 = 0x33; */ /* rev 2 */ 4622 /* r30 = 0x60; r31 = 0x05; r32 = 0x60; r33 = 0x33; */ /* rev 2 */
4530 /* r30 = 0x20; r31 = 0x05; r32 = 0x60; r33 = 0x33; */ /* rev 3 */ 4623 /* r30 = 0x20; r31 = 0x05; r32 = 0x60; r33 = 0x33; */ /* rev 3 */
4531 /* r30 = 0x60; r31 = 0x0d; r32 = 0x70; r33 = 0x40; */ /* rev 4 */ 4624 /* r30 = 0x60; r31 = 0x0d; r32 = 0x70; r33 = 0x40; */ /* rev 4 */
@@ -4533,11 +4626,11 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4533 } 4626 }
4534 } 4627 }
4535#endif 4628#endif
4536 } 4629 }
4537 4630
4538 if(!(SiS_Pr->OverruleEMI && (!r30) && (!r31) && (!r32) && (!r33))) { 4631 if(!(SiS_Pr->OverruleEMI && (!r30) && (!r31) && (!r32) && (!r33))) {
4539 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); /* Reset */ 4632 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x20); /* Reset */
4540 SiS_GenericDelay(SiS_Pr, 0x500); 4633 SiS_GenericDelay(SiS_Pr, 2048);
4541 } 4634 }
4542 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x31,r31); 4635 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x31,r31);
4543 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x32,r32); 4636 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x32,r32);
@@ -4547,36 +4640,44 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4547 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x34,0x10); 4640 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x34,0x10);
4548 4641
4549#ifdef SET_EMI 4642#ifdef SET_EMI
4550 if( (SiS_LCDAEnabled(SiS_Pr, HwInfo)) || 4643 if( (SiS_LCDAEnabled(SiS_Pr)) ||
4551 (SiS_CRT2IsLCD(SiS_Pr, HwInfo)) ) { 4644 (SiS_CRT2IsLCD(SiS_Pr)) ) {
4552 if(r30 & 0x40) { 4645 if(r30 & 0x40) {
4553 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 5); 4646 /*SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x2a,0x80);*/
4647 SiS_PanelDelayLoop(SiS_Pr, 3, 5);
4554 if(delaylong) { 4648 if(delaylong) {
4555 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 5); 4649 SiS_PanelDelayLoop(SiS_Pr, 3, 5);
4556 delaylong = FALSE; 4650 delaylong = FALSE;
4557 } 4651 }
4558 SiS_WaitVBRetrace(SiS_Pr,HwInfo); 4652 SiS_WaitVBRetrace(SiS_Pr);
4653 SiS_WaitVBRetrace(SiS_Pr);
4559 if(SiS_Pr->SiS_CustomT == CUT_ASUSA2H_2) { 4654 if(SiS_Pr->SiS_CustomT == CUT_ASUSA2H_2) {
4560 SiS_GenericDelay(SiS_Pr, 0x500); 4655 SiS_GenericDelay(SiS_Pr, 1280);
4561 } 4656 }
4562 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); /* Enable */ 4657 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x30,0x40); /* Enable */
4563 } 4658 /*SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x2a,0x7f);*/
4659 }
4564 } 4660 }
4565#endif 4661#endif
4566 } 4662 }
4567 } 4663 }
4568 4664
4569 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo))) { 4665 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4570 if(SiS_IsVAorLCD(SiS_Pr, HwInfo)) { 4666 if(SiS_IsVAorLCD(SiS_Pr)) {
4571 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 10); 4667 SiS_PanelDelayLoop(SiS_Pr, 3, 10);
4572 if(delaylong) { 4668 if(delaylong) {
4573 SiS_PanelDelayLoop(SiS_Pr, HwInfo, 3, 10); 4669 SiS_PanelDelayLoop(SiS_Pr, 3, 10);
4574 } 4670 }
4575 SiS_WaitVBRetrace(SiS_Pr,HwInfo); 4671 SiS_WaitVBRetrace(SiS_Pr);
4576 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 4672 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
4577 SiS_GenericDelay(SiS_Pr, 0x500); 4673 SiS_GenericDelay(SiS_Pr, 2048);
4674 SiS_WaitVBRetrace(SiS_Pr);
4675 }
4676 if(!didpwd) {
4677 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01);
4678 } else {
4679 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x03);
4578 } 4680 }
4579 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01);
4580 } 4681 }
4581 } 4682 }
4582 4683
@@ -4586,7 +4687,7 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4586 4687
4587 } 4688 }
4588 4689
4589 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo))) { 4690 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4590 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); 4691 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
4591 } 4692 }
4592 4693
@@ -4596,26 +4697,26 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4596 4697
4597 } else { /* ============ For 301 ================ */ 4698 } else { /* ============ For 301 ================ */
4598 4699
4599 if(HwInfo->jChipType < SIS_315H) { 4700 if(SiS_Pr->ChipType < SIS_315H) {
4600 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4701 if(SiS_CRT2IsLCD(SiS_Pr)) {
4601 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x00); 4702 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4602 SiS_PanelDelay(SiS_Pr, HwInfo, 0); 4703 SiS_PanelDelay(SiS_Pr, 0);
4603 } 4704 }
4604 } 4705 }
4605 4706
4606 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */ 4707 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x32) & 0xDF; /* lock mode */
4607 if(SiS_BridgeInSlavemode(SiS_Pr)) { 4708 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4608 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30); 4709 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x30);
4609 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20; 4710 if(!(tempah & SetCRT2ToRAMDAC)) temp |= 0x20;
4610 } 4711 }
4611 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp); 4712 SiS_SetReg(SiS_Pr->SiS_P3c4,0x32,temp);
4612 4713
4613 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */ 4714 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); /* enable CRT2 */
4614 4715
4615 if(HwInfo->jChipType >= SIS_315H) { 4716 if(SiS_Pr->ChipType >= SIS_315H) {
4616 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x2E); 4717 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x2E);
4617 if(!(temp & 0x80)) { 4718 if(!(temp & 0x80)) {
4618 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); /* BVBDOENABLE=1 */ 4719 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); /* BVBDOENABLE=1 */
4619 } 4720 }
4620 } 4721 }
4621 4722
@@ -4623,15 +4724,15 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4623 4724
4624 SiS_VBLongWait(SiS_Pr); 4725 SiS_VBLongWait(SiS_Pr);
4625 SiS_DisplayOn(SiS_Pr); 4726 SiS_DisplayOn(SiS_Pr);
4626 if(HwInfo->jChipType >= SIS_315H) { 4727 if(SiS_Pr->ChipType >= SIS_315H) {
4627 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); 4728 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
4628 } 4729 }
4629 SiS_VBLongWait(SiS_Pr); 4730 SiS_VBLongWait(SiS_Pr);
4630 4731
4631 if(HwInfo->jChipType < SIS_315H) { 4732 if(SiS_Pr->ChipType < SIS_315H) {
4632 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4733 if(SiS_CRT2IsLCD(SiS_Pr)) {
4633 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4734 SiS_PanelDelay(SiS_Pr, 1);
4634 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x00); 4735 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4635 } 4736 }
4636 } 4737 }
4637 4738
@@ -4639,49 +4740,49 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4639 4740
4640 } else { /* =================== For LVDS ================== */ 4741 } else { /* =================== For LVDS ================== */
4641 4742
4642 if(HwInfo->jChipType < SIS_315H) { 4743 if(SiS_Pr->ChipType < SIS_315H) {
4643 4744
4644#ifdef SIS300 /* 300 series */ 4745#ifdef SIS300 /* 300 series */
4645 4746
4646 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4747 if(SiS_CRT2IsLCD(SiS_Pr)) {
4647 if(HwInfo->jChipType == SIS_730) { 4748 if(SiS_Pr->ChipType == SIS_730) {
4648 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4749 SiS_PanelDelay(SiS_Pr, 1);
4649 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4750 SiS_PanelDelay(SiS_Pr, 1);
4650 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4751 SiS_PanelDelay(SiS_Pr, 1);
4651 } 4752 }
4652 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x00); 4753 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4653 if(!(SiS_CR36BIOSWord23d(SiS_Pr,HwInfo))) { 4754 if(!(SiS_CR36BIOSWord23d(SiS_Pr))) {
4654 SiS_PanelDelay(SiS_Pr, HwInfo, 0); 4755 SiS_PanelDelay(SiS_Pr, 0);
4655 } 4756 }
4656 } 4757 }
4657 4758
4658 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 4759 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
4659 SiS_DisplayOn(SiS_Pr); 4760 SiS_DisplayOn(SiS_Pr);
4660 SiS_UnLockCRT2(SiS_Pr,HwInfo); 4761 SiS_UnLockCRT2(SiS_Pr);
4661 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF); 4762 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xBF);
4662 if(SiS_BridgeInSlavemode(SiS_Pr)) { 4763 if(SiS_BridgeInSlavemode(SiS_Pr)) {
4663 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F); 4764 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x01,0x1F);
4664 } else { 4765 } else {
4665 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40); 4766 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0x1F,0x40);
4666 } 4767 }
4667 4768
4668 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 4769 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
4669 if(!(SiS_CRT2IsLCD(SiS_Pr, HwInfo))) { 4770 if(!(SiS_CRT2IsLCD(SiS_Pr))) {
4670 SiS_WaitVBRetrace(SiS_Pr, HwInfo); 4771 SiS_WaitVBRetrace(SiS_Pr);
4671 SiS_SetCH700x(SiS_Pr,0x0B0E); 4772 SiS_SetCH700x(SiS_Pr,0x0E,0x0B);
4672 } 4773 }
4673 } 4774 }
4674 4775
4675 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4776 if(SiS_CRT2IsLCD(SiS_Pr)) {
4676 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x40)) { 4777 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x40)) {
4677 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x10)) { 4778 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x16) & 0x10)) {
4678 if(!(SiS_CR36BIOSWord23b(SiS_Pr,HwInfo))) { 4779 if(!(SiS_CR36BIOSWord23b(SiS_Pr))) {
4679 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4780 SiS_PanelDelay(SiS_Pr, 1);
4680 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4781 SiS_PanelDelay(SiS_Pr, 1);
4681 } 4782 }
4682 SiS_WaitVBRetrace(SiS_Pr, HwInfo); 4783 SiS_WaitVBRetrace(SiS_Pr);
4683 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x00); 4784 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4684 } 4785 }
4685 } 4786 }
4686 } 4787 }
4687 4788
@@ -4691,94 +4792,94 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4691 4792
4692#ifdef SIS315H /* 315 series */ 4793#ifdef SIS315H /* 315 series */
4693 4794
4694 if(!(SiS_IsNotM650orLater(SiS_Pr,HwInfo))) { 4795 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
4695 if(HwInfo->jChipType < SIS_340) { 4796 /*if(SiS_Pr->ChipType < SIS_340) {*/ /* XGI needs this */
4696 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x4c,0x18); 4797 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x4c,0x18);
4697 } 4798 /*}*/
4698 } 4799 }
4699 4800
4700 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 4801 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
4701 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4802 if(SiS_CRT2IsLCD(SiS_Pr)) {
4702 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFB,0x00); 4803 SiS_SetRegSR11ANDOR(SiS_Pr,0xFB,0x00);
4703 SiS_PanelDelay(SiS_Pr, HwInfo, 0); 4804 SiS_PanelDelay(SiS_Pr, 0);
4704 } 4805 }
4705 } 4806 }
4706 4807
4707 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 4808 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
4708 SiS_UnLockCRT2(SiS_Pr,HwInfo); 4809 SiS_UnLockCRT2(SiS_Pr);
4709 4810
4710 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7); 4811 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0xf7);
4711 4812
4712 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 4813 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
4713 temp = SiS_GetCH701x(SiS_Pr,0x66); 4814 temp = SiS_GetCH701x(SiS_Pr,0x66);
4714 temp &= 0x20; 4815 temp &= 0x20;
4715 SiS_Chrontel701xBLOff(SiS_Pr); 4816 SiS_Chrontel701xBLOff(SiS_Pr);
4716 } 4817 }
4717 4818
4718 if(HwInfo->jChipType != SIS_550) { 4819 if(SiS_Pr->ChipType != SIS_550) {
4719 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f); 4820 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2e,0x7f);
4720 } 4821 }
4721 4822
4722 if(HwInfo->jChipType == SIS_740) { 4823 if(SiS_Pr->ChipType == SIS_740) {
4723 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 4824 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
4724 if(SiS_IsLCDOrLCDA(SiS_Pr, HwInfo)) { 4825 if(SiS_IsLCDOrLCDA(SiS_Pr)) {
4725 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); 4826 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
4726 } 4827 }
4727 } 4828 }
4728 } 4829 }
4729 4830
4730 temp1 = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x2E); 4831 temp1 = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x2E);
4731 if(!(temp1 & 0x80)) { 4832 if(!(temp1 & 0x80)) {
4732 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80); 4833 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2E,0x80);
4733 } 4834 }
4734 4835
4735 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 4836 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
4736 if(temp) { 4837 if(temp) {
4737 SiS_Chrontel701xBLOn(SiS_Pr, HwInfo); 4838 SiS_Chrontel701xBLOn(SiS_Pr);
4738 } 4839 }
4739 } 4840 }
4740 4841
4741 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 4842 if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
4742 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4843 if(SiS_CRT2IsLCD(SiS_Pr)) {
4743 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); 4844 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
4744 if(HwInfo->jChipType == SIS_550) { 4845 if(SiS_Pr->ChipType == SIS_550) {
4745 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x40); 4846 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x40);
4746 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x10); 4847 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x10);
4747 } 4848 }
4748 } 4849 }
4749 } else if(SiS_IsVAMode(SiS_Pr,HwInfo)) { 4850 } else if(SiS_IsVAMode(SiS_Pr)) {
4750 if(HwInfo->jChipType != SIS_740) { 4851 if(SiS_Pr->ChipType != SIS_740) {
4751 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20); 4852 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1E,0x20);
4752 } 4853 }
4753 } 4854 }
4754 4855
4755 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo))) { 4856 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4756 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f); 4857 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x00,0x7f);
4757 } 4858 }
4758 4859
4759 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 4860 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
4760 if(SiS_IsTVOrYPbPrOrScart(SiS_Pr,HwInfo)) { 4861 if(SiS_IsTVOrYPbPrOrScart(SiS_Pr)) {
4761 SiS_Chrontel701xOn(SiS_Pr,HwInfo); 4862 SiS_Chrontel701xOn(SiS_Pr);
4762 } 4863 }
4763 if( (SiS_IsVAMode(SiS_Pr,HwInfo)) || 4864 if( (SiS_IsVAMode(SiS_Pr)) ||
4764 (SiS_IsLCDOrLCDA(SiS_Pr,HwInfo)) ) { 4865 (SiS_IsLCDOrLCDA(SiS_Pr)) ) {
4765 SiS_ChrontelDoSomething1(SiS_Pr,HwInfo); 4866 SiS_ChrontelDoSomething1(SiS_Pr);
4766 } 4867 }
4767 } 4868 }
4768 4869
4769 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 4870 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
4770 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo))) { 4871 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4771 if( (SiS_IsVAMode(SiS_Pr,HwInfo)) || 4872 if( (SiS_IsVAMode(SiS_Pr)) ||
4772 (SiS_IsLCDOrLCDA(SiS_Pr,HwInfo)) ) { 4873 (SiS_IsLCDOrLCDA(SiS_Pr)) ) {
4773 SiS_Chrontel701xBLOn(SiS_Pr, HwInfo); 4874 SiS_Chrontel701xBLOn(SiS_Pr);
4774 SiS_ChrontelInitTVVSync(SiS_Pr,HwInfo); 4875 SiS_ChrontelInitTVVSync(SiS_Pr);
4775 } 4876 }
4776 } 4877 }
4777 } else if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) { 4878 } else if(SiS_Pr->SiS_IF_DEF_CH70xx == 0) {
4778 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo))) { 4879 if(!(SiS_WeHaveBacklightCtrl(SiS_Pr))) {
4779 if(SiS_CRT2IsLCD(SiS_Pr, HwInfo)) { 4880 if(SiS_CRT2IsLCD(SiS_Pr)) {
4780 SiS_PanelDelay(SiS_Pr, HwInfo, 1); 4881 SiS_PanelDelay(SiS_Pr, 1);
4781 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xF7,0x00); 4882 SiS_SetRegSR11ANDOR(SiS_Pr,0xF7,0x00);
4782 } 4883 }
4783 } 4884 }
4784 } 4885 }
@@ -4797,243 +4898,204 @@ SiS_EnableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
4797 4898
4798/* Set CRT2 OFFSET / PITCH */ 4899/* Set CRT2 OFFSET / PITCH */
4799static void 4900static void
4800SiS_SetCRT2Offset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 4901SiS_SetCRT2Offset(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
4801 USHORT RRTI, PSIS_HW_INFO HwInfo) 4902 unsigned short RRTI)
4802{ 4903{
4803 USHORT offset; 4904 unsigned short offset;
4804 UCHAR temp; 4905 unsigned char temp;
4805 4906
4806 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) return; 4907 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) return;
4807 4908
4808 offset = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,RRTI,HwInfo); 4909 offset = SiS_GetOffset(SiS_Pr,ModeNo,ModeIdIndex,RRTI);
4809 4910
4810 if((SiS_Pr->SiS_LCDResInfo == Panel_640x480_2) || 4911 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(offset & 0xFF));
4811 (SiS_Pr->SiS_LCDResInfo == Panel_640x480_3)) { 4912 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x09,(offset >> 8));
4812 offset >>= 1;
4813 }
4814 4913
4815 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,(offset & 0xFF)); 4914 temp = (unsigned char)(((offset >> 3) & 0xFF) + 1);
4816 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x09,(offset >> 8)); 4915 if(offset & 0x07) temp++;
4817 temp = (UCHAR)(((offset >> 3) & 0xFF) + 1); 4916 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x03,temp);
4818 if(offset % 8) temp++;
4819 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x03,temp);
4820} 4917}
4821 4918
4822/* Set CRT2 sync and PanelLink mode */ 4919/* Set CRT2 sync and PanelLink mode */
4823static void 4920static void
4824SiS_SetCRT2Sync(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT RefreshRateTableIndex, 4921SiS_SetCRT2Sync(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short RefreshRateTableIndex)
4825 PSIS_HW_INFO HwInfo)
4826{ 4922{
4827 USHORT tempah=0,tempbl,infoflag; 4923 unsigned short tempah=0, tempbl, infoflag;
4828 4924
4829 tempbl = 0xC0; 4925 tempbl = 0xC0;
4830 4926
4831 if(SiS_Pr->UseCustomMode) { 4927 if(SiS_Pr->UseCustomMode) {
4832 infoflag = SiS_Pr->CInfoFlag; 4928 infoflag = SiS_Pr->CInfoFlag;
4833 } else { 4929 } else {
4834 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag; 4930 infoflag = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_InfoFlag;
4835 } 4931 }
4836 4932
4837 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* LVDS */ 4933 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { /* LVDS */
4838 4934
4839 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 4935 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
4840 tempah = 0; 4936 tempah = 0;
4841 } else if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDInfo & LCDSync)) { 4937 } else if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (SiS_Pr->SiS_LCDInfo & LCDSync)) {
4842 tempah = SiS_Pr->SiS_LCDInfo; 4938 tempah = SiS_Pr->SiS_LCDInfo;
4843 } else tempah = infoflag >> 8; 4939 } else tempah = infoflag >> 8;
4844 tempah &= 0xC0; 4940 tempah &= 0xC0;
4845 tempah |= 0x20; 4941 tempah |= 0x20;
4846 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; 4942 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
4847 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 4943 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
4848 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || 4944 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) ||
4849 (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) { 4945 (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) {
4850 tempah |= 0xf0; 4946 tempah |= 0xf0;
4851 } 4947 }
4852 if( (SiS_Pr->SiS_IF_DEF_FSTN) || 4948 if( (SiS_Pr->SiS_IF_DEF_FSTN) ||
4853 (SiS_Pr->SiS_IF_DEF_DSTN) || 4949 (SiS_Pr->SiS_IF_DEF_DSTN) ||
4854 (SiS_Pr->SiS_IF_DEF_TRUMPION) || 4950 (SiS_Pr->SiS_IF_DEF_TRUMPION) ||
4855 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ) { 4951 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ||
4856 tempah |= 0x30; 4952 (SiS_Pr->SiS_CustomT == CUT_PANEL856) ) {
4857 } 4953 tempah |= 0x30;
4858 } 4954 }
4859 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 4955 if( (SiS_Pr->SiS_IF_DEF_FSTN) ||
4860 if(HwInfo->jChipType >= SIS_315H) { 4956 (SiS_Pr->SiS_IF_DEF_DSTN) ) {
4861 tempah >>= 3; 4957 tempah &= ~0xc0;
4862 tempah &= 0x18; 4958 }
4863 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xE7,tempah); 4959 }
4864 /* Don't care about 12/18/24 bit mode - TV is via VGA, not PL */ 4960 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
4865 } else { 4961 if(SiS_Pr->ChipType >= SIS_315H) {
4866 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,0xe0); 4962 tempah >>= 3;
4867 } 4963 tempah &= 0x18;
4868 } else { 4964 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xE7,tempah);
4869 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); 4965 /* Don't care about 12/18/24 bit mode - TV is via VGA, not PL */
4870 } 4966 } else {
4967 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,0xe0);
4968 }
4969 } else {
4970 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
4971 }
4871 4972
4872 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { 4973 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
4873 4974
4874 if(HwInfo->jChipType < SIS_315H) { 4975 if(SiS_Pr->ChipType < SIS_315H) {
4875 4976
4876#ifdef SIS300 /* ---- 300 series --- */ 4977#ifdef SIS300 /* ---- 300 series --- */
4877 4978
4878 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { /* 630 - 301B(-DH) */ 4979 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) { /* 630 - 301B(-DH) */
4879 4980
4880 tempah = infoflag >> 8; 4981 tempah = infoflag >> 8;
4881 tempbl = 0; 4982 tempbl = 0;
4882 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 4983 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
4883 if(SiS_Pr->SiS_LCDInfo & LCDSync) { 4984 if(SiS_Pr->SiS_LCDInfo & LCDSync) {
4884 tempah = SiS_Pr->SiS_LCDInfo; 4985 tempah = SiS_Pr->SiS_LCDInfo;
4885 tempbl = (tempah >> 6) & 0x03; 4986 tempbl = (tempah >> 6) & 0x03;
4886 } 4987 }
4887 } 4988 }
4888 tempah &= 0xC0; 4989 tempah &= 0xC0;
4889 tempah |= 0x20; 4990 tempah |= 0x20;
4890 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; 4991 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
4891 tempah |= 0xc0; 4992 tempah |= 0xc0;
4892 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); 4993 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
4893 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) { 4994 if((SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) && (!(SiS_Pr->SiS_VBType & VB_NoLCD))) {
4894 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xf0,tempbl); 4995 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xf0,tempbl);
4895 } 4996 }
4896 4997
4897 } else { /* 630 - 301 */ 4998 } else { /* 630 - 301 */
4898 4999
4899 tempah = infoflag >> 8; 5000 tempah = ((infoflag >> 8) & 0xc0) | 0x20;
4900 tempah &= 0xC0; 5001 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
4901 tempah |= 0x20; 5002 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
4902 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
4903 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
4904 5003
4905 } 5004 }
4906 5005
4907#endif /* SIS300 */ 5006#endif /* SIS300 */
4908 5007
4909 } else { 5008 } else {
4910 5009
4911#ifdef SIS315H /* ------- 315 series ------ */ 5010#ifdef SIS315H /* ------- 315 series ------ */
4912 5011
4913 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { /* 315 - LVDS */ 5012 if(SiS_Pr->SiS_VBType & VB_SISLVDS) { /* 315 - LVDS */
4914 5013
4915 tempbl = 0; 5014 tempbl = 0;
4916 if((SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) && 5015 if((SiS_Pr->SiS_CustomT == CUT_COMPAQ1280) &&
4917 (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)) { 5016 (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)) {
4918 tempah = infoflag >> 8; 5017 tempah = infoflag >> 8;
4919 if(SiS_Pr->SiS_LCDInfo & LCDSync) { 5018 if(SiS_Pr->SiS_LCDInfo & LCDSync) {
4920 tempbl = ((SiS_Pr->SiS_LCDInfo & 0xc0) >> 6); 5019 tempbl = ((SiS_Pr->SiS_LCDInfo & 0xc0) >> 6);
4921 } 5020 }
4922 } else if((SiS_Pr->SiS_CustomT == CUT_CLEVO1400) && 5021 } else if((SiS_Pr->SiS_CustomT == CUT_CLEVO1400) &&
4923 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050)) { 5022 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050)) {
4924 tempah = infoflag >> 8; 5023 tempah = infoflag >> 8;
4925 tempbl = 0x03; 5024 tempbl = 0x03;
4926 } else { 5025 } else {
4927 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37); 5026 tempah = SiS_GetReg(SiS_Pr->SiS_P3d4,0x37);
4928 tempbl = (tempah >> 6) & 0x03; 5027 tempbl = (tempah >> 6) & 0x03;
4929 tempbl |= 0x08; 5028 tempbl |= 0x08;
4930 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempbl |= 0x04; 5029 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempbl |= 0x04;
4931 } 5030 }
4932 tempah &= 0xC0; 5031 tempah &= 0xC0;
4933 tempah |= 0x20; 5032 tempah |= 0x20;
4934 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; 5033 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
4935 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) tempah |= 0xc0; 5034 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) tempah |= 0xc0;
4936 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); 5035 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
4937 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 5036 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
4938 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 5037 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
4939 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xf0,tempbl); 5038 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xf0,tempbl);
4940 } 5039 }
4941 } 5040 }
4942 5041
4943 } else { /* 315 - TMDS */ 5042 } else { /* 315 - TMDS */
4944 5043
4945 tempah = tempbl = infoflag >> 8; 5044 tempah = tempbl = infoflag >> 8;
4946 if(!SiS_Pr->UseCustomMode) { 5045 if(!SiS_Pr->UseCustomMode) {
4947 tempbl = 0; 5046 tempbl = 0;
4948 if((SiS_Pr->SiS_VBType & VB_SIS301C) && (SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) { 5047 if((SiS_Pr->SiS_VBType & VB_SIS30xC) && (SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
4949 if(ModeNo <= 0x13) { 5048 if(ModeNo <= 0x13) {
4950 tempah = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)); 5049 tempah = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02));
4951 } 5050 }
4952 } 5051 }
4953 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5052 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
4954 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { 5053 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
4955 if(SiS_Pr->SiS_LCDInfo & LCDSync) { 5054 if(SiS_Pr->SiS_LCDInfo & LCDSync) {
4956 tempah = SiS_Pr->SiS_LCDInfo; 5055 tempah = SiS_Pr->SiS_LCDInfo;
4957 tempbl = (tempah >> 6) & 0x03; 5056 tempbl = (tempah >> 6) & 0x03;
4958 } 5057 }
4959 } 5058 }
4960 } 5059 }
4961 } 5060 }
4962 tempah &= 0xC0; 5061 tempah &= 0xC0;
4963 tempah |= 0x20; 5062 tempah |= 0x20;
4964 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10; 5063 if(!(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit)) tempah |= 0x10;
4965 if(SiS_Pr->SiS_VBType & VB_NoLCD) { 5064 if(SiS_Pr->SiS_VBType & VB_NoLCD) {
4966 /* Imitate BIOS bug */ 5065 /* Imitate BIOS bug */
4967 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) tempah |= 0xc0; 5066 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) tempah |= 0xc0;
4968 } 5067 }
4969 if((SiS_Pr->SiS_VBType & VB_SIS301C) && (SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) { 5068 if((SiS_Pr->SiS_VBType & VB_SIS30xC) && (SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC)) {
4970 tempah >>= 3; 5069 tempah >>= 3;
4971 tempah &= 0x18; 5070 tempah &= 0x18;
4972 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xe7,tempah); 5071 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,0xe7,tempah);
4973 } else { 5072 } else {
4974 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah); 5073 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x19,0x0F,tempah);
4975 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 5074 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
4976 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 5075 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
4977 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xf0,tempbl); 5076 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1a,0xf0,tempbl);
4978 } 5077 }
4979 } 5078 }
4980 } 5079 }
4981 5080
4982 } 5081 }
4983#endif /* SIS315H */ 5082#endif /* SIS315H */
4984 } 5083 }
4985 } 5084 }
4986} 5085}
4987 5086
4988/* Set CRT2 FIFO on 300/630/730 */ 5087/* Set CRT2 FIFO on 300/540/630/730 */
4989#ifdef SIS300 5088#ifdef SIS300
4990static void 5089static void
4991SiS_SetCRT2FIFO_300(SiS_Private *SiS_Pr,USHORT ModeNo, 5090SiS_SetCRT2FIFO_300(struct SiS_Private *SiS_Pr,unsigned short ModeNo)
4992 PSIS_HW_INFO HwInfo) 5091{
4993{ 5092 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
4994 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 5093 unsigned short temp, index, modeidindex, refreshratetableindex;
4995 USHORT temp,index; 5094 unsigned short VCLK = 0, MCLK, colorth = 0, data2 = 0;
4996 USHORT modeidindex,refreshratetableindex; 5095 unsigned short tempbx, tempcl, CRT1ModeNo, CRT2ModeNo, SelectRate_backup;
4997 USHORT VCLK=0,MCLK,colorth=0,data2=0; 5096 unsigned int data, pci50, pciA0;
4998 USHORT tempal, tempah, tempbx, tempcl, tempax; 5097 static const unsigned char colortharray[] = {
4999 USHORT CRT1ModeNo,CRT2ModeNo; 5098 1, 1, 2, 2, 3, 4
5000 USHORT SelectRate_backup;
5001 ULONG data,eax;
5002 const UCHAR LatencyFactor[] = {
5003 97, 88, 86, 79, 77, 00, /*; 64 bit BQ=2 */
5004 00, 87, 85, 78, 76, 54, /*; 64 bit BQ=1 */
5005 97, 88, 86, 79, 77, 00, /*; 128 bit BQ=2 */
5006 00, 79, 77, 70, 68, 48, /*; 128 bit BQ=1 */
5007 80, 72, 69, 63, 61, 00, /*; 64 bit BQ=2 */
5008 00, 70, 68, 61, 59, 37, /*; 64 bit BQ=1 */
5009 86, 77, 75, 68, 66, 00, /*; 128 bit BQ=2 */
5010 00, 68, 66, 59, 57, 37 /*; 128 bit BQ=1 */
5011 };
5012 const UCHAR LatencyFactor730[] = {
5013 69, 63, 61,
5014 86, 79, 77,
5015 103, 96, 94,
5016 120,113,111,
5017 137,130,128, /* <-- last entry, data below */
5018 137,130,128, /* to avoid using illegal values */
5019 137,130,128,
5020 137,130,128,
5021 137,130,128,
5022 137,130,128,
5023 137,130,128,
5024 137,130,128,
5025 137,130,128,
5026 137,130,128,
5027 137,130,128,
5028 137,130,128,
5029 };
5030 const UCHAR ThLowB[] = {
5031 81, 4, 72, 6, 88, 8,120,12,
5032 55, 4, 54, 6, 66, 8, 90,12,
5033 42, 4, 45, 6, 55, 8, 75,12
5034 };
5035 const UCHAR ThTiming[] = {
5036 1, 2, 2, 3, 0, 1, 1, 2
5037 }; 5099 };
5038 5100
5039 SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate; 5101 SelectRate_backup = SiS_Pr->SiS_SelectCRT2Rate;
@@ -5044,232 +5106,159 @@ SiS_SetCRT2FIFO_300(SiS_Private *SiS_Pr,USHORT ModeNo,
5044 SiS_SearchModeID(SiS_Pr, &CRT1ModeNo, &modeidindex); 5106 SiS_SearchModeID(SiS_Pr, &CRT1ModeNo, &modeidindex);
5045 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); 5107 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
5046 SiS_Pr->SiS_SelectCRT2Rate = 0; 5108 SiS_Pr->SiS_SelectCRT2Rate = 0;
5047 refreshratetableindex = SiS_GetRatePtr(SiS_Pr, CRT1ModeNo, modeidindex, HwInfo); 5109 refreshratetableindex = SiS_GetRatePtr(SiS_Pr, CRT1ModeNo, modeidindex);
5048 5110
5049 if(CRT1ModeNo >= 0x13) { 5111 if(CRT1ModeNo >= 0x13) {
5050 index = SiS_Pr->SiS_RefIndex[refreshratetableindex].Ext_CRTVCLK; 5112 /* Get VCLK */
5051 index &= 0x3F; 5113 index = SiS_GetRefCRTVCLK(SiS_Pr, refreshratetableindex, SiS_Pr->SiS_UseWide);
5052 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */ 5114 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
5053 5115
5054 colorth = SiS_GetColorDepth(SiS_Pr,CRT1ModeNo,modeidindex); /* Get colordepth */ 5116 /* Get colordepth */
5055 colorth >>= 1; 5117 colorth = SiS_GetColorDepth(SiS_Pr,CRT1ModeNo,modeidindex) >> 1;
5056 if(!colorth) colorth++; 5118 if(!colorth) colorth++;
5057 } 5119 }
5058 5120
5059 } else { 5121 } else {
5060 5122
5061 CRT1ModeNo = 0xfe; 5123 CRT1ModeNo = 0xfe;
5062 VCLK = SiS_Pr->CSRClock_CRT1; /* Get VCLK */ 5124
5063 data2 = (SiS_Pr->CModeFlag_CRT1 & ModeTypeMask) - 2; 5125 /* Get VCLK */
5064 switch(data2) { /* Get color depth */ 5126 VCLK = SiS_Pr->CSRClock_CRT1;
5065 case 0 : colorth = 1; break; 5127
5066 case 1 : colorth = 1; break; 5128 /* Get color depth */
5067 case 2 : colorth = 2; break; 5129 colorth = colortharray[((SiS_Pr->CModeFlag_CRT1 & ModeTypeMask) - 2)];
5068 case 3 : colorth = 2; break;
5069 case 4 : colorth = 3; break;
5070 case 5 : colorth = 4; break;
5071 default: colorth = 2;
5072 }
5073 5130
5074 } 5131 }
5075 5132
5076 if(CRT1ModeNo >= 0x13) { 5133 if(CRT1ModeNo >= 0x13) {
5077 if(HwInfo->jChipType == SIS_300) { 5134 /* Get MCLK */
5078 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A); 5135 if(SiS_Pr->ChipType == SIS_300) {
5079 } else { 5136 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3A);
5080 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A); 5137 } else {
5081 } 5138 index = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1A);
5082 index &= 0x07; 5139 }
5083 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK; /* Get MCLK */ 5140 index &= 0x07;
5141 MCLK = SiS_Pr->SiS_MCLKData_0[index].CLOCK;
5084 5142
5085 data2 = (colorth * VCLK) / MCLK; 5143 temp = ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) >> 6) & 0x03) << 1;
5144 if(!temp) temp++;
5145 temp <<= 2;
5086 5146
5087 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14); 5147 data2 = temp - ((colorth * VCLK) / MCLK);
5088 temp = ((temp & 0x00FF) >> 6) << 1;
5089 if(temp == 0) temp = 1;
5090 temp <<= 2;
5091 temp &= 0xff;
5092 5148
5093 data2 = temp - data2; 5149 temp = (28 * 16) % data2;
5150 data2 = (28 * 16) / data2;
5151 if(temp) data2++;
5094 5152
5095 if((28 * 16) % data2) { 5153 if(SiS_Pr->ChipType == SIS_300) {
5096 data2 = (28 * 16) / data2;
5097 data2++;
5098 } else {
5099 data2 = (28 * 16) / data2;
5100 }
5101 5154
5102 if(HwInfo->jChipType == SIS_300) { 5155 SiS_GetFIFOThresholdIndex300(SiS_Pr, &tempbx, &tempcl);
5103 5156 data = SiS_GetFIFOThresholdB300(tempbx, tempcl);
5104 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x18); 5157
5105 tempah &= 0x62; 5158 } else {
5106 tempah >>= 1; 5159
5107 tempal = tempah; 5160#ifdef SIS_LINUX_KERNEL
5108 tempah >>= 3; 5161 pci50 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0x50);
5109 tempal |= tempah; 5162 pciA0 = sisfb_read_nbridge_pci_dword(SiS_Pr, 0xa0);
5110 tempal &= 0x07;
5111 tempcl = ThTiming[tempal];
5112 tempbx = SiS_GetReg(SiS_Pr->SiS_P3c4,0x16);
5113 tempbx >>= 6;
5114 tempah = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
5115 tempah >>= 4;
5116 tempah &= 0x0c;
5117 tempbx |= tempah;
5118 tempbx <<= 1;
5119 tempal = ThLowB[tempbx + 1];
5120 tempal *= tempcl;
5121 tempal += ThLowB[tempbx];
5122 data = tempal;
5123
5124 } else if(HwInfo->jChipType == SIS_730) {
5125
5126#ifdef LINUX_KERNEL
5127 SiS_SetRegLong(0xcf8,0x80000050);
5128 eax = SiS_GetRegLong(0xcfc);
5129#else 5163#else
5130 eax = pciReadLong(0x00000000, 0x50); 5164 pci50 = pciReadLong(0x00000000, 0x50);
5165 pciA0 = pciReadLong(0x00000000, 0xA0);
5131#endif 5166#endif
5132 tempal = (USHORT)(eax >> 8);
5133 tempal &= 0x06;
5134 tempal <<= 5;
5135 5167
5136#ifdef LINUX_KERNEL 5168 if(SiS_Pr->ChipType == SIS_730) {
5137 SiS_SetRegLong(0xcf8,0x800000A0);
5138 eax = SiS_GetRegLong(0xcfc);
5139#else
5140 eax = pciReadLong(0x00000000, 0xA0);
5141#endif
5142 temp = (USHORT)(eax >> 28);
5143 temp &= 0x0F;
5144 tempal |= temp;
5145
5146 tempbx = tempal; /* BIOS BUG (2.04.5d, 2.04.6a use ah here, which is unset!) */
5147 tempbx = 0; /* -- do it like the BIOS anyway... */
5148 tempax = tempbx;
5149 tempbx &= 0xc0;
5150 tempbx >>= 6;
5151 tempax &= 0x0f;
5152 tempax *= 3;
5153 tempbx += tempax;
5154
5155 data = LatencyFactor730[tempbx];
5156 data += 15;
5157 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
5158 if(!(temp & 0x80)) data += 5;
5159 5169
5160 } else { 5170 index = (unsigned short)(((pciA0 >> 28) & 0x0f) * 3);
5171 index += (unsigned short)(((pci50 >> 9)) & 0x03);
5161 5172
5162 index = 0; 5173 /* BIOS BUG (2.04.5d, 2.04.6a use ah here, which is unset!) */
5163 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14); 5174 index = 0; /* -- do it like the BIOS anyway... */
5164 if(temp & 0x0080) index += 12;
5165 5175
5166#ifdef LINUX_KERNEL 5176 } else {
5167 SiS_SetRegLong(0xcf8,0x800000A0);
5168 eax = SiS_GetRegLong(0xcfc);
5169#else
5170 /* We use pci functions X offers. We use tag 0, because
5171 * we want to read/write to the host bridge (which is always
5172 * 00:00.0 on 630, 730 and 540), not the VGA device.
5173 */
5174 eax = pciReadLong(0x00000000, 0xA0);
5175#endif
5176 temp = (USHORT)(eax >> 24);
5177 if(!(temp&0x01)) index += 24;
5178
5179#ifdef LINUX_KERNEL
5180 SiS_SetRegLong(0xcf8,0x80000050);
5181 eax = SiS_GetRegLong(0xcfc);
5182#else
5183 eax = pciReadLong(0x00000000, 0x50);
5184#endif
5185 temp=(USHORT)(eax >> 24);
5186 if(temp & 0x01) index += 6;
5187 5177
5188 temp = (temp & 0x0F) >> 1; 5178 pci50 >>= 24;
5189 index += temp; 5179 pciA0 >>= 24;
5190 5180
5191 data = LatencyFactor[index]; 5181 index = (pci50 >> 1) & 0x07;
5192 data += 15;
5193 temp = SiS_GetReg(SiS_Pr->SiS_P3c4,0x14);
5194 if(!(temp & 0x80)) data += 5;
5195 }
5196 5182
5197 data += data2; /* CRT1 Request Period */ 5183 if(pci50 & 0x01) index += 6;
5184 if(!(pciA0 & 0x01)) index += 24;
5198 5185
5199 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 5186 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80) index += 12;
5200 SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup;
5201 5187
5202 if(!SiS_Pr->UseCustomMode) { 5188 }
5203 5189
5204 CRT2ModeNo = ModeNo; 5190 data = SiS_GetLatencyFactor630(SiS_Pr, index) + 15;
5205 SiS_SearchModeID(SiS_Pr, &CRT2ModeNo, &modeidindex); 5191 if(!(SiS_GetReg(SiS_Pr->SiS_P3c4,0x14) & 0x80)) data += 5;
5206 5192
5207 refreshratetableindex = SiS_GetRatePtr(SiS_Pr, CRT2ModeNo, modeidindex, HwInfo); 5193 }
5208 5194
5209 index = SiS_GetVCLK2Ptr(SiS_Pr,CRT2ModeNo,modeidindex, 5195 data += data2; /* CRT1 Request Period */
5210 refreshratetableindex,HwInfo);
5211 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK; /* Get VCLK */
5212 5196
5213 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) { 5197 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
5214 if(SiS_Pr->SiS_UseROM) { 5198 SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup;
5215 if(ROMAddr[0x220] & 0x01) {
5216 VCLK = ROMAddr[0x229] | (ROMAddr[0x22a] << 8);
5217 }
5218 }
5219 }
5220 5199
5221 } else { 5200 if(!SiS_Pr->UseCustomMode) {
5222 5201
5223 CRT2ModeNo = 0xfe; 5202 CRT2ModeNo = ModeNo;
5224 VCLK = SiS_Pr->CSRClock; /* Get VCLK */ 5203 SiS_SearchModeID(SiS_Pr, &CRT2ModeNo, &modeidindex);
5225 5204
5226 } 5205 refreshratetableindex = SiS_GetRatePtr(SiS_Pr, CRT2ModeNo, modeidindex);
5227 5206
5228 colorth = SiS_GetColorDepth(SiS_Pr,CRT2ModeNo,modeidindex); /* Get colordepth */ 5207 /* Get VCLK */
5229 colorth >>= 1; 5208 index = SiS_GetVCLK2Ptr(SiS_Pr, CRT2ModeNo, modeidindex, refreshratetableindex);
5230 if(!colorth) colorth++; 5209 VCLK = SiS_Pr->SiS_VCLKData[index].CLOCK;
5231 5210
5232 data = data * VCLK * colorth; 5211 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) {
5233 if(data % (MCLK << 4)) { 5212 if(SiS_Pr->SiS_UseROM) {
5234 data = data / (MCLK << 4); 5213 if(ROMAddr[0x220] & 0x01) {
5235 data++; 5214 VCLK = ROMAddr[0x229] | (ROMAddr[0x22a] << 8);
5236 } else { 5215 }
5237 data = data / (MCLK << 4); 5216 }
5238 } 5217 }
5239 5218
5240 if(data <= 6) data = 6; 5219 } else {
5241 if(data > 0x14) data = 0x14;
5242 5220
5243 temp = SiS_GetReg(SiS_Pr->SiS_Part1Port,0x01); 5221 /* Get VCLK */
5244 if(HwInfo->jChipType == SIS_300) { 5222 CRT2ModeNo = 0xfe;
5245 if(data <= 0x0f) temp = (temp & (~0x1F)) | 0x13; 5223 VCLK = SiS_Pr->CSRClock;
5246 else temp = (temp & (~0x1F)) | 0x16;
5247 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) {
5248 temp = (temp & (~0x1F)) | 0x13;
5249 }
5250 } else {
5251 if( ( (HwInfo->jChipType == SIS_630) ||
5252 (HwInfo->jChipType == SIS_730) ) &&
5253 (HwInfo->jChipRevision >= 0x30) ) /* 630s or 730(s?) */
5254 {
5255 temp = (temp & (~0x1F)) | 0x1b;
5256 } else {
5257 temp = (temp & (~0x1F)) | 0x16;
5258 }
5259 }
5260 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0xe0,temp);
5261 5224
5262 if( (HwInfo->jChipType == SIS_630) && 5225 }
5263 (HwInfo->jChipRevision >= 0x30) ) /* 630s, NOT 730 */ 5226
5264 { 5227 /* Get colordepth */
5265 if(data > 0x13) data = 0x13; 5228 colorth = SiS_GetColorDepth(SiS_Pr,CRT2ModeNo,modeidindex) >> 1;
5266 } 5229 if(!colorth) colorth++;
5267 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,0xe0,data); 5230
5231 data = data * VCLK * colorth;
5232 temp = data % (MCLK << 4);
5233 data = data / (MCLK << 4);
5234 if(temp) data++;
5235
5236 if(data < 6) data = 6;
5237 else if(data > 0x14) data = 0x14;
5238
5239 if(SiS_Pr->ChipType == SIS_300) {
5240 temp = 0x16;
5241 if((data <= 0x0f) || (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024))
5242 temp = 0x13;
5243 } else {
5244 temp = 0x16;
5245 if(( (SiS_Pr->ChipType == SIS_630) ||
5246 (SiS_Pr->ChipType == SIS_730) ) &&
5247 (SiS_Pr->ChipRevision >= 0x30))
5248 temp = 0x1b;
5249 }
5250 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x01,0xe0,temp);
5251
5252 if((SiS_Pr->ChipType == SIS_630) &&
5253 (SiS_Pr->ChipRevision >= 0x30)) {
5254 if(data > 0x13) data = 0x13;
5255 }
5256 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x02,0xe0,data);
5268 5257
5269 } else { /* If mode <= 0x13, we just restore everything */ 5258 } else { /* If mode <= 0x13, we just restore everything */
5270 5259
5271 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 5260 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
5272 SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup; 5261 SiS_Pr->SiS_SelectCRT2Rate = SelectRate_backup;
5273 5262
5274 } 5263 }
5275} 5264}
@@ -5278,10 +5267,10 @@ SiS_SetCRT2FIFO_300(SiS_Private *SiS_Pr,USHORT ModeNo,
5278/* Set CRT2 FIFO on 315/330 series */ 5267/* Set CRT2 FIFO on 315/330 series */
5279#ifdef SIS315H 5268#ifdef SIS315H
5280static void 5269static void
5281SiS_SetCRT2FIFO_310(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 5270SiS_SetCRT2FIFO_310(struct SiS_Private *SiS_Pr)
5282{ 5271{
5283 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x01,0x3B); 5272 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x01,0x3B);
5284 if( (HwInfo->jChipType == SIS_760) && 5273 if( (SiS_Pr->ChipType == SIS_760) &&
5285 (SiS_Pr->SiS_SysFlags & SF_760LFB) && 5274 (SiS_Pr->SiS_SysFlags & SF_760LFB) &&
5286 (SiS_Pr->SiS_ModeType == Mode32Bpp) && 5275 (SiS_Pr->SiS_ModeType == Mode32Bpp) &&
5287 (SiS_Pr->SiS_VGAHDE >= 1280) && 5276 (SiS_Pr->SiS_VGAHDE >= 1280) &&
@@ -5299,337 +5288,162 @@ SiS_SetCRT2FIFO_310(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
5299} 5288}
5300#endif 5289#endif
5301 5290
5302static USHORT 5291static unsigned short
5303SiS_GetVGAHT2(SiS_Private *SiS_Pr) 5292SiS_GetVGAHT2(struct SiS_Private *SiS_Pr)
5304{ 5293{
5305 ULONG tempax,tempbx; 5294 unsigned int tempax,tempbx;
5306 5295
5307 tempbx = (SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) * SiS_Pr->SiS_RVBHCMAX; 5296 tempbx = (SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) * SiS_Pr->SiS_RVBHCMAX;
5308 tempax = (SiS_Pr->SiS_VT - SiS_Pr->SiS_VDE) * SiS_Pr->SiS_RVBHCFACT; 5297 tempax = (SiS_Pr->SiS_VT - SiS_Pr->SiS_VDE) * SiS_Pr->SiS_RVBHCFACT;
5309 tempax = (tempax * SiS_Pr->SiS_HT) / tempbx; 5298 tempax = (tempax * SiS_Pr->SiS_HT) / tempbx;
5310 return((USHORT)tempax); 5299 return (unsigned short)tempax;
5311} 5300}
5312 5301
5313/* Set Part 1 / SiS bridge slave mode */ 5302/* Set Part 1 / SiS bridge slave mode */
5314static void 5303static void
5315SiS_SetGroup1_301(SiS_Private *SiS_Pr, USHORT ModeNo,USHORT ModeIdIndex, 5304SiS_SetGroup1_301(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex,
5316 PSIS_HW_INFO HwInfo,USHORT RefreshRateTableIndex) 5305 unsigned short RefreshRateTableIndex)
5317{ 5306{
5318 USHORT push1,push2; 5307 unsigned short temp, modeflag, i, j, xres=0, VGAVDE;
5319 USHORT tempax,tempbx,tempcx,temp; 5308 static const unsigned short CRTranslation[] = {
5320 USHORT resinfo,modeflag,xres=0; 5309 /* CR0 CR1 CR2 CR3 CR4 CR5 CR6 CR7 */
5321 unsigned char p1_7, p1_8; 5310 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0a,
5311 /* CR8 CR9 SR0A SR0B SR0C SR0D SR0E CR0F */
5312 0x00, 0x0b, 0x17, 0x18, 0x19, 0x00, 0x1a, 0x00,
5313 /* CR10 CR11 CR12 CR13 CR14 CR15 CR16 CR17 */
5314 0x0c, 0x0d, 0x0e, 0x00, 0x0f, 0x10, 0x11, 0x00
5315 };
5322 5316
5323 if(ModeNo <= 0x13) { 5317 if(ModeNo <= 0x13) {
5324 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 5318 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
5325 resinfo = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ResInfo;
5326 } else if(SiS_Pr->UseCustomMode) { 5319 } else if(SiS_Pr->UseCustomMode) {
5327 modeflag = SiS_Pr->CModeFlag; 5320 modeflag = SiS_Pr->CModeFlag;
5328 resinfo = 0;
5329 xres = SiS_Pr->CHDisplay; 5321 xres = SiS_Pr->CHDisplay;
5330 } else { 5322 } else {
5331 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 5323 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
5332 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
5333 xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes; 5324 xres = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].XRes;
5334 } 5325 }
5335 5326
5336 /* The following is only done if bridge is in slave mode: */ 5327 /* The following is only done if bridge is in slave mode: */
5337 5328
5338 if((HwInfo->jChipType >= SIS_661) && (ModeNo > 0x13)) { 5329 if(SiS_Pr->ChipType >= SIS_315H) {
5339 if(xres >= 1600) { 5330 if(xres >= 1600) { /* BIOS: == 1600 */
5340 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x31,0x04); 5331 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x31,0x04);
5341 } 5332 }
5342 } 5333 }
5343 5334
5344 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x03,0xff); /* set MAX HT */ 5335 SiS_Pr->CHTotal = 8224; /* Max HT, 0x2020, results in 0x3ff in registers */
5345
5346 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) modeflag |= Charx8Dot;
5347 5336
5348 if(modeflag & Charx8Dot) tempcx = 0x08; 5337 SiS_Pr->CHDisplay = SiS_Pr->SiS_VGAHDE;
5349 else tempcx = 0x09; 5338 if(modeflag & HalfDCLK) SiS_Pr->CHDisplay >>= 1;
5350
5351 tempax = SiS_Pr->SiS_VGAHDE; /* 0x04 Horizontal Display End */
5352 if(modeflag & HalfDCLK) tempax >>= 1;
5353 tempax = ((tempax / tempcx) - 1) & 0xff;
5354 tempbx = tempax;
5355
5356 temp = tempax;
5357 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x04,temp);
5358 5339
5340 SiS_Pr->CHBlankStart = SiS_Pr->CHDisplay;
5359 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 5341 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
5360 if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) { 5342 SiS_Pr->CHBlankStart += 16;
5361 temp += 2;
5362 }
5363 }
5364 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
5365 if(resinfo == SIS_RI_800x600) temp -= 2;
5366 }
5367 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x05,temp); /* 0x05 Horizontal Display Start */
5368
5369 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x06,0x03); /* 0x06 Horizontal Blank end */
5370
5371 tempax = 0xFFFF;
5372 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempax = SiS_GetVGAHT2(SiS_Pr);
5373 if(tempax >= SiS_Pr->SiS_VGAHT) tempax = SiS_Pr->SiS_VGAHT;
5374 if(modeflag & HalfDCLK) tempax >>= 1;
5375 tempax = (tempax / tempcx) - 5;
5376 tempcx = tempax;
5377
5378 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
5379 temp = tempcx - 1;
5380 if(!(modeflag & HalfDCLK)) {
5381 temp -= 6;
5382 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
5383 temp -= 2;
5384 if(ModeNo > 0x13) temp -= 10;
5385 }
5386 }
5387 } else {
5388 tempcx = (tempcx + tempbx) >> 1;
5389 temp = (tempcx & 0x00FF) + 2;
5390 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
5391 temp--;
5392 if(!(modeflag & HalfDCLK)) {
5393 if((modeflag & Charx8Dot)) {
5394 temp += 4;
5395 if(SiS_Pr->SiS_VGAHDE >= 800) temp -= 6;
5396 if(HwInfo->jChipType >= SIS_315H) {
5397 if(SiS_Pr->SiS_VGAHDE == 800) temp += 2;
5398 }
5399 }
5400 }
5401 } else {
5402 if(!(modeflag & HalfDCLK)) {
5403 temp -= 4;
5404 if((SiS_Pr->SiS_LCDResInfo != Panel_1280x960) &&
5405 (SiS_Pr->SiS_LCDResInfo != Panel_1600x1200)) {
5406 if(SiS_Pr->SiS_VGAHDE >= 800) {
5407 temp -= 7;
5408 if(HwInfo->jChipType < SIS_315H) {
5409 if(SiS_Pr->SiS_ModeType == ModeEGA) {
5410 if(SiS_Pr->SiS_VGAVDE == 1024) {
5411 temp += 15;
5412 if(SiS_Pr->SiS_LCDResInfo != Panel_1280x1024)
5413 temp += 7;
5414 }
5415 }
5416 }
5417 if(SiS_Pr->SiS_LCDResInfo != Panel_1400x1050) {
5418 if(SiS_Pr->SiS_VGAHDE >= 1280) {
5419 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) temp += 28;
5420 }
5421 }
5422 }
5423 }
5424 }
5425 }
5426 } 5343 }
5427 5344
5428 p1_7 = temp; 5345 SiS_Pr->CHBlankEnd = 32;
5429 p1_8 = 0x00; 5346 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
5430 5347 if(xres == 1600) SiS_Pr->CHBlankEnd += 80;
5431 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
5432 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
5433 if(ModeNo <= 0x01) {
5434 p1_7 = 0x2a;
5435 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) p1_8 = 0x61;
5436 else p1_8 = 0x41;
5437 } else if(SiS_Pr->SiS_ModeType == ModeText) {
5438 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) p1_7 = 0x54;
5439 else p1_7 = 0x55;
5440 p1_8 = 0x00;
5441 } else if(ModeNo <= 0x13) {
5442 if(modeflag & HalfDCLK) {
5443 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) {
5444 p1_7 = 0x30;
5445 p1_8 = 0x03;
5446 } else {
5447 p1_7 = 0x2f;
5448 p1_8 = 0x02;
5449 }
5450 } else {
5451 p1_7 = 0x5b;
5452 p1_8 = 0x03;
5453 }
5454 } else if( ((HwInfo->jChipType >= SIS_315H) &&
5455 ((ModeNo == 0x50) || (ModeNo == 0x56) || (ModeNo == 0x53))) ||
5456 ((HwInfo->jChipType < SIS_315H) &&
5457 (resinfo == SIS_RI_320x200 || resinfo == SIS_RI_320x240)) ) {
5458 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) {
5459 p1_7 = 0x30,
5460 p1_8 = 0x03;
5461 } else {
5462 p1_7 = 0x2f;
5463 p1_8 = 0x03;
5464 }
5465 }
5466 }
5467 } 5348 }
5468 5349
5469 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 5350 temp = SiS_Pr->SiS_VGAHT - 96;
5470 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p|TVSetYPbPr750p)) { 5351 if(!(modeflag & HalfDCLK)) temp -= 32;
5471 p1_7 = 0x63; 5352 if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
5472 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) p1_7 = 0x55; 5353 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x04);
5473 } 5354 temp |= ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x0b) & 0xc0) << 2);
5474 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) { 5355 temp -= 3;
5475 if(!(modeflag & HalfDCLK)) { 5356 temp <<= 3;
5476 p1_7 = 0xb2; 5357 } else {
5477 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) { 5358 if(SiS_Pr->SiS_RVBHRS2) temp = SiS_Pr->SiS_RVBHRS2;
5478 p1_7 = 0xab;
5479 }
5480 }
5481 } else {
5482 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) {
5483 if(modeflag & HalfDCLK) p1_7 = 0x30;
5484 }
5485 }
5486 } 5359 }
5360 SiS_Pr->CHSyncStart = temp;
5487 5361
5488 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x07,p1_7); /* 0x07 Horizontal Retrace Start */ 5362 SiS_Pr->CHSyncEnd = 0xffe8; /* results in 0x2000 in registers */
5489 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x08,p1_8); /* 0x08 Horizontal Retrace End */
5490 5363
5491 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x18,0x03); /* 0x18 SR08 (FIFO Threshold?) */ 5364 SiS_Pr->CVTotal = 2049; /* Max VT, 0x0801, results in 0x7ff in registers */
5492 5365
5493 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x19,0xF0); 5366 VGAVDE = SiS_Pr->SiS_VGAVDE;
5367 if (VGAVDE == 357) VGAVDE = 350;
5368 else if(VGAVDE == 360) VGAVDE = 350;
5369 else if(VGAVDE == 375) VGAVDE = 350;
5370 else if(VGAVDE == 405) VGAVDE = 400;
5371 else if(VGAVDE == 420) VGAVDE = 400;
5372 else if(VGAVDE == 525) VGAVDE = 480;
5373 else if(VGAVDE == 1056) VGAVDE = 1024;
5374 SiS_Pr->CVDisplay = VGAVDE;
5494 5375
5495 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x09,0xFF); /* 0x09 Set Max VT */ 5376 SiS_Pr->CVBlankStart = SiS_Pr->CVDisplay;
5496 5377
5497 tempcx = 0x121; 5378 SiS_Pr->CVBlankEnd = 1;
5498 tempbx = SiS_Pr->SiS_VGAVDE; /* 0x0E Vertical Display End */ 5379 if(ModeNo == 0x3c) SiS_Pr->CVBlankEnd = 226;
5499 if (tempbx == 357) tempbx = 350;
5500 else if(tempbx == 360) tempbx = 350;
5501 else if(tempbx == 375) tempbx = 350;
5502 else if(tempbx == 405) tempbx = 400;
5503 else if(tempbx == 420) tempbx = 400;
5504 else if(tempbx == 525) tempbx = 480;
5505 push2 = tempbx;
5506 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
5507 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
5508 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
5509 if (tempbx == 350) tempbx += 5;
5510 else if(tempbx == 480) tempbx += 5;
5511 }
5512 }
5513 }
5514 tempbx -= 2;
5515 temp = tempbx & 0x00FF;
5516 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x10,temp); /* 0x10 vertical Blank Start */
5517
5518 tempbx = push2;
5519 tempbx--;
5520 temp = tempbx & 0x00FF;
5521#if 0
5522 /* Missing code from 630/301B 2.04.5a and 650/302LV 1.10.6s (calles int 2f) */
5523 if(xxx()) {
5524 if(temp == 0xdf) temp = 0xda;
5525 }
5526#endif
5527 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0E,temp);
5528
5529 temp = 0;
5530 if(modeflag & DoubleScanMode) temp |= 0x80;
5531 if(HwInfo->jChipType >= SIS_661) {
5532 if(tempbx & 0x0200) temp |= 0x20;
5533 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x0B,0x5F,temp);
5534 if(tempbx & 0x0100) tempcx |= 0x000a;
5535 if(tempbx & 0x0400) tempcx |= 0x1200;
5536 } else {
5537 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0B,temp);
5538 if(tempbx & 0x0100) tempcx |= 0x0002;
5539 if(tempbx & 0x0400) tempcx |= 0x0600;
5540 }
5541 5380
5542 if(tempbx & 0x0200) tempcx |= 0x0040; 5381 temp = (SiS_Pr->SiS_VGAVT - VGAVDE) >> 1;
5382 SiS_Pr->CVSyncStart = VGAVDE + temp;
5543 5383
5544 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x11,0x00); /* 0x11 Vertical Blank End */ 5384 temp >>= 3;
5385 SiS_Pr->CVSyncEnd = SiS_Pr->CVSyncStart + temp;
5545 5386
5546 tempax = (SiS_Pr->SiS_VGAVT - tempbx) >> 2; 5387 SiS_CalcCRRegisters(SiS_Pr, 0);
5388 SiS_Pr->CCRT1CRTC[16] &= ~0xE0;
5547 5389
5548 if((ModeNo > 0x13) || (HwInfo->jChipType < SIS_315H)) { 5390 for(i = 0; i <= 7; i++) {
5549 if(resinfo != SIS_RI_1280x1024) { 5391 SiS_SetReg(SiS_Pr->SiS_Part1Port,CRTranslation[i],SiS_Pr->CCRT1CRTC[i]);
5550 tempbx += (tempax << 1);
5551 }
5552 } else if(HwInfo->jChipType >= SIS_315H) {
5553 if(SiS_Pr->SiS_LCDResInfo != Panel_1400x1050) {
5554 tempbx += (tempax << 1);
5555 }
5556 } 5392 }
5557 5393 for(i = 0x10, j = 8; i <= 0x12; i++, j++) {
5558 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 5394 SiS_SetReg(SiS_Pr->SiS_Part1Port,CRTranslation[i],SiS_Pr->CCRT1CRTC[j]);
5559 tempbx -= 10;
5560 } else {
5561 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
5562 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
5563 tempbx += 40;
5564 if(HwInfo->jChipType >= SIS_315H) {
5565 if(SiS_Pr->SiS_VGAHDE == 800) tempbx += 10;
5566 }
5567 }
5568 }
5569 }
5570 tempax >>= 2;
5571 tempax++;
5572 tempax += tempbx;
5573 push1 = tempax;
5574 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
5575 if(tempbx <= 513) {
5576 if(tempax >= 513) tempbx = 513;
5577 }
5578 } 5395 }
5579 temp = tempbx & 0x00FF; 5396 for(i = 0x15, j = 11; i <= 0x16; i++, j++) {
5580 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0C,temp); /* 0x0C Vertical Retrace Start */ 5397 SiS_SetReg(SiS_Pr->SiS_Part1Port,CRTranslation[i],SiS_Pr->CCRT1CRTC[j]);
5581
5582 tempbx--;
5583 temp = tempbx & 0x00FF;
5584 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x10,temp);
5585
5586 if(tempbx & 0x0100) tempcx |= 0x0008;
5587
5588 if(tempbx & 0x0200) {
5589 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x0B,0x20);
5590 } 5398 }
5591 tempbx++; 5399 for(i = 0x0a, j = 13; i <= 0x0c; i++, j++) {
5592 5400 SiS_SetReg(SiS_Pr->SiS_Part1Port,CRTranslation[i],SiS_Pr->CCRT1CRTC[j]);
5593 if(tempbx & 0x0100) tempcx |= 0x0004;
5594 if(tempbx & 0x0200) tempcx |= 0x0080;
5595 if(tempbx & 0x0400) {
5596 if(HwInfo->jChipType >= SIS_661) tempcx |= 0x0800;
5597 else if(SiS_Pr->SiS_VBType & VB_SIS301) tempcx |= 0x0800;
5598 else tempcx |= 0x0C00;
5599 } 5401 }
5600 5402
5601 tempbx = push1; 5403 temp = SiS_Pr->CCRT1CRTC[16] & 0xE0;
5602 temp = tempbx & 0x000F; 5404 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,CRTranslation[0x0E],0x1F,temp);
5603 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0D,temp); /* 0x0D vertical Retrace End */
5604
5605 if(tempbx & 0x0010) tempcx |= 0x2000;
5606
5607 temp = tempcx & 0x00FF;
5608 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0A,temp); /* 0x0A CR07 */
5609
5610 temp = (tempcx & 0xFF00) >> 8;
5611 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x17,temp); /* 0x17 SR0A */
5612 5405
5613 tempax = modeflag; 5406 temp = (SiS_Pr->CCRT1CRTC[16] & 0x01) << 5;
5614 temp = (tempax & 0xFF00) >> 8; 5407 if(modeflag & DoubleScanMode) temp |= 0x80;
5615 temp = (temp >> 1) & 0x09; 5408 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,CRTranslation[0x09],0x5F,temp);
5616 if(!(SiS_Pr->SiS_VBType & VB_SIS301)) temp |= 0x01; /* Always 8 dotclock */
5617 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,temp); /* 0x16 SR01 */
5618 5409
5619 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0F,0x00); /* 0x0F CR14 */ 5410 temp = 0;
5411 temp |= (SiS_GetReg(SiS_Pr->SiS_P3c4,0x01) & 0x01);
5412 if(modeflag & HalfDCLK) temp |= 0x08;
5413 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x16,temp); /* SR01: HalfDCLK[3], 8/9 div dotclock[0] */
5620 5414
5621 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x12,0x00); /* 0x12 CR17 */ 5415 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0F,0x00); /* CR14: (text mode: underline location) */
5416 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x12,0x00); /* CR17: n/a */
5622 5417
5623 temp = 0x00; 5418 temp = 0;
5624 if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { 5419 if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
5625 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x01) { 5420 temp = (SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x01) << 7;
5626 temp = 0x80;
5627 }
5628 } 5421 }
5629 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1A,temp); /* 0x1A SR0E */ 5422 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1A,temp); /* SR0E, dither[7] */
5630 5423
5631 temp = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02)); 5424 temp = SiS_GetRegByte((SiS_Pr->SiS_P3ca+0x02));
5632 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1b,temp); 5425 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1b,temp); /* ? */
5426
5427#ifdef SIS_XORG_XF86
5428#ifdef TWDEBUG
5429 xf86DrvMsg(0, X_INFO, "%d %d %d %d %d %d %d %d (%d %d %d %d)\n",
5430 SiS_Pr->CHDisplay, SiS_Pr->CHSyncStart, SiS_Pr->CHSyncEnd, SiS_Pr->CHTotal,
5431 SiS_Pr->CVDisplay, SiS_Pr->CVSyncStart, SiS_Pr->CVSyncEnd, SiS_Pr->CVTotal,
5432 SiS_Pr->CHBlankStart, SiS_Pr->CHBlankEnd, SiS_Pr->CVBlankStart, SiS_Pr->CVBlankEnd);
5433
5434 xf86DrvMsg(0, X_INFO, " {{0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
5435 SiS_Pr->CCRT1CRTC[0], SiS_Pr->CCRT1CRTC[1],
5436 SiS_Pr->CCRT1CRTC[2], SiS_Pr->CCRT1CRTC[3],
5437 SiS_Pr->CCRT1CRTC[4], SiS_Pr->CCRT1CRTC[5],
5438 SiS_Pr->CCRT1CRTC[6], SiS_Pr->CCRT1CRTC[7]);
5439 xf86DrvMsg(0, X_INFO, " 0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,0x%02x,\n",
5440 SiS_Pr->CCRT1CRTC[8], SiS_Pr->CCRT1CRTC[9],
5441 SiS_Pr->CCRT1CRTC[10], SiS_Pr->CCRT1CRTC[11],
5442 SiS_Pr->CCRT1CRTC[12], SiS_Pr->CCRT1CRTC[13],
5443 SiS_Pr->CCRT1CRTC[14], SiS_Pr->CCRT1CRTC[15]);
5444 xf86DrvMsg(0, X_INFO, " 0x%02x}},\n", SiS_Pr->CCRT1CRTC[16]);
5445#endif
5446#endif
5633} 5447}
5634 5448
5635/* Setup panel link 5449/* Setup panel link
@@ -5637,18 +5451,18 @@ SiS_SetGroup1_301(SiS_Private *SiS_Pr, USHORT ModeNo,USHORT ModeIdIndex,
5637 * 300/LVDS+TV, 300/301B-DH, 315/LVDS+TV, 315/LCDA 5451 * 300/LVDS+TV, 300/301B-DH, 315/LVDS+TV, 315/LCDA
5638 */ 5452 */
5639static void 5453static void
5640SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 5454SiS_SetGroup1_LVDS(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
5641 PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex) 5455 unsigned short RefreshRateTableIndex)
5642{ 5456{
5643 USHORT modeflag,resinfo; 5457 unsigned short modeflag, resinfo = 0;
5644 USHORT push2,tempax,tempbx,tempcx,temp; 5458 unsigned short push2, tempax, tempbx, tempcx, temp;
5645 ULONG tempeax=0,tempebx,tempecx,tempvcfact=0; 5459 unsigned int tempeax = 0, tempebx, tempecx, tempvcfact = 0;
5646 BOOLEAN islvds = FALSE, issis = FALSE, chkdclkfirst = FALSE; 5460 BOOLEAN islvds = FALSE, issis = FALSE, chkdclkfirst = FALSE;
5647#ifdef SIS300 5461#ifdef SIS300
5648 USHORT crt2crtc; 5462 unsigned short crt2crtc = 0;
5649#endif 5463#endif
5650#ifdef SIS315H 5464#ifdef SIS315H
5651 USHORT pushcx; 5465 unsigned short pushcx;
5652#endif 5466#endif
5653 5467
5654 if(ModeNo <= 0x13) { 5468 if(ModeNo <= 0x13) {
@@ -5659,15 +5473,11 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5659#endif 5473#endif
5660 } else if(SiS_Pr->UseCustomMode) { 5474 } else if(SiS_Pr->UseCustomMode) {
5661 modeflag = SiS_Pr->CModeFlag; 5475 modeflag = SiS_Pr->CModeFlag;
5662 resinfo = 0;
5663#ifdef SIS300
5664 crt2crtc = 0;
5665#endif
5666 } else { 5476 } else {
5667 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 5477 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
5668 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 5478 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
5669#ifdef SIS300 5479#ifdef SIS300
5670 crt2crtc = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 5480 crt2crtc = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
5671#endif 5481#endif
5672 } 5482 }
5673 5483
@@ -5681,14 +5491,14 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5681 issis = TRUE; 5491 issis = TRUE;
5682 } 5492 }
5683 5493
5684 if((HwInfo->jChipType >= SIS_315H) && (islvds) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA))) { 5494 if((SiS_Pr->ChipType >= SIS_315H) && (islvds) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA))) {
5685 if((!SiS_Pr->SiS_IF_DEF_FSTN) && (!SiS_Pr->SiS_IF_DEF_DSTN)) { 5495 if((!SiS_Pr->SiS_IF_DEF_FSTN) && (!SiS_Pr->SiS_IF_DEF_DSTN)) {
5686 chkdclkfirst = TRUE; 5496 chkdclkfirst = TRUE;
5687 } 5497 }
5688 } 5498 }
5689 5499
5690#ifdef SIS315H 5500#ifdef SIS315H
5691 if((HwInfo->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 5501 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
5692 if(IS_SIS330) { 5502 if(IS_SIS330) {
5693 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10); 5503 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x10);
5694 } else if(IS_SIS740) { 5504 } else if(IS_SIS740) {
@@ -5704,7 +5514,7 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5704 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x00); 5514 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x00);
5705 } else if(SiS_Pr->SiS_VBType & VB_SISVB) { 5515 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
5706 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2D,0x0f); 5516 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x2D,0x0f);
5707 if(SiS_Pr->SiS_VBType & VB_SIS301C) { 5517 if(SiS_Pr->SiS_VBType & VB_SIS30xC) {
5708 if((SiS_Pr->SiS_LCDResInfo == Panel_1024x768) || 5518 if((SiS_Pr->SiS_LCDResInfo == Panel_1024x768) ||
5709 (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)) { 5519 (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)) {
5710 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x20); 5520 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x2D,0x20);
@@ -5720,10 +5530,10 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5720 tempax = SiS_Pr->SiS_LCDHDES; 5530 tempax = SiS_Pr->SiS_LCDHDES;
5721 if(islvds) { 5531 if(islvds) {
5722 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5532 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
5723 if((!SiS_Pr->SiS_IF_DEF_FSTN) && (!SiS_Pr->SiS_IF_DEF_DSTN)) { 5533 if(!SiS_Pr->SiS_IF_DEF_FSTN && !SiS_Pr->SiS_IF_DEF_DSTN) {
5724 if((SiS_Pr->SiS_LCDResInfo == Panel_640x480) && 5534 if((SiS_Pr->SiS_LCDResInfo == Panel_640x480) &&
5725 (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))) { 5535 (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode))) {
5726 tempax -= 8; 5536 tempax -= 8;
5727 } 5537 }
5728 } 5538 }
5729 } 5539 }
@@ -5736,13 +5546,14 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5736 5546
5737 tempbx = SiS_Pr->SiS_HDE; 5547 tempbx = SiS_Pr->SiS_HDE;
5738 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5548 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
5739 if((SiS_Pr->SiS_LCDResInfo == Panel_640x480_2) ||
5740 (SiS_Pr->SiS_LCDResInfo == Panel_640x480_3)) {
5741 tempbx >>= 1;
5742 }
5743 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { 5549 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
5744 tempbx = SiS_Pr->PanelXRes; 5550 tempbx = SiS_Pr->PanelXRes;
5745 } 5551 }
5552 if((SiS_Pr->SiS_LCDResInfo == Panel_320x240_1) ||
5553 (SiS_Pr->SiS_LCDResInfo == Panel_320x240_2) ||
5554 (SiS_Pr->SiS_LCDResInfo == Panel_320x240_3)) {
5555 tempbx >>= 1;
5556 }
5746 } 5557 }
5747 5558
5748 tempax += tempbx; 5559 tempax += tempbx;
@@ -5767,25 +5578,25 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5767 temp = (tempcx >> 3) & 0x00FF; 5578 temp = (tempcx >> 3) & 0x00FF;
5768 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5579 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
5769 if(SiS_Pr->SiS_IF_DEF_TRUMPION) { 5580 if(SiS_Pr->SiS_IF_DEF_TRUMPION) {
5770 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 5581 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
5771 switch(ModeNo) { 5582 switch(ModeNo) {
5772 case 0x04: 5583 case 0x04:
5773 case 0x05: 5584 case 0x05:
5774 case 0x0d: temp = 0x56; break; 5585 case 0x0d: temp = 0x56; break;
5775 case 0x10: temp = 0x60; break; 5586 case 0x10: temp = 0x60; break;
5776 case 0x13: temp = 0x5f; break; 5587 case 0x13: temp = 0x5f; break;
5777 case 0x40: 5588 case 0x40:
5778 case 0x41: 5589 case 0x41:
5779 case 0x4f: 5590 case 0x4f:
5780 case 0x43: 5591 case 0x43:
5781 case 0x44: 5592 case 0x44:
5782 case 0x62: 5593 case 0x62:
5783 case 0x56: 5594 case 0x56:
5784 case 0x53: 5595 case 0x53:
5785 case 0x5d: 5596 case 0x5d:
5786 case 0x5e: temp = 0x54; break; 5597 case 0x5e: temp = 0x54; break;
5787 } 5598 }
5788 } 5599 }
5789 } 5600 }
5790 } 5601 }
5791 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x14,temp); /* BPLHRS */ 5602 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x14,temp); /* BPLHRS */
@@ -5793,12 +5604,12 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5793 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5604 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
5794 temp += 2; 5605 temp += 2;
5795 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { 5606 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
5796 temp += 8; 5607 temp += 8;
5797 if(SiS_Pr->PanelHRE != 999) { 5608 if(SiS_Pr->PanelHRE != 999) {
5798 temp = tempcx + SiS_Pr->PanelHRE; 5609 temp = tempcx + SiS_Pr->PanelHRE;
5799 if(temp >= SiS_Pr->SiS_HT) temp -= SiS_Pr->SiS_HT; 5610 if(temp >= SiS_Pr->SiS_HT) temp -= SiS_Pr->SiS_HT;
5800 temp >>= 3; 5611 temp >>= 3;
5801 } 5612 }
5802 } 5613 }
5803 } else { 5614 } else {
5804 temp += 10; 5615 temp += 10;
@@ -5806,9 +5617,6 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5806 5617
5807 temp &= 0x1F; 5618 temp &= 0x1F;
5808 temp |= ((tempcx & 0x07) << 5); 5619 temp |= ((tempcx & 0x07) << 5);
5809#if 0
5810 if(SiS_Pr->SiS_IF_DEF_FSTN) temp = 0x20; /* WRONG? BIOS loads cl, not ah */
5811#endif
5812 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x15,temp); /* BPLHRE */ 5620 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x15,temp); /* BPLHRE */
5813 5621
5814 /* Vertical */ 5622 /* Vertical */
@@ -5826,9 +5634,9 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5826 push2 = tempbx; 5634 push2 = tempbx;
5827 5635
5828 tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE; 5636 tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE;
5829 if(HwInfo->jChipType < SIS_315H) { 5637 if(SiS_Pr->ChipType < SIS_315H) {
5830 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5638 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
5831 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { 5639 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) {
5832 tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->PanelYRes; 5640 tempcx = SiS_Pr->SiS_VGAVT - SiS_Pr->PanelYRes;
5833 } 5641 }
5834 } 5642 }
@@ -5844,19 +5652,19 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5844 if(issis) tempbx++; 5652 if(issis) tempbx++;
5845 } else { 5653 } else {
5846 tempbx += tempcx; 5654 tempbx += tempcx;
5847 if(HwInfo->jChipType < SIS_315H) tempbx++; 5655 if(SiS_Pr->ChipType < SIS_315H) tempbx++;
5848 else if(issis) tempbx++; 5656 else if(issis) tempbx++;
5849 } 5657 }
5850 5658
5851 if(tempbx >= SiS_Pr->SiS_VT) tempbx -= SiS_Pr->SiS_VT; /* BPLVRS */ 5659 if(tempbx >= SiS_Pr->SiS_VT) tempbx -= SiS_Pr->SiS_VT;
5852 5660
5853 temp = tempbx & 0x00FF; 5661 temp = tempbx & 0x00FF;
5854 if(SiS_Pr->SiS_IF_DEF_TRUMPION) { 5662 if(SiS_Pr->SiS_IF_DEF_TRUMPION) {
5855 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 5663 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
5856 if(ModeNo == 0x10) temp = 0xa9; 5664 if(ModeNo == 0x10) temp = 0xa9;
5857 } 5665 }
5858 } 5666 }
5859 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x18,temp); 5667 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x18,temp); /* BPLVRS */
5860 5668
5861 tempcx >>= 3; 5669 tempcx >>= 3;
5862 tempcx++; 5670 tempcx++;
@@ -5879,13 +5687,13 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5879 } else if(SiS_Pr->SiS_VGAVDE != SiS_Pr->SiS_VDE) temp |= 0x40; 5687 } else if(SiS_Pr->SiS_VGAVDE != SiS_Pr->SiS_VDE) temp |= 0x40;
5880 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) temp |= 0x40; 5688 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) temp |= 0x40;
5881 tempbx = 0x87; 5689 tempbx = 0x87;
5882 if((HwInfo->jChipType >= SIS_315H) || 5690 if((SiS_Pr->ChipType >= SIS_315H) ||
5883 (HwInfo->jChipRevision >= 0x30)) { 5691 (SiS_Pr->ChipRevision >= 0x30)) {
5884 tempbx = 0x07; 5692 tempbx = 0x07;
5885 if((SiS_Pr->SiS_IF_DEF_CH70xx == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) { 5693 if((SiS_Pr->SiS_IF_DEF_CH70xx == 1) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
5886 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x03) temp |= 0x80; 5694 if(SiS_GetReg(SiS_Pr->SiS_Part1Port,0x00) & 0x03) temp |= 0x80;
5887 } 5695 }
5888 /* Chrontel 701x operates in 24bit mode (8-8-8, 2x12bit mutliplexed) via VGA2 */ 5696 /* Chrontel 701x operates in 24bit mode (8-8-8, 2x12bit multiplexed) via VGA2 */
5889 if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) { 5697 if(SiS_Pr->SiS_LCDInfo & LCDRGB18Bit) {
5890 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 5698 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
5891 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x06) & 0x10) temp |= 0x80; 5699 if(SiS_GetReg(SiS_Pr->SiS_P3c4,0x06) & 0x10) temp |= 0x80;
@@ -5896,59 +5704,58 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5896 } 5704 }
5897 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,tempbx,temp); 5705 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x1A,tempbx,temp);
5898 5706
5899 tempbx = push2; /* BPLVDEE */ 5707 tempbx = push2; /* BPLVDEE */
5900 5708
5901 tempcx = SiS_Pr->SiS_LCDVDES; /* BPLVDES */ 5709 tempcx = SiS_Pr->SiS_LCDVDES; /* BPLVDES */
5902 5710
5903 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 5711 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
5904 switch(SiS_Pr->SiS_LCDResInfo) { 5712 switch(SiS_Pr->SiS_LCDResInfo) {
5905 case Panel_640x480: 5713 case Panel_640x480:
5906 tempbx = SiS_Pr->SiS_VGAVDE - 1; 5714 tempbx = SiS_Pr->SiS_VGAVDE - 1;
5907 tempcx = SiS_Pr->SiS_VGAVDE; 5715 tempcx = SiS_Pr->SiS_VGAVDE;
5908 break; 5716 break;
5909 case Panel_800x600: 5717 case Panel_800x600:
5910 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 5718 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
5911 if(resinfo == SIS_RI_800x600) tempcx++; 5719 if(resinfo == SIS_RI_800x600) tempcx++;
5912 } 5720 }
5913 break; 5721 break;
5914 case Panel_1024x600: 5722 case Panel_1024x600:
5915 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 5723 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
5916 if(resinfo == SIS_RI_1024x600) tempcx++; 5724 if(resinfo == SIS_RI_1024x600) tempcx++;
5917 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) { 5725 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) {
5918 if(resinfo == SIS_RI_800x600) tempcx++; 5726 if(resinfo == SIS_RI_800x600) tempcx++;
5919 } 5727 }
5920 } 5728 }
5921 break; 5729 break;
5922 case Panel_1024x768: 5730 case Panel_1024x768:
5923 if(HwInfo->jChipType < SIS_315H) { 5731 if(SiS_Pr->ChipType < SIS_315H) {
5924 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 5732 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
5925 if(resinfo == SIS_RI_1024x768) tempcx++; 5733 if(resinfo == SIS_RI_1024x768) tempcx++;
5926 } 5734 }
5927 } 5735 }
5928 break; 5736 break;
5929 } 5737 }
5930 } 5738 }
5931 5739
5932 temp = ((tempbx >> 8) & 0x07) << 3; 5740 temp = ((tempbx >> 8) & 0x07) << 3;
5933 temp = temp | ((tempcx >> 8) & 0x07); 5741 temp |= ((tempcx >> 8) & 0x07);
5934 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1D,temp); 5742 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1D,temp);
5935 /* if(SiS_Pr->SiS_IF_DEF_FSTN) tempbx++; */
5936 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1C,tempbx); 5743 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1C,tempbx);
5937 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1B,tempcx); 5744 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1B,tempcx);
5938 5745
5939 /* Vertical scaling */ 5746 /* Vertical scaling */
5940 5747
5941 if(HwInfo->jChipType < SIS_315H) { 5748 if(SiS_Pr->ChipType < SIS_315H) {
5942 5749
5943#ifdef SIS300 /* 300 series */ 5750#ifdef SIS300 /* 300 series */
5944 tempeax = SiS_Pr->SiS_VGAVDE << 6; 5751 tempeax = SiS_Pr->SiS_VGAVDE << 6;
5945 temp = (tempeax % (ULONG)SiS_Pr->SiS_VDE); 5752 temp = (tempeax % (unsigned int)SiS_Pr->SiS_VDE);
5946 tempeax = tempeax / (ULONG)SiS_Pr->SiS_VDE; 5753 tempeax = tempeax / (unsigned int)SiS_Pr->SiS_VDE;
5947 if(temp) tempeax++; 5754 if(temp) tempeax++;
5948 5755
5949 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) tempeax = 0x3F; 5756 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) tempeax = 0x3F;
5950 5757
5951 temp = (USHORT)(tempeax & 0x00FF); 5758 temp = (unsigned short)(tempeax & 0x00FF);
5952 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1E,temp); /* BPLVCFACT */ 5759 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1E,temp); /* BPLVCFACT */
5953 tempvcfact = temp; 5760 tempvcfact = temp;
5954#endif /* SIS300 */ 5761#endif /* SIS300 */
@@ -5963,20 +5770,20 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5963 if(temp) tempeax++; 5770 if(temp) tempeax++;
5964 tempvcfact = tempeax; 5771 tempvcfact = tempeax;
5965 5772
5966 temp = (USHORT)(tempeax & 0x00FF); 5773 temp = (unsigned short)(tempeax & 0x00FF);
5967 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x37,temp); 5774 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x37,temp);
5968 temp = (USHORT)((tempeax & 0x00FF00) >> 8); 5775 temp = (unsigned short)((tempeax & 0x00FF00) >> 8);
5969 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x36,temp); 5776 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x36,temp);
5970 temp = (USHORT)((tempeax & 0x00030000) >> 16); 5777 temp = (unsigned short)((tempeax & 0x00030000) >> 16);
5971 if(SiS_Pr->SiS_VDE == SiS_Pr->SiS_VGAVDE) temp |= 0x04; 5778 if(SiS_Pr->SiS_VDE == SiS_Pr->SiS_VGAVDE) temp |= 0x04;
5972 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x35,temp); 5779 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x35,temp);
5973 5780
5974 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302ELV)) { 5781 if(SiS_Pr->SiS_VBType & VB_SISPART4SCALER) {
5975 temp = (USHORT)(tempeax & 0x00FF); 5782 temp = (unsigned short)(tempeax & 0x00FF);
5976 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x3c,temp); 5783 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x3c,temp);
5977 temp = (USHORT)((tempeax & 0x00FF00) >> 8); 5784 temp = (unsigned short)((tempeax & 0x00FF00) >> 8);
5978 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x3b,temp); 5785 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x3b,temp);
5979 temp = (USHORT)(((tempeax & 0x00030000) >> 16) << 6); 5786 temp = (unsigned short)(((tempeax & 0x00030000) >> 16) << 6);
5980 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0x3f,temp); 5787 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0x3f,temp);
5981 temp = 0; 5788 temp = 0;
5982 if(SiS_Pr->SiS_VDE != SiS_Pr->SiS_VGAVDE) temp |= 0x08; 5789 if(SiS_Pr->SiS_VDE != SiS_Pr->SiS_VGAVDE) temp |= 0x08;
@@ -5997,29 +5804,29 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
5997 tempecx = 0xFFFF; 5804 tempecx = 0xFFFF;
5998 } else { 5805 } else {
5999 tempecx = tempebx / SiS_Pr->SiS_HDE; 5806 tempecx = tempebx / SiS_Pr->SiS_HDE;
6000 if(HwInfo->jChipType >= SIS_315H) { 5807 if(SiS_Pr->ChipType >= SIS_315H) {
6001 if(tempebx % SiS_Pr->SiS_HDE) tempecx++; 5808 if(tempebx % SiS_Pr->SiS_HDE) tempecx++;
6002 } 5809 }
6003 } 5810 }
6004 5811
6005 if(HwInfo->jChipType >= SIS_315H) { 5812 if(SiS_Pr->ChipType >= SIS_315H) {
6006 tempeax = (tempebx / tempecx) - 1; 5813 tempeax = (tempebx / tempecx) - 1;
6007 } else { 5814 } else {
6008 tempeax = ((SiS_Pr->SiS_VGAHT << 16) / tempecx) - 1; 5815 tempeax = ((SiS_Pr->SiS_VGAHT << 16) / tempecx) - 1;
6009 } 5816 }
6010 tempecx = (tempecx << 16) | (tempeax & 0xFFFF); 5817 tempecx = (tempecx << 16) | (tempeax & 0xFFFF);
6011 temp = (USHORT)(tempecx & 0x00FF); 5818 temp = (unsigned short)(tempecx & 0x00FF);
6012 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1F,temp); 5819 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1F,temp);
6013 5820
6014 if(HwInfo->jChipType >= SIS_315H) { 5821 if(SiS_Pr->ChipType >= SIS_315H) {
6015 tempeax = (SiS_Pr->SiS_VGAVDE << 18) / tempvcfact; 5822 tempeax = (SiS_Pr->SiS_VGAVDE << 18) / tempvcfact;
6016 tempbx = (USHORT)(tempeax & 0xFFFF); 5823 tempbx = (unsigned short)(tempeax & 0xFFFF);
6017 } else { 5824 } else {
6018 tempeax = SiS_Pr->SiS_VGAVDE << 6; 5825 tempeax = SiS_Pr->SiS_VGAVDE << 6;
6019 tempbx = tempvcfact & 0x3f; 5826 tempbx = tempvcfact & 0x3f;
6020 if(tempbx == 0) tempbx = 64; 5827 if(tempbx == 0) tempbx = 64;
6021 tempeax /= tempbx; 5828 tempeax /= tempbx;
6022 tempbx = (USHORT)(tempeax & 0xFFFF); 5829 tempbx = (unsigned short)(tempeax & 0xFFFF);
6023 } 5830 }
6024 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) tempbx--; 5831 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) tempbx--;
6025 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) { 5832 if(SiS_Pr->SiS_SetFlag & EnableLVDSDDA) {
@@ -6032,24 +5839,24 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6032 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x20,temp); 5839 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x20,temp);
6033 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x21,tempbx); 5840 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x21,tempbx);
6034 5841
6035 tempecx >>= 16; /* BPLHCFACT */ 5842 tempecx >>= 16; /* BPLHCFACT */
6036 if(!chkdclkfirst) { 5843 if(!chkdclkfirst) {
6037 if(modeflag & HalfDCLK) tempecx >>= 1; 5844 if(modeflag & HalfDCLK) tempecx >>= 1;
6038 } 5845 }
6039 temp = (USHORT)((tempecx & 0xFF00) >> 8); 5846 temp = (unsigned short)((tempecx & 0xFF00) >> 8);
6040 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x22,temp); 5847 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x22,temp);
6041 temp = (USHORT)(tempecx & 0x00FF); 5848 temp = (unsigned short)(tempecx & 0x00FF);
6042 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x23,temp); 5849 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x23,temp);
6043 5850
6044#ifdef SIS315H 5851#ifdef SIS315H
6045 if(HwInfo->jChipType >= SIS_315H) { 5852 if(SiS_Pr->ChipType >= SIS_315H) {
6046 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 5853 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
6047 if((islvds) || (SiS_Pr->SiS_VBInfo & VB_SIS301LV302LV)) { 5854 if((islvds) || (SiS_Pr->SiS_VBInfo & VB_SISLVDS)) {
6048 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1e,0x20); 5855 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1e,0x20);
6049 } 5856 }
6050 } else { 5857 } else {
6051 if(islvds) { 5858 if(islvds) {
6052 if(HwInfo->jChipType == SIS_740) { 5859 if(SiS_Pr->ChipType == SIS_740) {
6053 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1e,0x03); 5860 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x1e,0x03);
6054 } else { 5861 } else {
6055 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1e,0x23); 5862 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x1e,0x23);
@@ -6061,17 +5868,26 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6061 5868
6062#ifdef SIS300 5869#ifdef SIS300
6063 if(SiS_Pr->SiS_IF_DEF_TRUMPION) { 5870 if(SiS_Pr->SiS_IF_DEF_TRUMPION) {
6064 int i; 5871 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
6065 UCHAR TrumpMode13[4] = { 0x01, 0x10, 0x2c, 0x00 }; 5872 unsigned char *trumpdata;
6066 UCHAR TrumpMode10_1[4] = { 0x01, 0x10, 0x27, 0x00 }; 5873 int i, j = crt2crtc;
6067 UCHAR TrumpMode10_2[4] = { 0x01, 0x16, 0x10, 0x00 }; 5874 unsigned char TrumpMode13[4] = { 0x01, 0x10, 0x2c, 0x00 };
5875 unsigned char TrumpMode10_1[4] = { 0x01, 0x10, 0x27, 0x00 };
5876 unsigned char TrumpMode10_2[4] = { 0x01, 0x16, 0x10, 0x00 };
5877
5878 if(SiS_Pr->SiS_UseROM) {
5879 trumpdata = &ROMAddr[0x8001 + (j * 80)];
5880 } else {
5881 if(SiS_Pr->SiS_LCDTypeInfo == 0x0e) j += 7;
5882 trumpdata = &SiS300_TrumpionData[j][0];
5883 }
6068 5884
6069 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xbf); 5885 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x02,0xbf);
6070 for(i=0; i<5; i++) { 5886 for(i=0; i<5; i++) {
6071 SiS_SetTrumpionBlock(SiS_Pr, &SiS300_TrumpionData[crt2crtc][0]); 5887 SiS_SetTrumpionBlock(SiS_Pr, trumpdata);
6072 } 5888 }
6073 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 5889 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
6074 if(ModeNo == 0x13) { 5890 if(ModeNo == 0x13) {
6075 for(i=0; i<4; i++) { 5891 for(i=0; i<4; i++) {
6076 SiS_SetTrumpionBlock(SiS_Pr, &TrumpMode13[0]); 5892 SiS_SetTrumpionBlock(SiS_Pr, &TrumpMode13[0]);
6077 } 5893 }
@@ -6095,67 +5911,66 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6095 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x29,0x5A); 5911 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x29,0x5A);
6096 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2A,0x4B); 5912 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2A,0x4B);
6097 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x07,0x03); 5913 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x07,0x03);
6098 tempax = SiS_Pr->SiS_HDE; /* Blps = lcdhdee(lcdhdes+HDE) + 64 */ 5914 tempax = SiS_Pr->SiS_HDE; /* Blps = lcdhdee(lcdhdes+HDE) + 64 */
6099 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480_2 || 5915 if(SiS_Pr->SiS_LCDResInfo == Panel_320x240_1 ||
6100 SiS_Pr->SiS_LCDResInfo == Panel_640x480_3) tempax >>= 1; 5916 SiS_Pr->SiS_LCDResInfo == Panel_320x240_2 ||
5917 SiS_Pr->SiS_LCDResInfo == Panel_320x240_3) tempax >>= 1;
6101 tempax += 64; 5918 tempax += 64;
6102 temp = tempax & 0x00FF; 5919 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x38,tempax & 0xff);
6103 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x38,temp); 5920 temp = (tempax >> 8) << 3;
6104 temp = ((tempax & 0xFF00) >> 8) << 3;
6105 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,~0x078,temp); 5921 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x35,~0x078,temp);
6106 tempax += 32; /* Blpe=lBlps+32 */ 5922 tempax += 32; /* Blpe = lBlps+32 */
6107 temp = tempax & 0x00FF; 5923 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x39,tempax & 0xff);
6108 if(SiS_Pr->SiS_IF_DEF_FSTN) temp = 0; 5924 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3A,0x00); /* Bflml = 0 */
6109 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x39,temp); 5925 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x3C,~0x007);
6110 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3A,0x00); /* Bflml=0 */
6111 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x007,0x00);
6112 5926
6113 tempax = SiS_Pr->SiS_VDE; 5927 tempax = SiS_Pr->SiS_VDE;
6114 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480_2 || 5928 if(SiS_Pr->SiS_LCDResInfo == Panel_320x240_1 ||
6115 SiS_Pr->SiS_LCDResInfo == Panel_640x480_3) tempax >>= 1; 5929 SiS_Pr->SiS_LCDResInfo == Panel_320x240_2 ||
5930 SiS_Pr->SiS_LCDResInfo == Panel_320x240_3) tempax >>= 1;
6116 tempax >>= 1; 5931 tempax >>= 1;
6117 temp = tempax & 0x00FF; 5932 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3B,tempax & 0xff);
6118 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3B,temp); 5933 temp = (tempax >> 8) << 3;
6119 temp = ((tempax & 0xFF00) >> 8) << 3;
6120 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x038,temp); 5934 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x038,temp);
6121 5935
6122 tempeax = SiS_Pr->SiS_HDE; 5936 tempeax = SiS_Pr->SiS_HDE;
6123 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480_2 || 5937 if(SiS_Pr->SiS_LCDResInfo == Panel_320x240_1 ||
6124 SiS_Pr->SiS_LCDResInfo == Panel_640x480_3) tempeax >>= 1; 5938 SiS_Pr->SiS_LCDResInfo == Panel_320x240_2 ||
6125 tempeax <<= 2; /* BDxFIFOSTOP = (HDE*4)/128 */ 5939 SiS_Pr->SiS_LCDResInfo == Panel_320x240_3) tempeax >>= 1;
6126 tempebx = 128; 5940 tempeax <<= 2; /* BDxFIFOSTOP = (HDE*4)/128 */
6127 temp = (USHORT)(tempeax % tempebx); 5941 temp = tempeax & 0x7f;
6128 tempeax = tempeax / tempebx; 5942 tempeax >>= 7;
6129 if(temp) tempeax++; 5943 if(temp) tempeax++;
6130 temp = (USHORT)(tempeax & 0x003F); 5944 temp = tempeax & 0x3f;
6131 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x45,~0x0FF,temp); 5945 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x45,temp);
6132 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3F,0x00); /* BDxWadrst0 */ 5946 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3F,0x00); /* BDxWadrst0 */
6133 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3E,0x00); 5947 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3E,0x00);
6134 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3D,0x10); 5948 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x3D,0x10);
6135 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x040,0x00); 5949 SiS_SetRegAND(SiS_Pr->SiS_Part1Port,0x3C,~0x040);
6136 5950
6137 tempax = SiS_Pr->SiS_HDE; 5951 tempax = SiS_Pr->SiS_HDE;
6138 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480_2 || 5952 if(SiS_Pr->SiS_LCDResInfo == Panel_320x240_1 ||
6139 SiS_Pr->SiS_LCDResInfo == Panel_640x480_3) tempax >>= 1; 5953 SiS_Pr->SiS_LCDResInfo == Panel_320x240_2 ||
6140 tempax >>= 4; /* BDxWadroff = HDE*4/8/8 */ 5954 SiS_Pr->SiS_LCDResInfo == Panel_320x240_3) tempax >>= 1;
5955 tempax >>= 4; /* BDxWadroff = HDE*4/8/8 */
6141 pushcx = tempax; 5956 pushcx = tempax;
6142 temp = tempax & 0x00FF; 5957 temp = tempax & 0x00FF;
6143 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x43,temp); 5958 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x43,temp);
6144 temp = ((tempax & 0xFF00) >> 8) << 3; 5959 temp = ((tempax & 0xFF00) >> 8) << 3;
6145 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x0F8,temp); 5960 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x44,~0x0F8,temp);
6146 5961
6147 tempax = SiS_Pr->SiS_VDE; /* BDxWadrst1 = BDxWadrst0 + BDxWadroff * VDE */ 5962 tempax = SiS_Pr->SiS_VDE; /* BDxWadrst1 = BDxWadrst0 + BDxWadroff * VDE */
6148 if(SiS_Pr->SiS_LCDResInfo == Panel_640x480_2 || 5963 if(SiS_Pr->SiS_LCDResInfo == Panel_320x240_1 ||
6149 SiS_Pr->SiS_LCDResInfo == Panel_640x480_3) tempax >>= 1; 5964 SiS_Pr->SiS_LCDResInfo == Panel_320x240_2 ||
6150 tempeax = (tempax * pushcx); 5965 SiS_Pr->SiS_LCDResInfo == Panel_320x240_3) tempax >>= 1;
6151 tempebx = 0x00100000 + tempeax; 5966 tempeax = tempax * pushcx;
6152 temp = (USHORT)tempebx & 0x000000FF; 5967 temp = tempeax & 0xFF;
6153 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x42,temp); 5968 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x42,temp);
6154 temp = (USHORT)((tempebx & 0x0000FF00) >> 8); 5969 temp = (tempeax & 0xFF00) >> 8;
6155 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x41,temp); 5970 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x41,temp);
6156 temp = (USHORT)((tempebx & 0x00FF0000) >> 16); 5971 temp = ((tempeax & 0xFF0000) >> 16) | 0x10;
6157 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x40,temp); 5972 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x40,temp);
6158 temp = (USHORT)(((tempebx & 0x01000000) >> 24) << 7); 5973 temp = ((tempeax & 0x01000000) >> 24) << 7;
6159 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x080,temp); 5974 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x3C,~0x080,temp);
6160 5975
6161 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2F,0x03); 5976 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2F,0x03);
@@ -6192,20 +6007,20 @@ SiS_SetGroup1_LVDS(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6192 6007
6193/* Set Part 1 */ 6008/* Set Part 1 */
6194static void 6009static void
6195SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 6010SiS_SetGroup1(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
6196 PSIS_HW_INFO HwInfo, USHORT RefreshRateTableIndex) 6011 unsigned short RefreshRateTableIndex)
6197{ 6012{
6198#if defined(SIS300) || defined(SIS315H) 6013#if defined(SIS300) || defined(SIS315H)
6199 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 6014 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
6200#endif 6015#endif
6201 USHORT temp=0, tempax=0, tempbx=0, tempcx=0, bridgeadd=0; 6016 unsigned short temp=0, tempax=0, tempbx=0, tempcx=0, bridgeadd=0;
6202 USHORT pushbx=0, CRT1Index=0, modeflag, resinfo=0; 6017 unsigned short pushbx=0, CRT1Index=0, modeflag, resinfo=0;
6203#ifdef SIS315H 6018#ifdef SIS315H
6204 USHORT tempbl=0; 6019 unsigned short tempbl=0;
6205#endif 6020#endif
6206 6021
6207 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 6022 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
6208 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 6023 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6209 return; 6024 return;
6210 } 6025 }
6211 6026
@@ -6214,47 +6029,47 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6214 } else if(SiS_Pr->UseCustomMode) { 6029 } else if(SiS_Pr->UseCustomMode) {
6215 modeflag = SiS_Pr->CModeFlag; 6030 modeflag = SiS_Pr->CModeFlag;
6216 } else { 6031 } else {
6217 CRT1Index = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC; 6032 CRT1Index = SiS_GetRefCRT1CRTC(SiS_Pr, RefreshRateTableIndex, SiS_Pr->SiS_UseWideCRT2);
6218 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 6033 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
6219 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 6034 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
6220 } 6035 }
6221 6036
6222 SiS_SetCRT2Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 6037 SiS_SetCRT2Offset(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6223 6038
6224 if( ! ((HwInfo->jChipType >= SIS_315H) && 6039 if( ! ((SiS_Pr->ChipType >= SIS_315H) &&
6225 (SiS_Pr->SiS_IF_DEF_LVDS == 1) && 6040 (SiS_Pr->SiS_IF_DEF_LVDS == 1) &&
6226 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ) { 6041 (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ) {
6227 6042
6228 if(HwInfo->jChipType < SIS_315H ) { 6043 if(SiS_Pr->ChipType < SIS_315H ) {
6229#ifdef SIS300 6044#ifdef SIS300
6230 SiS_SetCRT2FIFO_300(SiS_Pr, ModeNo, HwInfo); 6045 SiS_SetCRT2FIFO_300(SiS_Pr, ModeNo);
6231#endif 6046#endif
6232 } else { 6047 } else {
6233#ifdef SIS315H 6048#ifdef SIS315H
6234 SiS_SetCRT2FIFO_310(SiS_Pr, HwInfo); 6049 SiS_SetCRT2FIFO_310(SiS_Pr);
6235#endif 6050#endif
6236 } 6051 }
6237 6052
6238 /* 1. Horizontal setup */ 6053 /* 1. Horizontal setup */
6239 6054
6240 if(HwInfo->jChipType < SIS_315H ) { 6055 if(SiS_Pr->ChipType < SIS_315H ) {
6241 6056
6242#ifdef SIS300 /* ------------- 300 series --------------*/ 6057#ifdef SIS300 /* ------------- 300 series --------------*/
6243 6058
6244 temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */ 6059 temp = (SiS_Pr->SiS_VGAHT - 1) & 0x0FF; /* BTVGA2HT 0x08,0x09 */
6245 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x08,temp); /* CRT2 Horizontal Total */ 6060 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x08,temp); /* CRT2 Horizontal Total */
6246 6061
6247 temp = (((SiS_Pr->SiS_VGAHT - 1) & 0xFF00) >> 8) << 4; 6062 temp = (((SiS_Pr->SiS_VGAHT - 1) & 0xFF00) >> 8) << 4;
6248 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0f,temp); /* CRT2 Horizontal Total Overflow [7:4] */ 6063 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x09,0x0f,temp); /* CRT2 Horizontal Total Overflow [7:4] */
6249 6064
6250 temp = (SiS_Pr->SiS_VGAHDE + 12) & 0x0FF; /* BTVGA2HDEE 0x0A,0x0C */ 6065 temp = (SiS_Pr->SiS_VGAHDE + 12) & 0x0FF; /* BTVGA2HDEE 0x0A,0x0C */
6251 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0A,temp); /* CRT2 Horizontal Display Enable End */ 6066 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x0A,temp); /* CRT2 Horizontal Display Enable End */
6252 6067
6253 pushbx = SiS_Pr->SiS_VGAHDE + 12; /* bx BTVGA2HRS 0x0B,0x0C */ 6068 pushbx = SiS_Pr->SiS_VGAHDE + 12; /* bx BTVGA2HRS 0x0B,0x0C */
6254 tempcx = (SiS_Pr->SiS_VGAHT - SiS_Pr->SiS_VGAHDE) >> 2; 6069 tempcx = (SiS_Pr->SiS_VGAHT - SiS_Pr->SiS_VGAHDE) >> 2;
6255 tempbx = pushbx + tempcx; 6070 tempbx = pushbx + tempcx;
6256 tempcx <<= 1; 6071 tempcx <<= 1;
6257 tempcx += tempbx; 6072 tempcx += tempbx;
6258 6073
6259 bridgeadd = 12; 6074 bridgeadd = 12;
6260 6075
@@ -6301,7 +6116,7 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6301 bridgeadd = 16; 6116 bridgeadd = 16;
6302 6117
6303 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6118 if(SiS_Pr->SiS_VBType & VB_SISVB) {
6304 if(HwInfo->jChipType >= SIS_661) { 6119 if(SiS_Pr->ChipType >= SIS_661) {
6305 if((SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) || 6120 if((SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) ||
6306 (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)) { 6121 (SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)) {
6307 if(resinfo == SIS_RI_1280x1024) { 6122 if(resinfo == SIS_RI_1280x1024) {
@@ -6319,7 +6134,7 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6319 6134
6320 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6135 if(SiS_Pr->SiS_VBType & VB_SISVB) {
6321 6136
6322 if(SiS_Pr->UseCustomMode) { 6137 if(SiS_Pr->UseCustomMode) {
6323 tempbx = SiS_Pr->CHSyncStart + bridgeadd; 6138 tempbx = SiS_Pr->CHSyncStart + bridgeadd;
6324 tempcx = SiS_Pr->CHSyncEnd + bridgeadd; 6139 tempcx = SiS_Pr->CHSyncEnd + bridgeadd;
6325 tempax = SiS_Pr->SiS_VGAHT; 6140 tempax = SiS_Pr->SiS_VGAHT;
@@ -6341,22 +6156,22 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6341 cr5 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5]; 6156 cr5 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[5];
6342 cr15 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15]; 6157 cr15 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[15];
6343 } 6158 }
6344 tempbx = ((cr4 | ((cr14 & 0xC0) << 2)) - 3) << 3; /* (VGAHRS-3)*8 */ 6159 tempbx = ((cr4 | ((cr14 & 0xC0) << 2)) - 3) << 3; /* (VGAHRS-3)*8 */
6345 tempcx = (((cr5 & 0x1f) | ((cr15 & 0x04) << (5-2))) - 3) << 3; /* (VGAHRE-3)*8 */ 6160 tempcx = (((cr5 & 0x1f) | ((cr15 & 0x04) << (5-2))) - 3) << 3; /* (VGAHRE-3)*8 */
6346 tempcx &= 0x00FF; 6161 tempcx &= 0x00FF;
6347 tempcx |= (tempbx & 0xFF00); 6162 tempcx |= (tempbx & 0xFF00);
6348 tempbx += bridgeadd; 6163 tempbx += bridgeadd;
6349 tempcx += bridgeadd; 6164 tempcx += bridgeadd;
6350 tempax = SiS_Pr->SiS_VGAHT; 6165 tempax = SiS_Pr->SiS_VGAHT;
6351 if(modeflag & HalfDCLK) tempax >>= 1; 6166 if(modeflag & HalfDCLK) tempax >>= 1;
6352 tempax--; 6167 tempax--;
6353 if(tempcx > tempax) tempcx = tempax; 6168 if(tempcx > tempax) tempcx = tempax;
6354 } 6169 }
6355 6170
6356 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) { 6171 if(SiS_Pr->SiS_TVMode & (TVSetNTSC1024 | TVSet525p1024)) {
6357 tempbx = 1040; 6172 tempbx = 1040;
6358 tempcx = 1044; /* HWCursor bug! */ 6173 tempcx = 1044; /* HWCursor bug! */
6359 } 6174 }
6360 6175
6361 } 6176 }
6362 6177
@@ -6372,18 +6187,18 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6372 tempcx = SiS_Pr->SiS_VGAVT - 1; 6187 tempcx = SiS_Pr->SiS_VGAVT - 1;
6373 temp = tempcx & 0x00FF; 6188 temp = tempcx & 0x00FF;
6374 6189
6375 if(HwInfo->jChipType < SIS_661) { 6190 if(SiS_Pr->ChipType < SIS_661) {
6376 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 6191 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
6377 if(HwInfo->jChipType < SIS_315H) { 6192 if(SiS_Pr->ChipType < SIS_315H) {
6378 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 6193 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
6379 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)) { 6194 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)) {
6380 temp--; 6195 temp--;
6381 } 6196 }
6382 } 6197 }
6383 } else { 6198 } else {
6384 temp--; 6199 temp--;
6385 } 6200 }
6386 } else if(HwInfo->jChipType >= SIS_315H) { 6201 } else if(SiS_Pr->ChipType >= SIS_315H) {
6387 temp--; 6202 temp--;
6388 } 6203 }
6389 } 6204 }
@@ -6395,9 +6210,9 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6395 temp = ((tempbx >> 5) & 0x38) | ((tempcx >> 8) & 0x07); 6210 temp = ((tempbx >> 5) & 0x38) | ((tempcx >> 8) & 0x07);
6396 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x12,temp); /* Overflow */ 6211 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x12,temp); /* Overflow */
6397 6212
6398 if((HwInfo->jChipType >= SIS_315H) && (HwInfo->jChipType < SIS_661)) { 6213 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->ChipType < SIS_661)) {
6399 tempbx++; 6214 tempbx++;
6400 tempax = tempbx; 6215 tempax = tempbx;
6401 tempcx++; 6216 tempcx++;
6402 tempcx -= tempax; 6217 tempcx -= tempax;
6403 tempcx >>= 2; 6218 tempcx >>= 2;
@@ -6407,8 +6222,8 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6407 tempcx += tempbx; 6222 tempcx += tempbx;
6408 tempcx++; 6223 tempcx++;
6409 } else { 6224 } else {
6410 tempbx = (SiS_Pr->SiS_VGAVT + SiS_Pr->SiS_VGAVDE) >> 1; /* BTVGA2VRS 0x10,0x11 */ 6225 tempbx = (SiS_Pr->SiS_VGAVT + SiS_Pr->SiS_VGAVDE) >> 1; /* BTVGA2VRS 0x10,0x11 */
6411 tempcx = ((SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) >> 4) + tempbx + 1; /* BTVGA2VRE 0x11 */ 6226 tempcx = ((SiS_Pr->SiS_VGAVT - SiS_Pr->SiS_VGAVDE) >> 4) + tempbx + 1; /* BTVGA2VRE 0x11 */
6412 } 6227 }
6413 6228
6414 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6229 if(SiS_Pr->SiS_VBType & VB_SISVB) {
@@ -6416,7 +6231,7 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6416 tempbx = SiS_Pr->CVSyncStart; 6231 tempbx = SiS_Pr->CVSyncStart;
6417 tempcx = SiS_Pr->CVSyncEnd; 6232 tempcx = SiS_Pr->CVSyncEnd;
6418 } 6233 }
6419 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { 6234 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) {
6420 unsigned char cr8, cr7, cr13; 6235 unsigned char cr8, cr7, cr13;
6421 if(SiS_Pr->UseCustomMode) { 6236 if(SiS_Pr->UseCustomMode) {
6422 cr8 = SiS_Pr->CCRT1CRTC[8]; 6237 cr8 = SiS_Pr->CCRT1CRTC[8];
@@ -6429,11 +6244,11 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6429 cr13 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13]; 6244 cr13 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
6430 tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[9]; 6245 tempcx = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[9];
6431 } 6246 }
6432 tempbx = cr8; 6247 tempbx = cr8;
6433 if(cr7 & 0x04) tempbx |= 0x0100; 6248 if(cr7 & 0x04) tempbx |= 0x0100;
6434 if(cr7 & 0x80) tempbx |= 0x0200; 6249 if(cr7 & 0x80) tempbx |= 0x0200;
6435 if(cr13 & 0x08) tempbx |= 0x0400; 6250 if(cr13 & 0x08) tempbx |= 0x0400;
6436 } 6251 }
6437 } 6252 }
6438 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x10,tempbx); /* CRT2 Vertical Retrace Start */ 6253 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x10,tempbx); /* CRT2 Vertical Retrace Start */
6439 6254
@@ -6442,13 +6257,13 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6442 6257
6443 /* 3. Panel delay compensation */ 6258 /* 3. Panel delay compensation */
6444 6259
6445 if(HwInfo->jChipType < SIS_315H) { 6260 if(SiS_Pr->ChipType < SIS_315H) {
6446 6261
6447#ifdef SIS300 /* ---------- 300 series -------------- */ 6262#ifdef SIS300 /* ---------- 300 series -------------- */
6448 6263
6449 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6264 if(SiS_Pr->SiS_VBType & VB_SISVB) {
6450 temp = 0x20; 6265 temp = 0x20;
6451 if(HwInfo->jChipType == SIS_300) { 6266 if(SiS_Pr->ChipType == SIS_300) {
6452 temp = 0x10; 6267 temp = 0x10;
6453 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) temp = 0x2c; 6268 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) temp = 0x2c;
6454 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) temp = 0x20; 6269 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) temp = 0x20;
@@ -6460,24 +6275,23 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6460 if(SiS_Pr->SiS_LCDResInfo == Panel_Custom) temp = 0x2c; 6275 if(SiS_Pr->SiS_LCDResInfo == Panel_Custom) temp = 0x2c;
6461 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x08; 6276 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x08;
6462 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 6277 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
6463 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) temp = 0x2c; 6278 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) temp = 0x2c;
6464 else temp = 0x20; 6279 else temp = 0x20;
6465 } 6280 }
6466 if(SiS_Pr->SiS_UseROM) { 6281 if(SiS_Pr->SiS_UseROM) {
6467 if(ROMAddr[0x220] & 0x80) { 6282 if(ROMAddr[0x220] & 0x80) {
6468 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoYPbPrHiVision) 6283 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoYPbPrHiVision)
6469 temp = ROMAddr[0x221]; 6284 temp = ROMAddr[0x221];
6470 else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) 6285 else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision)
6471 temp = ROMAddr[0x222]; 6286 temp = ROMAddr[0x222];
6472 else if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) 6287 else if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024)
6473 temp = ROMAddr[0x223]; 6288 temp = ROMAddr[0x223];
6474 else 6289 else
6475 temp = ROMAddr[0x224]; 6290 temp = ROMAddr[0x224];
6476 temp &= 0x3c;
6477 } 6291 }
6478 } 6292 }
6479 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 6293 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
6480 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC & 0x3c; 6294 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC;
6481 } 6295 }
6482 6296
6483 } else { 6297 } else {
@@ -6487,15 +6301,17 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6487 } 6301 }
6488 if(SiS_Pr->SiS_UseROM) { 6302 if(SiS_Pr->SiS_UseROM) {
6489 if(ROMAddr[0x220] & 0x80) { 6303 if(ROMAddr[0x220] & 0x80) {
6490 temp = ROMAddr[0x220] & 0x3c; 6304 temp = ROMAddr[0x220];
6491 } 6305 }
6492 } 6306 }
6493 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 6307 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
6494 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC & 0x3c; 6308 if(SiS_Pr->PDC != -1) temp = SiS_Pr->PDC;
6495 } 6309 }
6496 } 6310 }
6497 6311
6498 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* Panel Link Delay Compensation; (Software Command Reset; Power Saving) */ 6312 temp &= 0x3c;
6313
6314 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x13,~0x3C,temp); /* Panel Link Delay Compensation; (Software Command Reset; Power Saving) */
6499 6315
6500#endif /* SIS300 */ 6316#endif /* SIS300 */
6501 6317
@@ -6503,16 +6319,16 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6503 6319
6504#ifdef SIS315H /* --------------- 315/330 series ---------------*/ 6320#ifdef SIS315H /* --------------- 315/330 series ---------------*/
6505 6321
6506 if(HwInfo->jChipType < SIS_661) { 6322 if(SiS_Pr->ChipType < SIS_661) {
6507 6323
6508 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 6324 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
6509 6325
6510 if(HwInfo->jChipType == SIS_740) temp = 0x03; 6326 if(SiS_Pr->ChipType == SIS_740) temp = 0x03;
6511 else temp = 0x00; 6327 else temp = 0x00;
6512 6328
6513 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x0a; 6329 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) temp = 0x0a;
6514 tempbl = 0xF0; 6330 tempbl = 0xF0;
6515 if(HwInfo->jChipType == SIS_650) { 6331 if(SiS_Pr->ChipType == SIS_650) {
6516 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 6332 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
6517 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F; 6333 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) tempbl = 0x0F;
6518 } 6334 }
@@ -6531,10 +6347,10 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6531 6347
6532 } /* < 661 */ 6348 } /* < 661 */
6533 6349
6534 tempax = 0; 6350 tempax = 0;
6535 if(modeflag & DoubleScanMode) tempax |= 0x80; 6351 if(modeflag & DoubleScanMode) tempax |= 0x80;
6536 if(modeflag & HalfDCLK) tempax |= 0x40; 6352 if(modeflag & HalfDCLK) tempax |= 0x40;
6537 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2C,0x3f,tempax); 6353 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2C,0x3f,tempax);
6538 6354
6539#endif /* SIS315H */ 6355#endif /* SIS315H */
6540 6356
@@ -6544,21 +6360,21 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6544 6360
6545 if(SiS_Pr->SiS_VBType & VB_SISVB) { 6361 if(SiS_Pr->SiS_VBType & VB_SISVB) {
6546 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { 6362 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
6547 /* For 301BDH with LCD, we set up the Panel Link */ 6363 /* For 301BDH with LCD, we set up the Panel Link */
6548 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 6364 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6549 } else if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 6365 } else if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
6550 SiS_SetGroup1_301(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 6366 SiS_SetGroup1_301(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6551 } 6367 }
6552 } else { 6368 } else {
6553 if(HwInfo->jChipType < SIS_315H) { 6369 if(SiS_Pr->ChipType < SIS_315H) {
6554 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 6370 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
6555 } else { 6371 } else {
6556 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 6372 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
6557 if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 6373 if((!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) || (SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
6558 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo,ModeIdIndex, HwInfo,RefreshRateTableIndex); 6374 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo,ModeIdIndex,RefreshRateTableIndex);
6559 } 6375 }
6560 } else { 6376 } else {
6561 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo,ModeIdIndex, HwInfo,RefreshRateTableIndex); 6377 SiS_SetGroup1_LVDS(SiS_Pr, ModeNo,ModeIdIndex,RefreshRateTableIndex);
6562 } 6378 }
6563 } 6379 }
6564 } 6380 }
@@ -6569,11 +6385,11 @@ SiS_SetGroup1(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6569/*********************************************/ 6385/*********************************************/
6570 6386
6571#ifdef SIS315H 6387#ifdef SIS315H
6572static UCHAR * 6388static unsigned char *
6573SiS_GetGroup2CLVXPtr(SiS_Private *SiS_Pr, int tabletype, PSIS_HW_INFO HwInfo) 6389SiS_GetGroup2CLVXPtr(struct SiS_Private *SiS_Pr, int tabletype)
6574{ 6390{
6575 const UCHAR *tableptr = NULL; 6391 const unsigned char *tableptr = NULL;
6576 USHORT a, b, p = 0; 6392 unsigned short a, b, p = 0;
6577 6393
6578 a = SiS_Pr->SiS_VGAHDE; 6394 a = SiS_Pr->SiS_VGAHDE;
6579 b = SiS_Pr->SiS_HDE; 6395 b = SiS_Pr->SiS_HDE;
@@ -6606,25 +6422,25 @@ SiS_GetGroup2CLVXPtr(SiS_Private *SiS_Pr, int tabletype, PSIS_HW_INFO HwInfo)
6606 if((tableptr[p] | tableptr[p+1] << 8) == 0xffff) p -= 0x42; 6422 if((tableptr[p] | tableptr[p+1] << 8) == 0xffff) p -= 0x42;
6607 } 6423 }
6608 p += 2; 6424 p += 2;
6609 return((UCHAR *)&tableptr[p]); 6425 return ((unsigned char *)&tableptr[p]);
6610} 6426}
6611 6427
6612static void 6428static void
6613SiS_SetGroup2_C_ELV(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 6429SiS_SetGroup2_C_ELV(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
6614 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 6430 unsigned short RefreshRateTableIndex)
6615{ 6431{
6616 UCHAR *tableptr; 6432 unsigned char *tableptr;
6433 unsigned char temp;
6617 int i, j; 6434 int i, j;
6618 UCHAR temp;
6619 6435
6620 if(!(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302ELV))) return; 6436 if(!(SiS_Pr->SiS_VBType & VB_SISTAP4SCALER)) return;
6621 6437
6622 tableptr = SiS_GetGroup2CLVXPtr(SiS_Pr, 0, HwInfo); 6438 tableptr = SiS_GetGroup2CLVXPtr(SiS_Pr, 0);
6623 for(i = 0x80, j = 0; i <= 0xbf; i++, j++) { 6439 for(i = 0x80, j = 0; i <= 0xbf; i++, j++) {
6624 SiS_SetReg(SiS_Pr->SiS_Part2Port, i, tableptr[j]); 6440 SiS_SetReg(SiS_Pr->SiS_Part2Port, i, tableptr[j]);
6625 } 6441 }
6626 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 6442 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
6627 tableptr = SiS_GetGroup2CLVXPtr(SiS_Pr, 1, HwInfo); 6443 tableptr = SiS_GetGroup2CLVXPtr(SiS_Pr, 1);
6628 for(i = 0xc0, j = 0; i <= 0xff; i++, j++) { 6444 for(i = 0xc0, j = 0; i <= 0xff; i++, j++) {
6629 SiS_SetReg(SiS_Pr->SiS_Part2Port, i, tableptr[j]); 6445 SiS_SetReg(SiS_Pr->SiS_Part2Port, i, tableptr[j]);
6630 } 6446 }
@@ -6635,12 +6451,12 @@ SiS_SetGroup2_C_ELV(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
6635} 6451}
6636 6452
6637static BOOLEAN 6453static BOOLEAN
6638SiS_GetCRT2Part2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex, 6454SiS_GetCRT2Part2Ptr(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex,
6639 USHORT RefreshRateTableIndex,USHORT *CRT2Index, 6455 unsigned short RefreshRateTableIndex,unsigned short *CRT2Index,
6640 USHORT *ResIndex,PSIS_HW_INFO HwInfo) 6456 unsigned short *ResIndex)
6641{ 6457{
6642 6458
6643 if(HwInfo->jChipType < SIS_315H) return FALSE; 6459 if(SiS_Pr->ChipType < SIS_315H) return FALSE;
6644 6460
6645 if(ModeNo <= 0x13) 6461 if(ModeNo <= 0x13)
6646 (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 6462 (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
@@ -6661,82 +6477,79 @@ SiS_GetCRT2Part2Ptr(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex,
6661 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) (*CRT2Index) = 206; 6477 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) (*CRT2Index) = 206;
6662 } 6478 }
6663 } 6479 }
6664 return(((*CRT2Index) != 0)); 6480 return (((*CRT2Index) != 0));
6665} 6481}
6666#endif 6482#endif
6667 6483
6668#ifdef SIS300 6484#ifdef SIS300
6669static void 6485static void
6670SiS_Group2LCDSpecial(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo, USHORT crt2crtc) 6486SiS_Group2LCDSpecial(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short crt2crtc)
6671{ 6487{
6672 USHORT tempcx; 6488 unsigned short tempcx;
6673 const UCHAR atable[] = { 6489 static const unsigned char atable[] = {
6674 0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02, 6490 0xc3,0x9e,0xc3,0x9e,0x02,0x02,0x02,
6675 0xab,0x87,0xab,0x9e,0xe7,0x02,0x02 6491 0xab,0x87,0xab,0x9e,0xe7,0x02,0x02
6676 }; 6492 };
6677 6493
6678 if(!SiS_Pr->UseCustomMode) { 6494 if(!SiS_Pr->UseCustomMode) {
6679 if( ( ( (HwInfo->jChipType == SIS_630) || 6495 if( ( ( (SiS_Pr->ChipType == SIS_630) ||
6680 (HwInfo->jChipType == SIS_730) ) && 6496 (SiS_Pr->ChipType == SIS_730) ) &&
6681 (HwInfo->jChipRevision > 2) ) && 6497 (SiS_Pr->ChipRevision > 2) ) &&
6682 (SiS_Pr->SiS_LCDResInfo == Panel_1024x768) && 6498 (SiS_Pr->SiS_LCDResInfo == Panel_1024x768) &&
6683 (!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) && 6499 (!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) &&
6684 (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ) { 6500 (!(SiS_Pr->SiS_LCDInfo & DontExpandLCD)) ) {
6685 if(ModeNo == 0x13) { 6501 if(ModeNo == 0x13) {
6686 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,0xB9); 6502 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,0xB9);
6687 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,0xCC); 6503 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,0xCC);
6688 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,0xA6); 6504 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,0xA6);
6689 } else { 6505 } else if((crt2crtc & 0x3F) == 4) {
6690 if((crt2crtc & 0x3F) == 4) { 6506 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x2B);
6691 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x2B); 6507 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x13);
6692 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x13); 6508 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,0xE5);
6693 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,0xE5); 6509 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,0x08);
6694 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,0x08); 6510 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,0xE2);
6695 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,0xE2); 6511 }
6696 }
6697 }
6698 } 6512 }
6699 6513
6700 if(HwInfo->jChipType < SIS_315H) { 6514 if(SiS_Pr->ChipType < SIS_315H) {
6701 if(SiS_Pr->SiS_LCDTypeInfo == 0x0c) { 6515 if(SiS_Pr->SiS_LCDTypeInfo == 0x0c) {
6702 crt2crtc &= 0x1f; 6516 crt2crtc &= 0x1f;
6703 tempcx = 0; 6517 tempcx = 0;
6704 if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) { 6518 if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) {
6705 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 6519 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
6706 tempcx += 7; 6520 tempcx += 7;
6707 } 6521 }
6708 } 6522 }
6709 tempcx += crt2crtc; 6523 tempcx += crt2crtc;
6710 if(crt2crtc >= 4) { 6524 if(crt2crtc >= 4) {
6711 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,0xff); 6525 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,0xff);
6712 } 6526 }
6713 6527
6714 if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) { 6528 if(!(SiS_Pr->SiS_VBInfo & SetNotSimuMode)) {
6715 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 6529 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
6716 if(crt2crtc == 4) { 6530 if(crt2crtc == 4) {
6717 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x28); 6531 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x28);
6718 } 6532 }
6719 } 6533 }
6720 } 6534 }
6721 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x18); 6535 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x18);
6722 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,atable[tempcx]); 6536 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,atable[tempcx]);
6723 } 6537 }
6724 } 6538 }
6725 } 6539 }
6726} 6540}
6727 6541
6728/* For ECS A907. Highly preliminary. */ 6542/* For ECS A907. Highly preliminary. */
6729static void 6543static void
6730SiS_Set300Part2Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 6544SiS_Set300Part2Regs(struct SiS_Private *SiS_Pr, unsigned short ModeIdIndex, unsigned short RefreshRateTableIndex,
6731 USHORT ModeIdIndex, USHORT RefreshRateTableIndex, 6545 unsigned short ModeNo)
6732 USHORT ModeNo)
6733{ 6546{
6734 USHORT crt2crtc, resindex; 6547 const struct SiS_Part2PortTbl *CRT2Part2Ptr = NULL;
6735 int i,j; 6548 unsigned short crt2crtc, resindex;
6736 const SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL; 6549 int i, j;
6737 6550
6738 if(HwInfo->jChipType != SIS_300) return; 6551 if(SiS_Pr->ChipType != SIS_300) return;
6739 if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) return; 6552 if(!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) return;
6740 if(SiS_Pr->UseCustomMode) return; 6553 if(SiS_Pr->UseCustomMode) return;
6741 6554
6742 if(ModeNo <= 0x13) { 6555 if(ModeNo <= 0x13) {
@@ -6758,13 +6571,13 @@ SiS_Set300Part2Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
6758 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]); 6571 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
6759 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]); 6572 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x02,0x80,(CRT2Part2Ptr+resindex)->CR[1]);
6760 for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) { 6573 for(i = 2, j = 0x04; j <= 0x06; i++, j++ ) {
6761 SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); 6574 SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
6762 } 6575 }
6763 for(j = 0x1c; j <= 0x1d; i++, j++ ) { 6576 for(j = 0x1c; j <= 0x1d; i++, j++ ) {
6764 SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); 6577 SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
6765 } 6578 }
6766 for(j = 0x1f; j <= 0x21; i++, j++ ) { 6579 for(j = 0x1f; j <= 0x21; i++, j++ ) {
6767 SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]); 6580 SiS_SetReg(SiS_Pr->SiS_Part2Port,j,(CRT2Part2Ptr+resindex)->CR[i]);
6768 } 6581 }
6769 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]); 6582 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x23,(CRT2Part2Ptr+resindex)->CR[10]);
6770 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]); 6583 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x25,0x0f,(CRT2Part2Ptr+resindex)->CR[11]);
@@ -6772,15 +6585,15 @@ SiS_Set300Part2Regs(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
6772#endif 6585#endif
6773 6586
6774static void 6587static void
6775SiS_SetTVSpecial(SiS_Private *SiS_Pr, USHORT ModeNo) 6588SiS_SetTVSpecial(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
6776{ 6589{
6777 if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) return; 6590 if(!(SiS_Pr->SiS_VBType & VB_SIS30xBLV)) return;
6778 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision)) return; 6591 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision)) return;
6779 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p)) return; 6592 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p)) return;
6780 6593
6781 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) { 6594 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) {
6782 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) { 6595 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) {
6783 const UCHAR specialtv[] = { 6596 const unsigned char specialtv[] = {
6784 0xa7,0x07,0xf2,0x6e,0x17,0x8b,0x73,0x53, 6597 0xa7,0x07,0xf2,0x6e,0x17,0x8b,0x73,0x53,
6785 0x13,0x40,0x34,0xf4,0x63,0xbb,0xcc,0x7a, 6598 0x13,0x40,0x34,0xf4,0x63,0xbb,0xcc,0x7a,
6786 0x58,0xe4,0x73,0xda,0x13 6599 0x58,0xe4,0x73,0xda,0x13
@@ -6813,16 +6626,16 @@ SiS_SetTVSpecial(SiS_Private *SiS_Pr, USHORT ModeNo)
6813} 6626}
6814 6627
6815static void 6628static void
6816SiS_SetGroup2_Tail(SiS_Private *SiS_Pr, USHORT ModeNo) 6629SiS_SetGroup2_Tail(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
6817{ 6630{
6818 USHORT temp; 6631 unsigned short temp;
6819 6632
6820 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) { 6633 if(!(SiS_Pr->SiS_SetFlag & LCDVESATiming)) {
6821 if(SiS_Pr->SiS_VGAVDE == 525) { 6634 if(SiS_Pr->SiS_VGAVDE == 525) {
6822 temp = 0xc3; 6635 temp = 0xc3;
6823 if(SiS_Pr->SiS_ModeType <= ModeVGA) { 6636 if(SiS_Pr->SiS_ModeType <= ModeVGA) {
6824 temp++; 6637 temp++;
6825 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) temp += 2; 6638 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) temp += 2;
6826 } 6639 }
6827 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2f,temp); 6640 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2f,temp);
6828 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x30,0xb3); 6641 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x30,0xb3);
@@ -6830,7 +6643,7 @@ SiS_SetGroup2_Tail(SiS_Private *SiS_Pr, USHORT ModeNo)
6830 temp = 0x4d; 6643 temp = 0x4d;
6831 if(SiS_Pr->SiS_ModeType <= ModeVGA) { 6644 if(SiS_Pr->SiS_ModeType <= ModeVGA) {
6832 temp++; 6645 temp++;
6833 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) temp++; 6646 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) temp++;
6834 } 6647 }
6835 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2f,temp); 6648 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2f,temp);
6836 } 6649 }
@@ -6838,7 +6651,7 @@ SiS_SetGroup2_Tail(SiS_Private *SiS_Pr, USHORT ModeNo)
6838 6651
6839 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 6652 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
6840 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) { 6653 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) {
6841 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { 6654 if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
6842 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x1a,0x03); 6655 SiS_SetRegOR(SiS_Pr->SiS_Part2Port,0x1a,0x03);
6843 /* Not always for LV, see SetGrp2 */ 6656 /* Not always for LV, see SetGrp2 */
6844 } 6657 }
@@ -6872,17 +6685,17 @@ SiS_SetGroup2_Tail(SiS_Private *SiS_Pr, USHORT ModeNo)
6872} 6685}
6873 6686
6874static void 6687static void
6875SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT RefreshRateTableIndex, 6688SiS_SetGroup2(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
6876 PSIS_HW_INFO HwInfo) 6689 unsigned short RefreshRateTableIndex)
6877{ 6690{
6878 USHORT i, j, tempax, tempbx, tempcx, tempch, tempcl, temp; 6691 unsigned short i, j, tempax, tempbx, tempcx, tempch, tempcl, temp;
6879 USHORT push2, modeflag, crt2crtc, bridgeoffset; 6692 unsigned short push2, modeflag, crt2crtc, bridgeoffset;
6880 ULONG longtemp; 6693 unsigned int longtemp, PhaseIndex;
6881 const UCHAR *PhasePoint; 6694 BOOLEAN newtvphase;
6882 const UCHAR *TimingPoint; 6695 const unsigned char *TimingPoint;
6883#ifdef SIS315H 6696#ifdef SIS315H
6884 USHORT resindex, CRT2Index; 6697 unsigned short resindex, CRT2Index;
6885 const SiS_Part2PortTblStruct *CRT2Part2Ptr = NULL; 6698 const struct SiS_Part2PortTbl *CRT2Part2Ptr = NULL;
6886 6699
6887 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return; 6700 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return;
6888#endif 6701#endif
@@ -6908,9 +6721,16 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
6908 6721
6909 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x00,temp); 6722 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x00,temp);
6910 6723
6911 PhasePoint = SiS_Pr->SiS_PALPhase; 6724 PhaseIndex = 0x01; /* SiS_PALPhase */
6912 TimingPoint = SiS_Pr->SiS_PALTiming; 6725 TimingPoint = SiS_Pr->SiS_PALTiming;
6913 6726
6727 newtvphase = FALSE;
6728 if( (SiS_Pr->SiS_VBType & VB_SIS30xBLV) &&
6729 ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
6730 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) {
6731 newtvphase = TRUE;
6732 }
6733
6914 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 6734 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
6915 6735
6916 TimingPoint = SiS_Pr->SiS_HiTVExtTiming; 6736 TimingPoint = SiS_Pr->SiS_HiTVExtTiming;
@@ -6918,82 +6738,54 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
6918 TimingPoint = SiS_Pr->SiS_HiTVSt2Timing; 6738 TimingPoint = SiS_Pr->SiS_HiTVSt2Timing;
6919 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) { 6739 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
6920 TimingPoint = SiS_Pr->SiS_HiTVSt1Timing; 6740 TimingPoint = SiS_Pr->SiS_HiTVSt1Timing;
6921#if 0
6922 if(!(modeflag & Charx8Dot)) TimingPoint = SiS_Pr->SiS_HiTVTextTiming;
6923#endif
6924 } 6741 }
6925 } 6742 }
6926 6743
6927 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) { 6744 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
6928 6745
6929 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) TimingPoint = &SiS_YPbPrTable[2][0]; 6746 i = 0;
6930 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) TimingPoint = &SiS_YPbPrTable[1][0]; 6747 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) i = 2;
6931 else TimingPoint = &SiS_YPbPrTable[0][0]; 6748 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) i = 1;
6749
6750 TimingPoint = &SiS_YPbPrTable[i][0];
6932 6751
6933 PhasePoint = SiS_Pr->SiS_NTSCPhase; 6752 PhaseIndex = 0x00; /* SiS_NTSCPhase */
6934 6753
6935 } else if(SiS_Pr->SiS_TVMode & TVSetPAL) { 6754 } else if(SiS_Pr->SiS_TVMode & TVSetPAL) {
6936 6755
6937 if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && 6756 if(newtvphase) PhaseIndex = 0x09; /* SiS_PALPhase2 */
6938 ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
6939 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) {
6940 PhasePoint = SiS_Pr->SiS_PALPhase2;
6941 }
6942 6757
6943 } else { 6758 } else {
6944 6759
6945 TimingPoint = SiS_Pr->SiS_NTSCTiming; 6760 TimingPoint = SiS_Pr->SiS_NTSCTiming;
6946 PhasePoint = SiS_Pr->SiS_NTSCPhase; 6761 PhaseIndex = (SiS_Pr->SiS_TVMode & TVSetNTSCJ) ? 0x01 : 0x00; /* SiS_PALPhase : SiS_NTSCPhase */
6947 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) { 6762 if(newtvphase) PhaseIndex += 8; /* SiS_PALPhase2 : SiS_NTSCPhase2 */
6948 PhasePoint = SiS_Pr->SiS_PALPhase;
6949 }
6950
6951 if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) &&
6952 ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
6953 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) {
6954 PhasePoint = SiS_Pr->SiS_NTSCPhase2;
6955 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) {
6956 PhasePoint = SiS_Pr->SiS_PALPhase2;
6957 }
6958 }
6959
6960 }
6961 6763
6962 if(SiS_Pr->SiS_TVMode & TVSetPALM) {
6963 PhasePoint = SiS_Pr->SiS_PALMPhase;
6964 if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) &&
6965 ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
6966 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) {
6967 PhasePoint = SiS_Pr->SiS_PALMPhase2;
6968 }
6969 } 6764 }
6970 6765
6971 if(SiS_Pr->SiS_TVMode & TVSetPALN) { 6766 if(SiS_Pr->SiS_TVMode & (TVSetPALM | TVSetPALN)) {
6972 PhasePoint = SiS_Pr->SiS_PALNPhase; 6767 PhaseIndex = (SiS_Pr->SiS_TVMode & TVSetPALM) ? 0x02 : 0x03; /* SiS_PALMPhase : SiS_PALNPhase */
6973 if( (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && 6768 if(newtvphase) PhaseIndex += 8; /* SiS_PALMPhase2 : SiS_PALNPhase2 */
6974 ( (!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
6975 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode) ) ) {
6976 PhasePoint = SiS_Pr->SiS_PALNPhase2;
6977 }
6978 } 6769 }
6979 6770
6980 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) { 6771 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) {
6981 PhasePoint = SiS_Pr->SiS_SpecialPhase;
6982 if(SiS_Pr->SiS_TVMode & TVSetPALM) { 6772 if(SiS_Pr->SiS_TVMode & TVSetPALM) {
6983 PhasePoint = SiS_Pr->SiS_SpecialPhaseM; 6773 PhaseIndex = 0x05; /* SiS_SpecialPhaseM */
6984 } else if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) { 6774 } else if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) {
6985 PhasePoint = SiS_Pr->SiS_SpecialPhaseJ; 6775 PhaseIndex = 0x11; /* SiS_SpecialPhaseJ */
6776 } else {
6777 PhaseIndex = 0x10; /* SiS_SpecialPhase */
6986 } 6778 }
6987 } 6779 }
6988 6780
6989 for(i=0x31, j=0; i<=0x34; i++, j++) { 6781 for(i = 0x31, j = 0; i <= 0x34; i++, j++) {
6990 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,PhasePoint[j]); 6782 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS_TVPhase[(PhaseIndex * 4) + j]);
6991 } 6783 }
6992 6784
6993 for(i=0x01, j=0; i<=0x2D; i++, j++) { 6785 for(i = 0x01, j = 0; i <= 0x2D; i++, j++) {
6994 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]); 6786 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]);
6995 } 6787 }
6996 for(i=0x39; i<=0x45; i++, j++) { 6788 for(i = 0x39; i <= 0x45; i++, j++) {
6997 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]); 6789 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]);
6998 } 6790 }
6999 6791
@@ -7010,28 +6802,32 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7010 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x37,SiS_Pr->SiS_RY3COE); 6802 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x37,SiS_Pr->SiS_RY3COE);
7011 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x38,SiS_Pr->SiS_RY4COE); 6803 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x38,SiS_Pr->SiS_RY4COE);
7012 6804
7013 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) tempax = 950; 6805 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) tempax = 950;
7014 else if(SiS_Pr->SiS_TVMode & TVSetPAL) tempax = 520; 6806 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) tempax = 680;
7015 else tempax = 440; /* NTSC, YPbPr 525, 750 */ 6807 else if(SiS_Pr->SiS_TVMode & TVSetPAL) tempax = 520;
6808 else tempax = 440; /* NTSC, YPbPr 525 */
7016 6809
7017 if( ( (!(SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision)) && (SiS_Pr->SiS_VDE <= tempax) ) || 6810 if( ((SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) && (SiS_Pr->SiS_VDE <= tempax)) ||
7018 ( (SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision) && 6811 ( (SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoHiVision) &&
7019 ((SiS_Pr->SiS_VGAHDE == 1024) || (SiS_Pr->SiS_VDE <= tempax)) ) ) { 6812 ((SiS_Pr->SiS_VGAHDE == 1024) || (SiS_Pr->SiS_VDE <= tempax)) ) ) {
7020 6813
7021 tempax -= SiS_Pr->SiS_VDE; 6814 tempax -= SiS_Pr->SiS_VDE;
7022 tempax >>= 2; 6815 tempax >>= 1;
6816 if(!(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p))) {
6817 tempax >>= 1;
6818 }
7023 tempax &= 0x00ff; 6819 tempax &= 0x00ff;
7024 6820
7025 temp = tempax + (USHORT)TimingPoint[0]; 6821 temp = tempax + (unsigned short)TimingPoint[0];
7026 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp); 6822 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp);
7027 6823
7028 temp = tempax + (USHORT)TimingPoint[1]; 6824 temp = tempax + (unsigned short)TimingPoint[1];
7029 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,temp); 6825 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,temp);
7030 6826
7031 if((SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoYPbPrHiVision) && (SiS_Pr->SiS_VGAHDE >= 1024)) { 6827 if((SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoYPbPrHiVision) && (SiS_Pr->SiS_VGAHDE >= 1024)) {
7032 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 6828 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
7033 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x1b); /* 19 */ 6829 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x1b);
7034 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x54); /* 52 */ 6830 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x54);
7035 } else { 6831 } else {
7036 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x17); 6832 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,0x17);
7037 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x1d); 6833 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x02,0x1d);
@@ -7041,14 +6837,14 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7041 } 6837 }
7042 6838
7043 tempcx = SiS_Pr->SiS_HT; 6839 tempcx = SiS_Pr->SiS_HT;
7044 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempcx >>= 1; 6840 if(SiS_IsDualLink(SiS_Pr)) tempcx >>= 1;
7045 tempcx--; 6841 tempcx--;
7046 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) tempcx--; 6842 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) tempcx--;
7047 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1B,tempcx); 6843 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1B,tempcx);
7048 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0xF0,((tempcx >> 8) & 0x0f)); 6844 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0xF0,((tempcx >> 8) & 0x0f));
7049 6845
7050 tempcx = SiS_Pr->SiS_HT >> 1; 6846 tempcx = SiS_Pr->SiS_HT >> 1;
7051 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempcx >>= 1; 6847 if(SiS_IsDualLink(SiS_Pr)) tempcx >>= 1;
7052 tempcx += 7; 6848 tempcx += 7;
7053 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) tempcx -= 4; 6849 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) tempcx -= 4;
7054 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x22,0x0F,((tempcx << 4) & 0xf0)); 6850 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x22,0x0F,((tempcx << 4) & 0xf0));
@@ -7075,7 +6871,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7075 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2A,0x0F,((tempcx << 4) & 0xf0)); 6871 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2A,0x0F,((tempcx << 4) & 0xf0));
7076 6872
7077 tempcx = SiS_Pr->SiS_HT >> 1; 6873 tempcx = SiS_Pr->SiS_HT >> 1;
7078 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempcx >>= 1; 6874 if(SiS_IsDualLink(SiS_Pr)) tempcx >>= 1;
7079 j += 2; 6875 j += 2;
7080 tempcx -= (TimingPoint[j] | ((TimingPoint[j+1]) << 8)); 6876 tempcx -= (TimingPoint[j] | ((TimingPoint[j+1]) << 8));
7081 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2D,0x0F,((tempcx << 4) & 0xf0)); 6877 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2D,0x0F,((tempcx << 4) & 0xf0));
@@ -7094,7 +6890,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7094 } else if( (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && 6890 } else if( (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) &&
7095 (!(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p|TVSetYPbPr750p))) ) { 6891 (!(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p|TVSetYPbPr750p))) ) {
7096 tempbx >>= 1; 6892 tempbx >>= 1;
7097 if(HwInfo->jChipType >= SIS_315H) { 6893 if(SiS_Pr->ChipType >= SIS_315H) {
7098 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) { 6894 if(SiS_Pr->SiS_TVMode & TVSetTVSimuMode) {
7099 if((ModeNo <= 0x13) && (crt2crtc == 1)) tempbx++; 6895 if((ModeNo <= 0x13) && (crt2crtc == 1)) tempbx++;
7100 } else if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 6896 } else if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
@@ -7123,23 +6919,11 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7123 } 6919 }
7124 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x30,temp); 6920 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x30,temp);
7125 6921
7126 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302LV | VB_SIS302ELV)) { 6922 if(SiS_Pr->SiS_VBType & VB_SISPART4OVERFLOW) {
7127 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x10,0xdf,((tempbx & 0x0400) >> 5)); 6923 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x10,0xdf,((tempbx & 0x0400) >> 5));
7128 } 6924 }
7129 6925
7130#if 0 6926 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
7131 /* TEST qqqq */
7132 if(SiS_Pr->SiS_VBInfo & SetCRT2ToYPbPr525750) {
7133 for(i=0x01, j=0; i<=0x2D; i++, j++) {
7134 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]);
7135 }
7136 for(i=0x39; i<=0x45; i++, j++) {
7137 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,TimingPoint[j]);
7138 }
7139 }
7140#endif
7141
7142 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) {
7143 tempbx = SiS_Pr->SiS_VDE; 6927 tempbx = SiS_Pr->SiS_VDE;
7144 if( (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) && 6928 if( (SiS_Pr->SiS_VBInfo & SetCRT2ToTV) &&
7145 (!(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p))) ) { 6929 (!(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p))) ) {
@@ -7150,7 +6934,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7150 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x46,temp); 6934 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x46,temp);
7151 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x47,tempbx); 6935 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x47,tempbx);
7152 6936
7153 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302LV | VB_SIS302ELV)) { 6937 if(SiS_Pr->SiS_VBType & VB_SISPART4OVERFLOW) {
7154 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x10,0xbf,((tempbx & 0x0400) >> 4)); 6938 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x10,0xbf,((tempbx & 0x0400) >> 4));
7155 } 6939 }
7156 } 6940 }
@@ -7165,14 +6949,17 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7165 6949
7166 tempch = tempcl = 0x01; 6950 tempch = tempcl = 0x01;
7167 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 6951 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
7168 if(SiS_Pr->SiS_VGAHDE >= 1024) { 6952 if(SiS_Pr->SiS_VGAHDE >= 960) {
7169 if((!(modeflag & HalfDCLK)) || (HwInfo->jChipType < SIS_315H)) { 6953 if((!(modeflag & HalfDCLK)) || (SiS_Pr->ChipType < SIS_315H)) {
7170 tempch = 0x19;
7171 tempcl = 0x20; 6954 tempcl = 0x20;
7172 if(SiS_Pr->SiS_VGAHDE >= 1280) { 6955 if(SiS_Pr->SiS_VGAHDE >= 1280) {
7173 tempch = 0x14; 6956 tempch = 20;
7174 tempbx &= ~0x20; 6957 tempbx &= ~0x20;
7175 } 6958 } else if(SiS_Pr->SiS_VGAHDE >= 1024) {
6959 tempch = 25;
6960 } else {
6961 tempch = 25; /* OK */
6962 }
7176 } 6963 }
7177 } 6964 }
7178 } 6965 }
@@ -7180,7 +6967,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7180 if(!(tempbx & 0x20)) { 6967 if(!(tempbx & 0x20)) {
7181 if(modeflag & HalfDCLK) tempcl <<= 1; 6968 if(modeflag & HalfDCLK) tempcl <<= 1;
7182 longtemp = ((SiS_Pr->SiS_VGAHDE * tempch) / tempcl) << 13; 6969 longtemp = ((SiS_Pr->SiS_VGAHDE * tempch) / tempcl) << 13;
7183 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) longtemp <<= 3; 6970 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) longtemp <<= 3;
7184 tempax = longtemp / SiS_Pr->SiS_HDE; 6971 tempax = longtemp / SiS_Pr->SiS_HDE;
7185 if(longtemp % SiS_Pr->SiS_HDE) tempax++; 6972 if(longtemp % SiS_Pr->SiS_HDE) tempax++;
7186 tempbx |= ((tempax >> 8) & 0x1F); 6973 tempbx |= ((tempax >> 8) & 0x1F);
@@ -7190,7 +6977,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7190 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x44,tempax); 6977 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x44,tempax);
7191 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x45,0xC0,tempbx); 6978 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x45,0xC0,tempbx);
7192 6979
7193 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 6980 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
7194 6981
7195 tempcx &= 0x07; 6982 tempcx &= 0x07;
7196 if(tempbx & 0x20) tempcx = 0; 6983 if(tempbx & 0x20) tempcx = 0;
@@ -7219,7 +7006,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7219 7006
7220 SiS_SetTVSpecial(SiS_Pr, ModeNo); 7007 SiS_SetTVSpecial(SiS_Pr, ModeNo);
7221 7008
7222 if(SiS_Pr->SiS_VBType & VB_SIS301C) { 7009 if(SiS_Pr->SiS_VBType & VB_SIS30xCLV) {
7223 temp = 0; 7010 temp = 0;
7224 if(SiS_Pr->SiS_TVMode & TVSetPALM) temp = 8; 7011 if(SiS_Pr->SiS_TVMode & TVSetPALM) temp = 8;
7225 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xf7,temp); 7012 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x4e,0xf7,temp);
@@ -7246,7 +7033,7 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7246 /* From here: Part2 LCD setup */ 7033 /* From here: Part2 LCD setup */
7247 7034
7248 tempbx = SiS_Pr->SiS_HDE; 7035 tempbx = SiS_Pr->SiS_HDE;
7249 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempbx >>= 1; 7036 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7250 tempbx--; /* RHACTE = HDE - 1 */ 7037 tempbx--; /* RHACTE = HDE - 1 */
7251 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2C,tempbx); 7038 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x2C,tempbx);
7252 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2B,0x0F,((tempbx >> 4) & 0xf0)); 7039 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2B,0x0F,((tempbx >> 4) & 0xf0));
@@ -7256,10 +7043,8 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7256 if(SiS_Pr->SiS_ModeType == ModeEGA) { 7043 if(SiS_Pr->SiS_ModeType == ModeEGA) {
7257 if(SiS_Pr->SiS_VGAHDE >= 1024) { 7044 if(SiS_Pr->SiS_VGAHDE >= 1024) {
7258 temp = 0x02; 7045 temp = 0x02;
7259 if(HwInfo->jChipType >= SIS_315H) { 7046 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) {
7260 if(SiS_Pr->SiS_SetFlag & LCDVESATiming) { 7047 temp = 0x01;
7261 temp = 0x01;
7262 }
7263 } 7048 }
7264 } 7049 }
7265 } 7050 }
@@ -7289,11 +7074,11 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7289 7074
7290#ifdef SIS315H 7075#ifdef SIS315H
7291 if(SiS_GetCRT2Part2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 7076 if(SiS_GetCRT2Part2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
7292 &CRT2Index, &resindex, HwInfo)) { 7077 &CRT2Index, &resindex)) {
7293 switch(CRT2Index) { 7078 switch(CRT2Index) {
7079 case 206: CRT2Part2Ptr = SiS310_CRT2Part2_Asus1024x768_3; break;
7080 default:
7294 case 200: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1; break; 7081 case 200: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_1; break;
7295 case 206: CRT2Part2Ptr = SiS310_CRT2Part2_Asus1024x768_3; break;
7296 default: CRT2Part2Ptr = SiS_Pr->SiS_CRT2Part2_1024x768_3; break;
7297 } 7082 }
7298 7083
7299 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]); 7084 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x01,0x80,(CRT2Part2Ptr+resindex)->CR[0]);
@@ -7312,7 +7097,6 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7312 7097
7313 SiS_SetGroup2_Tail(SiS_Pr, ModeNo); 7098 SiS_SetGroup2_Tail(SiS_Pr, ModeNo);
7314 7099
7315
7316 } else { 7100 } else {
7317#endif 7101#endif
7318 7102
@@ -7349,9 +7133,11 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7349 7133
7350 /* Non-expanding: lcdvdes = tempcx = VT-1; lcdvdee = tempbx = VDE-1 */ 7134 /* Non-expanding: lcdvdes = tempcx = VT-1; lcdvdee = tempbx = VDE-1 */
7351 7135
7136#ifdef SIS_XORG_XF86
7352#ifdef TWDEBUG 7137#ifdef TWDEBUG
7353 xf86DrvMsg(0, X_INFO, "lcdvdes 0x%x lcdvdee 0x%x\n", tempcx, tempbx); 7138 xf86DrvMsg(0, X_INFO, "lcdvdes 0x%x lcdvdee 0x%x\n", tempcx, tempbx);
7354#endif 7139#endif
7140#endif
7355 7141
7356 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,tempcx); /* lcdvdes */ 7142 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x05,tempcx); /* lcdvdes */
7357 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,tempbx); /* lcdvdee */ 7143 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x06,tempbx); /* lcdvdee */
@@ -7401,9 +7187,11 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7401 tempbx = SiS_Pr->CVSyncStart; 7187 tempbx = SiS_Pr->CVSyncStart;
7402 } 7188 }
7403 7189
7190#ifdef SIS_XORG_XF86
7404#ifdef TWDEBUG 7191#ifdef TWDEBUG
7405 xf86DrvMsg(0, X_INFO, "lcdvrs 0x%x\n", tempbx); 7192 xf86DrvMsg(0, X_INFO, "lcdvrs 0x%x\n", tempbx);
7406#endif 7193#endif
7194#endif
7407 7195
7408 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,tempbx); /* lcdvrs */ 7196 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x04,tempbx); /* lcdvrs */
7409 7197
@@ -7416,26 +7204,30 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7416 temp |= (SiS_Pr->CVSyncEnd & 0x0f); 7204 temp |= (SiS_Pr->CVSyncEnd & 0x0f);
7417 } 7205 }
7418 7206
7207#ifdef SIS_XORG_XF86
7419#ifdef TWDEBUG 7208#ifdef TWDEBUG
7420 xf86DrvMsg(0, X_INFO, "lcdvre[3:0] 0x%x\n", (temp & 0x0f)); 7209 xf86DrvMsg(0, X_INFO, "lcdvre[3:0] 0x%x\n", (temp & 0x0f));
7421#endif 7210#endif
7211#endif
7422 7212
7423 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp); 7213 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x01,temp);
7424 7214
7425#ifdef SIS300 7215#ifdef SIS300
7426 SiS_Group2LCDSpecial(SiS_Pr, HwInfo, ModeNo, crt2crtc); 7216 SiS_Group2LCDSpecial(SiS_Pr, ModeNo, crt2crtc);
7427#endif 7217#endif
7428 7218
7429 bridgeoffset = 7; 7219 bridgeoffset = 7;
7430 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) bridgeoffset += 2; 7220 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) bridgeoffset += 2;
7431 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302ELV)) bridgeoffset++; 7221 if(SiS_Pr->SiS_VBType & VB_SIS30xCLV) bridgeoffset += 2; /* OK for Averatec 1280x800 (301C) */
7432 if(SiS_IsDualLink(SiS_Pr, HwInfo)) bridgeoffset++; 7222 if(SiS_IsDualLink(SiS_Pr)) bridgeoffset++;
7223 else if(SiS_Pr->SiS_VBType & VB_SIS302LV) bridgeoffset++; /* OK for Asus A4L 1280x800 */
7224 /* Higher bridgeoffset shifts to the LEFT */
7433 7225
7434 temp = 0; 7226 temp = 0;
7435 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) { 7227 if((SiS_Pr->SiS_LCDInfo & DontExpandLCD) && (!(SiS_Pr->SiS_LCDInfo & LCDPass11))) {
7436 if(SiS_Pr->PanelXRes != SiS_Pr->SiS_HDE) { 7228 if(SiS_Pr->PanelXRes != SiS_Pr->SiS_HDE) {
7437 temp = SiS_Pr->SiS_HT - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_HDE) / 2); 7229 temp = SiS_Pr->SiS_HT - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_HDE) / 2);
7438 if(SiS_IsDualLink(SiS_Pr, HwInfo)) temp >>= 1; 7230 if(SiS_IsDualLink(SiS_Pr)) temp >>= 1;
7439 } 7231 }
7440 } 7232 }
7441 temp += bridgeoffset; 7233 temp += bridgeoffset;
@@ -7450,15 +7242,17 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7450 tempbx = SiS_Pr->PanelXRes - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_HDE) / 2); 7242 tempbx = SiS_Pr->PanelXRes - ((SiS_Pr->PanelXRes - SiS_Pr->SiS_HDE) / 2);
7451 } 7243 }
7452 } 7244 }
7453 if(SiS_IsDualLink(SiS_Pr, HwInfo)) { 7245 if(SiS_IsDualLink(SiS_Pr)) {
7454 tempcx >>= 1; 7246 tempcx >>= 1;
7455 tempbx >>= 1; 7247 tempbx >>= 1;
7456 tempax >>= 1; 7248 tempax >>= 1;
7457 } 7249 }
7458 7250
7251#ifdef SIS_XORG_XF86
7459#ifdef TWDEBUG 7252#ifdef TWDEBUG
7460 xf86DrvMsg(0, X_INFO, "lcdhdee 0x%x\n", tempbx); 7253 xf86DrvMsg(0, X_INFO, "lcdhdee 0x%x\n", tempbx);
7461#endif 7254#endif
7255#endif
7462 7256
7463 tempbx += bridgeoffset; 7257 tempbx += bridgeoffset;
7464 7258
@@ -7480,13 +7274,16 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7480 7274
7481 if(SiS_Pr->UseCustomMode) { 7275 if(SiS_Pr->UseCustomMode) {
7482 tempbx = SiS_Pr->CHSyncStart; 7276 tempbx = SiS_Pr->CHSyncStart;
7483 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempbx >>= 1; 7277 if(modeflag & HalfDCLK) tempbx <<= 1;
7278 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7484 tempbx += bridgeoffset; 7279 tempbx += bridgeoffset;
7485 } 7280 }
7486 7281
7282#ifdef SIS_XORG_XF86
7487#ifdef TWDEBUG 7283#ifdef TWDEBUG
7488 xf86DrvMsg(0, X_INFO, "lcdhrs 0x%x\n", tempbx); 7284 xf86DrvMsg(0, X_INFO, "lcdhrs 0x%x\n", tempbx);
7489#endif 7285#endif
7286#endif
7490 7287
7491 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1C,tempbx); /* lcdhrs */ 7288 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1C,tempbx); /* lcdhrs */
7492 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0x0F,((tempbx >> 4) & 0xf0)); 7289 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x1D,0x0F,((tempbx >> 4) & 0xf0));
@@ -7501,20 +7298,23 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7501 7298
7502 if(SiS_Pr->UseCustomMode) { 7299 if(SiS_Pr->UseCustomMode) {
7503 tempbx = SiS_Pr->CHSyncEnd; 7300 tempbx = SiS_Pr->CHSyncEnd;
7504 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempbx >>= 1; 7301 if(modeflag & HalfDCLK) tempbx <<= 1;
7302 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7505 tempbx += bridgeoffset; 7303 tempbx += bridgeoffset;
7506 } 7304 }
7507 7305
7306#ifdef SIS_XORG_XF86
7508#ifdef TWDEBUG 7307#ifdef TWDEBUG
7509 xf86DrvMsg(0, X_INFO, "lcdhre 0x%x\n", tempbx); 7308 xf86DrvMsg(0, X_INFO, "lcdhre 0x%x\n", tempbx);
7510#endif 7309#endif
7310#endif
7511 7311
7512 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x21,tempbx); /* lcdhre */ 7312 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x21,tempbx); /* lcdhre */
7513 7313
7514 SiS_SetGroup2_Tail(SiS_Pr, ModeNo); 7314 SiS_SetGroup2_Tail(SiS_Pr, ModeNo);
7515 7315
7516#ifdef SIS300 7316#ifdef SIS300
7517 SiS_Set300Part2Regs(SiS_Pr, HwInfo, ModeIdIndex, RefreshRateTableIndex, ModeNo); 7317 SiS_Set300Part2Regs(SiS_Pr, ModeIdIndex, RefreshRateTableIndex, ModeNo);
7518#endif 7318#endif
7519#ifdef SIS315H 7319#ifdef SIS315H
7520 } /* CRT2-LCD from table */ 7320 } /* CRT2-LCD from table */
@@ -7526,11 +7326,10 @@ SiS_SetGroup2(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,USHORT Refr
7526/*********************************************/ 7326/*********************************************/
7527 7327
7528static void 7328static void
7529SiS_SetGroup3(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7329SiS_SetGroup3(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
7530 PSIS_HW_INFO HwInfo)
7531{ 7330{
7532 USHORT i; 7331 unsigned short i;
7533 const UCHAR *tempdi; 7332 const unsigned char *tempdi;
7534 7333
7535 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return; 7334 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return;
7536 7335
@@ -7570,7 +7369,7 @@ SiS_SetGroup3(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7570 for(i=0; i<=0x3E; i++) { 7369 for(i=0; i<=0x3E; i++) {
7571 SiS_SetReg(SiS_Pr->SiS_Part3Port,i,tempdi[i]); 7370 SiS_SetReg(SiS_Pr->SiS_Part3Port,i,tempdi[i]);
7572 } 7371 }
7573 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302ELV)) { 7372 if(SiS_Pr->SiS_VBType & VB_SIS30xCLV) {
7574 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) { 7373 if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) {
7575 SiS_SetReg(SiS_Pr->SiS_Part3Port,0x28,0x3f); 7374 SiS_SetReg(SiS_Pr->SiS_Part3Port,0x28,0x3f);
7576 } 7375 }
@@ -7587,35 +7386,43 @@ SiS_SetGroup3(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7587/*********************************************/ 7386/*********************************************/
7588 7387
7589#ifdef SIS315H 7388#ifdef SIS315H
7389#if 0
7590static void 7390static void
7591SiS_ShiftXPos(SiS_Private *SiS_Pr, int shift) 7391SiS_ShiftXPos(struct SiS_Private *SiS_Pr, int shift)
7592{ 7392{
7593 USHORT temp, temp1, temp2; 7393 unsigned short temp, temp1, temp2;
7594 7394
7595 temp1 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x1f); 7395 temp1 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x1f);
7596 temp2 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x20); 7396 temp2 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x20);
7597 temp = (USHORT)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift); 7397 temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);
7598 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1f,temp); 7398 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x1f,temp);
7599 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x20,0x0f,((temp >> 4) & 0xf0)); 7399 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x20,0x0f,((temp >> 4) & 0xf0));
7600 temp = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x2b) & 0x0f; 7400 temp = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x2b) & 0x0f;
7601 temp = (USHORT)((int)(temp) + shift); 7401 temp = (unsigned short)((int)(temp) + shift);
7602 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2b,0xf0,(temp & 0x0f)); 7402 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x2b,0xf0,(temp & 0x0f));
7603 temp1 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x43); 7403 temp1 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x43);
7604 temp2 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x42); 7404 temp2 = SiS_GetReg(SiS_Pr->SiS_Part2Port,0x42);
7605 temp = (USHORT)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift); 7405 temp = (unsigned short)((int)((temp1 | ((temp2 & 0xf0) << 4))) + shift);
7606 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x43,temp); 7406 SiS_SetReg(SiS_Pr->SiS_Part2Port,0x43,temp);
7607 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x42,0x0f,((temp >> 4) & 0xf0)); 7407 SiS_SetRegANDOR(SiS_Pr->SiS_Part2Port,0x42,0x0f,((temp >> 4) & 0xf0));
7608} 7408}
7409#endif
7609 7410
7610static void 7411static void
7611SiS_SetGroup4_C_ELV(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 7412SiS_SetGroup4_C_ELV(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
7612 USHORT ModeNo, USHORT ModeIdIndex)
7613{ 7413{
7614 USHORT temp, temp1, resinfo = 0; 7414 unsigned short temp, temp1, resinfo = 0;
7415 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
7615 7416
7616 if(!(SiS_Pr->SiS_VBType & VB_SIS301C)) return; 7417 if(!(SiS_Pr->SiS_VBType & VB_SIS30xCLV)) return;
7617 if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToHiVision | SetCRT2ToYPbPr525750))) return; 7418 if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToHiVision | SetCRT2ToYPbPr525750))) return;
7618 7419
7420 if(SiS_Pr->ChipType >= XGI_20) return;
7421
7422 if((SiS_Pr->ChipType >= SIS_661) && (SiS_Pr->SiS_ROMNew)) {
7423 if(!(ROMAddr[0x61] & 0x04)) return;
7424 }
7425
7619 if(ModeNo > 0x13) { 7426 if(ModeNo > 0x13) {
7620 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 7427 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
7621 } 7428 }
@@ -7625,7 +7432,7 @@ SiS_SetGroup4_C_ELV(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
7625 if(!(temp & 0x01)) { 7432 if(!(temp & 0x01)) {
7626 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x3a,0xdf); 7433 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x3a,0xdf);
7627 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x25,0xfc); 7434 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x25,0xfc);
7628 if((HwInfo->jChipType < SIS_661) && (!(SiS_Pr->SiS_ROMNew))) { 7435 if((SiS_Pr->ChipType < SIS_661) && (!(SiS_Pr->SiS_ROMNew))) {
7629 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x25,0xf8); 7436 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x25,0xf8);
7630 } 7437 }
7631 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0xfb); 7438 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0xfb);
@@ -7633,24 +7440,29 @@ SiS_SetGroup4_C_ELV(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
7633 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) temp = 0x0002; 7440 else if(SiS_Pr->SiS_TVMode & TVSetYPbPr525p) temp = 0x0002;
7634 else if(SiS_Pr->SiS_TVMode & TVSetHiVision) temp = 0x0400; 7441 else if(SiS_Pr->SiS_TVMode & TVSetHiVision) temp = 0x0400;
7635 else temp = 0x0402; 7442 else temp = 0x0402;
7636 if((HwInfo->jChipType >= SIS_661) || (SiS_Pr->SiS_ROMNew)) { 7443 if((SiS_Pr->ChipType >= SIS_661) || (SiS_Pr->SiS_ROMNew)) {
7637 temp1 = 0; 7444 temp1 = 0;
7638 if(SiS_Pr->SiS_TVMode & TVAspect43) temp1 = 4; 7445 if(SiS_Pr->SiS_TVMode & TVAspect43) temp1 = 4;
7639 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0f,0xfb,temp1); 7446 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0f,0xfb,temp1);
7640 if(SiS_Pr->SiS_TVMode & TVAspect43LB) temp |= 0x01; 7447 if(SiS_Pr->SiS_TVMode & TVAspect43LB) temp |= 0x01;
7641 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0x7c,(temp & 0xff)); 7448 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0x7c,(temp & 0xff));
7449 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0xfb,(temp >> 8));
7450 if(ModeNo > 0x13) {
7451 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x39,0xfd);
7452 }
7642 } else { 7453 } else {
7643 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x3b) & 0x03; 7454 temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x3b) & 0x03;
7644 if(temp1 == 0x01) temp |= 0x01; 7455 if(temp1 == 0x01) temp |= 0x01;
7645 if(temp1 == 0x03) temp |= 0x04; /* ? why not 0x10? */ 7456 if(temp1 == 0x03) temp |= 0x04; /* ? why not 0x10? */
7646 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xf8,(temp & 0xff)); 7457 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x26,0xf8,(temp & 0xff));
7647 } 7458 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0xfb,(temp >> 8));
7648 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x3a,0xfb,(temp >> 8)); 7459 if(ModeNo > 0x13) {
7649 if(ModeNo > 0x13) { 7460 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x3b,0xfd);
7650 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x3b,0xfd); 7461 }
7651 } 7462 }
7652 7463
7653 if(HwInfo->jChipType >= SIS_661) { /* ? */ 7464#if 0
7465 if(SiS_Pr->ChipType >= SIS_661) { /* ? */
7654 if(SiS_Pr->SiS_TVMode & TVAspect43) { 7466 if(SiS_Pr->SiS_TVMode & TVAspect43) {
7655 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) { 7467 if(SiS_Pr->SiS_TVMode & TVSetYPbPr750p) {
7656 if(resinfo == SIS_RI_1024x768) { 7468 if(resinfo == SIS_RI_1024x768) {
@@ -7663,29 +7475,30 @@ SiS_SetGroup4_C_ELV(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
7663 } 7475 }
7664 } 7476 }
7665 } 7477 }
7478#endif
7479
7666 } 7480 }
7481
7667} 7482}
7668#endif 7483#endif
7669 7484
7670static void 7485static void
7671SiS_SetCRT2VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7486SiS_SetCRT2VCLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
7672 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 7487 unsigned short RefreshRateTableIndex)
7673{ 7488{
7674 USHORT vclkindex; 7489 unsigned short vclkindex, temp, reg1, reg2;
7675 USHORT temp, reg1, reg2;
7676 7490
7677 if(SiS_Pr->UseCustomMode) { 7491 if(SiS_Pr->UseCustomMode) {
7678 reg1 = SiS_Pr->CSR2B; 7492 reg1 = SiS_Pr->CSR2B;
7679 reg2 = SiS_Pr->CSR2C; 7493 reg2 = SiS_Pr->CSR2C;
7680 } else { 7494 } else {
7681 vclkindex = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 7495 vclkindex = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
7682 HwInfo);
7683 reg1 = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A; 7496 reg1 = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_A;
7684 reg2 = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B; 7497 reg2 = SiS_Pr->SiS_VBVCLKData[vclkindex].Part4_B;
7685 } 7498 }
7686 7499
7687 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 7500 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
7688 if(SiS_Pr->SiS_TVMode & TVSetNTSC1024) { 7501 if(SiS_Pr->SiS_TVMode & (TVSetNTSC1024 | TVSet525p1024)) {
7689 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0a,0x57); 7502 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0a,0x57);
7690 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0b,0x46); 7503 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0b,0x46);
7691 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1f,0xf6); 7504 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1f,0xf6);
@@ -7705,11 +7518,35 @@ SiS_SetCRT2VCLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7705} 7518}
7706 7519
7707static void 7520static void
7708SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7521SiS_SetDualLinkEtc(struct SiS_Private *SiS_Pr)
7709 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 7522{
7523 if(SiS_Pr->ChipType >= SIS_315H) {
7524 if(SiS_Pr->SiS_VBType & VB_SISDUALLINK) {
7525 if((SiS_CRT2IsLCD(SiS_Pr)) ||
7526 (SiS_IsVAMode(SiS_Pr))) {
7527 if(SiS_Pr->SiS_LCDInfo & LCDDualLink) {
7528 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c);
7529 } else {
7530 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,~0x20);
7531 }
7532 }
7533 }
7534 }
7535 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
7536 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2a,0x00);
7537#ifdef SET_EMI
7538 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
7539#endif
7540 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x34,0x10);
7541 }
7542}
7543
7544static void
7545SiS_SetGroup4(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
7546 unsigned short RefreshRateTableIndex)
7710{ 7547{
7711 USHORT tempax,tempcx,tempbx,modeflag,temp,resinfo; 7548 unsigned short tempax, tempcx, tempbx, modeflag, temp, resinfo;
7712 ULONG tempebx,tempeax,templong; 7549 unsigned int tempebx, tempeax, templong;
7713 7550
7714 if(ModeNo <= 0x13) { 7551 if(ModeNo <= 0x13) {
7715 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 7552 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
@@ -7722,38 +7559,24 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7722 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO; 7559 resinfo = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_RESINFO;
7723 } 7560 }
7724 7561
7725 if(HwInfo->jChipType >= SIS_315H) { 7562 if(SiS_Pr->ChipType >= SIS_315H) {
7726 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 7563 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
7727 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 7564 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
7728 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x24,0x0e); 7565 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x24,0x0e);
7729 } 7566 }
7730 } 7567 }
7731 } 7568 }
7732 7569
7733 if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS302LV)) { 7570 if(SiS_Pr->SiS_VBType & (VB_SIS30xCLV | VB_SIS302LV)) {
7734 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 7571 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
7735 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x10,0x9f); 7572 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x10,0x9f);
7736 } 7573 }
7737 } 7574 }
7738 7575
7739 if(HwInfo->jChipType >= SIS_315H) { 7576 if(SiS_Pr->ChipType >= SIS_315H) {
7740 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 7577 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
7741 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 7578 SiS_SetDualLinkEtc(SiS_Pr);
7742 if(SiS_IsDualLink(SiS_Pr, HwInfo)) { 7579 return;
7743 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c);
7744 } else {
7745 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,~0x20);
7746 }
7747
7748 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) {
7749 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2a,0x00);
7750#ifdef SET_EMI
7751 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
7752#endif
7753 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x34,0x10);
7754 }
7755 }
7756 return;
7757 } 7580 }
7758 } 7581 }
7759 7582
@@ -7777,16 +7600,16 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7777 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x15,temp); 7600 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x15,temp);
7778 7601
7779 tempbx = SiS_Pr->SiS_VGAHDE; 7602 tempbx = SiS_Pr->SiS_VGAHDE;
7780 if(modeflag & HalfDCLK) tempbx >>= 1; 7603 if(modeflag & HalfDCLK) tempbx >>= 1;
7781 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempbx >>= 1; 7604 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7782 7605
7783 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 7606 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
7784 temp = 0; 7607 temp = 0;
7785 if(tempbx > 800) temp = 0x60; 7608 if(tempbx > 800) temp = 0x60;
7786 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) { 7609 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
7787 temp = 0; 7610 temp = 0;
7788 if(tempbx == 1024) temp = 0xA0; 7611 if(tempbx > 1024) temp = 0xC0;
7789 else if(tempbx > 1024) temp = 0xC0; 7612 else if(tempbx >= 960) temp = 0xA0;
7790 } else if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p)) { 7613 } else if(SiS_Pr->SiS_TVMode & (TVSetYPbPr525p | TVSetYPbPr750p)) {
7791 temp = 0; 7614 temp = 0;
7792 if(tempbx >= 1280) temp = 0x40; 7615 if(tempbx >= 1280) temp = 0x40;
@@ -7796,8 +7619,13 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7796 if(tempbx >= 1024) temp = 0xA0; 7619 if(tempbx >= 1024) temp = 0xA0;
7797 } 7620 }
7798 7621
7622 temp |= SiS_Pr->Init_P4_0E;
7623
7799 if(SiS_Pr->SiS_VBType & VB_SIS301) { 7624 if(SiS_Pr->SiS_VBType & VB_SIS301) {
7800 if(SiS_Pr->SiS_LCDResInfo != Panel_1280x1024) temp |= 0x0A; 7625 if(SiS_Pr->SiS_LCDResInfo != Panel_1280x1024) {
7626 temp &= 0xf0;
7627 temp |= 0x0A;
7628 }
7801 } 7629 }
7802 7630
7803 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0E,0x10,temp); 7631 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x0E,0x10,temp);
@@ -7824,15 +7652,15 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7824 tempeax /= tempebx; 7652 tempeax /= tempebx;
7825 if(templong) tempeax++; 7653 if(templong) tempeax++;
7826 7654
7827 temp = (USHORT)(tempeax & 0x000000FF); 7655 temp = (unsigned short)(tempeax & 0x000000FF);
7828 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1B,temp); 7656 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1B,temp);
7829 temp = (USHORT)((tempeax & 0x0000FF00) >> 8); 7657 temp = (unsigned short)((tempeax & 0x0000FF00) >> 8);
7830 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1A,temp); 7658 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1A,temp);
7831 temp = (USHORT)((tempeax >> 12) & 0x70); /* sic! */ 7659 temp = (unsigned short)((tempeax >> 12) & 0x70); /* sic! */
7832 temp |= (tempcx & 0x4F); 7660 temp |= (tempcx & 0x4F);
7833 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x19,temp); 7661 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x19,temp);
7834 7662
7835 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 7663 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
7836 7664
7837 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1C,0x28); 7665 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1C,0x28);
7838 7666
@@ -7840,23 +7668,26 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7840 tempbx = 0; 7668 tempbx = 0;
7841 if(SiS_Pr->SiS_TVMode & (TVSetHiVision | TVSetYPbPr750p)) tempbx = 0x08; 7669 if(SiS_Pr->SiS_TVMode & (TVSetHiVision | TVSetYPbPr750p)) tempbx = 0x08;
7842 tempax = SiS_Pr->SiS_VGAHDE; 7670 tempax = SiS_Pr->SiS_VGAHDE;
7843 if(modeflag & HalfDCLK) tempax >>= 1; 7671 if(modeflag & HalfDCLK) tempax >>= 1;
7844 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempax >>= 1; 7672 if(SiS_IsDualLink(SiS_Pr)) tempax >>= 1;
7845 if(tempax > 800) { 7673 if(tempax > 800) {
7846 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 7674 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
7847 tempax -= 800; 7675 tempax -= 800;
7848 } else { /* 651+301C: Only if TVNoHiviNoYPbPr */ 7676 } else {
7849 tempbx = 0x08; 7677 tempbx = 0x08;
7850 if(tempax == 1024) tempax *= 25; 7678 if(tempax == 960) tempax *= 25; /* Correct */
7851 else tempax *= 20; 7679 else if(tempax == 1024) tempax *= 25;
7680 else tempax *= 20;
7852 temp = tempax % 32; 7681 temp = tempax % 32;
7853 tempax /= 32; 7682 tempax /= 32;
7854 if(temp) tempax++; 7683 if(temp) tempax++;
7855 tempax++; 7684 tempax++;
7856 if((SiS_Pr->SiS_VBInfo & SetCRT2ToTVNoYPbPrHiVision) || 7685 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
7857 (SiS_Pr->SiS_TVMode & TVSetYPbPr525i)) { 7686 if(resinfo == SIS_RI_1024x768 ||
7858 if(resinfo == SIS_RI_1024x768) { 7687 resinfo == SIS_RI_1024x576 ||
7859 /* Otherwise white line at right edge */ 7688 resinfo == SIS_RI_1280x1024 ||
7689 resinfo == SIS_RI_1280x720) {
7690 /* Otherwise white line or garbage at right edge */
7860 tempax = (tempax & 0xff00) | 0x20; 7691 tempax = (tempax & 0xff00) | 0x20;
7861 } 7692 }
7862 } 7693 }
@@ -7868,7 +7699,7 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7868 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1E,temp); 7699 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x1E,temp);
7869 7700
7870 temp = 0x0036; tempbx = 0xD0; 7701 temp = 0x0036; tempbx = 0xD0;
7871 if((HwInfo->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { 7702 if((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SISLVDS)) {
7872 temp = 0x0026; tempbx = 0xC0; /* See En/DisableBridge() */ 7703 temp = 0x0026; tempbx = 0xC0; /* See En/DisableBridge() */
7873 } 7704 }
7874 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 7705 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
@@ -7884,36 +7715,24 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7884 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x1F,tempbx,temp); 7715 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x1F,tempbx,temp);
7885 7716
7886 tempbx = SiS_Pr->SiS_HT >> 1; 7717 tempbx = SiS_Pr->SiS_HT >> 1;
7887 if(SiS_IsDualLink(SiS_Pr, HwInfo)) tempbx >>= 1; 7718 if(SiS_IsDualLink(SiS_Pr)) tempbx >>= 1;
7888 tempbx -= 2; 7719 tempbx -= 2;
7889 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x22,tempbx); 7720 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x22,tempbx);
7890 temp = (tempbx >> 5) & 0x38; 7721 temp = (tempbx >> 5) & 0x38;
7891 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0xC0,temp); 7722 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x21,0xC0,temp);
7892 7723
7893 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 7724 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
7894 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 7725 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
7895 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x24,0x0e); 7726 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x24,0x0e);
7896 /* LCD-too-dark-error-source, see FinalizeLCD() */ 7727 /* LCD-too-dark-error-source, see FinalizeLCD() */
7897 } 7728 }
7898 if(HwInfo->jChipType >= SIS_315H) {
7899 if(SiS_IsDualLink(SiS_Pr, HwInfo)) {
7900 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x27,0x2c);
7901 } else {
7902 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,~0x20);
7903 }
7904 }
7905 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) {
7906 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2a,0x00);
7907#ifdef SET_EMI
7908 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
7909#endif
7910 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x34,0x10);
7911 }
7912 } 7729 }
7913 7730
7731 SiS_SetDualLinkEtc(SiS_Pr);
7732
7914 } /* 301B */ 7733 } /* 301B */
7915 7734
7916 SiS_SetCRT2VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 7735 SiS_SetCRT2VCLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
7917} 7736}
7918 7737
7919/*********************************************/ 7738/*********************************************/
@@ -7921,8 +7740,7 @@ SiS_SetGroup4(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7921/*********************************************/ 7740/*********************************************/
7922 7741
7923static void 7742static void
7924SiS_SetGroup5(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7743SiS_SetGroup5(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
7925 PSIS_HW_INFO HwInfo)
7926{ 7744{
7927 7745
7928 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return; 7746 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) return;
@@ -7930,7 +7748,7 @@ SiS_SetGroup5(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7930 if(SiS_Pr->SiS_ModeType == ModeVGA) { 7748 if(SiS_Pr->SiS_ModeType == ModeVGA) {
7931 if(!(SiS_Pr->SiS_VBInfo & (SetInSlaveMode | LoadDACFlag))) { 7749 if(!(SiS_Pr->SiS_VBInfo & (SetInSlaveMode | LoadDACFlag))) {
7932 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20); 7750 SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x20);
7933 SiS_LoadDAC(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 7751 SiS_LoadDAC(SiS_Pr, ModeNo, ModeIdIndex);
7934 } 7752 }
7935 } 7753 }
7936} 7754}
@@ -7939,116 +7757,156 @@ SiS_SetGroup5(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
7939/* MODIFY CRT1 GROUP FOR SLAVE MODE */ 7757/* MODIFY CRT1 GROUP FOR SLAVE MODE */
7940/*********************************************/ 7758/*********************************************/
7941 7759
7942static void 7760static BOOLEAN
7943SiS_ModCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7761SiS_GetLVDSCRT1Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
7944 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 7762 unsigned short RefreshRateTableIndex, unsigned short *ResIndex,
7945{ 7763 unsigned short *DisplayType)
7946 USHORT tempah,i,modeflag,j; 7764 {
7947 USHORT ResIndex,DisplayType; 7765 unsigned short modeflag = 0;
7948 const SiS_LVDSCRT1DataStruct *LVDSCRT1Ptr=NULL; 7766 BOOLEAN checkhd = TRUE;
7949 7767
7950 if(ModeNo <= 0x13) modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag; 7768 /* Pass 1:1 not supported here */
7951 else modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag; 7769
7770 if(ModeNo <= 0x13) {
7771 modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
7772 (*ResIndex) = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
7773 } else {
7774 modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
7775 (*ResIndex) = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
7776 }
7777
7778 (*ResIndex) &= 0x3F;
7779
7780 if((SiS_Pr->SiS_IF_DEF_CH70xx) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
7781
7782 (*DisplayType) = 80;
7783 if((SiS_Pr->SiS_TVMode & TVSetPAL) && (!(SiS_Pr->SiS_TVMode & TVSetPALM))) {
7784 (*DisplayType) = 82;
7785 if(SiS_Pr->SiS_ModeType > ModeVGA) {
7786 if(SiS_Pr->SiS_CHSOverScan) (*DisplayType) = 84;
7787 }
7788 }
7789 if((*DisplayType) != 84) {
7790 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) (*DisplayType)++;
7791 }
7792
7793 } else {
7794
7795 (*DisplayType = 0);
7796 switch(SiS_Pr->SiS_LCDResInfo) {
7797 case Panel_320x240_1: (*DisplayType) = 50;
7798 checkhd = FALSE;
7799 break;
7800 case Panel_320x240_2: (*DisplayType) = 14;
7801 break;
7802 case Panel_320x240_3: (*DisplayType) = 18;
7803 break;
7804 case Panel_640x480: (*DisplayType) = 10;
7805 break;
7806 case Panel_1024x600: (*DisplayType) = 26;
7807 break;
7808 default: return TRUE;
7809 }
7810
7811 if(checkhd) {
7812 if(modeflag & HalfDCLK) (*DisplayType)++;
7813 }
7814
7815 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x600) {
7816 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) (*DisplayType) += 2;
7817 }
7818
7819 }
7820
7821 return TRUE;
7822}
7823
7824static void
7825SiS_ModCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
7826 unsigned short RefreshRateTableIndex)
7827{
7828 unsigned short tempah, i, modeflag, j, ResIndex, DisplayType;
7829 const struct SiS_LVDSCRT1Data *LVDSCRT1Ptr=NULL;
7830 static const unsigned short CRIdx[] = {
7831 0x00, 0x02, 0x03, 0x04, 0x05, 0x06,
7832 0x07, 0x10, 0x11, 0x15, 0x16
7833 };
7952 7834
7953 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || 7835 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) ||
7954 (SiS_Pr->SiS_CustomT == CUT_BARCO1024) || 7836 (SiS_Pr->SiS_CustomT == CUT_BARCO1024) ||
7955 (SiS_Pr->SiS_CustomT == CUT_PANEL848)) 7837 (SiS_Pr->SiS_CustomT == CUT_PANEL848) ||
7838 (SiS_Pr->SiS_CustomT == CUT_PANEL856) )
7956 return; 7839 return;
7957 7840
7841 if(SiS_Pr->SiS_IF_DEF_LVDS) {
7842 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
7843 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return;
7844 }
7845 } else if(SiS_Pr->SiS_VBType & VB_SISVB) {
7846 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) return;
7847 } else return;
7848
7849 if(SiS_Pr->SiS_LCDInfo & LCDPass11) return;
7850
7851 if(SiS_Pr->ChipType < SIS_315H) {
7852 if(SiS_Pr->SiS_SetFlag & SetDOSMode) return;
7853 }
7854
7958 if(!(SiS_GetLVDSCRT1Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, 7855 if(!(SiS_GetLVDSCRT1Ptr(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex,
7959 &ResIndex, &DisplayType))) { 7856 &ResIndex, &DisplayType))) {
7960 return; 7857 return;
7961 } 7858 }
7962 7859
7963 if(HwInfo->jChipType < SIS_315H) { 7860 switch(DisplayType) {
7964 if(SiS_Pr->SiS_SetFlag & SetDOSMode) return; 7861 case 50: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x240_1; break; /* xSTN */
7862 case 14: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x240_2; break; /* xSTN */
7863 case 15: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x240_2_H; break; /* xSTN */
7864 case 18: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x240_3; break; /* xSTN */
7865 case 19: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x240_3_H; break; /* xSTN */
7866 case 10: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_1; break;
7867 case 11: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_1_H; break;
7868#if 0 /* Works better with calculated numbers */
7869 case 26: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1; break;
7870 case 27: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1_H; break;
7871 case 28: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2; break;
7872 case 29: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2_H; break;
7873#endif
7874 case 80: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UNTSC; break;
7875 case 81: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1ONTSC; break;
7876 case 82: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UPAL; break;
7877 case 83: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL; break;
7878 case 84: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1SOPAL; break;
7965 } 7879 }
7966 7880
7967 switch(DisplayType) { 7881 if(LVDSCRT1Ptr) {
7968 case 0 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1; break; 7882
7969 case 1 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_1_H; break; 7883 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
7970 case 2 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2; break; 7884
7971 case 3 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1800x600_2_H; break; 7885 for(i = 0; i <= 10; i++) {
7972 case 4 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1; break; 7886 tempah = (LVDSCRT1Ptr + ResIndex)->CR[i];
7973 case 5 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1_H; break; 7887 SiS_SetReg(SiS_Pr->SiS_P3d4,CRIdx[i],tempah);
7974 case 6 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2; break; 7888 }
7975 case 7 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_2_H; break; 7889
7976 case 8 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1; break; 7890 for(i = 0x0A, j = 11; i <= 0x0C; i++, j++) {
7977 case 9 : LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_1_H; break; 7891 tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
7978 case 10: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2; break; 7892 SiS_SetReg(SiS_Pr->SiS_P3c4,i,tempah);
7979 case 11: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x1024_2_H; break; 7893 }
7980 case 12: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1; break; 7894
7981 case 13: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1XXXxXXX_1_H; break; 7895 tempah = (LVDSCRT1Ptr + ResIndex)->CR[14] & 0xE0;
7982 case 14: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1; break; 7896 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1f,tempah);
7983 case 15: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_1_H; break; 7897
7984 case 16: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2; break; 7898 if(ModeNo <= 0x13) modeflag = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
7985 case 17: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11400x1050_2_H; break; 7899 else modeflag = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
7986 case 18: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UNTSC; break; 7900
7987 case 19: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1ONTSC; break; 7901 tempah = ((LVDSCRT1Ptr + ResIndex)->CR[14] & 0x01) << 5;
7988 case 20: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1UPAL; break; 7902 if(modeflag & DoubleScanMode) tempah |= 0x80;
7989 case 21: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1OPAL; break; 7903 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah);
7990 case 22: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1320x480_1; break; /* FSTN */ 7904
7991 case 23: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1; break; 7905 } else {
7992 case 24: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_1_H; break; 7906
7993 case 25: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2; break; 7907 SiS_CalcLCDACRT1Timing(SiS_Pr, ModeNo, ModeIdIndex);
7994 case 26: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x600_2_H; break; 7908
7995 case 27: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_1; break; 7909 }
7996 case 28: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_1_H; break;
7997 case 29: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_2; break;
7998 case 30: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11152x768_2_H; break;
7999 case 36: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1; break;
8000 case 37: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_1_H; break;
8001 case 38: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2; break;
8002 case 39: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11600x1200_2_H; break;
8003 case 40: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_1; break;
8004 case 41: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_1_H; break;
8005 case 42: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_2; break;
8006 case 43: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11280x768_2_H; break;
8007 case 50: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_1; break;
8008 case 51: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_1_H; break;
8009 case 52: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_2; break;
8010 case 53: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_2_H; break;
8011 case 54: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_3; break;
8012 case 55: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT1640x480_3_H; break;
8013 case 99: LVDSCRT1Ptr = SiS_Pr->SiS_CHTVCRT1SOPAL; break;
8014 default: LVDSCRT1Ptr = SiS_Pr->SiS_LVDSCRT11024x768_1; break;
8015 }
8016
8017 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x11,0x7f);
8018
8019 tempah = (LVDSCRT1Ptr + ResIndex)->CR[0];
8020 SiS_SetReg(SiS_Pr->SiS_P3d4,0x00,tempah);
8021
8022 for(i=0x02,j=1;i<=0x05;i++,j++){
8023 tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
8024 SiS_SetReg(SiS_Pr->SiS_P3d4,i,tempah);
8025 }
8026 for(i=0x06,j=5;i<=0x07;i++,j++){
8027 tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
8028 SiS_SetReg(SiS_Pr->SiS_P3d4,i,tempah);
8029 }
8030 for(i=0x10,j=7;i<=0x11;i++,j++){
8031 tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
8032 SiS_SetReg(SiS_Pr->SiS_P3d4,i,tempah);
8033 }
8034 for(i=0x15,j=9;i<=0x16;i++,j++){
8035 tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
8036 SiS_SetReg(SiS_Pr->SiS_P3d4,i,tempah);
8037 }
8038 for(i=0x0A,j=11;i<=0x0C;i++,j++){
8039 tempah = (LVDSCRT1Ptr + ResIndex)->CR[j];
8040 SiS_SetReg(SiS_Pr->SiS_P3c4,i,tempah);
8041 }
8042
8043 tempah = (LVDSCRT1Ptr + ResIndex)->CR[14];
8044 tempah &= 0xE0;
8045 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x0E,0x1f,tempah);
8046
8047 tempah = (LVDSCRT1Ptr + ResIndex)->CR[14];
8048 tempah &= 0x01;
8049 tempah <<= 5;
8050 if(modeflag & DoubleScanMode) tempah |= 0x080;
8051 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x09,~0x020,tempah);
8052} 7910}
8053 7911
8054/*********************************************/ 7912/*********************************************/
@@ -8056,24 +7914,24 @@ SiS_ModCRT1CRTC(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
8056/*********************************************/ 7914/*********************************************/
8057 7915
8058static void 7916static void
8059SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7917SiS_SetCRT2ECLK(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
8060 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo) 7918 unsigned short RefreshRateTableIndex)
8061{ 7919{
8062 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 7920 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
8063 USHORT clkbase, vclkindex=0; 7921 unsigned short clkbase, vclkindex = 0;
8064 UCHAR sr2b, sr2c; 7922 unsigned char sr2b, sr2c;
8065 7923
8066 if((SiS_Pr->SiS_LCDResInfo == Panel_640x480) || (SiS_Pr->SiS_LCDInfo & LCDPass11)) { 7924 if(SiS_Pr->SiS_LCDInfo & LCDPass11) {
8067 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2); 7925 SiS_Pr->SiS_SetFlag &= (~ProgrammingCRT2);
8068 if((SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK & 0x3f) == 2) { 7926 if(SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRTVCLK == 2) {
8069 RefreshRateTableIndex--; 7927 RefreshRateTableIndex--;
8070 } 7928 }
8071 vclkindex = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, 7929 vclkindex = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex,
8072 RefreshRateTableIndex, HwInfo); 7930 RefreshRateTableIndex);
8073 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 7931 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
8074 } else { 7932 } else {
8075 vclkindex = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex, 7933 vclkindex = SiS_GetVCLK2Ptr(SiS_Pr, ModeNo, ModeIdIndex,
8076 RefreshRateTableIndex, HwInfo); 7934 RefreshRateTableIndex);
8077 } 7935 }
8078 7936
8079 sr2b = SiS_Pr->SiS_VCLKData[vclkindex].SR2B; 7937 sr2b = SiS_Pr->SiS_VCLKData[vclkindex].SR2B;
@@ -8082,7 +7940,7 @@ SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
8082 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) { 7940 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) {
8083 if(SiS_Pr->SiS_UseROM) { 7941 if(SiS_Pr->SiS_UseROM) {
8084 if(ROMAddr[0x220] & 0x01) { 7942 if(ROMAddr[0x220] & 0x01) {
8085 sr2b = ROMAddr[0x227]; 7943 sr2b = ROMAddr[0x227];
8086 sr2c = ROMAddr[0x228]; 7944 sr2c = ROMAddr[0x228];
8087 } 7945 }
8088 } 7946 }
@@ -8091,7 +7949,7 @@ SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
8091 clkbase = 0x02B; 7949 clkbase = 0x02B;
8092 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) { 7950 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA)) {
8093 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) { 7951 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) {
8094 clkbase += 3; 7952 clkbase += 3;
8095 } 7953 }
8096 } 7954 }
8097 7955
@@ -8111,368 +7969,331 @@ SiS_SetCRT2ECLK(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
8111/*********************************************/ 7969/*********************************************/
8112 7970
8113static void 7971static void
8114SiS_SetCHTVReg(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 7972SiS_SetCHTVReg(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
8115 USHORT RefreshRateTableIndex) 7973 unsigned short RefreshRateTableIndex)
8116{ 7974{
8117#if defined(SIS300) || defined(SIS315H) 7975 unsigned short TVType, resindex;
8118 USHORT temp, tempbx; 7976 const struct SiS_CHTVRegData *CHTVRegData = NULL;
8119#endif
8120 USHORT tempcl;
8121 USHORT TVType, resindex;
8122 const SiS_CHTVRegDataStruct *CHTVRegData = NULL;
8123 7977
8124 if(ModeNo <= 0x13) 7978 if(ModeNo <= 0x13)
8125 tempcl = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC; 7979 resindex = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_CRT2CRTC;
8126 else 7980 else
8127 tempcl = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC; 7981 resindex = SiS_Pr->SiS_RefIndex[RefreshRateTableIndex].Ext_CRT2CRTC;
8128 7982
8129 TVType = 0; 7983 resindex &= 0x3F;
8130 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) TVType += 1; 7984
8131 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 7985 TVType = 0;
8132 TVType += 2; 7986 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) TVType += 1;
8133 if(SiS_Pr->SiS_ModeType > ModeVGA) { 7987 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
8134 if(SiS_Pr->SiS_CHSOverScan) TVType = 8; 7988 TVType += 2;
8135 } 7989 if(SiS_Pr->SiS_ModeType > ModeVGA) {
8136 if(SiS_Pr->SiS_TVMode & TVSetPALM) { 7990 if(SiS_Pr->SiS_CHSOverScan) TVType = 8;
8137 TVType = 4; 7991 }
8138 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) TVType += 1; 7992 if(SiS_Pr->SiS_TVMode & TVSetPALM) {
8139 } else if(SiS_Pr->SiS_TVMode & TVSetPALN) { 7993 TVType = 4;
8140 TVType = 6; 7994 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) TVType += 1;
8141 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) TVType += 1; 7995 } else if(SiS_Pr->SiS_TVMode & TVSetPALN) {
8142 } 7996 TVType = 6;
8143 } 7997 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) TVType += 1;
8144 switch(TVType) { 7998 }
8145 case 0: CHTVRegData = SiS_Pr->SiS_CHTVReg_UNTSC; break; 7999 }
8146 case 1: CHTVRegData = SiS_Pr->SiS_CHTVReg_ONTSC; break; 8000
8147 case 2: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPAL; break; 8001 switch(TVType) {
8148 case 3: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break; 8002 case 0: CHTVRegData = SiS_Pr->SiS_CHTVReg_UNTSC; break;
8149 case 4: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALM; break; 8003 case 1: CHTVRegData = SiS_Pr->SiS_CHTVReg_ONTSC; break;
8150 case 5: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALM; break; 8004 case 2: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPAL; break;
8151 case 6: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALN; break; 8005 case 3: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break;
8152 case 7: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALN; break; 8006 case 4: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALM; break;
8153 case 8: CHTVRegData = SiS_Pr->SiS_CHTVReg_SOPAL; break; 8007 case 5: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALM; break;
8154 default: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break; 8008 case 6: CHTVRegData = SiS_Pr->SiS_CHTVReg_UPALN; break;
8155 } 8009 case 7: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPALN; break;
8156 resindex = tempcl & 0x3F; 8010 case 8: CHTVRegData = SiS_Pr->SiS_CHTVReg_SOPAL; break;
8011 default: CHTVRegData = SiS_Pr->SiS_CHTVReg_OPAL; break;
8012 }
8157 8013
8158 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 8014
8015 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
8159 8016
8160#ifdef SIS300 8017#ifdef SIS300
8161 8018
8162 /* Chrontel 7005 - I assume that it does not come with a 315 series chip */ 8019 /* Chrontel 7005 - I assume that it does not come with a 315 series chip */
8163 8020
8164 /* We don't support modes >800x600 */ 8021 /* We don't support modes >800x600 */
8165 if (resindex > 5) return; 8022 if (resindex > 5) return;
8166 8023
8167 if(SiS_Pr->SiS_TVMode & TVSetPAL) { 8024 if(SiS_Pr->SiS_TVMode & TVSetPAL) {
8168 SiS_SetCH700x(SiS_Pr,0x4304); /* 0x40=76uA (PAL); 0x03=15bit non-multi RGB*/ 8025 SiS_SetCH700x(SiS_Pr,0x04,0x43); /* 0x40=76uA (PAL); 0x03=15bit non-multi RGB*/
8169 SiS_SetCH700x(SiS_Pr,0x6909); /* Black level for PAL (105)*/ 8026 SiS_SetCH700x(SiS_Pr,0x09,0x69); /* Black level for PAL (105)*/
8170 } else { 8027 } else {
8171 SiS_SetCH700x(SiS_Pr,0x0304); /* upper nibble=71uA (NTSC), 0x03=15bit non-multi RGB*/ 8028 SiS_SetCH700x(SiS_Pr,0x04,0x03); /* upper nibble=71uA (NTSC), 0x03=15bit non-multi RGB*/
8172 SiS_SetCH700x(SiS_Pr,0x7109); /* Black level for NTSC (113)*/ 8029 SiS_SetCH700x(SiS_Pr,0x09,0x71); /* Black level for NTSC (113)*/
8173 } 8030 }
8174 8031
8175 temp = CHTVRegData[resindex].Reg[0]; 8032 SiS_SetCH700x(SiS_Pr,0x00,CHTVRegData[resindex].Reg[0]); /* Mode register */
8176 tempbx=((temp&0x00FF)<<8)|0x00; /* Mode register */ 8033 SiS_SetCH700x(SiS_Pr,0x07,CHTVRegData[resindex].Reg[1]); /* Start active video register */
8177 SiS_SetCH700x(SiS_Pr,tempbx); 8034 SiS_SetCH700x(SiS_Pr,0x08,CHTVRegData[resindex].Reg[2]); /* Position overflow register */
8178 temp = CHTVRegData[resindex].Reg[1]; 8035 SiS_SetCH700x(SiS_Pr,0x0a,CHTVRegData[resindex].Reg[3]); /* Horiz Position register */
8179 tempbx=((temp&0x00FF)<<8)|0x07; /* Start active video register */ 8036 SiS_SetCH700x(SiS_Pr,0x0b,CHTVRegData[resindex].Reg[4]); /* Vertical Position register */
8180 SiS_SetCH700x(SiS_Pr,tempbx); 8037
8181 temp = CHTVRegData[resindex].Reg[2]; 8038 /* Set minimum flicker filter for Luma channel (SR1-0=00),
8182 tempbx=((temp&0x00FF)<<8)|0x08; /* Position overflow register */
8183 SiS_SetCH700x(SiS_Pr,tempbx);
8184 temp = CHTVRegData[resindex].Reg[3];
8185 tempbx=((temp&0x00FF)<<8)|0x0A; /* Horiz Position register */
8186 SiS_SetCH700x(SiS_Pr,tempbx);
8187 temp = CHTVRegData[resindex].Reg[4];
8188 tempbx=((temp&0x00FF)<<8)|0x0B; /* Vertical Position register */
8189 SiS_SetCH700x(SiS_Pr,tempbx);
8190
8191 /* Set minimum flicker filter for Luma channel (SR1-0=00),
8192 minimum text enhancement (S3-2=10), 8039 minimum text enhancement (S3-2=10),
8193 maximum flicker filter for Chroma channel (S5-4=10) 8040 maximum flicker filter for Chroma channel (S5-4=10)
8194 =00101000=0x28 (When reading, S1-0->S3-2, and S3-2->S1-0!) 8041 =00101000=0x28 (When reading, S1-0->S3-2, and S3-2->S1-0!)
8195 */ 8042 */
8196 SiS_SetCH700x(SiS_Pr,0x2801); 8043 SiS_SetCH700x(SiS_Pr,0x01,0x28);
8197 8044
8198 /* Set video bandwidth 8045 /* Set video bandwidth
8199 High bandwith Luma composite video filter(S0=1) 8046 High bandwith Luma composite video filter(S0=1)
8200 low bandwith Luma S-video filter (S2-1=00) 8047 low bandwith Luma S-video filter (S2-1=00)
8201 disable peak filter in S-video channel (S3=0) 8048 disable peak filter in S-video channel (S3=0)
8202 high bandwidth Chroma Filter (S5-4=11) 8049 high bandwidth Chroma Filter (S5-4=11)
8203 =00110001=0x31 8050 =00110001=0x31
8204 */ 8051 */
8205 SiS_SetCH700x(SiS_Pr,0xb103); /* old: 3103 */ 8052 SiS_SetCH700x(SiS_Pr,0x03,0xb1); /* old: 3103 */
8206 8053
8207 /* Register 0x3D does not exist in non-macrovision register map 8054 /* Register 0x3D does not exist in non-macrovision register map
8208 (Maybe this is a macrovision register?) 8055 (Maybe this is a macrovision register?)
8209 */ 8056 */
8210#ifndef SIS_CP 8057#ifndef SIS_CP
8211 SiS_SetCH70xx(SiS_Pr,0x003D); 8058 SiS_SetCH70xx(SiS_Pr,0x3d,0x00);
8212#endif 8059#endif
8213 8060
8214 /* Register 0x10 only contains 1 writable bit (S0) for sensing, 8061 /* Register 0x10 only contains 1 writable bit (S0) for sensing,
8215 all other bits a read-only. Macrovision? 8062 all other bits a read-only. Macrovision?
8216 */ 8063 */
8217 SiS_SetCH70xxANDOR(SiS_Pr,0x0010,0x1F); 8064 SiS_SetCH70xxANDOR(SiS_Pr,0x10,0x00,0x1F);
8218 8065
8219 /* Register 0x11 only contains 3 writable bits (S0-S2) for 8066 /* Register 0x11 only contains 3 writable bits (S0-S2) for
8220 contrast enhancement (set to 010 -> gain 1 Yout = 17/16*(Yin-30) ) 8067 contrast enhancement (set to 010 -> gain 1 Yout = 17/16*(Yin-30) )
8221 */ 8068 */
8222 SiS_SetCH70xxANDOR(SiS_Pr,0x0211,0xF8); 8069 SiS_SetCH70xxANDOR(SiS_Pr,0x11,0x02,0xF8);
8223 8070
8224 /* Clear DSEN 8071 /* Clear DSEN
8225 */ 8072 */
8226 SiS_SetCH70xxANDOR(SiS_Pr,0x001C,0xEF); 8073 SiS_SetCH70xxANDOR(SiS_Pr,0x1c,0x00,0xEF);
8227 8074
8228 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) { /* ---- NTSC ---- */ 8075 if(!(SiS_Pr->SiS_TVMode & TVSetPAL)) { /* ---- NTSC ---- */
8229 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) { 8076 if(SiS_Pr->SiS_TVMode & TVSetCHOverScan) {
8230 if(resindex == 0x04) { /* 640x480 overscan: Mode 16 */ 8077 if(resindex == 0x04) { /* 640x480 overscan: Mode 16 */
8231 SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); /* loop filter off */ 8078 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x00,0xEF); /* loop filter off */
8232 SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE); /* ACIV on, no need to set FSCI */ 8079 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x01,0xFE); /* ACIV on, no need to set FSCI */
8233 } else if(resindex == 0x05) { /* 800x600 overscan: Mode 23 */ 8080 } else if(resindex == 0x05) { /* 800x600 overscan: Mode 23 */
8234 SiS_SetCH70xxANDOR(SiS_Pr,0x0118,0xF0); /* 0x18-0x1f: FSCI 469,762,048 */ 8081 SiS_SetCH70xxANDOR(SiS_Pr,0x18,0x01,0xF0); /* 0x18-0x1f: FSCI 469,762,048 */
8235 SiS_SetCH70xxANDOR(SiS_Pr,0x0C19,0xF0); 8082 SiS_SetCH70xxANDOR(SiS_Pr,0x19,0x0C,0xF0);
8236 SiS_SetCH70xxANDOR(SiS_Pr,0x001A,0xF0); 8083 SiS_SetCH70xxANDOR(SiS_Pr,0x1a,0x00,0xF0);
8237 SiS_SetCH70xxANDOR(SiS_Pr,0x001B,0xF0); 8084 SiS_SetCH70xxANDOR(SiS_Pr,0x1b,0x00,0xF0);
8238 SiS_SetCH70xxANDOR(SiS_Pr,0x001C,0xF0); 8085 SiS_SetCH70xxANDOR(SiS_Pr,0x1c,0x00,0xF0);
8239 SiS_SetCH70xxANDOR(SiS_Pr,0x001D,0xF0); 8086 SiS_SetCH70xxANDOR(SiS_Pr,0x1d,0x00,0xF0);
8240 SiS_SetCH70xxANDOR(SiS_Pr,0x001E,0xF0); 8087 SiS_SetCH70xxANDOR(SiS_Pr,0x1e,0x00,0xF0);
8241 SiS_SetCH70xxANDOR(SiS_Pr,0x001F,0xF0); 8088 SiS_SetCH70xxANDOR(SiS_Pr,0x1f,0x00,0xF0);
8242 SiS_SetCH70xxANDOR(SiS_Pr,0x0120,0xEF); /* Loop filter on for mode 23 */ 8089 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x01,0xEF); /* Loop filter on for mode 23 */
8243 SiS_SetCH70xxANDOR(SiS_Pr,0x0021,0xFE); /* ACIV off, need to set FSCI */ 8090 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x00,0xFE); /* ACIV off, need to set FSCI */
8244 } 8091 }
8245 } else { 8092 } else {
8246 if(resindex == 0x04) { /* ----- 640x480 underscan; Mode 17 */ 8093 if(resindex == 0x04) { /* ----- 640x480 underscan; Mode 17 */
8247 SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); /* loop filter off */ 8094 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x00,0xEF); /* loop filter off */
8248 SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE); 8095 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x01,0xFE);
8249 } else if(resindex == 0x05) { /* ----- 800x600 underscan: Mode 24 */ 8096 } else if(resindex == 0x05) { /* ----- 800x600 underscan: Mode 24 */
8250#if 0 8097#if 0
8251 SiS_SetCH70xxANDOR(SiS_Pr,0x0118,0xF0); /* (FSCI was 0x1f1c71c7 - this is for mode 22) */ 8098 SiS_SetCH70xxANDOR(SiS_Pr,0x18,0x01,0xF0); /* (FSCI was 0x1f1c71c7 - this is for mode 22) */
8252 SiS_SetCH70xxANDOR(SiS_Pr,0x0919,0xF0); /* FSCI for mode 24 is 428,554,851 */ 8099 SiS_SetCH70xxANDOR(SiS_Pr,0x19,0x09,0xF0); /* FSCI for mode 24 is 428,554,851 */
8253 SiS_SetCH70xxANDOR(SiS_Pr,0x081A,0xF0); /* 198b3a63 */ 8100 SiS_SetCH70xxANDOR(SiS_Pr,0x1a,0x08,0xF0); /* 198b3a63 */
8254 SiS_SetCH70xxANDOR(SiS_Pr,0x0b1B,0xF0); 8101 SiS_SetCH70xxANDOR(SiS_Pr,0x1b,0x0b,0xF0);
8255 SiS_SetCH70xxANDOR(SiS_Pr,0x041C,0xF0); 8102 SiS_SetCH70xxANDOR(SiS_Pr,0x1c,0x04,0xF0);
8256 SiS_SetCH70xxANDOR(SiS_Pr,0x011D,0xF0); 8103 SiS_SetCH70xxANDOR(SiS_Pr,0x1d,0x01,0xF0);
8257 SiS_SetCH70xxANDOR(SiS_Pr,0x061E,0xF0); 8104 SiS_SetCH70xxANDOR(SiS_Pr,0x1e,0x06,0xF0);
8258 SiS_SetCH70xxANDOR(SiS_Pr,0x051F,0xF0); 8105 SiS_SetCH70xxANDOR(SiS_Pr,0x1f,0x05,0xF0);
8259 SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); /* loop filter off for mode 24 */ 8106 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x00,0xEF); /* loop filter off for mode 24 */
8260 SiS_SetCH70xxANDOR(SiS_Pr,0x0021,0xFE); /* ACIV off, need to set FSCI */ 8107 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x00,0xFE); * ACIV off, need to set FSCI */
8261#endif /* All alternatives wrong (datasheet wrong?), don't use FSCI */ 8108#endif /* All alternatives wrong (datasheet wrong?), don't use FSCI */
8262 SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); /* loop filter off */ 8109 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x00,0xEF); /* loop filter off */
8263 SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE); 8110 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x01,0xFE);
8111 }
8264 } 8112 }
8265 } 8113 } else { /* ---- PAL ---- */
8266 } else { /* ---- PAL ---- */ 8114 /* We don't play around with FSCI in PAL mode */
8267 /* We don't play around with FSCI in PAL mode */
8268 if(resindex == 0x04) { 8115 if(resindex == 0x04) {
8269 SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); /* loop filter off */ 8116 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x00,0xEF); /* loop filter off */
8270 SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE); /* ACIV on */ 8117 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x01,0xFE); /* ACIV on */
8271 } else { 8118 } else {
8272 SiS_SetCH70xxANDOR(SiS_Pr,0x0020,0xEF); /* loop filter off */ 8119 SiS_SetCH70xxANDOR(SiS_Pr,0x20,0x00,0xEF); /* loop filter off */
8273 SiS_SetCH70xxANDOR(SiS_Pr,0x0121,0xFE); /* ACIV on */ 8120 SiS_SetCH70xxANDOR(SiS_Pr,0x21,0x01,0xFE); /* ACIV on */
8274 } 8121 }
8275 } 8122 }
8276 8123
8277#endif /* 300 */ 8124#endif /* 300 */
8278 8125
8279 } else { 8126 } else {
8280 8127
8281 /* Chrontel 7019 - assumed that it does not come with a 300 series chip */ 8128 /* Chrontel 7019 - assumed that it does not come with a 300 series chip */
8282 8129
8283#ifdef SIS315H 8130#ifdef SIS315H
8284 8131
8285 /* We don't support modes >1024x768 */ 8132 unsigned short temp;
8286 if (resindex > 6) return; 8133
8287 8134 /* We don't support modes >1024x768 */
8288 temp = CHTVRegData[resindex].Reg[0]; 8135 if (resindex > 6) return;
8289 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) { 8136
8290 temp |= 0x10; 8137 temp = CHTVRegData[resindex].Reg[0];
8291 } 8138 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) temp |= 0x10;
8292 tempbx=((temp & 0x00FF) << 8) | 0x00; 8139 SiS_SetCH701x(SiS_Pr,0x00,temp);
8293 SiS_SetCH701x(SiS_Pr,tempbx); 8140
8294 8141 SiS_SetCH701x(SiS_Pr,0x01,CHTVRegData[resindex].Reg[1]);
8295 temp = CHTVRegData[resindex].Reg[1]; 8142 SiS_SetCH701x(SiS_Pr,0x02,CHTVRegData[resindex].Reg[2]);
8296 tempbx=((temp & 0x00FF) << 8) | 0x01; 8143 SiS_SetCH701x(SiS_Pr,0x04,CHTVRegData[resindex].Reg[3]);
8297 SiS_SetCH701x(SiS_Pr,tempbx); 8144 SiS_SetCH701x(SiS_Pr,0x03,CHTVRegData[resindex].Reg[4]);
8298 8145 SiS_SetCH701x(SiS_Pr,0x05,CHTVRegData[resindex].Reg[5]);
8299 temp = CHTVRegData[resindex].Reg[2]; 8146 SiS_SetCH701x(SiS_Pr,0x06,CHTVRegData[resindex].Reg[6]);
8300 tempbx=((temp & 0x00FF) << 8) | 0x02; 8147
8301 SiS_SetCH701x(SiS_Pr,tempbx); 8148 temp = CHTVRegData[resindex].Reg[7];
8302 8149 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) temp = 0x66;
8303 temp = CHTVRegData[resindex].Reg[3]; 8150 SiS_SetCH701x(SiS_Pr,0x07,temp);
8304 tempbx=((temp & 0x00FF) << 8) | 0x04; 8151
8305 SiS_SetCH701x(SiS_Pr,tempbx); 8152 SiS_SetCH701x(SiS_Pr,0x08,CHTVRegData[resindex].Reg[8]);
8306 8153 SiS_SetCH701x(SiS_Pr,0x15,CHTVRegData[resindex].Reg[9]);
8307 temp = CHTVRegData[resindex].Reg[4]; 8154 SiS_SetCH701x(SiS_Pr,0x1f,CHTVRegData[resindex].Reg[10]);
8308 tempbx=((temp & 0x00FF) << 8) | 0x03; 8155 SiS_SetCH701x(SiS_Pr,0x0c,CHTVRegData[resindex].Reg[11]);
8309 SiS_SetCH701x(SiS_Pr,tempbx); 8156 SiS_SetCH701x(SiS_Pr,0x0d,CHTVRegData[resindex].Reg[12]);
8310 8157 SiS_SetCH701x(SiS_Pr,0x0e,CHTVRegData[resindex].Reg[13]);
8311 temp = CHTVRegData[resindex].Reg[5]; 8158 SiS_SetCH701x(SiS_Pr,0x0f,CHTVRegData[resindex].Reg[14]);
8312 tempbx=((temp & 0x00FF) << 8) | 0x05; 8159 SiS_SetCH701x(SiS_Pr,0x10,CHTVRegData[resindex].Reg[15]);
8313 SiS_SetCH701x(SiS_Pr,tempbx); 8160
8314 8161 temp = SiS_GetCH701x(SiS_Pr,0x21) & ~0x02;
8315 temp = CHTVRegData[resindex].Reg[6]; 8162 /* D1 should be set for PAL, PAL-N and NTSC-J,
8316 tempbx=((temp & 0x00FF) << 8) | 0x06; 8163 but I won't do that for PAL unless somebody
8317 SiS_SetCH701x(SiS_Pr,tempbx); 8164 tells me to do so. Since the BIOS uses
8318 8165 non-default CIV values and blacklevels,
8319 temp = CHTVRegData[resindex].Reg[7]; 8166 this might be compensated anyway.
8320 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) { 8167 */
8321 temp = 0x66; 8168 if(SiS_Pr->SiS_TVMode & (TVSetPALN | TVSetNTSCJ)) temp |= 0x02;
8322 } 8169 SiS_SetCH701x(SiS_Pr,0x21,temp);
8323 tempbx=((temp & 0x00FF) << 8) | 0x07;
8324 SiS_SetCH701x(SiS_Pr,tempbx);
8325
8326 temp = CHTVRegData[resindex].Reg[8];
8327 tempbx=((temp & 0x00FF) << 8) | 0x08;
8328 SiS_SetCH701x(SiS_Pr,tempbx);
8329
8330 temp = CHTVRegData[resindex].Reg[9];
8331 tempbx=((temp & 0x00FF) << 8) | 0x15;
8332 SiS_SetCH701x(SiS_Pr,tempbx);
8333
8334 temp = CHTVRegData[resindex].Reg[10];
8335 tempbx=((temp & 0x00FF) << 8) | 0x1f;
8336 SiS_SetCH701x(SiS_Pr,tempbx);
8337
8338 temp = CHTVRegData[resindex].Reg[11];
8339 tempbx=((temp & 0x00FF) << 8) | 0x0c;
8340 SiS_SetCH701x(SiS_Pr,tempbx);
8341
8342 temp = CHTVRegData[resindex].Reg[12];
8343 tempbx=((temp & 0x00FF) << 8) | 0x0d;
8344 SiS_SetCH701x(SiS_Pr,tempbx);
8345
8346 temp = CHTVRegData[resindex].Reg[13];
8347 tempbx=((temp & 0x00FF) << 8) | 0x0e;
8348 SiS_SetCH701x(SiS_Pr,tempbx);
8349
8350 temp = CHTVRegData[resindex].Reg[14];
8351 tempbx=((temp & 0x00FF) << 8) | 0x0f;
8352 SiS_SetCH701x(SiS_Pr,tempbx);
8353
8354 temp = CHTVRegData[resindex].Reg[15];
8355 tempbx=((temp & 0x00FF) << 8) | 0x10;
8356 SiS_SetCH701x(SiS_Pr,tempbx);
8357
8358 temp = SiS_GetCH701x(SiS_Pr,0x21) & ~0x02;
8359 /* D1 should be set for PAL, PAL-N and NTSC-J,
8360 but I won't do that for PAL unless somebody
8361 tells me to do so. Since the BIOS uses
8362 non-default CIV values and blacklevels,
8363 this might be compensated anyway.
8364 */
8365 if(SiS_Pr->SiS_TVMode & (TVSetPALN | TVSetNTSCJ)) temp |= 0x02;
8366 SiS_SetCH701x(SiS_Pr,((temp << 8) | 0x21));
8367 8170
8368#endif /* 315 */ 8171#endif /* 315 */
8369 8172
8370 } 8173 }
8371 8174
8372#ifdef SIS_CP 8175#ifdef SIS_CP
8373 SIS_CP_INIT301_CP3 8176 SIS_CP_INIT301_CP3
8374#endif 8177#endif
8375 8178
8376} 8179}
8377 8180
8181#ifdef SIS315H /* ----------- 315 series only ---------- */
8182
8378void 8183void
8379SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8184SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr)
8380{ 8185{
8381 USHORT temp; 8186 unsigned short temp;
8382 8187
8383 /* Enable Chrontel 7019 LCD panel backlight */ 8188 /* Enable Chrontel 7019 LCD panel backlight */
8384 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8189 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
8385 if(HwInfo->jChipType == SIS_740) { 8190 if(SiS_Pr->ChipType == SIS_740) {
8386 SiS_SetCH701x(SiS_Pr,0x6566); 8191 SiS_SetCH701x(SiS_Pr,0x66,0x65);
8387 } else { 8192 } else {
8388 temp = SiS_GetCH701x(SiS_Pr,0x66); 8193 temp = SiS_GetCH701x(SiS_Pr,0x66);
8389 temp |= 0x20; 8194 temp |= 0x20;
8390 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); 8195 SiS_SetCH701x(SiS_Pr,0x66,temp);
8391 } 8196 }
8392 } 8197 }
8393} 8198}
8394 8199
8395void 8200void
8396SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr) 8201SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr)
8397{ 8202{
8398 USHORT temp; 8203 unsigned short temp;
8399 8204
8400 /* Disable Chrontel 7019 LCD panel backlight */ 8205 /* Disable Chrontel 7019 LCD panel backlight */
8401 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8206 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
8402 temp = SiS_GetCH701x(SiS_Pr,0x66); 8207 temp = SiS_GetCH701x(SiS_Pr,0x66);
8403 temp &= 0xDF; 8208 temp &= 0xDF;
8404 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); 8209 SiS_SetCH701x(SiS_Pr,0x66,temp);
8405 } 8210 }
8406} 8211}
8407 8212
8408#ifdef SIS315H /* ----------- 315 series only ---------- */
8409
8410static void 8213static void
8411SiS_ChrontelPowerSequencing(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8214SiS_ChrontelPowerSequencing(struct SiS_Private *SiS_Pr)
8412{ 8215{
8413 UCHAR regtable[] = { 0x67, 0x68, 0x69, 0x6a, 0x6b }; 8216 static const unsigned char regtable[] = { 0x67, 0x68, 0x69, 0x6a, 0x6b };
8414 UCHAR table1024_740[] = { 0x01, 0x02, 0x01, 0x01, 0x01 }; 8217 static const unsigned char table1024_740[] = { 0x01, 0x02, 0x01, 0x01, 0x01 };
8415 UCHAR table1400_740[] = { 0x01, 0x6e, 0x01, 0x01, 0x01 }; 8218 static const unsigned char table1400_740[] = { 0x01, 0x6e, 0x01, 0x01, 0x01 };
8416 UCHAR asus1024_740[] = { 0x19, 0x6e, 0x01, 0x19, 0x09 }; 8219 static const unsigned char asus1024_740[] = { 0x19, 0x6e, 0x01, 0x19, 0x09 };
8417 UCHAR asus1400_740[] = { 0x19, 0x6e, 0x01, 0x19, 0x09 }; 8220 static const unsigned char asus1400_740[] = { 0x19, 0x6e, 0x01, 0x19, 0x09 };
8418 UCHAR table1024_650[] = { 0x01, 0x02, 0x01, 0x01, 0x02 }; 8221 static const unsigned char table1024_650[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
8419 UCHAR table1400_650[] = { 0x01, 0x02, 0x01, 0x01, 0x02 }; 8222 static const unsigned char table1400_650[] = { 0x01, 0x02, 0x01, 0x01, 0x02 };
8420 UCHAR *tableptr = NULL; 8223 const unsigned char *tableptr = NULL;
8421 int i; 8224 int i;
8422 8225
8423 /* Set up Power up/down timing */ 8226 /* Set up Power up/down timing */
8424 8227
8425 if(HwInfo->jChipType == SIS_740) { 8228 if(SiS_Pr->ChipType == SIS_740) {
8426 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 8229 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
8427 if(SiS_Pr->SiS_CustomT == CUT_ASUSL3000D) tableptr = asus1024_740; 8230 if(SiS_Pr->SiS_CustomT == CUT_ASUSL3000D) tableptr = asus1024_740;
8428 else tableptr = table1024_740; 8231 else tableptr = table1024_740;
8429 } else if((SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) || 8232 } else if((SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) ||
8430 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) || 8233 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) ||
8431 (SiS_Pr->SiS_LCDResInfo == Panel_1600x1200)) { 8234 (SiS_Pr->SiS_LCDResInfo == Panel_1600x1200)) {
8432 if(SiS_Pr->SiS_CustomT == CUT_ASUSL3000D) tableptr = asus1400_740; 8235 if(SiS_Pr->SiS_CustomT == CUT_ASUSL3000D) tableptr = asus1400_740;
8433 else tableptr = table1400_740; 8236 else tableptr = table1400_740;
8434 } else return; 8237 } else return;
8435 } else { 8238 } else {
8436 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 8239 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
8437 tableptr = table1024_650; 8240 tableptr = table1024_650;
8438 } else if((SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) || 8241 } else if((SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) ||
8439 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) || 8242 (SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) ||
8440 (SiS_Pr->SiS_LCDResInfo == Panel_1600x1200)) { 8243 (SiS_Pr->SiS_LCDResInfo == Panel_1600x1200)) {
8441 tableptr = table1400_650; 8244 tableptr = table1400_650;
8442 } else return; 8245 } else return;
8443 } 8246 }
8444 8247
8445 for(i=0; i<5; i++) { 8248 for(i=0; i<5; i++) {
8446 SiS_SetCH701x(SiS_Pr,(tableptr[i] << 8) | regtable[i]); 8249 SiS_SetCH701x(SiS_Pr, regtable[i], tableptr[i]);
8447 } 8250 }
8448} 8251}
8449 8252
8450static void 8253static void
8451SiS_SetCH701xForLCD(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8254SiS_SetCH701xForLCD(struct SiS_Private *SiS_Pr)
8452{ 8255{
8453 UCHAR regtable[] = { 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71, 8256 const unsigned char *tableptr = NULL;
8454 0x72, 0x73, 0x74, 0x76, 0x78, 0x7d, 0x66 }; 8257 unsigned short tempbh;
8455 UCHAR table1024_740[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
8456 0xa3, 0xc8, 0xc7, 0xac, 0xe0, 0x02, 0x44 };
8457 UCHAR table1280_740[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8458 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44 };
8459 UCHAR table1400_740[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8460 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44 };
8461 UCHAR table1600_740[] = { 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
8462 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a, 0x44 };
8463 UCHAR table1024_650[] = { 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
8464 0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02 };
8465 UCHAR table1280_650[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8466 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02 };
8467 UCHAR table1400_650[] = { 0x60, 0x03, 0x11, 0x00, 0x40, 0xef,
8468 0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02 };
8469 UCHAR table1600_650[] = { 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
8470 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a };
8471 UCHAR *tableptr = NULL;
8472 USHORT tempbh;
8473 int i; 8258 int i;
8259 static const unsigned char regtable[] = {
8260 0x1c, 0x5f, 0x64, 0x6f, 0x70, 0x71,
8261 0x72, 0x73, 0x74, 0x76, 0x78, 0x7d, 0x66
8262 };
8263 static const unsigned char table1024_740[] = {
8264 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
8265 0xa3, 0xc8, 0xc7, 0xac, 0xe0, 0x02, 0x44
8266 };
8267 static const unsigned char table1280_740[] = {
8268 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8269 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44
8270 };
8271 static const unsigned char table1400_740[] = {
8272 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8273 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02, 0x44
8274 };
8275 static const unsigned char table1600_740[] = {
8276 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
8277 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a, 0x44
8278 };
8279 static const unsigned char table1024_650[] = {
8280 0x60, 0x02, 0x00, 0x07, 0x40, 0xed,
8281 0xa3, 0xc8, 0xc7, 0xac, 0x60, 0x02
8282 };
8283 static const unsigned char table1280_650[] = {
8284 0x60, 0x03, 0x11, 0x00, 0x40, 0xe3,
8285 0xad, 0xdb, 0xf6, 0xac, 0xe0, 0x02
8286 };
8287 static const unsigned char table1400_650[] = {
8288 0x60, 0x03, 0x11, 0x00, 0x40, 0xef,
8289 0xad, 0xdb, 0xf6, 0xac, 0x60, 0x02
8290 };
8291 static const unsigned char table1600_650[] = {
8292 0x60, 0x04, 0x11, 0x00, 0x40, 0xe3,
8293 0xad, 0xde, 0xf6, 0xac, 0x60, 0x1a
8294 };
8474 8295
8475 if(HwInfo->jChipType == SIS_740) { 8296 if(SiS_Pr->ChipType == SIS_740) {
8476 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) tableptr = table1024_740; 8297 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) tableptr = table1024_740;
8477 else if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) tableptr = table1280_740; 8298 else if(SiS_Pr->SiS_LCDResInfo == Panel_1280x1024) tableptr = table1280_740;
8478 else if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) tableptr = table1400_740; 8299 else if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) tableptr = table1400_740;
@@ -8499,138 +8320,139 @@ SiS_SetCH701xForLCD(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
8499 } 8320 }
8500 } 8321 }
8501 8322
8502 if(HwInfo->jChipType == SIS_740) tempbh = 0x0d; 8323 if(SiS_Pr->ChipType == SIS_740) tempbh = 0x0d;
8503 else tempbh = 0x0c; 8324 else tempbh = 0x0c;
8504 8325
8505 for(i = 0; i < tempbh; i++) { 8326 for(i = 0; i < tempbh; i++) {
8506 SiS_SetCH701x(SiS_Pr,(tableptr[i] << 8) | regtable[i]); 8327 SiS_SetCH701x(SiS_Pr, regtable[i], tableptr[i]);
8507 } 8328 }
8508 SiS_ChrontelPowerSequencing(SiS_Pr,HwInfo); 8329 SiS_ChrontelPowerSequencing(SiS_Pr);
8509 tempbh = SiS_GetCH701x(SiS_Pr,0x1e); 8330 tempbh = SiS_GetCH701x(SiS_Pr,0x1e);
8510 tempbh |= 0xc0; 8331 tempbh |= 0xc0;
8511 SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1e); 8332 SiS_SetCH701x(SiS_Pr,0x1e,tempbh);
8512 8333
8513 if(HwInfo->jChipType == SIS_740) { 8334 if(SiS_Pr->ChipType == SIS_740) {
8514 tempbh = SiS_GetCH701x(SiS_Pr,0x1c); 8335 tempbh = SiS_GetCH701x(SiS_Pr,0x1c);
8515 tempbh &= 0xfb; 8336 tempbh &= 0xfb;
8516 SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x1c); 8337 SiS_SetCH701x(SiS_Pr,0x1c,tempbh);
8517 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2d,0x03); 8338 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2d,0x03);
8518 tempbh = SiS_GetCH701x(SiS_Pr,0x64); 8339 tempbh = SiS_GetCH701x(SiS_Pr,0x64);
8519 tempbh |= 0x40; 8340 tempbh |= 0x40;
8520 SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x64); 8341 SiS_SetCH701x(SiS_Pr,0x64,tempbh);
8521 tempbh = SiS_GetCH701x(SiS_Pr,0x03); 8342 tempbh = SiS_GetCH701x(SiS_Pr,0x03);
8522 tempbh &= 0x3f; 8343 tempbh &= 0x3f;
8523 SiS_SetCH701x(SiS_Pr,(tempbh << 8) | 0x03); 8344 SiS_SetCH701x(SiS_Pr,0x03,tempbh);
8524 } 8345 }
8525} 8346}
8526 8347
8527static void 8348static void
8528SiS_ChrontelResetVSync(SiS_Private *SiS_Pr) 8349SiS_ChrontelResetVSync(struct SiS_Private *SiS_Pr)
8529{ 8350{
8530 unsigned char temp, temp1; 8351 unsigned char temp, temp1;
8531 8352
8532 temp1 = SiS_GetCH701x(SiS_Pr,0x49); 8353 temp1 = SiS_GetCH701x(SiS_Pr,0x49);
8533 SiS_SetCH701x(SiS_Pr,0x3e49); 8354 SiS_SetCH701x(SiS_Pr,0x49,0x3e);
8534 temp = SiS_GetCH701x(SiS_Pr,0x47); 8355 temp = SiS_GetCH701x(SiS_Pr,0x47);
8535 temp &= 0x7f; /* Use external VSYNC */ 8356 temp &= 0x7f; /* Use external VSYNC */
8536 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); 8357 SiS_SetCH701x(SiS_Pr,0x47,temp);
8537 SiS_LongDelay(SiS_Pr,3); 8358 SiS_LongDelay(SiS_Pr, 3);
8538 temp = SiS_GetCH701x(SiS_Pr,0x47); 8359 temp = SiS_GetCH701x(SiS_Pr,0x47);
8539 temp |= 0x80; /* Use internal VSYNC */ 8360 temp |= 0x80; /* Use internal VSYNC */
8540 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); 8361 SiS_SetCH701x(SiS_Pr,0x47,temp);
8541 SiS_SetCH701x(SiS_Pr,(temp1 << 8) | 0x49); 8362 SiS_SetCH701x(SiS_Pr,0x49,temp1);
8542} 8363}
8543 8364
8544static void 8365static void
8545SiS_Chrontel701xOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8366SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr)
8546{ 8367{
8547 USHORT temp; 8368 unsigned short temp;
8548 8369
8549 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8370 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
8550 if(HwInfo->jChipType == SIS_740) { 8371 if(SiS_Pr->ChipType == SIS_740) {
8551 temp = SiS_GetCH701x(SiS_Pr,0x1c); 8372 temp = SiS_GetCH701x(SiS_Pr,0x1c);
8552 temp |= 0x04; /* Invert XCLK phase */ 8373 temp |= 0x04; /* Invert XCLK phase */
8553 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x1c); 8374 SiS_SetCH701x(SiS_Pr,0x1c,temp);
8554 } 8375 }
8555 if(SiS_IsYPbPr(SiS_Pr, HwInfo)) { 8376 if(SiS_IsYPbPr(SiS_Pr)) {
8556 temp = SiS_GetCH701x(SiS_Pr,0x01); 8377 temp = SiS_GetCH701x(SiS_Pr,0x01);
8557 temp &= 0x3f; 8378 temp &= 0x3f;
8558 temp |= 0x80; /* Enable YPrPb (HDTV) */ 8379 temp |= 0x80; /* Enable YPrPb (HDTV) */
8559 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x01); 8380 SiS_SetCH701x(SiS_Pr,0x01,temp);
8560 } 8381 }
8561 if(SiS_IsChScart(SiS_Pr, HwInfo)) { 8382 if(SiS_IsChScart(SiS_Pr)) {
8562 temp = SiS_GetCH701x(SiS_Pr,0x01); 8383 temp = SiS_GetCH701x(SiS_Pr,0x01);
8563 temp &= 0x3f; 8384 temp &= 0x3f;
8564 temp |= 0xc0; /* Enable SCART + CVBS */ 8385 temp |= 0xc0; /* Enable SCART + CVBS */
8565 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x01); 8386 SiS_SetCH701x(SiS_Pr,0x01,temp);
8566 } 8387 }
8567 if(HwInfo->jChipType == SIS_740) { 8388 if(SiS_Pr->ChipType == SIS_740) {
8568 SiS_ChrontelResetVSync(SiS_Pr); 8389 SiS_ChrontelResetVSync(SiS_Pr);
8569 SiS_SetCH701x(SiS_Pr,0x2049); /* Enable TV path */ 8390 SiS_SetCH701x(SiS_Pr,0x49,0x20); /* Enable TV path */
8570 } else { 8391 } else {
8571 SiS_SetCH701x(SiS_Pr,0x2049); /* Enable TV path */ 8392 SiS_SetCH701x(SiS_Pr,0x49,0x20); /* Enable TV path */
8572 temp = SiS_GetCH701x(SiS_Pr,0x49); 8393 temp = SiS_GetCH701x(SiS_Pr,0x49);
8573 if(SiS_IsYPbPr(SiS_Pr,HwInfo)) { 8394 if(SiS_IsYPbPr(SiS_Pr)) {
8574 temp = SiS_GetCH701x(SiS_Pr,0x73); 8395 temp = SiS_GetCH701x(SiS_Pr,0x73);
8575 temp |= 0x60; 8396 temp |= 0x60;
8576 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x73); 8397 SiS_SetCH701x(SiS_Pr,0x73,temp);
8577 } 8398 }
8578 temp = SiS_GetCH701x(SiS_Pr,0x47); 8399 temp = SiS_GetCH701x(SiS_Pr,0x47);
8579 temp &= 0x7f; 8400 temp &= 0x7f;
8580 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); 8401 SiS_SetCH701x(SiS_Pr,0x47,temp);
8581 SiS_LongDelay(SiS_Pr,2); 8402 SiS_LongDelay(SiS_Pr, 2);
8582 temp = SiS_GetCH701x(SiS_Pr,0x47); 8403 temp = SiS_GetCH701x(SiS_Pr,0x47);
8583 temp |= 0x80; 8404 temp |= 0x80;
8584 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); 8405 SiS_SetCH701x(SiS_Pr,0x47,temp);
8585 } 8406 }
8586 } 8407 }
8587} 8408}
8588 8409
8589static void 8410static void
8590SiS_Chrontel701xOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8411SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr)
8591{ 8412{
8592 USHORT temp; 8413 unsigned short temp;
8593 8414
8594 /* Complete power down of LVDS */ 8415 /* Complete power down of LVDS */
8595 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8416 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
8596 if(HwInfo->jChipType == SIS_740) { 8417 if(SiS_Pr->ChipType == SIS_740) {
8597 SiS_LongDelay(SiS_Pr,1); 8418 SiS_LongDelay(SiS_Pr, 1);
8598 SiS_GenericDelay(SiS_Pr,0x16ff); 8419 SiS_GenericDelay(SiS_Pr, 5887);
8599 SiS_SetCH701x(SiS_Pr,0xac76); 8420 SiS_SetCH701x(SiS_Pr,0x76,0xac);
8600 SiS_SetCH701x(SiS_Pr,0x0066); 8421 SiS_SetCH701x(SiS_Pr,0x66,0x00);
8601 } else { 8422 } else {
8602 SiS_LongDelay(SiS_Pr,2); 8423 SiS_LongDelay(SiS_Pr, 2);
8603 temp = SiS_GetCH701x(SiS_Pr,0x76); 8424 temp = SiS_GetCH701x(SiS_Pr,0x76);
8604 temp &= 0xfc; 8425 temp &= 0xfc;
8605 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76); 8426 SiS_SetCH701x(SiS_Pr,0x76,temp);
8606 SiS_SetCH701x(SiS_Pr,0x0066); 8427 SiS_SetCH701x(SiS_Pr,0x66,0x00);
8607 } 8428 }
8608 } 8429 }
8609} 8430}
8610 8431
8611static void 8432static void
8612SiS_ChrontelResetDB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8433SiS_ChrontelResetDB(struct SiS_Private *SiS_Pr)
8613{ 8434{
8614 USHORT temp; 8435 unsigned short temp;
8615 8436
8616 if(HwInfo->jChipType == SIS_740) { 8437 if(SiS_Pr->ChipType == SIS_740) {
8617 8438
8618 temp = SiS_GetCH701x(SiS_Pr,0x4a); /* Version ID */ 8439 temp = SiS_GetCH701x(SiS_Pr,0x4a); /* Version ID */
8619 temp &= 0x01; 8440 temp &= 0x01;
8620 if(!temp) { 8441 if(!temp) {
8621 8442
8622 if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo)) { 8443 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8623 temp = SiS_GetCH701x(SiS_Pr,0x49); 8444 temp = SiS_GetCH701x(SiS_Pr,0x49);
8624 SiS_SetCH701x(SiS_Pr,0x3e49); 8445 SiS_SetCH701x(SiS_Pr,0x49,0x3e);
8625 } 8446 }
8447
8626 /* Reset Chrontel 7019 datapath */ 8448 /* Reset Chrontel 7019 datapath */
8627 SiS_SetCH701x(SiS_Pr,0x1048); 8449 SiS_SetCH701x(SiS_Pr,0x48,0x10);
8628 SiS_LongDelay(SiS_Pr,1); 8450 SiS_LongDelay(SiS_Pr, 1);
8629 SiS_SetCH701x(SiS_Pr,0x1848); 8451 SiS_SetCH701x(SiS_Pr,0x48,0x18);
8630 8452
8631 if(SiS_WeHaveBacklightCtrl(SiS_Pr, HwInfo)) { 8453 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8632 SiS_ChrontelResetVSync(SiS_Pr); 8454 SiS_ChrontelResetVSync(SiS_Pr);
8633 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x49); 8455 SiS_SetCH701x(SiS_Pr,0x49,temp);
8634 } 8456 }
8635 8457
8636 } else { 8458 } else {
@@ -8638,72 +8460,72 @@ SiS_ChrontelResetDB(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
8638 /* Clear/set/clear GPIO */ 8460 /* Clear/set/clear GPIO */
8639 temp = SiS_GetCH701x(SiS_Pr,0x5c); 8461 temp = SiS_GetCH701x(SiS_Pr,0x5c);
8640 temp &= 0xef; 8462 temp &= 0xef;
8641 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c); 8463 SiS_SetCH701x(SiS_Pr,0x5c,temp);
8642 temp = SiS_GetCH701x(SiS_Pr,0x5c); 8464 temp = SiS_GetCH701x(SiS_Pr,0x5c);
8643 temp |= 0x10; 8465 temp |= 0x10;
8644 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c); 8466 SiS_SetCH701x(SiS_Pr,0x5c,temp);
8645 temp = SiS_GetCH701x(SiS_Pr,0x5c); 8467 temp = SiS_GetCH701x(SiS_Pr,0x5c);
8646 temp &= 0xef; 8468 temp &= 0xef;
8647 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x5c); 8469 SiS_SetCH701x(SiS_Pr,0x5c,temp);
8648 temp = SiS_GetCH701x(SiS_Pr,0x61); 8470 temp = SiS_GetCH701x(SiS_Pr,0x61);
8649 if(!temp) { 8471 if(!temp) {
8650 SiS_SetCH701xForLCD(SiS_Pr, HwInfo); 8472 SiS_SetCH701xForLCD(SiS_Pr);
8651 } 8473 }
8652 } 8474 }
8653 8475
8654 } else { /* 650 */ 8476 } else { /* 650 */
8655 /* Reset Chrontel 7019 datapath */ 8477 /* Reset Chrontel 7019 datapath */
8656 SiS_SetCH701x(SiS_Pr,0x1048); 8478 SiS_SetCH701x(SiS_Pr,0x48,0x10);
8657 SiS_LongDelay(SiS_Pr,1); 8479 SiS_LongDelay(SiS_Pr, 1);
8658 SiS_SetCH701x(SiS_Pr,0x1848); 8480 SiS_SetCH701x(SiS_Pr,0x48,0x18);
8659 } 8481 }
8660} 8482}
8661 8483
8662static void 8484static void
8663SiS_ChrontelInitTVVSync(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8485SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr)
8664{ 8486{
8665 USHORT temp; 8487 unsigned short temp;
8666 8488
8667 if(HwInfo->jChipType == SIS_740) { 8489 if(SiS_Pr->ChipType == SIS_740) {
8668 8490
8669 if(SiS_WeHaveBacklightCtrl(SiS_Pr,HwInfo)) { 8491 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8670 SiS_ChrontelResetVSync(SiS_Pr); 8492 SiS_ChrontelResetVSync(SiS_Pr);
8671 } 8493 }
8672 8494
8673 } else { 8495 } else {
8674 8496
8675 SiS_SetCH701x(SiS_Pr,0xaf76); /* Power up LVDS block */ 8497 SiS_SetCH701x(SiS_Pr,0x76,0xaf); /* Power up LVDS block */
8676 temp = SiS_GetCH701x(SiS_Pr,0x49); 8498 temp = SiS_GetCH701x(SiS_Pr,0x49);
8677 temp &= 1; 8499 temp &= 1;
8678 if(temp != 1) { /* TV block powered? (0 = yes, 1 = no) */ 8500 if(temp != 1) { /* TV block powered? (0 = yes, 1 = no) */
8679 temp = SiS_GetCH701x(SiS_Pr,0x47); 8501 temp = SiS_GetCH701x(SiS_Pr,0x47);
8680 temp &= 0x70; 8502 temp &= 0x70;
8681 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); /* enable VSYNC */ 8503 SiS_SetCH701x(SiS_Pr,0x47,temp); /* enable VSYNC */
8682 SiS_LongDelay(SiS_Pr,3); 8504 SiS_LongDelay(SiS_Pr, 3);
8683 temp = SiS_GetCH701x(SiS_Pr,0x47); 8505 temp = SiS_GetCH701x(SiS_Pr,0x47);
8684 temp |= 0x80; 8506 temp |= 0x80;
8685 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x47); /* disable VSYNC */ 8507 SiS_SetCH701x(SiS_Pr,0x47,temp); /* disable VSYNC */
8686 } 8508 }
8687 8509
8688 } 8510 }
8689} 8511}
8690 8512
8691static void 8513static void
8692SiS_ChrontelDoSomething3(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo) 8514SiS_ChrontelDoSomething3(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
8693{ 8515{
8694 USHORT temp,temp1; 8516 unsigned short temp,temp1;
8695 8517
8696 if(HwInfo->jChipType == SIS_740) { 8518 if(SiS_Pr->ChipType == SIS_740) {
8697 8519
8698 temp = SiS_GetCH701x(SiS_Pr,0x61); 8520 temp = SiS_GetCH701x(SiS_Pr,0x61);
8699 if(temp < 1) { 8521 if(temp < 1) {
8700 temp++; 8522 temp++;
8701 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x61); 8523 SiS_SetCH701x(SiS_Pr,0x61,temp);
8702 } 8524 }
8703 SiS_SetCH701x(SiS_Pr,0x4566); /* Panel power on */ 8525 SiS_SetCH701x(SiS_Pr,0x66,0x45); /* Panel power on */
8704 SiS_SetCH701x(SiS_Pr,0xaf76); /* All power on */ 8526 SiS_SetCH701x(SiS_Pr,0x76,0xaf); /* All power on */
8705 SiS_LongDelay(SiS_Pr,1); 8527 SiS_LongDelay(SiS_Pr, 1);
8706 SiS_GenericDelay(SiS_Pr,0x16ff); 8528 SiS_GenericDelay(SiS_Pr, 5887);
8707 8529
8708 } else { /* 650 */ 8530 } else { /* 650 */
8709 8531
@@ -8711,38 +8533,38 @@ SiS_ChrontelDoSomething3(SiS_Private *SiS_Pr, USHORT ModeNo, PSIS_HW_INFO HwInfo
8711 temp = SiS_GetCH701x(SiS_Pr,0x61); 8533 temp = SiS_GetCH701x(SiS_Pr,0x61);
8712 if(temp < 2) { 8534 if(temp < 2) {
8713 temp++; 8535 temp++;
8714 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x61); 8536 SiS_SetCH701x(SiS_Pr,0x61,temp);
8715 temp1 = 1; 8537 temp1 = 1;
8716 } 8538 }
8717 SiS_SetCH701x(SiS_Pr,0xac76); 8539 SiS_SetCH701x(SiS_Pr,0x76,0xac);
8718 temp = SiS_GetCH701x(SiS_Pr,0x66); 8540 temp = SiS_GetCH701x(SiS_Pr,0x66);
8719 temp |= 0x5f; 8541 temp |= 0x5f;
8720 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); 8542 SiS_SetCH701x(SiS_Pr,0x66,temp);
8721 if(ModeNo > 0x13) { 8543 if(ModeNo > 0x13) {
8722 if(SiS_WeHaveBacklightCtrl(SiS_Pr, HwInfo)) { 8544 if(SiS_WeHaveBacklightCtrl(SiS_Pr)) {
8723 SiS_GenericDelay(SiS_Pr,0x3ff); 8545 SiS_GenericDelay(SiS_Pr, 1023);
8724 } else { 8546 } else {
8725 SiS_GenericDelay(SiS_Pr,0x2ff); 8547 SiS_GenericDelay(SiS_Pr, 767);
8726 } 8548 }
8727 } else { 8549 } else {
8728 if(!temp1) 8550 if(!temp1)
8729 SiS_GenericDelay(SiS_Pr,0x2ff); 8551 SiS_GenericDelay(SiS_Pr, 767);
8730 } 8552 }
8731 temp = SiS_GetCH701x(SiS_Pr,0x76); 8553 temp = SiS_GetCH701x(SiS_Pr,0x76);
8732 temp |= 0x03; 8554 temp |= 0x03;
8733 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76); 8555 SiS_SetCH701x(SiS_Pr,0x76,temp);
8734 temp = SiS_GetCH701x(SiS_Pr,0x66); 8556 temp = SiS_GetCH701x(SiS_Pr,0x66);
8735 temp &= 0x7f; 8557 temp &= 0x7f;
8736 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x66); 8558 SiS_SetCH701x(SiS_Pr,0x66,temp);
8737 SiS_LongDelay(SiS_Pr,1); 8559 SiS_LongDelay(SiS_Pr, 1);
8738 8560
8739 } 8561 }
8740} 8562}
8741 8563
8742static void 8564static void
8743SiS_ChrontelDoSomething2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8565SiS_ChrontelDoSomething2(struct SiS_Private *SiS_Pr)
8744{ 8566{
8745 USHORT temp,tempcl,tempch; 8567 unsigned short temp,tempcl,tempch;
8746 8568
8747 SiS_LongDelay(SiS_Pr, 1); 8569 SiS_LongDelay(SiS_Pr, 1);
8748 tempcl = 3; 8570 tempcl = 3;
@@ -8753,87 +8575,87 @@ SiS_ChrontelDoSomething2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
8753 temp &= 0x04; /* PLL stable? -> bail out */ 8575 temp &= 0x04; /* PLL stable? -> bail out */
8754 if(temp == 0x04) break; 8576 if(temp == 0x04) break;
8755 8577
8756 if(HwInfo->jChipType == SIS_740) { 8578 if(SiS_Pr->ChipType == SIS_740) {
8757 /* Power down LVDS output, PLL normal operation */ 8579 /* Power down LVDS output, PLL normal operation */
8758 SiS_SetCH701x(SiS_Pr,0xac76); 8580 SiS_SetCH701x(SiS_Pr,0x76,0xac);
8759 } 8581 }
8760 8582
8761 SiS_SetCH701xForLCD(SiS_Pr,HwInfo); 8583 SiS_SetCH701xForLCD(SiS_Pr);
8762 8584
8763 if(tempcl == 0) { 8585 if(tempcl == 0) {
8764 if(tempch == 3) break; 8586 if(tempch == 3) break;
8765 SiS_ChrontelResetDB(SiS_Pr,HwInfo); 8587 SiS_ChrontelResetDB(SiS_Pr);
8766 tempcl = 3; 8588 tempcl = 3;
8767 tempch++; 8589 tempch++;
8768 } 8590 }
8769 tempcl--; 8591 tempcl--;
8770 temp = SiS_GetCH701x(SiS_Pr,0x76); 8592 temp = SiS_GetCH701x(SiS_Pr,0x76);
8771 temp &= 0xfb; /* Reset PLL */ 8593 temp &= 0xfb; /* Reset PLL */
8772 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76); 8594 SiS_SetCH701x(SiS_Pr,0x76,temp);
8773 SiS_LongDelay(SiS_Pr,2); 8595 SiS_LongDelay(SiS_Pr, 2);
8774 temp = SiS_GetCH701x(SiS_Pr,0x76); 8596 temp = SiS_GetCH701x(SiS_Pr,0x76);
8775 temp |= 0x04; /* PLL normal operation */ 8597 temp |= 0x04; /* PLL normal operation */
8776 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x76); 8598 SiS_SetCH701x(SiS_Pr,0x76,temp);
8777 if(HwInfo->jChipType == SIS_740) { 8599 if(SiS_Pr->ChipType == SIS_740) {
8778 SiS_SetCH701x(SiS_Pr,0xe078); /* PLL loop filter */ 8600 SiS_SetCH701x(SiS_Pr,0x78,0xe0); /* PLL loop filter */
8779 } else { 8601 } else {
8780 SiS_SetCH701x(SiS_Pr,0x6078); 8602 SiS_SetCH701x(SiS_Pr,0x78,0x60);
8781 } 8603 }
8782 SiS_LongDelay(SiS_Pr,2); 8604 SiS_LongDelay(SiS_Pr, 2);
8783 } while(0); 8605 } while(0);
8784 8606
8785 SiS_SetCH701x(SiS_Pr,0x0077); /* MV? */ 8607 SiS_SetCH701x(SiS_Pr,0x77,0x00); /* MV? */
8786} 8608}
8787 8609
8788static void 8610static void
8789SiS_ChrontelDoSomething1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8611SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr)
8790{ 8612{
8791 USHORT temp; 8613 unsigned short temp;
8792 8614
8793 temp = SiS_GetCH701x(SiS_Pr,0x03); 8615 temp = SiS_GetCH701x(SiS_Pr,0x03);
8794 temp |= 0x80; /* Set datapath 1 to TV */ 8616 temp |= 0x80; /* Set datapath 1 to TV */
8795 temp &= 0xbf; /* Set datapath 2 to LVDS */ 8617 temp &= 0xbf; /* Set datapath 2 to LVDS */
8796 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x03); 8618 SiS_SetCH701x(SiS_Pr,0x03,temp);
8797 8619
8798 if(HwInfo->jChipType == SIS_740) { 8620 if(SiS_Pr->ChipType == SIS_740) {
8799 8621
8800 temp = SiS_GetCH701x(SiS_Pr,0x1c); 8622 temp = SiS_GetCH701x(SiS_Pr,0x1c);
8801 temp &= 0xfb; /* Normal XCLK phase */ 8623 temp &= 0xfb; /* Normal XCLK phase */
8802 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x1c); 8624 SiS_SetCH701x(SiS_Pr,0x1c,temp);
8803 8625
8804 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2d,0x03); 8626 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x2d,0x03);
8805 8627
8806 temp = SiS_GetCH701x(SiS_Pr,0x64); 8628 temp = SiS_GetCH701x(SiS_Pr,0x64);
8807 temp |= 0x40; /* ? Bit not defined */ 8629 temp |= 0x40; /* ? Bit not defined */
8808 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x64); 8630 SiS_SetCH701x(SiS_Pr,0x64,temp);
8809 8631
8810 temp = SiS_GetCH701x(SiS_Pr,0x03); 8632 temp = SiS_GetCH701x(SiS_Pr,0x03);
8811 temp &= 0x3f; /* D1 input to both LVDS and TV */ 8633 temp &= 0x3f; /* D1 input to both LVDS and TV */
8812 SiS_SetCH701x(SiS_Pr,(temp << 8) | 0x03); 8634 SiS_SetCH701x(SiS_Pr,0x03,temp);
8813 8635
8814 if(SiS_Pr->SiS_CustomT == CUT_ASUSL3000D) { 8636 if(SiS_Pr->SiS_CustomT == CUT_ASUSL3000D) {
8815 SiS_SetCH701x(SiS_Pr,0x4063); /* LVDS off */ 8637 SiS_SetCH701x(SiS_Pr,0x63,0x40); /* LVDS off */
8816 SiS_LongDelay(SiS_Pr, 1); 8638 SiS_LongDelay(SiS_Pr, 1);
8817 SiS_SetCH701x(SiS_Pr,0x0063); /* LVDS on */ 8639 SiS_SetCH701x(SiS_Pr,0x63,0x00); /* LVDS on */
8818 SiS_ChrontelResetDB(SiS_Pr, HwInfo); 8640 SiS_ChrontelResetDB(SiS_Pr);
8819 SiS_ChrontelDoSomething2(SiS_Pr, HwInfo); 8641 SiS_ChrontelDoSomething2(SiS_Pr);
8820 SiS_ChrontelDoSomething3(SiS_Pr, 0, HwInfo); 8642 SiS_ChrontelDoSomething3(SiS_Pr, 0);
8821 } else { 8643 } else {
8822 temp = SiS_GetCH701x(SiS_Pr,0x66); 8644 temp = SiS_GetCH701x(SiS_Pr,0x66);
8823 if(temp != 0x45) { 8645 if(temp != 0x45) {
8824 SiS_ChrontelResetDB(SiS_Pr, HwInfo); 8646 SiS_ChrontelResetDB(SiS_Pr);
8825 SiS_ChrontelDoSomething2(SiS_Pr, HwInfo); 8647 SiS_ChrontelDoSomething2(SiS_Pr);
8826 SiS_ChrontelDoSomething3(SiS_Pr, 0, HwInfo); 8648 SiS_ChrontelDoSomething3(SiS_Pr, 0);
8827 } 8649 }
8828 } 8650 }
8829 8651
8830 } else { /* 650 */ 8652 } else { /* 650 */
8831 8653
8832 SiS_ChrontelResetDB(SiS_Pr,HwInfo); 8654 SiS_ChrontelResetDB(SiS_Pr);
8833 SiS_ChrontelDoSomething2(SiS_Pr,HwInfo); 8655 SiS_ChrontelDoSomething2(SiS_Pr);
8834 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34); 8656 temp = SiS_GetReg(SiS_Pr->SiS_P3d4,0x34);
8835 SiS_ChrontelDoSomething3(SiS_Pr,temp,HwInfo); 8657 SiS_ChrontelDoSomething3(SiS_Pr,temp);
8836 SiS_SetCH701x(SiS_Pr,0xaf76); /* All power on, LVDS normal operation */ 8658 SiS_SetCH701x(SiS_Pr,0x76,0xaf); /* All power on, LVDS normal operation */
8837 8659
8838 } 8660 }
8839 8661
@@ -8845,15 +8667,12 @@ SiS_ChrontelDoSomething1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
8845/*********************************************/ 8667/*********************************************/
8846 8668
8847BOOLEAN 8669BOOLEAN
8848SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo) 8670SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
8849{ 8671{
8850#ifdef SIS300 8672#ifdef SIS300
8851 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 8673 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
8852#endif
8853 USHORT ModeIdIndex, RefreshRateTableIndex;
8854#if 0
8855 USHORT temp;
8856#endif 8674#endif
8675 unsigned short ModeIdIndex, RefreshRateTableIndex;
8857 8676
8858 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2; 8677 SiS_Pr->SiS_SetFlag |= ProgrammingCRT2;
8859 8678
@@ -8866,37 +8685,37 @@ SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
8866 /* Used for shifting CR33 */ 8685 /* Used for shifting CR33 */
8867 SiS_Pr->SiS_SelectCRT2Rate = 4; 8686 SiS_Pr->SiS_SelectCRT2Rate = 4;
8868 8687
8869 SiS_UnLockCRT2(SiS_Pr, HwInfo); 8688 SiS_UnLockCRT2(SiS_Pr);
8870 8689
8871 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 8690 RefreshRateTableIndex = SiS_GetRatePtr(SiS_Pr, ModeNo, ModeIdIndex);
8872 8691
8873 SiS_SaveCRT2Info(SiS_Pr,ModeNo); 8692 SiS_SaveCRT2Info(SiS_Pr,ModeNo);
8874 8693
8875 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8694 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
8876 SiS_DisableBridge(SiS_Pr,HwInfo); 8695 SiS_DisableBridge(SiS_Pr);
8877 if((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (HwInfo->jChipType == SIS_730)) { 8696 if((SiS_Pr->SiS_IF_DEF_LVDS == 1) && (SiS_Pr->ChipType == SIS_730)) {
8878 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,0x80); 8697 SiS_SetReg(SiS_Pr->SiS_Part1Port,0x00,0x80);
8879 } 8698 }
8880 SiS_SetCRT2ModeRegs(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 8699 SiS_SetCRT2ModeRegs(SiS_Pr, ModeNo, ModeIdIndex);
8881 } 8700 }
8882 8701
8883 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) { 8702 if(SiS_Pr->SiS_VBInfo & DisableCRT2Display) {
8884 SiS_LockCRT2(SiS_Pr, HwInfo); 8703 SiS_LockCRT2(SiS_Pr);
8885 SiS_DisplayOn(SiS_Pr); 8704 SiS_DisplayOn(SiS_Pr);
8886 return TRUE; 8705 return TRUE;
8887 } 8706 }
8888 8707
8889 SiS_GetCRT2Data(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 8708 SiS_GetCRT2Data(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8890 8709
8891 /* Set up Panel Link for LVDS and LCDA */ 8710 /* Set up Panel Link for LVDS and LCDA */
8892 SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_LCDVDES = 0; 8711 SiS_Pr->SiS_LCDHDES = SiS_Pr->SiS_LCDVDES = 0;
8893 if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) || 8712 if( (SiS_Pr->SiS_IF_DEF_LVDS == 1) ||
8894 ((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) || 8713 ((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) ||
8895 ((HwInfo->jChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) ) { 8714 ((SiS_Pr->ChipType >= SIS_315H) && (SiS_Pr->SiS_VBType & VB_SIS30xBLV)) ) {
8896 SiS_GetLVDSDesData(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 8715 SiS_GetLVDSDesData(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8897 } 8716 }
8898 8717
8899#ifdef LINUX_XF86 8718#ifdef SIS_XORG_XF86
8900#ifdef TWDEBUG 8719#ifdef TWDEBUG
8901 xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_Pr->SiS_LCDHDES, SiS_Pr->SiS_LCDVDES); 8720 xf86DrvMsg(0, X_INFO, "(init301: LCDHDES 0x%03x LCDVDES 0x%03x)\n", SiS_Pr->SiS_LCDHDES, SiS_Pr->SiS_LCDVDES);
8902 xf86DrvMsg(0, X_INFO, "(init301: HDE 0x%03x VDE 0x%03x)\n", SiS_Pr->SiS_HDE, SiS_Pr->SiS_VDE); 8721 xf86DrvMsg(0, X_INFO, "(init301: HDE 0x%03x VDE 0x%03x)\n", SiS_Pr->SiS_HDE, SiS_Pr->SiS_VDE);
@@ -8907,86 +8726,79 @@ SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
8907#endif 8726#endif
8908 8727
8909 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8728 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
8910 SiS_SetGroup1(SiS_Pr, ModeNo, ModeIdIndex, HwInfo, RefreshRateTableIndex); 8729 SiS_SetGroup1(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8911 } 8730 }
8912 8731
8913 if(SiS_Pr->SiS_VBType & VB_SISVB) { 8732 if(SiS_Pr->SiS_VBType & VB_SISVB) {
8914 8733
8915 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8734 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
8916 8735
8917 SiS_SetGroup2(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 8736 SiS_SetGroup2(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8918#ifdef SIS315H 8737#ifdef SIS315H
8919 SiS_SetGroup2_C_ELV(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 8738 SiS_SetGroup2_C_ELV(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8920#endif 8739#endif
8921 SiS_SetGroup3(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 8740 SiS_SetGroup3(SiS_Pr, ModeNo, ModeIdIndex);
8922 SiS_SetGroup4(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex, HwInfo); 8741 SiS_SetGroup4(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8923#ifdef SIS315H 8742#ifdef SIS315H
8924 SiS_SetGroup4_C_ELV(SiS_Pr, HwInfo, ModeNo, ModeIdIndex); 8743 SiS_SetGroup4_C_ELV(SiS_Pr, ModeNo, ModeIdIndex);
8925#endif 8744#endif
8926 SiS_SetGroup5(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 8745 SiS_SetGroup5(SiS_Pr, ModeNo, ModeIdIndex);
8927 8746
8928 SiS_SetCRT2Sync(SiS_Pr, ModeNo, RefreshRateTableIndex, HwInfo); 8747 SiS_SetCRT2Sync(SiS_Pr, ModeNo, RefreshRateTableIndex);
8929 8748
8930 /* For 301BDH (Panel link initialization): */ 8749 /* For 301BDH (Panel link initialization): */
8931 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) { 8750 if((SiS_Pr->SiS_VBType & VB_NoLCD) && (SiS_Pr->SiS_VBInfo & SetCRT2ToLCD)) {
8932 if(SiS_Pr->SiS_LCDResInfo != Panel_640x480) { 8751
8933 if(!((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo == 0x10)))) { 8752 if(!((SiS_Pr->SiS_SetFlag & SetDOSMode) && ((ModeNo == 0x03) || (ModeNo == 0x10)))) {
8934 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) { 8753 if(SiS_Pr->SiS_VBInfo & SetInSlaveMode) {
8935 SiS_ModCRT1CRTC(SiS_Pr,ModeNo,ModeIdIndex, 8754 SiS_ModCRT1CRTC(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8936 RefreshRateTableIndex,HwInfo); 8755 }
8937 } 8756 }
8938 } 8757 SiS_SetCRT2ECLK(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8939 } 8758 }
8940 SiS_SetCRT2ECLK(SiS_Pr,ModeNo,ModeIdIndex, 8759 }
8941 RefreshRateTableIndex,HwInfo);
8942 }
8943 }
8944 8760
8945 } else { 8761 } else {
8946 8762
8947 SiS_SetCRT2Sync(SiS_Pr, ModeNo, RefreshRateTableIndex, HwInfo); 8763 SiS_SetCRT2Sync(SiS_Pr, ModeNo, RefreshRateTableIndex);
8948 8764
8949 if(!(SiS_Pr->SiS_LCDInfo & LCDPass11)) { 8765 SiS_ModCRT1CRTC(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
8950 SiS_ModCRT1CRTC(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwInfo);
8951 }
8952 8766
8953 SiS_SetCRT2ECLK(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex,HwInfo); 8767 SiS_SetCRT2ECLK(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
8954 8768
8955 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8769 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
8956 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) { 8770 if(SiS_Pr->SiS_IF_DEF_CH70xx != 0) {
8957 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 8771 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
8958 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) { 8772 if(SiS_Pr->SiS_IF_DEF_CH70xx == 2) {
8959#ifdef SIS315H 8773#ifdef SIS315H
8960 SiS_SetCH701xForLCD(SiS_Pr,HwInfo); 8774 SiS_SetCH701xForLCD(SiS_Pr);
8961#endif 8775#endif
8962 } 8776 }
8963 } 8777 }
8964 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 8778 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
8965 SiS_SetCHTVReg(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex); 8779 SiS_SetCHTVReg(SiS_Pr,ModeNo,ModeIdIndex,RefreshRateTableIndex);
8966 } 8780 }
8967 } 8781 }
8968 } 8782 }
8969 8783
8970 } 8784 }
8971 8785
8972#ifdef SIS300 8786#ifdef SIS300
8973 if(HwInfo->jChipType < SIS_315H) { 8787 if(SiS_Pr->ChipType < SIS_315H) {
8974 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8788 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
8975 if(SiS_Pr->SiS_UseOEM) { 8789 if(SiS_Pr->SiS_UseOEM) {
8976 if((SiS_Pr->SiS_UseROM) && (SiS_Pr->SiS_UseOEM == -1)) { 8790 if((SiS_Pr->SiS_UseROM) && (SiS_Pr->SiS_UseOEM == -1)) {
8977 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) { 8791 if((ROMAddr[0x233] == 0x12) && (ROMAddr[0x234] == 0x34)) {
8978 SiS_OEM300Setting(SiS_Pr,HwInfo,ModeNo,ModeIdIndex, 8792 SiS_OEM300Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8979 RefreshRateTableIndex);
8980 } 8793 }
8981 } else { 8794 } else {
8982 SiS_OEM300Setting(SiS_Pr,HwInfo,ModeNo,ModeIdIndex, 8795 SiS_OEM300Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
8983 RefreshRateTableIndex);
8984 } 8796 }
8985 } 8797 }
8986 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 8798 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
8987 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) || 8799 if((SiS_Pr->SiS_CustomT == CUT_BARCO1366) ||
8988 (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) { 8800 (SiS_Pr->SiS_CustomT == CUT_BARCO1024)) {
8989 SetOEMLCDData2(SiS_Pr, HwInfo, ModeNo, ModeIdIndex,RefreshRateTableIndex); 8801 SetOEMLCDData2(SiS_Pr, ModeNo, ModeIdIndex,RefreshRateTableIndex);
8990 } 8802 }
8991 SiS_DisplayOn(SiS_Pr); 8803 SiS_DisplayOn(SiS_Pr);
8992 } 8804 }
@@ -8995,21 +8807,21 @@ SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
8995#endif 8807#endif
8996 8808
8997#ifdef SIS315H 8809#ifdef SIS315H
8998 if(HwInfo->jChipType >= SIS_315H) { 8810 if(SiS_Pr->ChipType >= SIS_315H) {
8999 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8811 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
9000 if(HwInfo->jChipType < SIS_661) { 8812 if(SiS_Pr->ChipType < SIS_661) {
9001 SiS_FinalizeLCD(SiS_Pr, ModeNo, ModeIdIndex, HwInfo); 8813 SiS_FinalizeLCD(SiS_Pr, ModeNo, ModeIdIndex);
9002 SiS_OEM310Setting(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8814 SiS_OEM310Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
9003 } else { 8815 } else {
9004 SiS_OEM661Setting(SiS_Pr, HwInfo, ModeNo, ModeIdIndex, RefreshRateTableIndex); 8816 SiS_OEM661Setting(SiS_Pr, ModeNo, ModeIdIndex, RefreshRateTableIndex);
9005 } 8817 }
9006 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x40); 8818 SiS_SetRegOR(SiS_Pr->SiS_Part1Port,0x01,0x40);
9007 } 8819 }
9008 } 8820 }
9009#endif 8821#endif
9010 8822
9011 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8823 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
9012 SiS_EnableBridge(SiS_Pr, HwInfo); 8824 SiS_EnableBridge(SiS_Pr);
9013 } 8825 }
9014 8826
9015 SiS_DisplayOn(SiS_Pr); 8827 SiS_DisplayOn(SiS_Pr);
@@ -9017,15 +8829,15 @@ SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
9017 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) { 8829 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) {
9018 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 8830 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
9019 /* Disable LCD panel when using TV */ 8831 /* Disable LCD panel when using TV */
9020 SiS_SetRegSR11ANDOR(SiS_Pr,HwInfo,0xFF,0x0C); 8832 SiS_SetRegSR11ANDOR(SiS_Pr,0xFF,0x0C);
9021 } else { 8833 } else {
9022 /* Disable TV when using LCD */ 8834 /* Disable TV when using LCD */
9023 SiS_SetCH70xxANDOR(SiS_Pr,0x010E,0xF8); 8835 SiS_SetCH70xxANDOR(SiS_Pr,0x0e,0x01,0xf8);
9024 } 8836 }
9025 } 8837 }
9026 8838
9027 if(SiS_Pr->SiS_SetFlag & LowModeTests) { 8839 if(SiS_Pr->SiS_SetFlag & LowModeTests) {
9028 SiS_LockCRT2(SiS_Pr,HwInfo); 8840 SiS_LockCRT2(SiS_Pr);
9029 } 8841 }
9030 8842
9031 return TRUE; 8843 return TRUE;
@@ -9037,13 +8849,13 @@ SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
9037/*********************************************/ 8849/*********************************************/
9038 8850
9039void 8851void
9040SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8852SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr)
9041{ 8853{
9042 /* Switch on LCD backlight on SiS30xLV */ 8854 /* Switch on LCD backlight on SiS30xLV */
9043 SiS_DDC2Delay(SiS_Pr,0xff00); 8855 SiS_DDC2Delay(SiS_Pr,0xff00);
9044 if(!(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) { 8856 if(!(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x02)) {
9045 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02); 8857 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x02);
9046 SiS_WaitVBRetrace(SiS_Pr,HwInfo); 8858 SiS_WaitVBRetrace(SiS_Pr);
9047 } 8859 }
9048 if(!(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x01)) { 8860 if(!(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x01)) {
9049 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01); 8861 SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x26,0x01);
@@ -9051,12 +8863,11 @@ SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
9051} 8863}
9052 8864
9053void 8865void
9054SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 8866SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr)
9055{ 8867{
9056 /* Switch off LCD backlight on SiS30xLV */ 8868 /* Switch off LCD backlight on SiS30xLV */
9057 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFE); 8869 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFE);
9058 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x26,0xFD); 8870 SiS_DDC2Delay(SiS_Pr,0xff00);
9059 SiS_DDC2Delay(SiS_Pr,0xe000);
9060} 8871}
9061 8872
9062/*********************************************/ 8873/*********************************************/
@@ -9064,7 +8875,7 @@ SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
9064/*********************************************/ 8875/*********************************************/
9065 8876
9066static void 8877static void
9067SiS_SetupDDCN(SiS_Private *SiS_Pr) 8878SiS_SetupDDCN(struct SiS_Private *SiS_Pr)
9068{ 8879{
9069 SiS_Pr->SiS_DDC_NData = ~SiS_Pr->SiS_DDC_Data; 8880 SiS_Pr->SiS_DDC_NData = ~SiS_Pr->SiS_DDC_Data;
9070 SiS_Pr->SiS_DDC_NClk = ~SiS_Pr->SiS_DDC_Clk; 8881 SiS_Pr->SiS_DDC_NClk = ~SiS_Pr->SiS_DDC_Clk;
@@ -9075,12 +8886,12 @@ SiS_SetupDDCN(SiS_Private *SiS_Pr)
9075} 8886}
9076 8887
9077#ifdef SIS300 8888#ifdef SIS300
9078static UCHAR * 8889static unsigned char *
9079SiS_SetTrumpBlockLoop(SiS_Private *SiS_Pr, UCHAR *dataptr) 8890SiS_SetTrumpBlockLoop(struct SiS_Private *SiS_Pr, unsigned char *dataptr)
9080{ 8891{
9081 int i, j, num; 8892 int i, j, num;
9082 USHORT tempah,temp; 8893 unsigned short tempah,temp;
9083 UCHAR *mydataptr; 8894 unsigned char *mydataptr;
9084 8895
9085 for(i=0; i<20; i++) { /* Do 20 attempts to write */ 8896 for(i=0; i<20; i++) { /* Do 20 attempts to write */
9086 mydataptr = dataptr; 8897 mydataptr = dataptr;
@@ -9088,7 +8899,7 @@ SiS_SetTrumpBlockLoop(SiS_Private *SiS_Pr, UCHAR *dataptr)
9088 if(!num) return mydataptr; 8899 if(!num) return mydataptr;
9089 if(i) { 8900 if(i) {
9090 SiS_SetStop(SiS_Pr); 8901 SiS_SetStop(SiS_Pr);
9091 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT*2); 8902 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT * 2);
9092 } 8903 }
9093 if(SiS_SetStart(SiS_Pr)) continue; /* Set start condition */ 8904 if(SiS_SetStart(SiS_Pr)) continue; /* Set start condition */
9094 tempah = SiS_Pr->SiS_DDC_DeviceAddr; 8905 tempah = SiS_Pr->SiS_DDC_DeviceAddr;
@@ -9110,12 +8921,12 @@ SiS_SetTrumpBlockLoop(SiS_Private *SiS_Pr, UCHAR *dataptr)
9110} 8921}
9111 8922
9112static BOOLEAN 8923static BOOLEAN
9113SiS_SetTrumpionBlock(SiS_Private *SiS_Pr, UCHAR *dataptr) 8924SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr)
9114{ 8925{
9115 SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB (Device Address Byte) */ 8926 SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB (Device Address Byte) */
9116 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */ 8927 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9117 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */ 8928 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */
9118 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */ 8929 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */
9119 SiS_SetupDDCN(SiS_Pr); 8930 SiS_SetupDDCN(SiS_Pr);
9120 8931
9121 SiS_SetSwitchDDC2(SiS_Pr); 8932 SiS_SetSwitchDDC2(SiS_Pr);
@@ -9124,9 +8935,11 @@ SiS_SetTrumpionBlock(SiS_Private *SiS_Pr, UCHAR *dataptr)
9124 dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr); 8935 dataptr = SiS_SetTrumpBlockLoop(SiS_Pr, dataptr);
9125 if(!dataptr) return FALSE; 8936 if(!dataptr) return FALSE;
9126 } 8937 }
8938#ifdef SIS_XORG_XF86
9127#ifdef TWDEBUG 8939#ifdef TWDEBUG
9128 xf86DrvMsg(0, X_INFO, "Trumpion block success\n"); 8940 xf86DrvMsg(0, X_INFO, "Trumpion block success\n");
9129#endif 8941#endif
8942#endif
9130 return TRUE; 8943 return TRUE;
9131} 8944}
9132#endif 8945#endif
@@ -9139,155 +8952,121 @@ SiS_SetTrumpionBlock(SiS_Private *SiS_Pr, UCHAR *dataptr)
9139 */ 8952 */
9140 8953
9141static BOOLEAN 8954static BOOLEAN
9142SiS_SetChReg(SiS_Private *SiS_Pr, USHORT tempbx, USHORT myor) 8955SiS_SetChReg(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val, unsigned short myor)
9143{ 8956{
9144 USHORT tempah,temp,i; 8957 unsigned short temp, i;
9145 8958
9146 for(i=0; i<20; i++) { /* Do 20 attempts to write */ 8959 for(i=0; i<20; i++) { /* Do 20 attempts to write */
9147 if(i) { 8960 if(i) {
9148 SiS_SetStop(SiS_Pr); 8961 SiS_SetStop(SiS_Pr);
9149 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); 8962 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT * 4);
9150 } 8963 }
9151 if(SiS_SetStart(SiS_Pr)) continue; /* Set start condition */ 8964 if(SiS_SetStart(SiS_Pr)) continue; /* Set start condition */
9152 tempah = SiS_Pr->SiS_DDC_DeviceAddr; 8965 temp = SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr); /* Write DAB (S0=0=write) */
9153 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); /* Write DAB (S0=0=write) */ 8966 if(temp) continue; /* (ERROR: no ack) */
9154 if(temp) continue; /* (ERROR: no ack) */ 8967 temp = SiS_WriteDDC2Data(SiS_Pr, (reg | myor)); /* Write RAB (700x: set bit 7, see datasheet) */
9155 tempah = tempbx & 0x00FF; /* Write RAB */ 8968 if(temp) continue; /* (ERROR: no ack) */
9156 tempah |= myor; /* (700x: set bit 7, see datasheet) */ 8969 temp = SiS_WriteDDC2Data(SiS_Pr, val); /* Write data */
9157 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); 8970 if(temp) continue; /* (ERROR: no ack) */
9158 if(temp) continue; /* (ERROR: no ack) */ 8971 if(SiS_SetStop(SiS_Pr)) continue; /* Set stop condition */
9159 tempah = (tempbx & 0xFF00) >> 8;
9160 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); /* Write data */
9161 if(temp) continue; /* (ERROR: no ack) */
9162 if(SiS_SetStop(SiS_Pr)) continue; /* Set stop condition */
9163 SiS_Pr->SiS_ChrontelInit = 1; 8972 SiS_Pr->SiS_ChrontelInit = 1;
9164 return TRUE; 8973 return TRUE;
9165 } 8974 }
9166 return FALSE; 8975 return FALSE;
9167} 8976}
9168 8977
9169#if 0
9170#ifdef SIS300
9171/* Write Trumpion register */
9172static void
9173SiS_SetTrumpReg(SiS_Private *SiS_Pr, USHORT tempbx)
9174{
9175 SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB (Device Address Byte) */
9176 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9177 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */
9178 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */
9179 SiS_SetupDDCN(SiS_Pr);
9180 SiS_SetChReg(SiS_Pr, tempbx, 0);
9181}
9182#endif
9183#endif
9184
9185/* Write to Chrontel 700x */ 8978/* Write to Chrontel 700x */
9186/* Parameter is [Data (S15-S8) | Register no (S7-S0)] */
9187void 8979void
9188SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx) 8980SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val)
9189{ 8981{
9190 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB (Device Address Byte) */ 8982 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB (Device Address Byte) */
9191 8983
8984 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT);
8985
9192 if(!(SiS_Pr->SiS_ChrontelInit)) { 8986 if(!(SiS_Pr->SiS_ChrontelInit)) {
9193 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */ 8987 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9194 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */ 8988 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */
9195 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */ 8989 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */
9196 SiS_SetupDDCN(SiS_Pr); 8990 SiS_SetupDDCN(SiS_Pr);
9197 } 8991 }
9198 8992
9199 if( (!(SiS_SetChReg(SiS_Pr, tempbx, 0x80))) && 8993 if( (!(SiS_SetChReg(SiS_Pr, reg, val, 0x80))) &&
9200 (!(SiS_Pr->SiS_ChrontelInit)) ) { 8994 (!(SiS_Pr->SiS_ChrontelInit)) ) {
9201 SiS_Pr->SiS_DDC_Index = 0x0a; /* Bit 7 = SC; Bit 6 = SD */ 8995 SiS_Pr->SiS_DDC_Index = 0x0a;
9202 SiS_Pr->SiS_DDC_Data = 0x80; /* Bitmask in IndexReg for Data */ 8996 SiS_Pr->SiS_DDC_Data = 0x80;
9203 SiS_Pr->SiS_DDC_Clk = 0x40; /* Bitmask in IndexReg for Clk */ 8997 SiS_Pr->SiS_DDC_Clk = 0x40;
9204 SiS_SetupDDCN(SiS_Pr); 8998 SiS_SetupDDCN(SiS_Pr);
9205 8999
9206 SiS_SetChReg(SiS_Pr, tempbx, 0x80); 9000 SiS_SetChReg(SiS_Pr, reg, val, 0x80);
9207 } 9001 }
9208} 9002}
9209 9003
9210/* Write to Chrontel 701x */ 9004/* Write to Chrontel 701x */
9211/* Parameter is [Data (S15-S8) | Register no (S7-S0)] */ 9005/* Parameter is [Data (S15-S8) | Register no (S7-S0)] */
9212void 9006void
9213SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx) 9007SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val)
9214{ 9008{
9215 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */ 9009 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9216 SiS_Pr->SiS_DDC_Data = 0x08; /* Bitmask in IndexReg for Data */ 9010 SiS_Pr->SiS_DDC_Data = 0x08; /* Bitmask in IndexReg for Data */
9217 SiS_Pr->SiS_DDC_Clk = 0x04; /* Bitmask in IndexReg for Clk */ 9011 SiS_Pr->SiS_DDC_Clk = 0x04; /* Bitmask in IndexReg for Clk */
9218 SiS_SetupDDCN(SiS_Pr); 9012 SiS_SetupDDCN(SiS_Pr);
9219 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB (Device Address Byte) */ 9013 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB (Device Address Byte) */
9220 SiS_SetChReg(SiS_Pr, tempbx, 0); 9014 SiS_SetChReg(SiS_Pr, reg, val, 0);
9221} 9015}
9222 9016
9223static void 9017#ifdef SIS_LINUX_KERNEL
9224SiS_SetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx) 9018static
9019#endif
9020void
9021SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val)
9225{ 9022{
9226 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) 9023 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1)
9227 SiS_SetCH700x(SiS_Pr,tempbx); 9024 SiS_SetCH700x(SiS_Pr, reg, val);
9228 else 9025 else
9229 SiS_SetCH701x(SiS_Pr,tempbx); 9026 SiS_SetCH701x(SiS_Pr, reg, val);
9230} 9027}
9231 9028
9232static USHORT 9029static unsigned short
9233SiS_GetChReg(SiS_Private *SiS_Pr, USHORT myor) 9030SiS_GetChReg(struct SiS_Private *SiS_Pr, unsigned short myor)
9234{ 9031{
9235 USHORT tempah,temp,i; 9032 unsigned short tempah, temp, i;
9236 9033
9237 for(i=0; i<20; i++) { /* Do 20 attempts to read */ 9034 for(i=0; i<20; i++) { /* Do 20 attempts to read */
9238 if(i) { 9035 if(i) {
9239 SiS_SetStop(SiS_Pr); 9036 SiS_SetStop(SiS_Pr);
9240 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); 9037 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT * 4);
9241 } 9038 }
9242 if(SiS_SetStart(SiS_Pr)) continue; /* Set start condition */ 9039 if(SiS_SetStart(SiS_Pr)) continue; /* Set start condition */
9243 tempah = SiS_Pr->SiS_DDC_DeviceAddr; 9040 temp = SiS_WriteDDC2Data(SiS_Pr,SiS_Pr->SiS_DDC_DeviceAddr); /* Write DAB (S0=0=write) */
9244 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); /* Write DAB (S0=0=write) */ 9041 if(temp) continue; /* (ERROR: no ack) */
9245 if(temp) continue; /* (ERROR: no ack) */ 9042 temp = SiS_WriteDDC2Data(SiS_Pr,SiS_Pr->SiS_DDC_ReadAddr | myor); /* Write RAB (700x: | 0x80) */
9246 tempah = SiS_Pr->SiS_DDC_ReadAddr | myor; /* Write RAB (700x: | 0x80) */ 9043 if(temp) continue; /* (ERROR: no ack) */
9247 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); 9044 if (SiS_SetStart(SiS_Pr)) continue; /* Re-start */
9248 if(temp) continue; /* (ERROR: no ack) */ 9045 temp = SiS_WriteDDC2Data(SiS_Pr,SiS_Pr->SiS_DDC_DeviceAddr | 0x01);/* DAB (S0=1=read) */
9249 if (SiS_SetStart(SiS_Pr)) continue; /* Re-start */ 9046 if(temp) continue; /* (ERROR: no ack) */
9250 tempah = SiS_Pr->SiS_DDC_DeviceAddr | 0x01;/* DAB | 0x01 = Read */ 9047 tempah = SiS_ReadDDC2Data(SiS_Pr); /* Read byte */
9251 temp = SiS_WriteDDC2Data(SiS_Pr,tempah); /* DAB (S0=1=read) */ 9048 if(SiS_SetStop(SiS_Pr)) continue; /* Stop condition */
9252 if(temp) continue; /* (ERROR: no ack) */
9253 tempah = SiS_ReadDDC2Data(SiS_Pr,tempah); /* Read byte */
9254 if(SiS_SetStop(SiS_Pr)) continue; /* Stop condition */
9255 SiS_Pr->SiS_ChrontelInit = 1; 9049 SiS_Pr->SiS_ChrontelInit = 1;
9256 return(tempah); 9050 return tempah;
9257 } 9051 }
9258 return 0xFFFF; 9052 return 0xFFFF;
9259} 9053}
9260 9054
9261#if 0
9262#ifdef SIS300
9263/* Read from Trumpion */
9264static USHORT
9265SiS_GetTrumpReg(SiS_Private *SiS_Pr, USHORT tempbx)
9266{
9267 SiS_Pr->SiS_DDC_DeviceAddr = 0xF0; /* DAB */
9268 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9269 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */
9270 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */
9271 SiS_SetupDDCN(SiS_Pr);
9272 SiS_Pr->SiS_DDC_ReadAddr = tempbx;
9273 return(SiS_GetChReg(SiS_Pr,0));
9274}
9275#endif
9276#endif
9277
9278/* Read from Chrontel 700x */ 9055/* Read from Chrontel 700x */
9279/* Parameter is [Register no (S7-S0)] */ 9056/* Parameter is [Register no (S7-S0)] */
9280USHORT 9057unsigned short
9281SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx) 9058SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempbx)
9282{ 9059{
9283 USHORT result; 9060 unsigned short result;
9284 9061
9285 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB */ 9062 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB */
9286 9063
9064 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT);
9065
9287 if(!(SiS_Pr->SiS_ChrontelInit)) { 9066 if(!(SiS_Pr->SiS_ChrontelInit)) {
9288 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */ 9067 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9289 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */ 9068 SiS_Pr->SiS_DDC_Data = 0x02; /* Bitmask in IndexReg for Data */
9290 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */ 9069 SiS_Pr->SiS_DDC_Clk = 0x01; /* Bitmask in IndexReg for Clk */
9291 SiS_SetupDDCN(SiS_Pr); 9070 SiS_SetupDDCN(SiS_Pr);
9292 } 9071 }
9293 9072
@@ -9303,52 +9082,69 @@ SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx)
9303 9082
9304 result = SiS_GetChReg(SiS_Pr,0x80); 9083 result = SiS_GetChReg(SiS_Pr,0x80);
9305 } 9084 }
9306 return(result); 9085 return result;
9307} 9086}
9308 9087
9309/* Read from Chrontel 701x */ 9088/* Read from Chrontel 701x */
9310/* Parameter is [Register no (S7-S0)] */ 9089/* Parameter is [Register no (S7-S0)] */
9311USHORT 9090unsigned short
9312SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx) 9091SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempbx)
9313{ 9092{
9314 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */ 9093 SiS_Pr->SiS_DDC_Index = 0x11; /* Bit 0 = SC; Bit 1 = SD */
9315 SiS_Pr->SiS_DDC_Data = 0x08; /* Bitmask in IndexReg for Data */ 9094 SiS_Pr->SiS_DDC_Data = 0x08; /* Bitmask in IndexReg for Data */
9316 SiS_Pr->SiS_DDC_Clk = 0x04; /* Bitmask in IndexReg for Clk */ 9095 SiS_Pr->SiS_DDC_Clk = 0x04; /* Bitmask in IndexReg for Clk */
9317 SiS_SetupDDCN(SiS_Pr); 9096 SiS_SetupDDCN(SiS_Pr);
9318 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB */ 9097 SiS_Pr->SiS_DDC_DeviceAddr = 0xEA; /* DAB */
9319 9098
9320 SiS_Pr->SiS_DDC_ReadAddr = tempbx; 9099 SiS_Pr->SiS_DDC_ReadAddr = tempbx;
9321 9100
9322 return(SiS_GetChReg(SiS_Pr,0)); 9101 return SiS_GetChReg(SiS_Pr,0);
9323} 9102}
9324 9103
9325/* Read from Chrontel 70xx */ 9104/* Read from Chrontel 70xx */
9326/* Parameter is [Register no (S7-S0)] */ 9105/* Parameter is [Register no (S7-S0)] */
9327static USHORT 9106#ifdef SIS_LINUX_KERNEL
9328SiS_GetCH70xx(SiS_Private *SiS_Pr, USHORT tempbx) 9107static
9108#endif
9109unsigned short
9110SiS_GetCH70xx(struct SiS_Private *SiS_Pr, unsigned short tempbx)
9329{ 9111{
9330 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1) 9112 if(SiS_Pr->SiS_IF_DEF_CH70xx == 1)
9331 return(SiS_GetCH700x(SiS_Pr, tempbx)); 9113 return SiS_GetCH700x(SiS_Pr, tempbx);
9332 else 9114 else
9333 return(SiS_GetCH701x(SiS_Pr, tempbx)); 9115 return SiS_GetCH701x(SiS_Pr, tempbx);
9116}
9117
9118void
9119SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
9120 unsigned char myor, unsigned short myand)
9121{
9122 unsigned short tempbl;
9123
9124 tempbl = (SiS_GetCH70xx(SiS_Pr, (reg & 0xFF)) & myand) | myor;
9125 SiS_SetCH70xx(SiS_Pr, reg, tempbl);
9334} 9126}
9335 9127
9336/* Our own DDC functions */ 9128/* Our own DDC functions */
9337static USHORT 9129#ifndef SIS_XORG_XF86
9338SiS_InitDDCRegs(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine, 9130static
9339 USHORT adaptnum, USHORT DDCdatatype, BOOLEAN checkcr32) 9131#endif
9132unsigned short
9133SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
9134 unsigned short adaptnum, unsigned short DDCdatatype, BOOLEAN checkcr32,
9135 unsigned int VBFlags2)
9340{ 9136{
9341 unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 }; 9137 unsigned char ddcdtype[] = { 0xa0, 0xa0, 0xa0, 0xa2, 0xa6 };
9342 unsigned char flag, cr32; 9138 unsigned char flag, cr32;
9343 USHORT temp = 0, myadaptnum = adaptnum; 9139 unsigned short temp = 0, myadaptnum = adaptnum;
9344 9140
9345 if(adaptnum != 0) { 9141 if(adaptnum != 0) {
9346 if(!(VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0xFFFF; 9142 if(!(VBFlags2 & VB2_SISTMDSBRIDGE)) return 0xFFFF;
9347 if((VBFlags & VB_30xBDH) && (adaptnum == 1)) return 0xFFFF; 9143 if((VBFlags2 & VB2_30xBDH) && (adaptnum == 1)) return 0xFFFF;
9348 } 9144 }
9349 9145
9350 /* adapternum for SiS bridges: 0 = CRT1, 1 = LCD, 2 = VGA2 */ 9146 /* adapternum for SiS bridges: 0 = CRT1, 1 = LCD, 2 = VGA2 */
9351 9147
9352 SiS_Pr->SiS_ChrontelInit = 0; /* force re-detection! */ 9148 SiS_Pr->SiS_ChrontelInit = 0; /* force re-detection! */
9353 9149
9354 SiS_Pr->SiS_DDC_SecAddr = 0; 9150 SiS_Pr->SiS_DDC_SecAddr = 0;
@@ -9360,7 +9156,7 @@ SiS_InitDDCRegs(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine,
9360 cr32 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x32); 9156 cr32 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x32);
9361 9157
9362#if 0 9158#if 0
9363 if(VBFlags & VB_SISBRIDGE) { 9159 if(VBFlags2 & VB2_SISBRIDGE) {
9364 if(myadaptnum == 0) { 9160 if(myadaptnum == 0) {
9365 if(!(cr32 & 0x20)) { 9161 if(!(cr32 & 0x20)) {
9366 myadaptnum = 2; 9162 myadaptnum = 2;
@@ -9376,20 +9172,20 @@ SiS_InitDDCRegs(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine,
9376#endif 9172#endif
9377 9173
9378 if(VGAEngine == SIS_300_VGA) { /* 300 series */ 9174 if(VGAEngine == SIS_300_VGA) { /* 300 series */
9379 9175
9380 if(myadaptnum != 0) { 9176 if(myadaptnum != 0) {
9381 flag = 0; 9177 flag = 0;
9382 if(VBFlags & VB_SISBRIDGE) { 9178 if(VBFlags2 & VB2_SISBRIDGE) {
9383 SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_Part4Port; 9179 SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_Part4Port;
9384 SiS_Pr->SiS_DDC_Index = 0x0f; 9180 SiS_Pr->SiS_DDC_Index = 0x0f;
9385 } 9181 }
9386 } 9182 }
9387 9183
9388 if(!(VBFlags & VB_301)) { 9184 if(!(VBFlags2 & VB2_301)) {
9389 if((cr32 & 0x80) && (checkcr32)) { 9185 if((cr32 & 0x80) && (checkcr32)) {
9390 if(myadaptnum >= 1) { 9186 if(myadaptnum >= 1) {
9391 if(!(cr32 & 0x08)) { 9187 if(!(cr32 & 0x08)) {
9392 myadaptnum = 1; 9188 myadaptnum = 1;
9393 if(!(cr32 & 0x10)) return 0xFFFF; 9189 if(!(cr32 & 0x10)) return 0xFFFF;
9394 } 9190 }
9395 } 9191 }
@@ -9401,17 +9197,17 @@ SiS_InitDDCRegs(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine,
9401 9197
9402 } else { /* 315/330 series */ 9198 } else { /* 315/330 series */
9403 9199
9404 /* here we simplify: 0 = CRT1, 1 = CRT2 (VGA, LCD) */ 9200 /* here we simplify: 0 = CRT1, 1 = CRT2 (VGA, LCD) */
9405 9201
9406 if(VBFlags & VB_SISBRIDGE) { 9202 if(VBFlags2 & VB2_SISBRIDGE) {
9407 if(myadaptnum == 2) { 9203 if(myadaptnum == 2) {
9408 myadaptnum = 1; 9204 myadaptnum = 1;
9409 } 9205 }
9410 } 9206 }
9411 9207
9412 if(myadaptnum == 1) { 9208 if(myadaptnum == 1) {
9413 flag = 0; 9209 flag = 0;
9414 if(VBFlags & VB_SISBRIDGE) { 9210 if(VBFlags2 & VB2_SISBRIDGE) {
9415 SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_Part4Port; 9211 SiS_Pr->SiS_DDC_Port = SiS_Pr->SiS_Part4Port;
9416 SiS_Pr->SiS_DDC_Index = 0x0f; 9212 SiS_Pr->SiS_DDC_Index = 0x0f;
9417 } 9213 }
@@ -9429,93 +9225,96 @@ SiS_InitDDCRegs(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine,
9429 temp = myadaptnum; 9225 temp = myadaptnum;
9430 if(myadaptnum == 1) { 9226 if(myadaptnum == 1) {
9431 temp = 0; 9227 temp = 0;
9432 if(VBFlags & VB_LVDS) flag = 0xff; 9228 if(VBFlags2 & VB2_LVDS) flag = 0xff;
9433 } 9229 }
9434 9230
9435 if(flag) temp = 0; 9231 if(flag) temp = 0;
9436 } 9232 }
9437 9233
9438 SiS_Pr->SiS_DDC_Data = 0x02 << temp; 9234 SiS_Pr->SiS_DDC_Data = 0x02 << temp;
9439 SiS_Pr->SiS_DDC_Clk = 0x01 << temp; 9235 SiS_Pr->SiS_DDC_Clk = 0x01 << temp;
9440 9236
9441 SiS_SetupDDCN(SiS_Pr); 9237 SiS_SetupDDCN(SiS_Pr);
9442 9238
9239#ifdef SIS_XORG_XF86
9443#ifdef TWDEBUG 9240#ifdef TWDEBUG
9444 xf86DrvMsg(0, X_INFO, "DDC Port %x Index %x Shift %d\n", 9241 xf86DrvMsg(0, X_INFO, "DDC Port %x Index %x Shift %d\n",
9445 SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index, temp); 9242 SiS_Pr->SiS_DDC_Port, SiS_Pr->SiS_DDC_Index, temp);
9446#endif 9243#endif
9447 9244#endif
9448 return 0; 9245 return 0;
9449} 9246}
9450 9247
9451static USHORT 9248static unsigned short
9452SiS_WriteDABDDC(SiS_Private *SiS_Pr) 9249SiS_WriteDABDDC(struct SiS_Private *SiS_Pr)
9453{ 9250{
9454 if(SiS_SetStart(SiS_Pr)) return 0xFFFF; 9251 if(SiS_SetStart(SiS_Pr)) return 0xFFFF;
9455 if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr)) { 9252 if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_DeviceAddr)) {
9456 return 0xFFFF; 9253 return 0xFFFF;
9457 } 9254 }
9458 if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_SecAddr)) { 9255 if(SiS_WriteDDC2Data(SiS_Pr, SiS_Pr->SiS_DDC_SecAddr)) {
9459 return 0xFFFF; 9256 return 0xFFFF;
9460 } 9257 }
9461 return(0); 9258 return 0;
9462} 9259}
9463 9260
9464static USHORT 9261static unsigned short
9465SiS_PrepareReadDDC(SiS_Private *SiS_Pr) 9262SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr)
9466{ 9263{
9467 if(SiS_SetStart(SiS_Pr)) return 0xFFFF; 9264 if(SiS_SetStart(SiS_Pr)) return 0xFFFF;
9468 if(SiS_WriteDDC2Data(SiS_Pr, (SiS_Pr->SiS_DDC_DeviceAddr | 0x01))) { 9265 if(SiS_WriteDDC2Data(SiS_Pr, (SiS_Pr->SiS_DDC_DeviceAddr | 0x01))) {
9469 return 0xFFFF; 9266 return 0xFFFF;
9470 } 9267 }
9471 return(0); 9268 return 0;
9472} 9269}
9473 9270
9474static USHORT 9271static unsigned short
9475SiS_PrepareDDC(SiS_Private *SiS_Pr) 9272SiS_PrepareDDC(struct SiS_Private *SiS_Pr)
9476{ 9273{
9477 if(SiS_WriteDABDDC(SiS_Pr)) SiS_WriteDABDDC(SiS_Pr); 9274 if(SiS_WriteDABDDC(SiS_Pr)) SiS_WriteDABDDC(SiS_Pr);
9478 if(SiS_PrepareReadDDC(SiS_Pr)) return(SiS_PrepareReadDDC(SiS_Pr)); 9275 if(SiS_PrepareReadDDC(SiS_Pr)) return (SiS_PrepareReadDDC(SiS_Pr));
9479 return(0); 9276 return 0;
9480} 9277}
9481 9278
9482static void 9279static void
9483SiS_SendACK(SiS_Private *SiS_Pr, USHORT yesno) 9280SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno)
9484{ 9281{
9485 SiS_SetSCLKLow(SiS_Pr); 9282 SiS_SetSCLKLow(SiS_Pr);
9486 if(yesno) { 9283 if(yesno) {
9487 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9284 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
9488 SiS_Pr->SiS_DDC_Index, 9285 SiS_Pr->SiS_DDC_Index,
9489 SiS_Pr->SiS_DDC_NData, 9286 SiS_Pr->SiS_DDC_NData,
9490 SiS_Pr->SiS_DDC_Data); 9287 SiS_Pr->SiS_DDC_Data);
9491 } else { 9288 } else {
9492 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9289 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
9493 SiS_Pr->SiS_DDC_Index, 9290 SiS_Pr->SiS_DDC_Index,
9494 SiS_Pr->SiS_DDC_NData, 9291 SiS_Pr->SiS_DDC_NData,
9495 0); 9292 0);
9496 } 9293 }
9497 SiS_SetSCLKHigh(SiS_Pr); 9294 SiS_SetSCLKHigh(SiS_Pr);
9498} 9295}
9499 9296
9500static USHORT 9297static unsigned short
9501SiS_DoProbeDDC(SiS_Private *SiS_Pr) 9298SiS_DoProbeDDC(struct SiS_Private *SiS_Pr)
9502{ 9299{
9503 unsigned char mask, value; 9300 unsigned char mask, value;
9504 USHORT temp, ret=0; 9301 unsigned short temp, ret=0;
9505 BOOLEAN failed = FALSE; 9302 BOOLEAN failed = FALSE;
9506 9303
9507 SiS_SetSwitchDDC2(SiS_Pr); 9304 SiS_SetSwitchDDC2(SiS_Pr);
9508 if(SiS_PrepareDDC(SiS_Pr)) { 9305 if(SiS_PrepareDDC(SiS_Pr)) {
9509 SiS_SetStop(SiS_Pr); 9306 SiS_SetStop(SiS_Pr);
9307#ifdef SIS_XORG_XF86
9510#ifdef TWDEBUG 9308#ifdef TWDEBUG
9511 xf86DrvMsg(0, X_INFO, "Probe: Prepare failed\n"); 9309 xf86DrvMsg(0, X_INFO, "Probe: Prepare failed\n");
9512#endif 9310#endif
9513 return(0xFFFF); 9311#endif
9312 return 0xFFFF;
9514 } 9313 }
9515 mask = 0xf0; 9314 mask = 0xf0;
9516 value = 0x20; 9315 value = 0x20;
9517 if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { 9316 if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) {
9518 temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0); 9317 temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9519 SiS_SendACK(SiS_Pr, 0); 9318 SiS_SendACK(SiS_Pr, 0);
9520 if(temp == 0) { 9319 if(temp == 0) {
9521 mask = 0xff; 9320 mask = 0xff;
@@ -9523,34 +9322,41 @@ SiS_DoProbeDDC(SiS_Private *SiS_Pr)
9523 } else { 9322 } else {
9524 failed = TRUE; 9323 failed = TRUE;
9525 ret = 0xFFFF; 9324 ret = 0xFFFF;
9325#ifdef SIS_XORG_XF86
9526#ifdef TWDEBUG 9326#ifdef TWDEBUG
9527 xf86DrvMsg(0, X_INFO, "Probe: Read 1 failed\n"); 9327 xf86DrvMsg(0, X_INFO, "Probe: Read 1 failed\n");
9528#endif 9328#endif
9329#endif
9529 } 9330 }
9530 } 9331 }
9531 if(failed == FALSE) { 9332 if(failed == FALSE) {
9532 temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0); 9333 temp = (unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9533 SiS_SendACK(SiS_Pr, 1); 9334 SiS_SendACK(SiS_Pr, 1);
9534 temp &= mask; 9335 temp &= mask;
9535 if(temp == value) ret = 0; 9336 if(temp == value) ret = 0;
9536 else { 9337 else {
9537 ret = 0xFFFF; 9338 ret = 0xFFFF;
9339#ifdef SIS_XORG_XF86
9538#ifdef TWDEBUG 9340#ifdef TWDEBUG
9539 xf86DrvMsg(0, X_INFO, "Probe: Read 2 failed\n"); 9341 xf86DrvMsg(0, X_INFO, "Probe: Read 2 failed\n");
9540#endif 9342#endif
9343#endif
9541 if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) { 9344 if(SiS_Pr->SiS_DDC_DeviceAddr == 0xa0) {
9542 if(temp == 0x30) ret = 0; 9345 if(temp == 0x30) ret = 0;
9543 } 9346 }
9544 } 9347 }
9545 } 9348 }
9546 SiS_SetStop(SiS_Pr); 9349 SiS_SetStop(SiS_Pr);
9547 return(ret); 9350 return ret;
9548} 9351}
9549 9352
9550static USHORT 9353#ifndef SIS_XORG_XF86
9551SiS_ProbeDDC(SiS_Private *SiS_Pr) 9354static
9355#endif
9356unsigned short
9357SiS_ProbeDDC(struct SiS_Private *SiS_Pr)
9552{ 9358{
9553 USHORT flag; 9359 unsigned short flag;
9554 9360
9555 flag = 0x180; 9361 flag = 0x180;
9556 SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; 9362 SiS_Pr->SiS_DDC_DeviceAddr = 0xa0;
@@ -9560,16 +9366,19 @@ SiS_ProbeDDC(SiS_Private *SiS_Pr)
9560 SiS_Pr->SiS_DDC_DeviceAddr = 0xa6; 9366 SiS_Pr->SiS_DDC_DeviceAddr = 0xa6;
9561 if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x10; 9367 if(!(SiS_DoProbeDDC(SiS_Pr))) flag |= 0x10;
9562 if(!(flag & 0x1a)) flag = 0; 9368 if(!(flag & 0x1a)) flag = 0;
9563 return(flag); 9369 return flag;
9564} 9370}
9565 9371
9566static USHORT 9372#ifndef SIS_XORG_XF86
9567SiS_ReadDDC(SiS_Private *SiS_Pr, USHORT DDCdatatype, unsigned char *buffer) 9373static
9374#endif
9375unsigned short
9376SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype, unsigned char *buffer)
9568{ 9377{
9569 USHORT flag, length, i; 9378 unsigned short flag, length, i;
9570 unsigned char chksum,gotcha; 9379 unsigned char chksum,gotcha;
9571 9380
9572 if(DDCdatatype > 4) return 0xFFFF; 9381 if(DDCdatatype > 4) return 0xFFFF;
9573 9382
9574 flag = 0; 9383 flag = 0;
9575 SiS_SetSwitchDDC2(SiS_Pr); 9384 SiS_SetSwitchDDC2(SiS_Pr);
@@ -9579,21 +9388,21 @@ SiS_ReadDDC(SiS_Private *SiS_Pr, USHORT DDCdatatype, unsigned char *buffer)
9579 chksum = 0; 9388 chksum = 0;
9580 gotcha = 0; 9389 gotcha = 0;
9581 for(i=0; i<length; i++) { 9390 for(i=0; i<length; i++) {
9582 buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0); 9391 buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9583 chksum += buffer[i]; 9392 chksum += buffer[i];
9584 gotcha |= buffer[i]; 9393 gotcha |= buffer[i];
9585 SiS_SendACK(SiS_Pr, 0); 9394 SiS_SendACK(SiS_Pr, 0);
9586 } 9395 }
9587 buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr, 0); 9396 buffer[i] = (unsigned char)SiS_ReadDDC2Data(SiS_Pr);
9588 chksum += buffer[i]; 9397 chksum += buffer[i];
9589 SiS_SendACK(SiS_Pr, 1); 9398 SiS_SendACK(SiS_Pr, 1);
9590 if(gotcha) flag = (USHORT)chksum; 9399 if(gotcha) flag = (unsigned short)chksum;
9591 else flag = 0xFFFF; 9400 else flag = 0xFFFF;
9592 } else { 9401 } else {
9593 flag = 0xFFFF; 9402 flag = 0xFFFF;
9594 } 9403 }
9595 SiS_SetStop(SiS_Pr); 9404 SiS_SetStop(SiS_Pr);
9596 return(flag); 9405 return flag;
9597} 9406}
9598 9407
9599/* Our private DDC functions 9408/* Our private DDC functions
@@ -9617,17 +9426,25 @@ SiS_ReadDDC(SiS_Private *SiS_Pr, USHORT DDCdatatype, unsigned char *buffer)
9617 if DDCdatatype = 0: Returns supported DDC modes 9426 if DDCdatatype = 0: Returns supported DDC modes
9618 9427
9619 */ 9428 */
9620USHORT 9429unsigned short
9621SiS_HandleDDC(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine, 9430SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
9622 USHORT adaptnum, USHORT DDCdatatype, unsigned char *buffer) 9431 unsigned short adaptnum, unsigned short DDCdatatype, unsigned char *buffer,
9432 unsigned int VBFlags2)
9623{ 9433{
9624 unsigned char sr1f,cr17=1; 9434 unsigned char sr1f, cr17=1;
9625 USHORT result; 9435 unsigned short result;
9626 9436
9627 if(adaptnum > 2) return 0xFFFF; 9437 if(adaptnum > 2)
9628 if(DDCdatatype > 4) return 0xFFFF; 9438 return 0xFFFF;
9629 if((!(VBFlags & VB_VIDEOBRIDGE)) && (adaptnum > 0)) return 0xFFFF; 9439
9630 if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype, FALSE) == 0xFFFF) return 0xFFFF; 9440 if(DDCdatatype > 4)
9441 return 0xFFFF;
9442
9443 if((!(VBFlags2 & VB2_VIDEOBRIDGE)) && (adaptnum > 0))
9444 return 0xFFFF;
9445
9446 if(SiS_InitDDCRegs(SiS_Pr, VBFlags, VGAEngine, adaptnum, DDCdatatype, FALSE, VBFlags2) == 0xFFFF)
9447 return 0xFFFF;
9631 9448
9632 sr1f = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f); 9449 sr1f = SiS_GetReg(SiS_Pr->SiS_P3c4,0x1f);
9633 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1f,0x3f,0x04); 9450 SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1f,0x3f,0x04);
@@ -9656,10 +9473,12 @@ SiS_HandleDDC(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine,
9656 (buffer[4] == 0xff) && (buffer[5] == 0xff) && 9473 (buffer[4] == 0xff) && (buffer[5] == 0xff) &&
9657 (buffer[6] == 0xff) && (buffer[7] == 0x00) && 9474 (buffer[6] == 0xff) && (buffer[7] == 0x00) &&
9658 (buffer[0x12] == 1)) { 9475 (buffer[0x12] == 1)) {
9659 if(adaptnum == 1) { 9476 if(!SiS_Pr->DDCPortMixup) {
9660 if(!(buffer[0x14] & 0x80)) result = 0xFFFE; 9477 if(adaptnum == 1) {
9661 } else { 9478 if(!(buffer[0x14] & 0x80)) result = 0xFFFE;
9662 if(buffer[0x14] & 0x80) result = 0xFFFE; 9479 } else {
9480 if(buffer[0x14] & 0x80) result = 0xFFFE;
9481 }
9663 } 9482 }
9664 } 9483 }
9665 } 9484 }
@@ -9671,832 +9490,10 @@ SiS_HandleDDC(SiS_Private *SiS_Pr, unsigned long VBFlags, int VGAEngine,
9671 return result; 9490 return result;
9672} 9491}
9673 9492
9674#ifdef LINUX_XF86
9675
9676static BOOLEAN
9677checkedid1(unsigned char *buffer)
9678{
9679 /* Check header */
9680 if((buffer[0] != 0x00) ||
9681 (buffer[1] != 0xff) ||
9682 (buffer[2] != 0xff) ||
9683 (buffer[3] != 0xff) ||
9684 (buffer[4] != 0xff) ||
9685 (buffer[5] != 0xff) ||
9686 (buffer[6] != 0xff) ||
9687 (buffer[7] != 0x00))
9688 return FALSE;
9689
9690 /* Check EDID version and revision */
9691 if((buffer[0x12] != 1) || (buffer[0x13] > 4)) return FALSE;
9692
9693 /* Check week of manufacture for sanity */
9694 if(buffer[0x10] > 53) return FALSE;
9695
9696 /* Check year of manufacture for sanity */
9697 if(buffer[0x11] > 40) return FALSE;
9698
9699 return TRUE;
9700}
9701
9702static BOOLEAN
9703checkedid2(unsigned char *buffer)
9704{
9705 USHORT year = buffer[6] | (buffer[7] << 8);
9706
9707 /* Check EDID version */
9708 if((buffer[0] & 0xf0) != 0x20) return FALSE;
9709
9710 /* Check week of manufacture for sanity */
9711 if(buffer[5] > 53) return FALSE;
9712
9713 /* Check year of manufacture for sanity */
9714 if((year != 0) && ((year < 1990) || (year > 2030))) return FALSE;
9715
9716 return TRUE;
9717}
9718
9719/* Sense the LCD parameters (CR36, CR37) via DDC */
9720/* SiS30x(B) only */
9721USHORT
9722SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS)
9723{
9724 USHORT DDCdatatype, paneltype, flag, xres=0, yres=0;
9725 USHORT index, myindex, lumsize, numcodes, panelvendor, panelproduct;
9726 int maxx=0, maxy=0, prefx=0, prefy=0;
9727 unsigned char cr37=0, seekcode;
9728 BOOLEAN checkexpand = FALSE;
9729 BOOLEAN havesync = FALSE;
9730 BOOLEAN indb = FALSE;
9731 int retry, i;
9732 unsigned char buffer[256];
9733
9734 for(i=0; i<7; i++) SiS_Pr->CP_DataValid[i] = FALSE;
9735 SiS_Pr->CP_HaveCustomData = FALSE;
9736 SiS_Pr->CP_MaxX = SiS_Pr->CP_MaxY = SiS_Pr->CP_MaxClock = 0;
9737 SiS_Pr->CP_PreferredX = SiS_Pr->CP_PreferredY = 0;
9738 SiS_Pr->CP_PreferredIndex = -1;
9739 SiS_Pr->CP_PrefClock = 0;
9740 SiS_Pr->PanelSelfDetected = FALSE;
9741
9742 if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0;
9743 if(pSiS->VBFlags & VB_30xBDH) return 0;
9744
9745 if(SiS_InitDDCRegs(SiS_Pr, pSiS->VBFlags, pSiS->VGAEngine, 1, 0, FALSE) == 0xFFFF) return 0;
9746
9747 SiS_Pr->SiS_DDC_SecAddr = 0x00;
9748
9749 /* Probe supported DA's */
9750 flag = SiS_ProbeDDC(SiS_Pr);
9751#ifdef TWDEBUG
9752 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO,
9753 "CRT2 DDC capabilities 0x%x\n", flag);
9754#endif
9755 if(flag & 0x10) {
9756 SiS_Pr->SiS_DDC_DeviceAddr = 0xa6; /* EDID V2 (FP) */
9757 DDCdatatype = 4;
9758 } else if(flag & 0x08) {
9759 SiS_Pr->SiS_DDC_DeviceAddr = 0xa2; /* EDID V2 (P&D-D Monitor) */
9760 DDCdatatype = 3;
9761 } else if(flag & 0x02) {
9762 SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; /* EDID V1 */
9763 DDCdatatype = 1;
9764 } else return 0; /* no DDC support (or no device attached) */
9765
9766 /* Read the entire EDID */
9767 retry = 2;
9768 do {
9769 if(SiS_ReadDDC(SiS_Pr, DDCdatatype, buffer)) {
9770 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
9771 "CRT2: DDC read failed (attempt %d), %s\n",
9772 (3-retry), (retry == 1) ? "giving up" : "retrying");
9773 retry--;
9774 if(retry == 0) return 0xFFFF;
9775 } else break;
9776 } while(1);
9777
9778#ifdef TWDEBUG
9779 for(i=0; i<256; i+=16) {
9780 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
9781 "%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
9782 buffer[i], buffer[i+1], buffer[i+2], buffer[i+3],
9783 buffer[i+4], buffer[i+5], buffer[i+6], buffer[i+7],
9784 buffer[i+8], buffer[i+9], buffer[i+10], buffer[i+11],
9785 buffer[i+12], buffer[i+13], buffer[i+14], buffer[i+15]);
9786 }
9787#endif
9788
9789 /* Analyze EDID and retrieve LCD panel information */
9790 paneltype = 0;
9791 switch(DDCdatatype) {
9792 case 1: /* Analyze EDID V1 */
9793 /* Catch a few clear cases: */
9794 if(!(checkedid1(buffer))) {
9795 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
9796 "LCD sense: EDID corrupt\n");
9797 return 0;
9798 }
9799
9800 if(!(buffer[0x14] & 0x80)) {
9801 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
9802 "LCD sense: Attached display expects analog input (0x%02x)\n",
9803 buffer[0x14]);
9804 return 0;
9805 }
9806
9807 if((buffer[0x18] & 0x18) != 0x08) {
9808 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
9809 "LCD sense: Warning: Attached display is not of RGB but of %s type (0x%02x)\n",
9810 ((buffer[0x18] & 0x18) == 0x00) ? "monochrome/greyscale" :
9811 ( ((buffer[0x18] & 0x18) == 0x10) ? "non-RGB multicolor" :
9812 "undefined"),
9813 buffer[0x18]);
9814 }
9815
9816 /* Now analyze the first Detailed Timing Block and see
9817 * if the preferred timing mode is stored there. If so,
9818 * check if this is a standard panel for which we already
9819 * know the timing.
9820 */
9821
9822 paneltype = Panel_Custom;
9823 checkexpand = FALSE;
9824
9825 panelvendor = buffer[9] | (buffer[8] << 8);
9826 panelproduct = buffer[10] | (buffer[11] << 8);
9827
9828 /* Overrule bogus preferred modes from database */
9829 if((indb = SiS_FindPanelFromDB(pSiS, panelvendor, panelproduct, &maxx, &maxy, &prefx, &prefy))) {
9830 if(prefx) SiS_Pr->CP_PreferredX = xres = prefx;
9831 if(prefy) SiS_Pr->CP_PreferredY = yres = prefy;
9832 }
9833
9834 if(buffer[0x18] & 0x02) {
9835
9836 USHORT pclk = (buffer[0x36] | (buffer[0x37] << 8));
9837 USHORT phb = (buffer[0x39] | ((buffer[0x3a] & 0x0f) << 8));
9838 USHORT pvb = (buffer[0x3c] | ((buffer[0x3d] & 0x0f) << 8));
9839
9840 if(!xres) SiS_Pr->CP_PreferredX = xres = buffer[0x38] | ((buffer[0x3a] & 0xf0) << 4);
9841 if(!yres) SiS_Pr->CP_PreferredY = yres = buffer[0x3b] | ((buffer[0x3d] & 0xf0) << 4);
9842
9843 switch(xres) {
9844#if 0 /* Treat as custom */
9845 case 800:
9846 if(yres == 600) {
9847 paneltype = Panel_800x600;
9848 checkexpand = TRUE;
9849 }
9850 break;
9851#endif
9852 case 1024:
9853 if(yres == 768) {
9854 paneltype = Panel_1024x768;
9855 checkexpand = TRUE;
9856 }
9857 break;
9858 case 1280:
9859 if(yres == 1024) {
9860 paneltype = Panel_1280x1024;
9861 checkexpand = TRUE;
9862 } else if(yres == 960) {
9863 if(pSiS->VGAEngine == SIS_300_VGA) {
9864 paneltype = Panel300_1280x960;
9865 } else {
9866 paneltype = Panel310_1280x960;
9867 }
9868 } else if(yres == 768) {
9869 if( (pclk == 8100) &&
9870 (phb == (1688 - 1280)) &&
9871 (pvb == (802 - 768)) ) {
9872 paneltype = Panel_1280x768;
9873 checkexpand = FALSE;
9874 cr37 |= 0x10;
9875 }
9876 } else if(yres == 800) {
9877 if( (pclk == 6900) &&
9878 (phb == (1408 - 1280)) &&
9879 (pvb == (816 - 800)) ) {
9880 paneltype = Panel_1280x800;
9881 }
9882 }
9883 break;
9884 case 1400:
9885 if(pSiS->VGAEngine == SIS_315_VGA) {
9886 if(yres == 1050) {
9887 paneltype = Panel310_1400x1050;
9888 checkexpand = TRUE;
9889 }
9890 }
9891 break;
9892 case 1600:
9893 if(pSiS->VGAEngine == SIS_315_VGA) {
9894 if(pSiS->VBFlags & VB_301C) {
9895 if(yres == 1200) {
9896 paneltype = Panel310_1600x1200;
9897 checkexpand = TRUE;
9898 }
9899 }
9900 }
9901 break;
9902 }
9903
9904 /* Save sync: This is used if "Pass 1:1" is off; in this case
9905 * we always use the panel's native mode = this "preferred mode"
9906 * we just have been analysing. Hence, we also need its sync.
9907 */
9908 if((buffer[0x47] & 0x18) == 0x18) {
9909 cr37 |= ((((buffer[0x47] & 0x06) ^ 0x06) << 5) | 0x20);
9910 havesync = TRUE;
9911 } else {
9912 /* What now? There is no digital separate output timing... */
9913 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING,
9914 "LCD sense: Unable to retrieve Sync polarity information\n");
9915 cr37 |= 0xc0; /* Default */
9916 }
9917
9918 }
9919
9920 /* Check against our database; eg. Sanyo Z2 projector reports
9921 * 1024x768 as preferred mode, although it supports 1280x720
9922 * natively in non-HDCP mode. Treat such wrongly reporting
9923 * panels as custom and fixup actual maximum resolutions.
9924 */
9925 if(paneltype != Panel_Custom) {
9926 if(indb) {
9927 paneltype = Panel_Custom;
9928 SiS_Pr->CP_MaxX = maxx;
9929 SiS_Pr->CP_MaxY = maxy;
9930 /* Leave preferred unchanged (MUST contain a valid mode!) */
9931 }
9932 }
9933
9934 /* If we still don't know what panel this is, we take it
9935 * as a custom panel and derive the timing data from the
9936 * detailed timing blocks
9937 */
9938 if(paneltype == Panel_Custom) {
9939
9940 int i, temp, base = 0x36;
9941 unsigned long estpack;
9942 const unsigned short estx[] = {
9943 720, 720, 640, 640, 640, 640, 800, 800,
9944 800, 800, 832,1024,1024,1024,1024,1280,
9945 1152
9946 };
9947 const unsigned short esty[] = {
9948 400, 400, 480, 480, 480, 480, 600, 600,
9949 600, 600, 624, 768, 768, 768, 768,1024,
9950 870
9951 };
9952 const int estclk[] = {
9953 0, 0, 25100, 0, 31500, 31500, 36100, 40000,
9954 50100, 49500, 0, 0, 65100, 75200, 78700,135200,
9955 0
9956 };
9957
9958 paneltype = 0;
9959 SiS_Pr->CP_Supports64048075 = TRUE;
9960
9961 /* Find the maximum resolution */
9962
9963 /* 1. From Established timings */
9964 estpack = (buffer[0x23] << 9) | (buffer[0x24] << 1) | ((buffer[0x25] >> 7) & 0x01);
9965 for(i=16; i>=0; i--) {
9966 if(estpack & (1 << i)) {
9967 if(estx[16 - i] > SiS_Pr->CP_MaxX) SiS_Pr->CP_MaxX = estx[16 - i];
9968 if(esty[16 - i] > SiS_Pr->CP_MaxY) SiS_Pr->CP_MaxY = esty[16 - i];
9969 if(estclk[16 - i] > SiS_Pr->CP_MaxClock) SiS_Pr->CP_MaxClock = estclk[16 - i];
9970 }
9971 }
9972
9973 /* By default we drive the LCD at 75Hz in 640x480 mode; if
9974 * the panel does not provide this mode, use 60hz
9975 */
9976 if(!(buffer[0x23] & 0x04)) SiS_Pr->CP_Supports64048075 = FALSE;
9977
9978 /* 2. From Standard Timings */
9979 for(i=0x26; i < 0x36; i+=2) {
9980 if((buffer[i] != 0x01) && (buffer[i+1] != 0x01)) {
9981 temp = (buffer[i] + 31) * 8;
9982 if(temp > SiS_Pr->CP_MaxX) SiS_Pr->CP_MaxX = temp;
9983 switch((buffer[i+1] & 0xc0) >> 6) {
9984 case 0x03: temp = temp * 9 / 16; break;
9985 case 0x02: temp = temp * 4 / 5; break;
9986 case 0x01: temp = temp * 3 / 4; break;
9987 }
9988 if(temp > SiS_Pr->CP_MaxY) SiS_Pr->CP_MaxY = temp;
9989 }
9990 }
9991
9992 /* Now extract the Detailed Timings and convert them into modes */
9993
9994 for(i = 0; i < 4; i++, base += 18) {
9995
9996 /* Is this a detailed timing block or a monitor descriptor? */
9997 if(buffer[base] || buffer[base+1] || buffer[base+2]) {
9998
9999 xres = buffer[base+2] | ((buffer[base+4] & 0xf0) << 4);
10000 yres = buffer[base+5] | ((buffer[base+7] & 0xf0) << 4);
10001
10002 SiS_Pr->CP_HDisplay[i] = xres;
10003 SiS_Pr->CP_HSyncStart[i] = xres + (buffer[base+8] | ((buffer[base+11] & 0xc0) << 2));
10004 SiS_Pr->CP_HSyncEnd[i] = SiS_Pr->CP_HSyncStart[i] + (buffer[base+9] | ((buffer[base+11] & 0x30) << 4));
10005 SiS_Pr->CP_HTotal[i] = xres + (buffer[base+3] | ((buffer[base+4] & 0x0f) << 8));
10006 SiS_Pr->CP_HBlankStart[i] = xres + 1;
10007 SiS_Pr->CP_HBlankEnd[i] = SiS_Pr->CP_HTotal[i];
10008
10009 SiS_Pr->CP_VDisplay[i] = yres;
10010 SiS_Pr->CP_VSyncStart[i] = yres + (((buffer[base+10] & 0xf0) >> 4) | ((buffer[base+11] & 0x0c) << 2));
10011 SiS_Pr->CP_VSyncEnd[i] = SiS_Pr->CP_VSyncStart[i] + ((buffer[base+10] & 0x0f) | ((buffer[base+11] & 0x03) << 4));
10012 SiS_Pr->CP_VTotal[i] = yres + (buffer[base+6] | ((buffer[base+7] & 0x0f) << 8));
10013 SiS_Pr->CP_VBlankStart[i] = yres + 1;
10014 SiS_Pr->CP_VBlankEnd[i] = SiS_Pr->CP_VTotal[i];
10015
10016 SiS_Pr->CP_Clock[i] = (buffer[base] | (buffer[base+1] << 8)) * 10;
10017
10018 SiS_Pr->CP_DataValid[i] = TRUE;
10019
10020 /* Sort out invalid timings, interlace and too high clocks */
10021 if((SiS_Pr->CP_HDisplay[i] & 7) ||
10022 (SiS_Pr->CP_HDisplay[i] > SiS_Pr->CP_HSyncStart[i]) ||
10023 (SiS_Pr->CP_HDisplay[i] >= SiS_Pr->CP_HSyncEnd[i]) ||
10024 (SiS_Pr->CP_HDisplay[i] >= SiS_Pr->CP_HTotal[i]) ||
10025 (SiS_Pr->CP_HSyncStart[i] >= SiS_Pr->CP_HSyncEnd[i]) ||
10026 (SiS_Pr->CP_HSyncStart[i] > SiS_Pr->CP_HTotal[i]) ||
10027 (SiS_Pr->CP_HSyncEnd[i] > SiS_Pr->CP_HTotal[i]) ||
10028 (SiS_Pr->CP_VDisplay[i] > SiS_Pr->CP_VSyncStart[i]) ||
10029 (SiS_Pr->CP_VDisplay[i] >= SiS_Pr->CP_VSyncEnd[i]) ||
10030 (SiS_Pr->CP_VDisplay[i] >= SiS_Pr->CP_VTotal[i]) ||
10031 (SiS_Pr->CP_VSyncStart[i] > SiS_Pr->CP_VSyncEnd[i]) ||
10032 (SiS_Pr->CP_VSyncStart[i] > SiS_Pr->CP_VTotal[i]) ||
10033 (SiS_Pr->CP_VSyncEnd[i] > SiS_Pr->CP_VTotal[i]) ||
10034 (((pSiS->VBFlags & VB_301C) && (SiS_Pr->CP_Clock[i] > 162500)) ||
10035 ((!(pSiS->VBFlags & VB_301C)) &&
10036 ((SiS_Pr->CP_Clock[i] > 108200) || (SiS_Pr->CP_VDisplay[i] > 1024) ||
10037 (SiS_Pr->CP_HDisplay[i] > 1600)))) ||
10038 (buffer[base+17] & 0x80)) {
10039
10040 SiS_Pr->CP_DataValid[i] = FALSE;
10041
10042 } else {
10043
10044 SiS_Pr->CP_HaveCustomData = TRUE;
10045
10046 if(xres > SiS_Pr->CP_MaxX) SiS_Pr->CP_MaxX = xres;
10047 if(yres > SiS_Pr->CP_MaxY) SiS_Pr->CP_MaxY = yres;
10048 if(SiS_Pr->CP_Clock[i] > SiS_Pr->CP_MaxClock) SiS_Pr->CP_MaxClock = SiS_Pr->CP_Clock[i];
10049
10050 if((SiS_Pr->CP_PreferredX == xres) && (SiS_Pr->CP_PreferredY == yres)) {
10051 SiS_Pr->CP_PreferredIndex = i;
10052 SiS_MakeClockRegs(pSiS->pScrn, SiS_Pr->CP_Clock[i], &SiS_Pr->CP_PrefSR2B, &SiS_Pr->CP_PrefSR2C);
10053 SiS_Pr->CP_PrefClock = (SiS_Pr->CP_Clock[i] / 1000) + 1;
10054 }
10055
10056 /* Extract the sync polarisation information. This only works
10057 * if the Flags indicate a digital separate output.
10058 */
10059 if((buffer[base+17] & 0x18) == 0x18) {
10060 SiS_Pr->CP_HSync_P[i] = (buffer[base+17] & 0x02) ? TRUE : FALSE;
10061 SiS_Pr->CP_VSync_P[i] = (buffer[base+17] & 0x04) ? TRUE : FALSE;
10062 SiS_Pr->CP_SyncValid[i] = TRUE;
10063 if((i == SiS_Pr->CP_PreferredIndex) && (!havesync)) {
10064 cr37 |= ((((buffer[base+17] & 0x06) ^ 0x06) << 5) | 0x20);
10065 havesync = TRUE;
10066 }
10067 } else {
10068 SiS_Pr->CP_SyncValid[i] = FALSE;
10069 }
10070
10071 }
10072
10073 } else if((!buffer[base]) && (!buffer[base+1]) && (!buffer[base+2]) && (!buffer[base+4])) {
10074
10075 /* Maximum pixclock from Monitor Range Limits */
10076 if((buffer[base+3] == 0xfd) && (buffer[base+9] != 0xff)) {
10077 int maxclk = buffer[base+9] * 10;
10078 /* More than 170 is not supported anyway */
10079 if(maxclk <= 170) SiS_Pr->CP_MaxClock = maxclk * 1000;
10080 }
10081
10082 }
10083
10084 }
10085
10086 if(SiS_Pr->CP_MaxX && SiS_Pr->CP_MaxY) {
10087 paneltype = Panel_Custom;
10088 checkexpand = FALSE;
10089 cr37 |= 0x10;
10090 SiS_Pr->CP_Vendor = panelvendor;
10091 SiS_Pr->CP_Product = panelproduct;
10092 }
10093
10094 }
10095
10096 if(paneltype && checkexpand) {
10097 /* If any of the Established low-res modes is supported, the
10098 * panel can scale automatically. For 800x600 panels, we only
10099 * check the even lower ones.
10100 */
10101 if(paneltype == Panel_800x600) {
10102 if(buffer[0x23] & 0xfc) cr37 |= 0x10;
10103 } else {
10104 if(buffer[0x23]) cr37 |= 0x10;
10105 }
10106 }
10107
10108 break;
10109
10110 case 3: /* Analyze EDID V2 */
10111 case 4:
10112 index = 0;
10113
10114 if(!(checkedid2(buffer))) {
10115 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10116 "LCD sense: EDID corrupt\n");
10117 return 0;
10118 }
10119
10120 if((buffer[0x41] & 0x0f) == 0x03) {
10121 index = 0x42 + 3;
10122 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10123 "LCD sense: Display supports TMDS input on primary interface\n");
10124 } else if((buffer[0x41] & 0xf0) == 0x30) {
10125 index = 0x46 + 3;
10126 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10127 "LCD sense: Display supports TMDS input on secondary interface\n");
10128 } else {
10129 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10130 "LCD sense: Display does not support TMDS video interface (0x%02x)\n",
10131 buffer[0x41]);
10132 return 0;
10133 }
10134
10135 SiS_Pr->CP_Vendor = panelvendor = buffer[2] | (buffer[1] << 8);
10136 SiS_Pr->CP_Product = panelproduct = buffer[3] | (buffer[4] << 8);
10137
10138 paneltype = Panel_Custom;
10139 SiS_Pr->CP_MaxX = SiS_Pr->CP_PreferredX = xres = buffer[0x76] | (buffer[0x77] << 8);
10140 SiS_Pr->CP_MaxY = SiS_Pr->CP_PreferredY = yres = buffer[0x78] | (buffer[0x79] << 8);
10141
10142 switch(xres) {
10143#if 0
10144 case 800:
10145 if(yres == 600) {
10146 paneltype = Panel_800x600;
10147 checkexpand = TRUE;
10148 }
10149 break;
10150#endif
10151 case 1024:
10152 if(yres == 768) {
10153 paneltype = Panel_1024x768;
10154 checkexpand = TRUE;
10155 }
10156 break;
10157 case 1280:
10158 if(yres == 960) {
10159 if(pSiS->VGAEngine == SIS_315_VGA) {
10160 paneltype = Panel310_1280x960;
10161 } else {
10162 paneltype = Panel300_1280x960;
10163 }
10164 } else if(yres == 1024) {
10165 paneltype = Panel_1280x1024;
10166 checkexpand = TRUE;
10167 }
10168 /* 1280x768 treated as custom here */
10169 break;
10170 case 1400:
10171 if(pSiS->VGAEngine == SIS_315_VGA) {
10172 if(yres == 1050) {
10173 paneltype = Panel310_1400x1050;
10174 checkexpand = TRUE;
10175 }
10176 }
10177 break;
10178 case 1600:
10179 if(pSiS->VGAEngine == SIS_315_VGA) {
10180 if(pSiS->VBFlags & VB_301C) {
10181 if(yres == 1200) {
10182 paneltype = Panel310_1600x1200;
10183 checkexpand = TRUE;
10184 }
10185 }
10186 }
10187 break;
10188 }
10189
10190 /* Determine if RGB18 or RGB24 */
10191 if(index) {
10192 if((buffer[index] == 0x20) || (buffer[index] == 0x34)) {
10193 cr37 |= 0x01;
10194 }
10195 }
10196
10197 if(checkexpand) {
10198 /* TODO - for now, we let the panel scale */
10199 cr37 |= 0x10;
10200 }
10201
10202 /* Now seek 4-Byte Timing codes and extract sync pol info */
10203 index = 0x80;
10204 if(buffer[0x7e] & 0x20) { /* skip Luminance Table (if provided) */
10205 lumsize = buffer[0x80] & 0x1f;
10206 if(buffer[0x80] & 0x80) lumsize *= 3;
10207 lumsize++; /* luminance header byte */
10208 index += lumsize;
10209 }
10210#if 0 /* "pixel rate" = pixel clock? */
10211 if(buffer[0x7e] & 0x1c) {
10212 for(i=0; i<((buffer[0x7e] & 0x1c) >> 2); i++) {
10213 if(buffer[index + (i*8) + 6] && (buffer[index + (i*8) + 7] & 0x0f)) {
10214 int clk = (buffer[index + (i*8) + 6] | ((buffer[index + (i*8) + 7] & 0x0f) << 4)) * 1000;
10215 if(clk > SiS_Pr->CP_MaxClock) SiS_Pr->CP_MaxClock = clk;
10216 }
10217 }
10218 }
10219#endif
10220 index += (((buffer[0x7e] & 0x1c) >> 2) * 8); /* skip Frequency Ranges */
10221 if(buffer[0x7e] & 0x03) {
10222 for(i=0; i<(buffer[0x7e] & 0x03); i++) {
10223 if((buffer[index + (i*27) + 9]) || (buffer[index + (i*27) + 10])) {
10224 int clk = ((buffer[index + (i*27) + 9]) | ((buffer[index + (i*27) + 9]) << 8)) * 10;
10225 if(clk > SiS_Pr->CP_MaxClock) SiS_Pr->CP_MaxClock = clk;
10226 }
10227 }
10228 }
10229 index += ((buffer[0x7e] & 0x03) * 27); /* skip Detailed Range Limits */
10230 numcodes = (buffer[0x7f] & 0xf8) >> 3;
10231 if(numcodes) {
10232 myindex = index;
10233 seekcode = (xres - 256) / 16;
10234 for(i=0; i<numcodes; i++) {
10235 if(buffer[myindex] == seekcode) break;
10236 myindex += 4;
10237 }
10238 if(buffer[myindex] == seekcode) {
10239 cr37 |= ((((buffer[myindex + 1] & 0x0c) ^ 0x0c) << 4) | 0x20);
10240 havesync = TRUE;
10241 } else {
10242 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING,
10243 "LCD sense: Unable to retrieve Sync polarity information\n");
10244 }
10245 } else {
10246 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_WARNING,
10247 "LCD sense: Unable to retrieve Sync polarity information\n");
10248 }
10249
10250 /* Check against our database; Eg. Sanyo projector reports
10251 * 1024x768 in non-HDPC mode, although it supports 1280x720.
10252 * Treat such wrongly reporting panels as custom.
10253 */
10254 if(paneltype != Panel_Custom) {
10255 int maxx, maxy, prefx, prefy;
10256 if((SiS_FindPanelFromDB(pSiS, panelvendor, panelproduct, &maxx, &maxy, &prefx, &prefy))) {
10257 paneltype = Panel_Custom;
10258 SiS_Pr->CP_MaxX = maxx;
10259 SiS_Pr->CP_MaxY = maxy;
10260 cr37 |= 0x10;
10261 /* Leave preferred unchanged (MUST be a valid mode!) */
10262 }
10263 }
10264
10265 /* Now seek the detailed timing descriptions for custom panels */
10266 if(paneltype == Panel_Custom) {
10267
10268 SiS_Pr->CP_Supports64048075 = TRUE;
10269
10270 index += (numcodes * 4);
10271 numcodes = buffer[0x7f] & 0x07;
10272 for(i=0; i<numcodes; i++, index += 18) {
10273 xres = buffer[index+2] | ((buffer[index+4] & 0xf0) << 4);
10274 yres = buffer[index+5] | ((buffer[index+7] & 0xf0) << 4);
10275
10276 SiS_Pr->CP_HDisplay[i] = xres;
10277 SiS_Pr->CP_HSyncStart[i] = xres + (buffer[index+8] | ((buffer[index+11] & 0xc0) << 2));
10278 SiS_Pr->CP_HSyncEnd[i] = SiS_Pr->CP_HSyncStart[i] + (buffer[index+9] | ((buffer[index+11] & 0x30) << 4));
10279 SiS_Pr->CP_HTotal[i] = xres + (buffer[index+3] | ((buffer[index+4] & 0x0f) << 8));
10280 SiS_Pr->CP_HBlankStart[i] = xres + 1;
10281 SiS_Pr->CP_HBlankEnd[i] = SiS_Pr->CP_HTotal[i];
10282
10283 SiS_Pr->CP_VDisplay[i] = yres;
10284 SiS_Pr->CP_VSyncStart[i] = yres + (((buffer[index+10] & 0xf0) >> 4) | ((buffer[index+11] & 0x0c) << 2));
10285 SiS_Pr->CP_VSyncEnd[i] = SiS_Pr->CP_VSyncStart[i] + ((buffer[index+10] & 0x0f) | ((buffer[index+11] & 0x03) << 4));
10286 SiS_Pr->CP_VTotal[i] = yres + (buffer[index+6] | ((buffer[index+7] & 0x0f) << 8));
10287 SiS_Pr->CP_VBlankStart[i] = yres + 1;
10288 SiS_Pr->CP_VBlankEnd[i] = SiS_Pr->CP_VTotal[i];
10289
10290 SiS_Pr->CP_Clock[i] = (buffer[index] | (buffer[index+1] << 8)) * 10;
10291
10292 SiS_Pr->CP_DataValid[i] = TRUE;
10293
10294 if((SiS_Pr->CP_HDisplay[i] & 7) ||
10295 (SiS_Pr->CP_HDisplay[i] > SiS_Pr->CP_HSyncStart[i]) ||
10296 (SiS_Pr->CP_HDisplay[i] >= SiS_Pr->CP_HSyncEnd[i]) ||
10297 (SiS_Pr->CP_HDisplay[i] >= SiS_Pr->CP_HTotal[i]) ||
10298 (SiS_Pr->CP_HSyncStart[i] >= SiS_Pr->CP_HSyncEnd[i]) ||
10299 (SiS_Pr->CP_HSyncStart[i] > SiS_Pr->CP_HTotal[i]) ||
10300 (SiS_Pr->CP_HSyncEnd[i] > SiS_Pr->CP_HTotal[i]) ||
10301 (SiS_Pr->CP_VDisplay[i] > SiS_Pr->CP_VSyncStart[i]) ||
10302 (SiS_Pr->CP_VDisplay[i] >= SiS_Pr->CP_VSyncEnd[i]) ||
10303 (SiS_Pr->CP_VDisplay[i] >= SiS_Pr->CP_VTotal[i]) ||
10304 (SiS_Pr->CP_VSyncStart[i] > SiS_Pr->CP_VSyncEnd[i]) ||
10305 (SiS_Pr->CP_VSyncStart[i] > SiS_Pr->CP_VTotal[i]) ||
10306 (SiS_Pr->CP_VSyncEnd[i] > SiS_Pr->CP_VTotal[i]) ||
10307 (((pSiS->VBFlags & VB_301C) && (SiS_Pr->CP_Clock[i] > 162500)) ||
10308 ((!(pSiS->VBFlags & VB_301C)) &&
10309 ((SiS_Pr->CP_Clock[i] > 108200) || (SiS_Pr->CP_VDisplay[i] > 1024)))) ||
10310 (buffer[index + 17] & 0x80)) {
10311
10312 SiS_Pr->CP_DataValid[i] = FALSE;
10313
10314 } else {
10315
10316 SiS_Pr->CP_HaveCustomData = TRUE;
10317
10318 if(SiS_Pr->CP_Clock[i] > SiS_Pr->CP_MaxClock) SiS_Pr->CP_MaxClock = SiS_Pr->CP_Clock[i];
10319
10320 if((SiS_Pr->CP_PreferredX == xres) && (SiS_Pr->CP_PreferredY == yres)) {
10321 SiS_Pr->CP_PreferredIndex = i;
10322 SiS_MakeClockRegs(pSiS->pScrn, SiS_Pr->CP_Clock[i], &SiS_Pr->CP_PrefSR2B, &SiS_Pr->CP_PrefSR2C);
10323 SiS_Pr->CP_PrefClock = (SiS_Pr->CP_Clock[i] / 1000) + 1;
10324 if(!havesync) {
10325 cr37 |= ((((buffer[index + 17] & 0x06) ^ 0x06) << 5) | 0x20);
10326 havesync = TRUE;
10327 }
10328 }
10329
10330 SiS_Pr->CP_HSync_P[i] = (buffer[index + 17] & 0x02) ? TRUE : FALSE;
10331 SiS_Pr->CP_VSync_P[i] = (buffer[index + 17] & 0x04) ? TRUE : FALSE;
10332 SiS_Pr->CP_SyncValid[i] = TRUE;
10333
10334 }
10335 }
10336
10337 cr37 |= 0x10;
10338
10339 }
10340
10341 break;
10342
10343 }
10344
10345 /* 1280x960 panels are always RGB24, unable to scale and use
10346 * high active sync polarity
10347 */
10348 if(pSiS->VGAEngine == SIS_315_VGA) {
10349 if(paneltype == Panel310_1280x960) cr37 &= 0x0e;
10350 } else {
10351 if(paneltype == Panel300_1280x960) cr37 &= 0x0e;
10352 }
10353
10354 for(i = 0; i < 7; i++) {
10355 if(SiS_Pr->CP_DataValid[i]) {
10356 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10357 "Non-standard LCD/DVI-D timing data no. %d:\n", i);
10358 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10359 " HDisplay %d HSync %d HSyncEnd %d HTotal %d\n",
10360 SiS_Pr->CP_HDisplay[i], SiS_Pr->CP_HSyncStart[i],
10361 SiS_Pr->CP_HSyncEnd[i], SiS_Pr->CP_HTotal[i]);
10362 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10363 " VDisplay %d VSync %d VSyncEnd %d VTotal %d\n",
10364 SiS_Pr->CP_VDisplay[i], SiS_Pr->CP_VSyncStart[i],
10365 SiS_Pr->CP_VSyncEnd[i], SiS_Pr->CP_VTotal[i]);
10366 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10367 " Pixel clock: %3.3fMhz\n", (float)SiS_Pr->CP_Clock[i] / 1000);
10368 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_INFO,
10369 " To use this, add \"%dx%d\" to the list of Modes in the Screen section\n",
10370 SiS_Pr->CP_HDisplay[i],
10371 SiS_Pr->CP_VDisplay[i]);
10372 }
10373 }
10374
10375 if(paneltype) {
10376 if(!SiS_Pr->CP_PreferredX) SiS_Pr->CP_PreferredX = SiS_Pr->CP_MaxX;
10377 if(!SiS_Pr->CP_PreferredY) SiS_Pr->CP_PreferredY = SiS_Pr->CP_MaxY;
10378 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x32,0x08);
10379 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,paneltype);
10380 cr37 &= 0xf1;
10381 SiS_SetRegANDOR(SiS_Pr->SiS_P3d4,0x37,0x0c,cr37);
10382 SiS_Pr->PanelSelfDetected = TRUE;
10383#ifdef TWDEBUG
10384 xf86DrvMsgVerb(pSiS->pScrn->scrnIndex, X_PROBED, 3,
10385 "LCD sense: [DDC LCD results: 0x%02x, 0x%02x]\n", paneltype, cr37);
10386#endif
10387 } else {
10388 SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x32,~0x08);
10389 SiS_SetReg(SiS_Pr->SiS_P3d4,0x36,0x00);
10390 }
10391 return 0;
10392}
10393
10394USHORT
10395SiS_SenseVGA2DDC(SiS_Private *SiS_Pr, SISPtr pSiS)
10396{
10397 USHORT DDCdatatype,flag;
10398 BOOLEAN foundcrt = FALSE;
10399 int retry;
10400 unsigned char buffer[256];
10401
10402 if(!(pSiS->VBFlags & (VB_301|VB_301B|VB_301C|VB_302B))) return 0;
10403
10404 if(SiS_InitDDCRegs(SiS_Pr, pSiS->VBFlags, pSiS->VGAEngine, 2, 0, FALSE) == 0xFFFF) return 0;
10405
10406 SiS_Pr->SiS_DDC_SecAddr = 0x00;
10407
10408 /* Probe supported DA's */
10409 flag = SiS_ProbeDDC(SiS_Pr);
10410 if(flag & 0x10) {
10411 SiS_Pr->SiS_DDC_DeviceAddr = 0xa6; /* EDID V2 (FP) */
10412 DDCdatatype = 4;
10413 } else if(flag & 0x08) {
10414 SiS_Pr->SiS_DDC_DeviceAddr = 0xa2; /* EDID V2 (P&D-D Monitor) */
10415 DDCdatatype = 3;
10416 } else if(flag & 0x02) {
10417 SiS_Pr->SiS_DDC_DeviceAddr = 0xa0; /* EDID V1 */
10418 DDCdatatype = 1;
10419 } else {
10420 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10421 "VGA2 sense: Do DDC answer\n");
10422 return 0; /* no DDC support (or no device attached) */
10423 }
10424
10425 /* Read the entire EDID */
10426 retry = 2;
10427 do {
10428 if(SiS_ReadDDC(SiS_Pr, DDCdatatype, buffer)) {
10429 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_PROBED,
10430 "VGA2 sense: DDC read failed (attempt %d), %s\n",
10431 (3-retry), (retry == 1) ? "giving up" : "retrying");
10432 retry--;
10433 if(retry == 0) return 0xFFFF;
10434 } else break;
10435 } while(1);
10436
10437 /* Analyze EDID. We don't have many chances to
10438 * distinguish a flat panel from a CRT...
10439 */
10440 switch(DDCdatatype) {
10441 case 1:
10442 if(!(checkedid1(buffer))) {
10443 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
10444 "VGA2 sense: EDID corrupt\n");
10445 return 0;
10446 }
10447 if(buffer[0x14] & 0x80) { /* Display uses digital input */
10448 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
10449 "VGA2 sense: Attached display expects digital input\n");
10450 return 0;
10451 }
10452 SiS_Pr->CP_Vendor = buffer[9] | (buffer[8] << 8);
10453 SiS_Pr->CP_Product = buffer[10] | (buffer[11] << 8);
10454 foundcrt = TRUE;
10455 break;
10456 case 3:
10457 case 4:
10458 if(!(checkedid2(buffer))) {
10459 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
10460 "VGA2 sense: EDID corrupt\n");
10461 return 0;
10462 }
10463 if( ((buffer[0x41] & 0x0f) != 0x01) && /* Display does not support analog input */
10464 ((buffer[0x41] & 0x0f) != 0x02) &&
10465 ((buffer[0x41] & 0xf0) != 0x10) &&
10466 ((buffer[0x41] & 0xf0) != 0x20) ) {
10467 xf86DrvMsg(pSiS->pScrn->scrnIndex, X_ERROR,
10468 "VGA2 sense: Attached display does not support analog input (0x%02x)\n",
10469 buffer[0x41]);
10470 return 0;
10471 }
10472 SiS_Pr->CP_Vendor = buffer[2] | (buffer[1] << 8);
10473 SiS_Pr->CP_Product = buffer[3] | (buffer[4] << 8);
10474 foundcrt = TRUE;
10475 break;
10476 }
10477
10478 if(foundcrt) {
10479 SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x32,0x10);
10480 }
10481 return(0);
10482}
10483
10484#endif
10485
10486void
10487SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh)
10488{
10489 USHORT tempbl;
10490
10491 tempbl = SiS_GetCH70xx(SiS_Pr,(tempax & 0x00FF));
10492 tempbl = (((tempbl & tempbh) << 8) | tempax);
10493 SiS_SetCH70xx(SiS_Pr,tempbl);
10494}
10495
10496/* Generic I2C functions for Chrontel & DDC --------- */ 9493/* Generic I2C functions for Chrontel & DDC --------- */
10497 9494
10498static void 9495static void
10499SiS_SetSwitchDDC2(SiS_Private *SiS_Pr) 9496SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr)
10500{ 9497{
10501 SiS_SetSCLKHigh(SiS_Pr); 9498 SiS_SetSCLKHigh(SiS_Pr);
10502 SiS_WaitRetrace1(SiS_Pr); 9499 SiS_WaitRetrace1(SiS_Pr);
@@ -10505,125 +9502,127 @@ SiS_SetSwitchDDC2(SiS_Private *SiS_Pr)
10505 SiS_WaitRetrace1(SiS_Pr); 9502 SiS_WaitRetrace1(SiS_Pr);
10506} 9503}
10507 9504
10508USHORT 9505unsigned short
10509SiS_ReadDDC1Bit(SiS_Private *SiS_Pr) 9506SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr)
10510{ 9507{
10511 SiS_WaitRetrace1(SiS_Pr); 9508 SiS_WaitRetrace1(SiS_Pr);
10512 return((SiS_GetReg(SiS_Pr->SiS_P3c4,0x11) & 0x02) >> 1); 9509 return ((SiS_GetReg(SiS_Pr->SiS_P3c4,0x11) & 0x02) >> 1);
10513} 9510}
10514 9511
10515/* Set I2C start condition */ 9512/* Set I2C start condition */
10516/* This is done by a SD high-to-low transition while SC is high */ 9513/* This is done by a SD high-to-low transition while SC is high */
10517static USHORT 9514static unsigned short
10518SiS_SetStart(SiS_Private *SiS_Pr) 9515SiS_SetStart(struct SiS_Private *SiS_Pr)
10519{ 9516{
10520 if(SiS_SetSCLKLow(SiS_Pr)) return 0xFFFF; /* (SC->low) */ 9517 if(SiS_SetSCLKLow(SiS_Pr)) return 0xFFFF; /* (SC->low) */
10521 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9518 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10522 SiS_Pr->SiS_DDC_Index, 9519 SiS_Pr->SiS_DDC_Index,
10523 SiS_Pr->SiS_DDC_NData, 9520 SiS_Pr->SiS_DDC_NData,
10524 SiS_Pr->SiS_DDC_Data); /* SD->high */ 9521 SiS_Pr->SiS_DDC_Data); /* SD->high */
10525 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* SC->high */ 9522 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* SC->high */
10526 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9523 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10527 SiS_Pr->SiS_DDC_Index, 9524 SiS_Pr->SiS_DDC_Index,
10528 SiS_Pr->SiS_DDC_NData, 9525 SiS_Pr->SiS_DDC_NData,
10529 0x00); /* SD->low = start condition */ 9526 0x00); /* SD->low = start condition */
10530 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* (SC->low) */ 9527 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* (SC->low) */
10531 return 0; 9528 return 0;
10532} 9529}
10533 9530
10534/* Set I2C stop condition */ 9531/* Set I2C stop condition */
10535/* This is done by a SD low-to-high transition while SC is high */ 9532/* This is done by a SD low-to-high transition while SC is high */
10536static USHORT 9533static unsigned short
10537SiS_SetStop(SiS_Private *SiS_Pr) 9534SiS_SetStop(struct SiS_Private *SiS_Pr)
10538{ 9535{
10539 if(SiS_SetSCLKLow(SiS_Pr)) return 0xFFFF; /* (SC->low) */ 9536 if(SiS_SetSCLKLow(SiS_Pr)) return 0xFFFF; /* (SC->low) */
10540 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9537 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10541 SiS_Pr->SiS_DDC_Index, 9538 SiS_Pr->SiS_DDC_Index,
10542 SiS_Pr->SiS_DDC_NData, 9539 SiS_Pr->SiS_DDC_NData,
10543 0x00); /* SD->low */ 9540 0x00); /* SD->low */
10544 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* SC->high */ 9541 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* SC->high */
10545 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9542 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10546 SiS_Pr->SiS_DDC_Index, 9543 SiS_Pr->SiS_DDC_Index,
10547 SiS_Pr->SiS_DDC_NData, 9544 SiS_Pr->SiS_DDC_NData,
10548 SiS_Pr->SiS_DDC_Data); /* SD->high = stop condition */ 9545 SiS_Pr->SiS_DDC_Data); /* SD->high = stop condition */
10549 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* (SC->high) */ 9546 if(SiS_SetSCLKHigh(SiS_Pr)) return 0xFFFF; /* (SC->high) */
10550 return 0; 9547 return 0;
10551} 9548}
10552 9549
10553/* Write 8 bits of data */ 9550/* Write 8 bits of data */
10554static USHORT 9551static unsigned short
10555SiS_WriteDDC2Data(SiS_Private *SiS_Pr, USHORT tempax) 9552SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax)
10556{ 9553{
10557 USHORT i,flag,temp; 9554 unsigned short i,flag,temp;
10558 9555
10559 flag = 0x80; 9556 flag = 0x80;
10560 for(i=0; i<8; i++) { 9557 for(i = 0; i < 8; i++) {
10561 SiS_SetSCLKLow(SiS_Pr); /* SC->low */ 9558 SiS_SetSCLKLow(SiS_Pr); /* SC->low */
10562 if(tempax & flag) { 9559 if(tempax & flag) {
10563 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9560 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10564 SiS_Pr->SiS_DDC_Index, 9561 SiS_Pr->SiS_DDC_Index,
10565 SiS_Pr->SiS_DDC_NData, 9562 SiS_Pr->SiS_DDC_NData,
10566 SiS_Pr->SiS_DDC_Data); /* Write bit (1) to SD */ 9563 SiS_Pr->SiS_DDC_Data); /* Write bit (1) to SD */
10567 } else { 9564 } else {
10568 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9565 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10569 SiS_Pr->SiS_DDC_Index, 9566 SiS_Pr->SiS_DDC_Index,
10570 SiS_Pr->SiS_DDC_NData, 9567 SiS_Pr->SiS_DDC_NData,
10571 0x00); /* Write bit (0) to SD */ 9568 0x00); /* Write bit (0) to SD */
10572 } 9569 }
10573 SiS_SetSCLKHigh(SiS_Pr); /* SC->high */ 9570 SiS_SetSCLKHigh(SiS_Pr); /* SC->high */
10574 flag >>= 1; 9571 flag >>= 1;
10575 } 9572 }
10576 temp = SiS_CheckACK(SiS_Pr); /* Check acknowledge */ 9573 temp = SiS_CheckACK(SiS_Pr); /* Check acknowledge */
10577 return(temp); 9574 return temp;
10578} 9575}
10579 9576
10580static USHORT 9577static unsigned short
10581SiS_ReadDDC2Data(SiS_Private *SiS_Pr, USHORT tempax) 9578SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr)
10582{ 9579{
10583 USHORT i,temp,getdata; 9580 unsigned short i, temp, getdata;
10584 9581
10585 getdata=0; 9582 getdata = 0;
10586 for(i=0; i<8; i++) { 9583 for(i = 0; i < 8; i++) {
10587 getdata <<= 1; 9584 getdata <<= 1;
10588 SiS_SetSCLKLow(SiS_Pr); 9585 SiS_SetSCLKLow(SiS_Pr);
10589 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9586 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10590 SiS_Pr->SiS_DDC_Index, 9587 SiS_Pr->SiS_DDC_Index,
10591 SiS_Pr->SiS_DDC_NData, 9588 SiS_Pr->SiS_DDC_NData,
10592 SiS_Pr->SiS_DDC_Data); 9589 SiS_Pr->SiS_DDC_Data);
10593 SiS_SetSCLKHigh(SiS_Pr); 9590 SiS_SetSCLKHigh(SiS_Pr);
10594 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); 9591 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index);
10595 if(temp & SiS_Pr->SiS_DDC_Data) getdata |= 0x01; 9592 if(temp & SiS_Pr->SiS_DDC_Data) getdata |= 0x01;
10596 } 9593 }
10597 return(getdata); 9594 return getdata;
10598} 9595}
10599 9596
10600static USHORT 9597static unsigned short
10601SiS_SetSCLKLow(SiS_Private *SiS_Pr) 9598SiS_SetSCLKLow(struct SiS_Private *SiS_Pr)
10602{ 9599{
10603 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9600 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10604 SiS_Pr->SiS_DDC_Index, 9601 SiS_Pr->SiS_DDC_Index,
10605 SiS_Pr->SiS_DDC_NClk, 9602 SiS_Pr->SiS_DDC_NClk,
10606 0x00); /* SetSCLKLow() */ 9603 0x00); /* SetSCLKLow() */
10607 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); 9604 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT);
10608 return 0; 9605 return 0;
10609} 9606}
10610 9607
10611static USHORT 9608static unsigned short
10612SiS_SetSCLKHigh(SiS_Private *SiS_Pr) 9609SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr)
10613{ 9610{
10614 USHORT temp, watchdog=1000; 9611 unsigned short temp, watchdog=1000;
10615 9612
10616 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9613 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10617 SiS_Pr->SiS_DDC_Index, 9614 SiS_Pr->SiS_DDC_Index,
10618 SiS_Pr->SiS_DDC_NClk, 9615 SiS_Pr->SiS_DDC_NClk,
10619 SiS_Pr->SiS_DDC_Clk); /* SetSCLKHigh() */ 9616 SiS_Pr->SiS_DDC_Clk); /* SetSCLKHigh() */
10620 do { 9617 do {
10621 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); 9618 temp = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index);
10622 } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog); 9619 } while((!(temp & SiS_Pr->SiS_DDC_Clk)) && --watchdog);
10623 if (!watchdog) { 9620 if (!watchdog) {
9621#ifdef SIS_XORG_XF86
10624#ifdef TWDEBUG 9622#ifdef TWDEBUG
10625 xf86DrvMsg(0, X_INFO, "SetClkHigh failed\n"); 9623 xf86DrvMsg(0, X_INFO, "SetClkHigh failed\n");
10626#endif 9624#endif
9625#endif
10627 return 0xFFFF; 9626 return 0xFFFF;
10628 } 9627 }
10629 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT); 9628 SiS_DDC2Delay(SiS_Pr,SiS_I2CDELAYSHORT);
@@ -10632,21 +9631,21 @@ SiS_SetSCLKHigh(SiS_Private *SiS_Pr)
10632 9631
10633/* Check I2C acknowledge */ 9632/* Check I2C acknowledge */
10634/* Returns 0 if ack ok, non-0 if ack not ok */ 9633/* Returns 0 if ack ok, non-0 if ack not ok */
10635static USHORT 9634static unsigned short
10636SiS_CheckACK(SiS_Private *SiS_Pr) 9635SiS_CheckACK(struct SiS_Private *SiS_Pr)
10637{ 9636{
10638 USHORT tempah; 9637 unsigned short tempah;
10639 9638
10640 SiS_SetSCLKLow(SiS_Pr); /* (SC->low) */ 9639 SiS_SetSCLKLow(SiS_Pr); /* (SC->low) */
10641 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port, 9640 SiS_SetRegANDOR(SiS_Pr->SiS_DDC_Port,
10642 SiS_Pr->SiS_DDC_Index, 9641 SiS_Pr->SiS_DDC_Index,
10643 SiS_Pr->SiS_DDC_NData, 9642 SiS_Pr->SiS_DDC_NData,
10644 SiS_Pr->SiS_DDC_Data); /* (SD->high) */ 9643 SiS_Pr->SiS_DDC_Data); /* (SD->high) */
10645 SiS_SetSCLKHigh(SiS_Pr); /* SC->high = clock impulse for ack */ 9644 SiS_SetSCLKHigh(SiS_Pr); /* SC->high = clock impulse for ack */
10646 tempah = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); /* Read SD */ 9645 tempah = SiS_GetReg(SiS_Pr->SiS_DDC_Port,SiS_Pr->SiS_DDC_Index); /* Read SD */
10647 SiS_SetSCLKLow(SiS_Pr); /* SC->low = end of clock impulse */ 9646 SiS_SetSCLKLow(SiS_Pr); /* SC->low = end of clock impulse */
10648 if(tempah & SiS_Pr->SiS_DDC_Data) return(1); /* Ack OK if bit = 0 */ 9647 if(tempah & SiS_Pr->SiS_DDC_Data) return 1; /* Ack OK if bit = 0 */
10649 else return(0); 9648 return 0;
10650} 9649}
10651 9650
10652/* End of I2C functions ----------------------- */ 9651/* End of I2C functions ----------------------- */
@@ -10656,67 +9655,67 @@ SiS_CheckACK(SiS_Private *SiS_Pr)
10656 9655
10657#ifdef SIS315H 9656#ifdef SIS315H
10658 9657
10659static USHORT 9658static unsigned short
10660GetRAMDACromptr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 9659GetRAMDACromptr(struct SiS_Private *SiS_Pr)
10661{ 9660{
10662 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 9661 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
10663 USHORT romptr; 9662 unsigned short romptr;
10664 9663
10665 if(HwInfo->jChipType < SIS_330) { 9664 if(SiS_Pr->ChipType < SIS_330) {
10666 romptr = SISGETROMW(0x128); 9665 romptr = SISGETROMW(0x128);
10667 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) 9666 if(SiS_Pr->SiS_VBType & VB_SIS30xB)
10668 romptr = SISGETROMW(0x12a); 9667 romptr = SISGETROMW(0x12a);
10669 } else { 9668 } else {
10670 romptr = SISGETROMW(0x1a8); 9669 romptr = SISGETROMW(0x1a8);
10671 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) 9670 if(SiS_Pr->SiS_VBType & VB_SIS30xB)
10672 romptr = SISGETROMW(0x1aa); 9671 romptr = SISGETROMW(0x1aa);
10673 } 9672 }
10674 return(romptr); 9673 return romptr;
10675} 9674}
10676 9675
10677static USHORT 9676static unsigned short
10678GetLCDromptr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 9677GetLCDromptr(struct SiS_Private *SiS_Pr)
10679{ 9678{
10680 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 9679 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
10681 USHORT romptr; 9680 unsigned short romptr;
10682 9681
10683 if(HwInfo->jChipType < SIS_330) { 9682 if(SiS_Pr->ChipType < SIS_330) {
10684 romptr = SISGETROMW(0x120); 9683 romptr = SISGETROMW(0x120);
10685 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) 9684 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV)
10686 romptr = SISGETROMW(0x122); 9685 romptr = SISGETROMW(0x122);
10687 } else { 9686 } else {
10688 romptr = SISGETROMW(0x1a0); 9687 romptr = SISGETROMW(0x1a0);
10689 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) 9688 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV)
10690 romptr = SISGETROMW(0x1a2); 9689 romptr = SISGETROMW(0x1a2);
10691 } 9690 }
10692 return(romptr); 9691 return romptr;
10693} 9692}
10694 9693
10695static USHORT 9694static unsigned short
10696GetTVromptr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 9695GetTVromptr(struct SiS_Private *SiS_Pr)
10697{ 9696{
10698 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 9697 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
10699 USHORT romptr; 9698 unsigned short romptr;
10700 9699
10701 if(HwInfo->jChipType < SIS_330) { 9700 if(SiS_Pr->ChipType < SIS_330) {
10702 romptr = SISGETROMW(0x114); 9701 romptr = SISGETROMW(0x114);
10703 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) 9702 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV)
10704 romptr = SISGETROMW(0x11a); 9703 romptr = SISGETROMW(0x11a);
10705 } else { 9704 } else {
10706 romptr = SISGETROMW(0x194); 9705 romptr = SISGETROMW(0x194);
10707 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) 9706 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV)
10708 romptr = SISGETROMW(0x19a); 9707 romptr = SISGETROMW(0x19a);
10709 } 9708 }
10710 return(romptr); 9709 return romptr;
10711} 9710}
10712 9711
10713static USHORT 9712static unsigned short
10714GetLCDPtrIndexBIOS(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 9713GetLCDPtrIndexBIOS(struct SiS_Private *SiS_Pr)
10715{ 9714{
10716 USHORT index; 9715 unsigned short index;
10717 9716
10718 if((IS_SIS650) && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { 9717 if((IS_SIS650) && (SiS_Pr->SiS_VBType & VB_SISLVDS)) {
10719 if(!(SiS_IsNotM650orLater(SiS_Pr, HwInfo))) { 9718 if(!(SiS_IsNotM650orLater(SiS_Pr))) {
10720 if((index = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0xf0)) { 9719 if((index = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0xf0)) {
10721 index >>= 4; 9720 index >>= 4;
10722 index *= 3; 9721 index *= 3;
@@ -10729,7 +9728,12 @@ GetLCDPtrIndexBIOS(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
10729 9728
10730 index = SiS_GetBIOSLCDResInfo(SiS_Pr) & 0x0F; 9729 index = SiS_GetBIOSLCDResInfo(SiS_Pr) & 0x0F;
10731 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) index -= 5; 9730 if(SiS_Pr->SiS_LCDResInfo == Panel_1400x1050) index -= 5;
10732 else if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) index -= 6; 9731 if(SiS_Pr->SiS_VBType & VB_SIS301C) { /* 1.15.20 and later (not VB specific) */
9732 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) index -= 5;
9733 if(SiS_Pr->SiS_LCDResInfo == Panel_1280x768) index -= 5;
9734 } else {
9735 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) index -= 6;
9736 }
10733 index--; 9737 index--;
10734 index *= 3; 9738 index *= 3;
10735 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2; 9739 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2;
@@ -10737,10 +9741,10 @@ GetLCDPtrIndexBIOS(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
10737 return index; 9741 return index;
10738} 9742}
10739 9743
10740static USHORT 9744static unsigned short
10741GetLCDPtrIndex(SiS_Private *SiS_Pr) 9745GetLCDPtrIndex(struct SiS_Private *SiS_Pr)
10742{ 9746{
10743 USHORT index; 9747 unsigned short index;
10744 9748
10745 index = ((SiS_GetBIOSLCDResInfo(SiS_Pr) & 0x0F) - 1) * 3; 9749 index = ((SiS_GetBIOSLCDResInfo(SiS_Pr) & 0x0F) - 1) * 3;
10746 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2; 9750 if(SiS_Pr->SiS_LCDInfo & DontExpandLCD) index += 2;
@@ -10748,10 +9752,10 @@ GetLCDPtrIndex(SiS_Private *SiS_Pr)
10748 return index; 9752 return index;
10749} 9753}
10750 9754
10751static USHORT 9755static unsigned short
10752GetTVPtrIndex(SiS_Private *SiS_Pr) 9756GetTVPtrIndex(struct SiS_Private *SiS_Pr)
10753{ 9757{
10754 USHORT index; 9758 unsigned short index;
10755 9759
10756 index = 0; 9760 index = 0;
10757 if(SiS_Pr->SiS_TVMode & TVSetPAL) index = 1; 9761 if(SiS_Pr->SiS_TVMode & TVSetPAL) index = 1;
@@ -10769,10 +9773,10 @@ GetTVPtrIndex(SiS_Private *SiS_Pr)
10769 return index; 9773 return index;
10770} 9774}
10771 9775
10772static ULONG 9776static unsigned int
10773GetOEMTVPtr661_2_GEN(SiS_Private *SiS_Pr, int addme) 9777GetOEMTVPtr661_2_GEN(struct SiS_Private *SiS_Pr, int addme)
10774{ 9778{
10775 USHORT index = 0, temp = 0; 9779 unsigned short index = 0, temp = 0;
10776 9780
10777 if(SiS_Pr->SiS_TVMode & TVSetPAL) index = 1; 9781 if(SiS_Pr->SiS_TVMode & TVSetPAL) index = 1;
10778 if(SiS_Pr->SiS_TVMode & TVSetPALM) index = 2; 9782 if(SiS_Pr->SiS_TVMode & TVSetPALM) index = 2;
@@ -10784,7 +9788,7 @@ GetOEMTVPtr661_2_GEN(SiS_Private *SiS_Pr, int addme)
10784 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) index = 7; 9788 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) index = 7;
10785 } 9789 }
10786 9790
10787 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 9791 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
10788 if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || 9792 if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) ||
10789 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode)) { 9793 (SiS_Pr->SiS_TVMode & TVSetTVSimuMode)) {
10790 index += addme; 9794 index += addme;
@@ -10792,25 +9796,25 @@ GetOEMTVPtr661_2_GEN(SiS_Private *SiS_Pr, int addme)
10792 } 9796 }
10793 temp += 0x0100; 9797 temp += 0x0100;
10794 } 9798 }
10795 return(ULONG)(index | (temp << 16)); 9799 return (unsigned int)(index | (temp << 16));
10796} 9800}
10797 9801
10798static ULONG 9802static unsigned int
10799GetOEMTVPtr661_2_OLD(SiS_Private *SiS_Pr) 9803GetOEMTVPtr661_2_OLD(struct SiS_Private *SiS_Pr)
10800{ 9804{
10801 return(GetOEMTVPtr661_2_GEN(SiS_Pr, 8)); 9805 return (GetOEMTVPtr661_2_GEN(SiS_Pr, 8));
10802} 9806}
10803 9807
10804#if 0 9808#if 0
10805static ULONG 9809static unsigned int
10806GetOEMTVPtr661_2_NEW(SiS_Private *SiS_Pr) 9810GetOEMTVPtr661_2_NEW(struct SiS_Private *SiS_Pr)
10807{ 9811{
10808 return(GetOEMTVPtr661_2_GEN(SiS_Pr, 6)); 9812 return (GetOEMTVPtr661_2_GEN(SiS_Pr, 6));
10809} 9813}
10810#endif 9814#endif
10811 9815
10812static int 9816static int
10813GetOEMTVPtr661(SiS_Private *SiS_Pr) 9817GetOEMTVPtr661(struct SiS_Private *SiS_Pr)
10814{ 9818{
10815 int index = 0; 9819 int index = 0;
10816 9820
@@ -10833,10 +9837,10 @@ GetOEMTVPtr661(SiS_Private *SiS_Pr)
10833} 9837}
10834 9838
10835static void 9839static void
10836SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo) 9840SetDelayComp(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
10837{ 9841{
10838 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 9842 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
10839 USHORT delay=0,index,myindex,temp,romptr=0; 9843 unsigned short delay=0,index,myindex,temp,romptr=0;
10840 BOOLEAN dochiptest = TRUE; 9844 BOOLEAN dochiptest = TRUE;
10841 9845
10842 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) { 9846 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCDA) {
@@ -10848,19 +9852,19 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
10848 /* Find delay (from ROM, internal tables, PCI subsystem) */ 9852 /* Find delay (from ROM, internal tables, PCI subsystem) */
10849 9853
10850 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { /* ------------ VGA */ 9854 if(SiS_Pr->SiS_VBInfo & SetCRT2ToRAMDAC) { /* ------------ VGA */
10851 9855
10852 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) { 9856 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) {
10853 romptr = GetRAMDACromptr(SiS_Pr, HwInfo); 9857 romptr = GetRAMDACromptr(SiS_Pr);
10854 } 9858 }
10855 if(romptr) delay = ROMAddr[romptr]; 9859 if(romptr) delay = ROMAddr[romptr];
10856 else { 9860 else {
10857 delay = 0x04; 9861 delay = 0x04;
10858 if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { 9862 if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
10859 if(IS_SIS650) { 9863 if(IS_SIS650) {
10860 delay = 0x0a; 9864 delay = 0x0a;
10861 } else if(IS_SIS740) { 9865 } else if(IS_SIS740) {
10862 delay = 0x00; 9866 delay = 0x00;
10863 } else if(HwInfo->jChipType < SIS_330) { 9867 } else if(SiS_Pr->ChipType < SIS_330) {
10864 delay = 0x0c; 9868 delay = 0x0c;
10865 } else { 9869 } else {
10866 delay = 0x0c; 9870 delay = 0x0c;
@@ -10901,8 +9905,12 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
10901 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2d,0x0f,delay); 9905 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2d,0x0f,delay);
10902 } else { 9906 } else {
10903 delay = 0x0c; 9907 delay = 0x0c;
10904 if(SiS_Pr->SiS_VBType & VB_SIS301C) delay = 0x03; 9908 if(SiS_Pr->SiS_VBType & VB_SIS301C) {
10905 else if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 9909 delay = 0x03;
9910 if((SiS_Pr->PanelXRes > 1280) && (SiS_Pr->PanelYRes > 1024)) {
9911 delay = 0x00;
9912 }
9913 } else if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
10906 if(IS_SIS740) delay = 0x01; 9914 if(IS_SIS740) delay = 0x01;
10907 else delay = 0x03; 9915 else delay = 0x03;
10908 } 9916 }
@@ -10947,12 +9955,12 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
10947 9955
10948 if(!gotitfrompci) { 9956 if(!gotitfrompci) {
10949 9957
10950 index = GetLCDPtrIndexBIOS(SiS_Pr, HwInfo); 9958 index = GetLCDPtrIndexBIOS(SiS_Pr);
10951 myindex = GetLCDPtrIndex(SiS_Pr); 9959 myindex = GetLCDPtrIndex(SiS_Pr);
10952 9960
10953 if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) { 9961 if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SISLVDS)) {
10954 9962
10955 if(SiS_IsNotM650orLater(SiS_Pr, HwInfo)) { 9963 if(SiS_IsNotM650orLater(SiS_Pr)) {
10956 9964
10957 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) { 9965 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) {
10958 /* Always use the second pointer on 650; some BIOSes */ 9966 /* Always use the second pointer on 650; some BIOSes */
@@ -10978,11 +9986,12 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
10978 (!(SiS_Pr->SiS_ROMNew)) && 9986 (!(SiS_Pr->SiS_ROMNew)) &&
10979 (SiS_Pr->SiS_LCDResInfo != Panel_1280x1024) && 9987 (SiS_Pr->SiS_LCDResInfo != Panel_1280x1024) &&
10980 (SiS_Pr->SiS_LCDResInfo != Panel_1280x768) && 9988 (SiS_Pr->SiS_LCDResInfo != Panel_1280x768) &&
10981 (SiS_Pr->SiS_LCDResInfo != Panel_1280x960)) { 9989 (SiS_Pr->SiS_LCDResInfo != Panel_1280x960) &&
9990 (SiS_Pr->SiS_LCDResInfo != Panel_1600x1200) &&
9991 ((romptr = GetLCDromptr(SiS_Pr)))) {
10982 9992
10983 /* Data for 1280x1024 wrong in 301B BIOS */ 9993 /* Data for 1280x1024 wrong in 301B BIOS */
10984 romptr = GetLCDromptr(SiS_Pr, HwInfo); 9994 /* Data for 1600x1200 wrong in 301C BIOS */
10985 if(!romptr) return;
10986 delay = ROMAddr[(romptr + index)]; 9995 delay = ROMAddr[(romptr + index)];
10987 9996
10988 } else if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 9997 } else if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
@@ -10993,14 +10002,15 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
10993 } else { 10002 } else {
10994 10003
10995 delay = SiS310_LCDDelayCompensation_301[myindex]; 10004 delay = SiS310_LCDDelayCompensation_301[myindex];
10996 if(SiS_Pr->SiS_VBType & VB_SIS301LV302LV) { 10005 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
10997 if(IS_SIS740) delay = 0x01; 10006 if(IS_SIS740) delay = 0x01;
10998 else if(HwInfo->jChipType <= SIS_315PRO) delay = SiS310_LCDDelayCompensation_3xx301LV[myindex]; 10007 else if(SiS_Pr->ChipType <= SIS_315PRO) delay = SiS310_LCDDelayCompensation_3xx301LV[myindex];
10999 else delay = SiS310_LCDDelayCompensation_650301LV[myindex]; 10008 else delay = SiS310_LCDDelayCompensation_650301LV[myindex];
11000 } else if(SiS_Pr->SiS_VBType & VB_SIS301C) { 10009 } else if(SiS_Pr->SiS_VBType & VB_SIS301C) {
11001 if(IS_SIS740) delay = 0x01; /* ? */ 10010 if(IS_SIS740) delay = 0x01; /* ? */
11002 else delay = 0x03; 10011 else delay = 0x03;
11003 } else if(SiS_Pr->SiS_VBType & VB_SIS301B302B) { 10012 if(SiS_Pr->SiS_LCDResInfo == Panel_1600x1200) delay = 0x00; /* experience */
10013 } else if(SiS_Pr->SiS_VBType & VB_SIS30xB) {
11004 if(IS_SIS740) delay = 0x01; 10014 if(IS_SIS740) delay = 0x01;
11005 else delay = SiS310_LCDDelayCompensation_3xx301B[myindex]; 10015 else delay = SiS310_LCDDelayCompensation_3xx301B[myindex];
11006 } 10016 }
@@ -11013,14 +10023,14 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
11013 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,((delay << 4) & 0xf0)); 10023 SiS_SetRegANDOR(SiS_Pr->SiS_Part1Port,0x2D,0x0F,((delay << 4) & 0xf0));
11014 dochiptest = FALSE; 10024 dochiptest = FALSE;
11015 } 10025 }
11016 10026
11017 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* ------------ TV */ 10027 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { /* ------------ TV */
11018 10028
11019 index = GetTVPtrIndex(SiS_Pr); 10029 index = GetTVPtrIndex(SiS_Pr);
11020
11021 if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) {
11022 10030
11023 if(SiS_IsNotM650orLater(SiS_Pr,HwInfo)) { 10031 if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SISLVDS)) {
10032
10033 if(SiS_IsNotM650orLater(SiS_Pr)) {
11024 10034
11025 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) { 10035 if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) {
11026 /* Always use the second pointer on 650; some BIOSes */ 10036 /* Always use the second pointer on 650; some BIOSes */
@@ -11062,7 +10072,7 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
11062 10072
11063 } else if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) { 10073 } else if((SiS_Pr->SiS_UseROM) && (!(SiS_Pr->SiS_ROMNew))) {
11064 10074
11065 romptr = GetTVromptr(SiS_Pr, HwInfo); 10075 romptr = GetTVromptr(SiS_Pr);
11066 if(!romptr) return; 10076 if(!romptr) return;
11067 delay = ROMAddr[romptr + index]; 10077 delay = ROMAddr[romptr + index];
11068 10078
@@ -11073,7 +10083,7 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
11073 } else { 10083 } else {
11074 10084
11075 delay = SiS310_TVDelayCompensation_301[index]; 10085 delay = SiS310_TVDelayCompensation_301[index];
11076 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 10086 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
11077 if(IS_SIS740) { 10087 if(IS_SIS740) {
11078 delay = SiS310_TVDelayCompensation_740301B[index]; 10088 delay = SiS310_TVDelayCompensation_740301B[index];
11079 /* LV: use 301 data? BIOS bug? */ 10089 /* LV: use 301 data? BIOS bug? */
@@ -11085,18 +10095,18 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
11085 10095
11086 } 10096 }
11087 10097
11088 if(SiS_LCDAEnabled(SiS_Pr, HwInfo)) { 10098 if(SiS_LCDAEnabled(SiS_Pr)) {
11089 delay &= 0x0f; 10099 delay &= 0x0f;
11090 dochiptest = FALSE; 10100 dochiptest = FALSE;
11091 } 10101 }
11092 10102
11093 } else return; 10103 } else return;
11094 10104
11095 /* Write delay */ 10105 /* Write delay */
11096 10106
11097 if(SiS_Pr->SiS_VBType & VB_SISVB) { 10107 if(SiS_Pr->SiS_VBType & VB_SISVB) {
11098 10108
11099 if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SIS301LV302LV) && dochiptest) { 10109 if(IS_SIS650 && (SiS_Pr->SiS_VBType & VB_SISLVDS) && dochiptest) {
11100 10110
11101 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0xf0) >> 4; 10111 temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0xf0) >> 4;
11102 if(temp == 8) { /* 1400x1050 BIOS (COMPAL) */ 10112 if(temp == 8) { /* 1400x1050 BIOS (COMPAL) */
@@ -11134,11 +10144,10 @@ SetDelayComp(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo)
11134} 10144}
11135 10145
11136static void 10146static void
11137SetAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10147SetAntiFlicker(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
11138 USHORT ModeNo,USHORT ModeIdIndex)
11139{ 10148{
11140 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10149 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11141 USHORT index,temp,temp1,romptr=0; 10150 unsigned short index,temp,temp1,romptr=0;
11142 10151
11143 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p|TVSetYPbPr525p)) return; 10152 if(SiS_Pr->SiS_TVMode & (TVSetYPbPr750p|TVSetYPbPr525p)) return;
11144 10153
@@ -11152,14 +10161,14 @@ SetAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11152 temp1 = temp; 10161 temp1 = temp;
11153 10162
11154 if(SiS_Pr->SiS_UseROM && (!(SiS_Pr->SiS_ROMNew))) { 10163 if(SiS_Pr->SiS_UseROM && (!(SiS_Pr->SiS_ROMNew))) {
11155 if(HwInfo->jChipType >= SIS_661) { 10164 if(SiS_Pr->ChipType >= SIS_661) {
11156 temp1 = GetOEMTVPtr661(SiS_Pr); 10165 temp1 = GetOEMTVPtr661(SiS_Pr);
11157 temp1 >>= 1; 10166 temp1 >>= 1;
11158 romptr = SISGETROMW(0x260); 10167 romptr = SISGETROMW(0x260);
11159 if(HwInfo->jChipType >= SIS_760) { 10168 if(SiS_Pr->ChipType >= SIS_760) {
11160 romptr = SISGETROMW(0x360); 10169 romptr = SISGETROMW(0x360);
11161 } 10170 }
11162 } else if(HwInfo->jChipType >= SIS_330) { 10171 } else if(SiS_Pr->ChipType >= SIS_330) {
11163 romptr = SISGETROMW(0x192); 10172 romptr = SISGETROMW(0x192);
11164 } else { 10173 } else {
11165 romptr = SISGETROMW(0x112); 10174 romptr = SISGETROMW(0x112);
@@ -11178,11 +10187,10 @@ SetAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11178} 10187}
11179 10188
11180static void 10189static void
11181SetEdgeEnhance(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10190SetEdgeEnhance(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex)
11182 USHORT ModeNo,USHORT ModeIdIndex)
11183{ 10191{
11184 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10192 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11185 USHORT index,temp,temp1,romptr=0; 10193 unsigned short index,temp,temp1,romptr=0;
11186 10194
11187 temp = temp1 = GetTVPtrIndex(SiS_Pr) >> 1; /* 0: NTSC/YPbPr, 1: PAL, 2: HiTV */ 10195 temp = temp1 = GetTVPtrIndex(SiS_Pr) >> 1; /* 0: NTSC/YPbPr, 1: PAL, 2: HiTV */
11188 10196
@@ -11192,14 +10200,14 @@ SetEdgeEnhance(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11192 index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex; 10200 index = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].VB_ExtTVEdgeIndex;
11193 10201
11194 if(SiS_Pr->SiS_UseROM && (!(SiS_Pr->SiS_ROMNew))) { 10202 if(SiS_Pr->SiS_UseROM && (!(SiS_Pr->SiS_ROMNew))) {
11195 if(HwInfo->jChipType >= SIS_661) { 10203 if(SiS_Pr->ChipType >= SIS_661) {
11196 romptr = SISGETROMW(0x26c); 10204 romptr = SISGETROMW(0x26c);
11197 if(HwInfo->jChipType >= SIS_760) { 10205 if(SiS_Pr->ChipType >= SIS_760) {
11198 romptr = SISGETROMW(0x36c); 10206 romptr = SISGETROMW(0x36c);
11199 } 10207 }
11200 temp1 = GetOEMTVPtr661(SiS_Pr); 10208 temp1 = GetOEMTVPtr661(SiS_Pr);
11201 temp1 >>= 1; 10209 temp1 >>= 1;
11202 } else if(HwInfo->jChipType >= SIS_330) { 10210 } else if(SiS_Pr->ChipType >= SIS_330) {
11203 romptr = SISGETROMW(0x1a4); 10211 romptr = SISGETROMW(0x1a4);
11204 } else { 10212 } else {
11205 romptr = SISGETROMW(0x124); 10213 romptr = SISGETROMW(0x124);
@@ -11217,10 +10225,9 @@ SetEdgeEnhance(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11217} 10225}
11218 10226
11219static void 10227static void
11220SetYFilter(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10228SetYFilter(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex)
11221 USHORT ModeNo,USHORT ModeIdIndex)
11222{ 10229{
11223 USHORT index, temp, i, j; 10230 unsigned short index, temp, i, j;
11224 10231
11225 if(ModeNo <= 0x13) { 10232 if(ModeNo <= 0x13) {
11226 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVYFilterIndex; 10233 index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].VB_StTVYFilterIndex;
@@ -11235,7 +10242,7 @@ SetYFilter(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11235 else if(SiS_Pr->SiS_TVMode & TVSetPALN) temp = 4; /* PAL-N */ 10242 else if(SiS_Pr->SiS_TVMode & TVSetPALN) temp = 4; /* PAL-N */
11236 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) temp = 1; /* HiVision uses PAL */ 10243 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) temp = 1; /* HiVision uses PAL */
11237 10244
11238 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 10245 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
11239 for(i=0x35, j=0; i<=0x38; i++, j++) { 10246 for(i=0x35, j=0; i<=0x38; i++, j++) {
11240 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter2[temp][index][j]); 10247 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVYFilter2[temp][index][j]);
11241 } 10248 }
@@ -11250,23 +10257,22 @@ SetYFilter(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11250} 10257}
11251 10258
11252static void 10259static void
11253SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10260SetPhaseIncr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
11254 USHORT ModeNo,USHORT ModeIdIndex)
11255{ 10261{
11256 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10262 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11257 USHORT index,temp,i,j,resinfo,romptr=0; 10263 unsigned short index,temp,i,j,resinfo,romptr=0;
11258 ULONG lindex; 10264 unsigned int lindex;
11259 10265
11260 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) return; 10266 if(!(SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) return;
11261 10267
11262 /* NTSC-J data not in BIOS, and already set in SetGroup2 */ 10268 /* NTSC-J data not in BIOS, and already set in SetGroup2 */
11263 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) return; 10269 if(SiS_Pr->SiS_TVMode & TVSetNTSCJ) return;
11264 10270
11265 if((HwInfo->jChipType >= SIS_661) || SiS_Pr->SiS_ROMNew) { 10271 if((SiS_Pr->ChipType >= SIS_661) || SiS_Pr->SiS_ROMNew) {
11266 lindex = GetOEMTVPtr661_2_OLD(SiS_Pr) & 0xffff; 10272 lindex = GetOEMTVPtr661_2_OLD(SiS_Pr) & 0xffff;
11267 lindex <<= 2; 10273 lindex <<= 2;
11268 for(j=0, i=0x31; i<=0x34; i++, j++) { 10274 for(j=0, i=0x31; i<=0x34; i++, j++) {
11269 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS661_TVPhase[lindex + j]); 10275 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS_TVPhase[lindex + j]);
11270 } 10276 }
11271 return; 10277 return;
11272 } 10278 }
@@ -11286,17 +10292,17 @@ SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11286 */ 10292 */
11287 if(SiS_Pr->SiS_UseROM) { 10293 if(SiS_Pr->SiS_UseROM) {
11288 romptr = SISGETROMW(0x116); 10294 romptr = SISGETROMW(0x116);
11289 if(HwInfo->jChipType >= SIS_330) { 10295 if(SiS_Pr->ChipType >= SIS_330) {
11290 romptr = SISGETROMW(0x196); 10296 romptr = SISGETROMW(0x196);
11291 } 10297 }
11292 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 10298 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
11293 romptr = SISGETROMW(0x11c); 10299 romptr = SISGETROMW(0x11c);
11294 if(HwInfo->jChipType >= SIS_330) { 10300 if(SiS_Pr->ChipType >= SIS_330) {
11295 romptr = SISGETROMW(0x19c); 10301 romptr = SISGETROMW(0x19c);
11296 } 10302 }
11297 if((SiS_Pr->SiS_VBInfo & SetInSlaveMode) && (!(SiS_Pr->SiS_TVMode & TVSetTVSimuMode))) { 10303 if((SiS_Pr->SiS_VBInfo & SetInSlaveMode) && (!(SiS_Pr->SiS_TVMode & TVSetTVSimuMode))) {
11298 romptr = SISGETROMW(0x116); 10304 romptr = SISGETROMW(0x116);
11299 if(HwInfo->jChipType >= SIS_330) { 10305 if(SiS_Pr->ChipType >= SIS_330) {
11300 romptr = SISGETROMW(0x196); 10306 romptr = SISGETROMW(0x196);
11301 } 10307 }
11302 } 10308 }
@@ -11311,7 +10317,7 @@ SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11311 index = temp % 2; 10317 index = temp % 2;
11312 temp >>= 1; /* 0:NTSC, 1:PAL, 2:HiTV */ 10318 temp >>= 1; /* 0:NTSC, 1:PAL, 2:HiTV */
11313 for(j=0, i=0x31; i<=0x34; i++, j++) { 10319 for(j=0, i=0x31; i<=0x34; i++, j++) {
11314 if(!(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV)) 10320 if(!(SiS_Pr->SiS_VBType & VB_SIS30xBLV))
11315 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]); 10321 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr1[temp][index][j]);
11316 else if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_TVMode & TVSetTVSimuMode)) 10322 else if((!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) || (SiS_Pr->SiS_TVMode & TVSetTVSimuMode))
11317 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]); 10323 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS310_TVPhaseIncr2[temp][index][j]);
@@ -11320,7 +10326,7 @@ SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11320 } 10326 }
11321 } 10327 }
11322 10328
11323 if((SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision))) { 10329 if((SiS_Pr->SiS_VBType & VB_SIS30xBLV) && (!(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision))) {
11324 if((!(SiS_Pr->SiS_TVMode & (TVSetPAL | TVSetYPbPr525p | TVSetYPbPr750p))) && (ModeNo > 0x13)) { 10330 if((!(SiS_Pr->SiS_TVMode & (TVSetPAL | TVSetYPbPr525p | TVSetYPbPr750p))) && (ModeNo > 0x13)) {
11325 if((resinfo == SIS_RI_640x480) || 10331 if((resinfo == SIS_RI_640x480) ||
11326 (resinfo == SIS_RI_800x600)) { 10332 (resinfo == SIS_RI_800x600)) {
@@ -11339,11 +10345,11 @@ SetPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11339} 10345}
11340 10346
11341static void 10347static void
11342SetDelayComp661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo, 10348SetDelayComp661(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
11343 USHORT ModeIdIndex, USHORT RTI) 10349 unsigned short ModeIdIndex, unsigned short RTI)
11344{ 10350{
11345 USHORT delay = 0, romptr = 0, index, lcdpdcindex; 10351 unsigned short delay = 0, romptr = 0, index, lcdpdcindex;
11346 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10352 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11347 10353
11348 if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD | SetCRT2ToLCDA | SetCRT2ToRAMDAC))) 10354 if(!(SiS_Pr->SiS_VBInfo & (SetCRT2ToTV | SetCRT2ToLCD | SetCRT2ToLCDA | SetCRT2ToRAMDAC)))
11349 return; 10355 return;
@@ -11359,7 +10365,7 @@ SetDelayComp661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo,
11359 if(SiS_Pr->UseCustomMode) { 10365 if(SiS_Pr->UseCustomMode) {
11360 index = SiS_Pr->CSRClock; 10366 index = SiS_Pr->CSRClock;
11361 } else if(ModeNo > 0x13) { 10367 } else if(ModeNo > 0x13) {
11362 index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RTI,HwInfo); 10368 index = SiS_GetVCLK2Ptr(SiS_Pr,ModeNo,ModeIdIndex,RTI);
11363 index = SiS_Pr->SiS_VCLKData[index].CLOCK; 10369 index = SiS_Pr->SiS_VCLKData[index].CLOCK;
11364 } 10370 }
11365 if(index < 25) index = 25; 10371 if(index < 25) index = 25;
@@ -11387,7 +10393,36 @@ SetDelayComp661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo,
11387 else delay = (SiS_Pr->SiS_RefIndex[RTI].Ext_PDC >> 4); 10393 else delay = (SiS_Pr->SiS_RefIndex[RTI].Ext_PDC >> 4);
11388 delay |= (delay << 8); 10394 delay |= (delay << 8);
11389 10395
11390 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 10396 if(SiS_Pr->ChipType >= XGI_20) {
10397
10398 delay = 0x0606;
10399 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
10400
10401 delay = 0x0404;
10402 if(SiS_Pr->SiS_XGIROM) {
10403 index = GetTVPtrIndex(SiS_Pr);
10404 if((romptr = SISGETROMW(0x35e))) {
10405 delay = (ROMAddr[romptr + index] & 0x0f) << 1;
10406 delay |= (delay << 8);
10407 }
10408 }
10409
10410 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) {
10411 if(SiS_Pr->ChipType == XGI_40 && SiS_Pr->ChipRevision == 0x02) {
10412 delay -= 0x0404;
10413 }
10414 }
10415 }
10416
10417 } else if(SiS_Pr->ChipType >= SIS_340) {
10418
10419 delay = 0x0606;
10420 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
10421 delay = 0x0404;
10422 }
10423 /* TODO (eventually) */
10424
10425 } else if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
11391 10426
11392 /* 3. TV */ 10427 /* 3. TV */
11393 10428
@@ -11406,7 +10441,7 @@ SetDelayComp661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo,
11406 /* 4. LCD, LCDA (for new ROM only LV and non-Pass 1:1) */ 10441 /* 4. LCD, LCDA (for new ROM only LV and non-Pass 1:1) */
11407 10442
11408 if( (SiS_Pr->SiS_LCDResInfo != Panel_Custom) && 10443 if( (SiS_Pr->SiS_LCDResInfo != Panel_Custom) &&
11409 ((romptr = GetLCDStructPtr661_2(SiS_Pr, HwInfo))) ) { 10444 ((romptr = GetLCDStructPtr661_2(SiS_Pr))) ) {
11410 10445
11411 lcdpdcindex = (SiS_Pr->SiS_VBType & VB_UMC) ? 14 : 12; 10446 lcdpdcindex = (SiS_Pr->SiS_VBType & VB_UMC) ? 14 : 12;
11412 10447
@@ -11426,6 +10461,7 @@ SetDelayComp661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo,
11426 case Panel_1280x768_2:delay = 0x0004; break; 10461 case Panel_1280x768_2:delay = 0x0004; break;
11427 case Panel_1280x800: 10462 case Panel_1280x800:
11428 case Panel_1280x800_2:delay = 0x0004; break; /* Verified for 1280x800 */ 10463 case Panel_1280x800_2:delay = 0x0004; break; /* Verified for 1280x800 */
10464 case Panel_1280x854: delay = 0x0004; break; /* FIXME */
11429 case Panel_1280x1024: delay = 0x1e04; break; 10465 case Panel_1280x1024: delay = 0x1e04; break;
11430 case Panel_1400x1050: delay = 0x0004; break; 10466 case Panel_1400x1050: delay = 0x0004; break;
11431 case Panel_1600x1200: delay = 0x0400; break; 10467 case Panel_1600x1200: delay = 0x0400; break;
@@ -11469,10 +10505,10 @@ SetDelayComp661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo,
11469} 10505}
11470 10506
11471static void 10507static void
11472SetCRT2SyncDither661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo, USHORT RTI) 10508SetCRT2SyncDither661(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short RTI)
11473{ 10509{
11474 USHORT infoflag; 10510 unsigned short infoflag;
11475 UCHAR temp; 10511 unsigned char temp;
11476 10512
11477 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 10513 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
11478 10514
@@ -11513,12 +10549,16 @@ SetCRT2SyncDither661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo, US
11513} 10549}
11514 10550
11515static void 10551static void
11516SetPanelParms661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo) 10552SetPanelParms661(struct SiS_Private *SiS_Pr)
11517{ 10553{
11518 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10554 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11519 USHORT romptr, temp1, temp2; 10555 unsigned short romptr, temp1, temp2;
10556
10557 if(SiS_Pr->SiS_VBType & (VB_SISLVDS | VB_SIS30xC)) {
10558 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x24,0x0f);
10559 }
11520 10560
11521 if(SiS_Pr->SiS_VBType & (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) { 10561 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
11522 if(SiS_Pr->LVDSHL != -1) { 10562 if(SiS_Pr->LVDSHL != -1) {
11523 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x24,0xfc,SiS_Pr->LVDSHL); 10563 SiS_SetRegANDOR(SiS_Pr->SiS_Part4Port,0x24,0xfc,SiS_Pr->LVDSHL);
11524 } 10564 }
@@ -11526,8 +10566,8 @@ SetPanelParms661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
11526 10566
11527 if(SiS_Pr->SiS_ROMNew) { 10567 if(SiS_Pr->SiS_ROMNew) {
11528 10568
11529 if((romptr = GetLCDStructPtr661_2(SiS_Pr, HwInfo))) { 10569 if((romptr = GetLCDStructPtr661_2(SiS_Pr))) {
11530 if(SiS_Pr->SiS_VBType & (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) { 10570 if(SiS_Pr->SiS_VBType & VB_SISLVDS) {
11531 temp1 = (ROMAddr[romptr] & 0x03) | 0x0c; 10571 temp1 = (ROMAddr[romptr] & 0x03) | 0x0c;
11532 temp2 = 0xfc; 10572 temp2 = 0xfc;
11533 if(SiS_Pr->LVDSHL != -1) { 10573 if(SiS_Pr->LVDSHL != -1) {
@@ -11546,48 +10586,47 @@ SetPanelParms661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo)
11546} 10586}
11547 10587
11548static void 10588static void
11549SiS_OEM310Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10589SiS_OEM310Setting(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RRTI)
11550 USHORT ModeNo,USHORT ModeIdIndex,USHORT RRTI)
11551{ 10590{
11552 if((SiS_Pr->SiS_ROMNew) && (SiS_Pr->SiS_VBType & VB_SISLVDS)) { 10591 if((SiS_Pr->SiS_ROMNew) && (SiS_Pr->SiS_VBType & VB_SISLVDS)) {
11553 SetDelayComp661(SiS_Pr,HwInfo,ModeNo,ModeIdIndex,RRTI); 10592 SetDelayComp661(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
11554 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 10593 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
11555 SetCRT2SyncDither661(SiS_Pr,HwInfo,ModeNo,RRTI); 10594 SetCRT2SyncDither661(SiS_Pr, ModeNo, RRTI);
11556 SetPanelParms661(SiS_Pr,HwInfo); 10595 SetPanelParms661(SiS_Pr);
11557 } 10596 }
11558 } else { 10597 } else {
11559 SetDelayComp(SiS_Pr,HwInfo,ModeNo); 10598 SetDelayComp(SiS_Pr,ModeNo);
11560 } 10599 }
11561 10600
11562 if((SiS_Pr->SiS_VBType & VB_SISVB) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) { 10601 if((SiS_Pr->SiS_VBType & VB_SISVB) && (SiS_Pr->SiS_VBInfo & SetCRT2ToTV)) {
11563 SetAntiFlicker(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10602 SetAntiFlicker(SiS_Pr,ModeNo,ModeIdIndex);
11564 SetPhaseIncr(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10603 SetPhaseIncr(SiS_Pr,ModeNo,ModeIdIndex);
11565 SetYFilter(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10604 SetYFilter(SiS_Pr,ModeNo,ModeIdIndex);
11566 if(SiS_Pr->SiS_VBType & VB_SIS301) { 10605 if(SiS_Pr->SiS_VBType & VB_SIS301) {
11567 SetEdgeEnhance(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10606 SetEdgeEnhance(SiS_Pr,ModeNo,ModeIdIndex);
11568 } 10607 }
11569 } 10608 }
11570} 10609}
11571 10610
11572static void 10611static void
11573SiS_OEM661Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10612SiS_OEM661Setting(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
11574 USHORT ModeNo,USHORT ModeIdIndex, USHORT RRTI) 10613 unsigned short ModeIdIndex, unsigned short RRTI)
11575{ 10614{
11576 if(SiS_Pr->SiS_VBType & VB_SISVB) { 10615 if(SiS_Pr->SiS_VBType & VB_SISVB) {
11577 10616
11578 SetDelayComp661(SiS_Pr,HwInfo,ModeNo,ModeIdIndex,RRTI); 10617 SetDelayComp661(SiS_Pr, ModeNo, ModeIdIndex, RRTI);
11579 10618
11580 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 10619 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
11581 SetCRT2SyncDither661(SiS_Pr,HwInfo,ModeNo,RRTI); 10620 SetCRT2SyncDither661(SiS_Pr, ModeNo, RRTI);
11582 SetPanelParms661(SiS_Pr,HwInfo); 10621 SetPanelParms661(SiS_Pr);
11583 } 10622 }
11584 10623
11585 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 10624 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
11586 SetPhaseIncr(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10625 SetPhaseIncr(SiS_Pr, ModeNo, ModeIdIndex);
11587 SetYFilter(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10626 SetYFilter(SiS_Pr, ModeNo, ModeIdIndex);
11588 SetAntiFlicker(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10627 SetAntiFlicker(SiS_Pr, ModeNo, ModeIdIndex);
11589 if(SiS_Pr->SiS_VBType & VB_SIS301) { 10628 if(SiS_Pr->SiS_VBType & VB_SIS301) {
11590 SetEdgeEnhance(SiS_Pr,HwInfo,ModeNo,ModeIdIndex); 10629 SetEdgeEnhance(SiS_Pr, ModeNo, ModeIdIndex);
11591 } 10630 }
11592 } 10631 }
11593 } 10632 }
@@ -11601,13 +10640,12 @@ SiS_OEM661Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11601 * pray that we have a backup... 10640 * pray that we have a backup...
11602 */ 10641 */
11603static void 10642static void
11604SiS_FinalizeLCD(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 10643SiS_FinalizeLCD(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
11605 PSIS_HW_INFO HwInfo)
11606{ 10644{
11607 USHORT tempcl,tempch,tempbl,tempbh,tempbx,tempax,temp; 10645 unsigned short tempcl,tempch,tempbl,tempbh,tempbx,tempax,temp;
11608 USHORT resinfo,modeflag; 10646 unsigned short resinfo,modeflag;
11609 10647
11610 if(!(SiS_Pr->SiS_VBType & VB_SIS301LV302LV)) return; 10648 if(!(SiS_Pr->SiS_VBType & VB_SISLVDS)) return;
11611 if(SiS_Pr->SiS_ROMNew) return; 10649 if(SiS_Pr->SiS_ROMNew) return;
11612 10650
11613 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 10651 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
@@ -11678,7 +10716,7 @@ SiS_FinalizeLCD(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
11678 10716
11679 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) { 10717 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToLCD | SetCRT2ToLCDA)) {
11680 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) { 10718 if(SiS_Pr->SiS_LCDResInfo == Panel_1024x768) {
11681 if(SiS_Pr->SiS_VBType & (VB_SIS302LV | VB_SIS302ELV)) { 10719 if(SiS_Pr->SiS_VBType & VB_SISEMI) {
11682 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2a,0x00); 10720 SiS_SetReg(SiS_Pr->SiS_Part4Port,0x2a,0x00);
11683#ifdef SET_EMI 10721#ifdef SET_EMI
11684 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c); 10722 SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x30,0x0c);
@@ -11806,11 +10844,11 @@ SiS_FinalizeLCD(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
11806#ifdef SIS300 10844#ifdef SIS300
11807 10845
11808static void 10846static void
11809SetOEMLCDData2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10847SetOEMLCDData2(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex,
11810 USHORT ModeNo,USHORT ModeIdIndex, USHORT RefTabIndex) 10848 unsigned short RefTabIndex)
11811{ 10849{
11812 USHORT crt2crtc=0, modeflag, myindex=0; 10850 unsigned short crt2crtc=0, modeflag, myindex=0;
11813 UCHAR temp; 10851 unsigned char temp;
11814 int i; 10852 int i;
11815 10853
11816 if(ModeNo <= 0x13) { 10854 if(ModeNo <= 0x13) {
@@ -11849,21 +10887,21 @@ SetOEMLCDData2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11849 } 10887 }
11850} 10888}
11851 10889
11852static USHORT 10890static unsigned short
11853GetOEMLCDPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, int Flag) 10891GetOEMLCDPtr(struct SiS_Private *SiS_Pr, int Flag)
11854{ 10892{
11855 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10893 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11856 USHORT tempbx=0,romptr=0; 10894 unsigned short tempbx=0,romptr=0;
11857 UCHAR customtable300[] = { 10895 static const unsigned char customtable300[] = {
11858 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 10896 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
11859 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff 10897 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
11860 }; 10898 };
11861 UCHAR customtable630[] = { 10899 static const unsigned char customtable630[] = {
11862 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, 10900 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,
11863 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff 10901 0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff
11864 }; 10902 };
11865 10903
11866 if(HwInfo->jChipType == SIS_300) { 10904 if(SiS_Pr->ChipType == SIS_300) {
11867 10905
11868 tempbx = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0x0f; 10906 tempbx = SiS_GetReg(SiS_Pr->SiS_P3d4,0x36) & 0x0f;
11869 if(SiS_Pr->SiS_VBType & VB_SIS301) tempbx &= 0x07; 10907 if(SiS_Pr->SiS_VBType & VB_SIS301) tempbx &= 0x07;
@@ -11912,11 +10950,10 @@ GetOEMLCDPtr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, int Flag)
11912} 10950}
11913 10951
11914static void 10952static void
11915SetOEMLCDDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 10953SetOEMLCDDelay(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex)
11916 USHORT ModeNo,USHORT ModeIdIndex)
11917{ 10954{
11918 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 10955 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11919 USHORT index,temp,romptr=0; 10956 unsigned short index,temp,romptr=0;
11920 10957
11921 if(SiS_Pr->SiS_LCDResInfo == Panel_Custom) return; 10958 if(SiS_Pr->SiS_LCDResInfo == Panel_Custom) return;
11922 10959
@@ -11927,22 +10964,22 @@ SetOEMLCDDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11927 } 10964 }
11928 10965
11929 /* The Panel Compensation Delay should be set according to tables 10966 /* The Panel Compensation Delay should be set according to tables
11930 * here. Unfortunately, various BIOS versions don't case about 10967 * here. Unfortunately, various BIOS versions don't care about
11931 * a uniform way using eg. ROM byte 0x220, but use different 10968 * a uniform way using eg. ROM byte 0x220, but use different
11932 * hard coded delays (0x04, 0x20, 0x18) in SetGroup1(). 10969 * hard coded delays (0x04, 0x20, 0x18) in SetGroup1().
11933 * Thus we don't set this if the user select a custom pdc or if 10970 * Thus we don't set this if the user selected a custom pdc or if
11934 * we otherwise detected a valid pdc. 10971 * we otherwise detected a valid pdc.
11935 */ 10972 */
11936 if(SiS_Pr->PDC != -1) return; 10973 if(SiS_Pr->PDC != -1) return;
11937 10974
11938 temp = GetOEMLCDPtr(SiS_Pr,HwInfo, 0); 10975 temp = GetOEMLCDPtr(SiS_Pr, 0);
11939 10976
11940 if(SiS_Pr->UseCustomMode) 10977 if(SiS_Pr->UseCustomMode)
11941 index = 0; 10978 index = 0;
11942 else 10979 else
11943 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex; 10980 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_LCDDelayIndex;
11944 10981
11945 if(HwInfo->jChipType != SIS_300) { 10982 if(SiS_Pr->ChipType != SIS_300) {
11946 if(romptr) { 10983 if(romptr) {
11947 romptr += (temp * 2); 10984 romptr += (temp * 2);
11948 romptr = SISGETROMW(romptr); 10985 romptr = SISGETROMW(romptr);
@@ -11986,12 +11023,11 @@ SetOEMLCDDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11986} 11023}
11987 11024
11988static void 11025static void
11989SetOEMLCDData(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 11026SetOEMLCDData(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
11990 USHORT ModeNo,USHORT ModeIdIndex)
11991{ 11027{
11992#if 0 /* Unfinished; Data table missing */ 11028#if 0 /* Unfinished; Data table missing */
11993 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 11029 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
11994 USHORT index,temp; 11030 unsigned short index,temp;
11995 11031
11996 if((SiS_Pr->SiS_UseROM) { 11032 if((SiS_Pr->SiS_UseROM) {
11997 if(!(ROMAddr[0x237] & 0x01)) return; 11033 if(!(ROMAddr[0x237] & 0x01)) return;
@@ -11999,8 +11035,8 @@ SetOEMLCDData(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
11999 /* No rom pointer in BIOS header! */ 11035 /* No rom pointer in BIOS header! */
12000 } 11036 }
12001 11037
12002 temp = GetOEMLCDPtr(SiS_Pr,HwInfo, 1); 11038 temp = GetOEMLCDPtr(SiS_Pr, 1);
12003 if(temp = 0xFFFF) return; 11039 if(temp == 0xFFFF) return;
12004 11040
12005 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex]._VB_LCDHIndex; 11041 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex]._VB_LCDHIndex;
12006 for(i=0x14, j=0; i<=0x17; i++, j++) { 11042 for(i=0x14, j=0; i<=0x17; i++, j++) {
@@ -12018,10 +11054,10 @@ SetOEMLCDData(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12018#endif 11054#endif
12019} 11055}
12020 11056
12021static USHORT 11057static unsigned short
12022GetOEMTVPtr(SiS_Private *SiS_Pr) 11058GetOEMTVPtr(struct SiS_Private *SiS_Pr)
12023{ 11059{
12024 USHORT index; 11060 unsigned short index;
12025 11061
12026 index = 0; 11062 index = 0;
12027 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) index += 4; 11063 if(!(SiS_Pr->SiS_VBInfo & SetInSlaveMode)) index += 4;
@@ -12037,11 +11073,10 @@ GetOEMTVPtr(SiS_Private *SiS_Pr)
12037} 11073}
12038 11074
12039static void 11075static void
12040SetOEMTVDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 11076SetOEMTVDelay(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
12041 USHORT ModeNo,USHORT ModeIdIndex)
12042{ 11077{
12043 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 11078 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
12044 USHORT index,temp,romptr=0; 11079 unsigned short index,temp,romptr=0;
12045 11080
12046 if(SiS_Pr->SiS_UseROM) { 11081 if(SiS_Pr->SiS_UseROM) {
12047 if(!(ROMAddr[0x238] & 0x01)) return; 11082 if(!(ROMAddr[0x238] & 0x01)) return;
@@ -12070,11 +11105,10 @@ SetOEMTVDelay(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12070} 11105}
12071 11106
12072static void 11107static void
12073SetOEMAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 11108SetOEMAntiFlicker(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
12074 USHORT ModeNo, USHORT ModeIdIndex)
12075{ 11109{
12076 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 11110 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
12077 USHORT index,temp,romptr=0; 11111 unsigned short index,temp,romptr=0;
12078 11112
12079 if(SiS_Pr->SiS_UseROM) { 11113 if(SiS_Pr->SiS_UseROM) {
12080 if(!(ROMAddr[0x238] & 0x01)) return; 11114 if(!(ROMAddr[0x238] & 0x01)) return;
@@ -12099,11 +11133,10 @@ SetOEMAntiFlicker(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12099} 11133}
12100 11134
12101static void 11135static void
12102SetOEMPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 11136SetOEMPhaseIncr(struct SiS_Private *SiS_Pr, unsigned short ModeNo,unsigned short ModeIdIndex)
12103 USHORT ModeNo,USHORT ModeIdIndex)
12104{ 11137{
12105 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 11138 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
12106 USHORT index,i,j,temp,romptr=0; 11139 unsigned short index,i,j,temp,romptr=0;
12107 11140
12108 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) return; 11141 if(SiS_Pr->SiS_VBInfo & SetCRT2ToHiVision) return;
12109 11142
@@ -12119,7 +11152,7 @@ SetOEMPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12119 11152
12120 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex; 11153 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVPhaseIndex;
12121 11154
12122 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 11155 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
12123 for(i=0x31, j=0; i<=0x34; i++, j++) { 11156 for(i=0x31, j=0; i<=0x34; i++, j++) {
12124 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Phase2[temp][index][j]); 11157 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Phase2[temp][index][j]);
12125 } 11158 }
@@ -12140,11 +11173,10 @@ SetOEMPhaseIncr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12140} 11173}
12141 11174
12142static void 11175static void
12143SetOEMYFilter(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 11176SetOEMYFilter(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
12144 USHORT ModeNo,USHORT ModeIdIndex)
12145{ 11177{
12146 UCHAR *ROMAddr = HwInfo->pjVirtualRomBase; 11178 unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
12147 USHORT index,temp,i,j,romptr=0; 11179 unsigned short index,temp,i,j,romptr=0;
12148 11180
12149 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSCART | SetCRT2ToHiVision | SetCRT2ToYPbPr525750)) return; 11181 if(SiS_Pr->SiS_VBInfo & (SetCRT2ToSCART | SetCRT2ToHiVision | SetCRT2ToYPbPr525750)) return;
12150 11182
@@ -12162,7 +11194,7 @@ SetOEMYFilter(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12162 11194
12163 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex; 11195 index = SiS_Pr->SiS_VBModeIDTable[ModeIdIndex].VB_TVYFilterIndex;
12164 11196
12165 if(SiS_Pr->SiS_VBType & VB_SIS301BLV302BLV) { 11197 if(SiS_Pr->SiS_VBType & VB_SIS30xBLV) {
12166 for(i=0x35, j=0; i<=0x38; i++, j++) { 11198 for(i=0x35, j=0; i<=0x38; i++, j++) {
12167 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]); 11199 SiS_SetReg(SiS_Pr->SiS_Part2Port,i,SiS300_Filter2[temp][index][j]);
12168 } 11200 }
@@ -12185,11 +11217,11 @@ SetOEMYFilter(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12185 } 11217 }
12186} 11218}
12187 11219
12188static USHORT 11220static unsigned short
12189SiS_SearchVBModeID(SiS_Private *SiS_Pr, USHORT *ModeNo) 11221SiS_SearchVBModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo)
12190{ 11222{
12191 USHORT ModeIdIndex; 11223 unsigned short ModeIdIndex;
12192 UCHAR VGAINFO = SiS_Pr->SiS_VGAINFO; 11224 unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
12193 11225
12194 if(*ModeNo <= 5) *ModeNo |= 1; 11226 if(*ModeNo <= 5) *ModeNo |= 1;
12195 11227
@@ -12210,10 +11242,10 @@ SiS_SearchVBModeID(SiS_Private *SiS_Pr, USHORT *ModeNo)
12210} 11242}
12211 11243
12212static void 11244static void
12213SiS_OEM300Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 11245SiS_OEM300Setting(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
12214 USHORT ModeNo, USHORT ModeIdIndex, USHORT RefTableIndex) 11246 unsigned short RefTableIndex)
12215{ 11247{
12216 USHORT OEMModeIdIndex=0; 11248 unsigned short OEMModeIdIndex = 0;
12217 11249
12218 if(!SiS_Pr->UseCustomMode) { 11250 if(!SiS_Pr->UseCustomMode) {
12219 OEMModeIdIndex = SiS_SearchVBModeID(SiS_Pr,&ModeNo); 11251 OEMModeIdIndex = SiS_SearchVBModeID(SiS_Pr,&ModeNo);
@@ -12221,18 +11253,18 @@ SiS_OEM300Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo,
12221 } 11253 }
12222 11254
12223 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) { 11255 if(SiS_Pr->SiS_VBInfo & SetCRT2ToLCD) {
12224 SetOEMLCDDelay(SiS_Pr, HwInfo, ModeNo, OEMModeIdIndex); 11256 SetOEMLCDDelay(SiS_Pr, ModeNo, OEMModeIdIndex);
12225 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) { 11257 if(SiS_Pr->SiS_IF_DEF_LVDS == 1) {
12226 SetOEMLCDData(SiS_Pr, HwInfo, ModeNo, OEMModeIdIndex); 11258 SetOEMLCDData(SiS_Pr, ModeNo, OEMModeIdIndex);
12227 } 11259 }
12228 } 11260 }
12229 if(SiS_Pr->UseCustomMode) return; 11261 if(SiS_Pr->UseCustomMode) return;
12230 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) { 11262 if(SiS_Pr->SiS_VBInfo & SetCRT2ToTV) {
12231 SetOEMTVDelay(SiS_Pr, HwInfo, ModeNo,OEMModeIdIndex); 11263 SetOEMTVDelay(SiS_Pr, ModeNo,OEMModeIdIndex);
12232 if(SiS_Pr->SiS_VBType & VB_SISVB) { 11264 if(SiS_Pr->SiS_VBType & VB_SISVB) {
12233 SetOEMAntiFlicker(SiS_Pr, HwInfo, ModeNo, OEMModeIdIndex); 11265 SetOEMAntiFlicker(SiS_Pr, ModeNo, OEMModeIdIndex);
12234 SetOEMPhaseIncr(SiS_Pr, HwInfo, ModeNo, OEMModeIdIndex); 11266 SetOEMPhaseIncr(SiS_Pr, ModeNo, OEMModeIdIndex);
12235 SetOEMYFilter(SiS_Pr, HwInfo, ModeNo, OEMModeIdIndex); 11267 SetOEMYFilter(SiS_Pr, ModeNo, OEMModeIdIndex);
12236 } 11268 }
12237 } 11269 }
12238} 11270}
diff --git a/drivers/video/sis/init301.h b/drivers/video/sis/init301.h
index f84eb54164a5..f475b21a85cf 100644
--- a/drivers/video/sis/init301.h
+++ b/drivers/video/sis/init301.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * Data and prototypes for init301.c 4 * Data and prototypes for init301.c
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,18 +50,18 @@
50 * 50 *
51 */ 51 */
52 52
53#ifndef _INIT301_ 53#ifndef _INIT301_H_
54#define _INIT301_ 54#define _INIT301_H_
55 55
56#include "osdef.h" 56#include "osdef.h"
57#include "initdef.h" 57#include "initdef.h"
58 58
59#ifdef LINUX_XF86 59#ifdef SIS_XORG_XF86
60#include "sis.h" 60#include "sis.h"
61#include "sis_regs.h" 61#include "sis_regs.h"
62#endif 62#endif
63 63
64#ifdef LINUX_KERNEL 64#ifdef SIS_LINUX_KERNEL
65#include "vgatypes.h" 65#include "vgatypes.h"
66#include "vstruct.h" 66#include "vstruct.h"
67#ifdef SIS_CP 67#ifdef SIS_CP
@@ -69,8 +69,13 @@
69#endif 69#endif
70#include <linux/config.h> 70#include <linux/config.h>
71#include <linux/version.h> 71#include <linux/version.h>
72#include <asm/io.h>
73#include <linux/types.h> 72#include <linux/types.h>
73#include <asm/io.h>
74#include <linux/fb.h>
75#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
76#include <video/fbcon.h>
77#endif
78#include "sis.h"
74#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 79#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
75#include <linux/sisfb.h> 80#include <linux/sisfb.h>
76#else 81#else
@@ -78,7 +83,7 @@
78#endif 83#endif
79#endif 84#endif
80 85
81static const UCHAR SiS_YPbPrTable[3][64] = { 86static const unsigned char SiS_YPbPrTable[3][64] = {
82 { 87 {
83 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c, 88 0x17,0x1d,0x03,0x09,0x05,0x06,0x0c,0x0c,
84 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a, 89 0x94,0x49,0x01,0x0a,0x06,0x0d,0x04,0x0a,
@@ -90,17 +95,17 @@ static const UCHAR SiS_YPbPrTable[3][64] = {
90 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00 95 0x00,0x40,0x44,0x00,0xdb,0x02,0x3b,0x00
91 }, 96 },
92 { 97 {
93 0x1d,0x11,0x06,0x09,0x0b,0x0c,0x0c,0x0c, 98 0x33,0x06,0x06,0x09,0x0b,0x0c,0x0c,0x0c,
94 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a, 99 0x98,0x0a,0x01,0x0d,0x06,0x0d,0x04,0x0a,
95 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, 100 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
96 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4c /*0x4f*/,0x13, 101 0x0c,0x50,0xb2,0x9f,0x16,0x59,0x4f,0x13,
97 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8, 102 0xad,0x11,0xad,0x1d,0x40,0x8a,0x3d,0xb8,
98 0x51,0x5e,0x60,0x57 /*0x49*/,0x7b /*0x7d*/,0x92,0x0f,0x40, 103 0x51,0x5e,0x60,0x49,0x7d,0x92,0x0f,0x40,
99 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4b, 104 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x4e,
100 0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00 105 0x43,0x41,0x11,0x00,0xfc,0xff,0x32,0x00
101 }, 106 },
102 { 107 {
103#if 1 108#if 0 /* OK, but sticks to left edge */
104 0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c, 109 0x13,0x1d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
105 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, 110 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
106 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, 111 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
@@ -110,20 +115,42 @@ static const UCHAR SiS_YPbPrTable[3][64] = {
110 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27, 115 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x27,
111 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00 116 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
112#endif 117#endif
113#if 0 118#if 1 /* Perfect */
114 0x2a,0x14,0xe8,0x09,0x09,0xed,0x0c,0x0c, /* TEST (0.93) - BAD */ 119 0x23,0x2d,0xe8,0x09,0x09,0xed,0x0c,0x0c,
115 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a, 120 0x98,0x0a,0x01,0x0c,0x06,0x0d,0x04,0x0a,
116 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f, 121 0x06,0x14,0x0d,0x04,0x0a,0x00,0x85,0x3f,
117 0xed,0x50,0x70,0x9e,0x16,0x57,0x6c,0x13, 122 0xed,0x50,0x70,0x9f,0x16,0x59,0x60,0x13,
118 0x27,0x0b,0x27,0xfb,0x30,0x27,0x15,0xb0, 123 0x27,0x0b,0x27,0xfc,0x30,0x27,0x1c,0xb0,
119 0x3b,0xdb,0x61,0x24,0x78,0x92,0x0f,0xff, 124 0x4b,0x4b,0x6f,0x2f,0x63,0x92,0x0f,0x40,
120 0xff,0xff,0xff,0xff,0xff,0xff,0x14,0x6f, 125 0x60,0x80,0x14,0x90,0x8c,0x60,0x14,0x73,
121 0x00,0x52,0xbb,0x00,0xd5,0xf7,0xa2,0x00 126 0x00,0x40,0x11,0x00,0xfc,0xff,0x32,0x00
122#endif 127#endif
123 } 128 }
124}; 129};
125 130
126static const UCHAR SiS_HiTVGroup3_1[] = { 131static const unsigned char SiS_TVPhase[] =
132{
133 0x21,0xED,0xBA,0x08, /* 0x00 SiS_NTSCPhase */
134 0x2A,0x05,0xE3,0x00, /* 0x01 SiS_PALPhase */
135 0x21,0xE4,0x2E,0x9B, /* 0x02 SiS_PALMPhase */
136 0x21,0xF4,0x3E,0xBA, /* 0x03 SiS_PALNPhase */
137 0x1E,0x8B,0xA2,0xA7,
138 0x1E,0x83,0x0A,0xE0, /* 0x05 SiS_SpecialPhaseM */
139 0x00,0x00,0x00,0x00,
140 0x00,0x00,0x00,0x00,
141 0x21,0xF0,0x7B,0xD6, /* 0x08 SiS_NTSCPhase2 */
142 0x2A,0x09,0x86,0xE9, /* 0x09 SiS_PALPhase2 */
143 0x21,0xE6,0xEF,0xA4, /* 0x0a SiS_PALMPhase2 */
144 0x21,0xF6,0x94,0x46, /* 0x0b SiS_PALNPhase2 */
145 0x1E,0x8B,0xA2,0xA7,
146 0x1E,0x83,0x0A,0xE0, /* 0x0d SiS_SpecialPhaseM */
147 0x00,0x00,0x00,0x00,
148 0x00,0x00,0x00,0x00,
149 0x1e,0x8c,0x5c,0x7a, /* 0x10 SiS_SpecialPhase */
150 0x25,0xd4,0xfd,0x5e /* 0x11 SiS_SpecialPhaseJ */
151};
152
153static const unsigned char SiS_HiTVGroup3_1[] = {
127 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13, 154 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x13,
128 0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6, 155 0xb1, 0x41, 0x62, 0x62, 0xff, 0xf4, 0x45, 0xa6,
129 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20, 156 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
@@ -134,7 +161,7 @@ static const UCHAR SiS_HiTVGroup3_1[] = {
134 0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01 161 0x1a, 0x1f, 0x25, 0x2a, 0x4c, 0xaa, 0x01
135}; 162};
136 163
137static const UCHAR SiS_HiTVGroup3_2[] = { 164static const unsigned char SiS_HiTVGroup3_2[] = {
138 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a, 165 0x00, 0x14, 0x15, 0x25, 0x55, 0x15, 0x0b, 0x7a,
139 0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6, 166 0x54, 0x41, 0xe7, 0xe7, 0xff, 0xf4, 0x45, 0xa6,
140 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20, 167 0x25, 0x2f, 0x67, 0xf6, 0xbf, 0xff, 0x8e, 0x20,
@@ -147,7 +174,7 @@ static const UCHAR SiS_HiTVGroup3_2[] = {
147 174
148/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */ 175/* 301C / 302ELV extended Part2 TV registers (4 tap scaler) */
149 176
150static const UCHAR SiS_Part2CLVX_1[] = { 177static const unsigned char SiS_Part2CLVX_1[] = {
151 0x00,0x00, 178 0x00,0x00,
152 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, 179 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
153 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, 180 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
@@ -155,7 +182,7 @@ static const UCHAR SiS_Part2CLVX_1[] = {
155 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E 182 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
156}; 183};
157 184
158static const UCHAR SiS_Part2CLVX_2[] = { 185static const unsigned char SiS_Part2CLVX_2[] = {
159 0x00,0x00, 186 0x00,0x00,
160 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E, 187 0x00,0x20,0x00,0x00,0x7F,0x20,0x02,0x7F,0x7D,0x20,0x04,0x7F,0x7D,0x1F,0x06,0x7E,
161 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C, 188 0x7C,0x1D,0x09,0x7E,0x7C,0x1B,0x0B,0x7E,0x7C,0x19,0x0E,0x7D,0x7C,0x17,0x11,0x7C,
@@ -163,7 +190,7 @@ static const UCHAR SiS_Part2CLVX_2[] = {
163 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E 190 0x7E,0x09,0x1D,0x7C,0x7F,0x06,0x1F,0x7C,0x7F,0x04,0x20,0x7D,0x00,0x02,0x20,0x7E
164}; 191};
165 192
166static const UCHAR SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */ 193static const unsigned char SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
167 0xE0,0x01, 194 0xE0,0x01,
168 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D, 195 0x04,0x1A,0x04,0x7E,0x03,0x1A,0x06,0x7D,0x01,0x1A,0x08,0x7D,0x00,0x19,0x0A,0x7D,
169 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C, 196 0x7F,0x19,0x0C,0x7C,0x7E,0x18,0x0E,0x7C,0x7E,0x17,0x10,0x7B,0x7D,0x15,0x12,0x7C,
@@ -182,7 +209,7 @@ static const UCHAR SiS_Part2CLVX_3[] = { /* NTSC, 525i, 525p */
182 0xFF,0xFF 209 0xFF,0xFF
183}; 210};
184 211
185static const UCHAR SiS_Part2CLVX_4[] = { /* PAL */ 212static const unsigned char SiS_Part2CLVX_4[] = { /* PAL */
186 0x58,0x02, 213 0x58,0x02,
187 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, 214 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
188 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, 215 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
@@ -201,7 +228,7 @@ static const UCHAR SiS_Part2CLVX_4[] = { /* PAL */
201 0xFF,0xFF 228 0xFF,0xFF
202}; 229};
203 230
204static const UCHAR SiS_Part2CLVX_5[] = { /* 750p */ 231static const unsigned char SiS_Part2CLVX_5[] = { /* 750p */
205 0x00,0x03, 232 0x00,0x03,
206 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D, 233 0x05,0x19,0x05,0x7D,0x03,0x19,0x06,0x7E,0x02,0x19,0x08,0x7D,0x01,0x18,0x0A,0x7D,
207 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D, 234 0x00,0x18,0x0C,0x7C,0x7F,0x17,0x0E,0x7C,0x7E,0x16,0x0F,0x7D,0x7E,0x14,0x11,0x7D,
@@ -210,7 +237,7 @@ static const UCHAR SiS_Part2CLVX_5[] = { /* 750p */
210 0xFF,0xFF 237 0xFF,0xFF
211}; 238};
212 239
213static const UCHAR SiS_Part2CLVX_6[] = { /* 1080i */ 240static const unsigned char SiS_Part2CLVX_6[] = { /* 1080i */
214 0x00,0x04, 241 0x00,0x04,
215 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D, 242 0x04,0x1A,0x04,0x7E,0x02,0x1B,0x05,0x7E,0x01,0x1A,0x07,0x7E,0x00,0x1A,0x09,0x7D,
216 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C, 243 0x7F,0x19,0x0B,0x7D,0x7E,0x18,0x0D,0x7D,0x7D,0x17,0x10,0x7C,0x7D,0x15,0x12,0x7C,
@@ -221,7 +248,7 @@ static const UCHAR SiS_Part2CLVX_6[] = { /* 1080i */
221 248
222#ifdef SIS315H 249#ifdef SIS315H
223/* 661 et al LCD data structure (2.03.00) */ 250/* 661 et al LCD data structure (2.03.00) */
224static const UCHAR SiS_LCDStruct661[] = { 251static const unsigned char SiS_LCDStruct661[] = {
225 /* 1024x768 */ 252 /* 1024x768 */
226/* type|CR37| HDE | VDE | HT | VT | hss | hse */ 253/* type|CR37| HDE | VDE | HT | VT | hss | hse */
227 0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88, 254 0x02,0xC0,0x00,0x04,0x00,0x03,0x40,0x05,0x26,0x03,0x10,0x00,0x88,
@@ -249,11 +276,20 @@ static const UCHAR SiS_LCDStruct661[] = {
249 /* 1680x1050 */ 276 /* 1680x1050 */
250 0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C, 277 0x0D,0xE0,0x90,0x06,0x1A,0x04,0x6C,0x07,0x2A,0x04,0x1A,0x00,0x4C,
251 0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06, 278 0x00,0x03,0x00,0x06,0x00,0x79,0xBE,0x44,0x00,0x00,0x00,0x00,0x06,
279 /* 1280x800_3 */
280 0x0C,0xE0,0x00,0x05,0x20,0x03,0xAA,0x05,0x2E,0x03,0x30,0x00,0x50,
281 0x00,0x04,0x00,0x03,0x00,0x47,0xA9,0x10,0x00,0x00,0x00,0x00,0x07,
282 /* 800x600 */
283 0x01,0xC0,0x20,0x03,0x58,0x02,0x20,0x04,0x74,0x02,0x2A,0x00,0x80,
284 0x00,0x06,0x00,0x04,0x00,0x28,0x63,0x4B,0x00,0x00,0x00,0x00,0x00,
285 /* 1280x854 */
286 0x08,0xE0,0x00,0x05,0x56,0x03,0x80,0x06,0x5d,0x03,0x10,0x00,0x70,
287 0x00,0x01,0x00,0x03,0x00,0x54,0x75,0x13,0x00,0x00,0x00,0x00,0x08
252}; 288};
253#endif 289#endif
254 290
255#ifdef SIS300 291#ifdef SIS300
256static UCHAR SiS300_TrumpionData[7][80] = { 292static unsigned char SiS300_TrumpionData[14][80] = {
257 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02, 293 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x0D,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
258 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23, 294 0x20,0x03,0x0B,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x10,0x00,0x00,0x04,0x23,
259 0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23, 295 0x00,0x00,0x03,0x28,0x03,0x10,0x05,0x08,0x40,0x10,0x00,0x10,0x04,0x23,0x00,0x23,
@@ -288,119 +324,182 @@ static UCHAR SiS300_TrumpionData[7][80] = {
288 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23, 324 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
289 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23, 325 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
290 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01, 326 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
291 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 } 327 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x5B,0x01,0xBE,0x01,0x00 },
328 /* variant 2 */
329 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
330 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
331 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
332 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
333 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
334 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
335 0x20,0x03,0x15,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x18,0x00,0x00,0x04,0x23,
336 0x00,0x01,0x03,0x44,0x03,0x28,0x06,0x08,0x40,0x18,0x00,0x18,0x04,0x23,0x00,0x23,
337 0x03,0x11,0x60,0xA6,0x01,0xFF,0x03,0xFF,0x19,0x01,0x00,0x05,0x13,0x04,0x04,0x05,
338 0x04,0x0C,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
339 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x8A,0x00,0xD8,0x02,
340 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
341 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
342 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
343 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
344 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x72,0x00,0xD8,0x02,
345 0x84,0x03,0x16,0x00,0x90,0x01,0xC1,0x01,0x60,0x0C,0x30,0x1C,0x00,0x20,0x04,0x23,
346 0x00,0x01,0x03,0x53,0x03,0x28,0x06,0x08,0x40,0x1C,0x00,0x16,0x04,0x23,0x00,0x23,
347 0x03,0x11,0x60,0xDA,0x01,0xFF,0x0F,0xF4,0x18,0x07,0x05,0x05,0x13,0x04,0x04,0x05,
348 0x01,0x0B,0x13,0x0A,0x02,0xB0,0x00,0x00,0x02,0xBA,0xF0,0x55,0x01,0xBE,0x01,0x00 },
349 { 0x02,0x0A,0x02,0x00,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0x7F,0x00,0x80,0x02,
350 0x20,0x03,0x16,0x00,0xE0,0x01,0x0D,0x02,0x60,0x0C,0x30,0x98,0x00,0x00,0x04,0x23,
351 0x00,0x01,0x03,0x45,0x03,0x48,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x23,0x00,0x23,
352 0x03,0x11,0x60,0xF4,0x01,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x05,0x01,0x00,0x05,0x05,
353 0x04,0x0C,0x08,0x05,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
354 { 0x02,0x0A,0x02,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xBF,0x00,0x20,0x03,
355 0x20,0x04,0x0D,0x00,0x58,0x02,0x71,0x02,0x80,0x0C,0x30,0x9A,0x00,0xFA,0x03,0x1D,
356 0x00,0x01,0x03,0x22,0x03,0x28,0x06,0x08,0x40,0x98,0x00,0x98,0x04,0x1D,0x00,0x1D,
357 0x03,0x11,0x60,0x39,0x03,0x40,0x05,0xF4,0x18,0x07,0x02,0x06,0x04,0x01,0x06,0x0B,
358 0x02,0x0A,0x20,0x19,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 },
359 { 0x02,0x0A,0x0A,0x01,0x04,0x01,0x00,0x03,0x11,0x00,0x0D,0x10,0xEF,0x00,0x00,0x04,
360 0x40,0x05,0x13,0x00,0x00,0x03,0x26,0x03,0x88,0x0C,0x30,0x90,0x00,0x00,0x04,0x23,
361 0x00,0x01,0x03,0x24,0x03,0x28,0x06,0x08,0x40,0x90,0x00,0x90,0x04,0x23,0x00,0x23,
362 0x03,0x11,0x60,0x40,0x05,0xFF,0x0F,0xF4,0x18,0x01,0x00,0x08,0x01,0x00,0x08,0x01,
363 0x00,0x08,0x01,0x01,0x02,0xB0,0x00,0x00,0x02,0xBA,0xEA,0x58,0x01,0xBE,0x01,0x00 }
292}; 364};
293#endif 365#endif
294 366
295void SiS_UnLockCRT2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 367void SiS_UnLockCRT2(struct SiS_Private *SiS_Pr);
296void SiS_EnableCRT2(SiS_Private *SiS_Pr); 368#ifndef SIS_LINUX_KERNEL
297USHORT SiS_GetRatePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo); 369void SiS_LockCRT2(struct SiS_Private *SiS_Pr);
298void SiS_WaitRetrace1(SiS_Private *SiS_Pr); 370#endif
299BOOLEAN SiS_IsDualEdge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 371void SiS_EnableCRT2(struct SiS_Private *SiS_Pr);
300BOOLEAN SiS_IsVAMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 372unsigned short SiS_GetRatePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
301void SiS_SetChrontelGPIO(SiS_Private *SiS_Pr, USHORT myvbinfo); 373void SiS_WaitRetrace1(struct SiS_Private *SiS_Pr);
302void SiS_GetVBInfo(SiS_Private *SiS_Pr, USHORT ModeNo, 374BOOLEAN SiS_IsDualEdge(struct SiS_Private *SiS_Pr);
303 USHORT ModeIdIndex, PSIS_HW_INFO HwInfo, 375BOOLEAN SiS_IsVAMode(struct SiS_Private *SiS_Pr);
304 int checkcrt2mode); 376void SiS_GetVBInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
305void SiS_SetYPbPr(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 377 unsigned short ModeIdIndex, int checkcrt2mode);
306void SiS_SetTVMode(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo); 378void SiS_SetYPbPr(struct SiS_Private *SiS_Pr);
307void SiS_GetLCDResInfo(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, PSIS_HW_INFO HwInfo); 379void SiS_SetTVMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
308USHORT SiS_GetVCLK2Ptr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex, 380 unsigned short ModeIdIndex);
309 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo); 381void SiS_GetLCDResInfo(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
310USHORT SiS_GetResInfo(SiS_Private *SiS_Pr,USHORT ModeNo,USHORT ModeIdIndex); 382 unsigned short ModeIdIndex);
311void SiS_DisableBridge(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 383unsigned short SiS_GetVCLK2Ptr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
312BOOLEAN SiS_SetCRT2Group(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, USHORT ModeNo); 384 unsigned short RefreshRateTableIndex);
313void SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 385unsigned short SiS_GetResInfo(struct SiS_Private *SiS_Pr,unsigned short ModeNo,unsigned short ModeIdIndex);
314void SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 386void SiS_DisableBridge(struct SiS_Private *SiS_Pr);
387#ifndef SIS_LINUX_KERNEL
388void SiS_EnableBridge(struct SiS_Private *SiS_Pr);
389#endif
390BOOLEAN SiS_SetCRT2Group(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
391void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr);
392void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr);
315 393
316void SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempax); 394void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
317USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempax); 395unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short tempax);
318void SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempax); 396void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
319USHORT SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempax); 397unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short tempax);
320void SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh); 398#ifndef SIS_LINUX_KERNEL
399void SiS_SetCH70xx(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
400unsigned short SiS_GetCH70xx(struct SiS_Private *SiS_Pr, unsigned short tempax);
401#endif
402void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
403 unsigned char orval,unsigned short andval);
321#ifdef SIS315H 404#ifdef SIS315H
322static void SiS_Chrontel701xOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 405static void SiS_Chrontel701xOn(struct SiS_Private *SiS_Pr);
323static void SiS_Chrontel701xOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 406static void SiS_Chrontel701xOff(struct SiS_Private *SiS_Pr);
324static void SiS_ChrontelInitTVVSync(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 407static void SiS_ChrontelInitTVVSync(struct SiS_Private *SiS_Pr);
325static void SiS_ChrontelDoSomething1(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 408static void SiS_ChrontelDoSomething1(struct SiS_Private *SiS_Pr);
326void SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 409void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
327void SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr); 410void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
328#endif /* 315 */ 411#endif /* 315 */
329 412
330#ifdef SIS300 413#ifdef SIS300
331#if 0 414static BOOLEAN SiS_SetTrumpionBlock(struct SiS_Private *SiS_Pr, unsigned char *dataptr);
332static void SiS_SetTrumpReg(SiS_Private *SiS_Pr, USHORT tempbx); 415void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
333static USHORT SiS_GetTrumpReg(SiS_Private *SiS_Pr, USHORT tempbx);
334#endif
335static BOOLEAN SiS_SetTrumpionBlock(SiS_Private *SiS_Pr, UCHAR *dataptr);
336#endif 416#endif
337 417
338void SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime); 418void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime);
339USHORT SiS_ReadDDC1Bit(SiS_Private *SiS_Pr); 419unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr);
340USHORT SiS_HandleDDC(SiS_Private *SiS_Pr, ULONG VBFlags, int VGAEngine, 420unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
341 USHORT adaptnum, USHORT DDCdatatype, UCHAR *buffer); 421 unsigned short adaptnum, unsigned short DDCdatatype,
342#ifdef LINUX_XF86 422 unsigned char *buffer, unsigned int VBFlags2);
343USHORT SiS_SenseLCDDDC(SiS_Private *SiS_Pr, SISPtr pSiS);
344USHORT SiS_SenseVGA2DDC(SiS_Private *SiS_Pr, SISPtr pSiS);
345#endif
346 423
347static void SiS_SetSwitchDDC2(SiS_Private *SiS_Pr); 424#ifdef SIS_XORG_XF86
348static USHORT SiS_SetStart(SiS_Private *SiS_Pr); 425unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags,
349static USHORT SiS_SetStop(SiS_Private *SiS_Pr); 426 int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype,
350static USHORT SiS_SetSCLKLow(SiS_Private *SiS_Pr); 427 BOOLEAN checkcr32, unsigned int VBFlags2);
351static USHORT SiS_SetSCLKHigh(SiS_Private *SiS_Pr); 428unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr);
352static USHORT SiS_ReadDDC2Data(SiS_Private *SiS_Pr, USHORT tempax); 429unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype,
353static USHORT SiS_WriteDDC2Data(SiS_Private *SiS_Pr, USHORT tempax); 430 unsigned char *buffer);
354static USHORT SiS_CheckACK(SiS_Private *SiS_Pr); 431#else
355static USHORT SiS_InitDDCRegs(SiS_Private *SiS_Pr, ULONG VBFlags, int VGAEngine, 432static unsigned short SiS_InitDDCRegs(struct SiS_Private *SiS_Pr, unsigned int VBFlags,
356 USHORT adaptnum, USHORT DDCdatatype, BOOLEAN checkcr32); 433 int VGAEngine, unsigned short adaptnum, unsigned short DDCdatatype,
357static USHORT SiS_WriteDABDDC(SiS_Private *SiS_Pr); 434 BOOLEAN checkcr32, unsigned int VBFlags2);
358static USHORT SiS_PrepareReadDDC(SiS_Private *SiS_Pr); 435static unsigned short SiS_ProbeDDC(struct SiS_Private *SiS_Pr);
359static USHORT SiS_PrepareDDC(SiS_Private *SiS_Pr); 436static unsigned short SiS_ReadDDC(struct SiS_Private *SiS_Pr, unsigned short DDCdatatype,
360static void SiS_SendACK(SiS_Private *SiS_Pr, USHORT yesno); 437 unsigned char *buffer);
361static USHORT SiS_DoProbeDDC(SiS_Private *SiS_Pr); 438#endif
362static USHORT SiS_ProbeDDC(SiS_Private *SiS_Pr); 439static void SiS_SetSwitchDDC2(struct SiS_Private *SiS_Pr);
363static USHORT SiS_ReadDDC(SiS_Private *SiS_Pr, USHORT DDCdatatype, UCHAR *buffer); 440static unsigned short SiS_SetStart(struct SiS_Private *SiS_Pr);
441static unsigned short SiS_SetStop(struct SiS_Private *SiS_Pr);
442static unsigned short SiS_SetSCLKLow(struct SiS_Private *SiS_Pr);
443static unsigned short SiS_SetSCLKHigh(struct SiS_Private *SiS_Pr);
444static unsigned short SiS_ReadDDC2Data(struct SiS_Private *SiS_Pr);
445static unsigned short SiS_WriteDDC2Data(struct SiS_Private *SiS_Pr, unsigned short tempax);
446static unsigned short SiS_CheckACK(struct SiS_Private *SiS_Pr);
447static unsigned short SiS_WriteDABDDC(struct SiS_Private *SiS_Pr);
448static unsigned short SiS_PrepareReadDDC(struct SiS_Private *SiS_Pr);
449static unsigned short SiS_PrepareDDC(struct SiS_Private *SiS_Pr);
450static void SiS_SendACK(struct SiS_Private *SiS_Pr, unsigned short yesno);
451static unsigned short SiS_DoProbeDDC(struct SiS_Private *SiS_Pr);
364 452
453#ifdef SIS300
454static void SiS_OEM300Setting(struct SiS_Private *SiS_Pr,
455 unsigned short ModeNo, unsigned short ModeIdIndex, unsigned short RefTabindex);
456static void SetOEMLCDData2(struct SiS_Private *SiS_Pr,
457 unsigned short ModeNo, unsigned short ModeIdIndex,unsigned short RefTableIndex);
458#endif
365#ifdef SIS315H 459#ifdef SIS315H
366static void SiS_OEM310Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 460static void SiS_OEM310Setting(struct SiS_Private *SiS_Pr,
367 USHORT ModeNo,USHORT ModeIdIndex, USHORT RRTI); 461 unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
368static void SiS_OEM661Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 462static void SiS_OEM661Setting(struct SiS_Private *SiS_Pr,
369 USHORT ModeNo,USHORT ModeIdIndex, USHORT RRTI); 463 unsigned short ModeNo,unsigned short ModeIdIndex, unsigned short RRTI);
370static void SiS_FinalizeLCD(SiS_Private *, USHORT, USHORT, PSIS_HW_INFO); 464static void SiS_FinalizeLCD(struct SiS_Private *, unsigned short, unsigned short);
371#endif 465#endif
466
467extern void SiS_SetReg(SISIOADDRESS, unsigned short, unsigned short);
468extern void SiS_SetRegByte(SISIOADDRESS, unsigned short);
469extern void SiS_SetRegShort(SISIOADDRESS, unsigned short);
470extern void SiS_SetRegLong(SISIOADDRESS, unsigned int);
471extern unsigned char SiS_GetReg(SISIOADDRESS, unsigned short);
472extern unsigned char SiS_GetRegByte(SISIOADDRESS);
473extern unsigned short SiS_GetRegShort(SISIOADDRESS);
474extern unsigned int SiS_GetRegLong(SISIOADDRESS);
475extern void SiS_SetRegANDOR(SISIOADDRESS, unsigned short, unsigned short, unsigned short);
476extern void SiS_SetRegOR(SISIOADDRESS, unsigned short, unsigned short);
477extern void SiS_SetRegAND(SISIOADDRESS, unsigned short, unsigned short);
478extern void SiS_DisplayOff(struct SiS_Private *SiS_Pr);
479extern void SiS_DisplayOn(struct SiS_Private *SiS_Pr);
480extern BOOLEAN SiS_SearchModeID(struct SiS_Private *, unsigned short *, unsigned short *);
481extern unsigned short SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
482 unsigned short ModeIdIndex);
483extern unsigned short SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
484extern unsigned short SiS_GetColorDepth(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex);
485extern unsigned short SiS_GetOffset(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex,
486 unsigned short RefreshRateTableIndex);
487extern void SiS_LoadDAC(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
488 unsigned short ModeIdIndex);
489extern void SiS_CalcLCDACRT1Timing(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
490 unsigned short ModeIdIndex);
491extern void SiS_CalcCRRegisters(struct SiS_Private *SiS_Pr, int depth);
492extern unsigned short SiS_GetRefCRTVCLK(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
493extern unsigned short SiS_GetRefCRT1CRTC(struct SiS_Private *SiS_Pr, unsigned short Index, int UseWide);
372#ifdef SIS300 494#ifdef SIS300
373static void SiS_OEM300Setting(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 495extern void SiS_GetFIFOThresholdIndex300(struct SiS_Private *SiS_Pr, unsigned short *tempbx,
374 USHORT ModeNo, USHORT ModeIdIndex, USHORT RefTabindex); 496 unsigned short *tempcl);
375static void SetOEMLCDData2(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo, 497extern unsigned short SiS_GetFIFOThresholdB300(unsigned short tempbx, unsigned short tempcl);
376 USHORT ModeNo, USHORT ModeIdIndex,USHORT RefTableIndex); 498extern unsigned short SiS_GetLatencyFactor630(struct SiS_Private *SiS_Pr, unsigned short index);
499#ifdef SIS_LINUX_KERNEL
500extern unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
501extern unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
377#endif 502#endif
378
379extern void SiS_SetReg(SISIOADDRESS, USHORT, USHORT);
380extern void SiS_SetRegByte(SISIOADDRESS, USHORT);
381extern void SiS_SetRegShort(SISIOADDRESS, USHORT);
382extern void SiS_SetRegLong(SISIOADDRESS, ULONG);
383extern UCHAR SiS_GetReg(SISIOADDRESS, USHORT);
384extern UCHAR SiS_GetRegByte(SISIOADDRESS);
385extern USHORT SiS_GetRegShort(SISIOADDRESS);
386extern ULONG SiS_GetRegLong(SISIOADDRESS);
387extern void SiS_SetRegANDOR(SISIOADDRESS, USHORT, USHORT, USHORT);
388extern void SiS_SetRegOR(SISIOADDRESS, USHORT, USHORT);
389extern void SiS_SetRegAND(SISIOADDRESS, USHORT, USHORT);
390extern void SiS_DisplayOff(SiS_Private *SiS_Pr);
391extern void SiS_DisplayOn(SiS_Private *SiS_Pr);
392extern BOOLEAN SiS_SearchModeID(SiS_Private *, USHORT *, USHORT *);
393extern UCHAR SiS_GetModePtr(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
394extern USHORT SiS_GetColorDepth(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
395extern USHORT SiS_GetOffset(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex,
396 USHORT RefreshRateTableIndex, PSIS_HW_INFO HwInfo);
397extern void SiS_LoadDAC(SiS_Private *SiS_Pr, PSIS_HW_INFO, USHORT ModeNo,
398 USHORT ModeIdIndex);
399extern void SiS_CalcLCDACRT1Timing(SiS_Private *SiS_Pr, USHORT ModeNo, USHORT ModeIdIndex);
400#ifdef LINUX_XF86
401extern void SiS_MakeClockRegs(ScrnInfoPtr pScrn, int clock, UCHAR *p2b, UCHAR *p2c);
402extern int SiS_FindPanelFromDB(SISPtr pSiS, USHORT panelvendor, USHORT panelproduct,
403 int *maxx, int *maxy, int *prefx, int *prefy);
404#endif 503#endif
405 504
406#endif 505#endif
diff --git a/drivers/video/sis/initdef.h b/drivers/video/sis/initdef.h
index 55a82d6dc4cf..264b55a5947b 100644
--- a/drivers/video/sis/initdef.h
+++ b/drivers/video/sis/initdef.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * Global definitions for init.c and init301.c 4 * Global definitions for init.c and init301.c
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -53,19 +53,20 @@
53#ifndef _INITDEF_ 53#ifndef _INITDEF_
54#define _INITDEF_ 54#define _INITDEF_
55 55
56#define IS_SIS330 (HwInfo->jChipType == SIS_330) 56#define IS_SIS330 (SiS_Pr->ChipType == SIS_330)
57#define IS_SIS550 (HwInfo->jChipType == SIS_550) 57#define IS_SIS550 (SiS_Pr->ChipType == SIS_550)
58#define IS_SIS650 (HwInfo->jChipType == SIS_650) /* All versions, incl 651, M65x */ 58#define IS_SIS650 (SiS_Pr->ChipType == SIS_650) /* All versions, incl 651, M65x */
59#define IS_SIS740 (HwInfo->jChipType == SIS_740) 59#define IS_SIS740 (SiS_Pr->ChipType == SIS_740)
60#define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652)) 60#define IS_SIS651 (SiS_Pr->SiS_SysFlags & (SF_Is651 | SF_Is652))
61#define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653)) 61#define IS_SISM650 (SiS_Pr->SiS_SysFlags & (SF_IsM650 | SF_IsM652 | SF_IsM653))
62#define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */ 62#define IS_SIS65x (IS_SIS651 || IS_SISM650) /* Only special versions of 65x */
63#define IS_SIS661 (HwInfo->jChipType == SIS_661) 63#define IS_SIS661 (SiS_Pr->ChipType == SIS_661)
64#define IS_SIS741 (HwInfo->jChipType == SIS_741) 64#define IS_SIS741 (SiS_Pr->ChipType == SIS_741)
65#define IS_SIS660 (HwInfo->jChipType == SIS_660) 65#define IS_SIS660 (SiS_Pr->ChipType == SIS_660)
66#define IS_SIS760 (HwInfo->jChipType == SIS_760) 66#define IS_SIS760 (SiS_Pr->ChipType == SIS_760)
67#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760) 67#define IS_SIS761 (SiS_Pr->ChipType == SIS_761)
68#define IS_SIS650740 ((HwInfo->jChipType >= SIS_650) && (HwInfo->jChipType < SIS_330)) 68#define IS_SIS661741660760 (IS_SIS661 || IS_SIS741 || IS_SIS660 || IS_SIS760 || IS_SIS761)
69#define IS_SIS650740 ((SiS_Pr->ChipType >= SIS_650) && (SiS_Pr->ChipType < SIS_330))
69#define IS_SIS550650740 (IS_SIS550 || IS_SIS650740) 70#define IS_SIS550650740 (IS_SIS550 || IS_SIS650740)
70#define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760) 71#define IS_SIS650740660 (IS_SIS650 || IS_SIS740 || IS_SIS661741660760)
71#define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660) 72#define IS_SIS550650740660 (IS_SIS550 || IS_SIS650740660)
@@ -73,24 +74,37 @@
73#define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8)) 74#define SISGETROMW(x) (ROMAddr[(x)] | (ROMAddr[(x)+1] << 8))
74 75
75/* SiS_VBType */ 76/* SiS_VBType */
76#define VB_SIS301 0x0001 77#define VB_SIS301 0x0001
77#define VB_SIS301B 0x0002 78#define VB_SIS301B 0x0002
78#define VB_SIS302B 0x0004 79#define VB_SIS302B 0x0004
79#define VB_SIS301LV 0x0008 80#define VB_SIS301LV 0x0008
80#define VB_SIS302LV 0x0010 81#define VB_SIS302LV 0x0010
81#define VB_SIS302ELV 0x0020 82#define VB_SIS302ELV 0x0020
82#define VB_SIS301C 0x0040 83#define VB_SIS301C 0x0040
84#define VB_SIS307T 0x0080
85#define VB_SIS307LV 0x0100
83#define VB_UMC 0x4000 86#define VB_UMC 0x4000
84#define VB_NoLCD 0x8000 87#define VB_NoLCD 0x8000
85#define VB_SIS301BLV302BLV (VB_SIS301B|VB_SIS301C|VB_SIS302B|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV) 88#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
86#define VB_SIS301B302B (VB_SIS301B|VB_SIS301C|VB_SIS302B) 89#define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
87#define VB_SIS301LV302LV (VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV) 90#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
88#define VB_SISVB (VB_SIS301 | VB_SIS301BLV302BLV) 91#define VB_SISLVDS (VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
89#define VB_SISTMDS (VB_SIS301 | VB_SIS301B302B) 92#define VB_SIS30xBLV (VB_SIS30xB | VB_SISLVDS)
90#define VB_SISLVDS VB_SIS301LV302LV 93#define VB_SIS30xCLV (VB_SIS30xC | VB_SIS302ELV | VB_SIS307LV)
91#define VB_SISLCDA (VB_SIS302B|VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV) 94#define VB_SISVB (VB_SIS301 | VB_SIS30xBLV)
92#define VB_SISYPBPR (VB_SIS301C|VB_SIS301LV|VB_SIS302LV|VB_SIS302ELV) 95#define VB_SISLCDA (VB_SIS302B | VB_SIS301C | VB_SIS307T | VB_SISLVDS)
93#define VB_SISHIVISION (VB_SIS301|VB_SIS301B|VB_SIS302B) 96#define VB_SISTMDSLCDA (VB_SIS301C | VB_SIS307T)
97#define VB_SISPART4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
98#define VB_SISHIVISION (VB_SIS301 | VB_SIS301B | VB_SIS302B)
99#define VB_SISYPBPR (VB_SIS301C | VB_SIS307T | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
100#define VB_SISTAP4SCALER (VB_SIS301C | VB_SIS307T | VB_SIS302ELV | VB_SIS307LV)
101#define VB_SISPART4OVERFLOW (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
102#define VB_SISPWD (VB_SIS301C | VB_SIS307T | VB_SISLVDS)
103#define VB_SISEMI (VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
104#define VB_SISPOWER (VB_SIS301C | VB_SIS307T | VB_SIS302LV | VB_SIS302ELV | VB_SIS307LV)
105#define VB_SISDUALLINK (VB_SIS302LV | VB_SIS302ELV | VB_SIS307T | VB_SIS307LV)
106#define VB_SISVGA2 VB_SISTMDS
107#define VB_SISRAMDAC202 (VB_SIS301C | VB_SIS307T)
94 108
95/* VBInfo */ 109/* VBInfo */
96#define SetSimuScanMode 0x0001 /* CR 30 */ 110#define SetSimuScanMode 0x0001 /* CR 30 */
@@ -160,6 +174,7 @@
160#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */ 174#define SupportRAMDAC2_202 0x0400 /* C (<= 202Mhz) */
161#define InterlaceMode 0x0080 175#define InterlaceMode 0x0080
162#define SyncPP 0x0000 176#define SyncPP 0x0000
177#define HaveWideTiming 0x2000 /* Have specific wide- and non-wide timing */
163#define SyncPN 0x4000 178#define SyncPN 0x4000
164#define SyncNP 0x8000 179#define SyncNP 0x8000
165#define SyncNN 0xc000 180#define SyncNN 0xc000
@@ -188,6 +203,7 @@
188#define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */ 203#define TVSetTVSimuMode 0x0200 /* new 0x200, prev. 0x800 */
189#define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */ 204#define TVRPLLDIV2XO 0x0400 /* prev 0x1000 */
190#define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */ 205#define TVSetNTSC1024 0x0800 /* new 0x100, prev. 0x2000 */
206#define TVSet525p1024 0x1000 /* TW */
191#define TVAspect43 0x2000 207#define TVAspect43 0x2000
192#define TVAspect169 0x4000 208#define TVAspect169 0x4000
193#define TVAspect43LB 0x8000 209#define TVAspect43LB 0x8000
@@ -208,7 +224,8 @@
208#define SF_IsM661 0x0020 224#define SF_IsM661 0x0020
209#define SF_IsM741 0x0040 225#define SF_IsM741 0x0040
210#define SF_IsM760 0x0080 226#define SF_IsM760 0x0080
211#define SF_760LFB 0x8000 /* 760: We have LFB */ 227#define SF_760UMA 0x4000 /* 76x: We have UMA */
228#define SF_760LFB 0x8000 /* 76x: We have LFB */
212 229
213/* CR32 (Newer 630, and 315 series) 230/* CR32 (Newer 630, and 315 series)
214 231
@@ -228,25 +245,19 @@
228#define TVOverScanShift 4 245#define TVOverScanShift 4
229 246
230/* CR35 (661 series only) 247/* CR35 (661 series only)
231
232 [0] 1 = PAL, 0 = NTSC 248 [0] 1 = PAL, 0 = NTSC
233 [1] 1 = NTSC-J (if D0 = 0) 249 [1] 1 = NTSC-J (if D0 = 0)
234 [2] 1 = PALM (if D0 = 1) 250 [2] 1 = PALM (if D0 = 1)
235 [3] 1 = PALN (if D0 = 1) 251 [3] 1 = PALN (if D0 = 1)
236 [4] 1 = Overscan (Chrontel only) 252 [4] 1 = Overscan (Chrontel only)
237 [7:5] (only if D2 in CR38 is set) 253 [7:5] (only if D2 in CR38 is set)
238 000 525i 254 000 525i
239 001 525p 255 001 525p
240 010 750p 256 010 750p
241 011 1080i (or HiVision on 301, 301B) 257 011 1080i (or HiVision on 301, 301B)
242
243 These bits are being translated to TVMode flag.
244
245*/ 258*/
246 259
247/* 260/* CR37
248 CR37
249
250 [0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS) 261 [0] Set 24/18 bit (0/1) RGB to LVDS/TMDS transmitter (set by BIOS)
251 [3:1] External chip 262 [3:1] External chip
252 300 series: 263 300 series:
@@ -260,7 +271,7 @@
260 010 LVDS 271 010 LVDS
261 011 LVDS + Chrontel 7019 272 011 LVDS + Chrontel 7019
262 660 series [2:1] only: 273 660 series [2:1] only:
263 reserved (now in CR38) 274 reserved (chip type now in CR38)
264 All other combinations reserved 275 All other combinations reserved
265 [3] 661 only: Pass 1:1 data 276 [3] 661 only: Pass 1:1 data
266 [4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand 277 [4] LVDS: 0: Panel Link expands / 1: Panel Link does not expand
@@ -320,6 +331,7 @@
320#define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */ 331#define Enable302LV_DualLink 0x04 /* 302LV only; enable dual link */
321 332
322/* CR39 (661 and later) 333/* CR39 (661 and later)
334 D[7] LVDS (SiS or third party)
323 D[1:0] YPbPr Aspect Ratio 335 D[1:0] YPbPr Aspect Ratio
324 00 4:3 letterbox 336 00 4:3 letterbox
325 01 4:3 337 01 4:3
@@ -341,7 +353,7 @@
341 0101 Set Contrast event 353 0101 Set Contrast event
342 0110 Set Mute event 354 0110 Set Mute event
343 0111 Set Volume Up/Down event 355 0111 Set Volume Up/Down event
344 [4] Enable Backlight Control by BIOS/driver 356 [4] Enable Backlight Control by BIOS/driver
345 (set by driver; set means that the BIOS should 357 (set by driver; set means that the BIOS should
346 not touch the backlight registers because eg. 358 not touch the backlight registers because eg.
347 the driver already switched off the backlight) 359 the driver already switched off the backlight)
@@ -350,6 +362,26 @@
350 [7] TV UnderScan/OverScan (set by BIOS) 362 [7] TV UnderScan/OverScan (set by BIOS)
351*/ 363*/
352 364
365/* CR7C - 661 and later
366 [7] DualEdge enabled (or: to be enabled)
367 [6] CRT2 = TV/LCD/VGA enabled (or: to be enabled)
368 [5] Init done (set at end of SiS_Init)
369 {4] LVDS LCD capabilities
370 [3] LVDS LCD capabilities
371 [2] LVDS LCD capabilities (PWD)
372 [1] LVDS LCD capabilities (PWD)
373 [0] LVDS=1, TMDS=0 (SiS or third party)
374*/
375
376/* CR7E - 661 and later
377 VBType:
378 [7] LVDS (third party)
379 [3] 301C
380 [2] 302LV
381 [1] 301LV
382 [0] 301B
383*/
384
353/* LCDResInfo */ 385/* LCDResInfo */
354#define Panel300_800x600 0x01 /* CR36 */ 386#define Panel300_800x600 0x01 /* CR36 */
355#define Panel300_1024x768 0x02 387#define Panel300_1024x768 0x02
@@ -359,7 +391,6 @@
359#define Panel300_1024x600 0x06 391#define Panel300_1024x600 0x06
360#define Panel300_1152x768 0x07 392#define Panel300_1152x768 0x07
361#define Panel300_1280x768 0x0a 393#define Panel300_1280x768 0x0a
362#define Panel300_320x480 0x0e /* fstn - This is fake, can be any */
363#define Panel300_Custom 0x0f 394#define Panel300_Custom 0x0f
364#define Panel300_Barco1366 0x10 395#define Panel300_Barco1366 0x10
365 396
@@ -374,9 +405,9 @@
374#define Panel310_1400x1050 0x09 405#define Panel310_1400x1050 0x09
375#define Panel310_1280x768 0x0a 406#define Panel310_1280x768 0x0a
376#define Panel310_1600x1200 0x0b 407#define Panel310_1600x1200 0x0b
377#define Panel310_640x480_2 0x0c 408#define Panel310_320x240_2 0x0c /* xSTN */
378#define Panel310_640x480_3 0x0d 409#define Panel310_320x240_3 0x0d /* xSTN */
379#define Panel310_320x480 0x0e /* fstn - TW: This is fake, can be any */ 410#define Panel310_320x240_1 0x0e /* xSTN - This is fake, can be any */
380#define Panel310_Custom 0x0f 411#define Panel310_Custom 0x0f
381 412
382#define Panel661_800x600 0x01 413#define Panel661_800x600 0x01
@@ -386,7 +417,7 @@
386#define Panel661_1024x600 0x05 417#define Panel661_1024x600 0x05
387#define Panel661_1152x864 0x06 418#define Panel661_1152x864 0x06
388#define Panel661_1280x960 0x07 419#define Panel661_1280x960 0x07
389#define Panel661_1152x768 0x08 420#define Panel661_1280x854 0x08
390#define Panel661_1400x1050 0x09 421#define Panel661_1400x1050 0x09
391#define Panel661_1280x768 0x0a 422#define Panel661_1280x768 0x0a
392#define Panel661_1600x1200 0x0b 423#define Panel661_1600x1200 0x0b
@@ -410,14 +441,16 @@
410#define Panel_1680x1050 0x0d /* 661etc */ 441#define Panel_1680x1050 0x0d /* 661etc */
411#define Panel_1280x720 0x0e /* 661etc */ 442#define Panel_1280x720 0x0e /* 661etc */
412#define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */ 443#define Panel_Custom 0x0f /* MUST BE 0x0f (for DVI DDC detection) */
413#define Panel_320x480 0x10 /* SiS 550 fstn - TW: This is fake, can be any */ 444#define Panel_320x240_1 0x10 /* SiS 550 xSTN */
414#define Panel_Barco1366 0x11 445#define Panel_Barco1366 0x11
415#define Panel_848x480 0x12 446#define Panel_848x480 0x12
416#define Panel_640x480_2 0x13 /* SiS 550 */ 447#define Panel_320x240_2 0x13 /* SiS 550 xSTN */
417#define Panel_640x480_3 0x14 /* SiS 550 */ 448#define Panel_320x240_3 0x14 /* SiS 550 xSTN */
418#define Panel_1280x768_2 0x15 /* 30xLV */ 449#define Panel_1280x768_2 0x15 /* 30xLV */
419#define Panel_1280x768_3 0x16 /* (unused) */ 450#define Panel_1280x768_3 0x16 /* (unused) */
420#define Panel_1280x800_2 0x17 /* 30xLV */ 451#define Panel_1280x800_2 0x17 /* 30xLV */
452#define Panel_856x480 0x18
453#define Panel_1280x854 0x19 /* 661etc */
421 454
422/* Index in ModeResInfo table */ 455/* Index in ModeResInfo table */
423#define SIS_RI_320x200 0 456#define SIS_RI_320x200 0
@@ -454,6 +487,7 @@
454#define SIS_RI_1920x1080 31 487#define SIS_RI_1920x1080 31
455#define SIS_RI_960x540 32 488#define SIS_RI_960x540 32
456#define SIS_RI_960x600 33 489#define SIS_RI_960x600 33
490#define SIS_RI_1280x854 34
457 491
458/* CR5F */ 492/* CR5F */
459#define IsM650 0x80 493#define IsM650 0x80
@@ -482,16 +516,18 @@
482#define VCLK100_300 0x43 /* Index in VCLKData table (300) */ 516#define VCLK100_300 0x43 /* Index in VCLKData table (300) */
483#define VCLK34_300 0x3d /* Index in VCLKData table (300) */ 517#define VCLK34_300 0x3d /* Index in VCLKData table (300) */
484#define VCLK_CUSTOM_300 0x47 518#define VCLK_CUSTOM_300 0x47
485#define VCLK65_315 0x0b /* Index in (VB)VCLKData table (315) */ 519
486#define VCLK108_2_315 0x19 /* Index in (VB)VCLKData table (315) */ 520#define VCLK65_315 0x0b /* Indices in (VB)VCLKData table (315) */
487#define VCLK81_315 0x5b /* Index in (VB)VCLKData table (315) */ 521#define VCLK108_2_315 0x19
488#define VCLK162_315 0x5e /* Index in (VB)VCLKData table (315) */ 522#define VCLK81_315 0x5b
489#define VCLK108_3_315 0x45 /* Index in VBVCLKData table (315) */ 523#define VCLK162_315 0x5e
490#define VCLK100_315 0x46 /* Index in VBVCLKData table (315) */ 524#define VCLK108_3_315 0x45
525#define VCLK100_315 0x46
491#define VCLK34_315 0x55 526#define VCLK34_315 0x55
492#define VCLK68_315 0x0d 527#define VCLK68_315 0x0d
493#define VCLK_1280x800_315_2 0x5c /* Index in VBVCLKData table (315) */ 528#define VCLK_1280x800_315_2 0x5c
494#define VCLK121_315 0x5d /* Index in VBVCLKData table (315) */ 529#define VCLK121_315 0x5d
530#define VCLK130_315 0x72
495#define VCLK_1280x720 0x5f 531#define VCLK_1280x720 0x5f
496#define VCLK_1280x768_2 0x60 532#define VCLK_1280x768_2 0x60
497#define VCLK_1280x768_3 0x61 /* (unused?) */ 533#define VCLK_1280x768_3 0x61 /* (unused?) */
@@ -507,6 +543,7 @@
507#define VCLK_1152x864 0x64 543#define VCLK_1152x864 0x64
508#define VCLK_1360x768 0x58 544#define VCLK_1360x768 0x58
509#define VCLK_1280x800_315 0x6c 545#define VCLK_1280x800_315 0x6c
546#define VCLK_1280x854 0x76
510 547
511#define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */ 548#define TVCLKBASE_300 0x21 /* Indices on TV clocks in VCLKData table (300) */
512#define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */ 549#define TVCLKBASE_315 0x3a /* Indices on TV clocks in (VB)VCLKData table (315) */
diff --git a/drivers/video/sis/initextlfb.c b/drivers/video/sis/initextlfb.c
new file mode 100644
index 000000000000..cc856d90903c
--- /dev/null
+++ b/drivers/video/sis/initextlfb.c
@@ -0,0 +1,238 @@
1/*
2 * SiS 300/540/630[S]/730[S]
3 * SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX]
4 * XGI V3XT/V5/V8, Z7
5 * frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
6 *
7 * Linux kernel specific extensions to init.c/init301.c
8 *
9 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the named License,
14 * or any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
24 *
25 * Author: Thomas Winischhofer <thomas@winischhofer.net>
26 */
27
28#include "osdef.h"
29#include "initdef.h"
30#include "vgatypes.h"
31#include "vstruct.h"
32
33#include <linux/config.h>
34#include <linux/version.h>
35#include <linux/types.h>
36#include <linux/fb.h>
37
38#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
39int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
40 unsigned char modeno, unsigned char rateindex);
41int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
42 unsigned char rateindex, struct fb_var_screeninfo *var);
43#endif
44BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
45 int *htotal, int *vtotal, unsigned char rateindex);
46
47extern BOOLEAN SiSInitPtr(struct SiS_Private *SiS_Pr);
48extern BOOLEAN SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
49 unsigned short *ModeIdIndex);
50extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata,
51 int xres, int yres, struct fb_var_screeninfo *var, BOOLEAN writeres);
52
53#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
54int
55sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr, unsigned char modeno,
56 unsigned char rateindex)
57{
58 unsigned short ModeNo = modeno;
59 unsigned short ModeIdIndex = 0, ClockIndex = 0;
60 unsigned short RRTI = 0;
61 int Clock;
62
63 if(!SiSInitPtr(SiS_Pr)) return 65000;
64
65 if(rateindex > 0) rateindex--;
66
67#ifdef SIS315H
68 switch(ModeNo) {
69 case 0x5a: ModeNo = 0x50; break;
70 case 0x5b: ModeNo = 0x56;
71 }
72#endif
73
74 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) {;
75 printk(KERN_ERR "Could not find mode %x\n", ModeNo);
76 return 65000;
77 }
78
79 RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
80
81 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
82 if(SiS_Pr->SiS_UseWide == 1) {
83 /* Wide screen: Ignore rateindex */
84 ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_WIDE;
85 } else {
86 RRTI += rateindex;
87 ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK_NORM;
88 }
89 } else {
90 RRTI += rateindex;
91 ClockIndex = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRTVCLK;
92 }
93
94 Clock = SiS_Pr->SiS_VCLKData[ClockIndex].CLOCK * 1000;
95
96 return Clock;
97}
98
99int
100sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
101 unsigned char rateindex, struct fb_var_screeninfo *var)
102{
103 unsigned short ModeNo = modeno;
104 unsigned short ModeIdIndex = 0, index = 0, RRTI = 0;
105 int j;
106
107 if(!SiSInitPtr(SiS_Pr)) return 0;
108
109 if(rateindex > 0) rateindex--;
110
111#ifdef SIS315H
112 switch(ModeNo) {
113 case 0x5a: ModeNo = 0x50; break;
114 case 0x5b: ModeNo = 0x56;
115 }
116#endif
117
118 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return 0;
119
120 RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
121 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
122 if(SiS_Pr->SiS_UseWide == 1) {
123 /* Wide screen: Ignore rateindex */
124 index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
125 } else {
126 RRTI += rateindex;
127 index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
128 }
129 } else {
130 RRTI += rateindex;
131 index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
132 }
133
134 SiS_Generic_ConvertCRData(SiS_Pr,
135 (unsigned char *)&SiS_Pr->SiS_CRT1Table[index].CR[0],
136 SiS_Pr->SiS_RefIndex[RRTI].XRes,
137 SiS_Pr->SiS_RefIndex[RRTI].YRes,
138 var, FALSE);
139
140 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x8000)
141 var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
142 else
143 var->sync |= FB_SYNC_VERT_HIGH_ACT;
144
145 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x4000)
146 var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
147 else
148 var->sync |= FB_SYNC_HOR_HIGH_ACT;
149
150 var->vmode = FB_VMODE_NONINTERLACED;
151 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & 0x0080)
152 var->vmode = FB_VMODE_INTERLACED;
153 else {
154 j = 0;
155 while(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID != 0xff) {
156 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeID ==
157 SiS_Pr->SiS_RefIndex[RRTI].ModeID) {
158 if(SiS_Pr->SiS_EModeIDTable[j].Ext_ModeFlag & DoubleScanMode) {
159 var->vmode = FB_VMODE_DOUBLE;
160 }
161 break;
162 }
163 j++;
164 }
165 }
166
167 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
168#if 0 /* Do this? */
169 var->upper_margin <<= 1;
170 var->lower_margin <<= 1;
171 var->vsync_len <<= 1;
172#endif
173 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
174 var->upper_margin >>= 1;
175 var->lower_margin >>= 1;
176 var->vsync_len >>= 1;
177 }
178
179 return 1;
180}
181#endif /* Linux >= 2.5 */
182
183BOOLEAN
184sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno, int *htotal,
185 int *vtotal, unsigned char rateindex)
186{
187 unsigned short ModeNo = modeno;
188 unsigned short ModeIdIndex = 0, CRT1Index = 0;
189 unsigned short RRTI = 0;
190 unsigned char sr_data, cr_data, cr_data2;
191
192 if(!SiSInitPtr(SiS_Pr)) return FALSE;
193
194 if(rateindex > 0) rateindex--;
195
196#ifdef SIS315H
197 switch(ModeNo) {
198 case 0x5a: ModeNo = 0x50; break;
199 case 0x5b: ModeNo = 0x56;
200 }
201#endif
202
203 if(!(SiS_SearchModeID(SiS_Pr, &ModeNo, &ModeIdIndex))) return FALSE;
204
205 RRTI = SiS_Pr->SiS_EModeIDTable[ModeIdIndex].REFindex;
206 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & HaveWideTiming) {
207 if(SiS_Pr->SiS_UseWide == 1) {
208 /* Wide screen: Ignore rateindex */
209 CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_WIDE;
210 } else {
211 RRTI += rateindex;
212 CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC_NORM;
213 }
214 } else {
215 RRTI += rateindex;
216 CRT1Index = SiS_Pr->SiS_RefIndex[RRTI].Ext_CRT1CRTC;
217 }
218
219 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[14];
220 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[0];
221 *htotal = (((cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8)) + 5) * 8;
222
223 sr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[13];
224 cr_data = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[6];
225 cr_data2 = SiS_Pr->SiS_CRT1Table[CRT1Index].CR[7];
226 *vtotal = ((cr_data & 0xFF) |
227 ((unsigned short)(cr_data2 & 0x01) << 8) |
228 ((unsigned short)(cr_data2 & 0x20) << 4) |
229 ((unsigned short)(sr_data & 0x01) << 10)) + 2;
230
231 if(SiS_Pr->SiS_RefIndex[RRTI].Ext_InfoFlag & InterlaceMode)
232 *vtotal *= 2;
233
234 return TRUE;
235}
236
237
238
diff --git a/drivers/video/sis/oem300.h b/drivers/video/sis/oem300.h
index b1358b750f53..b73f26840143 100644
--- a/drivers/video/sis/oem300.h
+++ b/drivers/video/sis/oem300.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * OEM Data for 300 series 4 * OEM Data for 300 series
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,7 +50,7 @@
50 * 50 *
51 */ 51 */
52 52
53static const UCHAR SiS300_OEMTVDelay301[8][4] = 53static const unsigned char SiS300_OEMTVDelay301[8][4] =
54{ 54{
55 {0x08,0x08,0x08,0x08}, 55 {0x08,0x08,0x08,0x08},
56 {0x08,0x08,0x08,0x08}, 56 {0x08,0x08,0x08,0x08},
@@ -62,7 +62,7 @@ static const UCHAR SiS300_OEMTVDelay301[8][4] =
62 {0x20,0x20,0x20,0x20} 62 {0x20,0x20,0x20,0x20}
63}; 63};
64 64
65static const UCHAR SiS300_OEMTVDelayLVDS[8][4] = 65static const unsigned char SiS300_OEMTVDelayLVDS[8][4] =
66{ 66{
67 {0x20,0x20,0x20,0x20}, 67 {0x20,0x20,0x20,0x20},
68 {0x20,0x20,0x20,0x20}, 68 {0x20,0x20,0x20,0x20},
@@ -74,7 +74,7 @@ static const UCHAR SiS300_OEMTVDelayLVDS[8][4] =
74 {0x20,0x20,0x20,0x20} 74 {0x20,0x20,0x20,0x20}
75}; 75};
76 76
77static const UCHAR SiS300_OEMTVFlicker[8][4] = 77static const unsigned char SiS300_OEMTVFlicker[8][4] =
78{ 78{
79 {0x00,0x00,0x00,0x00}, 79 {0x00,0x00,0x00,0x00},
80 {0x00,0x00,0x00,0x00}, 80 {0x00,0x00,0x00,0x00},
@@ -86,25 +86,7 @@ static const UCHAR SiS300_OEMTVFlicker[8][4] =
86 {0x00,0x00,0x00,0x00} 86 {0x00,0x00,0x00,0x00}
87}; 87};
88 88
89#if 0 /* TW: Not used */ 89static const unsigned char SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302LV */
90static const UCHAR SiS300_OEMLCDDelay1[12][4]={
91 {0x2c,0x2c,0x2c,0x2c},
92 {0x20,0x20,0x20,0x20},
93 {0x20,0x20,0x20,0x20},
94 {0x2c,0x2c,0x2c,0x2c},
95 {0x2c,0x2c,0x2c,0x2c},
96 {0x20,0x20,0x20,0x20},
97 {0x20,0x20,0x20,0x20},
98 {0x24,0x24,0x24,0x24},
99 {0x24,0x24,0x24,0x24},
100 {0x20,0x20,0x20,0x20},
101 {0x20,0x20,0x20,0x20},
102 {0x24,0x24,0x24,0x24}
103};
104#endif
105
106/* From 630/301B BIOS */
107static const UCHAR SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302LV */
108{ 90{
109 {0x20,0x20,0x20,0x20}, 91 {0x20,0x20,0x20,0x20},
110 {0x20,0x20,0x20,0x20}, 92 {0x20,0x20,0x20,0x20},
@@ -172,8 +154,7 @@ static const UCHAR SiS300_OEMLCDDelay2[64][4] = /* for 301/301b/302b/301LV/302
172 {0x20,0x20,0x20,0x20} 154 {0x20,0x20,0x20,0x20}
173}; 155};
174 156
175/* From 300/301LV BIOS */ 157static const unsigned char SiS300_OEMLCDDelay4[12][4] =
176static const UCHAR SiS300_OEMLCDDelay4[12][4] =
177{ 158{
178 {0x2c,0x2c,0x2c,0x2c}, 159 {0x2c,0x2c,0x2c,0x2c},
179 {0x20,0x20,0x20,0x20}, 160 {0x20,0x20,0x20,0x20},
@@ -189,8 +170,7 @@ static const UCHAR SiS300_OEMLCDDelay4[12][4] =
189 {0x24,0x24,0x24,0x24} 170 {0x24,0x24,0x24,0x24}
190}; 171};
191 172
192/* From 300/301LV BIOS */ 173static const unsigned char SiS300_OEMLCDDelay5[32][4] =
193static const UCHAR SiS300_OEMLCDDelay5[32][4] =
194{ 174{
195 {0x20,0x20,0x20,0x20}, 175 {0x20,0x20,0x20,0x20},
196 {0x20,0x20,0x20,0x20}, 176 {0x20,0x20,0x20,0x20},
@@ -226,8 +206,8 @@ static const UCHAR SiS300_OEMLCDDelay5[32][4] =
226 {0x20,0x20,0x20,0x20}, 206 {0x20,0x20,0x20,0x20},
227}; 207};
228 208
229/* Added for LVDS */ 209static const unsigned char SiS300_OEMLCDDelay3[64][4] = /* For LVDS */
230static const UCHAR SiS300_OEMLCDDelay3[64][4] = { /* For LVDS */ 210{
231 {0x20,0x20,0x20,0x20}, 211 {0x20,0x20,0x20,0x20},
232 {0x20,0x20,0x20,0x20}, 212 {0x20,0x20,0x20,0x20},
233 {0x20,0x20,0x20,0x20}, 213 {0x20,0x20,0x20,0x20},
@@ -294,7 +274,7 @@ static const UCHAR SiS300_OEMLCDDelay3[64][4] = { /* For LVDS */
294 {0x20,0x20,0x20,0x20} 274 {0x20,0x20,0x20,0x20}
295}; 275};
296 276
297static const UCHAR SiS300_Phase1[8][5][4] = 277static const unsigned char SiS300_Phase1[8][5][4] =
298{ 278{
299 { 279 {
300 {0x21,0xed,0x00,0x08}, 280 {0x21,0xed,0x00,0x08},
@@ -354,11 +334,10 @@ static const UCHAR SiS300_Phase1[8][5][4] =
354 } 334 }
355}; 335};
356 336
357 337static const unsigned char SiS300_Phase2[8][5][4] =
358static const UCHAR SiS300_Phase2[8][5][4] =
359{ 338{
360 { 339 {
361 {0x21,0xed,0x00,0x08}, 340 {0x21,0xed,0x00,0x08},
362 {0x21,0xed,0x8a,0x08}, 341 {0x21,0xed,0x8a,0x08},
363 {0x21,0xed,0x8a,0x08}, 342 {0x21,0xed,0x8a,0x08},
364 {0x21,0xed,0x8a,0x08}, 343 {0x21,0xed,0x8a,0x08},
@@ -372,42 +351,42 @@ static const UCHAR SiS300_Phase2[8][5][4] =
372 {0x2a,0x05,0xd3,0x00} 351 {0x2a,0x05,0xd3,0x00}
373 }, 352 },
374 { 353 {
375 {0x2a,0x05,0xd3,0x00}, 354 {0x2a,0x05,0xd3,0x00},
376 {0x2a,0x05,0xd3,0x00}, 355 {0x2a,0x05,0xd3,0x00},
377 {0x2a,0x05,0xd3,0x00}, 356 {0x2a,0x05,0xd3,0x00},
378 {0x2a,0x05,0xd3,0x00}, 357 {0x2a,0x05,0xd3,0x00},
379 {0x2a,0x05,0xd3,0x00} 358 {0x2a,0x05,0xd3,0x00}
380 }, 359 },
381 { 360 {
382 {0x2a,0x05,0xd3,0x00}, 361 {0x2a,0x05,0xd3,0x00},
383 {0x2a,0x05,0xd3,0x00}, 362 {0x2a,0x05,0xd3,0x00},
384 {0x2a,0x05,0xd3,0x00}, 363 {0x2a,0x05,0xd3,0x00},
385 {0x2a,0x05,0xd3,0x00}, 364 {0x2a,0x05,0xd3,0x00},
386 {0x2a,0x05,0xd3,0x00} 365 {0x2a,0x05,0xd3,0x00}
387 }, 366 },
388 { 367 {
389 {0x21,0xed,0x00,0x08}, 368 {0x21,0xed,0x00,0x08},
390 {0x21,0xed,0x8a,0x08}, 369 {0x21,0xed,0x8a,0x08},
391 {0x21,0xed,0x8a,0x08}, 370 {0x21,0xed,0x8a,0x08},
392 {0x21,0xed,0x8a,0x08}, 371 {0x21,0xed,0x8a,0x08},
393 {0x21,0xed,0x8a,0x08} 372 {0x21,0xed,0x8a,0x08}
394 }, 373 },
395 { 374 {
396 {0x2a,0x05,0xd3,0x00}, 375 {0x2a,0x05,0xd3,0x00},
397 {0x2a,0x05,0xd3,0x00}, 376 {0x2a,0x05,0xd3,0x00},
398 {0x2a,0x05,0xd3,0x00}, 377 {0x2a,0x05,0xd3,0x00},
399 {0x2a,0x05,0xd3,0x00}, 378 {0x2a,0x05,0xd3,0x00},
400 {0x2a,0x05,0xd3,0x00} 379 {0x2a,0x05,0xd3,0x00}
401 }, 380 },
402 { 381 {
403 {0x2a,0x05,0xd3,0x00}, 382 {0x2a,0x05,0xd3,0x00},
404 {0x2a,0x05,0xd3,0x00}, 383 {0x2a,0x05,0xd3,0x00},
405 {0x2a,0x05,0xd3,0x00}, 384 {0x2a,0x05,0xd3,0x00},
406 {0x2a,0x05,0xd3,0x00}, 385 {0x2a,0x05,0xd3,0x00},
407 {0x2a,0x05,0xd3,0x00} 386 {0x2a,0x05,0xd3,0x00}
408 }, 387 },
409 { 388 {
410 {0x2a,0x05,0xd3,0x00}, 389 {0x2a,0x05,0xd3,0x00},
411 {0x2a,0x05,0xd3,0x00}, 390 {0x2a,0x05,0xd3,0x00},
412 {0x2a,0x05,0xd3,0x00}, 391 {0x2a,0x05,0xd3,0x00},
413 {0x2a,0x05,0xd3,0x00}, 392 {0x2a,0x05,0xd3,0x00},
@@ -415,7 +394,7 @@ static const UCHAR SiS300_Phase2[8][5][4] =
415 } 394 }
416}; 395};
417 396
418static const UCHAR SiS300_Filter1[10][16][4] = 397static const unsigned char SiS300_Filter1[10][16][4] =
419{ 398{
420 { 399 {
421 {0x00,0xf4,0x10,0x38}, 400 {0x00,0xf4,0x10,0x38},
@@ -599,7 +578,7 @@ static const UCHAR SiS300_Filter1[10][16][4] =
599 }, 578 },
600}; 579};
601 580
602static const UCHAR SiS300_Filter2[10][9][7] = 581static const unsigned char SiS300_Filter2[10][9][7] =
603{ 582{
604 { 583 {
605 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, 584 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@@ -714,142 +693,144 @@ static const UCHAR SiS300_Filter2[10][9][7] =
714}; 693};
715 694
716/* Custom data for Barco iQ Pro R300 */ 695/* Custom data for Barco iQ Pro R300 */
717static const UCHAR barco_p1[2][9][7][3] = { 696static const unsigned char barco_p1[2][9][7][3] =
718 { 697{
719 { { 0x16, 0xcf, 0x00 }, 698 {
720 { 0x18, 0x00, 0x00 }, 699 {
721 { 0x1a, 0xe7, 0x00 }, 700 { 0x16, 0xcf, 0x00 },
722 { 0x1b, 0x26, 0x00 }, 701 { 0x18, 0x00, 0x00 },
723 { 0x1c, 0xff, 0x00 }, 702 { 0x1a, 0xe7, 0x00 },
724 { 0x1d, 0x1c, 0x00 }, 703 { 0x1b, 0x26, 0x00 },
725 { 0x1e, 0x19, 0x00 } 704 { 0x1c, 0xff, 0x00 },
726 }, 705 { 0x1d, 0x1c, 0x00 },
727 { 706 { 0x1e, 0x19, 0x00 }
728 { 0x16, 0xcf, 0x00 }, 707 },
729 { 0x18, 0x00, 0x00 }, 708 {
730 { 0x1a, 0xe7, 0x00 }, 709 { 0x16, 0xcf, 0x00 },
731 { 0x1b, 0x1e, 0x00 }, 710 { 0x18, 0x00, 0x00 },
732 { 0x1c, 0xff, 0x00 }, 711 { 0x1a, 0xe7, 0x00 },
733 { 0x1d, 0x1c, 0x00 }, 712 { 0x1b, 0x1e, 0x00 },
734 { 0x1e, 0x16, 0x00 } 713 { 0x1c, 0xff, 0x00 },
735 }, 714 { 0x1d, 0x1c, 0x00 },
736 { 715 { 0x1e, 0x16, 0x00 }
737 { 0x16, 0xcf, 0x00 }, 716 },
738 { 0x1a, 0xe7, 0x00 }, 717 {
739 { 0x1b, 0x26, 0x00 }, 718 { 0x16, 0xcf, 0x00 },
740 { 0x1c, 0xff, 0x00 }, 719 { 0x1a, 0xe7, 0x00 },
741 { 0x1d, 0x1c, 0x00 }, 720 { 0x1b, 0x26, 0x00 },
742 { 0x1e, 0x19, 0x00 }, 721 { 0x1c, 0xff, 0x00 },
743 { 0, 0, 0 } 722 { 0x1d, 0x1c, 0x00 },
744 }, 723 { 0x1e, 0x19, 0x00 },
745 { 724 { 0, 0, 0 }
746 { 0, 0, 0 } 725 },
747 }, 726 {
748 { 727 { 0, 0, 0 }
749 { 0x16, 0xcf, 0x00 }, 728 },
750 { 0x1a, 0xe7, 0x00 }, 729 {
751 { 0x1b, 0x26, 0x00 }, 730 { 0x16, 0xcf, 0x00 },
752 { 0x1c, 0xff, 0x00 }, 731 { 0x1a, 0xe7, 0x00 },
753 { 0x1d, 0x1c, 0x00 }, 732 { 0x1b, 0x26, 0x00 },
754 { 0x1e, 0x1e, 0x00 }, 733 { 0x1c, 0xff, 0x00 },
755 { 0, 0, 0 } 734 { 0x1d, 0x1c, 0x00 },
756 }, 735 { 0x1e, 0x1e, 0x00 },
757 { 736 { 0, 0, 0 }
758 { 0x16, 0xd1, 0x00 }, 737 },
759 { 0x18, 0x00, 0x00 }, 738 {
760 { 0x1a, 0xe7, 0x00 }, 739 { 0x16, 0xd1, 0x00 },
761 { 0x1b, 0x11, 0x00 }, 740 { 0x18, 0x00, 0x00 },
762 { 0x1c, 0xff, 0x00 }, 741 { 0x1a, 0xe7, 0x00 },
763 { 0x1d, 0x1c, 0x00 }, 742 { 0x1b, 0x11, 0x00 },
764 { 0x1e, 0x26, 0x00 } 743 { 0x1c, 0xff, 0x00 },
765 }, 744 { 0x1d, 0x1c, 0x00 },
766 { 745 { 0x1e, 0x26, 0x00 }
767 { 0x16, 0xd1, 0x00 }, 746 },
768 { 0x1a, 0xe7, 0x00 }, 747 {
769 { 0x1b, 0x26, 0x00 }, 748 { 0x16, 0xd1, 0x00 },
770 { 0x1c, 0xff, 0x00 }, 749 { 0x1a, 0xe7, 0x00 },
771 { 0x1d, 0x1c, 0x00 }, 750 { 0x1b, 0x26, 0x00 },
772 { 0x1e, 0x30, 0x00 }, 751 { 0x1c, 0xff, 0x00 },
773 { 0, 0, 0 } 752 { 0x1d, 0x1c, 0x00 },
774 }, 753 { 0x1e, 0x30, 0x00 },
775 { 754 { 0, 0, 0 }
776 { 0x16, 0x00, 0x00 }, 755 },
777 { 0x17, 0xa0, 0x00 }, 756 {
778 { 0x1a, 0xa0, 0x00 }, 757 { 0x16, 0x00, 0x00 },
779 { 0x1b, 0x2a, 0x00 }, 758 { 0x17, 0xa0, 0x00 },
780 { 0x1c, 0xff, 0x00 }, 759 { 0x1a, 0xa0, 0x00 },
781 { 0x1d, 0x1c, 0x00 }, 760 { 0x1b, 0x2a, 0x00 },
782 { 0, 0, 0 } 761 { 0x1c, 0xff, 0x00 },
783 }, 762 { 0x1d, 0x1c, 0x00 },
784 { 763 { 0, 0, 0 }
785 { 0x16, 0x00, 0x00 }, 764 },
786 { 0x17, 0xaa, 0x00 }, 765 {
787 { 0x1a, 0xa0, 0x00 }, 766 { 0x16, 0x00, 0x00 },
788 { 0x1b, 0x2a, 0x00 }, 767 { 0x17, 0xaa, 0x00 },
789 { 0x1c, 0xff, 0x00 }, 768 { 0x1a, 0xa0, 0x00 },
790 { 0x1d, 0x1c, 0x00 }, 769 { 0x1b, 0x2a, 0x00 },
791 { 0, 0, 0 } 770 { 0x1c, 0xff, 0x00 },
792 } 771 { 0x1d, 0x1c, 0x00 },
793 }, 772 { 0, 0, 0 }
794 { 773 }
795 { 774 },
796 { 0x16, 0xcf, 0x00 }, 775 {
797 { 0x18, 0x00, 0x00 }, 776 {
798 { 0x1a, 0xe7, 0x00 }, 777 { 0x16, 0xcf, 0x00 },
799 { 0x1b, 0x26, 0x00 }, 778 { 0x18, 0x00, 0x00 },
800 { 0x1c, 0xff, 0x00 }, 779 { 0x1a, 0xe7, 0x00 },
801 { 0x1d, 0x1c, 0x00 }, 780 { 0x1b, 0x26, 0x00 },
802 { 0x1e, 0x19, 0x00 } 781 { 0x1c, 0xff, 0x00 },
803 }, 782 { 0x1d, 0x1c, 0x00 },
804 { 783 { 0x1e, 0x19, 0x00 }
805 { 0, 0, 0 } 784 },
806 }, 785 {
807 { 786 { 0, 0, 0 }
808 { 0x16, 0xcf, 0x00 }, 787 },
809 { 0x18, 0x00, 0x00 }, 788 {
810 { 0x1a, 0xe7, 0x00 }, 789 { 0x16, 0xcf, 0x00 },
811 { 0x1b, 0x26, 0x00 }, 790 { 0x18, 0x00, 0x00 },
812 { 0x1c, 0xff, 0x00 }, 791 { 0x1a, 0xe7, 0x00 },
813 { 0x1d, 0x1c, 0x00 }, 792 { 0x1b, 0x26, 0x00 },
814 { 0x1e, 0x19, 0x00 }, 793 { 0x1c, 0xff, 0x00 },
815 }, 794 { 0x1d, 0x1c, 0x00 },
816 { 795 { 0x1e, 0x19, 0x00 },
817 { 0, 0, 0 } 796 },
818 }, 797 {
819 { 798 { 0, 0, 0 }
820 { 0x16, 0xcf, 0x00 }, 799 },
821 { 0x18, 0x00, 0x00 }, 800 {
822 { 0x1a, 0xe7, 0x00 }, 801 { 0x16, 0xcf, 0x00 },
823 { 0x1b, 0x26, 0x00 }, 802 { 0x18, 0x00, 0x00 },
824 { 0x1c, 0xff, 0x00 }, 803 { 0x1a, 0xe7, 0x00 },
825 { 0x1d, 0x1c, 0x00 }, 804 { 0x1b, 0x26, 0x00 },
826 { 0x1e, 0x1e, 0x00 } 805 { 0x1c, 0xff, 0x00 },
827 }, 806 { 0x1d, 0x1c, 0x00 },
828 { 807 { 0x1e, 0x1e, 0x00 }
829 { 0x16, 0xd1, 0x00 }, 808 },
830 { 0x18, 0x00, 0x00 }, 809 {
831 { 0x1a, 0xe6, 0x00 }, 810 { 0x16, 0xd1, 0x00 },
832 { 0x1b, 0x11, 0x00 }, 811 { 0x18, 0x00, 0x00 },
833 { 0x1c, 0xff, 0x00 }, 812 { 0x1a, 0xe6, 0x00 },
834 { 0x1d, 0x1c, 0x00 }, 813 { 0x1b, 0x11, 0x00 },
835 { 0x1e, 0x26, 0x00 } 814 { 0x1c, 0xff, 0x00 },
836 }, 815 { 0x1d, 0x1c, 0x00 },
837 { 816 { 0x1e, 0x26, 0x00 }
838 { 0x18, 0x00, 0x00 }, 817 },
839 { 0x1a, 0xe0, 0x00 }, 818 {
840 { 0x1b, 0x26, 0x00 }, 819 { 0x18, 0x00, 0x00 },
841 { 0x1c, 0xff, 0x00 }, 820 { 0x1a, 0xe0, 0x00 },
842 { 0x1d, 0x1c, 0x00 }, 821 { 0x1b, 0x26, 0x00 },
843 { 0x1e, 0x30, 0x00 }, 822 { 0x1c, 0xff, 0x00 },
844 { 0, 0, 0 } 823 { 0x1d, 0x1c, 0x00 },
845 }, 824 { 0x1e, 0x30, 0x00 },
846 { 825 { 0, 0, 0 }
847 { 0, 0, 0 } 826 },
848 }, 827 {
849 { 828 { 0, 0, 0 }
850 { 0, 0, 0 } 829 },
851 } 830 {
852 } 831 { 0, 0, 0 }
832 }
833 }
853}; 834};
854 835
855 836
diff --git a/drivers/video/sis/oem310.h b/drivers/video/sis/oem310.h
index 2b7db916b7e7..8fce56e4482c 100644
--- a/drivers/video/sis/oem310.h
+++ b/drivers/video/sis/oem310.h
@@ -1,9 +1,9 @@
1/* $XFree86$ */ 1/* $XFree86$ */
2/* $XdotOrg$ */ 2/* $XdotOrg$ */
3/* 3/*
4 * OEM Data for 315/330 series 4 * OEM Data for 315/330/340 series
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,206 +50,206 @@
50 * 50 *
51 */ 51 */
52 52
53static const UCHAR SiS310_LCDDelayCompensation_301[] = /* 301 */ 53static const unsigned char SiS310_LCDDelayCompensation_301[] = /* 301 */
54{ 54{
55 0x00,0x00,0x00, /* 800x600 */ 55 0x00,0x00,0x00, /* 800x600 */
56 0x0b,0x0b,0x0b, /* 1024x768 */ 56 0x0b,0x0b,0x0b, /* 1024x768 */
57 0x08,0x08,0x08, /* 1280x1024 */ 57 0x08,0x08,0x08, /* 1280x1024 */
58 0x00,0x00,0x00, /* 640x480 (unknown) */ 58 0x00,0x00,0x00, /* 640x480 (unknown) */
59 0x00,0x00,0x00, /* 1024x600 (unknown) */ 59 0x00,0x00,0x00, /* 1024x600 (unknown) */
60 0x00,0x00,0x00, /* 1152x864 (unknown) */ 60 0x00,0x00,0x00, /* 1152x864 (unknown) */
61 0x08,0x08,0x08, /* 1280x960 (guessed) */ 61 0x08,0x08,0x08, /* 1280x960 (guessed) */
62 0x00,0x00,0x00, /* 1152x768 (unknown) */ 62 0x00,0x00,0x00, /* 1152x768 (unknown) */
63 0x08,0x08,0x08, /* 1400x1050 */ 63 0x08,0x08,0x08, /* 1400x1050 */
64 0x08,0x08,0x08, /* 1280x768 (guessed) */ 64 0x08,0x08,0x08, /* 1280x768 (guessed) */
65 0x00,0x00,0x00, /* 1600x1200 */ 65 0x00,0x00,0x00, /* 1600x1200 */
66 0x00,0x00,0x00, /* 320x480 (unknown) */ 66 0x00,0x00,0x00, /* 320x480 (unknown) */
67 0x00,0x00,0x00, 67 0x00,0x00,0x00,
68 0x00,0x00,0x00, 68 0x00,0x00,0x00,
69 0x00,0x00,0x00 69 0x00,0x00,0x00
70}; 70};
71 71
72/* This is contained in 650+301B BIOSes, but it is wrong - so we don't use it */ 72/* This is contained in 650+301B BIOSes, but it is wrong - so we don't use it */
73static const UCHAR SiS310_LCDDelayCompensation_650301LV[] = /* 650 + 30xLV */ 73static const unsigned char SiS310_LCDDelayCompensation_650301LV[] = /* 650 + 30xLV */
74{ 74{
75 0x01,0x01,0x01, /* 800x600 */ 75 0x01,0x01,0x01, /* 800x600 */
76 0x01,0x01,0x01, /* 1024x768 */ 76 0x01,0x01,0x01, /* 1024x768 */
77 0x01,0x01,0x01, /* 1280x1024 */ 77 0x01,0x01,0x01, /* 1280x1024 */
78 0x01,0x01,0x01, /* 640x480 (unknown) */ 78 0x01,0x01,0x01, /* 640x480 (unknown) */
79 0x01,0x01,0x01, /* 1024x600 (unknown) */ 79 0x01,0x01,0x01, /* 1024x600 (unknown) */
80 0x01,0x01,0x01, /* 1152x864 (unknown) */ 80 0x01,0x01,0x01, /* 1152x864 (unknown) */
81 0x01,0x01,0x01, /* 1280x960 (guessed) */ 81 0x01,0x01,0x01, /* 1280x960 (guessed) */
82 0x01,0x01,0x01, /* 1152x768 (unknown) */ 82 0x01,0x01,0x01, /* 1152x768 (unknown) */
83 0x01,0x01,0x01, /* 1400x1050 */ 83 0x01,0x01,0x01, /* 1400x1050 */
84 0x01,0x01,0x01, /* 1280x768 (guessed) */ 84 0x01,0x01,0x01, /* 1280x768 (guessed) */
85 0x01,0x01,0x01, /* 1600x1200 */ 85 0x01,0x01,0x01, /* 1600x1200 */
86 0x02,0x02,0x02, 86 0x02,0x02,0x02,
87 0x02,0x02,0x02, 87 0x02,0x02,0x02,
88 0x02,0x02,0x02, 88 0x02,0x02,0x02,
89 0x02,0x02,0x02 89 0x02,0x02,0x02
90}; 90};
91 91
92static const UCHAR SiS310_LCDDelayCompensation_651301LV[] = /* M650/651 301LV */ 92static const unsigned char SiS310_LCDDelayCompensation_651301LV[] = /* M650/651 301LV */
93{ 93{
94 0x33,0x33,0x33, /* 800x600 (guessed) - new: PanelType, not PanelRes ! */ 94 0x33,0x33,0x33, /* 800x600 (guessed) - new: PanelType, not PanelRes ! */
95 0x33,0x33,0x33, /* 1024x768 */ 95 0x33,0x33,0x33, /* 1024x768 */
96 0x33,0x33,0x33, /* 1280x1024 */ 96 0x33,0x33,0x33, /* 1280x1024 */
97 0x33,0x33,0x33, /* 640x480 (unknown) */ 97 0x33,0x33,0x33, /* 640x480 (unknown) */
98 0x33,0x33,0x33, /* 1024x600 (unknown) */ 98 0x33,0x33,0x33, /* 1024x600 (unknown) */
99 0x33,0x33,0x33, /* 1152x864 (unknown) */ 99 0x33,0x33,0x33, /* 1152x864 (unknown) */
100 0x33,0x33,0x33, /* 1280x960 (guessed) */ 100 0x33,0x33,0x33, /* 1280x960 (guessed) */
101 0x33,0x33,0x33, /* 1152x768 (unknown) */ 101 0x33,0x33,0x33, /* 1152x768 (unknown) */
102 0x33,0x33,0x33, /* 1400x1050 */ 102 0x33,0x33,0x33, /* 1400x1050 */
103 0x33,0x33,0x33, /* 1280x768 (guessed) */ 103 0x33,0x33,0x33, /* 1280x768 (guessed) */
104 0x33,0x33,0x33, /* 1600x1200 */ 104 0x33,0x33,0x33, /* 1600x1200 */
105 0x33,0x33,0x33, 105 0x33,0x33,0x33,
106 0x33,0x33,0x33, 106 0x33,0x33,0x33,
107 0x33,0x33,0x33, 107 0x33,0x33,0x33,
108 0x33,0x33,0x33 108 0x33,0x33,0x33
109}; 109};
110 110
111static const UCHAR SiS310_LCDDelayCompensation_651302LV[] = /* M650/651 302LV */ 111static const unsigned char SiS310_LCDDelayCompensation_651302LV[] = /* M650/651 302LV */
112{ 112{
113 0x33,0x33,0x33, /* 800x600 (guessed) */ 113 0x33,0x33,0x33, /* 800x600 (guessed) */
114 0x33,0x33,0x33, /* 1024x768 */ 114 0x33,0x33,0x33, /* 1024x768 */
115 0x33,0x33,0x33, /* 1280x1024 */ 115 0x33,0x33,0x33, /* 1280x1024 */
116 0x33,0x33,0x33, /* 640x480 (unknown) */ 116 0x33,0x33,0x33, /* 640x480 (unknown) */
117 0x33,0x33,0x33, /* 1024x600 (unknown) */ 117 0x33,0x33,0x33, /* 1024x600 (unknown) */
118 0x33,0x33,0x33, /* 1152x864 (unknown) */ 118 0x33,0x33,0x33, /* 1152x864 (unknown) */
119 0x33,0x33,0x33, /* 1280x960 (guessed) */ 119 0x33,0x33,0x33, /* 1280x960 (guessed) */
120 0x33,0x33,0x33, /* 1152x768 (unknown) */ 120 0x33,0x33,0x33, /* 1152x768 (unknown) */
121 0x33,0x33,0x33, /* 1400x1050 */ 121 0x33,0x33,0x33, /* 1400x1050 */
122 0x33,0x33,0x33, /* 1280x768 (guessed) */ 122 0x33,0x33,0x33, /* 1280x768 (guessed) */
123 0x33,0x33,0x33, /* 1600x1200 */ 123 0x33,0x33,0x33, /* 1600x1200 */
124 0x33,0x33,0x33, 124 0x33,0x33,0x33,
125 0x33,0x33,0x33, 125 0x33,0x33,0x33,
126 0x33,0x33,0x33, 126 0x33,0x33,0x33,
127 0x33,0x33,0x33 127 0x33,0x33,0x33
128}; 128};
129 129
130static const UCHAR SiS310_LCDDelayCompensation_3xx301B[] = /* 30xB */ 130static const unsigned char SiS310_LCDDelayCompensation_3xx301B[] = /* 30xB */
131{ 131{
132 0x01,0x01,0x01, /* 800x600 */ 132 0x01,0x01,0x01, /* 800x600 */
133 0x0C,0x0C,0x0C, /* 1024x768 */ 133 0x0C,0x0C,0x0C, /* 1024x768 */
134 0x0C,0x0C,0x0C, /* 1280x1024 */ 134 0x0C,0x0C,0x0C, /* 1280x1024 */
135 0x08,0x08,0x08, /* 640x480 */ 135 0x08,0x08,0x08, /* 640x480 */
136 0x0C,0x0C,0x0C, /* 1024x600 (guessed) */ 136 0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
137 0x0C,0x0C,0x0C, /* 1152x864 (guessed) */ 137 0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
138 0x0C,0x0C,0x0C, /* 1280x960 (guessed) */ 138 0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
139 0x0C,0x0C,0x0C, /* 1152x768 (guessed) */ 139 0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
140 0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */ 140 0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
141 0x0C,0x0C,0x0C, /* 1280x768 (guessed) */ 141 0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
142 0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */ 142 0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
143 0x02,0x02,0x02, 143 0x02,0x02,0x02,
144 0x02,0x02,0x02, 144 0x02,0x02,0x02,
145 0x02,0x02,0x02, 145 0x02,0x02,0x02,
146 0x02,0x02,0x02 146 0x02,0x02,0x02
147}; 147};
148 148
149static const UCHAR SiS310_LCDDelayCompensation_3xx301LV[] = /* 315+30xLV */ 149static const unsigned char SiS310_LCDDelayCompensation_3xx301LV[] = /* 315+30xLV */
150{ 150{
151 0x01,0x01,0x01, /* 800x600 */ 151 0x01,0x01,0x01, /* 800x600 */
152 0x04,0x04,0x04, /* 1024x768 (A531/BIOS 1.14.05f: 4 - works with 6 */ 152 0x04,0x04,0x04, /* 1024x768 (A531/BIOS 1.14.05f: 4 - works with 6 */
153 0x0C,0x0C,0x0C, /* 1280x1024 */ 153 0x0C,0x0C,0x0C, /* 1280x1024 */
154 0x08,0x08,0x08, /* 640x480 */ 154 0x08,0x08,0x08, /* 640x480 */
155 0x0C,0x0C,0x0C, /* 1024x600 (guessed) */ 155 0x0C,0x0C,0x0C, /* 1024x600 (guessed) */
156 0x0C,0x0C,0x0C, /* 1152x864 (guessed) */ 156 0x0C,0x0C,0x0C, /* 1152x864 (guessed) */
157 0x0C,0x0C,0x0C, /* 1280x960 (guessed) */ 157 0x0C,0x0C,0x0C, /* 1280x960 (guessed) */
158 0x0C,0x0C,0x0C, /* 1152x768 (guessed) */ 158 0x0C,0x0C,0x0C, /* 1152x768 (guessed) */
159 0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */ 159 0x0C,0x0C,0x0C, /* 1400x1050 (guessed) */
160 0x0C,0x0C,0x0C, /* 1280x768 (guessed) */ 160 0x0C,0x0C,0x0C, /* 1280x768 (guessed) */
161 0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */ 161 0x0C,0x0C,0x0C, /* 1600x1200 (guessed) */
162 0x02,0x02,0x02, 162 0x02,0x02,0x02,
163 0x02,0x02,0x02, 163 0x02,0x02,0x02,
164 0x02,0x02,0x02, 164 0x02,0x02,0x02,
165 0x02,0x02,0x02 165 0x02,0x02,0x02
166}; 166};
167 167
168static const UCHAR SiS310_TVDelayCompensation_301[] = /* 301 */ 168static const unsigned char SiS310_TVDelayCompensation_301[] = /* 301 */
169{ 169{
170 0x02,0x02, /* NTSC Enhanced, Standard */ 170 0x02,0x02, /* NTSC Enhanced, Standard */
171 0x02,0x02, /* PAL */ 171 0x02,0x02, /* PAL */
172 0x08,0x0b /* HiVision */ 172 0x08,0x0b /* HiVision */
173}; 173};
174 174
175static const UCHAR SiS310_TVDelayCompensation_301B[] = /* 30xB, 30xLV */ 175static const unsigned char SiS310_TVDelayCompensation_301B[] = /* 30xB, 30xLV */
176{ 176{
177 0x03,0x03, 177 0x03,0x03,
178 0x03,0x03, 178 0x03,0x03,
179 0x03,0x03 179 0x03,0x03
180}; 180};
181 181
182static const UCHAR SiS310_TVDelayCompensation_740301B[] = /* 740 + 30xB (30xLV?) */ 182static const unsigned char SiS310_TVDelayCompensation_740301B[] = /* 740 + 30xB (30xLV?) */
183{ 183{
184 0x05,0x05, 184 0x05,0x05,
185 0x05,0x05, 185 0x05,0x05,
186 0x05,0x05 186 0x05,0x05
187}; 187};
188 188
189static const UCHAR SiS310_TVDelayCompensation_651301LV[] = /* M650, 651, 301LV */ 189static const unsigned char SiS310_TVDelayCompensation_651301LV[] = /* M650, 651, 301LV */
190{ 190{
191 0x33,0x33, 191 0x33,0x33,
192 0x33,0x33, 192 0x33,0x33,
193 0x33,0x33 193 0x33,0x33
194}; 194};
195 195
196static const UCHAR SiS310_TVDelayCompensation_651302LV[] = /* M650, 651, 302LV */ 196static const unsigned char SiS310_TVDelayCompensation_651302LV[] = /* M650, 651, 302LV */
197{ 197{
198 0x33,0x33, 198 0x33,0x33,
199 0x33,0x33, 199 0x33,0x33,
200 0x33,0x33 200 0x33,0x33
201}; 201};
202 202
203static const UCHAR SiS_TVDelay661_301[] = /* 661, 301 */ 203static const unsigned char SiS_TVDelay661_301[] = /* 661, 301 */
204{ 204{
205 0x44,0x44, 205 0x44,0x44,
206 0x44,0x44, 206 0x44,0x44,
207 0x00,0x00, 207 0x00,0x00,
208 0x44,0x44, 208 0x44,0x44,
209 0x44,0x44, 209 0x44,0x44,
210 0x44,0x44 210 0x44,0x44
211}; 211};
212 212
213static const UCHAR SiS_TVDelay661_301B[] = /* 661, 301B et al */ 213static const unsigned char SiS_TVDelay661_301B[] = /* 661, 301B et al */
214{ 214{
215 0x44,0x44, 215 0x44,0x44,
216 0x44,0x44, 216 0x44,0x44,
217 0x00,0x00, 217 0x00,0x00,
218 0x44,0x44, 218 0x44,0x44,
219 0x44,0x44, 219 0x44,0x44,
220 0x44,0x44 220 0x44,0x44
221}; 221};
222 222
223static const UCHAR SiS310_TVDelayCompensation_LVDS[] = /* LVDS */ 223static const unsigned char SiS310_TVDelayCompensation_LVDS[] = /* LVDS */
224{ 224{
225 0x0a,0x0a, 225 0x0a,0x0a,
226 0x0a,0x0a, 226 0x0a,0x0a,
227 0x0a,0x0a 227 0x0a,0x0a
228}; 228};
229 229
230static const UCHAR SiS310_TVAntiFlick1[6][2] = 230static const unsigned char SiS310_TVAntiFlick1[6][2] =
231{ 231{
232 {0x4,0x0}, 232 {0x4,0x0},
233 {0x4,0x8}, 233 {0x4,0x8},
234 {0x0,0x0}, 234 {0x0,0x0},
235 {0x0,0x0}, 235 {0x0,0x0},
236 {0x0,0x0}, 236 {0x0,0x0},
237 {0x0,0x0} 237 {0x0,0x0}
238}; 238};
239 239
240static const UCHAR SiS310_TVEdge1[6][2] = 240static const unsigned char SiS310_TVEdge1[6][2] =
241{ 241{
242 {0x0,0x4}, 242 {0x0,0x4},
243 {0x0,0x4}, 243 {0x0,0x4},
244 {0x0,0x0}, 244 {0x0,0x0},
245 {0x0,0x0}, 245 {0x0,0x0},
246 {0x0,0x0}, 246 {0x0,0x0},
247 {0x0,0x0} 247 {0x0,0x0}
248}; 248};
249 249
250static const UCHAR SiS310_TVYFilter1[5][8][4] = 250static const unsigned char SiS310_TVYFilter1[5][8][4] =
251{ 251{
252 { 252 {
253 {0x00,0xf4,0x10,0x38}, /* NTSC */ 253 {0x00,0xf4,0x10,0x38}, /* NTSC */
254 {0x00,0xf4,0x10,0x38}, 254 {0x00,0xf4,0x10,0x38},
255 {0xeb,0x04,0x25,0x18}, 255 {0xeb,0x04,0x25,0x18},
@@ -258,8 +258,8 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
258 {0xeb,0x04,0x25,0x18}, 258 {0xeb,0x04,0x25,0x18},
259 {0xee,0x0c,0x22,0x08}, 259 {0xee,0x0c,0x22,0x08},
260 {0xeb,0x15,0x25,0xf6} 260 {0xeb,0x15,0x25,0xf6}
261 }, 261 },
262 { 262 {
263 {0x00,0xf4,0x10,0x38}, /* PAL */ 263 {0x00,0xf4,0x10,0x38}, /* PAL */
264 {0x00,0xf4,0x10,0x38}, 264 {0x00,0xf4,0x10,0x38},
265 {0xf1,0xf7,0x1f,0x32}, 265 {0xf1,0xf7,0x1f,0x32},
@@ -268,8 +268,8 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
268 {0xf1,0xf7,0x1f,0x32}, 268 {0xf1,0xf7,0x1f,0x32},
269 {0xf3,0x00,0x1d,0x20}, 269 {0xf3,0x00,0x1d,0x20},
270 {0xfc,0xfb,0x14,0x2a} 270 {0xfc,0xfb,0x14,0x2a}
271 }, 271 },
272 { 272 {
273 {0x00,0x00,0x00,0x00}, /* HiVision */ 273 {0x00,0x00,0x00,0x00}, /* HiVision */
274 {0x00,0xf4,0x10,0x38}, 274 {0x00,0xf4,0x10,0x38},
275 {0x00,0xf4,0x10,0x38}, 275 {0x00,0xf4,0x10,0x38},
@@ -278,9 +278,9 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
278 {0x00,0xf4,0x10,0x38}, 278 {0x00,0xf4,0x10,0x38},
279 {0xeb,0x04,0x25,0x18}, 279 {0xeb,0x04,0x25,0x18},
280 {0xee,0x0c,0x22,0x08} 280 {0xee,0x0c,0x22,0x08}
281 }, 281 },
282 { 282 {
283 {0x00,0xf4,0x10,0x38}, /* PAL-M */ 283 {0x00,0xf4,0x10,0x38}, /* PAL-M */
284 {0x00,0xf4,0x10,0x38}, 284 {0x00,0xf4,0x10,0x38},
285 {0xeb,0x04,0x10,0x18}, 285 {0xeb,0x04,0x10,0x18},
286 {0xf7,0x06,0x19,0x14}, 286 {0xf7,0x06,0x19,0x14},
@@ -288,9 +288,9 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
288 {0xeb,0x04,0x25,0x18}, 288 {0xeb,0x04,0x25,0x18},
289 {0xeb,0x04,0x25,0x18}, 289 {0xeb,0x04,0x25,0x18},
290 {0xeb,0x15,0x25,0xf6} 290 {0xeb,0x15,0x25,0xf6}
291 }, 291 },
292 { 292 {
293 {0x00,0xf4,0x10,0x38}, /* PAL-N */ 293 {0x00,0xf4,0x10,0x38}, /* PAL-N */
294 {0x00,0xf4,0x10,0x38}, 294 {0x00,0xf4,0x10,0x38},
295 {0xeb,0x04,0x10,0x18}, 295 {0xeb,0x04,0x10,0x18},
296 {0xf7,0x06,0x19,0x14}, 296 {0xf7,0x06,0x19,0x14},
@@ -298,12 +298,12 @@ static const UCHAR SiS310_TVYFilter1[5][8][4] =
298 {0xeb,0x04,0x25,0x18}, 298 {0xeb,0x04,0x25,0x18},
299 {0xeb,0x04,0x25,0x18}, 299 {0xeb,0x04,0x25,0x18},
300 {0xeb,0x15,0x25,0xf6} 300 {0xeb,0x15,0x25,0xf6}
301 } 301 }
302}; 302};
303 303
304static const UCHAR SiS310_TVYFilter2[5][9][7] = 304static const unsigned char SiS310_TVYFilter2[5][9][7] =
305{ 305{
306 { 306 {
307 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* NTSC */ 307 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* NTSC */
308 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 308 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
309 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, 309 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@@ -313,8 +313,8 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
313 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 313 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
314 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38}, 314 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
315 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28} 315 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
316 }, 316 },
317 { 317 {
318 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL */ 318 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL */
319 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 319 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
320 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, 320 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
@@ -324,8 +324,8 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
324 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 324 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
325 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38}, 325 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
326 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28} 326 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
327 }, 327 },
328 { 328 {
329 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, /* HiVision */ 329 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, /* HiVision */
330 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, 330 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
331 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, 331 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
@@ -335,9 +335,9 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
335 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, 335 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
336 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}, 336 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22},
337 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22} 337 {0x00,0x00,0x00,0xF4,0xFF,0x1C,0x22}
338 }, 338 },
339 { 339 {
340 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-M */ 340 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-M */
341 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 341 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
342 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, 342 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
343 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 343 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@@ -346,9 +346,9 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
346 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 346 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
347 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38}, 347 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
348 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28} 348 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
349 }, 349 },
350 { 350 {
351 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-N */ 351 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, /* PAL-N */
352 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 352 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
353 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46}, 353 {0xFF,0x03,0x02,0xF6,0xFC,0x27,0x46},
354 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 354 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
@@ -357,58 +357,39 @@ static const UCHAR SiS310_TVYFilter2[5][9][7] =
357 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C}, 357 {0x01,0x02,0xFE,0xF7,0x03,0x27,0x3C},
358 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38}, 358 {0x01,0x01,0xFC,0xF8,0x08,0x26,0x38},
359 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28} 359 {0xFF,0xFF,0xFC,0x00,0x0F,0x22,0x28}
360 } 360 }
361}; 361};
362 362
363static const UCHAR SiS310_TVPhaseIncr1[3][2][4] = 363static const unsigned char SiS310_TVPhaseIncr1[3][2][4] =
364{ 364{
365 { 365 {
366 {0x21,0xed,0xba,0x08}, 366 {0x21,0xed,0xba,0x08},
367 {0x21,0xed,0xba,0x08} 367 {0x21,0xed,0xba,0x08}
368 }, 368 },
369 { 369 {
370 {0x2a,0x05,0xe3,0x00}, 370 {0x2a,0x05,0xe3,0x00},
371 {0x2a,0x05,0xe3,0x00} 371 {0x2a,0x05,0xe3,0x00}
372 }, 372 },
373 { 373 {
374 {0x2a,0x05,0xd3,0x00}, 374 {0x2a,0x05,0xd3,0x00},
375 {0x2a,0x05,0xd3,0x00} 375 {0x2a,0x05,0xd3,0x00}
376 } 376 }
377}; 377};
378 378
379static const UCHAR SiS310_TVPhaseIncr2[3][2][4] = 379static const unsigned char SiS310_TVPhaseIncr2[3][2][4] =
380{ 380{
381 { 381 {
382 {0x21,0xf0,0x7b,0xd6}, 382 {0x21,0xf0,0x7b,0xd6},
383 {0x21,0xf0,0x7b,0xd6} 383 {0x21,0xf0,0x7b,0xd6}
384 }, 384 },
385 { 385 {
386 {0x2a,0x0a,0x41,0xe9}, 386 {0x2a,0x0a,0x41,0xe9},
387 {0x2a,0x0a,0x41,0xe9} 387 {0x2a,0x0a,0x41,0xe9}
388 }, 388 },
389 { 389 {
390 {0x2a,0x05,0xd3,0x00}, 390 {0x2a,0x05,0xd3,0x00},
391 {0x2a,0x05,0xd3,0x00} 391 {0x2a,0x05,0xd3,0x00}
392 } 392 }
393};
394
395static const UCHAR SiS661_TVPhase[] = {
396 0x21,0xED,0xBA,0x08,
397 0x2A,0x05,0xE3,0x00,
398 0x21,0xE4,0x2E,0x9B,
399 0x21,0xF4,0x3E,0xBA,
400 0x1E,0x8B,0xA2,0xA7,
401 0x1E,0x83,0x0A,0xE0,
402 0x00,0x00,0x00,0x00,
403 0x00,0x00,0x00,0x00,
404 0x21,0xF0,0x7B,0xD6,
405 0x2A,0x09,0x86,0xE9,
406 0x21,0xE6,0xEF,0xA4,
407 0x21,0xF6,0x94,0x46,
408 0x1E,0x8B,0xA2,0xA7,
409 0x1E,0x83,0x0A,0xE0,
410 0x00,0x00,0x00,0x00,
411 0x00,0x00,0x00,0x00
412}; 393};
413 394
414/**************************************************************/ 395/**************************************************************/
@@ -417,7 +398,7 @@ static const UCHAR SiS661_TVPhase[] = {
417 398
418/* Inventec / Compaq Presario 3045US, 3017 */ 399/* Inventec / Compaq Presario 3045US, 3017 */
419 400
420static const SiS_LCDDataStruct SiS310_ExtCompaq1280x1024Data[] = 401static const struct SiS_LCDData SiS310_ExtCompaq1280x1024Data[] =
421{ 402{
422 { 211, 60,1024, 501,1688,1066}, 403 { 211, 60,1024, 501,1688,1066},
423 { 211, 60,1024, 508,1688,1066}, 404 { 211, 60,1024, 508,1688,1066},
@@ -431,17 +412,17 @@ static const SiS_LCDDataStruct SiS310_ExtCompaq1280x1024Data[] =
431 412
432/* Asus A2xxxH _2 */ 413/* Asus A2xxxH _2 */
433 414
434static const SiS_Part2PortTblStruct SiS310_CRT2Part2_Asus1024x768_3[] = 415static const struct SiS_Part2PortTbl SiS310_CRT2Part2_Asus1024x768_3[] =
435{ 416{
436 {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 417 {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
437 {{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 418 {{0x2c,0x13,0x9a,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
438 {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 419 {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
439 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, 420 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
440 {{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}, 421 {{0x38,0x13,0x13,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}},
441 {{0x38,0x13,0x16,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 422 {{0x38,0x13,0x16,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
442 {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}}, 423 {{0x36,0x13,0x13,0x25,0xff,0x5a,0x45,0x0a,0x07,0xfa,0x0a,0x24}},
443 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}}, 424 {{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
444 {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}} 425 {{0x25,0x13,0xc9,0x25,0xff,0x59,0x45,0x09,0x07,0xf9,0x09,0x24}}
445}; 426};
446 427
447 428
diff --git a/drivers/video/sis/osdef.h b/drivers/video/sis/osdef.h
index 15939b057713..841ca3190cd4 100644
--- a/drivers/video/sis/osdef.h
+++ b/drivers/video/sis/osdef.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * OS depending defines 4 * OS depending defines
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -55,8 +55,11 @@
55#define _SIS_OSDEF_H_ 55#define _SIS_OSDEF_H_
56 56
57/* The choices are: */ 57/* The choices are: */
58#define LINUX_KERNEL /* Linux kernel framebuffer */ 58#define SIS_LINUX_KERNEL /* Linux kernel framebuffer */
59/* #define LINUX_XF86 */ /* XFree86/X.org */ 59#undef SIS_XORG_XF86 /* XFree86/X.org */
60
61#undef SIS_LINUX_KERNEL_24
62#undef SIS_LINUX_KERNEL_26
60 63
61#ifdef OutPortByte 64#ifdef OutPortByte
62#undef OutPortByte 65#undef OutPortByte
@@ -86,8 +89,9 @@
86/* LINUX KERNEL */ 89/* LINUX KERNEL */
87/**********************************************************************/ 90/**********************************************************************/
88 91
89#ifdef LINUX_KERNEL 92#ifdef SIS_LINUX_KERNEL
90#include <linux/config.h> 93#include <linux/config.h>
94#include <linux/version.h>
91 95
92#ifdef CONFIG_FB_SIS_300 96#ifdef CONFIG_FB_SIS_300
93#define SIS300 97#define SIS300
@@ -97,6 +101,12 @@
97#define SIS315H 101#define SIS315H
98#endif 102#endif
99 103
104#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
105#define SIS_LINUX_KERNEL_26
106#else
107#define SIS_LINUX_KERNEL_24
108#endif
109
100#if !defined(SIS300) && !defined(SIS315H) 110#if !defined(SIS300) && !defined(SIS315H)
101#warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set 111#warning Neither CONFIG_FB_SIS_300 nor CONFIG_FB_SIS_315 is set
102#warning sisfb will not work! 112#warning sisfb will not work!
@@ -109,13 +119,15 @@
109#define InPortWord(p) inw((SISIOADDRESS)(p)) 119#define InPortWord(p) inw((SISIOADDRESS)(p))
110#define InPortLong(p) inl((SISIOADDRESS)(p)) 120#define InPortLong(p) inl((SISIOADDRESS)(p))
111#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset_io(MemoryAddress, value, MemorySize) 121#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset_io(MemoryAddress, value, MemorySize)
112#endif 122
123#endif /* LINUX_KERNEL */
113 124
114/**********************************************************************/ 125/**********************************************************************/
115/* XFree86/X.org */ 126/* XFree86/X.org */
116/**********************************************************************/ 127/**********************************************************************/
117 128
118#ifdef LINUX_XF86 129#ifdef SIS_XORG_XF86
130
119#define SIS300 131#define SIS300
120#define SIS315H 132#define SIS315H
121 133
@@ -126,6 +138,7 @@
126#define InPortWord(p) inSISREGW((IOADDRESS)(p)) 138#define InPortWord(p) inSISREGW((IOADDRESS)(p))
127#define InPortLong(p) inSISREGL((IOADDRESS)(p)) 139#define InPortLong(p) inSISREGL((IOADDRESS)(p))
128#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize) 140#define SiS_SetMemory(MemoryAddress,MemorySize,value) memset(MemoryAddress, value, MemorySize)
129#endif 141
142#endif /* XF86 */
130 143
131#endif /* _OSDEF_H_ */ 144#endif /* _OSDEF_H_ */
diff --git a/drivers/video/sis/sis.h b/drivers/video/sis/sis.h
index d0103c162e43..0b6e625d7331 100644
--- a/drivers/video/sis/sis.h
+++ b/drivers/video/sis/sis.h
@@ -1,8 +1,10 @@
1/* 1/*
2 * SiS 300/630/730/540/315/550/[M]650/651/[M]661[FM]X/740/[M]741[GX]/330/[M]760[GX] 2 * SiS 300/540/630[S]/730[S],
3 * SiS 315[E|PRO]/550/[M]65x/[M]661[F|M]X/740/[M]741[GX]/330/[M]76x[GX],
4 * XGI V3XT/V5/V8, Z7
3 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3 5 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
4 * 6 *
5 * Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. 7 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
6 * 8 *
7 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -19,8 +21,8 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
20 */ 22 */
21 23
22#ifndef _SIS_H 24#ifndef _SIS_H_
23#define _SIS_H 25#define _SIS_H_
24 26
25#include <linux/config.h> 27#include <linux/config.h>
26#include <linux/version.h> 28#include <linux/version.h>
@@ -35,26 +37,37 @@
35#include "vgatypes.h" 37#include "vgatypes.h"
36#include "vstruct.h" 38#include "vstruct.h"
37 39
38#define VER_MAJOR 1 40#define VER_MAJOR 1
39#define VER_MINOR 7 41#define VER_MINOR 8
40#define VER_LEVEL 17 42#define VER_LEVEL 9
41
42#undef SIS_CONFIG_COMPAT
43 43
44#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 44#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
45#include <linux/spinlock.h> 45#include <linux/spinlock.h>
46#define SIS_PCI_GET_CLASS(a, b) pci_get_class(a, b)
47#define SIS_PCI_GET_DEVICE(a,b,c) pci_get_device(a,b,c)
48#define SIS_PCI_GET_SLOT(a,b) pci_get_slot(a,b)
49#define SIS_PCI_PUT_DEVICE(a) pci_dev_put(a)
46#ifdef CONFIG_COMPAT 50#ifdef CONFIG_COMPAT
51#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,6,10)
47#include <linux/ioctl32.h> 52#include <linux/ioctl32.h>
48#define SIS_CONFIG_COMPAT 53#define SIS_OLD_CONFIG_COMPAT
49#endif 54#else
50#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19) 55#include <linux/smp_lock.h>
51#ifdef __x86_64__ 56#define SIS_NEW_CONFIG_COMPAT
52/* Shouldn't we check for CONFIG_IA32_EMULATION here? */ 57#endif
58#endif /* CONFIG_COMPAT */
59#else /* 2.4 */
60#define SIS_PCI_GET_CLASS(a, b) pci_find_class(a, b)
61#define SIS_PCI_GET_DEVICE(a,b,c) pci_find_device(a,b,c)
62#define SIS_PCI_GET_SLOT(a,b) pci_find_slot(a,b)
63#define SIS_PCI_PUT_DEVICE(a)
64#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,19)
65#ifdef __x86_64__ /* Shouldn't we check for CONFIG_IA32_EMULATION here? */
53#include <asm/ioctl32.h> 66#include <asm/ioctl32.h>
54#define SIS_CONFIG_COMPAT 67#define SIS_OLD_CONFIG_COMPAT
55#endif 68#endif
56#endif 69#endif
57 70#endif /* 2.4 */
58#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8) 71#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
59#define SIS_IOTYPE1 void __iomem 72#define SIS_IOTYPE1 void __iomem
60#define SIS_IOTYPE2 __iomem 73#define SIS_IOTYPE2 __iomem
@@ -79,228 +92,312 @@
79 92
80/* To be included in pci_ids.h */ 93/* To be included in pci_ids.h */
81#ifndef PCI_DEVICE_ID_SI_650_VGA 94#ifndef PCI_DEVICE_ID_SI_650_VGA
82#define PCI_DEVICE_ID_SI_650_VGA 0x6325 95#define PCI_DEVICE_ID_SI_650_VGA 0x6325
83#endif 96#endif
84#ifndef PCI_DEVICE_ID_SI_650 97#ifndef PCI_DEVICE_ID_SI_650
85#define PCI_DEVICE_ID_SI_650 0x0650 98#define PCI_DEVICE_ID_SI_650 0x0650
86#endif 99#endif
87#ifndef PCI_DEVICE_ID_SI_651 100#ifndef PCI_DEVICE_ID_SI_651
88#define PCI_DEVICE_ID_SI_651 0x0651 101#define PCI_DEVICE_ID_SI_651 0x0651
89#endif 102#endif
90#ifndef PCI_DEVICE_ID_SI_740 103#ifndef PCI_DEVICE_ID_SI_740
91#define PCI_DEVICE_ID_SI_740 0x0740 104#define PCI_DEVICE_ID_SI_740 0x0740
92#endif 105#endif
93#ifndef PCI_DEVICE_ID_SI_330 106#ifndef PCI_DEVICE_ID_SI_330
94#define PCI_DEVICE_ID_SI_330 0x0330 107#define PCI_DEVICE_ID_SI_330 0x0330
95#endif 108#endif
96#ifndef PCI_DEVICE_ID_SI_660_VGA 109#ifndef PCI_DEVICE_ID_SI_660_VGA
97#define PCI_DEVICE_ID_SI_660_VGA 0x6330 110#define PCI_DEVICE_ID_SI_660_VGA 0x6330
98#endif 111#endif
99#ifndef PCI_DEVICE_ID_SI_661 112#ifndef PCI_DEVICE_ID_SI_661
100#define PCI_DEVICE_ID_SI_661 0x0661 113#define PCI_DEVICE_ID_SI_661 0x0661
101#endif 114#endif
102#ifndef PCI_DEVICE_ID_SI_741 115#ifndef PCI_DEVICE_ID_SI_741
103#define PCI_DEVICE_ID_SI_741 0x0741 116#define PCI_DEVICE_ID_SI_741 0x0741
104#endif 117#endif
105#ifndef PCI_DEVICE_ID_SI_660 118#ifndef PCI_DEVICE_ID_SI_660
106#define PCI_DEVICE_ID_SI_660 0x0660 119#define PCI_DEVICE_ID_SI_660 0x0660
107#endif 120#endif
108#ifndef PCI_DEVICE_ID_SI_760 121#ifndef PCI_DEVICE_ID_SI_760
109#define PCI_DEVICE_ID_SI_760 0x0760 122#define PCI_DEVICE_ID_SI_760 0x0760
123#endif
124#ifndef PCI_DEVICE_ID_SI_761
125#define PCI_DEVICE_ID_SI_761 0x0761
126#endif
127
128#ifndef PCI_VENDOR_ID_XGI
129#define PCI_VENDOR_ID_XGI 0x18ca
130#endif
131
132#ifndef PCI_DEVICE_ID_XGI_20
133#define PCI_DEVICE_ID_XGI_20 0x0020
134#endif
135
136#ifndef PCI_DEVICE_ID_XGI_40
137#define PCI_DEVICE_ID_XGI_40 0x0040
110#endif 138#endif
111 139
112/* To be included in fb.h */ 140/* To be included in fb.h */
113#ifndef FB_ACCEL_SIS_GLAMOUR_2 141#ifndef FB_ACCEL_SIS_GLAMOUR_2
114#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */ 142#define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 65x, 740, 661, 741 */
115#endif 143#endif
116#ifndef FB_ACCEL_SIS_XABRE 144#ifndef FB_ACCEL_SIS_XABRE
117#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 760 */ 145#define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre"), 76x */
146#endif
147#ifndef FB_ACCEL_XGI_VOLARI_V
148#define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari Vx (V3XT, V5, V8) */
149#endif
150#ifndef FB_ACCEL_XGI_VOLARI_Z
151#define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */
118#endif 152#endif
119
120#define MAX_ROM_SCAN 0x10000
121 153
122/* ivideo->caps */ 154/* ivideo->caps */
123#define HW_CURSOR_CAP 0x80 155#define HW_CURSOR_CAP 0x80
124#define TURBO_QUEUE_CAP 0x40 156#define TURBO_QUEUE_CAP 0x40
125#define AGP_CMD_QUEUE_CAP 0x20 157#define AGP_CMD_QUEUE_CAP 0x20
126#define VM_CMD_QUEUE_CAP 0x10 158#define VM_CMD_QUEUE_CAP 0x10
127#define MMIO_CMD_QUEUE_CAP 0x08 159#define MMIO_CMD_QUEUE_CAP 0x08
128 160
129/* For 300 series */ 161/* For 300 series */
130#define TURBO_QUEUE_AREA_SIZE 0x80000 /* 512K */ 162#define TURBO_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
131#define HW_CURSOR_AREA_SIZE_300 0x1000 /* 4K */ 163#define HW_CURSOR_AREA_SIZE_300 4096 /* 4K */
132 164
133/* For 315/Xabre series */ 165/* For 315/Xabre series */
134#define COMMAND_QUEUE_AREA_SIZE 0x80000 /* 512K */ 166#define COMMAND_QUEUE_AREA_SIZE (512 * 1024) /* 512K */
135#define COMMAND_QUEUE_THRESHOLD 0x1F 167#define COMMAND_QUEUE_AREA_SIZE_Z7 (128 * 1024) /* 128k for XGI Z7 */
136#define HW_CURSOR_AREA_SIZE_315 0x4000 /* 16K */ 168#define HW_CURSOR_AREA_SIZE_315 16384 /* 16K */
137 169#define COMMAND_QUEUE_THRESHOLD 0x1F
138#define SIS_OH_ALLOC_SIZE 4000 170
139#define SENTINEL 0x7fffffff 171#define SIS_OH_ALLOC_SIZE 4000
140 172#define SENTINEL 0x7fffffff
141#define SEQ_ADR 0x14 173
142#define SEQ_DATA 0x15 174#define SEQ_ADR 0x14
143#define DAC_ADR 0x18 175#define SEQ_DATA 0x15
144#define DAC_DATA 0x19 176#define DAC_ADR 0x18
145#define CRTC_ADR 0x24 177#define DAC_DATA 0x19
146#define CRTC_DATA 0x25 178#define CRTC_ADR 0x24
147#define DAC2_ADR (0x16-0x30) 179#define CRTC_DATA 0x25
148#define DAC2_DATA (0x17-0x30) 180#define DAC2_ADR (0x16-0x30)
149#define VB_PART1_ADR (0x04-0x30) 181#define DAC2_DATA (0x17-0x30)
150#define VB_PART1_DATA (0x05-0x30) 182#define VB_PART1_ADR (0x04-0x30)
151#define VB_PART2_ADR (0x10-0x30) 183#define VB_PART1_DATA (0x05-0x30)
152#define VB_PART2_DATA (0x11-0x30) 184#define VB_PART2_ADR (0x10-0x30)
153#define VB_PART3_ADR (0x12-0x30) 185#define VB_PART2_DATA (0x11-0x30)
154#define VB_PART3_DATA (0x13-0x30) 186#define VB_PART3_ADR (0x12-0x30)
155#define VB_PART4_ADR (0x14-0x30) 187#define VB_PART3_DATA (0x13-0x30)
156#define VB_PART4_DATA (0x15-0x30) 188#define VB_PART4_ADR (0x14-0x30)
157 189#define VB_PART4_DATA (0x15-0x30)
158#define SISSR ivideo->SiS_Pr.SiS_P3c4 190
159#define SISCR ivideo->SiS_Pr.SiS_P3d4 191#define SISSR ivideo->SiS_Pr.SiS_P3c4
160#define SISDACA ivideo->SiS_Pr.SiS_P3c8 192#define SISCR ivideo->SiS_Pr.SiS_P3d4
161#define SISDACD ivideo->SiS_Pr.SiS_P3c9 193#define SISDACA ivideo->SiS_Pr.SiS_P3c8
162#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port 194#define SISDACD ivideo->SiS_Pr.SiS_P3c9
163#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port 195#define SISPART1 ivideo->SiS_Pr.SiS_Part1Port
164#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port 196#define SISPART2 ivideo->SiS_Pr.SiS_Part2Port
165#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port 197#define SISPART3 ivideo->SiS_Pr.SiS_Part3Port
166#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port 198#define SISPART4 ivideo->SiS_Pr.SiS_Part4Port
167#define SISDAC2A SISPART5 199#define SISPART5 ivideo->SiS_Pr.SiS_Part5Port
168#define SISDAC2D (SISPART5 + 1) 200#define SISDAC2A SISPART5
169#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c) 201#define SISDAC2D (SISPART5 + 1)
170#define SISMISCW ivideo->SiS_Pr.SiS_P3c2 202#define SISMISCR (ivideo->SiS_Pr.RelIO + 0x1c)
171#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a) 203#define SISMISCW ivideo->SiS_Pr.SiS_P3c2
172#define SISPEL ivideo->SiS_Pr.SiS_P3c6 204#define SISINPSTAT (ivideo->SiS_Pr.RelIO + 0x2a)
173 205#define SISPEL ivideo->SiS_Pr.SiS_P3c6
174#define IND_SIS_PASSWORD 0x05 /* SRs */ 206#define SISVGAENABLE (ivideo->SiS_Pr.RelIO + 0x13)
175#define IND_SIS_COLOR_MODE 0x06 207#define SISVID (ivideo->SiS_Pr.RelIO + 0x02 - 0x30)
176#define IND_SIS_RAMDAC_CONTROL 0x07 208#define SISCAP (ivideo->SiS_Pr.RelIO + 0x00 - 0x30)
177#define IND_SIS_DRAM_SIZE 0x14 209
178#define IND_SIS_MODULE_ENABLE 0x1E 210#define IND_SIS_PASSWORD 0x05 /* SRs */
179#define IND_SIS_PCI_ADDRESS_SET 0x20 211#define IND_SIS_COLOR_MODE 0x06
180#define IND_SIS_TURBOQUEUE_ADR 0x26 212#define IND_SIS_RAMDAC_CONTROL 0x07
181#define IND_SIS_TURBOQUEUE_SET 0x27 213#define IND_SIS_DRAM_SIZE 0x14
182#define IND_SIS_POWER_ON_TRAP 0x38 214#define IND_SIS_MODULE_ENABLE 0x1E
183#define IND_SIS_POWER_ON_TRAP2 0x39 215#define IND_SIS_PCI_ADDRESS_SET 0x20
184#define IND_SIS_CMDQUEUE_SET 0x26 216#define IND_SIS_TURBOQUEUE_ADR 0x26
185#define IND_SIS_CMDQUEUE_THRESHOLD 0x27 217#define IND_SIS_TURBOQUEUE_SET 0x27
186 218#define IND_SIS_POWER_ON_TRAP 0x38
187#define IND_SIS_AGP_IO_PAD 0x48 219#define IND_SIS_POWER_ON_TRAP2 0x39
188 220#define IND_SIS_CMDQUEUE_SET 0x26
189#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */ 221#define IND_SIS_CMDQUEUE_THRESHOLD 0x27
190#define SIS_CRT2_WENABLE_315 0x2F 222
191 223#define IND_SIS_AGP_IO_PAD 0x48
192#define SIS_PASSWORD 0x86 /* SR05 */ 224
193 225#define SIS_CRT2_WENABLE_300 0x24 /* Part1 */
194#define SIS_INTERLACED_MODE 0x20 /* SR06 */ 226#define SIS_CRT2_WENABLE_315 0x2F
195#define SIS_8BPP_COLOR_MODE 0x0 227
196#define SIS_15BPP_COLOR_MODE 0x1 228#define SIS_PASSWORD 0x86 /* SR05 */
197#define SIS_16BPP_COLOR_MODE 0x2 229
198#define SIS_32BPP_COLOR_MODE 0x4 230#define SIS_INTERLACED_MODE 0x20 /* SR06 */
199 231#define SIS_8BPP_COLOR_MODE 0x0
200#define SIS_ENABLE_2D 0x40 /* SR1E */ 232#define SIS_15BPP_COLOR_MODE 0x1
201 233#define SIS_16BPP_COLOR_MODE 0x2
202#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */ 234#define SIS_32BPP_COLOR_MODE 0x4
203#define SIS_PCI_ADDR_ENABLE 0x80 235
204 236#define SIS_ENABLE_2D 0x40 /* SR1E */
205#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330 series SR26 */ 237
206#define SIS_VRAM_CMDQUEUE_ENABLE 0x40 238#define SIS_MEM_MAP_IO_ENABLE 0x01 /* SR20 */
207#define SIS_MMIO_CMD_ENABLE 0x20 239#define SIS_PCI_ADDR_ENABLE 0x80
208#define SIS_CMD_QUEUE_SIZE_512k 0x00 240
209#define SIS_CMD_QUEUE_SIZE_1M 0x04 241#define SIS_AGP_CMDQUEUE_ENABLE 0x80 /* 315/330/340 series SR26 */
210#define SIS_CMD_QUEUE_SIZE_2M 0x08 242#define SIS_VRAM_CMDQUEUE_ENABLE 0x40
211#define SIS_CMD_QUEUE_SIZE_4M 0x0C 243#define SIS_MMIO_CMD_ENABLE 0x20
212#define SIS_CMD_QUEUE_RESET 0x01 244#define SIS_CMD_QUEUE_SIZE_512k 0x00
213#define SIS_CMD_AUTO_CORR 0x02 245#define SIS_CMD_QUEUE_SIZE_1M 0x04
214 246#define SIS_CMD_QUEUE_SIZE_2M 0x08
215#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */ 247#define SIS_CMD_QUEUE_SIZE_4M 0x0C
216#define SIS_MODE_SELECT_CRT2 0x02 248#define SIS_CMD_QUEUE_RESET 0x01
217#define SIS_VB_OUTPUT_COMPOSITE 0x04 249#define SIS_CMD_AUTO_CORR 0x02
218#define SIS_VB_OUTPUT_SVIDEO 0x08 250
219#define SIS_VB_OUTPUT_SCART 0x10 251#define SIS_CMD_QUEUE_SIZE_Z7_64k 0x00 /* XGI Z7 */
220#define SIS_VB_OUTPUT_LCD 0x20 252#define SIS_CMD_QUEUE_SIZE_Z7_128k 0x04
221#define SIS_VB_OUTPUT_CRT2 0x40 253
222#define SIS_VB_OUTPUT_HIVISION 0x80 254#define SIS_SIMULTANEOUS_VIEW_ENABLE 0x01 /* CR30 */
223 255#define SIS_MODE_SELECT_CRT2 0x02
224#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */ 256#define SIS_VB_OUTPUT_COMPOSITE 0x04
225#define SIS_DRIVER_MODE 0x40 257#define SIS_VB_OUTPUT_SVIDEO 0x08
226 258#define SIS_VB_OUTPUT_SCART 0x10
227#define SIS_VB_COMPOSITE 0x01 /* CR32 */ 259#define SIS_VB_OUTPUT_LCD 0x20
228#define SIS_VB_SVIDEO 0x02 260#define SIS_VB_OUTPUT_CRT2 0x40
229#define SIS_VB_SCART 0x04 261#define SIS_VB_OUTPUT_HIVISION 0x80
230#define SIS_VB_LCD 0x08 262
231#define SIS_VB_CRT2 0x10 263#define SIS_VB_OUTPUT_DISABLE 0x20 /* CR31 */
232#define SIS_CRT1 0x20 264#define SIS_DRIVER_MODE 0x40
233#define SIS_VB_HIVISION 0x40 265
234#define SIS_VB_YPBPR 0x80 266#define SIS_VB_COMPOSITE 0x01 /* CR32 */
235#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \ 267#define SIS_VB_SVIDEO 0x02
236 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR) 268#define SIS_VB_SCART 0x04
237 269#define SIS_VB_LCD 0x08
238#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */ 270#define SIS_VB_CRT2 0x10
239#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */ 271#define SIS_CRT1 0x20
240#define SIS_EXTERNAL_CHIP_LVDS 0x02 272#define SIS_VB_HIVISION 0x40
241#define SIS_EXTERNAL_CHIP_TRUMPION 0x03 273#define SIS_VB_YPBPR 0x80
242#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04 274#define SIS_VB_TV (SIS_VB_COMPOSITE | SIS_VB_SVIDEO | \
243#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05 275 SIS_VB_SCART | SIS_VB_HIVISION | SIS_VB_YPBPR)
244#define SIS310_EXTERNAL_CHIP_LVDS 0x02 276
245#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03 277#define SIS_EXTERNAL_CHIP_MASK 0x0E /* CR37 (< SiS 660) */
246 278#define SIS_EXTERNAL_CHIP_SIS301 0x01 /* in CR37 << 1 ! */
247#define SIS_AGP_2X 0x20 /* CR48 */ 279#define SIS_EXTERNAL_CHIP_LVDS 0x02
248 280#define SIS_EXTERNAL_CHIP_TRUMPION 0x03
249#define HW_DEVICE_EXTENSION SIS_HW_INFO 281#define SIS_EXTERNAL_CHIP_LVDS_CHRONTEL 0x04
250#define PHW_DEVICE_EXTENSION PSIS_HW_INFO 282#define SIS_EXTERNAL_CHIP_CHRONTEL 0x05
283#define SIS310_EXTERNAL_CHIP_LVDS 0x02
284#define SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL 0x03
285
286#define SIS_AGP_2X 0x20 /* CR48 */
287
288/* vbflags, private entries (others in sisfb.h) */
289#define VB_CONEXANT 0x00000800 /* 661 series only */
290#define VB_TRUMPION VB_CONEXANT /* 300 series only */
291#define VB_302ELV 0x00004000
292#define VB_301 0x00100000 /* Video bridge type */
293#define VB_301B 0x00200000
294#define VB_302B 0x00400000
295#define VB_30xBDH 0x00800000 /* 30xB DH version (w/o LCD support) */
296#define VB_LVDS 0x01000000
297#define VB_CHRONTEL 0x02000000
298#define VB_301LV 0x04000000
299#define VB_302LV 0x08000000
300#define VB_301C 0x10000000
301
302#define VB_SISBRIDGE (VB_301|VB_301B|VB_301C|VB_302B|VB_301LV|VB_302LV|VB_302ELV)
303#define VB_VIDEOBRIDGE (VB_SISBRIDGE | VB_LVDS | VB_CHRONTEL | VB_CONEXANT)
304
305/* vbflags2 (static stuff only!) */
306#define VB2_SISUMC 0x00000001
307#define VB2_301 0x00000002 /* Video bridge type */
308#define VB2_301B 0x00000004
309#define VB2_301C 0x00000008
310#define VB2_307T 0x00000010
311#define VB2_302B 0x00000800
312#define VB2_301LV 0x00001000
313#define VB2_302LV 0x00002000
314#define VB2_302ELV 0x00004000
315#define VB2_307LV 0x00008000
316#define VB2_30xBDH 0x08000000 /* 30xB DH version (w/o LCD support) */
317#define VB2_CONEXANT 0x10000000
318#define VB2_TRUMPION 0x20000000
319#define VB2_LVDS 0x40000000
320#define VB2_CHRONTEL 0x80000000
321
322#define VB2_SISLVDSBRIDGE (VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
323#define VB2_SISTMDSBRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
324#define VB2_SISBRIDGE (VB2_SISLVDSBRIDGE | VB2_SISTMDSBRIDGE)
325
326#define VB2_SISTMDSLCDABRIDGE (VB2_301C | VB2_307T)
327#define VB2_SISLCDABRIDGE (VB2_SISTMDSLCDABRIDGE | VB2_301LV | VB2_302LV | VB2_302ELV | VB2_307LV)
328
329#define VB2_SISHIVISIONBRIDGE (VB2_301 | VB2_301B | VB2_302B)
330#define VB2_SISYPBPRBRIDGE (VB2_301C | VB2_307T | VB2_SISLVDSBRIDGE)
331#define VB2_SISYPBPRARBRIDGE (VB2_301C | VB2_307T | VB2_307LV)
332#define VB2_SISTAP4SCALER (VB2_301C | VB2_307T | VB2_302ELV | VB2_307LV)
333#define VB2_SISTVBRIDGE (VB2_SISHIVISIONBRIDGE | VB2_SISYPBPRBRIDGE)
334
335#define VB2_SISVGA2BRIDGE (VB2_301 | VB2_301B | VB2_301C | VB2_302B | VB2_307T)
336
337#define VB2_VIDEOBRIDGE (VB2_SISBRIDGE | VB2_LVDS | VB2_CHRONTEL | VB2_CONEXANT)
338
339#define VB2_30xB (VB2_301B | VB2_301C | VB2_302B | VB2_307T)
340#define VB2_30xBLV (VB2_30xB | VB2_SISLVDSBRIDGE)
341#define VB2_30xC (VB2_301C | VB2_307T)
342#define VB2_30xCLV (VB2_301C | VB2_307T | VB2_302ELV| VB2_307LV)
343#define VB2_SISEMIBRIDGE (VB2_302LV | VB2_302ELV | VB2_307LV)
344#define VB2_LCD162MHZBRIDGE (VB2_301C | VB2_307T)
345#define VB2_LCDOVER1280BRIDGE (VB2_301C | VB2_307T | VB2_302LV | VB2_302ELV | VB2_307LV)
346#define VB2_LCDOVER1600BRIDGE (VB2_307T | VB2_307LV)
347#define VB2_RAMDAC202MHZBRIDGE (VB2_301C | VB2_307T)
251 348
252/* I/O port access macros */ 349/* I/O port access macros */
253#define inSISREG(base) inb(base) 350#define inSISREG(base) inb(base)
254 351
255#define outSISREG(base,val) outb(val,base) 352#define outSISREG(base,val) outb(val,base)
256 353
257#define orSISREG(base,val) \ 354#define orSISREG(base,val) \
258 do { \ 355 do { \
259 u8 __Temp = inSISREG(base); \ 356 u8 __Temp = inSISREG(base); \
260 outSISREG(base, __Temp | (val)); \ 357 outSISREG(base, __Temp | (val));\
261 } while (0) 358 } while (0)
262 359
263#define andSISREG(base,val) \ 360#define andSISREG(base,val) \
264 do { \ 361 do { \
265 u8 __Temp = inSISREG(base); \ 362 u8 __Temp = inSISREG(base); \
266 outSISREG(base, __Temp & (val)); \ 363 outSISREG(base, __Temp & (val));\
267 } while (0) 364 } while (0)
268 365
269#define inSISIDXREG(base,idx,var) \ 366#define inSISIDXREG(base,idx,var) \
270 do { \ 367 do { \
271 outSISREG(base, idx); \ 368 outSISREG(base, idx); \
272 var = inSISREG((base)+1); \ 369 var = inSISREG((base)+1); \
273 } while (0) 370 } while (0)
274 371
275#define outSISIDXREG(base,idx,val) \ 372#define outSISIDXREG(base,idx,val) \
276 do { \ 373 do { \
277 outSISREG(base, idx); \ 374 outSISREG(base, idx); \
278 outSISREG((base)+1, val); \ 375 outSISREG((base)+1, val); \
279 } while (0) 376 } while (0)
280 377
281#define orSISIDXREG(base,idx,val) \ 378#define orSISIDXREG(base,idx,val) \
282 do { \ 379 do { \
283 u8 __Temp; \ 380 u8 __Temp; \
284 outSISREG(base, idx); \ 381 outSISREG(base, idx); \
285 __Temp = inSISREG((base)+1) | (val); \ 382 __Temp = inSISREG((base)+1) | (val); \
286 outSISREG((base)+1, __Temp); \ 383 outSISREG((base)+1, __Temp); \
287 } while (0) 384 } while (0)
288 385
289#define andSISIDXREG(base,idx,and) \ 386#define andSISIDXREG(base,idx,and) \
290 do { \ 387 do { \
291 u8 __Temp; \ 388 u8 __Temp; \
292 outSISREG(base, idx); \ 389 outSISREG(base, idx); \
293 __Temp = inSISREG((base)+1) & (and); \ 390 __Temp = inSISREG((base)+1) & (and); \
294 outSISREG((base)+1, __Temp); \ 391 outSISREG((base)+1, __Temp); \
295 } while (0) 392 } while (0)
296 393
297#define setSISIDXREG(base,idx,and,or) \ 394#define setSISIDXREG(base,idx,and,or) \
298 do { \ 395 do { \
299 u8 __Temp; \ 396 u8 __Temp; \
300 outSISREG(base, idx); \ 397 outSISREG(base, idx); \
301 __Temp = (inSISREG((base)+1) & (and)) | (or); \ 398 __Temp = (inSISREG((base)+1) & (and)) | (or); \
302 outSISREG((base)+1, __Temp); \ 399 outSISREG((base)+1, __Temp); \
303 } while (0) 400 } while (0)
304 401
305/* MMIO access macros */ 402/* MMIO access macros */
306#define MMIO_IN8(base, offset) readb((base+offset)) 403#define MMIO_IN8(base, offset) readb((base+offset))
@@ -322,19 +419,19 @@
322#define MMIO_QUEUE_READPORT Q_READ_PTR 419#define MMIO_QUEUE_READPORT Q_READ_PTR
323 420
324#ifndef FB_BLANK_UNBLANK 421#ifndef FB_BLANK_UNBLANK
325#define FB_BLANK_UNBLANK 0 422#define FB_BLANK_UNBLANK 0
326#endif 423#endif
327#ifndef FB_BLANK_NORMAL 424#ifndef FB_BLANK_NORMAL
328#define FB_BLANK_NORMAL 1 425#define FB_BLANK_NORMAL 1
329#endif 426#endif
330#ifndef FB_BLANK_VSYNC_SUSPEND 427#ifndef FB_BLANK_VSYNC_SUSPEND
331#define FB_BLANK_VSYNC_SUSPEND 2 428#define FB_BLANK_VSYNC_SUSPEND 2
332#endif 429#endif
333#ifndef FB_BLANK_HSYNC_SUSPEND 430#ifndef FB_BLANK_HSYNC_SUSPEND
334#define FB_BLANK_HSYNC_SUSPEND 3 431#define FB_BLANK_HSYNC_SUSPEND 3
335#endif 432#endif
336#ifndef FB_BLANK_POWERDOWN 433#ifndef FB_BLANK_POWERDOWN
337#define FB_BLANK_POWERDOWN 4 434#define FB_BLANK_POWERDOWN 4
338#endif 435#endif
339 436
340enum _SIS_LCD_TYPE { 437enum _SIS_LCD_TYPE {
@@ -347,18 +444,19 @@ enum _SIS_LCD_TYPE {
347 LCD_1600x1200, 444 LCD_1600x1200,
348 LCD_1920x1440, 445 LCD_1920x1440,
349 LCD_2048x1536, 446 LCD_2048x1536,
350 LCD_320x480, /* FSTN */ 447 LCD_320x240, /* FSTN */
351 LCD_1400x1050, 448 LCD_1400x1050,
352 LCD_1152x864, 449 LCD_1152x864,
353 LCD_1152x768, 450 LCD_1152x768,
354 LCD_1280x768, 451 LCD_1280x768,
355 LCD_1024x600, 452 LCD_1024x600,
356 LCD_640x480_2, /* DSTN */ 453 LCD_320x240_2, /* DSTN */
357 LCD_640x480_3, /* DSTN */ 454 LCD_320x240_3, /* DSTN */
358 LCD_848x480, 455 LCD_848x480,
359 LCD_1280x800, 456 LCD_1280x800,
360 LCD_1680x1050, 457 LCD_1680x1050,
361 LCD_1280x720, 458 LCD_1280x720,
459 LCD_1280x854,
362 LCD_CUSTOM, 460 LCD_CUSTOM,
363 LCD_UNKNOWN 461 LCD_UNKNOWN
364}; 462};
@@ -368,31 +466,50 @@ enum _SIS_CMDTYPE {
368 AGP_CMD_QUEUE, 466 AGP_CMD_QUEUE,
369 VM_CMD_QUEUE, 467 VM_CMD_QUEUE,
370}; 468};
371typedef unsigned int SIS_CMDTYPE; 469
470struct SIS_OH {
471 struct SIS_OH *poh_next;
472 struct SIS_OH *poh_prev;
473 u32 offset;
474 u32 size;
475};
476
477struct SIS_OHALLOC {
478 struct SIS_OHALLOC *poha_next;
479 struct SIS_OH aoh[1];
480};
481
482struct SIS_HEAP {
483 struct SIS_OH oh_free;
484 struct SIS_OH oh_used;
485 struct SIS_OH *poh_freelist;
486 struct SIS_OHALLOC *poha_chain;
487 u32 max_freesize;
488 struct sis_video_info *vinfo;
489};
372 490
373/* Our "par" */ 491/* Our "par" */
374struct sis_video_info { 492struct sis_video_info {
375 int cardnumber; 493 int cardnumber;
376 struct fb_info *memyselfandi; 494 struct fb_info *memyselfandi;
377 495
378 SIS_HW_INFO sishw_ext; 496 struct SiS_Private SiS_Pr;
379 SiS_Private SiS_Pr;
380 497
381 sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */ 498 struct sisfb_info sisfbinfo; /* For ioctl SISFB_GET_INFO */
382 499
383 struct fb_var_screeninfo default_var; 500 struct fb_var_screeninfo default_var;
384 501
385#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 502#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
386 struct fb_fix_screeninfo sisfb_fix; 503 struct fb_fix_screeninfo sisfb_fix;
387 u32 pseudo_palette[17]; 504 u32 pseudo_palette[17];
388#endif 505#endif
389 506
390#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 507#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
391 struct display sis_disp; 508 struct display sis_disp;
392 struct display_switch sisfb_sw; 509 struct display_switch sisfb_sw;
393 struct { 510 struct {
394 u16 red, green, blue, pad; 511 u16 red, green, blue, pad;
395 } sis_palette[256]; 512 } sis_palette[256];
396 union { 513 union {
397#ifdef FBCON_HAS_CFB16 514#ifdef FBCON_HAS_CFB16
398 u16 cfb16[16]; 515 u16 cfb16[16];
@@ -400,10 +517,10 @@ struct sis_video_info {
400#ifdef FBCON_HAS_CFB32 517#ifdef FBCON_HAS_CFB32
401 u32 cfb32[16]; 518 u32 cfb32[16];
402#endif 519#endif
403 } sis_fbcon_cmap; 520 } sis_fbcon_cmap;
404#endif 521#endif
405 522
406 struct sisfb_monitor { 523 struct sisfb_monitor {
407 u16 hmin; 524 u16 hmin;
408 u16 hmax; 525 u16 hmax;
409 u16 vmin; 526 u16 vmin;
@@ -411,163 +528,166 @@ struct sis_video_info {
411 u32 dclockmax; 528 u32 dclockmax;
412 u8 feature; 529 u8 feature;
413 BOOLEAN datavalid; 530 BOOLEAN datavalid;
414 } sisfb_thismonitor; 531 } sisfb_thismonitor;
415 532
416 int chip_id; 533 unsigned short chip_id; /* PCI ID of chip */
534 unsigned short chip_vendor; /* PCI ID of vendor */
417 char myid[40]; 535 char myid[40];
418 536
419 struct pci_dev *nbridge; 537 struct pci_dev *nbridge;
538 struct pci_dev *lpcdev;
420 539
421 int mni; /* Mode number index */ 540 int mni; /* Mode number index */
422 541
423#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 542#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
424 int currcon; 543 int currcon;
425#endif 544#endif
426 545
427 unsigned long video_size; 546 unsigned long video_size;
428 unsigned long video_base; 547 unsigned long video_base;
429 unsigned long mmio_size; 548 unsigned long mmio_size;
430 unsigned long mmio_base; 549 unsigned long mmio_base;
431 unsigned long vga_base; 550 unsigned long vga_base;
551
552 unsigned long video_offset;
432 553
433 SIS_IOTYPE1 *video_vbase; 554 unsigned long UMAsize, LFBsize;
434 SIS_IOTYPE1 *mmio_vbase;
435 555
436 unsigned char *bios_abase; 556 SIS_IOTYPE1 *video_vbase;
557 SIS_IOTYPE1 *mmio_vbase;
437 558
438 int mtrr; 559 unsigned char *bios_abase;
560
561 int mtrr;
439 562
440 u32 sisfb_mem; 563 u32 sisfb_mem;
441 564
442 u32 sisfb_parm_mem; 565 u32 sisfb_parm_mem;
443 int sisfb_accel; 566 int sisfb_accel;
444 int sisfb_ypan; 567 int sisfb_ypan;
445 int sisfb_max; 568 int sisfb_max;
446 int sisfb_userom; 569 int sisfb_userom;
447 int sisfb_useoem; 570 int sisfb_useoem;
448 int sisfb_mode_idx; 571 int sisfb_mode_idx;
449 int sisfb_parm_rate; 572 int sisfb_parm_rate;
450 int sisfb_crt1off; 573 int sisfb_crt1off;
451 int sisfb_forcecrt1; 574 int sisfb_forcecrt1;
452 int sisfb_crt2type; 575 int sisfb_crt2type;
453 int sisfb_crt2flags; 576 int sisfb_crt2flags;
454 int sisfb_dstn; 577 int sisfb_dstn;
455 int sisfb_fstn; 578 int sisfb_fstn;
456 int sisfb_tvplug; 579 int sisfb_tvplug;
457 int sisfb_tvstd; 580 int sisfb_tvstd;
458 int sisfb_filter;
459 int sisfb_nocrt2rate; 581 int sisfb_nocrt2rate;
460#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 582#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
461 int sisfb_inverse; 583 int sisfb_inverse;
462#endif 584#endif
463 585
464 u32 heapstart; /* offset */ 586 u32 heapstart; /* offset */
465 SIS_IOTYPE1 *sisfb_heap_start; /* address */ 587 SIS_IOTYPE1 *sisfb_heap_start; /* address */
466 SIS_IOTYPE1 *sisfb_heap_end; /* address */ 588 SIS_IOTYPE1 *sisfb_heap_end; /* address */
467 u32 sisfb_heap_size; 589 u32 sisfb_heap_size;
468 int havenoheap; 590 int havenoheap;
469#if 0
470 SIS_HEAP sisfb_heap;
471#endif
472 591
592 struct SIS_HEAP sisfb_heap; /* This card's vram heap */
473 593
474 int video_bpp; 594 int video_bpp;
475 int video_cmap_len; 595 int video_cmap_len;
476 int video_width; 596 int video_width;
477 int video_height; 597 int video_height;
478 unsigned int refresh_rate; 598 unsigned int refresh_rate;
479 599
480 unsigned int chip; 600 unsigned int chip;
481 u8 revision_id; 601 u8 revision_id;
602 int sisvga_enabled; /* PCI device was enabled */
482 603
483 int video_linelength; /* real pitch */ 604 int video_linelength; /* real pitch */
484 int scrnpitchCRT1; /* pitch regarding interlace */ 605 int scrnpitchCRT1; /* pitch regarding interlace */
485 606
486 u16 DstColor; /* For 2d acceleration */ 607 u16 DstColor; /* For 2d acceleration */
487 u32 SiS310_AccelDepth; 608 u32 SiS310_AccelDepth;
488 u32 CommandReg; 609 u32 CommandReg;
489 int cmdqueuelength; 610 int cmdqueuelength; /* Current (for accel) */
611 u32 cmdQueueSize; /* Total size in KB */
490 612
491 spinlock_t lockaccel; /* Do not use outside of kernel! */ 613 spinlock_t lockaccel; /* Do not use outside of kernel! */
492 614
493 unsigned int pcibus; 615 unsigned int pcibus;
494 unsigned int pcislot; 616 unsigned int pcislot;
495 unsigned int pcifunc; 617 unsigned int pcifunc;
496 618
497 int accel; 619 int accel;
620 int engineok;
498 621
499 u16 subsysvendor; 622 u16 subsysvendor;
500 u16 subsysdevice; 623 u16 subsysdevice;
501 624
502 u32 vbflags; /* Replacing deprecated stuff from above */ 625 u32 vbflags; /* Replacing deprecated stuff from above */
503 u32 currentvbflags; 626 u32 currentvbflags;
627 u32 vbflags2;
504 628
505 int lcdxres, lcdyres; 629 int lcdxres, lcdyres;
506 int lcddefmodeidx, tvdefmodeidx, defmodeidx; 630 int lcddefmodeidx, tvdefmodeidx, defmodeidx;
507 u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */ 631 u32 CRT2LCDType; /* defined in "SIS_LCD_TYPE" */
508 632 u32 curFSTN, curDSTN;
509 int current_bpp; 633
510 int current_width; 634 int current_bpp;
511 int current_height; 635 int current_width;
512 int current_htotal; 636 int current_height;
513 int current_vtotal; 637 int current_htotal;
638 int current_vtotal;
514 int current_linelength; 639 int current_linelength;
515 __u32 current_pixclock; 640 __u32 current_pixclock;
516 int current_refresh_rate; 641 int current_refresh_rate;
642
643 unsigned int current_base;
517 644
518 u8 mode_no; 645 u8 mode_no;
519 u8 rate_idx; 646 u8 rate_idx;
520 int modechanged; 647 int modechanged;
521 unsigned char modeprechange; 648 unsigned char modeprechange;
522 649
523#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 650#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
524 u8 sisfb_lastrates[128]; 651 u8 sisfb_lastrates[128];
525#endif 652#endif
526 653
527 int newrom; 654 int newrom;
528 int registered; 655 int haveXGIROM;
656 int registered;
529 int warncount; 657 int warncount;
658#ifdef SIS_OLD_CONFIG_COMPAT
659 int ioctl32registered;
660#endif
530 661
531 int sisvga_engine; 662 int sisvga_engine;
532 int hwcursor_size; 663 int hwcursor_size;
533 int CRT2_write_enable; 664 int CRT2_write_enable;
534 u8 caps; 665 u8 caps;
535 666
536 u8 detectedpdc; 667 u8 detectedpdc;
537 u8 detectedpdca; 668 u8 detectedpdca;
538 u8 detectedlcda; 669 u8 detectedlcda;
539 670
540 SIS_IOTYPE1 *hwcursor_vbase; 671 SIS_IOTYPE1 *hwcursor_vbase;
541 672
542 int chronteltype; 673 int chronteltype;
543 int tvxpos, tvypos; 674 int tvxpos, tvypos;
544 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02; 675 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43,p2_01,p2_02;
545 int tvx, tvy; 676 int tvx, tvy;
546 677
547 u8 sisfblocked; 678 u8 sisfblocked;
679
680 struct sisfb_info sisfb_infoblock;
681
682 struct sisfb_cmd sisfb_command;
683
684 u32 sisfb_id;
685
686 u8 sisfb_can_post;
687 u8 sisfb_card_posted;
688 u8 sisfb_was_boot_device;
548 689
549 struct sis_video_info *next; 690 struct sis_video_info *next;
550}; 691};
551 692
552typedef struct _SIS_OH {
553 struct _SIS_OH *poh_next;
554 struct _SIS_OH *poh_prev;
555 u32 offset;
556 u32 size;
557} SIS_OH;
558
559typedef struct _SIS_OHALLOC {
560 struct _SIS_OHALLOC *poha_next;
561 SIS_OH aoh[1];
562} SIS_OHALLOC;
563
564typedef struct _SIS_HEAP {
565 SIS_OH oh_free;
566 SIS_OH oh_used;
567 SIS_OH *poh_freelist;
568 SIS_OHALLOC *poha_chain;
569 u32 max_freesize;
570 struct sis_video_info *vinfo;
571} SIS_HEAP;
572
573#endif 693#endif
diff --git a/drivers/video/sis/sis_accel.c b/drivers/video/sis/sis_accel.c
index 30e90a553e80..bab933e6c6a6 100644
--- a/drivers/video/sis/sis_accel.c
+++ b/drivers/video/sis/sis_accel.c
@@ -1,6 +1,8 @@
1/* 1/*
2 * SiS 300/630/730/540/315/550/65x/74x/330/760 frame buffer driver 2 * SiS 300/540/630[S]/730[S],
3 * for Linux kernels 2.4.x and 2.6.x 3 * SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
4 * XGI V3XT/V5/V8, Z7
5 * frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
4 * 6 *
5 * 2D acceleration part 7 * 2D acceleration part
6 * 8 *
@@ -19,7 +21,7 @@
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
20 * 22 *
21 * Based on the XFree86/X.org driver which is 23 * Based on the XFree86/X.org driver which is
22 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 24 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
23 * 25 *
24 * Author: Thomas Winischhofer <thomas@winischhofer.net> 26 * Author: Thomas Winischhofer <thomas@winischhofer.net>
25 * (see http://www.winischhofer.net/ 27 * (see http://www.winischhofer.net/
@@ -30,13 +32,11 @@
30#include <linux/version.h> 32#include <linux/version.h>
31#include <linux/module.h> 33#include <linux/module.h>
32#include <linux/kernel.h> 34#include <linux/kernel.h>
33#include <linux/errno.h>
34#include <linux/fb.h> 35#include <linux/fb.h>
36#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
35#include <linux/console.h> 37#include <linux/console.h>
36#include <linux/selection.h> 38#endif
37#include <linux/ioport.h> 39#include <linux/ioport.h>
38#include <linux/capability.h>
39#include <linux/fs.h>
40#include <linux/types.h> 40#include <linux/types.h>
41 41
42#include <asm/io.h> 42#include <asm/io.h>
@@ -188,7 +188,7 @@ SiS300SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w
188} 188}
189#endif 189#endif
190 190
191/* 315/330 series ------------------------------------------------- */ 191/* 315/330/340 series ---------------------------------------------- */
192 192
193#ifdef CONFIG_FB_SIS_315 193#ifdef CONFIG_FB_SIS_315
194static void 194static void
@@ -202,7 +202,7 @@ SiS310SetupForScreenToScreenCopy(struct sis_video_info *ivideo, int rop, int tra
202{ 202{
203 SiS310SetupDSTColorDepth(ivideo->DstColor); 203 SiS310SetupDSTColorDepth(ivideo->DstColor);
204 SiS310SetupSRCPitch(ivideo->video_linelength) 204 SiS310SetupSRCPitch(ivideo->video_linelength)
205 SiS310SetupDSTRect(ivideo->video_linelength, 0xffff) 205 SiS310SetupDSTRect(ivideo->video_linelength, 0x0fff)
206 if(trans_color != -1) { 206 if(trans_color != -1) {
207 SiS310SetupROP(0x0A) 207 SiS310SetupROP(0x0A)
208 SiS310SetupSRCTrans(trans_color) 208 SiS310SetupSRCTrans(trans_color)
@@ -213,7 +213,7 @@ SiS310SetupForScreenToScreenCopy(struct sis_video_info *ivideo, int rop, int tra
213 /* SiSSetupCMDFlag(BITBLT | SRCVIDEO) */ 213 /* SiSSetupCMDFlag(BITBLT | SRCVIDEO) */
214 } 214 }
215 SiS310SetupCMDFlag(ivideo->SiS310_AccelDepth) 215 SiS310SetupCMDFlag(ivideo->SiS310_AccelDepth)
216 /* The 315 series is smart enough to know the direction */ 216 /* The chip is smart enough to know the direction */
217} 217}
218 218
219static void 219static void
@@ -223,35 +223,38 @@ SiS310SubsequentScreenToScreenCopy(struct sis_video_info *ivideo, int src_x, int
223 u32 srcbase = 0, dstbase = 0; 223 u32 srcbase = 0, dstbase = 0;
224 int mymin = min(src_y, dst_y); 224 int mymin = min(src_y, dst_y);
225 int mymax = max(src_y, dst_y); 225 int mymax = max(src_y, dst_y);
226 226
227 /* Although the chip knows the direction to use 227 /* Although the chip knows the direction to use
228 * if the source and destination areas overlap, 228 * if the source and destination areas overlap,
229 * that logic fails if we fiddle with the bitmap 229 * that logic fails if we fiddle with the bitmap
230 * addresses. Therefore, we check if the source 230 * addresses. Therefore, we check if the source
231 * and destination blitting areas overlap and 231 * and destination blitting areas overlap and
232 * adapt the bitmap addresses synchronously 232 * adapt the bitmap addresses synchronously
233 * if the coordinates exceed the valid range. 233 * if the coordinates exceed the valid range.
234 * The the areas do not overlap, we do our 234 * The the areas do not overlap, we do our
235 * normal check. 235 * normal check.
236 */ 236 */
237 if((mymax - mymin) < height) { 237 if((mymax - mymin) < height) {
238 if((src_y >= 2048) || (dst_y >= 2048)) { 238 if((src_y >= 2048) || (dst_y >= 2048)) {
239 srcbase = ivideo->video_linelength * mymin; 239 srcbase = ivideo->video_linelength * mymin;
240 dstbase = ivideo->video_linelength * mymin; 240 dstbase = ivideo->video_linelength * mymin;
241 src_y -= mymin; 241 src_y -= mymin;
242 dst_y -= mymin; 242 dst_y -= mymin;
243 } 243 }
244 } else { 244 } else {
245 if(src_y >= 2048) { 245 if(src_y >= 2048) {
246 srcbase = ivideo->video_linelength * src_y; 246 srcbase = ivideo->video_linelength * src_y;
247 src_y = 0; 247 src_y = 0;
248 } 248 }
249 if(dst_y >= 2048) { 249 if(dst_y >= 2048) {
250 dstbase = ivideo->video_linelength * dst_y; 250 dstbase = ivideo->video_linelength * dst_y;
251 dst_y = 0; 251 dst_y = 0;
252 } 252 }
253 } 253 }
254 254
255 srcbase += ivideo->video_offset;
256 dstbase += ivideo->video_offset;
257
255 SiS310SetupSRCBase(srcbase); 258 SiS310SetupSRCBase(srcbase);
256 SiS310SetupDSTBase(dstbase); 259 SiS310SetupDSTBase(dstbase);
257 SiS310SetupRect(width, height) 260 SiS310SetupRect(width, height)
@@ -264,7 +267,7 @@ static void
264SiS310SetupForSolidFill(struct sis_video_info *ivideo, u32 color, int rop) 267SiS310SetupForSolidFill(struct sis_video_info *ivideo, u32 color, int rop)
265{ 268{
266 SiS310SetupPATFG(color) 269 SiS310SetupPATFG(color)
267 SiS310SetupDSTRect(ivideo->video_linelength, 0xffff) 270 SiS310SetupDSTRect(ivideo->video_linelength, 0x0fff)
268 SiS310SetupDSTColorDepth(ivideo->DstColor); 271 SiS310SetupDSTColorDepth(ivideo->DstColor);
269 SiS310SetupROP(sisPatALUConv[rop]) 272 SiS310SetupROP(sisPatALUConv[rop])
270 SiS310SetupCMDFlag(PATFG | ivideo->SiS310_AccelDepth) 273 SiS310SetupCMDFlag(PATFG | ivideo->SiS310_AccelDepth)
@@ -279,6 +282,7 @@ SiS310SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w
279 dstbase = ivideo->video_linelength * y; 282 dstbase = ivideo->video_linelength * y;
280 y = 0; 283 y = 0;
281 } 284 }
285 dstbase += ivideo->video_offset;
282 SiS310SetupDSTBase(dstbase) 286 SiS310SetupDSTBase(dstbase)
283 SiS310SetupDSTXY(x,y) 287 SiS310SetupDSTXY(x,y)
284 SiS310SetupRect(w,h) 288 SiS310SetupRect(w,h)
@@ -294,384 +298,153 @@ SiS310SubsequentSolidFillRect(struct sis_video_info *ivideo, int x, int y, int w
294int sisfb_initaccel(struct sis_video_info *ivideo) 298int sisfb_initaccel(struct sis_video_info *ivideo)
295{ 299{
296#ifdef SISFB_USE_SPINLOCKS 300#ifdef SISFB_USE_SPINLOCKS
297 spin_lock_init(&ivideo->lockaccel); 301 spin_lock_init(&ivideo->lockaccel);
298#endif 302#endif
299 return(0); 303 return 0;
300} 304}
301 305
302void sisfb_syncaccel(struct sis_video_info *ivideo) 306void sisfb_syncaccel(struct sis_video_info *ivideo)
303{ 307{
304 if(ivideo->sisvga_engine == SIS_300_VGA) { 308 if(ivideo->sisvga_engine == SIS_300_VGA) {
305#ifdef CONFIG_FB_SIS_300 309#ifdef CONFIG_FB_SIS_300
306 SiS300Sync(ivideo); 310 SiS300Sync(ivideo);
307#endif 311#endif
308 } else { 312 } else {
309#ifdef CONFIG_FB_SIS_315 313#ifdef CONFIG_FB_SIS_315
310 SiS310Sync(ivideo); 314 SiS310Sync(ivideo);
311#endif 315#endif
312 } 316 }
313} 317}
314 318
315#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) /* --------------- 2.5 --------------- */ 319#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) /* --------------- 2.5 --------------- */
316 320
317int fbcon_sis_sync(struct fb_info *info) 321int fbcon_sis_sync(struct fb_info *info)
318{ 322{
319 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 323 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
320 CRITFLAGS 324 CRITFLAGS
321 325
322 if(!ivideo->accel) 326 if((!ivideo->accel) || (!ivideo->engineok))
323 return 0; 327 return 0;
324 328
325 if(ivideo->sisvga_engine == SIS_300_VGA) { 329 CRITBEGIN
326#ifdef CONFIG_FB_SIS_300 330 sisfb_syncaccel(ivideo);
327 SiS300Sync(ivideo); 331 CRITEND
328#endif 332
329 } else { 333 return 0;
330#ifdef CONFIG_FB_SIS_315
331 SiS310Sync(ivideo);
332#endif
333 }
334 CRITEND
335 return 0;
336} 334}
337 335
338void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect) 336void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
339{ 337{
340 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 338 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
341 u32 col = 0; 339 u32 col = 0;
342 u32 vxres = info->var.xres_virtual; 340 u32 vxres = info->var.xres_virtual;
343 u32 vyres = info->var.yres_virtual; 341 u32 vyres = info->var.yres_virtual;
344 int width, height; 342 int width, height;
345 CRITFLAGS 343 CRITFLAGS
346 344
347 if(info->state != FBINFO_STATE_RUNNING) { 345 if(info->state != FBINFO_STATE_RUNNING)
348 return; 346 return;
349 } 347
350 348 if((!ivideo->accel) || (!ivideo->engineok)) {
351 if(!ivideo->accel) { 349 cfb_fillrect(info, rect);
352 cfb_fillrect(info, rect); 350 return;
353 return; 351 }
354 } 352
355 353 if(!rect->width || !rect->height || rect->dx >= vxres || rect->dy >= vyres)
356 if(!rect->width || !rect->height || rect->dx >= vxres || rect->dy >= vyres) { 354 return;
357 return; 355
358 } 356 /* Clipping */
359 357 width = ((rect->dx + rect->width) > vxres) ? (vxres - rect->dx) : rect->width;
360 /* Clipping */ 358 height = ((rect->dy + rect->height) > vyres) ? (vyres - rect->dy) : rect->height;
361 width = ((rect->dx + rect->width) > vxres) ? (vxres - rect->dx) : rect->width; 359
362 height = ((rect->dy + rect->height) > vyres) ? (vyres - rect->dy) : rect->height; 360 switch(info->var.bits_per_pixel) {
363
364 switch(info->var.bits_per_pixel) {
365 case 8: col = rect->color; 361 case 8: col = rect->color;
366 break; 362 break;
367 case 16: 363 case 16:
368 case 32: col = ((u32 *)(info->pseudo_palette))[rect->color]; 364 case 32: col = ((u32 *)(info->pseudo_palette))[rect->color];
369 break; 365 break;
370 } 366 }
371 367
372 if(ivideo->sisvga_engine == SIS_300_VGA) { 368 if(ivideo->sisvga_engine == SIS_300_VGA) {
373#ifdef CONFIG_FB_SIS_300 369#ifdef CONFIG_FB_SIS_300
374 CRITBEGIN 370 CRITBEGIN
375 SiS300SetupForSolidFill(ivideo, col, myrops[rect->rop]); 371 SiS300SetupForSolidFill(ivideo, col, myrops[rect->rop]);
376 SiS300SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height); 372 SiS300SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
377 CRITEND 373 CRITEND
378 SiS300Sync(ivideo);
379#endif 374#endif
380 } else { 375 } else {
381#ifdef CONFIG_FB_SIS_315 376#ifdef CONFIG_FB_SIS_315
382 CRITBEGIN 377 CRITBEGIN
383 SiS310SetupForSolidFill(ivideo, col, myrops[rect->rop]); 378 SiS310SetupForSolidFill(ivideo, col, myrops[rect->rop]);
384 SiS310SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height); 379 SiS310SubsequentSolidFillRect(ivideo, rect->dx, rect->dy, width, height);
385 CRITEND 380 CRITEND
386 SiS310Sync(ivideo);
387#endif 381#endif
388 } 382 }
389 383
384 sisfb_syncaccel(ivideo);
390} 385}
391 386
392void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area) 387void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area)
393{ 388{
394 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 389 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
395 u32 vxres = info->var.xres_virtual; 390 u32 vxres = info->var.xres_virtual;
396 u32 vyres = info->var.yres_virtual; 391 u32 vyres = info->var.yres_virtual;
397 int width = area->width; 392 int width = area->width;
398 int height = area->height; 393 int height = area->height;
399 CRITFLAGS
400
401 if(info->state != FBINFO_STATE_RUNNING) {
402 return;
403 }
404
405 if(!ivideo->accel) {
406 cfb_copyarea(info, area);
407 return;
408 }
409
410 if(!width || !height ||
411 area->sx >= vxres || area->sy >= vyres ||
412 area->dx >= vxres || area->dy >= vyres) {
413 return;
414 }
415
416 /* Clipping */
417 if((area->sx + width) > vxres) width = vxres - area->sx;
418 if((area->dx + width) > vxres) width = vxres - area->dx;
419 if((area->sy + height) > vyres) height = vyres - area->sy;
420 if((area->dy + height) > vyres) height = vyres - area->dy;
421
422 if(ivideo->sisvga_engine == SIS_300_VGA) {
423#ifdef CONFIG_FB_SIS_300
424 int xdir, ydir;
425
426 if(area->sx < area->dx) xdir = 0;
427 else xdir = 1;
428 if(area->sy < area->dy) ydir = 0;
429 else ydir = 1;
430
431 CRITBEGIN
432 SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
433 SiS300SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy, area->dx, area->dy,
434 width, height);
435 CRITEND
436 SiS300Sync(ivideo);
437#endif
438 } else {
439#ifdef CONFIG_FB_SIS_315
440 CRITBEGIN
441 SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
442 SiS310SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy, area->dx, area->dy,
443 width, height);
444 CRITEND
445 SiS310Sync(ivideo);
446#endif
447 }
448}
449
450#endif
451
452#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) /* -------------- 2.4 --------------- */
453
454void fbcon_sis_bmove(struct display *p, int srcy, int srcx,
455 int dsty, int dstx, int height, int width)
456{
457 struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
458
459 CRITFLAGS 394 CRITFLAGS
460 395
461 if(!ivideo->accel) { 396 if(info->state != FBINFO_STATE_RUNNING)
462 switch(ivideo->video_bpp) { 397 return;
463 case 8:
464#ifdef FBCON_HAS_CFB8
465 fbcon_cfb8_bmove(p, srcy, srcx, dsty, dstx, height, width);
466#endif
467 break;
468 case 16:
469#ifdef FBCON_HAS_CFB16
470 fbcon_cfb16_bmove(p, srcy, srcx, dsty, dstx, height, width);
471#endif
472 break;
473 case 32:
474#ifdef FBCON_HAS_CFB32
475 fbcon_cfb32_bmove(p, srcy, srcx, dsty, dstx, height, width);
476#endif
477 break;
478 }
479 return;
480 }
481
482 srcx *= fontwidth(p);
483 srcy *= fontheight(p);
484 dstx *= fontwidth(p);
485 dsty *= fontheight(p);
486 width *= fontwidth(p);
487 height *= fontheight(p);
488 398
489 if(ivideo->sisvga_engine == SIS_300_VGA) { 399 if((!ivideo->accel) || (!ivideo->engineok)) {
490#ifdef CONFIG_FB_SIS_300 400 cfb_copyarea(info, area);
491 int xdir, ydir; 401 return;
492
493 if(srcx < dstx) xdir = 0;
494 else xdir = 1;
495 if(srcy < dsty) ydir = 0;
496 else ydir = 1;
497
498 CRITBEGIN
499 SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
500 SiS300SubsequentScreenToScreenCopy(ivideo, srcx, srcy, dstx, dsty, width, height);
501 CRITEND
502 SiS300Sync(ivideo);
503#endif
504 } else {
505#ifdef CONFIG_FB_SIS_315
506 CRITBEGIN
507 SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
508 SiS310SubsequentScreenToScreenCopy(ivideo, srcx, srcy, dstx, dsty, width, height);
509 CRITEND
510 SiS310Sync(ivideo);
511#endif
512 } 402 }
513}
514 403
515static void fbcon_sis_clear(struct vc_data *conp, struct display *p, 404 if(!width || !height ||
516 int srcy, int srcx, int height, int width, int color) 405 area->sx >= vxres || area->sy >= vyres ||
517{ 406 area->dx >= vxres || area->dy >= vyres)
518 struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par; 407 return;
519 CRITFLAGS
520 408
521 srcx *= fontwidth(p); 409 /* Clipping */
522 srcy *= fontheight(p); 410 if((area->sx + width) > vxres) width = vxres - area->sx;
523 width *= fontwidth(p); 411 if((area->dx + width) > vxres) width = vxres - area->dx;
524 height *= fontheight(p); 412 if((area->sy + height) > vyres) height = vyres - area->sy;
413 if((area->dy + height) > vyres) height = vyres - area->dy;
525 414
526 if(ivideo->sisvga_engine == SIS_300_VGA) { 415 if(ivideo->sisvga_engine == SIS_300_VGA) {
527#ifdef CONFIG_FB_SIS_300 416#ifdef CONFIG_FB_SIS_300
528 CRITBEGIN 417 int xdir, ydir;
529 SiS300SetupForSolidFill(ivideo, color, 3); 418
530 SiS300SubsequentSolidFillRect(ivideo, srcx, srcy, width, height); 419 if(area->sx < area->dx) xdir = 0;
531 CRITEND 420 else xdir = 1;
532 SiS300Sync(ivideo); 421 if(area->sy < area->dy) ydir = 0;
422 else ydir = 1;
423
424 CRITBEGIN
425 SiS300SetupForScreenToScreenCopy(ivideo, xdir, ydir, 3, -1);
426 SiS300SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy,
427 area->dx, area->dy, width, height);
428 CRITEND
533#endif 429#endif
534 } else { 430 } else {
535#ifdef CONFIG_FB_SIS_315 431#ifdef CONFIG_FB_SIS_315
536 CRITBEGIN 432 CRITBEGIN
537 SiS310SetupForSolidFill(ivideo, color, 3); 433 SiS310SetupForScreenToScreenCopy(ivideo, 3, -1);
538 SiS310SubsequentSolidFillRect(ivideo, srcx, srcy, width, height); 434 SiS310SubsequentScreenToScreenCopy(ivideo, area->sx, area->sy,
539 CRITEND 435 area->dx, area->dy, width, height);
540 SiS310Sync(ivideo); 436 CRITEND
541#endif
542 }
543}
544
545void fbcon_sis_clear8(struct vc_data *conp, struct display *p,
546 int srcy, int srcx, int height, int width)
547{
548 struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
549 u32 bgx;
550
551 if(!ivideo->accel) {
552#ifdef FBCON_HAS_CFB8
553 fbcon_cfb8_clear(conp, p, srcy, srcx, height, width);
554#endif 437#endif
555 return;
556 } 438 }
557 439
558 bgx = attr_bgcol_ec(p, conp); 440 sisfb_syncaccel(ivideo);
559 fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
560} 441}
561 442
562void fbcon_sis_clear16(struct vc_data *conp, struct display *p,
563 int srcy, int srcx, int height, int width)
564{
565 struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
566 u32 bgx;
567
568 if(!ivideo->accel) {
569#ifdef FBCON_HAS_CFB16
570 fbcon_cfb16_clear(conp, p, srcy, srcx, height, width);
571#endif 443#endif
572 return;
573 }
574
575 bgx = ((u_int16_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
576 fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
577}
578 444
579void fbcon_sis_clear32(struct vc_data *conp, struct display *p, 445#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) /* -------------- 2.4 --------------- */
580 int srcy, int srcx, int height, int width)
581{
582 struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
583 u32 bgx;
584
585 if(!ivideo->accel) {
586#ifdef FBCON_HAS_CFB32
587 fbcon_cfb32_clear(conp, p, srcy, srcx, height, width);
588#endif
589 return;
590 }
591
592 bgx = ((u_int32_t*)p->dispsw_data)[attr_bgcol_ec(p, conp)];
593 fbcon_sis_clear(conp, p, srcy, srcx, height, width, bgx);
594}
595
596void fbcon_sis_revc(struct display *p, int srcx, int srcy)
597{
598 struct sis_video_info *ivideo = (struct sis_video_info *)p->fb_info->par;
599 CRITFLAGS
600
601 if(!ivideo->accel) {
602 switch(ivideo->video_bpp) {
603 case 16:
604#ifdef FBCON_HAS_CFB16
605 fbcon_cfb16_revc(p, srcx, srcy);
606#endif
607 break;
608 case 32:
609#ifdef FBCON_HAS_CFB32
610 fbcon_cfb32_revc(p, srcx, srcy);
611#endif
612 break;
613 }
614 return;
615 }
616
617 srcx *= fontwidth(p);
618 srcy *= fontheight(p);
619
620 if(ivideo->sisvga_engine == SIS_300_VGA) {
621#ifdef CONFIG_FB_SIS_300
622 CRITBEGIN
623 SiS300SetupForSolidFill(ivideo, 0, 0x0a);
624 SiS300SubsequentSolidFillRect(ivideo, srcx, srcy, fontwidth(p), fontheight(p));
625 CRITEND
626 SiS300Sync(ivideo);
627#endif
628 } else {
629#ifdef CONFIG_FB_SIS_315
630 CRITBEGIN
631 SiS310SetupForSolidFill(ivideo, 0, 0x0a);
632 SiS310SubsequentSolidFillRect(ivideo, srcx, srcy, fontwidth(p), fontheight(p));
633 CRITEND
634 SiS310Sync(ivideo);
635#endif
636 }
637}
638 446
639#ifdef FBCON_HAS_CFB8 447#include "sisfb_accel_2_4.h"
640struct display_switch fbcon_sis8 = {
641 .setup = fbcon_cfb8_setup,
642 .bmove = fbcon_sis_bmove,
643 .clear = fbcon_sis_clear8,
644 .putc = fbcon_cfb8_putc,
645 .putcs = fbcon_cfb8_putcs,
646 .revc = fbcon_cfb8_revc,
647 .clear_margins = fbcon_cfb8_clear_margins,
648 .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
649};
650#endif
651#ifdef FBCON_HAS_CFB16
652struct display_switch fbcon_sis16 = {
653 .setup = fbcon_cfb16_setup,
654 .bmove = fbcon_sis_bmove,
655 .clear = fbcon_sis_clear16,
656 .putc = fbcon_cfb16_putc,
657 .putcs = fbcon_cfb16_putcs,
658 .revc = fbcon_sis_revc,
659 .clear_margins = fbcon_cfb16_clear_margins,
660 .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
661};
662#endif
663#ifdef FBCON_HAS_CFB32
664struct display_switch fbcon_sis32 = {
665 .setup = fbcon_cfb32_setup,
666 .bmove = fbcon_sis_bmove,
667 .clear = fbcon_sis_clear32,
668 .putc = fbcon_cfb32_putc,
669 .putcs = fbcon_cfb32_putcs,
670 .revc = fbcon_sis_revc,
671 .clear_margins = fbcon_cfb32_clear_margins,
672 .fontwidthmask = FONTWIDTH(4)|FONTWIDTH(8)|FONTWIDTH(12)|FONTWIDTH(16)
673};
674#endif
675 448
676#endif /* KERNEL VERSION */ 449#endif /* KERNEL VERSION */
677 450
diff --git a/drivers/video/sis/sis_accel.h b/drivers/video/sis/sis_accel.h
index bb28f331d60d..046e2c4a8e09 100644
--- a/drivers/video/sis/sis_accel.h
+++ b/drivers/video/sis/sis_accel.h
@@ -1,6 +1,8 @@
1/* 1/*
2 * SiS 300/630/730/540/315/550/650/740 frame buffer driver 2 * SiS 300/540/630[S]/730[S],
3 * for Linux kernels 2.4.x and 2.5.x 3 * SiS 315[E|PRO]/550/[M]650/651/[M]661[F|M]X/740/[M]741[GX]/330/[M]760[GX],
4 * XGI V3XT/V5/V8, Z7
5 * frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
4 * 6 *
5 * 2D acceleration part 7 * 2D acceleration part
6 * 8 *
@@ -283,6 +285,8 @@
283 { \ 285 { \
284 while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \ 286 while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
285 while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \ 287 while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
288 while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
289 while( (MMIO_IN16(ivideo->mmio_vbase, Q_STATUS+2) & 0x8000) != 0x8000){}; \
286 CmdQueLen = 0; \ 290 CmdQueLen = 0; \
287 } 291 }
288 292
@@ -402,6 +406,7 @@ void fbcon_sis_clear32(struct vc_data *conp, struct display *p, int srcy,
402 int srcx, int height, int width); 406 int srcx, int height, int width);
403#endif 407#endif
404#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34) 408#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,34)
409int fbcon_sis_sync(struct fb_info *info);
405void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect); 410void fbcon_sis_fillrect(struct fb_info *info, const struct fb_fillrect *rect);
406void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area); 411void fbcon_sis_copyarea(struct fb_info *info, const struct fb_copyarea *area);
407#endif 412#endif
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c
index 698266036819..42c54b69726e 100644
--- a/drivers/video/sis/sis_main.c
+++ b/drivers/video/sis/sis_main.c
@@ -1,9 +1,10 @@
1/* 1/*
2 * SiS 300/305/540/630(S)/730(S) 2 * SiS 300/540/630[S]/730[S],
3 * SiS 315(H/PRO)/55x/(M)65x/(M)661(F/M)X/740/741(GX)/330/(M)760 3 * SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX],
4 * XGI V3XT/V5/V8, Z7
4 * frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3 5 * frame buffer driver for Linux kernels >= 2.4.14 and >=2.6.3
5 * 6 *
6 * Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. 7 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -19,11 +20,11 @@
19 * along with this program; if not, write to the Free Software 20 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
21 * 22 *
22 * Author: Thomas Winischhofer <thomas@winischhofer.net> 23 * Author: Thomas Winischhofer <thomas@winischhofer.net>
23 * 24 *
24 * Author of (practically wiped) code base: 25 * Author of (practically wiped) code base:
25 * SiS (www.sis.com) 26 * SiS (www.sis.com)
26 * Copyright (C) 1999 Silicon Integrated Systems, Inc. 27 * Copyright (C) 1999 Silicon Integrated Systems, Inc.
27 * 28 *
28 * See http://www.winischhofer.net/ for more information and updates 29 * See http://www.winischhofer.net/ for more information and updates
29 * 30 *
@@ -46,16 +47,15 @@
46#include <linux/mm.h> 47#include <linux/mm.h>
47#include <linux/tty.h> 48#include <linux/tty.h>
48#include <linux/slab.h> 49#include <linux/slab.h>
49#include <linux/delay.h>
50#include <linux/fb.h> 50#include <linux/fb.h>
51#include <linux/console.h>
52#include <linux/selection.h> 51#include <linux/selection.h>
53#include <linux/smp_lock.h>
54#include <linux/ioport.h> 52#include <linux/ioport.h>
55#include <linux/init.h> 53#include <linux/init.h>
56#include <linux/pci.h> 54#include <linux/pci.h>
57#include <linux/vmalloc.h> 55#include <linux/vmalloc.h>
56#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
58#include <linux/vt_kern.h> 57#include <linux/vt_kern.h>
58#endif
59#include <linux/capability.h> 59#include <linux/capability.h>
60#include <linux/fs.h> 60#include <linux/fs.h>
61#include <linux/types.h> 61#include <linux/types.h>
@@ -94,71 +94,75 @@ extern struct display_switch fbcon_sis32;
94#endif 94#endif
95#endif 95#endif
96 96
97static void sisfb_handle_command(struct sis_video_info *ivideo,
98 struct sisfb_cmd *sisfb_command);
99
97/* ------------------ Internal helper routines ----------------- */ 100/* ------------------ Internal helper routines ----------------- */
98 101
99static void __init 102static void __init
100sisfb_setdefaultparms(void) 103sisfb_setdefaultparms(void)
101{ 104{
102 sisfb_off = 0; 105 sisfb_off = 0;
103 sisfb_parm_mem = 0; 106 sisfb_parm_mem = 0;
104 sisfb_accel = -1; 107 sisfb_accel = -1;
105 sisfb_ypan = -1; 108 sisfb_ypan = -1;
106 sisfb_max = -1; 109 sisfb_max = -1;
107 sisfb_userom = -1; 110 sisfb_userom = -1;
108 sisfb_useoem = -1; 111 sisfb_useoem = -1;
109#ifdef MODULE 112#ifdef MODULE
110 /* Module: "None" for 2.4, default mode for 2.5+ */ 113 /* Module: "None" for 2.4, default mode for 2.5+ */
111#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 114#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
112 sisfb_mode_idx = -1; 115 sisfb_mode_idx = -1;
113#else 116#else
114 sisfb_mode_idx = MODE_INDEX_NONE; 117 sisfb_mode_idx = MODE_INDEX_NONE;
115#endif 118#endif
116#else 119#else
117 /* Static: Default mode */ 120 /* Static: Default mode */
118 sisfb_mode_idx = -1; 121 sisfb_mode_idx = -1;
119#endif 122#endif
120 sisfb_parm_rate = -1; 123 sisfb_parm_rate = -1;
121 sisfb_crt1off = 0; 124 sisfb_crt1off = 0;
122 sisfb_forcecrt1 = -1; 125 sisfb_forcecrt1 = -1;
123 sisfb_crt2type = -1; 126 sisfb_crt2type = -1;
124 sisfb_crt2flags = 0; 127 sisfb_crt2flags = 0;
125 sisfb_pdc = 0xff; 128 sisfb_pdc = 0xff;
126 sisfb_pdca = 0xff; 129 sisfb_pdca = 0xff;
127 sisfb_scalelcd = -1; 130 sisfb_scalelcd = -1;
128 sisfb_specialtiming = CUT_NONE; 131 sisfb_specialtiming = CUT_NONE;
129 sisfb_lvdshl = -1; 132 sisfb_lvdshl = -1;
130 sisfb_dstn = 0; 133 sisfb_dstn = 0;
131 sisfb_fstn = 0; 134 sisfb_fstn = 0;
132 sisfb_tvplug = -1; 135 sisfb_tvplug = -1;
133 sisfb_tvstd = -1; 136 sisfb_tvstd = -1;
134 sisfb_tvxposoffset = 0; 137 sisfb_tvxposoffset = 0;
135 sisfb_tvyposoffset = 0; 138 sisfb_tvyposoffset = 0;
136 sisfb_filter = -1; 139 sisfb_nocrt2rate = 0;
137 sisfb_nocrt2rate = 0;
138#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 140#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
139 sisfb_inverse = 0; 141 sisfb_inverse = 0;
140 sisfb_fontname[0] = 0; 142 sisfb_fontname[0] = 0;
141#endif 143#endif
142#if !defined(__i386__) && !defined(__x86_64__) 144#if !defined(__i386__) && !defined(__x86_64__)
143 sisfb_resetcard = 0; 145 sisfb_resetcard = 0;
144 sisfb_videoram = 0; 146 sisfb_videoram = 0;
145#endif 147#endif
146} 148}
147 149
150/* ------------- Parameter parsing -------------- */
151
148static void __devinit 152static void __devinit
149sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet) 153sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet)
150{ 154{
151 int i = 0, j = 0; 155 int i = 0, j = 0;
152 156
153 /* BEWARE: We don't know the hardware specs yet and there is no ivideo */ 157 /* We don't know the hardware specs yet and there is no ivideo */
154 158
155 if(vesamode == 0) { 159 if(vesamode == 0) {
156#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 160#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
157 sisfb_mode_idx = MODE_INDEX_NONE; 161 sisfb_mode_idx = MODE_INDEX_NONE;
158#else 162#else
159 if(!quiet) { 163 if(!quiet)
160 printk(KERN_ERR "sisfb: Invalid mode. Using default.\n"); 164 printk(KERN_ERR "sisfb: Invalid mode. Using default.\n");
161 } 165
162 sisfb_mode_idx = DEFAULT_MODE; 166 sisfb_mode_idx = DEFAULT_MODE;
163#endif 167#endif
164 return; 168 return;
@@ -169,95 +173,102 @@ sisfb_search_vesamode(unsigned int vesamode, BOOLEAN quiet)
169 while(sisbios_mode[i++].mode_no[0] != 0) { 173 while(sisbios_mode[i++].mode_no[0] != 0) {
170 if( (sisbios_mode[i-1].vesa_mode_no_1 == vesamode) || 174 if( (sisbios_mode[i-1].vesa_mode_no_1 == vesamode) ||
171 (sisbios_mode[i-1].vesa_mode_no_2 == vesamode) ) { 175 (sisbios_mode[i-1].vesa_mode_no_2 == vesamode) ) {
172 if(sisfb_fstn) { 176 if(sisfb_fstn) {
173 if(sisbios_mode[i-1].mode_no[1] == 0x50 || 177 if(sisbios_mode[i-1].mode_no[1] == 0x50 ||
174 sisbios_mode[i-1].mode_no[1] == 0x56 || 178 sisbios_mode[i-1].mode_no[1] == 0x56 ||
175 sisbios_mode[i-1].mode_no[1] == 0x53) continue; 179 sisbios_mode[i-1].mode_no[1] == 0x53)
176 } else { 180 continue;
177 if(sisbios_mode[i-1].mode_no[1] == 0x5a || 181 } else {
178 sisbios_mode[i-1].mode_no[1] == 0x5b) continue; 182 if(sisbios_mode[i-1].mode_no[1] == 0x5a ||
179 } 183 sisbios_mode[i-1].mode_no[1] == 0x5b)
180 sisfb_mode_idx = i - 1; 184 continue;
181 j = 1; 185 }
182 break; 186 sisfb_mode_idx = i - 1;
187 j = 1;
188 break;
183 } 189 }
184 } 190 }
185 if((!j) && !quiet) printk(KERN_ERR "sisfb: Invalid VESA mode 0x%x'\n", vesamode); 191 if((!j) && !quiet)
192 printk(KERN_ERR "sisfb: Invalid VESA mode 0x%x'\n", vesamode);
186} 193}
187 194
188static void 195static void __devinit
189sisfb_search_mode(char *name, BOOLEAN quiet) 196sisfb_search_mode(char *name, BOOLEAN quiet)
190{ 197{
191 int i = 0;
192 unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0; 198 unsigned int j = 0, xres = 0, yres = 0, depth = 0, rate = 0;
199 int i = 0;
193 char strbuf[16], strbuf1[20]; 200 char strbuf[16], strbuf1[20];
194 char *nameptr = name; 201 char *nameptr = name;
195 202
196 /* BEWARE: We don't know the hardware specs yet and there is no ivideo */ 203 /* We don't know the hardware specs yet and there is no ivideo */
197 204
198 if(name == NULL) { 205 if(name == NULL) {
199 if(!quiet) { 206 if(!quiet)
200 printk(KERN_ERR "sisfb: Internal error, using default mode.\n"); 207 printk(KERN_ERR "sisfb: Internal error, using default mode.\n");
201 } 208
202 sisfb_mode_idx = DEFAULT_MODE; 209 sisfb_mode_idx = DEFAULT_MODE;
203 return; 210 return;
204 } 211 }
205 212
206#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 213#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
207 if(!strnicmp(name, sisbios_mode[MODE_INDEX_NONE].name, strlen(name))) { 214 if(!strnicmp(name, sisbios_mode[MODE_INDEX_NONE].name, strlen(name))) {
208 if(!quiet) { 215 if(!quiet)
209 printk(KERN_ERR "sisfb: Mode 'none' not supported anymore. Using default.\n"); 216 printk(KERN_ERR "sisfb: Mode 'none' not supported anymore. Using default.\n");
210 } 217
211 sisfb_mode_idx = DEFAULT_MODE; 218 sisfb_mode_idx = DEFAULT_MODE;
212 return; 219 return;
213 } 220 }
214#endif 221#endif
215 if(strlen(name) <= 19) { 222 if(strlen(name) <= 19) {
216 strcpy(strbuf1, name); 223 strcpy(strbuf1, name);
217 for(i=0; i<strlen(strbuf1); i++) { 224 for(i = 0; i < strlen(strbuf1); i++) {
218 if(strbuf1[i] < '0' || strbuf1[i] > '9') strbuf1[i] = ' '; 225 if(strbuf1[i] < '0' || strbuf1[i] > '9') strbuf1[i] = ' ';
219 } 226 }
220 227
221 /* This does some fuzzy mode naming detection */ 228 /* This does some fuzzy mode naming detection */
222 if(sscanf(strbuf1, "%u %u %u %u", &xres, &yres, &depth, &rate) == 4) { 229 if(sscanf(strbuf1, "%u %u %u %u", &xres, &yres, &depth, &rate) == 4) {
223 if((rate <= 32) || (depth > 32)) { 230 if((rate <= 32) || (depth > 32)) {
224 j = rate; rate = depth; depth = j; 231 j = rate; rate = depth; depth = j;
225 } 232 }
226 sprintf(strbuf, "%ux%ux%u", xres, yres, depth); 233 sprintf(strbuf, "%ux%ux%u", xres, yres, depth);
227 nameptr = strbuf; 234 nameptr = strbuf;
228 sisfb_parm_rate = rate; 235 sisfb_parm_rate = rate;
229 } else if(sscanf(strbuf1, "%u %u %u", &xres, &yres, &depth) == 3) { 236 } else if(sscanf(strbuf1, "%u %u %u", &xres, &yres, &depth) == 3) {
230 sprintf(strbuf, "%ux%ux%u", xres, yres, depth); 237 sprintf(strbuf, "%ux%ux%u", xres, yres, depth);
231 nameptr = strbuf; 238 nameptr = strbuf;
232 } else { 239 } else {
233 xres = 0; 240 xres = 0;
234 if((sscanf(strbuf1, "%u %u", &xres, &yres) == 2) && (xres != 0)) { 241 if((sscanf(strbuf1, "%u %u", &xres, &yres) == 2) && (xres != 0)) {
235 sprintf(strbuf, "%ux%ux8", xres, yres); 242 sprintf(strbuf, "%ux%ux8", xres, yres);
236 nameptr = strbuf; 243 nameptr = strbuf;
237 } else { 244 } else {
238 sisfb_search_vesamode(simple_strtoul(name, NULL, 0), quiet); 245 sisfb_search_vesamode(simple_strtoul(name, NULL, 0), quiet);
239 return; 246 return;
240 } 247 }
241 } 248 }
242 } 249 }
243 250
244 i = 0; j = 0; 251 i = 0; j = 0;
245 while(sisbios_mode[i].mode_no[0] != 0) { 252 while(sisbios_mode[i].mode_no[0] != 0) {
246 if(!strnicmp(nameptr, sisbios_mode[i++].name, strlen(nameptr))) { 253 if(!strnicmp(nameptr, sisbios_mode[i++].name, strlen(nameptr))) {
247 if(sisfb_fstn) { 254 if(sisfb_fstn) {
248 if(sisbios_mode[i-1].mode_no[1] == 0x50 || 255 if(sisbios_mode[i-1].mode_no[1] == 0x50 ||
249 sisbios_mode[i-1].mode_no[1] == 0x56 || 256 sisbios_mode[i-1].mode_no[1] == 0x56 ||
250 sisbios_mode[i-1].mode_no[1] == 0x53) continue; 257 sisbios_mode[i-1].mode_no[1] == 0x53)
251 } else { 258 continue;
252 if(sisbios_mode[i-1].mode_no[1] == 0x5a || 259 } else {
253 sisbios_mode[i-1].mode_no[1] == 0x5b) continue; 260 if(sisbios_mode[i-1].mode_no[1] == 0x5a ||
254 } 261 sisbios_mode[i-1].mode_no[1] == 0x5b)
255 sisfb_mode_idx = i - 1; 262 continue;
256 j = 1; 263 }
257 break; 264 sisfb_mode_idx = i - 1;
258 } 265 j = 1;
259 } 266 break;
260 if((!j) && !quiet) printk(KERN_ERR "sisfb: Invalid mode '%s'\n", nameptr); 267 }
268 }
269
270 if((!j) && !quiet)
271 printk(KERN_ERR "sisfb: Invalid mode '%s'\n", nameptr);
261} 272}
262 273
263#ifndef MODULE 274#ifndef MODULE
@@ -265,7 +276,7 @@ static void __devinit
265sisfb_get_vga_mode_from_kernel(void) 276sisfb_get_vga_mode_from_kernel(void)
266{ 277{
267#if (defined(__i386__) || defined(__x86_64__)) && defined(CONFIG_VIDEO_SELECT) 278#if (defined(__i386__) || defined(__x86_64__)) && defined(CONFIG_VIDEO_SELECT)
268 char mymode[32]; 279 char mymode[32];
269 int mydepth = screen_info.lfb_depth; 280 int mydepth = screen_info.lfb_depth;
270 281
271 if(screen_info.orig_video_isVGA != VIDEO_TYPE_VLFB) return; 282 if(screen_info.orig_video_isVGA != VIDEO_TYPE_VLFB) return;
@@ -274,15 +285,17 @@ sisfb_get_vga_mode_from_kernel(void)
274 (screen_info.lfb_height >= 200) && (screen_info.lfb_height <= 1536) && 285 (screen_info.lfb_height >= 200) && (screen_info.lfb_height <= 1536) &&
275 (mydepth >= 8) && (mydepth <= 32) ) { 286 (mydepth >= 8) && (mydepth <= 32) ) {
276 287
277 if(mydepth == 24) mydepth = 32; 288 if(mydepth == 24) mydepth = 32;
278 289
279 sprintf(mymode, "%ux%ux%u", screen_info.lfb_width, 290 sprintf(mymode, "%ux%ux%u", screen_info.lfb_width,
280 screen_info.lfb_height, 291 screen_info.lfb_height,
281 mydepth); 292 mydepth);
282 293
283 printk(KERN_DEBUG "sisfb: Using vga mode %s pre-set by kernel as default\n", mymode); 294 printk(KERN_DEBUG
295 "sisfb: Using vga mode %s pre-set by kernel as default\n",
296 mymode);
284 297
285 sisfb_search_mode(mymode, TRUE); 298 sisfb_search_mode(mymode, TRUE);
286 } 299 }
287#endif 300#endif
288 return; 301 return;
@@ -294,26 +307,25 @@ sisfb_search_crt2type(const char *name)
294{ 307{
295 int i = 0; 308 int i = 0;
296 309
297 /* BEWARE: We don't know the hardware specs yet and there is no ivideo */ 310 /* We don't know the hardware specs yet and there is no ivideo */
298 311
299 if(name == NULL) return; 312 if(name == NULL) return;
300 313
301 while(sis_crt2type[i].type_no != -1) { 314 while(sis_crt2type[i].type_no != -1) {
302 if(!strnicmp(name, sis_crt2type[i].name, strlen(sis_crt2type[i].name))) { 315 if(!strnicmp(name, sis_crt2type[i].name, strlen(sis_crt2type[i].name))) {
303 sisfb_crt2type = sis_crt2type[i].type_no; 316 sisfb_crt2type = sis_crt2type[i].type_no;
304 sisfb_tvplug = sis_crt2type[i].tvplug_no; 317 sisfb_tvplug = sis_crt2type[i].tvplug_no;
305 sisfb_crt2flags = sis_crt2type[i].flags; 318 sisfb_crt2flags = sis_crt2type[i].flags;
306 break; 319 break;
307 } 320 }
308 i++; 321 i++;
309 } 322 }
310 323
311 sisfb_dstn = (sisfb_crt2flags & FL_550_DSTN) ? 1 : 0; 324 sisfb_dstn = (sisfb_crt2flags & FL_550_DSTN) ? 1 : 0;
312 sisfb_fstn = (sisfb_crt2flags & FL_550_FSTN) ? 1 : 0; 325 sisfb_fstn = (sisfb_crt2flags & FL_550_FSTN) ? 1 : 0;
313 326
314 if(sisfb_crt2type < 0) { 327 if(sisfb_crt2type < 0)
315 printk(KERN_ERR "sisfb: Invalid CRT2 type: %s\n", name); 328 printk(KERN_ERR "sisfb: Invalid CRT2 type: %s\n", name);
316 }
317} 329}
318 330
319static void __init 331static void __init
@@ -321,16 +333,17 @@ sisfb_search_tvstd(const char *name)
321{ 333{
322 int i = 0; 334 int i = 0;
323 335
324 /* BEWARE: We don't know the hardware specs yet and there is no ivideo */ 336 /* We don't know the hardware specs yet and there is no ivideo */
325 337
326 if(name == NULL) return; 338 if(name == NULL)
339 return;
327 340
328 while(sis_tvtype[i].type_no != -1) { 341 while(sis_tvtype[i].type_no != -1) {
329 if(!strnicmp(name, sis_tvtype[i].name, strlen(sis_tvtype[i].name))) { 342 if(!strnicmp(name, sis_tvtype[i].name, strlen(sis_tvtype[i].name))) {
330 sisfb_tvstd = sis_tvtype[i].type_no; 343 sisfb_tvstd = sis_tvtype[i].type_no;
331 break; 344 break;
332 } 345 }
333 i++; 346 i++;
334 } 347 }
335} 348}
336 349
@@ -340,38 +353,101 @@ sisfb_search_specialtiming(const char *name)
340 int i = 0; 353 int i = 0;
341 BOOLEAN found = FALSE; 354 BOOLEAN found = FALSE;
342 355
343 /* BEWARE: We don't know the hardware specs yet and there is no ivideo */ 356 /* We don't know the hardware specs yet and there is no ivideo */
344 357
345 if(name == NULL) return; 358 if(name == NULL)
359 return;
346 360
347 if(!strnicmp(name, "none", 4)) { 361 if(!strnicmp(name, "none", 4)) {
348 sisfb_specialtiming = CUT_FORCENONE; 362 sisfb_specialtiming = CUT_FORCENONE;
349 printk(KERN_DEBUG "sisfb: Special timing disabled\n"); 363 printk(KERN_DEBUG "sisfb: Special timing disabled\n");
350 } else { 364 } else {
351 while(mycustomttable[i].chipID != 0) { 365 while(mycustomttable[i].chipID != 0) {
352 if(!strnicmp(name,mycustomttable[i].optionName, strlen(mycustomttable[i].optionName))) { 366 if(!strnicmp(name,mycustomttable[i].optionName,
353 sisfb_specialtiming = mycustomttable[i].SpecialID; 367 strlen(mycustomttable[i].optionName))) {
354 found = TRUE; 368 sisfb_specialtiming = mycustomttable[i].SpecialID;
355 printk(KERN_INFO "sisfb: Special timing for %s %s forced (\"%s\")\n", 369 found = TRUE;
356 mycustomttable[i].vendorName, mycustomttable[i].cardName, 370 printk(KERN_INFO "sisfb: Special timing for %s %s forced (\"%s\")\n",
357 mycustomttable[i].optionName); 371 mycustomttable[i].vendorName,
358 break; 372 mycustomttable[i].cardName,
359 } 373 mycustomttable[i].optionName);
360 i++; 374 break;
361 } 375 }
362 if(!found) { 376 i++;
363 printk(KERN_WARNING "sisfb: Invalid SpecialTiming parameter, valid are:"); 377 }
364 printk(KERN_WARNING "\t\"none\" (to disable special timings)\n"); 378 if(!found) {
365 i = 0; 379 printk(KERN_WARNING "sisfb: Invalid SpecialTiming parameter, valid are:");
366 while(mycustomttable[i].chipID != 0) { 380 printk(KERN_WARNING "\t\"none\" (to disable special timings)\n");
367 printk(KERN_WARNING "\t\"%s\" (for %s %s)\n", 381 i = 0;
368 mycustomttable[i].optionName, 382 while(mycustomttable[i].chipID != 0) {
369 mycustomttable[i].vendorName, 383 printk(KERN_WARNING "\t\"%s\" (for %s %s)\n",
370 mycustomttable[i].cardName); 384 mycustomttable[i].optionName,
371 i++; 385 mycustomttable[i].vendorName,
372 } 386 mycustomttable[i].cardName);
373 } 387 i++;
374 } 388 }
389 }
390 }
391}
392
393/* ----------- Various detection routines ----------- */
394
395static void __devinit
396sisfb_detect_custom_timing(struct sis_video_info *ivideo)
397{
398 unsigned char *biosver = NULL;
399 unsigned char *biosdate = NULL;
400 BOOLEAN footprint;
401 u32 chksum = 0;
402 int i, j;
403
404 if(ivideo->SiS_Pr.UseROM) {
405 biosver = ivideo->SiS_Pr.VirtualRomBase + 0x06;
406 biosdate = ivideo->SiS_Pr.VirtualRomBase + 0x2c;
407 for(i = 0; i < 32768; i++)
408 chksum += ivideo->SiS_Pr.VirtualRomBase[i];
409 }
410
411 i = 0;
412 do {
413 if( (mycustomttable[i].chipID == ivideo->chip) &&
414 ((!strlen(mycustomttable[i].biosversion)) ||
415 (ivideo->SiS_Pr.UseROM &&
416 (!strncmp(mycustomttable[i].biosversion, biosver,
417 strlen(mycustomttable[i].biosversion))))) &&
418 ((!strlen(mycustomttable[i].biosdate)) ||
419 (ivideo->SiS_Pr.UseROM &&
420 (!strncmp(mycustomttable[i].biosdate, biosdate,
421 strlen(mycustomttable[i].biosdate))))) &&
422 ((!mycustomttable[i].bioschksum) ||
423 (ivideo->SiS_Pr.UseROM &&
424 (mycustomttable[i].bioschksum == chksum))) &&
425 (mycustomttable[i].pcisubsysvendor == ivideo->subsysvendor) &&
426 (mycustomttable[i].pcisubsyscard == ivideo->subsysdevice) ) {
427 footprint = TRUE;
428 for(j = 0; j < 5; j++) {
429 if(mycustomttable[i].biosFootprintAddr[j]) {
430 if(ivideo->SiS_Pr.UseROM) {
431 if(ivideo->SiS_Pr.VirtualRomBase[mycustomttable[i].biosFootprintAddr[j]] !=
432 mycustomttable[i].biosFootprintData[j]) {
433 footprint = FALSE;
434 }
435 } else
436 footprint = FALSE;
437 }
438 }
439 if(footprint) {
440 ivideo->SiS_Pr.SiS_CustomT = mycustomttable[i].SpecialID;
441 printk(KERN_DEBUG "sisfb: Identified [%s %s], special timing applies\n",
442 mycustomttable[i].vendorName,
443 mycustomttable[i].cardName);
444 printk(KERN_DEBUG "sisfb: [specialtiming parameter name: %s]\n",
445 mycustomttable[i].optionName);
446 break;
447 }
448 }
449 i++;
450 } while(mycustomttable[i].chipID);
375} 451}
376 452
377static BOOLEAN __devinit 453static BOOLEAN __devinit
@@ -384,22 +460,23 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer)
384 buffer[2] != 0xff || buffer[3] != 0xff || 460 buffer[2] != 0xff || buffer[3] != 0xff ||
385 buffer[4] != 0xff || buffer[5] != 0xff || 461 buffer[4] != 0xff || buffer[5] != 0xff ||
386 buffer[6] != 0xff || buffer[7] != 0x00) { 462 buffer[6] != 0xff || buffer[7] != 0x00) {
387 printk(KERN_DEBUG "sisfb: Bad EDID header\n"); 463 printk(KERN_DEBUG "sisfb: Bad EDID header\n");
388 return FALSE; 464 return FALSE;
389 } 465 }
390 466
391 if(buffer[0x12] != 0x01) { 467 if(buffer[0x12] != 0x01) {
392 printk(KERN_INFO "sisfb: EDID version %d not supported\n", 468 printk(KERN_INFO "sisfb: EDID version %d not supported\n",
393 buffer[0x12]); 469 buffer[0x12]);
394 return FALSE; 470 return FALSE;
395 } 471 }
396 472
397 monitor->feature = buffer[0x18]; 473 monitor->feature = buffer[0x18];
398 474
399 if(!buffer[0x14] & 0x80) { 475 if(!buffer[0x14] & 0x80) {
400 if(!(buffer[0x14] & 0x08)) { 476 if(!(buffer[0x14] & 0x08)) {
401 printk(KERN_INFO "sisfb: WARNING: Monitor does not support separate syncs\n"); 477 printk(KERN_INFO
402 } 478 "sisfb: WARNING: Monitor does not support separate syncs\n");
479 }
403 } 480 }
404 481
405 if(buffer[0x13] >= 0x01) { 482 if(buffer[0x13] >= 0x01) {
@@ -409,7 +486,7 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer)
409 j = 0x36; 486 j = 0x36;
410 for(i=0; i<4; i++) { 487 for(i=0; i<4; i++) {
411 if(buffer[j] == 0x00 && buffer[j + 1] == 0x00 && 488 if(buffer[j] == 0x00 && buffer[j + 1] == 0x00 &&
412 buffer[j + 2] == 0x00 && buffer[j + 3] == 0xfd && 489 buffer[j + 2] == 0x00 && buffer[j + 3] == 0xfd &&
413 buffer[j + 4] == 0x00) { 490 buffer[j + 4] == 0x00) {
414 monitor->hmin = buffer[j + 7]; 491 monitor->hmin = buffer[j + 7];
415 monitor->hmax = buffer[j + 8]; 492 monitor->hmax = buffer[j + 8];
@@ -435,7 +512,7 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer)
435 emodes = buffer[0x23] | (buffer[0x24] << 8) | (buffer[0x25] << 16); 512 emodes = buffer[0x23] | (buffer[0x24] << 8) | (buffer[0x25] << 16);
436 for(i = 0; i < 13; i++) { 513 for(i = 0; i < 13; i++) {
437 if(emodes & sisfb_ddcsmodes[i].mask) { 514 if(emodes & sisfb_ddcsmodes[i].mask) {
438 if(monitor->hmin > sisfb_ddcsmodes[i].h) monitor->hmin = sisfb_ddcsmodes[i].h; 515 if(monitor->hmin > sisfb_ddcsmodes[i].h) monitor->hmin = sisfb_ddcsmodes[i].h;
439 if(monitor->hmax < sisfb_ddcsmodes[i].h) monitor->hmax = sisfb_ddcsmodes[i].h + 1; 516 if(monitor->hmax < sisfb_ddcsmodes[i].h) monitor->hmax = sisfb_ddcsmodes[i].h + 1;
440 if(monitor->vmin > sisfb_ddcsmodes[i].v) monitor->vmin = sisfb_ddcsmodes[i].v; 517 if(monitor->vmin > sisfb_ddcsmodes[i].v) monitor->vmin = sisfb_ddcsmodes[i].v;
441 if(monitor->vmax < sisfb_ddcsmodes[i].v) monitor->vmax = sisfb_ddcsmodes[i].v; 518 if(monitor->vmax < sisfb_ddcsmodes[i].v) monitor->vmax = sisfb_ddcsmodes[i].v;
@@ -446,80 +523,81 @@ sisfb_interpret_edid(struct sisfb_monitor *monitor, u8 *buffer)
446 for(i = 0; i < 8; i++) { 523 for(i = 0; i < 8; i++) {
447 xres = (buffer[index] + 31) * 8; 524 xres = (buffer[index] + 31) * 8;
448 switch(buffer[index + 1] & 0xc0) { 525 switch(buffer[index + 1] & 0xc0) {
449 case 0xc0: yres = (xres * 9) / 16; break; 526 case 0xc0: yres = (xres * 9) / 16; break;
450 case 0x80: yres = (xres * 4) / 5; break; 527 case 0x80: yres = (xres * 4) / 5; break;
451 case 0x40: yres = (xres * 3) / 4; break; 528 case 0x40: yres = (xres * 3) / 4; break;
452 default: yres = xres; break; 529 default: yres = xres; break;
453 } 530 }
454 refresh = (buffer[index + 1] & 0x3f) + 60; 531 refresh = (buffer[index + 1] & 0x3f) + 60;
455 if((xres >= 640) && (yres >= 480)) { 532 if((xres >= 640) && (yres >= 480)) {
456 for(j = 0; j < 8; j++) { 533 for(j = 0; j < 8; j++) {
457 if((xres == sisfb_ddcfmodes[j].x) && 534 if((xres == sisfb_ddcfmodes[j].x) &&
458 (yres == sisfb_ddcfmodes[j].y) && 535 (yres == sisfb_ddcfmodes[j].y) &&
459 (refresh == sisfb_ddcfmodes[j].v)) { 536 (refresh == sisfb_ddcfmodes[j].v)) {
460 if(monitor->hmin > sisfb_ddcfmodes[j].h) monitor->hmin = sisfb_ddcfmodes[j].h; 537 if(monitor->hmin > sisfb_ddcfmodes[j].h) monitor->hmin = sisfb_ddcfmodes[j].h;
461 if(monitor->hmax < sisfb_ddcfmodes[j].h) monitor->hmax = sisfb_ddcfmodes[j].h + 1; 538 if(monitor->hmax < sisfb_ddcfmodes[j].h) monitor->hmax = sisfb_ddcfmodes[j].h + 1;
462 if(monitor->vmin > sisfb_ddcsmodes[j].v) monitor->vmin = sisfb_ddcsmodes[j].v; 539 if(monitor->vmin > sisfb_ddcsmodes[j].v) monitor->vmin = sisfb_ddcsmodes[j].v;
463 if(monitor->vmax < sisfb_ddcsmodes[j].v) monitor->vmax = sisfb_ddcsmodes[j].v; 540 if(monitor->vmax < sisfb_ddcsmodes[j].v) monitor->vmax = sisfb_ddcsmodes[j].v;
464 if(monitor->dclockmax < sisfb_ddcsmodes[j].d) monitor->dclockmax = sisfb_ddcsmodes[i].d; 541 if(monitor->dclockmax < sisfb_ddcsmodes[j].d) monitor->dclockmax = sisfb_ddcsmodes[j].d;
465 } 542 }
466 } 543 }
467 } 544 }
468 index += 2; 545 index += 2;
469 } 546 }
470 if((monitor->hmin <= monitor->hmax) && (monitor->vmin <= monitor->vmax)) { 547 if((monitor->hmin <= monitor->hmax) && (monitor->vmin <= monitor->vmax)) {
471 monitor->datavalid = TRUE; 548 monitor->datavalid = TRUE;
472 } 549 }
473 } 550 }
474 551
475 return(monitor->datavalid); 552 return monitor->datavalid;
476} 553}
477 554
478static void __devinit 555static void __devinit
479sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, int crtno) 556sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, int crtno)
480{ 557{
481 USHORT temp, i, realcrtno = crtno; 558 unsigned short temp, i, realcrtno = crtno;
482 u8 buffer[256]; 559 unsigned char buffer[256];
483 560
484 monitor->datavalid = FALSE; 561 monitor->datavalid = FALSE;
485 562
486 if(crtno) { 563 if(crtno) {
487 if(ivideo->vbflags & CRT2_LCD) realcrtno = 1; 564 if(ivideo->vbflags & CRT2_LCD) realcrtno = 1;
488 else if(ivideo->vbflags & CRT2_VGA) realcrtno = 2; 565 else if(ivideo->vbflags & CRT2_VGA) realcrtno = 2;
489 else return; 566 else return;
490 } 567 }
491 568
492 if((ivideo->sisfb_crt1off) && (!crtno)) return; 569 if((ivideo->sisfb_crt1off) && (!crtno))
570 return;
493 571
494 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine, 572 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine,
495 realcrtno, 0, &buffer[0]); 573 realcrtno, 0, &buffer[0], ivideo->vbflags2);
496 if((!temp) || (temp == 0xffff)) { 574 if((!temp) || (temp == 0xffff)) {
497 printk(KERN_INFO "sisfb: CRT%d DDC probing failed\n", crtno + 1); 575 printk(KERN_INFO "sisfb: CRT%d DDC probing failed\n", crtno + 1);
498 return; 576 return;
499 } else { 577 } else {
500 printk(KERN_INFO "sisfb: CRT%d DDC supported\n", crtno + 1); 578 printk(KERN_INFO "sisfb: CRT%d DDC supported\n", crtno + 1);
501 printk(KERN_INFO "sisfb: CRT%d DDC level: %s%s%s%s\n", 579 printk(KERN_INFO "sisfb: CRT%d DDC level: %s%s%s%s\n",
502 crtno + 1, 580 crtno + 1,
503 (temp & 0x1a) ? "" : "[none of the supported]", 581 (temp & 0x1a) ? "" : "[none of the supported]",
504 (temp & 0x02) ? "2 " : "", 582 (temp & 0x02) ? "2 " : "",
505 (temp & 0x08) ? "D&P" : "", 583 (temp & 0x08) ? "D&P" : "",
506 (temp & 0x10) ? "FPDI-2" : ""); 584 (temp & 0x10) ? "FPDI-2" : "");
507 if(temp & 0x02) { 585 if(temp & 0x02) {
508 i = 3; /* Number of retrys */ 586 i = 3; /* Number of retrys */
509 do { 587 do {
510 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine, 588 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine,
511 realcrtno, 1, &buffer[0]); 589 realcrtno, 1, &buffer[0], ivideo->vbflags2);
512 } while((temp) && i--); 590 } while((temp) && i--);
513 if(!temp) { 591 if(!temp) {
514 if(sisfb_interpret_edid(monitor, &buffer[0])) { 592 if(sisfb_interpret_edid(monitor, &buffer[0])) {
515 printk(KERN_INFO "sisfb: Monitor range H %d-%dKHz, V %d-%dHz, Max. dotclock %dMHz\n", 593 printk(KERN_INFO "sisfb: Monitor range H %d-%dKHz, V %d-%dHz, Max. dotclock %dMHz\n",
516 monitor->hmin, monitor->hmax, monitor->vmin, monitor->vmax, 594 monitor->hmin, monitor->hmax, monitor->vmin, monitor->vmax,
517 monitor->dclockmax / 1000); 595 monitor->dclockmax / 1000);
518 } else { 596 } else {
519 printk(KERN_INFO "sisfb: CRT%d DDC EDID corrupt\n", crtno + 1); 597 printk(KERN_INFO "sisfb: CRT%d DDC EDID corrupt\n", crtno + 1);
520 } 598 }
521 } else { 599 } else {
522 printk(KERN_INFO "sisfb: CRT%d DDC reading failed\n", crtno + 1); 600 printk(KERN_INFO "sisfb: CRT%d DDC reading failed\n", crtno + 1);
523 } 601 }
524 } else { 602 } else {
525 printk(KERN_INFO "sisfb: VESA D&P and FPDI-2 not supported yet\n"); 603 printk(KERN_INFO "sisfb: VESA D&P and FPDI-2 not supported yet\n");
@@ -527,6 +605,8 @@ sisfb_handle_ddc(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, i
527 } 605 }
528} 606}
529 607
608/* -------------- Mode validation --------------- */
609
530static BOOLEAN 610static BOOLEAN
531sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor, 611sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor,
532 int mode_idx, int rate_idx, int rate) 612 int mode_idx, int rate_idx, int rate)
@@ -534,42 +614,49 @@ sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor,
534 int htotal, vtotal; 614 int htotal, vtotal;
535 unsigned int dclock, hsync; 615 unsigned int dclock, hsync;
536 616
537 if(!monitor->datavalid) return TRUE; 617 if(!monitor->datavalid)
618 return TRUE;
538 619
539 if(mode_idx < 0) return FALSE; 620 if(mode_idx < 0)
621 return FALSE;
540 622
541 /* Skip for 320x200, 320x240, 640x400 */ 623 /* Skip for 320x200, 320x240, 640x400 */
542 switch(sisbios_mode[mode_idx].mode_no[ivideo->mni]) { 624 switch(sisbios_mode[mode_idx].mode_no[ivideo->mni]) {
543 case 0x59: 625 case 0x59:
544 case 0x41: 626 case 0x41:
545 case 0x4f: 627 case 0x4f:
546 case 0x50: 628 case 0x50:
547 case 0x56: 629 case 0x56:
548 case 0x53: 630 case 0x53:
549 case 0x2f: 631 case 0x2f:
550 case 0x5d: 632 case 0x5d:
551 case 0x5e: 633 case 0x5e:
552 return TRUE; 634 return TRUE;
553#ifdef CONFIG_FB_SIS_315 635#ifdef CONFIG_FB_SIS_315
554 case 0x5a: 636 case 0x5a:
555 case 0x5b: 637 case 0x5b:
556 if(ivideo->sisvga_engine == SIS_315_VGA) return TRUE; 638 if(ivideo->sisvga_engine == SIS_315_VGA) return TRUE;
557#endif 639#endif
558 } 640 }
559 641
560 if(rate < (monitor->vmin - 1)) return FALSE; 642 if(rate < (monitor->vmin - 1))
561 if(rate > (monitor->vmax + 1)) return FALSE; 643 return FALSE;
644 if(rate > (monitor->vmax + 1))
645 return FALSE;
562 646
563 if(sisfb_gettotalfrommode(&ivideo->SiS_Pr, &ivideo->sishw_ext, 647 if(sisfb_gettotalfrommode(&ivideo->SiS_Pr,
564 sisbios_mode[mode_idx].mode_no[ivideo->mni], 648 sisbios_mode[mode_idx].mode_no[ivideo->mni],
565 &htotal, &vtotal, rate_idx)) { 649 &htotal, &vtotal, rate_idx)) {
566 dclock = (htotal * vtotal * rate) / 1000; 650 dclock = (htotal * vtotal * rate) / 1000;
567 if(dclock > (monitor->dclockmax + 1000)) return FALSE; 651 if(dclock > (monitor->dclockmax + 1000))
652 return FALSE;
568 hsync = dclock / htotal; 653 hsync = dclock / htotal;
569 if(hsync < (monitor->hmin - 1)) return FALSE; 654 if(hsync < (monitor->hmin - 1))
570 if(hsync > (monitor->hmax + 1)) return FALSE; 655 return FALSE;
656 if(hsync > (monitor->hmax + 1))
657 return FALSE;
571 } else { 658 } else {
572 return FALSE; 659 return FALSE;
573 } 660 }
574 return TRUE; 661 return TRUE;
575} 662}
@@ -577,82 +664,79 @@ sisfb_verify_rate(struct sis_video_info *ivideo, struct sisfb_monitor *monitor,
577static int 664static int
578sisfb_validate_mode(struct sis_video_info *ivideo, int myindex, u32 vbflags) 665sisfb_validate_mode(struct sis_video_info *ivideo, int myindex, u32 vbflags)
579{ 666{
580 u16 xres=0, yres, myres; 667 u16 xres=0, yres, myres;
581 668
582#ifdef CONFIG_FB_SIS_300 669#ifdef CONFIG_FB_SIS_300
583 if(ivideo->sisvga_engine == SIS_300_VGA) { 670 if(ivideo->sisvga_engine == SIS_300_VGA) {
584 if(!(sisbios_mode[myindex].chipset & MD_SIS300)) return(-1); 671 if(!(sisbios_mode[myindex].chipset & MD_SIS300))
585 } 672 return -1 ;
673 }
586#endif 674#endif
587#ifdef CONFIG_FB_SIS_315 675#ifdef CONFIG_FB_SIS_315
588 if(ivideo->sisvga_engine == SIS_315_VGA) { 676 if(ivideo->sisvga_engine == SIS_315_VGA) {
589 if(!(sisbios_mode[myindex].chipset & MD_SIS315)) return(-1); 677 if(!(sisbios_mode[myindex].chipset & MD_SIS315))
590 } 678 return -1;
679 }
591#endif 680#endif
592 681
593 myres = sisbios_mode[myindex].yres; 682 myres = sisbios_mode[myindex].yres;
594
595 switch(vbflags & VB_DISPTYPE_DISP2) {
596 683
597 case CRT2_LCD: 684 switch(vbflags & VB_DISPTYPE_DISP2) {
598 685
599 xres = ivideo->lcdxres; yres = ivideo->lcdyres; 686 case CRT2_LCD:
687 xres = ivideo->lcdxres; yres = ivideo->lcdyres;
600 688
601 if(ivideo->SiS_Pr.SiS_CustomT != CUT_PANEL848) { 689 if((ivideo->SiS_Pr.SiS_CustomT != CUT_PANEL848) &&
602 if(sisbios_mode[myindex].xres > xres) return(-1); 690 (ivideo->SiS_Pr.SiS_CustomT != CUT_PANEL856)) {
603 if(myres > yres) return(-1); 691 if(sisbios_mode[myindex].xres > xres)
604 } 692 return -1;
693 if(myres > yres)
694 return -1;
695 }
605 696
606 if(vbflags & (VB_LVDS | VB_30xBDH)) { 697 if(ivideo->sisfb_fstn) {
607 if(sisbios_mode[myindex].xres == 320) { 698 if(sisbios_mode[myindex].xres == 320) {
608 if((myres == 240) || (myres == 480)) { 699 if(myres == 240) {
609 if(!ivideo->sisfb_fstn) { 700 switch(sisbios_mode[myindex].mode_no[1]) {
610 if(sisbios_mode[myindex].mode_no[1] == 0x5a || 701 case 0x50: myindex = MODE_FSTN_8; break;
611 sisbios_mode[myindex].mode_no[1] == 0x5b) 702 case 0x56: myindex = MODE_FSTN_16; break;
612 return(-1); 703 case 0x53: return -1;
613 } else { 704 }
614 if(sisbios_mode[myindex].mode_no[1] == 0x50 || 705 }
615 sisbios_mode[myindex].mode_no[1] == 0x56 || 706 }
616 sisbios_mode[myindex].mode_no[1] == 0x53) 707 }
617 return(-1);
618 }
619 }
620 }
621 }
622 708
623 if(SiS_GetModeID_LCD(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres, 709 if(SiS_GetModeID_LCD(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres,
624 sisbios_mode[myindex].yres, 0, ivideo->sisfb_fstn, 710 sisbios_mode[myindex].yres, 0, ivideo->sisfb_fstn,
625 ivideo->SiS_Pr.SiS_CustomT, xres, yres) < 0x14) { 711 ivideo->SiS_Pr.SiS_CustomT, xres, yres, ivideo->vbflags2) < 0x14) {
626 return(-1); 712 return -1;
627 } 713 }
628 break; 714 break;
629 715
630 case CRT2_TV: 716 case CRT2_TV:
631 if(SiS_GetModeID_TV(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres, 717 if(SiS_GetModeID_TV(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres,
632 sisbios_mode[myindex].yres, 0) < 0x14) { 718 sisbios_mode[myindex].yres, 0, ivideo->vbflags2) < 0x14) {
633 return(-1); 719 return -1;
634 } 720 }
635 break; 721 break;
636 722
637 case CRT2_VGA: 723 case CRT2_VGA:
638 if(SiS_GetModeID_VGA2(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres, 724 if(SiS_GetModeID_VGA2(ivideo->sisvga_engine, vbflags, sisbios_mode[myindex].xres,
639 sisbios_mode[myindex].yres, 0) < 0x14) { 725 sisbios_mode[myindex].yres, 0, ivideo->vbflags2) < 0x14) {
640 return(-1); 726 return -1;
727 }
728 break;
641 } 729 }
642 break;
643 }
644 730
645 return(myindex); 731 return myindex;
646} 732}
647 733
648static u8 734static u8
649sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int mode_idx) 735sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int mode_idx)
650{ 736{
651 u16 xres, yres;
652 int i = 0; 737 int i = 0;
653 738 u16 xres = sisbios_mode[mode_idx].xres;
654 xres = sisbios_mode[mode_idx].xres; 739 u16 yres = sisbios_mode[mode_idx].yres;
655 yres = sisbios_mode[mode_idx].yres;
656 740
657 ivideo->rate_idx = 0; 741 ivideo->rate_idx = 0;
658 while((sisfb_vrate[i].idx != 0) && (sisfb_vrate[i].xres <= xres)) { 742 while((sisfb_vrate[i].idx != 0) && (sisfb_vrate[i].xres <= xres)) {
@@ -672,14 +756,14 @@ sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int
672 rate, sisfb_vrate[i-1].refresh); 756 rate, sisfb_vrate[i-1].refresh);
673 ivideo->rate_idx = sisfb_vrate[i-1].idx; 757 ivideo->rate_idx = sisfb_vrate[i-1].idx;
674 ivideo->refresh_rate = sisfb_vrate[i-1].refresh; 758 ivideo->refresh_rate = sisfb_vrate[i-1].refresh;
675 } 759 }
676 break; 760 break;
677 } else if((rate - sisfb_vrate[i].refresh) <= 2) { 761 } else if((rate - sisfb_vrate[i].refresh) <= 2) {
678 DPRINTK("sisfb: Adjusting rate from %d down to %d\n", 762 DPRINTK("sisfb: Adjusting rate from %d down to %d\n",
679 rate, sisfb_vrate[i].refresh); 763 rate, sisfb_vrate[i].refresh);
680 ivideo->rate_idx = sisfb_vrate[i].idx; 764 ivideo->rate_idx = sisfb_vrate[i].idx;
681 break; 765 break;
682 } 766 }
683 } 767 }
684 i++; 768 i++;
685 } 769 }
@@ -695,252 +779,321 @@ sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, int
695static BOOLEAN 779static BOOLEAN
696sisfb_bridgeisslave(struct sis_video_info *ivideo) 780sisfb_bridgeisslave(struct sis_video_info *ivideo)
697{ 781{
698 unsigned char P1_00; 782 unsigned char P1_00;
699 783
700 if(!(ivideo->vbflags & VB_VIDEOBRIDGE)) return FALSE; 784 if(!(ivideo->vbflags2 & VB2_VIDEOBRIDGE))
785 return FALSE;
701 786
702 inSISIDXREG(SISPART1,0x00,P1_00); 787 inSISIDXREG(SISPART1,0x00,P1_00);
703 if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) || 788 if( ((ivideo->sisvga_engine == SIS_300_VGA) && (P1_00 & 0xa0) == 0x20) ||
704 ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) { 789 ((ivideo->sisvga_engine == SIS_315_VGA) && (P1_00 & 0x50) == 0x10) ) {
705 return TRUE; 790 return TRUE;
706 } else { 791 } else {
707 return FALSE; 792 return FALSE;
708 } 793 }
709} 794}
710 795
711static BOOLEAN 796static BOOLEAN
712sisfballowretracecrt1(struct sis_video_info *ivideo) 797sisfballowretracecrt1(struct sis_video_info *ivideo)
713{ 798{
714 u8 temp; 799 u8 temp;
715 800
716 inSISIDXREG(SISCR,0x17,temp); 801 inSISIDXREG(SISCR,0x17,temp);
717 if(!(temp & 0x80)) return FALSE; 802 if(!(temp & 0x80))
803 return FALSE;
718 804
719 inSISIDXREG(SISSR,0x1f,temp); 805 inSISIDXREG(SISSR,0x1f,temp);
720 if(temp & 0xc0) return FALSE; 806 if(temp & 0xc0)
807 return FALSE;
721 808
722 return TRUE; 809 return TRUE;
723} 810}
724 811
725static BOOLEAN 812static BOOLEAN
726sisfbcheckvretracecrt1(struct sis_video_info *ivideo) 813sisfbcheckvretracecrt1(struct sis_video_info *ivideo)
727{ 814{
728 if(!sisfballowretracecrt1(ivideo)) return FALSE; 815 if(!sisfballowretracecrt1(ivideo))
816 return FALSE;
729 817
730 if(inSISREG(SISINPSTAT) & 0x08) return TRUE; 818 if(inSISREG(SISINPSTAT) & 0x08)
731 else return FALSE; 819 return TRUE;
820 else
821 return FALSE;
732} 822}
733 823
734static void 824static void
735sisfbwaitretracecrt1(struct sis_video_info *ivideo) 825sisfbwaitretracecrt1(struct sis_video_info *ivideo)
736{ 826{
737 int watchdog; 827 int watchdog;
738 828
739 if(!sisfballowretracecrt1(ivideo)) return; 829 if(!sisfballowretracecrt1(ivideo))
830 return;
740 831
741 watchdog = 65536; 832 watchdog = 65536;
742 while((!(inSISREG(SISINPSTAT) & 0x08)) && --watchdog); 833 while((!(inSISREG(SISINPSTAT) & 0x08)) && --watchdog);
743 watchdog = 65536; 834 watchdog = 65536;
744 while((inSISREG(SISINPSTAT) & 0x08) && --watchdog); 835 while((inSISREG(SISINPSTAT) & 0x08) && --watchdog);
745} 836}
746 837
747static BOOLEAN 838static BOOLEAN
748sisfbcheckvretracecrt2(struct sis_video_info *ivideo) 839sisfbcheckvretracecrt2(struct sis_video_info *ivideo)
749{ 840{
750 unsigned char temp, reg; 841 unsigned char temp, reg;
751 842
752 switch(ivideo->sisvga_engine) { 843 switch(ivideo->sisvga_engine) {
753 case SIS_300_VGA: reg = 0x25; break; 844 case SIS_300_VGA: reg = 0x25; break;
754 case SIS_315_VGA: reg = 0x30; break; 845 case SIS_315_VGA: reg = 0x30; break;
755 default: return FALSE; 846 default: return FALSE;
756 } 847 }
757 848
758 inSISIDXREG(SISPART1, reg, temp); 849 inSISIDXREG(SISPART1, reg, temp);
759 if(temp & 0x02) return TRUE; 850 if(temp & 0x02)
760 else return FALSE; 851 return TRUE;
852 else
853 return FALSE;
761} 854}
762 855
763static BOOLEAN 856static BOOLEAN
764sisfb_CheckVBRetrace(struct sis_video_info *ivideo) 857sisfb_CheckVBRetrace(struct sis_video_info *ivideo)
765{ 858{
766 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { 859 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
767 if(sisfb_bridgeisslave(ivideo)) { 860 if(!sisfb_bridgeisslave(ivideo)) {
768 return(sisfbcheckvretracecrt1(ivideo)); 861 return sisfbcheckvretracecrt2(ivideo);
769 } else { 862 }
770 return(sisfbcheckvretracecrt2(ivideo)); 863 }
771 } 864 return sisfbcheckvretracecrt1(ivideo);
772 }
773 return(sisfbcheckvretracecrt1(ivideo));
774} 865}
775 866
776static u32 867static u32
777sisfb_setupvbblankflags(struct sis_video_info *ivideo, u32 *vcount, u32 *hcount) 868sisfb_setupvbblankflags(struct sis_video_info *ivideo, u32 *vcount, u32 *hcount)
778{ 869{
779 u8 idx, reg1, reg2, reg3, reg4; 870 u8 idx, reg1, reg2, reg3, reg4;
780 u32 ret = 0; 871 u32 ret = 0;
781 872
782 (*vcount) = (*hcount) = 0; 873 (*vcount) = (*hcount) = 0;
783 874
784 if((ivideo->currentvbflags & VB_DISPTYPE_DISP2) && (!(sisfb_bridgeisslave(ivideo)))) { 875 if((ivideo->currentvbflags & VB_DISPTYPE_DISP2) && (!(sisfb_bridgeisslave(ivideo)))) {
785 ret |= (FB_VBLANK_HAVE_VSYNC | 876
786 FB_VBLANK_HAVE_HBLANK | 877 ret |= (FB_VBLANK_HAVE_VSYNC |
787 FB_VBLANK_HAVE_VBLANK | 878 FB_VBLANK_HAVE_HBLANK |
788 FB_VBLANK_HAVE_VCOUNT | 879 FB_VBLANK_HAVE_VBLANK |
789 FB_VBLANK_HAVE_HCOUNT); 880 FB_VBLANK_HAVE_VCOUNT |
790 switch(ivideo->sisvga_engine) { 881 FB_VBLANK_HAVE_HCOUNT);
791 case SIS_300_VGA: idx = 0x25; break; 882 switch(ivideo->sisvga_engine) {
792 default: 883 case SIS_300_VGA: idx = 0x25; break;
793 case SIS_315_VGA: idx = 0x30; break; 884 default:
794 } 885 case SIS_315_VGA: idx = 0x30; break;
795 inSISIDXREG(SISPART1,(idx+0),reg1); /* 30 */ 886 }
796 inSISIDXREG(SISPART1,(idx+1),reg2); /* 31 */ 887 inSISIDXREG(SISPART1,(idx+0),reg1); /* 30 */
797 inSISIDXREG(SISPART1,(idx+2),reg3); /* 32 */ 888 inSISIDXREG(SISPART1,(idx+1),reg2); /* 31 */
798 inSISIDXREG(SISPART1,(idx+3),reg4); /* 33 */ 889 inSISIDXREG(SISPART1,(idx+2),reg3); /* 32 */
799 if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING; 890 inSISIDXREG(SISPART1,(idx+3),reg4); /* 33 */
800 if(reg1 & 0x02) ret |= FB_VBLANK_VSYNCING; 891 if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING;
801 if(reg4 & 0x80) ret |= FB_VBLANK_HBLANKING; 892 if(reg1 & 0x02) ret |= FB_VBLANK_VSYNCING;
802 (*vcount) = reg3 | ((reg4 & 0x70) << 4); 893 if(reg4 & 0x80) ret |= FB_VBLANK_HBLANKING;
803 (*hcount) = reg2 | ((reg4 & 0x0f) << 8); 894 (*vcount) = reg3 | ((reg4 & 0x70) << 4);
804 } else if(sisfballowretracecrt1(ivideo)) { 895 (*hcount) = reg2 | ((reg4 & 0x0f) << 8);
805 ret |= (FB_VBLANK_HAVE_VSYNC | 896
806 FB_VBLANK_HAVE_VBLANK | 897 } else if(sisfballowretracecrt1(ivideo)) {
807 FB_VBLANK_HAVE_VCOUNT | 898
808 FB_VBLANK_HAVE_HCOUNT); 899 ret |= (FB_VBLANK_HAVE_VSYNC |
809 reg1 = inSISREG(SISINPSTAT); 900 FB_VBLANK_HAVE_VBLANK |
810 if(reg1 & 0x08) ret |= FB_VBLANK_VSYNCING; 901 FB_VBLANK_HAVE_VCOUNT |
811 if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING; 902 FB_VBLANK_HAVE_HCOUNT);
812 inSISIDXREG(SISCR,0x20,reg1); 903 reg1 = inSISREG(SISINPSTAT);
813 inSISIDXREG(SISCR,0x1b,reg1); 904 if(reg1 & 0x08) ret |= FB_VBLANK_VSYNCING;
814 inSISIDXREG(SISCR,0x1c,reg2); 905 if(reg1 & 0x01) ret |= FB_VBLANK_VBLANKING;
815 inSISIDXREG(SISCR,0x1d,reg3); 906 inSISIDXREG(SISCR,0x20,reg1);
816 (*vcount) = reg2 | ((reg3 & 0x07) << 8); 907 inSISIDXREG(SISCR,0x1b,reg1);
817 (*hcount) = (reg1 | ((reg3 & 0x10) << 4)) << 3; 908 inSISIDXREG(SISCR,0x1c,reg2);
818 } 909 inSISIDXREG(SISCR,0x1d,reg3);
819 return ret; 910 (*vcount) = reg2 | ((reg3 & 0x07) << 8);
911 (*hcount) = (reg1 | ((reg3 & 0x10) << 4)) << 3;
912 }
913
914 return ret;
820} 915}
821 916
822static int 917static int
823sisfb_myblank(struct sis_video_info *ivideo, int blank) 918sisfb_myblank(struct sis_video_info *ivideo, int blank)
824{ 919{
825 u8 sr01, sr11, sr1f, cr63=0, p2_0, p1_13; 920 u8 sr01, sr11, sr1f, cr63=0, p2_0, p1_13;
826 BOOLEAN backlight = TRUE; 921 BOOLEAN backlight = TRUE;
827 922
828 switch(blank) { 923 switch(blank) {
829 case FB_BLANK_UNBLANK: /* on */ 924 case FB_BLANK_UNBLANK: /* on */
830 sr01 = 0x00; 925 sr01 = 0x00;
831 sr11 = 0x00; 926 sr11 = 0x00;
832 sr1f = 0x00; 927 sr1f = 0x00;
833 cr63 = 0x00; 928 cr63 = 0x00;
834 p2_0 = 0x20; 929 p2_0 = 0x20;
835 p1_13 = 0x00; 930 p1_13 = 0x00;
836 backlight = TRUE; 931 backlight = TRUE;
837 break; 932 break;
838 case FB_BLANK_NORMAL: /* blank */ 933 case FB_BLANK_NORMAL: /* blank */
839 sr01 = 0x20; 934 sr01 = 0x20;
840 sr11 = 0x00; 935 sr11 = 0x00;
841 sr1f = 0x00; 936 sr1f = 0x00;
842 cr63 = 0x00; 937 cr63 = 0x00;
843 p2_0 = 0x20; 938 p2_0 = 0x20;
844 p1_13 = 0x00; 939 p1_13 = 0x00;
845 backlight = TRUE; 940 backlight = TRUE;
846 break; 941 break;
847 case FB_BLANK_VSYNC_SUSPEND: /* no vsync */ 942 case FB_BLANK_VSYNC_SUSPEND: /* no vsync */
848 sr01 = 0x20; 943 sr01 = 0x20;
849 sr11 = 0x08; 944 sr11 = 0x08;
850 sr1f = 0x80; 945 sr1f = 0x80;
851 cr63 = 0x40; 946 cr63 = 0x40;
852 p2_0 = 0x40; 947 p2_0 = 0x40;
853 p1_13 = 0x80; 948 p1_13 = 0x80;
854 backlight = FALSE; 949 backlight = FALSE;
855 break; 950 break;
856 case FB_BLANK_HSYNC_SUSPEND: /* no hsync */ 951 case FB_BLANK_HSYNC_SUSPEND: /* no hsync */
857 sr01 = 0x20; 952 sr01 = 0x20;
858 sr11 = 0x08; 953 sr11 = 0x08;
859 sr1f = 0x40; 954 sr1f = 0x40;
860 cr63 = 0x40; 955 cr63 = 0x40;
861 p2_0 = 0x80; 956 p2_0 = 0x80;
862 p1_13 = 0x40; 957 p1_13 = 0x40;
863 backlight = FALSE; 958 backlight = FALSE;
864 break; 959 break;
865 case FB_BLANK_POWERDOWN: /* off */ 960 case FB_BLANK_POWERDOWN: /* off */
866 sr01 = 0x20; 961 sr01 = 0x20;
867 sr11 = 0x08; 962 sr11 = 0x08;
868 sr1f = 0xc0; 963 sr1f = 0xc0;
869 cr63 = 0x40; 964 cr63 = 0x40;
870 p2_0 = 0xc0; 965 p2_0 = 0xc0;
871 p1_13 = 0xc0; 966 p1_13 = 0xc0;
872 backlight = FALSE; 967 backlight = FALSE;
873 break; 968 break;
874 default: 969 default:
875 return 1; 970 return 1;
876 } 971 }
877 972
878 if(ivideo->currentvbflags & VB_DISPTYPE_CRT1) { 973 if(ivideo->currentvbflags & VB_DISPTYPE_CRT1) {
879 974
880 if( (!ivideo->sisfb_thismonitor.datavalid) || 975 if( (!ivideo->sisfb_thismonitor.datavalid) ||
881 ((ivideo->sisfb_thismonitor.datavalid) && 976 ((ivideo->sisfb_thismonitor.datavalid) &&
882 (ivideo->sisfb_thismonitor.feature & 0xe0))) { 977 (ivideo->sisfb_thismonitor.feature & 0xe0))) {
883 978
884 if(ivideo->sisvga_engine == SIS_315_VGA) { 979 if(ivideo->sisvga_engine == SIS_315_VGA) {
885 setSISIDXREG(SISCR, ivideo->SiS_Pr.SiS_MyCR63, 0xbf, cr63); 980 setSISIDXREG(SISCR, ivideo->SiS_Pr.SiS_MyCR63, 0xbf, cr63);
886 } 981 }
887 982
888 if(!(sisfb_bridgeisslave(ivideo))) { 983 if(!(sisfb_bridgeisslave(ivideo))) {
889 setSISIDXREG(SISSR, 0x01, ~0x20, sr01); 984 setSISIDXREG(SISSR, 0x01, ~0x20, sr01);
890 setSISIDXREG(SISSR, 0x1f, 0x3f, sr1f); 985 setSISIDXREG(SISSR, 0x1f, 0x3f, sr1f);
891 } 986 }
892 } 987 }
893 988
894 } 989 }
895 990
896 if(ivideo->currentvbflags & CRT2_LCD) { 991 if(ivideo->currentvbflags & CRT2_LCD) {
897 992
898 if(ivideo->vbflags & (VB_301LV|VB_302LV|VB_302ELV)) { 993 if(ivideo->vbflags2 & VB2_SISLVDSBRIDGE) {
899 if(backlight) { 994 if(backlight) {
900 SiS_SiS30xBLOn(&ivideo->SiS_Pr, &ivideo->sishw_ext); 995 SiS_SiS30xBLOn(&ivideo->SiS_Pr);
901 } else { 996 } else {
902 SiS_SiS30xBLOff(&ivideo->SiS_Pr, &ivideo->sishw_ext); 997 SiS_SiS30xBLOff(&ivideo->SiS_Pr);
903 } 998 }
904 } else if(ivideo->sisvga_engine == SIS_315_VGA) { 999 } else if(ivideo->sisvga_engine == SIS_315_VGA) {
905 if(ivideo->vbflags & VB_CHRONTEL) { 1000#ifdef CONFIG_FB_SIS_315
906 if(backlight) { 1001 if(ivideo->vbflags2 & VB2_CHRONTEL) {
907 SiS_Chrontel701xBLOn(&ivideo->SiS_Pr,&ivideo->sishw_ext); 1002 if(backlight) {
908 } else { 1003 SiS_Chrontel701xBLOn(&ivideo->SiS_Pr);
909 SiS_Chrontel701xBLOff(&ivideo->SiS_Pr); 1004 } else {
910 } 1005 SiS_Chrontel701xBLOff(&ivideo->SiS_Pr);
911 } 1006 }
912 } 1007 }
913 1008#endif
914 if(((ivideo->sisvga_engine == SIS_300_VGA) && 1009 }
915 (ivideo->vbflags & (VB_301|VB_30xBDH|VB_LVDS))) || 1010
916 ((ivideo->sisvga_engine == SIS_315_VGA) && 1011 if(((ivideo->sisvga_engine == SIS_300_VGA) &&
917 ((ivideo->vbflags & (VB_LVDS | VB_CHRONTEL)) == VB_LVDS))) { 1012 (ivideo->vbflags2 & (VB2_301|VB2_30xBDH|VB2_LVDS))) ||
918 setSISIDXREG(SISSR, 0x11, ~0x0c, sr11); 1013 ((ivideo->sisvga_engine == SIS_315_VGA) &&
919 } 1014 ((ivideo->vbflags2 & (VB2_LVDS | VB2_CHRONTEL)) == VB2_LVDS))) {
920 1015 setSISIDXREG(SISSR, 0x11, ~0x0c, sr11);
921 if(ivideo->sisvga_engine == SIS_300_VGA) { 1016 }
922 if((ivideo->vbflags & (VB_301B|VB_301C|VB_302B)) && 1017
923 (!(ivideo->vbflags & VB_30xBDH))) { 1018 if(ivideo->sisvga_engine == SIS_300_VGA) {
924 setSISIDXREG(SISPART1, 0x13, 0x3f, p1_13); 1019 if((ivideo->vbflags2 & VB2_30xB) &&
925 } 1020 (!(ivideo->vbflags2 & VB2_30xBDH))) {
926 } else if(ivideo->sisvga_engine == SIS_315_VGA) { 1021 setSISIDXREG(SISPART1, 0x13, 0x3f, p1_13);
927 if((ivideo->vbflags & (VB_301B|VB_301C|VB_302B)) && 1022 }
928 (!(ivideo->vbflags & VB_30xBDH))) { 1023 } else if(ivideo->sisvga_engine == SIS_315_VGA) {
929 setSISIDXREG(SISPART2, 0x00, 0x1f, p2_0); 1024 if((ivideo->vbflags2 & VB2_30xB) &&
930 } 1025 (!(ivideo->vbflags2 & VB2_30xBDH))) {
931 } 1026 setSISIDXREG(SISPART2, 0x00, 0x1f, p2_0);
932 1027 }
933 } else if(ivideo->currentvbflags & CRT2_VGA) { 1028 }
934 1029
935 if(ivideo->vbflags & (VB_301B|VB_301C|VB_302B)) { 1030 } else if(ivideo->currentvbflags & CRT2_VGA) {
936 setSISIDXREG(SISPART2, 0x00, 0x1f, p2_0); 1031
937 } 1032 if(ivideo->vbflags2 & VB2_30xB) {
938 1033 setSISIDXREG(SISPART2, 0x00, 0x1f, p2_0);
939 } 1034 }
940 1035
941 return(0); 1036 }
1037
1038 return 0;
1039}
1040
1041/* ------------- Callbacks from init.c/init301.c -------------- */
1042
1043#ifdef CONFIG_FB_SIS_300
1044unsigned int
1045sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg)
1046{
1047 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1048 u32 val = 0;
1049
1050 pci_read_config_dword(ivideo->nbridge, reg, &val);
1051 return (unsigned int)val;
1052}
1053
1054void
1055sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val)
1056{
1057 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1058
1059 pci_write_config_dword(ivideo->nbridge, reg, (u32)val);
942} 1060}
943 1061
1062unsigned int
1063sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg)
1064{
1065 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1066 u32 val = 0;
1067
1068 if(!ivideo->lpcdev) return 0;
1069
1070 pci_read_config_dword(ivideo->lpcdev, reg, &val);
1071 return (unsigned int)val;
1072}
1073#endif
1074
1075#ifdef CONFIG_FB_SIS_315
1076void
1077sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val)
1078{
1079 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1080
1081 pci_write_config_byte(ivideo->nbridge, reg, (u8)val);
1082}
1083
1084unsigned int
1085sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg)
1086{
1087 struct sis_video_info *ivideo = (struct sis_video_info *)SiS_Pr->ivideo;
1088 u16 val = 0;
1089
1090 if(!ivideo->lpcdev) return 0;
1091
1092 pci_read_config_word(ivideo->lpcdev, reg, &val);
1093 return (unsigned int)val;
1094}
1095#endif
1096
944/* ----------- FBDev related routines for all series ----------- */ 1097/* ----------- FBDev related routines for all series ----------- */
945 1098
946static int 1099static int
@@ -952,7 +1105,7 @@ sisfb_get_cmap_len(const struct fb_var_screeninfo *var)
952static void 1105static void
953sisfb_set_vparms(struct sis_video_info *ivideo) 1106sisfb_set_vparms(struct sis_video_info *ivideo)
954{ 1107{
955 switch(ivideo->video_bpp) { 1108 switch(ivideo->video_bpp) {
956 case 8: 1109 case 8:
957 ivideo->DstColor = 0x0000; 1110 ivideo->DstColor = 0x0000;
958 ivideo->SiS310_AccelDepth = 0x00000000; 1111 ivideo->SiS310_AccelDepth = 0x00000000;
@@ -972,14 +1125,13 @@ sisfb_set_vparms(struct sis_video_info *ivideo)
972 ivideo->video_cmap_len = 16; 1125 ivideo->video_cmap_len = 16;
973 printk(KERN_ERR "sisfb: Unsupported depth %d", ivideo->video_bpp); 1126 printk(KERN_ERR "sisfb: Unsupported depth %d", ivideo->video_bpp);
974 ivideo->accel = 0; 1127 ivideo->accel = 0;
975 break; 1128 }
976 }
977} 1129}
978 1130
979static int 1131static int
980sisfb_calc_maxyres(struct sis_video_info *ivideo, struct fb_var_screeninfo *var) 1132sisfb_calc_maxyres(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
981{ 1133{
982 int maxyres = ivideo->heapstart / (var->xres_virtual * (var->bits_per_pixel >> 3)); 1134 int maxyres = ivideo->sisfb_mem / (var->xres_virtual * (var->bits_per_pixel >> 3));
983 1135
984 if(maxyres > 32767) maxyres = 32767; 1136 if(maxyres > 32767) maxyres = 32767;
985 1137
@@ -996,30 +1148,29 @@ sisfb_calc_pitch(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
996 ivideo->scrnpitchCRT1 <<= 1; 1148 ivideo->scrnpitchCRT1 <<= 1;
997 } 1149 }
998 } 1150 }
999
1000} 1151}
1001 1152
1002static void 1153static void
1003sisfb_set_pitch(struct sis_video_info *ivideo) 1154sisfb_set_pitch(struct sis_video_info *ivideo)
1004{ 1155{
1005 BOOLEAN isslavemode = FALSE; 1156 BOOLEAN isslavemode = FALSE;
1006 unsigned short HDisplay1 = ivideo->scrnpitchCRT1 >> 3; 1157 unsigned short HDisplay1 = ivideo->scrnpitchCRT1 >> 3;
1007 unsigned short HDisplay2 = ivideo->video_linelength >> 3; 1158 unsigned short HDisplay2 = ivideo->video_linelength >> 3;
1008 1159
1009 if(sisfb_bridgeisslave(ivideo)) isslavemode = TRUE; 1160 if(sisfb_bridgeisslave(ivideo)) isslavemode = TRUE;
1010 1161
1011 /* We need to set pitch for CRT1 if bridge is in slave mode, too */ 1162 /* We need to set pitch for CRT1 if bridge is in slave mode, too */
1012 if((ivideo->currentvbflags & VB_DISPTYPE_DISP1) || (isslavemode)) { 1163 if((ivideo->currentvbflags & VB_DISPTYPE_DISP1) || (isslavemode)) {
1013 outSISIDXREG(SISCR,0x13,(HDisplay1 & 0xFF)); 1164 outSISIDXREG(SISCR,0x13,(HDisplay1 & 0xFF));
1014 setSISIDXREG(SISSR,0x0E,0xF0,(HDisplay1 >> 8)); 1165 setSISIDXREG(SISSR,0x0E,0xF0,(HDisplay1 >> 8));
1015 } 1166 }
1016 1167
1017 /* We must not set the pitch for CRT2 if bridge is in slave mode */ 1168 /* We must not set the pitch for CRT2 if bridge is in slave mode */
1018 if((ivideo->currentvbflags & VB_DISPTYPE_DISP2) && (!isslavemode)) { 1169 if((ivideo->currentvbflags & VB_DISPTYPE_DISP2) && (!isslavemode)) {
1019 orSISIDXREG(SISPART1,ivideo->CRT2_write_enable,0x01); 1170 orSISIDXREG(SISPART1,ivideo->CRT2_write_enable,0x01);
1020 outSISIDXREG(SISPART1,0x07,(HDisplay2 & 0xFF)); 1171 outSISIDXREG(SISPART1,0x07,(HDisplay2 & 0xFF));
1021 setSISIDXREG(SISPART1,0x09,0xF0,(HDisplay2 >> 8)); 1172 setSISIDXREG(SISPART1,0x09,0xF0,(HDisplay2 >> 8));
1022 } 1173 }
1023} 1174}
1024 1175
1025static void 1176static void
@@ -1056,12 +1207,41 @@ sisfb_bpp_to_var(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
1056} 1207}
1057 1208
1058static int 1209static int
1210sisfb_set_mode(struct sis_video_info *ivideo, int clrscrn)
1211{
1212 unsigned short modeno = ivideo->mode_no;
1213
1214 /* >=2.6.12's fbcon clears the screen anyway */
1215#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,12)
1216 if(!clrscrn) modeno |= 0x80;
1217#else
1218 modeno |= 0x80;
1219#endif
1220
1221 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1222
1223 sisfb_pre_setmode(ivideo);
1224
1225 if(SiSSetMode(&ivideo->SiS_Pr, modeno) == 0) {
1226 printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", ivideo->mode_no);
1227 return -EINVAL;
1228 }
1229
1230 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1231
1232 sisfb_post_setmode(ivideo);
1233
1234 return 0;
1235}
1236
1237
1238static int
1059sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *info) 1239sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *info)
1060{ 1240{
1061 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1241 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1062 unsigned int htotal = 0, vtotal = 0; 1242 unsigned int htotal = 0, vtotal = 0;
1063 unsigned int drate = 0, hrate = 0; 1243 unsigned int drate = 0, hrate = 0;
1064 int found_mode = 0; 1244 int found_mode = 0, ret;
1065 int old_mode; 1245 int old_mode;
1066 u32 pixclock; 1246 u32 pixclock;
1067 1247
@@ -1088,11 +1268,11 @@ sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *in
1088 } 1268 }
1089 1269
1090 if(pixclock && htotal && vtotal) { 1270 if(pixclock && htotal && vtotal) {
1091 drate = 1000000000 / pixclock; 1271 drate = 1000000000 / pixclock;
1092 hrate = (drate * 1000) / htotal; 1272 hrate = (drate * 1000) / htotal;
1093 ivideo->refresh_rate = (unsigned int) (hrate * 2 / vtotal); 1273 ivideo->refresh_rate = (unsigned int) (hrate * 2 / vtotal);
1094 } else { 1274 } else {
1095 ivideo->refresh_rate = 60; 1275 ivideo->refresh_rate = 60;
1096 } 1276 }
1097 1277
1098 old_mode = ivideo->sisfb_mode_idx; 1278 old_mode = ivideo->sisfb_mode_idx;
@@ -1113,6 +1293,7 @@ sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *in
1113 if(found_mode) { 1293 if(found_mode) {
1114 ivideo->sisfb_mode_idx = sisfb_validate_mode(ivideo, 1294 ivideo->sisfb_mode_idx = sisfb_validate_mode(ivideo,
1115 ivideo->sisfb_mode_idx, ivideo->currentvbflags); 1295 ivideo->sisfb_mode_idx, ivideo->currentvbflags);
1296 ivideo->mode_no = sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni];
1116 } else { 1297 } else {
1117 ivideo->sisfb_mode_idx = -1; 1298 ivideo->sisfb_mode_idx = -1;
1118 } 1299 }
@@ -1131,10 +1312,10 @@ sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *in
1131 1312
1132#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 1313#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1133 if(ivideo->sisfb_thismonitor.datavalid) { 1314 if(ivideo->sisfb_thismonitor.datavalid) {
1134 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor, ivideo->sisfb_mode_idx, 1315 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor, ivideo->sisfb_mode_idx,
1135 ivideo->rate_idx, ivideo->refresh_rate)) { 1316 ivideo->rate_idx, ivideo->refresh_rate)) {
1136 printk(KERN_INFO "sisfb: WARNING: Refresh rate exceeds monitor specs!\n"); 1317 printk(KERN_INFO "sisfb: WARNING: Refresh rate exceeds monitor specs!\n");
1137 } 1318 }
1138 } 1319 }
1139#endif 1320#endif
1140 1321
@@ -1143,24 +1324,9 @@ sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *in
1143#else 1324#else
1144 if(isactive) { 1325 if(isactive) {
1145#endif 1326#endif
1146 sisfb_pre_setmode(ivideo); 1327 /* If acceleration to be used? Need to know
1147 1328 * before pre/post_set_mode()
1148 if(SiSSetMode(&ivideo->SiS_Pr, &ivideo->sishw_ext, ivideo->mode_no) == 0) { 1329 */
1149 printk(KERN_ERR "sisfb: Setting mode[0x%x] failed\n", ivideo->mode_no);
1150 return -EINVAL;
1151 }
1152
1153 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1154
1155 sisfb_post_setmode(ivideo);
1156
1157 ivideo->video_bpp = sisbios_mode[ivideo->sisfb_mode_idx].bpp;
1158 ivideo->video_width = sisbios_mode[ivideo->sisfb_mode_idx].xres;
1159 ivideo->video_height = sisbios_mode[ivideo->sisfb_mode_idx].yres;
1160
1161 sisfb_calc_pitch(ivideo, var);
1162 sisfb_set_pitch(ivideo);
1163
1164 ivideo->accel = 0; 1330 ivideo->accel = 0;
1165#if defined(FBINFO_HWACCEL_DISABLED) && defined(FBINFO_HWACCEL_XPAN) 1331#if defined(FBINFO_HWACCEL_DISABLED) && defined(FBINFO_HWACCEL_XPAN)
1166#ifdef STUPID_ACCELF_TEXT_SHIT 1332#ifdef STUPID_ACCELF_TEXT_SHIT
@@ -1175,6 +1341,17 @@ sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *in
1175 if(var->accel_flags & FB_ACCELF_TEXT) ivideo->accel = -1; 1341 if(var->accel_flags & FB_ACCELF_TEXT) ivideo->accel = -1;
1176#endif 1342#endif
1177 1343
1344 if((ret = sisfb_set_mode(ivideo, 1))) {
1345 return ret;
1346 }
1347
1348 ivideo->video_bpp = sisbios_mode[ivideo->sisfb_mode_idx].bpp;
1349 ivideo->video_width = sisbios_mode[ivideo->sisfb_mode_idx].xres;
1350 ivideo->video_height = sisbios_mode[ivideo->sisfb_mode_idx].yres;
1351
1352 sisfb_calc_pitch(ivideo, var);
1353 sisfb_set_pitch(ivideo);
1354
1178 sisfb_set_vparms(ivideo); 1355 sisfb_set_vparms(ivideo);
1179 1356
1180 ivideo->current_width = ivideo->video_width; 1357 ivideo->current_width = ivideo->video_width;
@@ -1186,572 +1363,79 @@ sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, struct fb_info *in
1186 ivideo->current_pixclock = var->pixclock; 1363 ivideo->current_pixclock = var->pixclock;
1187 ivideo->current_refresh_rate = ivideo->refresh_rate; 1364 ivideo->current_refresh_rate = ivideo->refresh_rate;
1188#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 1365#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
1189 ivideo->sisfb_lastrates[ivideo->mode_no] = ivideo->refresh_rate; 1366 ivideo->sisfb_lastrates[ivideo->mode_no] = ivideo->refresh_rate;
1190#endif 1367#endif
1191 } 1368 }
1192 1369
1193 return 0; 1370 return 0;
1194} 1371}
1195 1372
1196static int 1373static void
1197sisfb_pan_var(struct sis_video_info *ivideo, struct fb_var_screeninfo *var) 1374sisfb_set_base_CRT1(struct sis_video_info *ivideo, unsigned int base)
1198{ 1375{
1199 unsigned int base;
1200
1201 if(var->xoffset > (var->xres_virtual - var->xres)) {
1202 return -EINVAL;
1203 }
1204 if(var->yoffset > (var->yres_virtual - var->yres)) {
1205 return -EINVAL;
1206 }
1207
1208 base = (var->yoffset * var->xres_virtual) + var->xoffset;
1209
1210 /* calculate base bpp dep. */
1211 switch(var->bits_per_pixel) {
1212 case 32:
1213 break;
1214 case 16:
1215 base >>= 1;
1216 break;
1217 case 8:
1218 default:
1219 base >>= 2;
1220 break;
1221 }
1222
1223 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD); 1376 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
1224 1377
1225 outSISIDXREG(SISCR, 0x0D, base & 0xFF); 1378 outSISIDXREG(SISCR, 0x0D, base & 0xFF);
1226 outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF); 1379 outSISIDXREG(SISCR, 0x0C, (base >> 8) & 0xFF);
1227 outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF); 1380 outSISIDXREG(SISSR, 0x0D, (base >> 16) & 0xFF);
1228 if(ivideo->sisvga_engine == SIS_315_VGA) { 1381 if(ivideo->sisvga_engine == SIS_315_VGA) {
1229 setSISIDXREG(SISSR, 0x37, 0xFE, (base >> 24) & 0x01); 1382 setSISIDXREG(SISSR, 0x37, 0xFE, (base >> 24) & 0x01);
1230 } 1383 }
1231 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
1232 orSISIDXREG(SISPART1, ivideo->CRT2_write_enable, 0x01);
1233 outSISIDXREG(SISPART1, 0x06, (base & 0xFF));
1234 outSISIDXREG(SISPART1, 0x05, ((base >> 8) & 0xFF));
1235 outSISIDXREG(SISPART1, 0x04, ((base >> 16) & 0xFF));
1236 if(ivideo->sisvga_engine == SIS_315_VGA) {
1237 setSISIDXREG(SISPART1, 0x02, 0x7F, ((base >> 24) & 0x01) << 7);
1238 }
1239 }
1240 return 0;
1241} 1384}
1242 1385
1243/* ------------ FBDev related routines for 2.4 series ----------- */
1244
1245#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1246
1247static void 1386static void
1248sisfb_crtc_to_var(struct sis_video_info *ivideo, struct fb_var_screeninfo *var) 1387sisfb_set_base_CRT2(struct sis_video_info *ivideo, unsigned int base)
1249{
1250 u16 VRE, VBE, VRS, VBS, VDE, VT;
1251 u16 HRE, HBE, HRS, HBS, HDE, HT;
1252 u8 sr_data, cr_data, cr_data2, cr_data3, mr_data;
1253 int A, B, C, D, E, F, temp;
1254 unsigned int hrate, drate, maxyres;
1255
1256 inSISIDXREG(SISSR, IND_SIS_COLOR_MODE, sr_data);
1257
1258 if(sr_data & SIS_INTERLACED_MODE)
1259 var->vmode = FB_VMODE_INTERLACED;
1260 else
1261 var->vmode = FB_VMODE_NONINTERLACED;
1262
1263 switch((sr_data & 0x1C) >> 2) {
1264 case SIS_8BPP_COLOR_MODE:
1265 var->bits_per_pixel = 8;
1266 break;
1267 case SIS_16BPP_COLOR_MODE:
1268 var->bits_per_pixel = 16;
1269 break;
1270 case SIS_32BPP_COLOR_MODE:
1271 var->bits_per_pixel = 32;
1272 break;
1273 }
1274
1275 sisfb_bpp_to_var(ivideo, var);
1276
1277 inSISIDXREG(SISSR, 0x0A, sr_data);
1278 inSISIDXREG(SISCR, 0x06, cr_data);
1279 inSISIDXREG(SISCR, 0x07, cr_data2);
1280
1281 VT = (cr_data & 0xFF) |
1282 ((u16) (cr_data2 & 0x01) << 8) |
1283 ((u16) (cr_data2 & 0x20) << 4) |
1284 ((u16) (sr_data & 0x01) << 10);
1285 A = VT + 2;
1286
1287 inSISIDXREG(SISCR, 0x12, cr_data);
1288
1289 VDE = (cr_data & 0xff) |
1290 ((u16) (cr_data2 & 0x02) << 7) |
1291 ((u16) (cr_data2 & 0x40) << 3) |
1292 ((u16) (sr_data & 0x02) << 9);
1293 E = VDE + 1;
1294
1295 inSISIDXREG(SISCR, 0x10, cr_data);
1296
1297 VRS = (cr_data & 0xff) |
1298 ((u16) (cr_data2 & 0x04) << 6) |
1299 ((u16) (cr_data2 & 0x80) << 2) |
1300 ((u16) (sr_data & 0x08) << 7);
1301 F = VRS + 1 - E;
1302
1303 inSISIDXREG(SISCR, 0x15, cr_data);
1304 inSISIDXREG(SISCR, 0x09, cr_data3);
1305
1306 if(cr_data3 & 0x80) var->vmode = FB_VMODE_DOUBLE;
1307
1308 VBS = (cr_data & 0xff) |
1309 ((u16) (cr_data2 & 0x08) << 5) |
1310 ((u16) (cr_data3 & 0x20) << 4) |
1311 ((u16) (sr_data & 0x04) << 8);
1312
1313 inSISIDXREG(SISCR, 0x16, cr_data);
1314
1315 VBE = (cr_data & 0xff) | ((u16) (sr_data & 0x10) << 4);
1316 temp = VBE - ((E - 1) & 511);
1317 B = (temp > 0) ? temp : (temp + 512);
1318
1319 inSISIDXREG(SISCR, 0x11, cr_data);
1320
1321 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
1322 temp = VRE - ((E + F - 1) & 31);
1323 C = (temp > 0) ? temp : (temp + 32);
1324
1325 D = B - F - C;
1326
1327 var->yres = E;
1328 var->upper_margin = D;
1329 var->lower_margin = F;
1330 var->vsync_len = C;
1331
1332 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1333 var->yres <<= 1;
1334 var->upper_margin <<= 1;
1335 var->lower_margin <<= 1;
1336 var->vsync_len <<= 1;
1337 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1338 var->yres >>= 1;
1339 var->upper_margin >>= 1;
1340 var->lower_margin >>= 1;
1341 var->vsync_len >>= 1;
1342 }
1343
1344 inSISIDXREG(SISSR, 0x0b, sr_data);
1345 inSISIDXREG(SISCR, 0x00, cr_data);
1346
1347 HT = (cr_data & 0xff) | ((u16) (sr_data & 0x03) << 8);
1348 A = HT + 5;
1349
1350 inSISIDXREG(SISCR, 0x01, cr_data);
1351
1352 HDE = (cr_data & 0xff) | ((u16) (sr_data & 0x0C) << 6);
1353 E = HDE + 1;
1354
1355 inSISIDXREG(SISCR, 0x04, cr_data);
1356
1357 HRS = (cr_data & 0xff) | ((u16) (sr_data & 0xC0) << 2);
1358 F = HRS - E - 3;
1359
1360 inSISIDXREG(SISCR, 0x02, cr_data);
1361
1362 HBS = (cr_data & 0xff) | ((u16) (sr_data & 0x30) << 4);
1363
1364 inSISIDXREG(SISSR, 0x0c, sr_data);
1365 inSISIDXREG(SISCR, 0x03, cr_data);
1366 inSISIDXREG(SISCR, 0x05, cr_data2);
1367
1368 HBE = (cr_data & 0x1f) |
1369 ((u16) (cr_data2 & 0x80) >> 2) |
1370 ((u16) (sr_data & 0x03) << 6);
1371 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
1372
1373 temp = HBE - ((E - 1) & 255);
1374 B = (temp > 0) ? temp : (temp + 256);
1375
1376 temp = HRE - ((E + F + 3) & 63);
1377 C = (temp > 0) ? temp : (temp + 64);
1378
1379 D = B - F - C;
1380
1381 var->xres = E * 8;
1382 if(var->xres_virtual < var->xres) {
1383 var->xres_virtual = var->xres;
1384 }
1385
1386 if((var->xres == 320) &&
1387 (var->yres == 200 || var->yres == 240)) {
1388 /* Terrible hack, but the correct CRTC data for
1389 * these modes only produces a black screen...
1390 */
1391 var->left_margin = (400 - 376);
1392 var->right_margin = (328 - 320);
1393 var->hsync_len = (376 - 328);
1394 } else {
1395 var->left_margin = D * 8;
1396 var->right_margin = F * 8;
1397 var->hsync_len = C * 8;
1398 }
1399 var->activate = FB_ACTIVATE_NOW;
1400
1401 var->sync = 0;
1402
1403 mr_data = inSISREG(SISMISCR);
1404 if(mr_data & 0x80)
1405 var->sync &= ~FB_SYNC_VERT_HIGH_ACT;
1406 else
1407 var->sync |= FB_SYNC_VERT_HIGH_ACT;
1408
1409 if(mr_data & 0x40)
1410 var->sync &= ~FB_SYNC_HOR_HIGH_ACT;
1411 else
1412 var->sync |= FB_SYNC_HOR_HIGH_ACT;
1413
1414 VT += 2;
1415 VT <<= 1;
1416 HT = (HT + 5) * 8;
1417
1418 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1419 VT <<= 1;
1420 }
1421 hrate = ivideo->refresh_rate * VT / 2;
1422 drate = (hrate * HT) / 1000;
1423 var->pixclock = (u32) (1000000000 / drate);
1424
1425 if(ivideo->sisfb_ypan) {
1426 maxyres = sisfb_calc_maxyres(ivideo, var);
1427 if(ivideo->sisfb_max) {
1428 var->yres_virtual = maxyres;
1429 } else {
1430 if(var->yres_virtual > maxyres) {
1431 var->yres_virtual = maxyres;
1432 }
1433 }
1434 if(var->yres_virtual <= var->yres) {
1435 var->yres_virtual = var->yres;
1436 }
1437 } else {
1438 var->yres_virtual = var->yres;
1439 }
1440
1441}
1442
1443static int
1444sis_getcolreg(unsigned regno, unsigned *red, unsigned *green, unsigned *blue,
1445 unsigned *transp, struct fb_info *info)
1446{ 1388{
1447 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1389 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
1448 1390 orSISIDXREG(SISPART1, ivideo->CRT2_write_enable, 0x01);
1449 if(regno >= ivideo->video_cmap_len) return 1; 1391 outSISIDXREG(SISPART1, 0x06, (base & 0xFF));
1450 1392 outSISIDXREG(SISPART1, 0x05, ((base >> 8) & 0xFF));
1451 *red = ivideo->sis_palette[regno].red; 1393 outSISIDXREG(SISPART1, 0x04, ((base >> 16) & 0xFF));
1452 *green = ivideo->sis_palette[regno].green; 1394 if(ivideo->sisvga_engine == SIS_315_VGA) {
1453 *blue = ivideo->sis_palette[regno].blue; 1395 setSISIDXREG(SISPART1, 0x02, 0x7F, ((base >> 24) & 0x01) << 7);
1454 *transp = 0;
1455
1456 return 0;
1457}
1458
1459static int
1460sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
1461 unsigned transp, struct fb_info *info)
1462{
1463 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1464
1465 if(regno >= ivideo->video_cmap_len) return 1;
1466
1467 ivideo->sis_palette[regno].red = red;
1468 ivideo->sis_palette[regno].green = green;
1469 ivideo->sis_palette[regno].blue = blue;
1470
1471 switch(ivideo->video_bpp) {
1472#ifdef FBCON_HAS_CFB8
1473 case 8:
1474 outSISREG(SISDACA, regno);
1475 outSISREG(SISDACD, (red >> 10));
1476 outSISREG(SISDACD, (green >> 10));
1477 outSISREG(SISDACD, (blue >> 10));
1478 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
1479 outSISREG(SISDAC2A, regno);
1480 outSISREG(SISDAC2D, (red >> 8));
1481 outSISREG(SISDAC2D, (green >> 8));
1482 outSISREG(SISDAC2D, (blue >> 8));
1483 } 1396 }
1484 break;
1485#endif
1486#ifdef FBCON_HAS_CFB16
1487 case 16:
1488 ivideo->sis_fbcon_cmap.cfb16[regno] =
1489 ((red & 0xf800)) | ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11);
1490 break;
1491#endif
1492#ifdef FBCON_HAS_CFB32
1493 case 32:
1494 red >>= 8;
1495 green >>= 8;
1496 blue >>= 8;
1497 ivideo->sis_fbcon_cmap.cfb32[regno] = (red << 16) | (green << 8) | (blue);
1498 break;
1499#endif
1500 }
1501
1502 return 0;
1503}
1504
1505static void
1506sisfb_set_disp(int con, struct fb_var_screeninfo *var, struct fb_info *info)
1507{
1508 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1509 struct display *display;
1510 struct display_switch *sw;
1511 struct fb_fix_screeninfo fix;
1512 long flags;
1513
1514 display = (con >= 0) ? &fb_display[con] : &ivideo->sis_disp;
1515
1516 sisfb_get_fix(&fix, con, info);
1517
1518 display->var = *var;
1519 display->screen_base = (char *)ivideo->video_vbase;
1520 display->visual = fix.visual;
1521 display->type = fix.type;
1522 display->type_aux = fix.type_aux;
1523 display->ypanstep = fix.ypanstep;
1524 display->ywrapstep = fix.ywrapstep;
1525 display->line_length = fix.line_length;
1526 display->can_soft_blank = 1;
1527 display->inverse = ivideo->sisfb_inverse;
1528 display->next_line = fix.line_length;
1529
1530 save_flags(flags);
1531
1532 switch(ivideo->video_bpp) {
1533#ifdef FBCON_HAS_CFB8
1534 case 8: sw = ivideo->accel ? &fbcon_sis8 : &fbcon_cfb8;
1535 break;
1536#endif
1537#ifdef FBCON_HAS_CFB16
1538 case 16:sw = ivideo->accel ? &fbcon_sis16 : &fbcon_cfb16;
1539 display->dispsw_data = &ivideo->sis_fbcon_cmap.cfb16;
1540 break;
1541#endif
1542#ifdef FBCON_HAS_CFB32
1543 case 32:sw = ivideo->accel ? &fbcon_sis32 : &fbcon_cfb32;
1544 display->dispsw_data = &ivideo->sis_fbcon_cmap.cfb32;
1545 break;
1546#endif
1547 default:sw = &fbcon_dummy;
1548 break;
1549 }
1550 memcpy(&ivideo->sisfb_sw, sw, sizeof(*sw));
1551 display->dispsw = &ivideo->sisfb_sw;
1552
1553 restore_flags(flags);
1554
1555 if(ivideo->sisfb_ypan) {
1556 /* display->scrollmode = 0; */
1557 } else {
1558 display->scrollmode = SCROLL_YREDRAW;
1559 ivideo->sisfb_sw.bmove = fbcon_redraw_bmove;
1560 }
1561}
1562
1563static void
1564sisfb_do_install_cmap(int con, struct fb_info *info)
1565{
1566 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1567
1568 if(con != ivideo->currcon) return;
1569
1570 if(fb_display[con].cmap.len) {
1571 fb_set_cmap(&fb_display[con].cmap, 1, sisfb_setcolreg, info);
1572 } else {
1573 int size = sisfb_get_cmap_len(&fb_display[con].var);
1574 fb_set_cmap(fb_default_cmap(size), 1, sisfb_setcolreg, info);
1575 } 1397 }
1576} 1398}
1577 1399
1578static int 1400static int
1579sisfb_get_var(struct fb_var_screeninfo *var, int con, struct fb_info *info) 1401sisfb_pan_var(struct sis_video_info *ivideo, struct fb_var_screeninfo *var)
1580{
1581 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1582
1583 if(con == -1) {
1584 memcpy(var, &ivideo->default_var, sizeof(struct fb_var_screeninfo));
1585 } else {
1586 *var = fb_display[con].var;
1587 }
1588
1589 if(ivideo->sisfb_fstn) {
1590 if(var->xres == 320 && var->yres == 480) var->yres = 240;
1591 }
1592
1593 return 0;
1594}
1595
1596static int
1597sisfb_set_var(struct fb_var_screeninfo *var, int con, struct fb_info *info)
1598{ 1402{
1599 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1403 if(var->xoffset > (var->xres_virtual - var->xres)) {
1600 int err;
1601
1602 fb_display[con].var.activate = FB_ACTIVATE_NOW;
1603
1604 if(sisfb_do_set_var(var, con == ivideo->currcon, info)) {
1605 sisfb_crtc_to_var(ivideo, var);
1606 return -EINVAL; 1404 return -EINVAL;
1607 } 1405 }
1608 1406 if(var->yoffset > (var->yres_virtual - var->yres)) {
1609 sisfb_crtc_to_var(ivideo, var); 1407 return -EINVAL;
1610
1611 sisfb_set_disp(con, var, info);
1612
1613 if(info->changevar) {
1614 (*info->changevar)(con);
1615 }
1616
1617 if((err = fb_alloc_cmap(&fb_display[con].cmap, 0, 0))) {
1618 return err;
1619 }
1620
1621 sisfb_do_install_cmap(con, info);
1622
1623#if 0 /* Why was this called here? */
1624 unsigned int cols, rows;
1625 cols = sisbios_mode[ivideo->sisfb_mode_idx].cols;
1626 rows = sisbios_mode[ivideo->sisfb_mode_idx].rows;
1627 vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
1628#endif
1629 return 0;
1630}
1631
1632static int
1633sisfb_get_cmap(struct fb_cmap *cmap, int kspc, int con, struct fb_info *info)
1634{
1635 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1636 struct display *display;
1637
1638 display = (con >= 0) ? &fb_display[con] : &ivideo->sis_disp;
1639
1640 if(con == ivideo->currcon) {
1641
1642 return fb_get_cmap(cmap, kspc, sis_getcolreg, info);
1643
1644 } else if(display->cmap.len) {
1645
1646 fb_copy_cmap(&display->cmap, cmap, kspc ? 0 : 2);
1647
1648 } else {
1649
1650 int size = sisfb_get_cmap_len(&display->var);
1651 fb_copy_cmap(fb_default_cmap(size), cmap, kspc ? 0 : 2);
1652
1653 } 1408 }
1654 1409
1655 return 0; 1410 ivideo->current_base = (var->yoffset * var->xres_virtual) + var->xoffset;
1656}
1657 1411
1658static int 1412 /* calculate base bpp dep. */
1659sisfb_set_cmap(struct fb_cmap *cmap, int kspc, int con, struct fb_info *info) 1413 switch(var->bits_per_pixel) {
1660{ 1414 case 32:
1661 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1415 break;
1662 struct display *display; 1416 case 16:
1663 int err, size; 1417 ivideo->current_base >>= 1;
1664 1418 break;
1665 display = (con >= 0) ? &fb_display[con] : &ivideo->sis_disp; 1419 case 8:
1666 1420 default:
1667 size = sisfb_get_cmap_len(&display->var); 1421 ivideo->current_base >>= 2;
1668 if(display->cmap.len != size) { 1422 break;
1669 err = fb_alloc_cmap(&display->cmap, size, 0);
1670 if(err) return err;
1671 }
1672
1673 if(con == ivideo->currcon) {
1674 return fb_set_cmap(cmap, kspc, sisfb_setcolreg, info);
1675 } else {
1676 fb_copy_cmap(cmap, &display->cmap, kspc ? 0 : 1);
1677 }
1678
1679 return 0;
1680}
1681
1682static int
1683sisfb_pan_display(struct fb_var_screeninfo *var, int con, struct fb_info* info)
1684{
1685 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1686 int err;
1687
1688 if(var->vmode & FB_VMODE_YWRAP) return -EINVAL;
1689
1690 if((var->xoffset+fb_display[con].var.xres > fb_display[con].var.xres_virtual) ||
1691 (var->yoffset+fb_display[con].var.yres > fb_display[con].var.yres_virtual)) {
1692 return -EINVAL;
1693 } 1423 }
1694 1424
1695 if(con == ivideo->currcon) { 1425 ivideo->current_base += (ivideo->video_offset >> 2);
1696 if((err = sisfb_pan_var(ivideo, var)) < 0) return err;
1697 }
1698 1426
1699 fb_display[con].var.xoffset = var->xoffset; 1427 sisfb_set_base_CRT1(ivideo, ivideo->current_base);
1700 fb_display[con].var.yoffset = var->yoffset; 1428 sisfb_set_base_CRT2(ivideo, ivideo->current_base);
1701 1429
1702 return 0; 1430 return 0;
1703} 1431}
1704 1432
1705static int 1433/* ------------ FBDev related routines for 2.4 series ----------- */
1706sisfb_update_var(int con, struct fb_info *info)
1707{
1708 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1709
1710 return(sisfb_pan_var(ivideo, &fb_display[con].var));
1711}
1712
1713static int
1714sisfb_switch(int con, struct fb_info *info)
1715{
1716 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1717 int cols, rows;
1718
1719 if(fb_display[ivideo->currcon].cmap.len) {
1720 fb_get_cmap(&fb_display[ivideo->currcon].cmap, 1, sis_getcolreg, info);
1721 }
1722
1723 fb_display[con].var.activate = FB_ACTIVATE_NOW;
1724
1725 if(!memcmp(&fb_display[con].var, &fb_display[ivideo->currcon].var,
1726 sizeof(struct fb_var_screeninfo))) {
1727 ivideo->currcon = con;
1728 return 1;
1729 }
1730
1731 ivideo->currcon = con;
1732
1733 sisfb_do_set_var(&fb_display[con].var, 1, info);
1734
1735 sisfb_set_disp(con, &fb_display[con].var, info);
1736
1737 sisfb_do_install_cmap(con, info);
1738
1739 cols = sisbios_mode[ivideo->sisfb_mode_idx].cols;
1740 rows = sisbios_mode[ivideo->sisfb_mode_idx].rows;
1741 vc_resize_con(rows, cols, fb_display[con].conp->vc_num);
1742
1743 sisfb_update_var(con, info);
1744 1434
1745 return 1; 1435#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
1746}
1747 1436
1748static void 1437#include "sisfb_fbdev_2_4.h"
1749sisfb_blank(int blank, struct fb_info *info)
1750{
1751 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1752 1438
1753 sisfb_myblank(ivideo, blank);
1754}
1755#endif 1439#endif
1756 1440
1757/* ------------ FBDev related routines for 2.6 series ----------- */ 1441/* ------------ FBDev related routines for 2.6 series ----------- */
@@ -1761,13 +1445,13 @@ sisfb_blank(int blank, struct fb_info *info)
1761static int 1445static int
1762sisfb_open(struct fb_info *info, int user) 1446sisfb_open(struct fb_info *info, int user)
1763{ 1447{
1764 return 0; 1448 return 0;
1765} 1449}
1766 1450
1767static int 1451static int
1768sisfb_release(struct fb_info *info, int user) 1452sisfb_release(struct fb_info *info, int user)
1769{ 1453{
1770 return 0; 1454 return 0;
1771} 1455}
1772 1456
1773static int 1457static int
@@ -1776,16 +1460,17 @@ sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
1776{ 1460{
1777 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1461 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
1778 1462
1779 if(regno >= sisfb_get_cmap_len(&info->var)) return 1; 1463 if(regno >= sisfb_get_cmap_len(&info->var))
1464 return 1;
1780 1465
1781 switch(info->var.bits_per_pixel) { 1466 switch(info->var.bits_per_pixel) {
1782 case 8: 1467 case 8:
1783 outSISREG(SISDACA, regno); 1468 outSISREG(SISDACA, regno);
1784 outSISREG(SISDACD, (red >> 10)); 1469 outSISREG(SISDACD, (red >> 10));
1785 outSISREG(SISDACD, (green >> 10)); 1470 outSISREG(SISDACD, (green >> 10));
1786 outSISREG(SISDACD, (blue >> 10)); 1471 outSISREG(SISDACD, (blue >> 10));
1787 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { 1472 if(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
1788 outSISREG(SISDAC2A, regno); 1473 outSISREG(SISDAC2A, regno);
1789 outSISREG(SISDAC2D, (red >> 8)); 1474 outSISREG(SISDAC2D, (red >> 8));
1790 outSISREG(SISDAC2D, (green >> 8)); 1475 outSISREG(SISDAC2D, (green >> 8));
1791 outSISREG(SISDAC2D, (blue >> 8)); 1476 outSISREG(SISDAC2D, (blue >> 8));
@@ -1793,7 +1478,9 @@ sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
1793 break; 1478 break;
1794 case 16: 1479 case 16:
1795 ((u32 *)(info->pseudo_palette))[regno] = 1480 ((u32 *)(info->pseudo_palette))[regno] =
1796 ((red & 0xf800)) | ((green & 0xfc00) >> 5) | ((blue & 0xf800) >> 11); 1481 (red & 0xf800) |
1482 ((green & 0xfc00) >> 5) |
1483 ((blue & 0xf800) >> 11);
1797 break; 1484 break;
1798 case 32: 1485 case 32:
1799 red >>= 8; 1486 red >>= 8;
@@ -1811,13 +1498,13 @@ sisfb_set_par(struct fb_info *info)
1811{ 1498{
1812 int err; 1499 int err;
1813 1500
1814 if((err = sisfb_do_set_var(&info->var, 1, info))) { 1501 if((err = sisfb_do_set_var(&info->var, 1, info)))
1815 return err; 1502 return err;
1816 } 1503
1817#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) 1504#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10)
1818 sisfb_get_fix(&info->fix, info->currcon, info); 1505 sisfb_get_fix(&info->fix, info->currcon, info);
1819#else 1506#else
1820 sisfb_get_fix(&info->fix, -1, info); 1507 sisfb_get_fix(&info->fix, -1, info);
1821#endif 1508#endif
1822 return 0; 1509 return 0;
1823} 1510}
@@ -1829,7 +1516,7 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1829 unsigned int htotal = 0, vtotal = 0, myrateindex = 0; 1516 unsigned int htotal = 0, vtotal = 0, myrateindex = 0;
1830 unsigned int drate = 0, hrate = 0, maxyres; 1517 unsigned int drate = 0, hrate = 0, maxyres;
1831 int found_mode = 0; 1518 int found_mode = 0;
1832 int refresh_rate, search_idx; 1519 int refresh_rate, search_idx, tidx;
1833 BOOLEAN recalc_clock = FALSE; 1520 BOOLEAN recalc_clock = FALSE;
1834 u32 pixclock; 1521 u32 pixclock;
1835 1522
@@ -1848,7 +1535,8 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1848 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) { 1535 } else if((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1849 vtotal += var->yres; 1536 vtotal += var->yres;
1850 vtotal <<= 1; 1537 vtotal <<= 1;
1851 } else vtotal += var->yres; 1538 } else
1539 vtotal += var->yres;
1852 1540
1853 if(!(htotal) || !(vtotal)) { 1541 if(!(htotal) || !(vtotal)) {
1854 SISFAIL("sisfb: no valid timing data"); 1542 SISFAIL("sisfb: no valid timing data");
@@ -1860,60 +1548,68 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1860 if( (sisbios_mode[search_idx].xres == var->xres) && 1548 if( (sisbios_mode[search_idx].xres == var->xres) &&
1861 (sisbios_mode[search_idx].yres == var->yres) && 1549 (sisbios_mode[search_idx].yres == var->yres) &&
1862 (sisbios_mode[search_idx].bpp == var->bits_per_pixel)) { 1550 (sisbios_mode[search_idx].bpp == var->bits_per_pixel)) {
1863 if(sisfb_validate_mode(ivideo, search_idx, ivideo->currentvbflags) > 0) { 1551 if((tidx = sisfb_validate_mode(ivideo, search_idx,
1864 found_mode = 1; 1552 ivideo->currentvbflags)) > 0) {
1865 break; 1553 found_mode = 1;
1554 search_idx = tidx;
1555 break;
1866 } 1556 }
1867 } 1557 }
1868 search_idx++; 1558 search_idx++;
1869 } 1559 }
1870 1560
1871 if(!found_mode) { 1561 if(!found_mode) {
1872 search_idx = 0; 1562 search_idx = 0;
1873 while(sisbios_mode[search_idx].mode_no[0] != 0) { 1563 while(sisbios_mode[search_idx].mode_no[0] != 0) {
1874 if( (var->xres <= sisbios_mode[search_idx].xres) && 1564 if( (var->xres <= sisbios_mode[search_idx].xres) &&
1875 (var->yres <= sisbios_mode[search_idx].yres) && 1565 (var->yres <= sisbios_mode[search_idx].yres) &&
1876 (var->bits_per_pixel == sisbios_mode[search_idx].bpp) ) { 1566 (var->bits_per_pixel == sisbios_mode[search_idx].bpp) ) {
1877 if(sisfb_validate_mode(ivideo,search_idx, ivideo->currentvbflags) > 0) { 1567 if((tidx = sisfb_validate_mode(ivideo,search_idx,
1878 found_mode = 1; 1568 ivideo->currentvbflags)) > 0) {
1879 break; 1569 found_mode = 1;
1880 } 1570 search_idx = tidx;
1571 break;
1572 }
1881 } 1573 }
1882 search_idx++; 1574 search_idx++;
1883 } 1575 }
1884 if(found_mode) { 1576 if(found_mode) {
1885 printk(KERN_DEBUG "sisfb: Adapted from %dx%dx%d to %dx%dx%d\n", 1577 printk(KERN_DEBUG
1886 var->xres, var->yres, var->bits_per_pixel, 1578 "sisfb: Adapted from %dx%dx%d to %dx%dx%d\n",
1579 var->xres, var->yres, var->bits_per_pixel,
1887 sisbios_mode[search_idx].xres, 1580 sisbios_mode[search_idx].xres,
1888 sisbios_mode[search_idx].yres, 1581 sisbios_mode[search_idx].yres,
1889 var->bits_per_pixel); 1582 var->bits_per_pixel);
1890 var->xres = sisbios_mode[search_idx].xres; 1583 var->xres = sisbios_mode[search_idx].xres;
1891 var->yres = sisbios_mode[search_idx].yres; 1584 var->yres = sisbios_mode[search_idx].yres;
1892
1893
1894 } else { 1585 } else {
1895 printk(KERN_ERR "sisfb: Failed to find supported mode near %dx%dx%d\n", 1586 printk(KERN_ERR
1587 "sisfb: Failed to find supported mode near %dx%dx%d\n",
1896 var->xres, var->yres, var->bits_per_pixel); 1588 var->xres, var->yres, var->bits_per_pixel);
1897 return -EINVAL; 1589 return -EINVAL;
1898 } 1590 }
1899 } 1591 }
1900 1592
1901 if( ((ivideo->vbflags & VB_LVDS) || /* Slave modes on LVDS and 301B-DH */ 1593 if( ((ivideo->vbflags2 & VB2_LVDS) ||
1902 ((ivideo->vbflags & VB_30xBDH) && (ivideo->currentvbflags & CRT2_LCD))) && 1594 ((ivideo->vbflags2 & VB2_30xBDH) && (ivideo->currentvbflags & CRT2_LCD))) &&
1903 (var->bits_per_pixel == 8) ) { 1595 (var->bits_per_pixel == 8) ) {
1904 refresh_rate = 60; 1596 /* Slave modes on LVDS and 301B-DH */
1597 refresh_rate = 60;
1905 recalc_clock = TRUE; 1598 recalc_clock = TRUE;
1906 } else if( (ivideo->current_htotal == htotal) && /* x=x & y=y & c=c -> assume depth change */ 1599 } else if( (ivideo->current_htotal == htotal) &&
1907 (ivideo->current_vtotal == vtotal) && 1600 (ivideo->current_vtotal == vtotal) &&
1908 (ivideo->current_pixclock == pixclock) ) { 1601 (ivideo->current_pixclock == pixclock) ) {
1602 /* x=x & y=y & c=c -> assume depth change */
1909 drate = 1000000000 / pixclock; 1603 drate = 1000000000 / pixclock;
1910 hrate = (drate * 1000) / htotal; 1604 hrate = (drate * 1000) / htotal;
1911 refresh_rate = (unsigned int) (hrate * 2 / vtotal); 1605 refresh_rate = (unsigned int) (hrate * 2 / vtotal);
1912 } else if( ( (ivideo->current_htotal != htotal) || /* x!=x | y!=y & c=c -> invalid pixclock */ 1606 } else if( ( (ivideo->current_htotal != htotal) ||
1913 (ivideo->current_vtotal != vtotal) ) && 1607 (ivideo->current_vtotal != vtotal) ) &&
1914 (ivideo->current_pixclock == var->pixclock) ) { 1608 (ivideo->current_pixclock == var->pixclock) ) {
1609 /* x!=x | y!=y & c=c -> invalid pixclock */
1915 if(ivideo->sisfb_lastrates[sisbios_mode[search_idx].mode_no[ivideo->mni]]) { 1610 if(ivideo->sisfb_lastrates[sisbios_mode[search_idx].mode_no[ivideo->mni]]) {
1916 refresh_rate = ivideo->sisfb_lastrates[sisbios_mode[search_idx].mode_no[ivideo->mni]]; 1611 refresh_rate =
1612 ivideo->sisfb_lastrates[sisbios_mode[search_idx].mode_no[ivideo->mni]];
1917 } else if(ivideo->sisfb_parm_rate != -1) { 1613 } else if(ivideo->sisfb_parm_rate != -1) {
1918 /* Sic, sisfb_parm_rate - want to know originally desired rate here */ 1614 /* Sic, sisfb_parm_rate - want to know originally desired rate here */
1919 refresh_rate = ivideo->sisfb_parm_rate; 1615 refresh_rate = ivideo->sisfb_parm_rate;
@@ -1923,8 +1619,8 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1923 recalc_clock = TRUE; 1619 recalc_clock = TRUE;
1924 } else if((pixclock) && (htotal) && (vtotal)) { 1620 } else if((pixclock) && (htotal) && (vtotal)) {
1925 drate = 1000000000 / pixclock; 1621 drate = 1000000000 / pixclock;
1926 hrate = (drate * 1000) / htotal; 1622 hrate = (drate * 1000) / htotal;
1927 refresh_rate = (unsigned int) (hrate * 2 / vtotal); 1623 refresh_rate = (unsigned int) (hrate * 2 / vtotal);
1928 } else if(ivideo->current_refresh_rate) { 1624 } else if(ivideo->current_refresh_rate) {
1929 refresh_rate = ivideo->current_refresh_rate; 1625 refresh_rate = ivideo->current_refresh_rate;
1930 recalc_clock = TRUE; 1626 recalc_clock = TRUE;
@@ -1937,72 +1633,72 @@ sisfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
1937 1633
1938 /* Eventually recalculate timing and clock */ 1634 /* Eventually recalculate timing and clock */
1939 if(recalc_clock) { 1635 if(recalc_clock) {
1940 if(!myrateindex) myrateindex = sisbios_mode[search_idx].rate_idx; 1636 if(!myrateindex) myrateindex = sisbios_mode[search_idx].rate_idx;
1941 var->pixclock = (u32) (1000000000 / sisfb_mode_rate_to_dclock(&ivideo->SiS_Pr, 1637 var->pixclock = (u32) (1000000000 / sisfb_mode_rate_to_dclock(&ivideo->SiS_Pr,
1942 &ivideo->sishw_ext,
1943 sisbios_mode[search_idx].mode_no[ivideo->mni], 1638 sisbios_mode[search_idx].mode_no[ivideo->mni],
1944 myrateindex)); 1639 myrateindex));
1945 sisfb_mode_rate_to_ddata(&ivideo->SiS_Pr, &ivideo->sishw_ext, 1640 sisfb_mode_rate_to_ddata(&ivideo->SiS_Pr,
1946 sisbios_mode[search_idx].mode_no[ivideo->mni], myrateindex, var); 1641 sisbios_mode[search_idx].mode_no[ivideo->mni],
1947 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) { 1642 myrateindex, var);
1948 var->pixclock <<= 1; 1643 if((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1949 } 1644 var->pixclock <<= 1;
1645 }
1950 } 1646 }
1951 1647
1952 if(ivideo->sisfb_thismonitor.datavalid) { 1648 if(ivideo->sisfb_thismonitor.datavalid) {
1953 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor, search_idx, 1649 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor, search_idx,
1954 myrateindex, refresh_rate)) { 1650 myrateindex, refresh_rate)) {
1955 printk(KERN_INFO "sisfb: WARNING: Refresh rate exceeds monitor specs!\n"); 1651 printk(KERN_INFO
1956 } 1652 "sisfb: WARNING: Refresh rate exceeds monitor specs!\n");
1653 }
1957 } 1654 }
1958 1655
1959 /* Adapt RGB settings */ 1656 /* Adapt RGB settings */
1960 sisfb_bpp_to_var(ivideo, var); 1657 sisfb_bpp_to_var(ivideo, var);
1961 1658
1962 /* Sanity check for offsets */ 1659 /* Sanity check for offsets */
1963 if(var->xoffset < 0) var->xoffset = 0; 1660 if(var->xoffset < 0) var->xoffset = 0;
1964 if(var->yoffset < 0) var->yoffset = 0; 1661 if(var->yoffset < 0) var->yoffset = 0;
1965 1662
1966 if(var->xres > var->xres_virtual) { 1663 if(var->xres > var->xres_virtual)
1967 var->xres_virtual = var->xres; 1664 var->xres_virtual = var->xres;
1968 }
1969 1665
1970 if(ivideo->sisfb_ypan) { 1666 if(ivideo->sisfb_ypan) {
1971 maxyres = sisfb_calc_maxyres(ivideo, var); 1667 maxyres = sisfb_calc_maxyres(ivideo, var);
1972 if(ivideo->sisfb_max) { 1668 if(ivideo->sisfb_max) {
1973 var->yres_virtual = maxyres; 1669 var->yres_virtual = maxyres;
1974 } else { 1670 } else {
1975 if(var->yres_virtual > maxyres) { 1671 if(var->yres_virtual > maxyres) {
1976 var->yres_virtual = maxyres; 1672 var->yres_virtual = maxyres;
1977 } 1673 }
1978 } 1674 }
1979 if(var->yres_virtual <= var->yres) { 1675 if(var->yres_virtual <= var->yres) {
1980 var->yres_virtual = var->yres; 1676 var->yres_virtual = var->yres;
1981 } 1677 }
1982 } else { 1678 } else {
1983 if(var->yres != var->yres_virtual) { 1679 if(var->yres != var->yres_virtual) {
1984 var->yres_virtual = var->yres; 1680 var->yres_virtual = var->yres;
1985 } 1681 }
1986 var->xoffset = 0; 1682 var->xoffset = 0;
1987 var->yoffset = 0; 1683 var->yoffset = 0;
1988 } 1684 }
1989 1685
1990 /* Truncate offsets to maximum if too high */ 1686 /* Truncate offsets to maximum if too high */
1991 if(var->xoffset > var->xres_virtual - var->xres) { 1687 if(var->xoffset > var->xres_virtual - var->xres) {
1992 var->xoffset = var->xres_virtual - var->xres - 1; 1688 var->xoffset = var->xres_virtual - var->xres - 1;
1993 } 1689 }
1994 1690
1995 if(var->yoffset > var->yres_virtual - var->yres) { 1691 if(var->yoffset > var->yres_virtual - var->yres) {
1996 var->yoffset = var->yres_virtual - var->yres - 1; 1692 var->yoffset = var->yres_virtual - var->yres - 1;
1997 } 1693 }
1998 1694
1999 /* Set everything else to 0 */ 1695 /* Set everything else to 0 */
2000 var->red.msb_right = 1696 var->red.msb_right =
2001 var->green.msb_right = 1697 var->green.msb_right =
2002 var->blue.msb_right = 1698 var->blue.msb_right =
2003 var->transp.offset = 1699 var->transp.offset =
2004 var->transp.length = 1700 var->transp.length =
2005 var->transp.msb_right = 0; 1701 var->transp.msb_right = 0;
2006 1702
2007 return 0; 1703 return 0;
2008} 1704}
@@ -2013,21 +1709,21 @@ sisfb_pan_display(struct fb_var_screeninfo *var, struct fb_info* info)
2013 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1709 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
2014 int err; 1710 int err;
2015 1711
2016 if(var->xoffset > (var->xres_virtual - var->xres)) { 1712 if(var->xoffset > (var->xres_virtual - var->xres))
2017 return -EINVAL; 1713 return -EINVAL;
2018 } 1714
2019 if(var->yoffset > (var->yres_virtual - var->yres)) { 1715 if(var->yoffset > (var->yres_virtual - var->yres))
2020 return -EINVAL; 1716 return -EINVAL;
2021 }
2022 1717
2023 if(var->vmode & FB_VMODE_YWRAP) return -EINVAL; 1718 if(var->vmode & FB_VMODE_YWRAP)
1719 return -EINVAL;
2024 1720
2025 if(var->xoffset + info->var.xres > info->var.xres_virtual || 1721 if(var->xoffset + info->var.xres > info->var.xres_virtual ||
2026 var->yoffset + info->var.yres > info->var.yres_virtual) { 1722 var->yoffset + info->var.yres > info->var.yres_virtual)
2027 return -EINVAL; 1723 return -EINVAL;
2028 }
2029 1724
2030 if((err = sisfb_pan_var(ivideo, var)) < 0) return err; 1725 if((err = sisfb_pan_var(ivideo, var)) < 0)
1726 return err;
2031 1727
2032 info->var.xoffset = var->xoffset; 1728 info->var.xoffset = var->xoffset;
2033 info->var.yoffset = var->yoffset; 1729 info->var.yoffset = var->yoffset;
@@ -2040,7 +1736,7 @@ sisfb_blank(int blank, struct fb_info *info)
2040{ 1736{
2041 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1737 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
2042 1738
2043 return(sisfb_myblank(ivideo, blank)); 1739 return sisfb_myblank(ivideo, blank);
2044} 1740}
2045 1741
2046#endif 1742#endif
@@ -2056,153 +1752,184 @@ sisfb_ioctl(struct inode *inode, struct file *file,
2056 struct fb_info *info) 1752 struct fb_info *info)
2057{ 1753{
2058 struct sis_video_info *ivideo = (struct sis_video_info *)info->par; 1754 struct sis_video_info *ivideo = (struct sis_video_info *)info->par;
2059 struct sis_memreq sismemreq; 1755 struct sis_memreq sismemreq;
2060 struct fb_vblank sisvbblank; 1756 struct fb_vblank sisvbblank;
2061 sisfb_info x;
2062 u32 gpu32 = 0; 1757 u32 gpu32 = 0;
2063#ifndef __user 1758#ifndef __user
2064#define __user 1759#define __user
2065#endif 1760#endif
2066 u32 __user *argp = (u32 __user *)arg; 1761 u32 __user *argp = (u32 __user *)arg;
2067 1762
2068 switch (cmd) { 1763 switch(cmd) {
2069 case FBIO_ALLOC: 1764 case FBIO_ALLOC:
2070 if(!capable(CAP_SYS_RAWIO)) { 1765 if(!capable(CAP_SYS_RAWIO))
2071 return -EPERM; 1766 return -EPERM;
2072 } 1767
2073 if(copy_from_user(&sismemreq, (void __user *)arg, sizeof(sismemreq))) { 1768 if(copy_from_user(&sismemreq, (void __user *)arg, sizeof(sismemreq)))
2074 return -EFAULT; 1769 return -EFAULT;
2075 } 1770
2076 sis_malloc(&sismemreq); 1771 sis_malloc(&sismemreq);
1772
2077 if(copy_to_user((void __user *)arg, &sismemreq, sizeof(sismemreq))) { 1773 if(copy_to_user((void __user *)arg, &sismemreq, sizeof(sismemreq))) {
2078 sis_free((u32)sismemreq.offset); 1774 sis_free((u32)sismemreq.offset);
2079 return -EFAULT; 1775 return -EFAULT;
2080 } 1776 }
2081 break; 1777 break;
2082 1778
2083 case FBIO_FREE: 1779 case FBIO_FREE:
2084 if(!capable(CAP_SYS_RAWIO)) { 1780 if(!capable(CAP_SYS_RAWIO))
2085 return -EPERM; 1781 return -EPERM;
2086 } 1782
2087 if(get_user(gpu32, argp)) { 1783 if(get_user(gpu32, argp))
2088 return -EFAULT; 1784 return -EFAULT;
2089 } 1785
2090 sis_free(gpu32); 1786 sis_free(gpu32);
2091 break; 1787 break;
2092 1788
2093 case FBIOGET_VBLANK: 1789 case FBIOGET_VBLANK:
2094 sisvbblank.count = 0; 1790 sisvbblank.count = 0;
2095 sisvbblank.flags = sisfb_setupvbblankflags(ivideo, &sisvbblank.vcount, &sisvbblank.hcount); 1791 sisvbblank.flags = sisfb_setupvbblankflags(ivideo, &sisvbblank.vcount, &sisvbblank.hcount);
2096 if(copy_to_user((void __user *)arg, &sisvbblank, sizeof(sisvbblank))) { 1792
1793 if(copy_to_user((void __user *)arg, &sisvbblank, sizeof(sisvbblank)))
2097 return -EFAULT; 1794 return -EFAULT;
2098 } 1795
2099 break; 1796 break;
2100 1797
2101 case SISFB_GET_INFO_SIZE: 1798 case SISFB_GET_INFO_SIZE:
2102 return put_user(sizeof(sisfb_info), argp); 1799 return put_user(sizeof(struct sisfb_info), argp);
2103 1800
2104 case SISFB_GET_INFO_OLD: 1801 case SISFB_GET_INFO_OLD:
2105 if(ivideo->warncount++ < 50) { 1802 if(ivideo->warncount++ < 10)
2106 printk(KERN_INFO "sisfb: Deprecated ioctl call received - update your application!\n"); 1803 printk(KERN_INFO
2107 } 1804 "sisfb: Deprecated ioctl call received - update your application!\n");
2108 case SISFB_GET_INFO: /* For communication with X driver */ 1805 case SISFB_GET_INFO: /* For communication with X driver */
2109 x.sisfb_id = SISFB_ID; 1806 ivideo->sisfb_infoblock.sisfb_id = SISFB_ID;
2110 x.sisfb_version = VER_MAJOR; 1807 ivideo->sisfb_infoblock.sisfb_version = VER_MAJOR;
2111 x.sisfb_revision = VER_MINOR; 1808 ivideo->sisfb_infoblock.sisfb_revision = VER_MINOR;
2112 x.sisfb_patchlevel = VER_LEVEL; 1809 ivideo->sisfb_infoblock.sisfb_patchlevel = VER_LEVEL;
2113 x.chip_id = ivideo->chip_id; 1810 ivideo->sisfb_infoblock.chip_id = ivideo->chip_id;
2114 x.memory = ivideo->video_size / 1024; 1811 ivideo->sisfb_infoblock.sisfb_pci_vendor = ivideo->chip_vendor;
2115 x.heapstart = ivideo->heapstart / 1024; 1812 ivideo->sisfb_infoblock.memory = ivideo->video_size / 1024;
1813 ivideo->sisfb_infoblock.heapstart = ivideo->heapstart / 1024;
2116 if(ivideo->modechanged) { 1814 if(ivideo->modechanged) {
2117 x.fbvidmode = ivideo->mode_no; 1815 ivideo->sisfb_infoblock.fbvidmode = ivideo->mode_no;
2118 } else { 1816 } else {
2119 x.fbvidmode = ivideo->modeprechange; 1817 ivideo->sisfb_infoblock.fbvidmode = ivideo->modeprechange;
2120 }
2121 x.sisfb_caps = ivideo->caps;
2122 x.sisfb_tqlen = 512; /* yet fixed */
2123 x.sisfb_pcibus = ivideo->pcibus;
2124 x.sisfb_pcislot = ivideo->pcislot;
2125 x.sisfb_pcifunc = ivideo->pcifunc;
2126 x.sisfb_lcdpdc = ivideo->detectedpdc;
2127 x.sisfb_lcdpdca = ivideo->detectedpdca;
2128 x.sisfb_lcda = ivideo->detectedlcda;
2129 x.sisfb_vbflags = ivideo->vbflags;
2130 x.sisfb_currentvbflags = ivideo->currentvbflags;
2131 x.sisfb_scalelcd = ivideo->SiS_Pr.UsePanelScaler;
2132 x.sisfb_specialtiming = ivideo->SiS_Pr.SiS_CustomT;
2133 x.sisfb_haveemi = ivideo->SiS_Pr.HaveEMI ? 1 : 0;
2134 x.sisfb_haveemilcd = ivideo->SiS_Pr.HaveEMILCD ? 1 : 0;
2135 x.sisfb_emi30 = ivideo->SiS_Pr.EMI_30;
2136 x.sisfb_emi31 = ivideo->SiS_Pr.EMI_31;
2137 x.sisfb_emi32 = ivideo->SiS_Pr.EMI_32;
2138 x.sisfb_emi33 = ivideo->SiS_Pr.EMI_33;
2139 x.sisfb_tvxpos = (u16)(ivideo->tvxpos + 32);
2140 x.sisfb_tvypos = (u16)(ivideo->tvypos + 32);
2141
2142 if(copy_to_user((void __user *)arg, &x, sizeof(x))) {
2143 return -EFAULT;
2144 } 1818 }
1819 ivideo->sisfb_infoblock.sisfb_caps = ivideo->caps;
1820 ivideo->sisfb_infoblock.sisfb_tqlen = ivideo->cmdQueueSize / 1024;
1821 ivideo->sisfb_infoblock.sisfb_pcibus = ivideo->pcibus;
1822 ivideo->sisfb_infoblock.sisfb_pcislot = ivideo->pcislot;
1823 ivideo->sisfb_infoblock.sisfb_pcifunc = ivideo->pcifunc;
1824 ivideo->sisfb_infoblock.sisfb_lcdpdc = ivideo->detectedpdc;
1825 ivideo->sisfb_infoblock.sisfb_lcdpdca = ivideo->detectedpdca;
1826 ivideo->sisfb_infoblock.sisfb_lcda = ivideo->detectedlcda;
1827 ivideo->sisfb_infoblock.sisfb_vbflags = ivideo->vbflags;
1828 ivideo->sisfb_infoblock.sisfb_currentvbflags = ivideo->currentvbflags;
1829 ivideo->sisfb_infoblock.sisfb_scalelcd = ivideo->SiS_Pr.UsePanelScaler;
1830 ivideo->sisfb_infoblock.sisfb_specialtiming = ivideo->SiS_Pr.SiS_CustomT;
1831 ivideo->sisfb_infoblock.sisfb_haveemi = ivideo->SiS_Pr.HaveEMI ? 1 : 0;
1832 ivideo->sisfb_infoblock.sisfb_haveemilcd = ivideo->SiS_Pr.HaveEMILCD ? 1 : 0;
1833 ivideo->sisfb_infoblock.sisfb_emi30 = ivideo->SiS_Pr.EMI_30;
1834 ivideo->sisfb_infoblock.sisfb_emi31 = ivideo->SiS_Pr.EMI_31;
1835 ivideo->sisfb_infoblock.sisfb_emi32 = ivideo->SiS_Pr.EMI_32;
1836 ivideo->sisfb_infoblock.sisfb_emi33 = ivideo->SiS_Pr.EMI_33;
1837 ivideo->sisfb_infoblock.sisfb_tvxpos = (u16)(ivideo->tvxpos + 32);
1838 ivideo->sisfb_infoblock.sisfb_tvypos = (u16)(ivideo->tvypos + 32);
1839 ivideo->sisfb_infoblock.sisfb_heapsize = ivideo->sisfb_heap_size / 1024;
1840 ivideo->sisfb_infoblock.sisfb_videooffset = ivideo->video_offset;
1841 ivideo->sisfb_infoblock.sisfb_curfstn = ivideo->curFSTN;
1842 ivideo->sisfb_infoblock.sisfb_curdstn = ivideo->curDSTN;
1843 ivideo->sisfb_infoblock.sisfb_vbflags2 = ivideo->vbflags2;
1844 ivideo->sisfb_infoblock.sisfb_can_post = ivideo->sisfb_can_post ? 1 : 0;
1845 ivideo->sisfb_infoblock.sisfb_card_posted = ivideo->sisfb_card_posted ? 1 : 0;
1846 ivideo->sisfb_infoblock.sisfb_was_boot_device = ivideo->sisfb_was_boot_device ? 1 : 0;
1847
1848 if(copy_to_user((void __user *)arg, &ivideo->sisfb_infoblock,
1849 sizeof(ivideo->sisfb_infoblock)))
1850 return -EFAULT;
1851
2145 break; 1852 break;
2146 1853
2147 case SISFB_GET_VBRSTATUS_OLD: 1854 case SISFB_GET_VBRSTATUS_OLD:
2148 if(ivideo->warncount++ < 50) { 1855 if(ivideo->warncount++ < 10)
2149 printk(KERN_INFO "sisfb: Deprecated ioctl call received - update your application!\n"); 1856 printk(KERN_INFO
2150 } 1857 "sisfb: Deprecated ioctl call received - update your application!\n");
2151 case SISFB_GET_VBRSTATUS: 1858 case SISFB_GET_VBRSTATUS:
2152 if(sisfb_CheckVBRetrace(ivideo)) { 1859 if(sisfb_CheckVBRetrace(ivideo))
2153 return put_user((u32)1, argp); 1860 return put_user((u32)1, argp);
2154 } else { 1861 else
2155 return put_user((u32)0, argp); 1862 return put_user((u32)0, argp);
2156 }
2157 1863
2158 case SISFB_GET_AUTOMAXIMIZE_OLD: 1864 case SISFB_GET_AUTOMAXIMIZE_OLD:
2159 if(ivideo->warncount++ < 50) { 1865 if(ivideo->warncount++ < 10)
2160 printk(KERN_INFO "sisfb: Deprecated ioctl call received - update your application!\n"); 1866 printk(KERN_INFO
2161 } 1867 "sisfb: Deprecated ioctl call received - update your application!\n");
2162 case SISFB_GET_AUTOMAXIMIZE: 1868 case SISFB_GET_AUTOMAXIMIZE:
2163 if(ivideo->sisfb_max) return put_user((u32)1, argp); 1869 if(ivideo->sisfb_max)
2164 else return put_user((u32)0, argp); 1870 return put_user((u32)1, argp);
1871 else
1872 return put_user((u32)0, argp);
2165 1873
2166 case SISFB_SET_AUTOMAXIMIZE_OLD: 1874 case SISFB_SET_AUTOMAXIMIZE_OLD:
2167 if(ivideo->warncount++ < 50) { 1875 if(ivideo->warncount++ < 10)
2168 printk(KERN_INFO "sisfb: Deprecated ioctl call received - update your application!\n"); 1876 printk(KERN_INFO
2169 } 1877 "sisfb: Deprecated ioctl call received - update your application!\n");
2170 case SISFB_SET_AUTOMAXIMIZE: 1878 case SISFB_SET_AUTOMAXIMIZE:
2171 if(copy_from_user(&gpu32, argp, sizeof(gpu32))) { 1879 if(get_user(gpu32, argp))
2172 return -EFAULT; 1880 return -EFAULT;
2173 } 1881
2174 ivideo->sisfb_max = (gpu32) ? 1 : 0; 1882 ivideo->sisfb_max = (gpu32) ? 1 : 0;
2175 break; 1883 break;
2176 1884
2177 case SISFB_SET_TVPOSOFFSET: 1885 case SISFB_SET_TVPOSOFFSET:
2178 if(copy_from_user(&gpu32, argp, sizeof(gpu32))) { 1886 if(get_user(gpu32, argp))
2179 return -EFAULT; 1887 return -EFAULT;
2180 } 1888
2181 sisfb_set_TVxposoffset(ivideo, ((int)(gpu32 >> 16)) - 32); 1889 sisfb_set_TVxposoffset(ivideo, ((int)(gpu32 >> 16)) - 32);
2182 sisfb_set_TVyposoffset(ivideo, ((int)(gpu32 & 0xffff)) - 32); 1890 sisfb_set_TVyposoffset(ivideo, ((int)(gpu32 & 0xffff)) - 32);
2183 break; 1891 break;
2184 1892
2185 case SISFB_GET_TVPOSOFFSET: 1893 case SISFB_GET_TVPOSOFFSET:
2186 return put_user((u32)(((ivideo->tvxpos+32)<<16)|((ivideo->tvypos+32)&0xffff)), 1894 return put_user((u32)(((ivideo->tvxpos+32)<<16)|((ivideo->tvypos+32)&0xffff)),
2187 argp); 1895 argp);
1896
1897 case SISFB_COMMAND:
1898 if(copy_from_user(&ivideo->sisfb_command, (void __user *)arg,
1899 sizeof(struct sisfb_cmd)))
1900 return -EFAULT;
1901
1902 sisfb_handle_command(ivideo, &ivideo->sisfb_command);
1903
1904 if(copy_to_user((void __user *)arg, &ivideo->sisfb_command,
1905 sizeof(struct sisfb_cmd)))
1906 return -EFAULT;
1907
1908 break;
2188 1909
2189 case SISFB_SET_LOCK: 1910 case SISFB_SET_LOCK:
2190 if(copy_from_user(&gpu32, argp, sizeof(gpu32))) { 1911 if(get_user(gpu32, argp))
2191 return -EFAULT; 1912 return -EFAULT;
2192 } 1913
2193 ivideo->sisfblocked = (gpu32) ? 1 : 0; 1914 ivideo->sisfblocked = (gpu32) ? 1 : 0;
2194 break; 1915 break;
2195 1916
2196 default: 1917 default:
1918#ifdef SIS_NEW_CONFIG_COMPAT
2197 return -ENOIOCTLCMD; 1919 return -ENOIOCTLCMD;
1920#else
1921 return -EINVAL;
1922#endif
2198 } 1923 }
2199 return 0; 1924 return 0;
2200} 1925}
2201 1926
2202#ifdef CONFIG_COMPAT 1927#ifdef SIS_NEW_CONFIG_COMPAT
2203static long sisfb_compat_ioctl(struct file *f, unsigned cmd, unsigned long arg, struct fb_info *info) 1928static long
1929sisfb_compat_ioctl(struct file *f, unsigned int cmd, unsigned long arg, struct fb_info *info)
2204{ 1930{
2205 int ret; 1931 int ret;
1932
2206 lock_kernel(); 1933 lock_kernel();
2207 ret = sisfb_ioctl(NULL, f, cmd, arg, info); 1934 ret = sisfb_ioctl(NULL, f, cmd, arg, info);
2208 unlock_kernel(); 1935 unlock_kernel();
@@ -2219,7 +1946,7 @@ sisfb_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
2219 1946
2220 strcpy(fix->id, ivideo->myid); 1947 strcpy(fix->id, ivideo->myid);
2221 1948
2222 fix->smem_start = ivideo->video_base; 1949 fix->smem_start = ivideo->video_base + ivideo->video_offset;
2223 fix->smem_len = ivideo->sisfb_mem; 1950 fix->smem_len = ivideo->sisfb_mem;
2224 fix->type = FB_TYPE_PACKED_PIXELS; 1951 fix->type = FB_TYPE_PACKED_PIXELS;
2225 fix->type_aux = 0; 1952 fix->type_aux = 0;
@@ -2231,11 +1958,17 @@ sisfb_get_fix(struct fb_fix_screeninfo *fix, int con, struct fb_info *info)
2231 fix->mmio_start = ivideo->mmio_base; 1958 fix->mmio_start = ivideo->mmio_base;
2232 fix->mmio_len = ivideo->mmio_size; 1959 fix->mmio_len = ivideo->mmio_size;
2233 if(ivideo->sisvga_engine == SIS_300_VGA) { 1960 if(ivideo->sisvga_engine == SIS_300_VGA) {
2234 fix->accel = FB_ACCEL_SIS_GLAMOUR; 1961 fix->accel = FB_ACCEL_SIS_GLAMOUR;
2235 } else if((ivideo->chip == SIS_330) || (ivideo->chip == SIS_760)) { 1962 } else if((ivideo->chip == SIS_330) ||
2236 fix->accel = FB_ACCEL_SIS_XABRE; 1963 (ivideo->chip == SIS_760) ||
1964 (ivideo->chip == SIS_761)) {
1965 fix->accel = FB_ACCEL_SIS_XABRE;
1966 } else if(ivideo->chip == XGI_20) {
1967 fix->accel = FB_ACCEL_XGI_VOLARI_Z;
1968 } else if(ivideo->chip >= XGI_40) {
1969 fix->accel = FB_ACCEL_XGI_VOLARI_V;
2237 } else { 1970 } else {
2238 fix->accel = FB_ACCEL_SIS_GLAMOUR_2; 1971 fix->accel = FB_ACCEL_SIS_GLAMOUR_2;
2239 } 1972 }
2240 1973
2241 return 0; 1974 return 0;
@@ -2251,40 +1984,41 @@ static struct fb_ops sisfb_ops = {
2251 .fb_set_var = sisfb_set_var, 1984 .fb_set_var = sisfb_set_var,
2252 .fb_get_cmap = sisfb_get_cmap, 1985 .fb_get_cmap = sisfb_get_cmap,
2253 .fb_set_cmap = sisfb_set_cmap, 1986 .fb_set_cmap = sisfb_set_cmap,
2254 .fb_pan_display = sisfb_pan_display, 1987 .fb_pan_display = sisfb_pan_display,
2255 .fb_ioctl = sisfb_ioctl 1988 .fb_ioctl = sisfb_ioctl
2256}; 1989};
2257#endif 1990#endif
2258 1991
2259#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 1992#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
2260static struct fb_ops sisfb_ops = { 1993static struct fb_ops sisfb_ops = {
2261 .owner = THIS_MODULE, 1994 .owner = THIS_MODULE,
2262 .fb_open = sisfb_open, 1995 .fb_open = sisfb_open,
2263 .fb_release = sisfb_release, 1996 .fb_release = sisfb_release,
2264 .fb_check_var = sisfb_check_var, 1997 .fb_check_var = sisfb_check_var,
2265 .fb_set_par = sisfb_set_par, 1998 .fb_set_par = sisfb_set_par,
2266 .fb_setcolreg = sisfb_setcolreg, 1999 .fb_setcolreg = sisfb_setcolreg,
2267 .fb_pan_display = sisfb_pan_display, 2000 .fb_pan_display = sisfb_pan_display,
2268 .fb_blank = sisfb_blank, 2001 .fb_blank = sisfb_blank,
2269 .fb_fillrect = fbcon_sis_fillrect, 2002 .fb_fillrect = fbcon_sis_fillrect,
2270 .fb_copyarea = fbcon_sis_copyarea, 2003 .fb_copyarea = fbcon_sis_copyarea,
2271 .fb_imageblit = cfb_imageblit, 2004 .fb_imageblit = cfb_imageblit,
2272 .fb_cursor = soft_cursor, 2005 .fb_cursor = soft_cursor,
2273 .fb_sync = fbcon_sis_sync, 2006 .fb_sync = fbcon_sis_sync,
2274 .fb_ioctl = sisfb_ioctl, 2007#ifdef SIS_NEW_CONFIG_COMPAT
2275#ifdef CONFIG_COMPAT 2008 .fb_compat_ioctl= sisfb_compat_ioctl,
2276 .fb_compat_ioctl = sisfb_compat_ioctl,
2277#endif 2009#endif
2010 .fb_ioctl = sisfb_ioctl
2278}; 2011};
2279#endif 2012#endif
2280 2013
2281/* ---------------- Chip generation dependent routines ---------------- */ 2014/* ---------------- Chip generation dependent routines ---------------- */
2282 2015
2283static struct pci_dev * sisfb_get_northbridge(int basechipid) 2016static struct pci_dev * __devinit
2017sisfb_get_northbridge(int basechipid)
2284{ 2018{
2285 struct pci_dev *pdev = NULL; 2019 struct pci_dev *pdev = NULL;
2286 int nbridgenum, nbridgeidx, i; 2020 int nbridgenum, nbridgeidx, i;
2287 const unsigned short nbridgeids[] = { 2021 static const unsigned short nbridgeids[] = {
2288 PCI_DEVICE_ID_SI_540, /* for SiS 540 VGA */ 2022 PCI_DEVICE_ID_SI_540, /* for SiS 540 VGA */
2289 PCI_DEVICE_ID_SI_630, /* for SiS 630/730 VGA */ 2023 PCI_DEVICE_ID_SI_630, /* for SiS 630/730 VGA */
2290 PCI_DEVICE_ID_SI_730, 2024 PCI_DEVICE_ID_SI_730,
@@ -2292,13 +2026,14 @@ static struct pci_dev * sisfb_get_northbridge(int basechipid)
2292 PCI_DEVICE_ID_SI_650, /* for SiS 650/651/740 VGA */ 2026 PCI_DEVICE_ID_SI_650, /* for SiS 650/651/740 VGA */
2293 PCI_DEVICE_ID_SI_651, 2027 PCI_DEVICE_ID_SI_651,
2294 PCI_DEVICE_ID_SI_740, 2028 PCI_DEVICE_ID_SI_740,
2295 PCI_DEVICE_ID_SI_661, /* for SiS 661/741/660/760 VGA */ 2029 PCI_DEVICE_ID_SI_661, /* for SiS 661/741/660/760/761 VGA */
2296 PCI_DEVICE_ID_SI_741, 2030 PCI_DEVICE_ID_SI_741,
2297 PCI_DEVICE_ID_SI_660, 2031 PCI_DEVICE_ID_SI_660,
2298 PCI_DEVICE_ID_SI_760 2032 PCI_DEVICE_ID_SI_760,
2033 PCI_DEVICE_ID_SI_761
2299 }; 2034 };
2300 2035
2301 switch(basechipid) { 2036 switch(basechipid) {
2302#ifdef CONFIG_FB_SIS_300 2037#ifdef CONFIG_FB_SIS_300
2303 case SIS_540: nbridgeidx = 0; nbridgenum = 1; break; 2038 case SIS_540: nbridgeidx = 0; nbridgenum = 1; break;
2304 case SIS_630: nbridgeidx = 1; nbridgenum = 2; break; 2039 case SIS_630: nbridgeidx = 1; nbridgenum = 2; break;
@@ -2306,35 +2041,40 @@ static struct pci_dev * sisfb_get_northbridge(int basechipid)
2306#ifdef CONFIG_FB_SIS_315 2041#ifdef CONFIG_FB_SIS_315
2307 case SIS_550: nbridgeidx = 3; nbridgenum = 1; break; 2042 case SIS_550: nbridgeidx = 3; nbridgenum = 1; break;
2308 case SIS_650: nbridgeidx = 4; nbridgenum = 3; break; 2043 case SIS_650: nbridgeidx = 4; nbridgenum = 3; break;
2309 case SIS_660: nbridgeidx = 7; nbridgenum = 4; break; 2044 case SIS_660: nbridgeidx = 7; nbridgenum = 5; break;
2310#endif 2045#endif
2311 default: return NULL; 2046 default: return NULL;
2312 } 2047 }
2313 for(i = 0; i < nbridgenum; i++) { 2048 for(i = 0; i < nbridgenum; i++) {
2314 if((pdev = pci_find_device(PCI_VENDOR_ID_SI, nbridgeids[nbridgeidx+i], NULL))) break; 2049 if((pdev = SIS_PCI_GET_DEVICE(PCI_VENDOR_ID_SI,
2050 nbridgeids[nbridgeidx+i], NULL)))
2051 break;
2315 } 2052 }
2316 return pdev; 2053 return pdev;
2317} 2054}
2318 2055
2319static int __devinit sisfb_get_dram_size(struct sis_video_info *ivideo) 2056static int __devinit
2057sisfb_get_dram_size(struct sis_video_info *ivideo)
2320{ 2058{
2321#if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 2059#if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
2322 u8 reg; 2060 u8 reg;
2323#endif 2061#endif
2324 2062
2325 ivideo->video_size = 0; 2063 ivideo->video_size = 0;
2064 ivideo->UMAsize = ivideo->LFBsize = 0;
2326 2065
2327 switch(ivideo->chip) { 2066 switch(ivideo->chip) {
2328#ifdef CONFIG_FB_SIS_300 2067#ifdef CONFIG_FB_SIS_300
2329 case SIS_300: 2068 case SIS_300:
2330 inSISIDXREG(SISSR, 0x14, reg); 2069 inSISIDXREG(SISSR, 0x14, reg);
2331 ivideo->video_size = ((reg & 0x3F) + 1) << 20; 2070 ivideo->video_size = ((reg & 0x3F) + 1) << 20;
2332 break; 2071 break;
2333 case SIS_540: 2072 case SIS_540:
2334 case SIS_630: 2073 case SIS_630:
2335 case SIS_730: 2074 case SIS_730:
2336 if(!ivideo->nbridge) return -1; 2075 if(!ivideo->nbridge)
2337 pci_read_config_byte(ivideo->nbridge, 0x63, &reg); 2076 return -1;
2077 pci_read_config_byte(ivideo->nbridge, 0x63, &reg);
2338 ivideo->video_size = 1 << (((reg & 0x70) >> 4) + 21); 2078 ivideo->video_size = 1 << (((reg & 0x70) >> 4) + 21);
2339 break; 2079 break;
2340#endif 2080#endif
@@ -2342,45 +2082,68 @@ static int __devinit sisfb_get_dram_size(struct sis_video_info *ivideo)
2342 case SIS_315H: 2082 case SIS_315H:
2343 case SIS_315PRO: 2083 case SIS_315PRO:
2344 case SIS_315: 2084 case SIS_315:
2345 inSISIDXREG(SISSR, 0x14, reg); 2085 inSISIDXREG(SISSR, 0x14, reg);
2346 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; 2086 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
2347 switch((reg >> 2) & 0x03) { 2087 switch((reg >> 2) & 0x03) {
2348 case 0x01: 2088 case 0x01:
2349 case 0x03: 2089 case 0x03:
2350 ivideo->video_size <<= 1; 2090 ivideo->video_size <<= 1;
2351 break; 2091 break;
2352 case 0x02: 2092 case 0x02:
2353 ivideo->video_size += (ivideo->video_size/2); 2093 ivideo->video_size += (ivideo->video_size/2);
2354 } 2094 }
2355 break; 2095 break;
2356 case SIS_330: 2096 case SIS_330:
2357 inSISIDXREG(SISSR, 0x14, reg); 2097 inSISIDXREG(SISSR, 0x14, reg);
2358 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; 2098 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
2359 if(reg & 0x0c) ivideo->video_size <<= 1; 2099 if(reg & 0x0c) ivideo->video_size <<= 1;
2360 break; 2100 break;
2361 case SIS_550: 2101 case SIS_550:
2362 case SIS_650: 2102 case SIS_650:
2363 case SIS_740: 2103 case SIS_740:
2364 inSISIDXREG(SISSR, 0x14, reg); 2104 inSISIDXREG(SISSR, 0x14, reg);
2365 ivideo->video_size = (((reg & 0x3f) + 1) << 2) << 20; 2105 ivideo->video_size = (((reg & 0x3f) + 1) << 2) << 20;
2366 break; 2106 break;
2367 case SIS_661: 2107 case SIS_661:
2368 case SIS_741: 2108 case SIS_741:
2369 inSISIDXREG(SISCR, 0x79, reg); 2109 inSISIDXREG(SISCR, 0x79, reg);
2370 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20; 2110 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
2371 break; 2111 break;
2372 case SIS_660: 2112 case SIS_660:
2373 case SIS_760: 2113 case SIS_760:
2114 case SIS_761:
2374 inSISIDXREG(SISCR, 0x79, reg); 2115 inSISIDXREG(SISCR, 0x79, reg);
2375 reg = (reg & 0xf0) >> 4; 2116 reg = (reg & 0xf0) >> 4;
2376 if(reg) ivideo->video_size = (1 << reg) << 20; 2117 if(reg) {
2118 ivideo->video_size = (1 << reg) << 20;
2119 ivideo->UMAsize = ivideo->video_size;
2120 }
2377 inSISIDXREG(SISCR, 0x78, reg); 2121 inSISIDXREG(SISCR, 0x78, reg);
2378 reg &= 0x30; 2122 reg &= 0x30;
2379 if(reg) { 2123 if(reg) {
2380 if(reg == 0x10) ivideo->video_size += (32 << 20); 2124 if(reg == 0x10) {
2381 else ivideo->video_size += (64 << 20); 2125 ivideo->LFBsize = (32 << 20);
2126 } else {
2127 ivideo->LFBsize = (64 << 20);
2128 }
2129 ivideo->video_size += ivideo->LFBsize;
2382 } 2130 }
2383 break; 2131 break;
2132 case SIS_340:
2133 case XGI_20:
2134 case XGI_40:
2135 inSISIDXREG(SISSR, 0x14, reg);
2136 ivideo->video_size = (1 << ((reg & 0xf0) >> 4)) << 20;
2137 if(ivideo->chip != XGI_20) {
2138 reg = (reg & 0x0c) >> 2;
2139 if(ivideo->revision_id == 2) {
2140 if(reg & 0x01) reg = 0x02;
2141 else reg = 0x00;
2142 }
2143 if(reg == 0x02) ivideo->video_size <<= 1;
2144 else if(reg == 0x03) ivideo->video_size <<= 2;
2145 }
2146 break;
2384#endif 2147#endif
2385 default: 2148 default:
2386 return -1; 2149 return -1;
@@ -2390,17 +2153,24 @@ static int __devinit sisfb_get_dram_size(struct sis_video_info *ivideo)
2390 2153
2391/* -------------- video bridge device detection --------------- */ 2154/* -------------- video bridge device detection --------------- */
2392 2155
2393static void __devinit sisfb_detect_VB_connect(struct sis_video_info *ivideo) 2156static void __devinit
2157sisfb_detect_VB_connect(struct sis_video_info *ivideo)
2394{ 2158{
2395 u8 cr32, temp; 2159 u8 cr32, temp;
2396 2160
2161 /* No CRT2 on XGI Z7 */
2162 if(ivideo->chip == XGI_20) {
2163 ivideo->sisfb_crt1off = 0;
2164 return;
2165 }
2166
2397#ifdef CONFIG_FB_SIS_300 2167#ifdef CONFIG_FB_SIS_300
2398 if(ivideo->sisvga_engine == SIS_300_VGA) { 2168 if(ivideo->sisvga_engine == SIS_300_VGA) {
2399 inSISIDXREG(SISSR, 0x17, temp); 2169 inSISIDXREG(SISSR, 0x17, temp);
2400 if((temp & 0x0F) && (ivideo->chip != SIS_300)) { 2170 if((temp & 0x0F) && (ivideo->chip != SIS_300)) {
2401 /* PAL/NTSC is stored on SR16 on such machines */ 2171 /* PAL/NTSC is stored on SR16 on such machines */
2402 if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN))) { 2172 if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN))) {
2403 inSISIDXREG(SISSR, 0x16, temp); 2173 inSISIDXREG(SISSR, 0x16, temp);
2404 if(temp & 0x20) 2174 if(temp & 0x20)
2405 ivideo->vbflags |= TV_PAL; 2175 ivideo->vbflags |= TV_PAL;
2406 else 2176 else
@@ -2435,28 +2205,29 @@ static void __devinit sisfb_detect_VB_connect(struct sis_video_info *ivideo)
2435 2205
2436 if(ivideo->sisfb_tvplug != -1) { 2206 if(ivideo->sisfb_tvplug != -1) {
2437 if( (ivideo->sisvga_engine != SIS_315_VGA) || 2207 if( (ivideo->sisvga_engine != SIS_315_VGA) ||
2438 (!(ivideo->vbflags & (VB_301C|VB_301LV|VB_302LV))) ) { 2208 (!(ivideo->vbflags2 & VB2_SISYPBPRBRIDGE)) ) {
2439 if(ivideo->sisfb_tvplug & TV_YPBPR) { 2209 if(ivideo->sisfb_tvplug & TV_YPBPR) {
2440 ivideo->sisfb_tvplug = -1; 2210 ivideo->sisfb_tvplug = -1;
2441 printk(KERN_ERR "sisfb: YPbPr not supported\n"); 2211 printk(KERN_ERR "sisfb: YPbPr not supported\n");
2442 } 2212 }
2443 } 2213 }
2444 } 2214 }
2445 if(ivideo->sisfb_tvplug != -1) { 2215 if(ivideo->sisfb_tvplug != -1) {
2446 if( (ivideo->sisvga_engine != SIS_315_VGA) || 2216 if( (ivideo->sisvga_engine != SIS_315_VGA) ||
2447 (!(ivideo->vbflags & (VB_301|VB_301B|VB_302B))) ) { 2217 (!(ivideo->vbflags2 & VB2_SISHIVISIONBRIDGE)) ) {
2448 if(ivideo->sisfb_tvplug & TV_HIVISION) { 2218 if(ivideo->sisfb_tvplug & TV_HIVISION) {
2449 ivideo->sisfb_tvplug = -1; 2219 ivideo->sisfb_tvplug = -1;
2450 printk(KERN_ERR "sisfb: HiVision not supported\n"); 2220 printk(KERN_ERR "sisfb: HiVision not supported\n");
2451 } 2221 }
2452 } 2222 }
2453 } 2223 }
2454 if(ivideo->sisfb_tvstd != -1) { 2224 if(ivideo->sisfb_tvstd != -1) {
2455 if( (!(ivideo->vbflags & VB_SISBRIDGE)) && 2225 if( (!(ivideo->vbflags2 & VB2_SISBRIDGE)) &&
2456 (!((ivideo->sisvga_engine == SIS_315_VGA) && (ivideo->vbflags & VB_CHRONTEL))) ) { 2226 (!((ivideo->sisvga_engine == SIS_315_VGA) &&
2227 (ivideo->vbflags2 & VB2_CHRONTEL))) ) {
2457 if(ivideo->sisfb_tvstd & (TV_PALN | TV_PALN | TV_NTSCJ)) { 2228 if(ivideo->sisfb_tvstd & (TV_PALN | TV_PALN | TV_NTSCJ)) {
2458 ivideo->sisfb_tvstd = -1; 2229 ivideo->sisfb_tvstd = -1;
2459 printk(KERN_ERR "sisfb: PALM/PALN/NTSCJ not supported\n"); 2230 printk(KERN_ERR "sisfb: PALM/PALN/NTSCJ not supported\n");
2460 } 2231 }
2461 } 2232 }
2462 } 2233 }
@@ -2468,7 +2239,7 @@ static void __devinit sisfb_detect_VB_connect(struct sis_video_info *ivideo)
2468 if(cr32 & SIS_VB_YPBPR) ivideo->vbflags |= (TV_YPBPR|TV_YPBPR525I); /* default: 480i */ 2239 if(cr32 & SIS_VB_YPBPR) ivideo->vbflags |= (TV_YPBPR|TV_YPBPR525I); /* default: 480i */
2469 else if(cr32 & SIS_VB_HIVISION) ivideo->vbflags |= TV_HIVISION; 2240 else if(cr32 & SIS_VB_HIVISION) ivideo->vbflags |= TV_HIVISION;
2470 else if(cr32 & SIS_VB_SCART) ivideo->vbflags |= TV_SCART; 2241 else if(cr32 & SIS_VB_SCART) ivideo->vbflags |= TV_SCART;
2471 else { 2242 else {
2472 if(cr32 & SIS_VB_SVIDEO) ivideo->vbflags |= TV_SVIDEO; 2243 if(cr32 & SIS_VB_SVIDEO) ivideo->vbflags |= TV_SVIDEO;
2473 if(cr32 & SIS_VB_COMPOSITE) ivideo->vbflags |= TV_AVIDEO; 2244 if(cr32 & SIS_VB_COMPOSITE) ivideo->vbflags |= TV_AVIDEO;
2474 } 2245 }
@@ -2485,165 +2256,44 @@ static void __devinit sisfb_detect_VB_connect(struct sis_video_info *ivideo)
2485 } 2256 }
2486 if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN | TV_NTSCJ))) { 2257 if(!(ivideo->vbflags & (TV_PAL | TV_NTSC | TV_PALM | TV_PALN | TV_NTSCJ))) {
2487 if(ivideo->sisvga_engine == SIS_300_VGA) { 2258 if(ivideo->sisvga_engine == SIS_300_VGA) {
2488 inSISIDXREG(SISSR, 0x38, temp); 2259 inSISIDXREG(SISSR, 0x38, temp);
2489 if(temp & 0x01) ivideo->vbflags |= TV_PAL; 2260 if(temp & 0x01) ivideo->vbflags |= TV_PAL;
2490 else ivideo->vbflags |= TV_NTSC; 2261 else ivideo->vbflags |= TV_NTSC;
2491 } else if((ivideo->chip <= SIS_315PRO) || (ivideo->chip >= SIS_330)) { 2262 } else if((ivideo->chip <= SIS_315PRO) || (ivideo->chip >= SIS_330)) {
2492 inSISIDXREG(SISSR, 0x38, temp); 2263 inSISIDXREG(SISSR, 0x38, temp);
2493 if(temp & 0x01) ivideo->vbflags |= TV_PAL; 2264 if(temp & 0x01) ivideo->vbflags |= TV_PAL;
2494 else ivideo->vbflags |= TV_NTSC; 2265 else ivideo->vbflags |= TV_NTSC;
2495 } else { 2266 } else {
2496 inSISIDXREG(SISCR, 0x79, temp); 2267 inSISIDXREG(SISCR, 0x79, temp);
2497 if(temp & 0x20) ivideo->vbflags |= TV_PAL; 2268 if(temp & 0x20) ivideo->vbflags |= TV_PAL;
2498 else ivideo->vbflags |= TV_NTSC; 2269 else ivideo->vbflags |= TV_NTSC;
2499 } 2270 }
2500 } 2271 }
2501 } 2272 }
2502 2273
2503 /* Copy forceCRT1 option to CRT1off if option is given */ 2274 /* Copy forceCRT1 option to CRT1off if option is given */
2504 if(ivideo->sisfb_forcecrt1 != -1) { 2275 if(ivideo->sisfb_forcecrt1 != -1) {
2505 ivideo->sisfb_crt1off = (ivideo->sisfb_forcecrt1) ? 0 : 1; 2276 ivideo->sisfb_crt1off = (ivideo->sisfb_forcecrt1) ? 0 : 1;
2506 }
2507}
2508
2509static void __devinit sisfb_get_VB_type(struct sis_video_info *ivideo)
2510{
2511 char stdstr[] = "sisfb: Detected";
2512 char bridgestr[] = "video bridge";
2513 u8 vb_chipid;
2514 u8 reg;
2515
2516 inSISIDXREG(SISPART4, 0x00, vb_chipid);
2517 switch(vb_chipid) {
2518 case 0x01:
2519 inSISIDXREG(SISPART4, 0x01, reg);
2520 if(reg < 0xb0) {
2521 ivideo->vbflags |= VB_301;
2522 printk(KERN_INFO "%s SiS301 %s\n", stdstr, bridgestr);
2523 } else if(reg < 0xc0) {
2524 ivideo->vbflags |= VB_301B;
2525 inSISIDXREG(SISPART4,0x23,reg);
2526 if(!(reg & 0x02)) {
2527 ivideo->vbflags |= VB_30xBDH;
2528 printk(KERN_INFO "%s SiS301B-DH %s\n", stdstr, bridgestr);
2529 } else {
2530 printk(KERN_INFO "%s SiS301B %s\n", stdstr, bridgestr);
2531 }
2532 } else if(reg < 0xd0) {
2533 ivideo->vbflags |= VB_301C;
2534 printk(KERN_INFO "%s SiS301C %s\n", stdstr, bridgestr);
2535 } else if(reg < 0xe0) {
2536 ivideo->vbflags |= VB_301LV;
2537 printk(KERN_INFO "%s SiS301LV %s\n", stdstr, bridgestr);
2538 } else if(reg <= 0xe1) {
2539 inSISIDXREG(SISPART4,0x39,reg);
2540 if(reg == 0xff) {
2541 ivideo->vbflags |= VB_302LV;
2542 printk(KERN_INFO "%s SiS302LV %s\n", stdstr, bridgestr);
2543 } else {
2544 ivideo->vbflags |= VB_301C;
2545 printk(KERN_INFO "%s SiS301C(P4) %s\n", stdstr, bridgestr);
2546#if 0
2547 ivideo->vbflags |= VB_302ELV;
2548 printk(KERN_INFO "%s SiS302ELV %s\n", stdstr, bridgestr);
2549#endif
2550 }
2551 }
2552 break;
2553 case 0x02:
2554 ivideo->vbflags |= VB_302B;
2555 printk(KERN_INFO "%s SiS302B %s\n", stdstr, bridgestr);
2556 break;
2557 }
2558
2559 if((!(ivideo->vbflags & VB_VIDEOBRIDGE)) && (ivideo->chip != SIS_300)) {
2560 inSISIDXREG(SISCR, 0x37, reg);
2561 reg &= SIS_EXTERNAL_CHIP_MASK;
2562 reg >>= 1;
2563 if(ivideo->sisvga_engine == SIS_300_VGA) {
2564#ifdef CONFIG_FB_SIS_300
2565 switch(reg) {
2566 case SIS_EXTERNAL_CHIP_LVDS:
2567 ivideo->vbflags |= VB_LVDS;
2568 break;
2569 case SIS_EXTERNAL_CHIP_TRUMPION:
2570 ivideo->vbflags |= VB_TRUMPION;
2571 break;
2572 case SIS_EXTERNAL_CHIP_CHRONTEL:
2573 ivideo->vbflags |= VB_CHRONTEL;
2574 break;
2575 case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
2576 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL);
2577 break;
2578 }
2579 if(ivideo->vbflags & VB_CHRONTEL) ivideo->chronteltype = 1;
2580#endif
2581 } else if(ivideo->chip < SIS_661) {
2582#ifdef CONFIG_FB_SIS_315
2583 switch (reg) {
2584 case SIS310_EXTERNAL_CHIP_LVDS:
2585 ivideo->vbflags |= VB_LVDS;
2586 break;
2587 case SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL:
2588 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL);
2589 break;
2590 }
2591 if(ivideo->vbflags & VB_CHRONTEL) ivideo->chronteltype = 2;
2592#endif
2593 } else if(ivideo->chip >= SIS_661) {
2594#ifdef CONFIG_FB_SIS_315
2595 inSISIDXREG(SISCR, 0x38, reg);
2596 reg >>= 5;
2597 switch(reg) {
2598 case 0x02:
2599 ivideo->vbflags |= VB_LVDS;
2600 break;
2601 case 0x03:
2602 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL);
2603 break;
2604 case 0x04:
2605 ivideo->vbflags |= (VB_LVDS | VB_CONEXANT);
2606 break;
2607 }
2608 if(ivideo->vbflags & VB_CHRONTEL) ivideo->chronteltype = 2;
2609#endif
2610 }
2611 if(ivideo->vbflags & VB_LVDS) {
2612 printk(KERN_INFO "%s LVDS transmitter\n", stdstr);
2613 }
2614 if(ivideo->vbflags & VB_TRUMPION) {
2615 printk(KERN_INFO "%s Trumpion Zurac LCD scaler\n", stdstr);
2616 }
2617 if(ivideo->vbflags & VB_CHRONTEL) {
2618 printk(KERN_INFO "%s Chrontel TV encoder\n", stdstr);
2619 }
2620 if(ivideo->vbflags & VB_CONEXANT) {
2621 printk(KERN_INFO "%s Conexant external device\n", stdstr);
2622 }
2623 }
2624
2625 if(ivideo->vbflags & VB_SISBRIDGE) {
2626 SiS_Sense30x(ivideo);
2627 } else if(ivideo->vbflags & VB_CHRONTEL) {
2628 SiS_SenseCh(ivideo);
2629 } 2277 }
2630} 2278}
2631 2279
2632/* ------------------ Sensing routines ------------------ */ 2280/* ------------------ Sensing routines ------------------ */
2633 2281
2634static BOOLEAN __devinit sisfb_test_DDC1(struct sis_video_info *ivideo) 2282static BOOLEAN __devinit
2283sisfb_test_DDC1(struct sis_video_info *ivideo)
2635{ 2284{
2636 unsigned short old; 2285 unsigned short old;
2637 int count = 48; 2286 int count = 48;
2638 2287
2639 old = SiS_ReadDDC1Bit(&ivideo->SiS_Pr); 2288 old = SiS_ReadDDC1Bit(&ivideo->SiS_Pr);
2640 do { 2289 do {
2641 if(old != SiS_ReadDDC1Bit(&ivideo->SiS_Pr)) break; 2290 if(old != SiS_ReadDDC1Bit(&ivideo->SiS_Pr)) break;
2642 } while(count--); 2291 } while(count--);
2643 return (count == -1) ? FALSE : TRUE; 2292 return (count == -1) ? FALSE : TRUE;
2644} 2293}
2645 2294
2646static void __devinit sisfb_sense_crt1(struct sis_video_info *ivideo) 2295static void __devinit
2296sisfb_sense_crt1(struct sis_video_info *ivideo)
2647{ 2297{
2648 BOOLEAN mustwait = FALSE; 2298 BOOLEAN mustwait = FALSE;
2649 u8 sr1F, cr17; 2299 u8 sr1F, cr17;
@@ -2699,7 +2349,8 @@ static void __devinit sisfb_sense_crt1(struct sis_video_info *ivideo)
2699 if(temp == 0xffff) { 2349 if(temp == 0xffff) {
2700 i = 3; 2350 i = 3;
2701 do { 2351 do {
2702 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine, 0, 0, NULL); 2352 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags,
2353 ivideo->sisvga_engine, 0, 0, NULL, ivideo->vbflags2);
2703 } while(((temp == 0) || (temp == 0xffff)) && i--); 2354 } while(((temp == 0) || (temp == 0xffff)) && i--);
2704 2355
2705 if((temp == 0) || (temp == 0xffff)) { 2356 if((temp == 0) || (temp == 0xffff)) {
@@ -2723,7 +2374,96 @@ static void __devinit sisfb_sense_crt1(struct sis_video_info *ivideo)
2723} 2374}
2724 2375
2725/* Determine and detect attached devices on SiS30x */ 2376/* Determine and detect attached devices on SiS30x */
2726static int __devinit SISDoSense(struct sis_video_info *ivideo, u16 type, u16 test) 2377static void __devinit
2378SiS_SenseLCD(struct sis_video_info *ivideo)
2379{
2380 unsigned char buffer[256];
2381 unsigned short temp, realcrtno, i;
2382 u8 reg, cr37 = 0, paneltype = 0;
2383 u16 xres, yres;
2384
2385 ivideo->SiS_Pr.PanelSelfDetected = FALSE;
2386
2387 /* LCD detection only for TMDS bridges */
2388 if(!(ivideo->vbflags2 & VB2_SISTMDSBRIDGE))
2389 return;
2390 if(ivideo->vbflags2 & VB2_30xBDH)
2391 return;
2392
2393 /* If LCD already set up by BIOS, skip it */
2394 inSISIDXREG(SISCR, 0x32, reg);
2395 if(reg & 0x08)
2396 return;
2397
2398 realcrtno = 1;
2399 if(ivideo->SiS_Pr.DDCPortMixup)
2400 realcrtno = 0;
2401
2402 /* Check DDC capabilities */
2403 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags, ivideo->sisvga_engine,
2404 realcrtno, 0, &buffer[0], ivideo->vbflags2);
2405
2406 if((!temp) || (temp == 0xffff) || (!(temp & 0x02)))
2407 return;
2408
2409 /* Read DDC data */
2410 i = 3; /* Number of retrys */
2411 do {
2412 temp = SiS_HandleDDC(&ivideo->SiS_Pr, ivideo->vbflags,
2413 ivideo->sisvga_engine, realcrtno, 1,
2414 &buffer[0], ivideo->vbflags2);
2415 } while((temp) && i--);
2416
2417 if(temp)
2418 return;
2419
2420 /* No digital device */
2421 if(!(buffer[0x14] & 0x80))
2422 return;
2423
2424 /* First detailed timing preferred timing? */
2425 if(!(buffer[0x18] & 0x02))
2426 return;
2427
2428 xres = buffer[0x38] | ((buffer[0x3a] & 0xf0) << 4);
2429 yres = buffer[0x3b] | ((buffer[0x3d] & 0xf0) << 4);
2430
2431 switch(xres) {
2432 case 1024:
2433 if(yres == 768)
2434 paneltype = 0x02;
2435 break;
2436 case 1280:
2437 if(yres == 1024)
2438 paneltype = 0x03;
2439 break;
2440 case 1600:
2441 if((yres == 1200) && (ivideo->vbflags2 & VB2_30xC))
2442 paneltype = 0x0b;
2443 break;
2444 }
2445
2446 if(!paneltype)
2447 return;
2448
2449 if(buffer[0x23])
2450 cr37 |= 0x10;
2451
2452 if((buffer[0x47] & 0x18) == 0x18)
2453 cr37 |= ((((buffer[0x47] & 0x06) ^ 0x06) << 5) | 0x20);
2454 else
2455 cr37 |= 0xc0;
2456
2457 outSISIDXREG(SISCR, 0x36, paneltype);
2458 cr37 &= 0xf1;
2459 setSISIDXREG(SISCR, 0x37, 0x0c, cr37);
2460 orSISIDXREG(SISCR, 0x32, 0x08);
2461
2462 ivideo->SiS_Pr.PanelSelfDetected = TRUE;
2463}
2464
2465static int __devinit
2466SISDoSense(struct sis_video_info *ivideo, u16 type, u16 test)
2727{ 2467{
2728 int temp, mytest, result, i, j; 2468 int temp, mytest, result, i, j;
2729 2469
@@ -2749,10 +2489,11 @@ static int __devinit SISDoSense(struct sis_video_info *ivideo, u16 type, u16 tes
2749 } 2489 }
2750 if((result == 0) || (result >= 2)) break; 2490 if((result == 0) || (result >= 2)) break;
2751 } 2491 }
2752 return(result); 2492 return result;
2753} 2493}
2754 2494
2755static void __devinit SiS_Sense30x(struct sis_video_info *ivideo) 2495static void __devinit
2496SiS_Sense30x(struct sis_video_info *ivideo)
2756{ 2497{
2757 u8 backupP4_0d,backupP2_00,backupP2_4d,backupSR_1e,biosflag=0; 2498 u8 backupP4_0d,backupP2_00,backupP2_4d,backupSR_1e,biosflag=0;
2758 u16 svhs=0, svhs_c=0; 2499 u16 svhs=0, svhs_c=0;
@@ -2762,36 +2503,51 @@ static void __devinit SiS_Sense30x(struct sis_video_info *ivideo)
2762 char stdstr[] = "sisfb: Detected"; 2503 char stdstr[] = "sisfb: Detected";
2763 char tvstr[] = "TV connected to"; 2504 char tvstr[] = "TV connected to";
2764 2505
2765 if(ivideo->vbflags & VB_301) { 2506 if(ivideo->vbflags2 & VB2_301) {
2766 svhs = 0x00b9; cvbs = 0x00b3; vga2 = 0x00d1; 2507 svhs = 0x00b9; cvbs = 0x00b3; vga2 = 0x00d1;
2767 inSISIDXREG(SISPART4,0x01,myflag); 2508 inSISIDXREG(SISPART4,0x01,myflag);
2768 if(myflag & 0x04) { 2509 if(myflag & 0x04) {
2769 svhs = 0x00dd; cvbs = 0x00ee; vga2 = 0x00fd; 2510 svhs = 0x00dd; cvbs = 0x00ee; vga2 = 0x00fd;
2770 } 2511 }
2771 } else if(ivideo->vbflags & (VB_301B | VB_302B)) { 2512 } else if(ivideo->vbflags2 & (VB2_301B | VB2_302B)) {
2772 svhs = 0x016b; cvbs = 0x0174; vga2 = 0x0190; 2513 svhs = 0x016b; cvbs = 0x0174; vga2 = 0x0190;
2773 } else if(ivideo->vbflags & (VB_301LV | VB_302LV)) { 2514 } else if(ivideo->vbflags2 & (VB2_301LV | VB2_302LV)) {
2774 svhs = 0x0200; cvbs = 0x0100; 2515 svhs = 0x0200; cvbs = 0x0100;
2775 } else if(ivideo->vbflags & (VB_301C | VB_302ELV)) { 2516 } else if(ivideo->vbflags2 & (VB2_301C | VB2_302ELV | VB2_307T | VB2_307LV)) {
2776 svhs = 0x016b; cvbs = 0x0110; vga2 = 0x0190; 2517 svhs = 0x016b; cvbs = 0x0110; vga2 = 0x0190;
2777 } else return; 2518 } else
2519 return;
2778 2520
2779 vga2_c = 0x0e08; svhs_c = 0x0404; cvbs_c = 0x0804; 2521 vga2_c = 0x0e08; svhs_c = 0x0404; cvbs_c = 0x0804;
2780 if(ivideo->vbflags & (VB_301LV|VB_302LV|VB_302ELV)) { 2522 if(ivideo->vbflags & (VB2_301LV|VB2_302LV|VB2_302ELV|VB2_307LV)) {
2781 svhs_c = 0x0408; cvbs_c = 0x0808; 2523 svhs_c = 0x0408; cvbs_c = 0x0808;
2782 } 2524 }
2525
2783 biosflag = 2; 2526 biosflag = 2;
2527 if(ivideo->haveXGIROM) {
2528 biosflag = ivideo->bios_abase[0x58] & 0x03;
2529 } else if(ivideo->newrom) {
2530 if(ivideo->bios_abase[0x5d] & 0x04) biosflag |= 0x01;
2531 } else if(ivideo->sisvga_engine == SIS_300_VGA) {
2532 if(ivideo->bios_abase) {
2533 biosflag = ivideo->bios_abase[0xfe] & 0x03;
2534 }
2535 }
2784 2536
2785 if(ivideo->chip == SIS_300) { 2537 if(ivideo->chip == SIS_300) {
2786 inSISIDXREG(SISSR,0x3b,myflag); 2538 inSISIDXREG(SISSR,0x3b,myflag);
2787 if(!(myflag & 0x01)) vga2 = vga2_c = 0; 2539 if(!(myflag & 0x01)) vga2 = vga2_c = 0;
2788 } 2540 }
2789 2541
2542 if(!(ivideo->vbflags2 & VB2_SISVGA2BRIDGE)) {
2543 vga2 = vga2_c = 0;
2544 }
2545
2790 inSISIDXREG(SISSR,0x1e,backupSR_1e); 2546 inSISIDXREG(SISSR,0x1e,backupSR_1e);
2791 orSISIDXREG(SISSR,0x1e,0x20); 2547 orSISIDXREG(SISSR,0x1e,0x20);
2792 2548
2793 inSISIDXREG(SISPART4,0x0d,backupP4_0d); 2549 inSISIDXREG(SISPART4,0x0d,backupP4_0d);
2794 if(ivideo->vbflags & VB_301C) { 2550 if(ivideo->vbflags2 & VB2_30xC) {
2795 setSISIDXREG(SISPART4,0x0d,~0x07,0x01); 2551 setSISIDXREG(SISPART4,0x0d,~0x07,0x01);
2796 } else { 2552 } else {
2797 orSISIDXREG(SISPART4,0x0d,0x04); 2553 orSISIDXREG(SISPART4,0x0d,0x04);
@@ -2802,11 +2558,11 @@ static void __devinit SiS_Sense30x(struct sis_video_info *ivideo)
2802 outSISIDXREG(SISPART2,0x00,((backupP2_00 | 0x1c) & 0xfc)); 2558 outSISIDXREG(SISPART2,0x00,((backupP2_00 | 0x1c) & 0xfc));
2803 2559
2804 inSISIDXREG(SISPART2,0x4d,backupP2_4d); 2560 inSISIDXREG(SISPART2,0x4d,backupP2_4d);
2805 if(ivideo->vbflags & (VB_301C|VB_301LV|VB_302LV|VB_302ELV)) { 2561 if(ivideo->vbflags2 & VB2_SISYPBPRBRIDGE) {
2806 outSISIDXREG(SISPART2,0x4d,(backupP2_4d & ~0x10)); 2562 outSISIDXREG(SISPART2,0x4d,(backupP2_4d & ~0x10));
2807 } 2563 }
2808 2564
2809 if(!(ivideo->vbflags & VB_301C)) { 2565 if(!(ivideo->vbflags2 & VB2_30xCLV)) {
2810 SISDoSense(ivideo, 0, 0); 2566 SISDoSense(ivideo, 0, 0);
2811 } 2567 }
2812 2568
@@ -2826,12 +2582,11 @@ static void __devinit SiS_Sense30x(struct sis_video_info *ivideo)
2826 2582
2827 andSISIDXREG(SISCR, 0x32, 0x3f); 2583 andSISIDXREG(SISCR, 0x32, 0x3f);
2828 2584
2829 if(ivideo->vbflags & VB_301C) { 2585 if(ivideo->vbflags2 & VB2_30xCLV) {
2830 orSISIDXREG(SISPART4,0x0d,0x04); 2586 orSISIDXREG(SISPART4,0x0d,0x04);
2831 } 2587 }
2832 2588
2833 if((ivideo->sisvga_engine == SIS_315_VGA) && 2589 if((ivideo->sisvga_engine == SIS_315_VGA) && (ivideo->vbflags2 & VB2_SISYPBPRBRIDGE)) {
2834 (ivideo->vbflags & (VB_301C|VB_301LV|VB_302LV|VB_302ELV))) {
2835 outSISIDXREG(SISPART2,0x4d,(backupP2_4d | 0x10)); 2590 outSISIDXREG(SISPART2,0x4d,(backupP2_4d | 0x10));
2836 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x2000); 2591 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x2000);
2837 if((result = SISDoSense(ivideo, svhs, 0x0604))) { 2592 if((result = SISDoSense(ivideo, svhs, 0x0604))) {
@@ -2864,7 +2619,7 @@ static void __devinit SiS_Sense30x(struct sis_video_info *ivideo)
2864 outSISIDXREG(SISPART4,0x0d,backupP4_0d); 2619 outSISIDXREG(SISPART4,0x0d,backupP4_0d);
2865 outSISIDXREG(SISSR,0x1e,backupSR_1e); 2620 outSISIDXREG(SISSR,0x1e,backupSR_1e);
2866 2621
2867 if(ivideo->vbflags & VB_301C) { 2622 if(ivideo->vbflags2 & VB2_30xCLV) {
2868 inSISIDXREG(SISPART2,0x00,biosflag); 2623 inSISIDXREG(SISPART2,0x00,biosflag);
2869 if(biosflag & 0x20) { 2624 if(biosflag & 0x20) {
2870 for(myflag = 2; myflag > 0; myflag--) { 2625 for(myflag = 2; myflag > 0; myflag--) {
@@ -2878,7 +2633,8 @@ static void __devinit SiS_Sense30x(struct sis_video_info *ivideo)
2878} 2633}
2879 2634
2880/* Determine and detect attached TV's on Chrontel */ 2635/* Determine and detect attached TV's on Chrontel */
2881static void __devinit SiS_SenseCh(struct sis_video_info *ivideo) 2636static void __devinit
2637SiS_SenseCh(struct sis_video_info *ivideo)
2882{ 2638{
2883#if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315) 2639#if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
2884 u8 temp1, temp2; 2640 u8 temp1, temp2;
@@ -2899,7 +2655,7 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
2899 /* See Chrontel TB31 for explanation */ 2655 /* See Chrontel TB31 for explanation */
2900 temp2 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0e); 2656 temp2 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0e);
2901 if(((temp2 & 0x07) == 0x01) || (temp2 & 0x04)) { 2657 if(((temp2 & 0x07) == 0x01) || (temp2 & 0x04)) {
2902 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0b0e); 2658 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0e, 0x0b);
2903 SiS_DDC2Delay(&ivideo->SiS_Pr, 300); 2659 SiS_DDC2Delay(&ivideo->SiS_Pr, 300);
2904 } 2660 }
2905 temp2 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x25); 2661 temp2 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x25);
@@ -2909,15 +2665,15 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
2909 /* Read power status */ 2665 /* Read power status */
2910 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0e); 2666 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0e);
2911 if((temp1 & 0x03) != 0x03) { 2667 if((temp1 & 0x03) != 0x03) {
2912 /* Power all outputs */ 2668 /* Power all outputs */
2913 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0B0E); 2669 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0e,0x0b);
2914 SiS_DDC2Delay(&ivideo->SiS_Pr, 300); 2670 SiS_DDC2Delay(&ivideo->SiS_Pr, 300);
2915 } 2671 }
2916 /* Sense connected TV devices */ 2672 /* Sense connected TV devices */
2917 for(i = 0; i < 3; i++) { 2673 for(i = 0; i < 3; i++) {
2918 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0110); 2674 SiS_SetCH700x(&ivideo->SiS_Pr, 0x10, 0x01);
2919 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96); 2675 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2920 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0010); 2676 SiS_SetCH700x(&ivideo->SiS_Pr, 0x10, 0x00);
2921 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96); 2677 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2922 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x10); 2678 temp1 = SiS_GetCH700x(&ivideo->SiS_Pr, 0x10);
2923 if(!(temp1 & 0x08)) test[i] = 0x02; 2679 if(!(temp1 & 0x08)) test[i] = 0x02;
@@ -2930,7 +2686,7 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
2930 else if(test[0] == test[2]) temp1 = test[0]; 2686 else if(test[0] == test[2]) temp1 = test[0];
2931 else if(test[1] == test[2]) temp1 = test[1]; 2687 else if(test[1] == test[2]) temp1 = test[1];
2932 else { 2688 else {
2933 printk(KERN_INFO 2689 printk(KERN_INFO
2934 "sisfb: TV detection unreliable - test results varied\n"); 2690 "sisfb: TV detection unreliable - test results varied\n");
2935 temp1 = test[2]; 2691 temp1 = test[2];
2936 } 2692 }
@@ -2945,11 +2701,11 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
2945 orSISIDXREG(SISCR, 0x32, 0x01); 2701 orSISIDXREG(SISCR, 0x32, 0x01);
2946 andSISIDXREG(SISCR, 0x32, ~0x06); 2702 andSISIDXREG(SISCR, 0x32, ~0x06);
2947 } else { 2703 } else {
2948 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x010E,0xF8); 2704 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x0e, 0x01, 0xF8);
2949 andSISIDXREG(SISCR, 0x32, ~0x07); 2705 andSISIDXREG(SISCR, 0x32, ~0x07);
2950 } 2706 }
2951 } else if(temp1 == 0) { 2707 } else if(temp1 == 0) {
2952 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x010E,0xF8); 2708 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x0e, 0x01, 0xF8);
2953 andSISIDXREG(SISCR, 0x32, ~0x07); 2709 andSISIDXREG(SISCR, 0x32, ~0x07);
2954 } 2710 }
2955 /* Set general purpose IO for Chrontel communication */ 2711 /* Set general purpose IO for Chrontel communication */
@@ -2960,19 +2716,19 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
2960 2716
2961#ifdef CONFIG_FB_SIS_315 2717#ifdef CONFIG_FB_SIS_315
2962 ivideo->SiS_Pr.SiS_IF_DEF_CH70xx = 2; /* Chrontel 7019 */ 2718 ivideo->SiS_Pr.SiS_IF_DEF_CH70xx = 2; /* Chrontel 7019 */
2963 temp1 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x49); 2719 temp1 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x49);
2964 SiS_SetCH701x(&ivideo->SiS_Pr, 0x2049); 2720 SiS_SetCH701x(&ivideo->SiS_Pr, 0x49, 0x20);
2965 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96); 2721 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2966 temp2 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x20); 2722 temp2 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x20);
2967 temp2 |= 0x01; 2723 temp2 |= 0x01;
2968 SiS_SetCH701x(&ivideo->SiS_Pr, (temp2 << 8) | 0x20); 2724 SiS_SetCH701x(&ivideo->SiS_Pr, 0x20, temp2);
2969 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96); 2725 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2970 temp2 ^= 0x01; 2726 temp2 ^= 0x01;
2971 SiS_SetCH701x(&ivideo->SiS_Pr, (temp2 << 8) | 0x20); 2727 SiS_SetCH701x(&ivideo->SiS_Pr, 0x20, temp2);
2972 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96); 2728 SiS_DDC2Delay(&ivideo->SiS_Pr, 0x96);
2973 temp2 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x20); 2729 temp2 = SiS_GetCH701x(&ivideo->SiS_Pr, 0x20);
2974 SiS_SetCH701x(&ivideo->SiS_Pr, (temp1 << 8) | 0x49); 2730 SiS_SetCH701x(&ivideo->SiS_Pr, 0x49, temp1);
2975 temp1 = 0; 2731 temp1 = 0;
2976 if(temp2 & 0x02) temp1 |= 0x01; 2732 if(temp2 & 0x02) temp1 |= 0x01;
2977 if(temp2 & 0x10) temp1 |= 0x01; 2733 if(temp2 & 0x10) temp1 |= 0x01;
2978 if(temp2 & 0x04) temp1 |= 0x02; 2734 if(temp2 & 0x04) temp1 |= 0x02;
@@ -2983,18 +2739,18 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
2983 ivideo->vbflags |= TV_AVIDEO; 2739 ivideo->vbflags |= TV_AVIDEO;
2984 orSISIDXREG(SISCR, 0x32, 0x01); 2740 orSISIDXREG(SISCR, 0x32, 0x01);
2985 andSISIDXREG(SISCR, 0x32, ~0x06); 2741 andSISIDXREG(SISCR, 0x32, ~0x06);
2986 break; 2742 break;
2987 case 0x02: 2743 case 0x02:
2988 printk(KERN_INFO "%s SVIDEO output\n", stdstr); 2744 printk(KERN_INFO "%s SVIDEO output\n", stdstr);
2989 ivideo->vbflags |= TV_SVIDEO; 2745 ivideo->vbflags |= TV_SVIDEO;
2990 orSISIDXREG(SISCR, 0x32, 0x02); 2746 orSISIDXREG(SISCR, 0x32, 0x02);
2991 andSISIDXREG(SISCR, 0x32, ~0x05); 2747 andSISIDXREG(SISCR, 0x32, ~0x05);
2992 break; 2748 break;
2993 case 0x04: 2749 case 0x04:
2994 printk(KERN_INFO "%s SCART output\n", stdstr); 2750 printk(KERN_INFO "%s SCART output\n", stdstr);
2995 orSISIDXREG(SISCR, 0x32, 0x04); 2751 orSISIDXREG(SISCR, 0x32, 0x04);
2996 andSISIDXREG(SISCR, 0x32, ~0x03); 2752 andSISIDXREG(SISCR, 0x32, ~0x03);
2997 break; 2753 break;
2998 default: 2754 default:
2999 andSISIDXREG(SISCR, 0x32, ~0x07); 2755 andSISIDXREG(SISCR, 0x32, ~0x07);
3000 } 2756 }
@@ -3002,165 +2758,589 @@ static void __devinit SiS_SenseCh(struct sis_video_info *ivideo)
3002 } 2758 }
3003} 2759}
3004 2760
3005/* ------------------------ Heap routines -------------------------- */ 2761static void __devinit
3006 2762sisfb_get_VB_type(struct sis_video_info *ivideo)
3007static u32 __devinit
3008sisfb_getheapstart(struct sis_video_info *ivideo)
3009{ 2763{
3010 u32 ret = ivideo->sisfb_parm_mem * 1024; 2764 char stdstr[] = "sisfb: Detected";
3011 u32 max = ivideo->video_size - ivideo->hwcursor_size; 2765 char bridgestr[] = "video bridge";
3012 u32 def; 2766 u8 vb_chipid;
2767 u8 reg;
3013 2768
3014 /* Calculate heap start = end of memory for console 2769 /* No CRT2 on XGI Z7 */
3015 * 2770 if(ivideo->chip == XGI_20)
3016 * CCCCCCCCDDDDDDDDDDDDDDDDDDDDDDDDDDDDHHHHQQQQQQQQQQ 2771 return;
3017 * C = console, D = heap, H = HWCursor, Q = cmd-queue
3018 *
3019 * Basically given by "mem" parameter
3020 *
3021 * maximum = videosize - cmd_queue - hwcursor
3022 * (results in a heap of size 0)
3023 * default = SiS 300: depends on videosize
3024 * SiS 315/330: 32k below max
3025 */
3026 2772
3027 if(ivideo->sisvga_engine == SIS_300_VGA) { 2773 inSISIDXREG(SISPART4, 0x00, vb_chipid);
3028 max -= TURBO_QUEUE_AREA_SIZE; 2774 switch(vb_chipid) {
3029 if(ivideo->video_size > 0x1000000) { 2775 case 0x01:
3030 def = 0xc00000; 2776 inSISIDXREG(SISPART4, 0x01, reg);
3031 } else if(ivideo->video_size > 0x800000) { 2777 if(reg < 0xb0) {
3032 def = 0x800000; 2778 ivideo->vbflags |= VB_301; /* Deprecated */
3033 } else { 2779 ivideo->vbflags2 |= VB2_301;
3034 def = 0x400000; 2780 printk(KERN_INFO "%s SiS301 %s\n", stdstr, bridgestr);
3035 } 2781 } else if(reg < 0xc0) {
3036 } else { 2782 ivideo->vbflags |= VB_301B; /* Deprecated */
3037 max -= COMMAND_QUEUE_AREA_SIZE; 2783 ivideo->vbflags2 |= VB2_301B;
3038 def = max - 0x8000; 2784 inSISIDXREG(SISPART4,0x23,reg);
2785 if(!(reg & 0x02)) {
2786 ivideo->vbflags |= VB_30xBDH; /* Deprecated */
2787 ivideo->vbflags2 |= VB2_30xBDH;
2788 printk(KERN_INFO "%s SiS301B-DH %s\n", stdstr, bridgestr);
2789 } else {
2790 printk(KERN_INFO "%s SiS301B %s\n", stdstr, bridgestr);
2791 }
2792 } else if(reg < 0xd0) {
2793 ivideo->vbflags |= VB_301C; /* Deprecated */
2794 ivideo->vbflags2 |= VB2_301C;
2795 printk(KERN_INFO "%s SiS301C %s\n", stdstr, bridgestr);
2796 } else if(reg < 0xe0) {
2797 ivideo->vbflags |= VB_301LV; /* Deprecated */
2798 ivideo->vbflags2 |= VB2_301LV;
2799 printk(KERN_INFO "%s SiS301LV %s\n", stdstr, bridgestr);
2800 } else if(reg <= 0xe1) {
2801 inSISIDXREG(SISPART4,0x39,reg);
2802 if(reg == 0xff) {
2803 ivideo->vbflags |= VB_302LV; /* Deprecated */
2804 ivideo->vbflags2 |= VB2_302LV;
2805 printk(KERN_INFO "%s SiS302LV %s\n", stdstr, bridgestr);
2806 } else {
2807 ivideo->vbflags |= VB_301C; /* Deprecated */
2808 ivideo->vbflags2 |= VB2_301C;
2809 printk(KERN_INFO "%s SiS301C(P4) %s\n", stdstr, bridgestr);
2810#if 0
2811 ivideo->vbflags |= VB_302ELV; /* Deprecated */
2812 ivideo->vbflags2 |= VB2_302ELV;
2813 printk(KERN_INFO "%s SiS302ELV %s\n", stdstr, bridgestr);
2814#endif
2815 }
2816 }
2817 break;
2818 case 0x02:
2819 ivideo->vbflags |= VB_302B; /* Deprecated */
2820 ivideo->vbflags2 |= VB2_302B;
2821 printk(KERN_INFO "%s SiS302B %s\n", stdstr, bridgestr);
2822 break;
3039 } 2823 }
3040 2824
3041 if((!ret) || (ret > max) || (ivideo->cardnumber != 0)) { 2825 if((!(ivideo->vbflags2 & VB2_VIDEOBRIDGE)) && (ivideo->chip != SIS_300)) {
3042 ret = def; 2826 inSISIDXREG(SISCR, 0x37, reg);
3043 } 2827 reg &= SIS_EXTERNAL_CHIP_MASK;
2828 reg >>= 1;
2829 if(ivideo->sisvga_engine == SIS_300_VGA) {
2830#ifdef CONFIG_FB_SIS_300
2831 switch(reg) {
2832 case SIS_EXTERNAL_CHIP_LVDS:
2833 ivideo->vbflags |= VB_LVDS; /* Deprecated */
2834 ivideo->vbflags2 |= VB2_LVDS;
2835 break;
2836 case SIS_EXTERNAL_CHIP_TRUMPION:
2837 ivideo->vbflags |= (VB_LVDS | VB_TRUMPION); /* Deprecated */
2838 ivideo->vbflags2 |= (VB2_LVDS | VB2_TRUMPION);
2839 break;
2840 case SIS_EXTERNAL_CHIP_CHRONTEL:
2841 ivideo->vbflags |= VB_CHRONTEL; /* Deprecated */
2842 ivideo->vbflags2 |= VB2_CHRONTEL;
2843 break;
2844 case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
2845 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL); /* Deprecated */
2846 ivideo->vbflags2 |= (VB2_LVDS | VB2_CHRONTEL);
2847 break;
2848 }
2849 if(ivideo->vbflags2 & VB2_CHRONTEL) ivideo->chronteltype = 1;
2850#endif
2851 } else if(ivideo->chip < SIS_661) {
2852#ifdef CONFIG_FB_SIS_315
2853 switch (reg) {
2854 case SIS310_EXTERNAL_CHIP_LVDS:
2855 ivideo->vbflags |= VB_LVDS; /* Deprecated */
2856 ivideo->vbflags2 |= VB2_LVDS;
2857 break;
2858 case SIS310_EXTERNAL_CHIP_LVDS_CHRONTEL:
2859 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL); /* Deprecated */
2860 ivideo->vbflags2 |= (VB2_LVDS | VB2_CHRONTEL);
2861 break;
2862 }
2863 if(ivideo->vbflags2 & VB2_CHRONTEL) ivideo->chronteltype = 2;
2864#endif
2865 } else if(ivideo->chip >= SIS_661) {
2866#ifdef CONFIG_FB_SIS_315
2867 inSISIDXREG(SISCR, 0x38, reg);
2868 reg >>= 5;
2869 switch(reg) {
2870 case 0x02:
2871 ivideo->vbflags |= VB_LVDS; /* Deprecated */
2872 ivideo->vbflags2 |= VB2_LVDS;
2873 break;
2874 case 0x03:
2875 ivideo->vbflags |= (VB_LVDS | VB_CHRONTEL); /* Deprecated */
2876 ivideo->vbflags2 |= (VB2_LVDS | VB2_CHRONTEL);
2877 break;
2878 case 0x04:
2879 ivideo->vbflags |= (VB_LVDS | VB_CONEXANT); /* Deprecated */
2880 ivideo->vbflags2 |= (VB2_LVDS | VB2_CONEXANT);
2881 break;
2882 }
2883 if(ivideo->vbflags2 & VB2_CHRONTEL) ivideo->chronteltype = 2;
2884#endif
2885 }
2886 if(ivideo->vbflags2 & VB2_LVDS) {
2887 printk(KERN_INFO "%s LVDS transmitter\n", stdstr);
2888 }
2889 if((ivideo->sisvga_engine == SIS_300_VGA) && (ivideo->vbflags2 & VB2_TRUMPION)) {
2890 printk(KERN_INFO "%s Trumpion Zurac LCD scaler\n", stdstr);
2891 }
2892 if(ivideo->vbflags2 & VB2_CHRONTEL) {
2893 printk(KERN_INFO "%s Chrontel TV encoder\n", stdstr);
2894 }
2895 if((ivideo->chip >= SIS_661) && (ivideo->vbflags2 & VB2_CONEXANT)) {
2896 printk(KERN_INFO "%s Conexant external device\n", stdstr);
2897 }
2898 }
3044 2899
3045 return ret; 2900 if(ivideo->vbflags2 & VB2_SISBRIDGE) {
2901 SiS_SenseLCD(ivideo);
2902 SiS_Sense30x(ivideo);
2903 } else if(ivideo->vbflags2 & VB2_CHRONTEL) {
2904 SiS_SenseCh(ivideo);
2905 }
3046} 2906}
3047 2907
3048static int __devinit 2908/* ---------- Engine initialization routines ------------ */
3049sisfb_heap_init(struct sis_video_info *ivideo) 2909
2910static void
2911sisfb_engine_init(struct sis_video_info *ivideo)
3050{ 2912{
3051 SIS_OH *poh;
3052 2913
3053 ivideo->heapstart = ivideo->sisfb_mem = sisfb_getheapstart(ivideo); 2914 /* Initialize command queue (we use MMIO only) */
3054 2915
3055 ivideo->sisfb_heap_start = ivideo->video_vbase + ivideo->heapstart; 2916 /* BEFORE THIS IS CALLED, THE ENGINES *MUST* BE SYNC'ED */
3056 ivideo->sisfb_heap_end = ivideo->video_vbase + ivideo->video_size;
3057 2917
3058 /* Initialize command queue (We use MMIO only) */ 2918 ivideo->caps &= ~(TURBO_QUEUE_CAP |
2919 MMIO_CMD_QUEUE_CAP |
2920 VM_CMD_QUEUE_CAP |
2921 AGP_CMD_QUEUE_CAP);
2922
2923#ifdef CONFIG_FB_SIS_300
2924 if(ivideo->sisvga_engine == SIS_300_VGA) {
2925 u32 tqueue_pos;
2926 u8 tq_state;
2927
2928 tqueue_pos = (ivideo->video_size - ivideo->cmdQueueSize) / (64 * 1024);
2929
2930 inSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state);
2931 tq_state |= 0xf0;
2932 tq_state &= 0xfc;
2933 tq_state |= (u8)(tqueue_pos >> 8);
2934 outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state);
2935
2936 outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_ADR, (u8)(tqueue_pos & 0xff));
2937
2938 ivideo->caps |= TURBO_QUEUE_CAP;
2939 }
2940#endif
3059 2941
3060#ifdef CONFIG_FB_SIS_315 2942#ifdef CONFIG_FB_SIS_315
3061 if(ivideo->sisvga_engine == SIS_315_VGA) { 2943 if(ivideo->sisvga_engine == SIS_315_VGA) {
3062 u32 tempq = 0; 2944 u32 tempq = 0, templ;
3063 u8 temp = 0; 2945 u8 temp;
2946
2947 if(ivideo->chip == XGI_20) {
2948 switch(ivideo->cmdQueueSize) {
2949 case (64 * 1024):
2950 temp = SIS_CMD_QUEUE_SIZE_Z7_64k;
2951 break;
2952 case (128 * 1024):
2953 default:
2954 temp = SIS_CMD_QUEUE_SIZE_Z7_128k;
2955 }
2956 } else {
2957 switch(ivideo->cmdQueueSize) {
2958 case (4 * 1024 * 1024):
2959 temp = SIS_CMD_QUEUE_SIZE_4M;
2960 break;
2961 case (2 * 1024 * 1024):
2962 temp = SIS_CMD_QUEUE_SIZE_2M;
2963 break;
2964 case (1 * 1024 * 1024):
2965 temp = SIS_CMD_QUEUE_SIZE_1M;
2966 break;
2967 default:
2968 case (512 * 1024):
2969 temp = SIS_CMD_QUEUE_SIZE_512k;
2970 }
2971 }
2972
2973 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_THRESHOLD, COMMAND_QUEUE_THRESHOLD);
2974 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
2975
2976 if((ivideo->chip >= XGI_40) && ivideo->modechanged) {
2977 /* Must disable dual pipe on XGI_40. Can't do
2978 * this in MMIO mode, because it requires
2979 * setting/clearing a bit in the MMIO fire trigger
2980 * register.
2981 */
2982 if(!((templ = MMIO_IN32(ivideo->mmio_vbase, 0x8240)) & (1 << 10))) {
2983
2984 MMIO_OUT32(ivideo->mmio_vbase, Q_WRITE_PTR, 0);
2985
2986 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, (temp | SIS_VRAM_CMDQUEUE_ENABLE));
2987
2988 tempq = MMIO_IN32(ivideo->mmio_vbase, Q_READ_PTR);
2989 MMIO_OUT32(ivideo->mmio_vbase, Q_WRITE_PTR, tempq);
2990
2991 tempq = (u32)(ivideo->video_size - ivideo->cmdQueueSize);
2992 MMIO_OUT32(ivideo->mmio_vbase, Q_BASE_ADDR, tempq);
2993
2994 writel(0x16800000 + 0x8240, ivideo->video_vbase + tempq);
2995 writel(templ | (1 << 10), ivideo->video_vbase + tempq + 4);
2996 writel(0x168F0000, ivideo->video_vbase + tempq + 8);
2997 writel(0x168F0000, ivideo->video_vbase + tempq + 12);
2998
2999 MMIO_OUT32(ivideo->mmio_vbase, Q_WRITE_PTR, (tempq + 16));
3000
3001 sisfb_syncaccel(ivideo);
3002
3003 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET);
3004
3005 }
3006 }
3007
3008 tempq = MMIO_IN32(ivideo->mmio_vbase, MMIO_QUEUE_READPORT);
3009 MMIO_OUT32(ivideo->mmio_vbase, MMIO_QUEUE_WRITEPORT, tempq);
3010
3011 temp |= (SIS_MMIO_CMD_ENABLE | SIS_CMD_AUTO_CORR);
3012 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, temp);
3013
3014 tempq = (u32)(ivideo->video_size - ivideo->cmdQueueSize);
3015 MMIO_OUT32(ivideo->mmio_vbase, MMIO_QUEUE_PHYBASE, tempq);
3064 3016
3065 ivideo->sisfb_heap_end -= COMMAND_QUEUE_AREA_SIZE; 3017 ivideo->caps |= MMIO_CMD_QUEUE_CAP;
3018 }
3019#endif
3066 3020
3067 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_THRESHOLD, COMMAND_QUEUE_THRESHOLD); 3021 ivideo->engineok = 1;
3068 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, SIS_CMD_QUEUE_RESET); 3022}
3069 3023
3070 tempq = MMIO_IN32(ivideo->mmio_vbase, MMIO_QUEUE_READPORT); 3024static void __devinit
3071 MMIO_OUT32(ivideo->mmio_vbase, MMIO_QUEUE_WRITEPORT, tempq); 3025sisfb_detect_lcd_type(struct sis_video_info *ivideo)
3026{
3027 u8 reg;
3028 int i;
3072 3029
3073 temp = SIS_CMD_QUEUE_SIZE_512k; 3030 inSISIDXREG(SISCR, 0x36, reg);
3074 temp |= (SIS_MMIO_CMD_ENABLE | SIS_CMD_AUTO_CORR); 3031 reg &= 0x0f;
3075 outSISIDXREG(SISSR, IND_SIS_CMDQUEUE_SET, temp); 3032 if(ivideo->sisvga_engine == SIS_300_VGA) {
3033 ivideo->CRT2LCDType = sis300paneltype[reg];
3034 } else if(ivideo->chip >= SIS_661) {
3035 ivideo->CRT2LCDType = sis661paneltype[reg];
3036 } else {
3037 ivideo->CRT2LCDType = sis310paneltype[reg];
3038 if((ivideo->chip == SIS_550) && (sisfb_fstn)) {
3039 if((ivideo->CRT2LCDType != LCD_320x240_2) &&
3040 (ivideo->CRT2LCDType != LCD_320x240_3)) {
3041 ivideo->CRT2LCDType = LCD_320x240;
3042 }
3043 }
3044 }
3076 3045
3077 tempq = (u32)(ivideo->video_size - COMMAND_QUEUE_AREA_SIZE); 3046 if(ivideo->CRT2LCDType == LCD_UNKNOWN) {
3078 MMIO_OUT32(ivideo->mmio_vbase, MMIO_QUEUE_PHYBASE, tempq); 3047 /* For broken BIOSes: Assume 1024x768, RGB18 */
3048 ivideo->CRT2LCDType = LCD_1024x768;
3049 setSISIDXREG(SISCR,0x36,0xf0,0x02);
3050 setSISIDXREG(SISCR,0x37,0xee,0x01);
3051 printk(KERN_DEBUG "sisfb: Invalid panel ID (%02x), assuming 1024x768, RGB18\n", reg);
3052 }
3079 3053
3080 ivideo->caps |= MMIO_CMD_QUEUE_CAP; 3054 for(i = 0; i < SIS_LCD_NUMBER; i++) {
3081 } 3055 if(ivideo->CRT2LCDType == sis_lcd_data[i].lcdtype) {
3056 ivideo->lcdxres = sis_lcd_data[i].xres;
3057 ivideo->lcdyres = sis_lcd_data[i].yres;
3058 ivideo->lcddefmodeidx = sis_lcd_data[i].default_mode_idx;
3059 break;
3060 }
3061 }
3062
3063#ifdef CONFIG_FB_SIS_300
3064 if(ivideo->SiS_Pr.SiS_CustomT == CUT_BARCO1366) {
3065 ivideo->lcdxres = 1360; ivideo->lcdyres = 1024;
3066 ivideo->lcddefmodeidx = DEFAULT_MODE_1360;
3067 } else if(ivideo->SiS_Pr.SiS_CustomT == CUT_PANEL848) {
3068 ivideo->lcdxres = 848; ivideo->lcdyres = 480;
3069 ivideo->lcddefmodeidx = DEFAULT_MODE_848;
3070 } else if(ivideo->SiS_Pr.SiS_CustomT == CUT_PANEL856) {
3071 ivideo->lcdxres = 856; ivideo->lcdyres = 480;
3072 ivideo->lcddefmodeidx = DEFAULT_MODE_856;
3073 }
3082#endif 3074#endif
3083 3075
3076 printk(KERN_DEBUG "sisfb: Detected %dx%d flat panel\n",
3077 ivideo->lcdxres, ivideo->lcdyres);
3078}
3079
3080static void __devinit
3081sisfb_save_pdc_emi(struct sis_video_info *ivideo)
3082{
3084#ifdef CONFIG_FB_SIS_300 3083#ifdef CONFIG_FB_SIS_300
3085 if(ivideo->sisvga_engine == SIS_300_VGA) { 3084 /* Save the current PanelDelayCompensation if the LCD is currently used */
3086 unsigned long tqueue_pos; 3085 if(ivideo->sisvga_engine == SIS_300_VGA) {
3087 u8 tq_state; 3086 if(ivideo->vbflags2 & (VB2_LVDS | VB2_30xBDH)) {
3087 int tmp;
3088 inSISIDXREG(SISCR,0x30,tmp);
3089 if(tmp & 0x20) {
3090 /* Currently on LCD? If yes, read current pdc */
3091 inSISIDXREG(SISPART1,0x13,ivideo->detectedpdc);
3092 ivideo->detectedpdc &= 0x3c;
3093 if(ivideo->SiS_Pr.PDC == -1) {
3094 /* Let option override detection */
3095 ivideo->SiS_Pr.PDC = ivideo->detectedpdc;
3096 }
3097 printk(KERN_INFO "sisfb: Detected LCD PDC 0x%02x\n",
3098 ivideo->detectedpdc);
3099 }
3100 if((ivideo->SiS_Pr.PDC != -1) &&
3101 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) {
3102 printk(KERN_INFO "sisfb: Using LCD PDC 0x%02x\n",
3103 ivideo->SiS_Pr.PDC);
3104 }
3105 }
3106 }
3107#endif
3088 3108
3089 ivideo->sisfb_heap_end -= TURBO_QUEUE_AREA_SIZE; 3109#ifdef CONFIG_FB_SIS_315
3110 if(ivideo->sisvga_engine == SIS_315_VGA) {
3090 3111
3091 tqueue_pos = (ivideo->video_size - TURBO_QUEUE_AREA_SIZE) / (64 * 1024); 3112 /* Try to find about LCDA */
3113 if(ivideo->vbflags2 & VB2_SISLCDABRIDGE) {
3114 int tmp;
3115 inSISIDXREG(SISPART1,0x13,tmp);
3116 if(tmp & 0x04) {
3117 ivideo->SiS_Pr.SiS_UseLCDA = TRUE;
3118 ivideo->detectedlcda = 0x03;
3119 }
3120 }
3092 3121
3093 inSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state); 3122 /* Save PDC */
3094 tq_state |= 0xf0; 3123 if(ivideo->vbflags2 & VB2_SISLVDSBRIDGE) {
3095 tq_state &= 0xfc; 3124 int tmp;
3096 tq_state |= (u8)(tqueue_pos >> 8); 3125 inSISIDXREG(SISCR,0x30,tmp);
3097 outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_SET, tq_state); 3126 if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) {
3127 /* Currently on LCD? If yes, read current pdc */
3128 u8 pdc;
3129 inSISIDXREG(SISPART1,0x2D,pdc);
3130 ivideo->detectedpdc = (pdc & 0x0f) << 1;
3131 ivideo->detectedpdca = (pdc & 0xf0) >> 3;
3132 inSISIDXREG(SISPART1,0x35,pdc);
3133 ivideo->detectedpdc |= ((pdc >> 7) & 0x01);
3134 inSISIDXREG(SISPART1,0x20,pdc);
3135 ivideo->detectedpdca |= ((pdc >> 6) & 0x01);
3136 if(ivideo->newrom) {
3137 /* New ROM invalidates other PDC resp. */
3138 if(ivideo->detectedlcda != 0xff) {
3139 ivideo->detectedpdc = 0xff;
3140 } else {
3141 ivideo->detectedpdca = 0xff;
3142 }
3143 }
3144 if(ivideo->SiS_Pr.PDC == -1) {
3145 if(ivideo->detectedpdc != 0xff) {
3146 ivideo->SiS_Pr.PDC = ivideo->detectedpdc;
3147 }
3148 }
3149 if(ivideo->SiS_Pr.PDCA == -1) {
3150 if(ivideo->detectedpdca != 0xff) {
3151 ivideo->SiS_Pr.PDCA = ivideo->detectedpdca;
3152 }
3153 }
3154 if(ivideo->detectedpdc != 0xff) {
3155 printk(KERN_INFO
3156 "sisfb: Detected LCD PDC 0x%02x (for LCD=CRT2)\n",
3157 ivideo->detectedpdc);
3158 }
3159 if(ivideo->detectedpdca != 0xff) {
3160 printk(KERN_INFO
3161 "sisfb: Detected LCD PDC1 0x%02x (for LCD=CRT1)\n",
3162 ivideo->detectedpdca);
3163 }
3164 }
3098 3165
3099 outSISIDXREG(SISSR, IND_SIS_TURBOQUEUE_ADR, (u8)(tqueue_pos & 0xff)); 3166 /* Save EMI */
3167 if(ivideo->vbflags2 & VB2_SISEMIBRIDGE) {
3168 inSISIDXREG(SISPART4,0x30,ivideo->SiS_Pr.EMI_30);
3169 inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31);
3170 inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32);
3171 inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33);
3172 ivideo->SiS_Pr.HaveEMI = TRUE;
3173 if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) {
3174 ivideo->SiS_Pr.HaveEMILCD = TRUE;
3175 }
3176 }
3177 }
3100 3178
3101 ivideo->caps |= TURBO_QUEUE_CAP; 3179 /* Let user override detected PDCs (all bridges) */
3102 } 3180 if(ivideo->vbflags2 & VB2_30xBLV) {
3181 if((ivideo->SiS_Pr.PDC != -1) &&
3182 (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) {
3183 printk(KERN_INFO "sisfb: Using LCD PDC 0x%02x (for LCD=CRT2)\n",
3184 ivideo->SiS_Pr.PDC);
3185 }
3186 if((ivideo->SiS_Pr.PDCA != -1) &&
3187 (ivideo->SiS_Pr.PDCA != ivideo->detectedpdca)) {
3188 printk(KERN_INFO "sisfb: Using LCD PDC1 0x%02x (for LCD=CRT1)\n",
3189 ivideo->SiS_Pr.PDCA);
3190 }
3191 }
3192
3193 }
3103#endif 3194#endif
3195}
3104 3196
3105 /* Reserve memory for the HWCursor */ 3197/* -------------------- Memory manager routines ---------------------- */
3106 ivideo->sisfb_heap_end -= ivideo->hwcursor_size;
3107 ivideo->hwcursor_vbase = ivideo->sisfb_heap_end;
3108 ivideo->caps |= HW_CURSOR_CAP;
3109 3198
3110 ivideo->sisfb_heap_size = ivideo->sisfb_heap_end - ivideo->sisfb_heap_start; 3199static u32 __devinit
3200sisfb_getheapstart(struct sis_video_info *ivideo)
3201{
3202 u32 ret = ivideo->sisfb_parm_mem * 1024;
3203 u32 maxoffs = ivideo->video_size - ivideo->hwcursor_size - ivideo->cmdQueueSize;
3204 u32 def;
3111 3205
3112 if(ivideo->cardnumber == 0) { 3206 /* Calculate heap start = end of memory for console
3207 *
3208 * CCCCCCCCDDDDDDDDDDDDDDDDDDDDDDDDDDDDHHHHQQQQQQQQQQ
3209 * C = console, D = heap, H = HWCursor, Q = cmd-queue
3210 *
3211 * On 76x in UMA+LFB mode, the layout is as follows:
3212 * DDDDDDDDDDDCCCCCCCCCCCCCCCCCCCCCCCCHHHHQQQQQQQQQQQ
3213 * where the heap is the entire UMA area, eventually
3214 * into the LFB area if the given mem parameter is
3215 * higher than the size of the UMA memory.
3216 *
3217 * Basically given by "mem" parameter
3218 *
3219 * maximum = videosize - cmd_queue - hwcursor
3220 * (results in a heap of size 0)
3221 * default = SiS 300: depends on videosize
3222 * SiS 315/330/340/XGI: 32k below max
3223 */
3113 3224
3114 printk(KERN_INFO "sisfb: Memory heap starting at %dK, size %dK\n", 3225 if(ivideo->sisvga_engine == SIS_300_VGA) {
3115 (int)(ivideo->heapstart / 1024), (int)(ivideo->sisfb_heap_size / 1024)); 3226 if(ivideo->video_size > 0x1000000) {
3227 def = 0xc00000;
3228 } else if(ivideo->video_size > 0x800000) {
3229 def = 0x800000;
3230 } else {
3231 def = 0x400000;
3232 }
3233 } else if(ivideo->UMAsize && ivideo->LFBsize) {
3234 ret = def = 0;
3235 } else {
3236 def = maxoffs - 0x8000;
3237 }
3116 3238
3117 sisfb_heap.vinfo = ivideo; 3239 /* Use default for secondary card for now (FIXME) */
3240 if((!ret) || (ret > maxoffs) || (ivideo->cardnumber != 0))
3241 ret = def;
3118 3242
3119 sisfb_heap.poha_chain = NULL; 3243 return ret;
3120 sisfb_heap.poh_freelist = NULL; 3244}
3121 3245
3122 poh = sisfb_poh_new_node(); 3246static u32 __devinit
3123 if(poh == NULL) return 1; 3247sisfb_getheapsize(struct sis_video_info *ivideo)
3248{
3249 u32 max = ivideo->video_size - ivideo->hwcursor_size - ivideo->cmdQueueSize;
3250 u32 ret = 0;
3251
3252 if(ivideo->UMAsize && ivideo->LFBsize) {
3253 if( (!ivideo->sisfb_parm_mem) ||
3254 ((ivideo->sisfb_parm_mem * 1024) > max) ||
3255 ((max - (ivideo->sisfb_parm_mem * 1024)) < ivideo->UMAsize) ) {
3256 ret = ivideo->UMAsize;
3257 max -= ivideo->UMAsize;
3258 } else {
3259 ret = max - (ivideo->sisfb_parm_mem * 1024);
3260 max = ivideo->sisfb_parm_mem * 1024;
3261 }
3262 ivideo->video_offset = ret;
3263 ivideo->sisfb_mem = max;
3264 } else {
3265 ret = max - ivideo->heapstart;
3266 ivideo->sisfb_mem = ivideo->heapstart;
3267 }
3124 3268
3125 poh->poh_next = &sisfb_heap.oh_free; 3269 return ret;
3126 poh->poh_prev = &sisfb_heap.oh_free; 3270}
3127 poh->size = ivideo->sisfb_heap_size;
3128 poh->offset = ivideo->heapstart;
3129 3271
3130 sisfb_heap.oh_free.poh_next = poh; 3272static int __devinit
3131 sisfb_heap.oh_free.poh_prev = poh; 3273sisfb_heap_init(struct sis_video_info *ivideo)
3132 sisfb_heap.oh_free.size = 0; 3274{
3133 sisfb_heap.max_freesize = poh->size; 3275 struct SIS_OH *poh;
3134 3276
3135 sisfb_heap.oh_used.poh_next = &sisfb_heap.oh_used; 3277 ivideo->video_offset = 0;
3136 sisfb_heap.oh_used.poh_prev = &sisfb_heap.oh_used; 3278 if(ivideo->sisfb_parm_mem) {
3137 sisfb_heap.oh_used.size = SENTINEL; 3279 if( (ivideo->sisfb_parm_mem < (2 * 1024 * 1024)) ||
3280 (ivideo->sisfb_parm_mem > ivideo->video_size) ) {
3281 ivideo->sisfb_parm_mem = 0;
3282 }
3283 }
3138 3284
3139 } else { 3285 ivideo->heapstart = sisfb_getheapstart(ivideo);
3286 ivideo->sisfb_heap_size = sisfb_getheapsize(ivideo);
3140 3287
3141 printk(KERN_INFO "Skipped heap initialization for secondary cards\n"); 3288 ivideo->sisfb_heap_start = ivideo->video_vbase + ivideo->heapstart;
3289 ivideo->sisfb_heap_end = ivideo->sisfb_heap_start + ivideo->sisfb_heap_size;
3142 3290
3143 } 3291 printk(KERN_INFO "sisfb: Memory heap starting at %dK, size %dK\n",
3292 (int)(ivideo->heapstart / 1024), (int)(ivideo->sisfb_heap_size / 1024));
3144 3293
3145 return 0; 3294 ivideo->sisfb_heap.vinfo = ivideo;
3295
3296 ivideo->sisfb_heap.poha_chain = NULL;
3297 ivideo->sisfb_heap.poh_freelist = NULL;
3298
3299 poh = sisfb_poh_new_node(&ivideo->sisfb_heap);
3300 if(poh == NULL)
3301 return 1;
3302
3303 poh->poh_next = &ivideo->sisfb_heap.oh_free;
3304 poh->poh_prev = &ivideo->sisfb_heap.oh_free;
3305 poh->size = ivideo->sisfb_heap_size;
3306 poh->offset = ivideo->heapstart;
3307
3308 ivideo->sisfb_heap.oh_free.poh_next = poh;
3309 ivideo->sisfb_heap.oh_free.poh_prev = poh;
3310 ivideo->sisfb_heap.oh_free.size = 0;
3311 ivideo->sisfb_heap.max_freesize = poh->size;
3312
3313 ivideo->sisfb_heap.oh_used.poh_next = &ivideo->sisfb_heap.oh_used;
3314 ivideo->sisfb_heap.oh_used.poh_prev = &ivideo->sisfb_heap.oh_used;
3315 ivideo->sisfb_heap.oh_used.size = SENTINEL;
3316
3317 if(ivideo->cardnumber == 0) {
3318 /* For the first card, make this heap the "global" one
3319 * for old DRM (which could handle only one card)
3320 */
3321 sisfb_heap = &ivideo->sisfb_heap;
3322 }
3323
3324 return 0;
3146} 3325}
3147 3326
3148static SIS_OH * 3327static struct SIS_OH *
3149sisfb_poh_new_node(void) 3328sisfb_poh_new_node(struct SIS_HEAP *memheap)
3150{ 3329{
3151 int i; 3330 struct SIS_OHALLOC *poha;
3152 unsigned long cOhs; 3331 struct SIS_OH *poh;
3153 SIS_OHALLOC *poha; 3332 unsigned long cOhs;
3154 SIS_OH *poh; 3333 int i;
3155 3334
3156 if(sisfb_heap.poh_freelist == NULL) { 3335 if(memheap->poh_freelist == NULL) {
3157 poha = kmalloc(SIS_OH_ALLOC_SIZE, GFP_KERNEL); 3336 poha = kmalloc(SIS_OH_ALLOC_SIZE, GFP_KERNEL);
3158 if(!poha) return NULL; 3337 if(!poha)
3338 return NULL;
3159 3339
3160 poha->poha_next = sisfb_heap.poha_chain; 3340 poha->poha_next = memheap->poha_chain;
3161 sisfb_heap.poha_chain = poha; 3341 memheap->poha_chain = poha;
3162 3342
3163 cOhs = (SIS_OH_ALLOC_SIZE - sizeof(SIS_OHALLOC)) / sizeof(SIS_OH) + 1; 3343 cOhs = (SIS_OH_ALLOC_SIZE - sizeof(struct SIS_OHALLOC)) / sizeof(struct SIS_OH) + 1;
3164 3344
3165 poh = &poha->aoh[0]; 3345 poh = &poha->aoh[0];
3166 for(i = cOhs - 1; i != 0; i--) { 3346 for(i = cOhs - 1; i != 0; i--) {
@@ -3169,32 +3349,32 @@ sisfb_poh_new_node(void)
3169 } 3349 }
3170 3350
3171 poh->poh_next = NULL; 3351 poh->poh_next = NULL;
3172 sisfb_heap.poh_freelist = &poha->aoh[0]; 3352 memheap->poh_freelist = &poha->aoh[0];
3173 } 3353 }
3174 3354
3175 poh = sisfb_heap.poh_freelist; 3355 poh = memheap->poh_freelist;
3176 sisfb_heap.poh_freelist = poh->poh_next; 3356 memheap->poh_freelist = poh->poh_next;
3177 3357
3178 return (poh); 3358 return poh;
3179} 3359}
3180 3360
3181static SIS_OH * 3361static struct SIS_OH *
3182sisfb_poh_allocate(u32 size) 3362sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size)
3183{ 3363{
3184 SIS_OH *pohThis; 3364 struct SIS_OH *pohThis;
3185 SIS_OH *pohRoot; 3365 struct SIS_OH *pohRoot;
3186 int bAllocated = 0; 3366 int bAllocated = 0;
3187 3367
3188 if(size > sisfb_heap.max_freesize) { 3368 if(size > memheap->max_freesize) {
3189 DPRINTK("sisfb: Can't allocate %dk video memory\n", 3369 DPRINTK("sisfb: Can't allocate %dk video memory\n",
3190 (unsigned int) size / 1024); 3370 (unsigned int) size / 1024);
3191 return (NULL); 3371 return NULL;
3192 } 3372 }
3193 3373
3194 pohThis = sisfb_heap.oh_free.poh_next; 3374 pohThis = memheap->oh_free.poh_next;
3195 3375
3196 while(pohThis != &sisfb_heap.oh_free) { 3376 while(pohThis != &memheap->oh_free) {
3197 if (size <= pohThis->size) { 3377 if(size <= pohThis->size) {
3198 bAllocated = 1; 3378 bAllocated = 1;
3199 break; 3379 break;
3200 } 3380 }
@@ -3204,18 +3384,16 @@ sisfb_poh_allocate(u32 size)
3204 if(!bAllocated) { 3384 if(!bAllocated) {
3205 DPRINTK("sisfb: Can't allocate %dk video memory\n", 3385 DPRINTK("sisfb: Can't allocate %dk video memory\n",
3206 (unsigned int) size / 1024); 3386 (unsigned int) size / 1024);
3207 return (NULL); 3387 return NULL;
3208 } 3388 }
3209 3389
3210 if(size == pohThis->size) { 3390 if(size == pohThis->size) {
3211 pohRoot = pohThis; 3391 pohRoot = pohThis;
3212 sisfb_delete_node(pohThis); 3392 sisfb_delete_node(pohThis);
3213 } else { 3393 } else {
3214 pohRoot = sisfb_poh_new_node(); 3394 pohRoot = sisfb_poh_new_node(memheap);
3215 3395 if(pohRoot == NULL)
3216 if(pohRoot == NULL) { 3396 return NULL;
3217 return (NULL);
3218 }
3219 3397
3220 pohRoot->offset = pohThis->offset; 3398 pohRoot->offset = pohThis->offset;
3221 pohRoot->size = size; 3399 pohRoot->size = size;
@@ -3224,33 +3402,25 @@ sisfb_poh_allocate(u32 size)
3224 pohThis->size -= size; 3402 pohThis->size -= size;
3225 } 3403 }
3226 3404
3227 sisfb_heap.max_freesize -= size; 3405 memheap->max_freesize -= size;
3228 3406
3229 pohThis = &sisfb_heap.oh_used; 3407 pohThis = &memheap->oh_used;
3230 sisfb_insert_node(pohThis, pohRoot); 3408 sisfb_insert_node(pohThis, pohRoot);
3231 3409
3232 return (pohRoot); 3410 return pohRoot;
3233} 3411}
3234 3412
3235static void 3413static void
3236sisfb_delete_node(SIS_OH *poh) 3414sisfb_delete_node(struct SIS_OH *poh)
3237{ 3415{
3238 SIS_OH *poh_prev; 3416 poh->poh_prev->poh_next = poh->poh_next;
3239 SIS_OH *poh_next; 3417 poh->poh_next->poh_prev = poh->poh_prev;
3240
3241 poh_prev = poh->poh_prev;
3242 poh_next = poh->poh_next;
3243
3244 poh_prev->poh_next = poh_next;
3245 poh_next->poh_prev = poh_prev;
3246} 3418}
3247 3419
3248static void 3420static void
3249sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh) 3421sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh)
3250{ 3422{
3251 SIS_OH *pohTemp; 3423 struct SIS_OH *pohTemp = pohList->poh_next;
3252
3253 pohTemp = pohList->poh_next;
3254 3424
3255 pohList->poh_next = poh; 3425 pohList->poh_next = poh;
3256 pohTemp->poh_prev = poh; 3426 pohTemp->poh_prev = poh;
@@ -3259,20 +3429,20 @@ sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh)
3259 poh->poh_next = pohTemp; 3429 poh->poh_next = pohTemp;
3260} 3430}
3261 3431
3262static SIS_OH * 3432static struct SIS_OH *
3263sisfb_poh_free(u32 base) 3433sisfb_poh_free(struct SIS_HEAP *memheap, u32 base)
3264{ 3434{
3265 SIS_OH *pohThis; 3435 struct SIS_OH *pohThis;
3266 SIS_OH *poh_freed; 3436 struct SIS_OH *poh_freed;
3267 SIS_OH *poh_prev; 3437 struct SIS_OH *poh_prev;
3268 SIS_OH *poh_next; 3438 struct SIS_OH *poh_next;
3269 u32 ulUpper; 3439 u32 ulUpper;
3270 u32 ulLower; 3440 u32 ulLower;
3271 int foundNode = 0; 3441 int foundNode = 0;
3272 3442
3273 poh_freed = sisfb_heap.oh_used.poh_next; 3443 poh_freed = memheap->oh_used.poh_next;
3274 3444
3275 while(poh_freed != &sisfb_heap.oh_used) { 3445 while(poh_freed != &memheap->oh_used) {
3276 if(poh_freed->offset == base) { 3446 if(poh_freed->offset == base) {
3277 foundNode = 1; 3447 foundNode = 1;
3278 break; 3448 break;
@@ -3281,17 +3451,18 @@ sisfb_poh_free(u32 base)
3281 poh_freed = poh_freed->poh_next; 3451 poh_freed = poh_freed->poh_next;
3282 } 3452 }
3283 3453
3284 if(!foundNode) return(NULL); 3454 if(!foundNode)
3455 return NULL;
3285 3456
3286 sisfb_heap.max_freesize += poh_freed->size; 3457 memheap->max_freesize += poh_freed->size;
3287 3458
3288 poh_prev = poh_next = NULL; 3459 poh_prev = poh_next = NULL;
3289 ulUpper = poh_freed->offset + poh_freed->size; 3460 ulUpper = poh_freed->offset + poh_freed->size;
3290 ulLower = poh_freed->offset; 3461 ulLower = poh_freed->offset;
3291 3462
3292 pohThis = sisfb_heap.oh_free.poh_next; 3463 pohThis = memheap->oh_free.poh_next;
3293 3464
3294 while(pohThis != &sisfb_heap.oh_free) { 3465 while(pohThis != &memheap->oh_free) {
3295 if(pohThis->offset == ulUpper) { 3466 if(pohThis->offset == ulUpper) {
3296 poh_next = pohThis; 3467 poh_next = pohThis;
3297 } else if((pohThis->offset + pohThis->size) == ulLower) { 3468 } else if((pohThis->offset + pohThis->size) == ulLower) {
@@ -3305,70 +3476,88 @@ sisfb_poh_free(u32 base)
3305 if(poh_prev && poh_next) { 3476 if(poh_prev && poh_next) {
3306 poh_prev->size += (poh_freed->size + poh_next->size); 3477 poh_prev->size += (poh_freed->size + poh_next->size);
3307 sisfb_delete_node(poh_next); 3478 sisfb_delete_node(poh_next);
3308 sisfb_free_node(poh_freed); 3479 sisfb_free_node(memheap, poh_freed);
3309 sisfb_free_node(poh_next); 3480 sisfb_free_node(memheap, poh_next);
3310 return(poh_prev); 3481 return poh_prev;
3311 } 3482 }
3312 3483
3313 if(poh_prev) { 3484 if(poh_prev) {
3314 poh_prev->size += poh_freed->size; 3485 poh_prev->size += poh_freed->size;
3315 sisfb_free_node(poh_freed); 3486 sisfb_free_node(memheap, poh_freed);
3316 return(poh_prev); 3487 return poh_prev;
3317 } 3488 }
3318 3489
3319 if(poh_next) { 3490 if(poh_next) {
3320 poh_next->size += poh_freed->size; 3491 poh_next->size += poh_freed->size;
3321 poh_next->offset = poh_freed->offset; 3492 poh_next->offset = poh_freed->offset;
3322 sisfb_free_node(poh_freed); 3493 sisfb_free_node(memheap, poh_freed);
3323 return(poh_next); 3494 return poh_next;
3324 } 3495 }
3325 3496
3326 sisfb_insert_node(&sisfb_heap.oh_free, poh_freed); 3497 sisfb_insert_node(&memheap->oh_free, poh_freed);
3327 3498
3328 return(poh_freed); 3499 return poh_freed;
3329} 3500}
3330 3501
3331static void 3502static void
3332sisfb_free_node(SIS_OH *poh) 3503sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh)
3333{ 3504{
3334 if(poh == NULL) return; 3505 if(poh == NULL)
3506 return;
3335 3507
3336 poh->poh_next = sisfb_heap.poh_freelist; 3508 poh->poh_next = memheap->poh_freelist;
3337 sisfb_heap.poh_freelist = poh; 3509 memheap->poh_freelist = poh;
3338} 3510}
3339 3511
3340void 3512static void
3341sis_malloc(struct sis_memreq *req) 3513sis_int_malloc(struct sis_video_info *ivideo, struct sis_memreq *req)
3342{ 3514{
3343 struct sis_video_info *ivideo = sisfb_heap.vinfo; 3515 struct SIS_OH *poh = NULL;
3344 SIS_OH *poh = NULL;
3345 3516
3346 if((ivideo) && (!ivideo->havenoheap)) { 3517 if((ivideo) && (ivideo->sisfb_id == SISFB_ID) && (!ivideo->havenoheap))
3347 poh = sisfb_poh_allocate((u32)req->size); 3518 poh = sisfb_poh_allocate(&ivideo->sisfb_heap, (u32)req->size);
3348 }
3349 3519
3350 if(poh == NULL) { 3520 if(poh == NULL) {
3351 req->offset = req->size = 0; 3521 req->offset = req->size = 0;
3352 DPRINTK("sisfb: Video RAM allocation failed\n"); 3522 DPRINTK("sisfb: Video RAM allocation failed\n");
3353 } else { 3523 } else {
3354 req->offset = poh->offset; 3524 req->offset = poh->offset;
3355 req->size = poh->size; 3525 req->size = poh->size;
3356 DPRINTK("sisfb: Video RAM allocation succeeded: 0x%lx\n", 3526 DPRINTK("sisfb: Video RAM allocation succeeded: 0x%lx\n",
3357 (poh->offset + ivideo->video_vbase)); 3527 (poh->offset + ivideo->video_vbase));
3358 } 3528 }
3359} 3529}
3360 3530
3361/* sis_free: u32 because "base" is offset inside video ram, can never be >4GB */ 3531void
3532sis_malloc(struct sis_memreq *req)
3533{
3534 struct sis_video_info *ivideo = sisfb_heap->vinfo;
3535
3536 if(&ivideo->sisfb_heap == sisfb_heap)
3537 sis_int_malloc(ivideo, req);
3538 else
3539 req->offset = req->size = 0;
3540}
3362 3541
3363void 3542void
3364sis_free(u32 base) 3543sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req)
3365{ 3544{
3366 struct sis_video_info *ivideo = sisfb_heap.vinfo; 3545 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
3367 SIS_OH *poh; 3546
3547 sis_int_malloc(ivideo, req);
3548}
3549
3550/* sis_free: u32 because "base" is offset inside video ram, can never be >4GB */
3368 3551
3369 if((!ivideo) || (ivideo->havenoheap)) return; 3552static void
3553sis_int_free(struct sis_video_info *ivideo, u32 base)
3554{
3555 struct SIS_OH *poh;
3370 3556
3371 poh = sisfb_poh_free((u32)base); 3557 if((!ivideo) || (ivideo->sisfb_id != SISFB_ID) || (ivideo->havenoheap))
3558 return;
3559
3560 poh = sisfb_poh_free(&ivideo->sisfb_heap, base);
3372 3561
3373 if(poh == NULL) { 3562 if(poh == NULL) {
3374 DPRINTK("sisfb: sisfb_poh_free() failed at base 0x%x\n", 3563 DPRINTK("sisfb: sisfb_poh_free() failed at base 0x%x\n",
@@ -3376,9 +3565,63 @@ sis_free(u32 base)
3376 } 3565 }
3377} 3566}
3378 3567
3568void
3569sis_free(u32 base)
3570{
3571 struct sis_video_info *ivideo = sisfb_heap->vinfo;
3572
3573 sis_int_free(ivideo, base);
3574}
3575
3576void
3577sis_free_new(struct pci_dev *pdev, u32 base)
3578{
3579 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
3580
3581 sis_int_free(ivideo, base);
3582}
3583
3379/* --------------------- SetMode routines ------------------------- */ 3584/* --------------------- SetMode routines ------------------------- */
3380 3585
3381static void 3586static void
3587sisfb_check_engine_and_sync(struct sis_video_info *ivideo)
3588{
3589 u8 cr30, cr31;
3590
3591 /* Check if MMIO and engines are enabled,
3592 * and sync in case they are. Can't use
3593 * ivideo->accel here, as this might have
3594 * been changed before this is called.
3595 */
3596 inSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, cr30);
3597 inSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, cr31);
3598 /* MMIO and 2D/3D engine enabled? */
3599 if((cr30 & SIS_MEM_MAP_IO_ENABLE) && (cr31 & 0x42)) {
3600#ifdef CONFIG_FB_SIS_300
3601 if(ivideo->sisvga_engine == SIS_300_VGA) {
3602 /* Don't care about TurboQueue. It's
3603 * enough to know that the engines
3604 * are enabled
3605 */
3606 sisfb_syncaccel(ivideo);
3607 }
3608#endif
3609#ifdef CONFIG_FB_SIS_315
3610 if(ivideo->sisvga_engine == SIS_315_VGA) {
3611 /* Check that any queue mode is
3612 * enabled, and that the queue
3613 * is not in the state of "reset"
3614 */
3615 inSISIDXREG(SISSR, 0x26, cr30);
3616 if((cr30 & 0xe0) && (!(cr30 & 0x01))) {
3617 sisfb_syncaccel(ivideo);
3618 }
3619 }
3620#endif
3621 }
3622}
3623
3624static void
3382sisfb_pre_setmode(struct sis_video_info *ivideo) 3625sisfb_pre_setmode(struct sis_video_info *ivideo)
3383{ 3626{
3384 u8 cr30 = 0, cr31 = 0, cr33 = 0, cr35 = 0, cr38 = 0; 3627 u8 cr30 = 0, cr31 = 0, cr33 = 0, cr35 = 0, cr38 = 0;
@@ -3386,6 +3629,8 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3386 3629
3387 ivideo->currentvbflags &= (VB_VIDEOBRIDGE | VB_DISPTYPE_DISP2); 3630 ivideo->currentvbflags &= (VB_VIDEOBRIDGE | VB_DISPTYPE_DISP2);
3388 3631
3632 outSISIDXREG(SISSR, 0x05, 0x86);
3633
3389 inSISIDXREG(SISCR, 0x31, cr31); 3634 inSISIDXREG(SISCR, 0x31, cr31);
3390 cr31 &= ~0x60; 3635 cr31 &= ~0x60;
3391 cr31 |= 0x04; 3636 cr31 |= 0x04;
@@ -3413,41 +3658,43 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3413 3658
3414 SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE); 3659 SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE);
3415 SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE); 3660 SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE);
3661 ivideo->curFSTN = ivideo->curDSTN = 0;
3416 3662
3417 switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) { 3663 switch(ivideo->currentvbflags & VB_DISPTYPE_DISP2) {
3418 3664
3419 case CRT2_TV: 3665 case CRT2_TV:
3420 cr38 &= ~0xc0; /* Clear PAL-M / PAL-N bits */ 3666 cr38 &= ~0xc0; /* Clear PAL-M / PAL-N bits */
3421 if((ivideo->vbflags & TV_YPBPR) && (ivideo->vbflags & (VB_301C|VB_301LV|VB_302LV))) { 3667 if((ivideo->vbflags & TV_YPBPR) && (ivideo->vbflags2 & VB2_SISYPBPRBRIDGE)) {
3422#ifdef CONFIG_FB_SIS_315 3668#ifdef CONFIG_FB_SIS_315
3423 if(ivideo->chip >= SIS_661) { 3669 if(ivideo->chip >= SIS_661) {
3424 cr38 |= 0x04; 3670 cr38 |= 0x04;
3425 if(ivideo->vbflags & TV_YPBPR525P) cr35 |= 0x20; 3671 if(ivideo->vbflags & TV_YPBPR525P) cr35 |= 0x20;
3426 else if(ivideo->vbflags & TV_YPBPR750P) cr35 |= 0x40; 3672 else if(ivideo->vbflags & TV_YPBPR750P) cr35 |= 0x40;
3427 else if(ivideo->vbflags & TV_YPBPR1080I) cr35 |= 0x60; 3673 else if(ivideo->vbflags & TV_YPBPR1080I) cr35 |= 0x60;
3428 cr30 |= SIS_SIMULTANEOUS_VIEW_ENABLE; 3674 cr30 |= SIS_SIMULTANEOUS_VIEW_ENABLE;
3429 cr35 &= ~0x01; 3675 cr35 &= ~0x01;
3430 ivideo->currentvbflags |= (TV_YPBPR | (ivideo->vbflags & TV_YPBPRALL)); 3676 ivideo->currentvbflags |= (TV_YPBPR | (ivideo->vbflags & TV_YPBPRALL));
3431 } else if(ivideo->sisvga_engine == SIS_315_VGA) { 3677 } else if(ivideo->sisvga_engine == SIS_315_VGA) {
3432 cr30 |= (0x80 | SIS_SIMULTANEOUS_VIEW_ENABLE); 3678 cr30 |= (0x80 | SIS_SIMULTANEOUS_VIEW_ENABLE);
3433 cr38 |= 0x08; 3679 cr38 |= 0x08;
3434 if(ivideo->vbflags & TV_YPBPR525P) cr38 |= 0x10; 3680 if(ivideo->vbflags & TV_YPBPR525P) cr38 |= 0x10;
3435 else if(ivideo->vbflags & TV_YPBPR750P) cr38 |= 0x20; 3681 else if(ivideo->vbflags & TV_YPBPR750P) cr38 |= 0x20;
3436 else if(ivideo->vbflags & TV_YPBPR1080I) cr38 |= 0x30; 3682 else if(ivideo->vbflags & TV_YPBPR1080I) cr38 |= 0x30;
3437 cr31 &= ~0x01; 3683 cr31 &= ~0x01;
3438 ivideo->currentvbflags |= (TV_YPBPR | (ivideo->vbflags & TV_YPBPRALL)); 3684 ivideo->currentvbflags |= (TV_YPBPR | (ivideo->vbflags & TV_YPBPRALL));
3439 } 3685 }
3440#endif 3686#endif
3441 } else if((ivideo->vbflags & TV_HIVISION) && (ivideo->vbflags & (VB_301|VB_301B|VB_302B))) { 3687 } else if((ivideo->vbflags & TV_HIVISION) &&
3442 if(ivideo->chip >= SIS_661) { 3688 (ivideo->vbflags2 & VB2_SISHIVISIONBRIDGE)) {
3443 cr38 |= 0x04; 3689 if(ivideo->chip >= SIS_661) {
3444 cr35 |= 0x60; 3690 cr38 |= 0x04;
3445 } else { 3691 cr35 |= 0x60;
3446 cr30 |= 0x80; 3692 } else {
3447 } 3693 cr30 |= 0x80;
3694 }
3448 cr30 |= SIS_SIMULTANEOUS_VIEW_ENABLE; 3695 cr30 |= SIS_SIMULTANEOUS_VIEW_ENABLE;
3449 cr31 |= 0x01; 3696 cr31 |= 0x01;
3450 cr35 |= 0x01; 3697 cr35 |= 0x01;
3451 ivideo->currentvbflags |= TV_HIVISION; 3698 ivideo->currentvbflags |= TV_HIVISION;
3452 } else if(ivideo->vbflags & TV_SCART) { 3699 } else if(ivideo->vbflags & TV_SCART) {
3453 cr30 = (SIS_VB_OUTPUT_SCART | SIS_SIMULTANEOUS_VIEW_ENABLE); 3700 cr30 = (SIS_VB_OUTPUT_SCART | SIS_SIMULTANEOUS_VIEW_ENABLE);
@@ -3466,8 +3713,8 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3466 } 3713 }
3467 cr31 |= SIS_DRIVER_MODE; 3714 cr31 |= SIS_DRIVER_MODE;
3468 3715
3469 if(ivideo->vbflags & (TV_AVIDEO|TV_SVIDEO)) { 3716 if(ivideo->vbflags & (TV_AVIDEO | TV_SVIDEO)) {
3470 if(ivideo->vbflags & TV_PAL) { 3717 if(ivideo->vbflags & TV_PAL) {
3471 cr31 |= 0x01; cr35 |= 0x01; 3718 cr31 |= 0x01; cr35 |= 0x01;
3472 ivideo->currentvbflags |= TV_PAL; 3719 ivideo->currentvbflags |= TV_PAL;
3473 if(ivideo->vbflags & TV_PALM) { 3720 if(ivideo->vbflags & TV_PALM) {
@@ -3476,14 +3723,14 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3476 } else if(ivideo->vbflags & TV_PALN) { 3723 } else if(ivideo->vbflags & TV_PALN) {
3477 cr38 |= 0x80; cr35 |= 0x08; 3724 cr38 |= 0x80; cr35 |= 0x08;
3478 ivideo->currentvbflags |= TV_PALN; 3725 ivideo->currentvbflags |= TV_PALN;
3479 } 3726 }
3480 } else { 3727 } else {
3481 cr31 &= ~0x01; cr35 &= ~0x01; 3728 cr31 &= ~0x01; cr35 &= ~0x01;
3482 ivideo->currentvbflags |= TV_NTSC; 3729 ivideo->currentvbflags |= TV_NTSC;
3483 if(ivideo->vbflags & TV_NTSCJ) { 3730 if(ivideo->vbflags & TV_NTSCJ) {
3484 cr38 |= 0x40; cr35 |= 0x02; 3731 cr38 |= 0x40; cr35 |= 0x02;
3485 ivideo->currentvbflags |= TV_NTSCJ; 3732 ivideo->currentvbflags |= TV_NTSCJ;
3486 } 3733 }
3487 } 3734 }
3488 } 3735 }
3489 break; 3736 break;
@@ -3493,6 +3740,8 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3493 cr31 |= SIS_DRIVER_MODE; 3740 cr31 |= SIS_DRIVER_MODE;
3494 SiS_SetEnableDstn(&ivideo->SiS_Pr, ivideo->sisfb_dstn); 3741 SiS_SetEnableDstn(&ivideo->SiS_Pr, ivideo->sisfb_dstn);
3495 SiS_SetEnableFstn(&ivideo->SiS_Pr, ivideo->sisfb_fstn); 3742 SiS_SetEnableFstn(&ivideo->SiS_Pr, ivideo->sisfb_fstn);
3743 ivideo->curFSTN = ivideo->sisfb_fstn;
3744 ivideo->curDSTN = ivideo->sisfb_dstn;
3496 break; 3745 break;
3497 3746
3498 case CRT2_VGA: 3747 case CRT2_VGA:
@@ -3525,9 +3774,9 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3525 } 3774 }
3526 outSISIDXREG(SISCR, 0x31, cr31); 3775 outSISIDXREG(SISCR, 0x31, cr31);
3527 3776
3528 if(ivideo->accel) sisfb_syncaccel(ivideo);
3529
3530 ivideo->SiS_Pr.SiS_UseOEM = ivideo->sisfb_useoem; 3777 ivideo->SiS_Pr.SiS_UseOEM = ivideo->sisfb_useoem;
3778
3779 sisfb_check_engine_and_sync(ivideo);
3531} 3780}
3532 3781
3533/* Fix SR11 for 661 and later */ 3782/* Fix SR11 for 661 and later */
@@ -3535,125 +3784,129 @@ sisfb_pre_setmode(struct sis_video_info *ivideo)
3535static void 3784static void
3536sisfb_fixup_SR11(struct sis_video_info *ivideo) 3785sisfb_fixup_SR11(struct sis_video_info *ivideo)
3537{ 3786{
3538 u8 tmpreg; 3787 u8 tmpreg;
3539 3788
3540 if(ivideo->chip >= SIS_661) { 3789 if(ivideo->chip >= SIS_661) {
3541 inSISIDXREG(SISSR,0x11,tmpreg); 3790 inSISIDXREG(SISSR,0x11,tmpreg);
3542 if(tmpreg & 0x20) { 3791 if(tmpreg & 0x20) {
3543 inSISIDXREG(SISSR,0x3e,tmpreg); 3792 inSISIDXREG(SISSR,0x3e,tmpreg);
3544 tmpreg = (tmpreg + 1) & 0xff; 3793 tmpreg = (tmpreg + 1) & 0xff;
3545 outSISIDXREG(SISSR,0x3e,tmpreg); 3794 outSISIDXREG(SISSR,0x3e,tmpreg);
3546 inSISIDXREG(SISSR,0x11,tmpreg); 3795 inSISIDXREG(SISSR,0x11,tmpreg);
3547 } 3796 }
3548 if(tmpreg & 0xf0) { 3797 if(tmpreg & 0xf0) {
3549 andSISIDXREG(SISSR,0x11,0x0f); 3798 andSISIDXREG(SISSR,0x11,0x0f);
3550 } 3799 }
3551 } 3800 }
3552} 3801}
3553#endif 3802#endif
3554 3803
3555static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val) 3804static void
3805sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val)
3556{ 3806{
3557 if(val > 32) val = 32; 3807 if(val > 32) val = 32;
3558 if(val < -32) val = -32; 3808 if(val < -32) val = -32;
3559 ivideo->tvxpos = val; 3809 ivideo->tvxpos = val;
3560 3810
3561 if(ivideo->sisfblocked) return; 3811 if(ivideo->sisfblocked) return;
3562 if(!ivideo->modechanged) return; 3812 if(!ivideo->modechanged) return;
3563 3813
3564 if(ivideo->currentvbflags & CRT2_TV) { 3814 if(ivideo->currentvbflags & CRT2_TV) {
3565 3815
3566 if(ivideo->vbflags & VB_CHRONTEL) { 3816 if(ivideo->vbflags2 & VB2_CHRONTEL) {
3567 3817
3568 int x = ivideo->tvx; 3818 int x = ivideo->tvx;
3569 3819
3570 switch(ivideo->chronteltype) { 3820 switch(ivideo->chronteltype) {
3571 case 1: 3821 case 1:
3572 x += val; 3822 x += val;
3573 if(x < 0) x = 0; 3823 if(x < 0) x = 0;
3574 outSISIDXREG(SISSR,0x05,0x86); 3824 outSISIDXREG(SISSR,0x05,0x86);
3575 SiS_SetCH700x(&ivideo->SiS_Pr, (((x & 0xff) << 8) | 0x0a)); 3825 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0a, (x & 0xff));
3576 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, (((x & 0x0100) << 1) | 0x08),0xFD); 3826 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x08, ((x & 0x0100) >> 7), 0xFD);
3577 break; 3827 break;
3578 case 2: 3828 case 2:
3579 /* Not supported by hardware */ 3829 /* Not supported by hardware */
3580 break; 3830 break;
3581 } 3831 }
3582 3832
3583 } else if(ivideo->vbflags & VB_SISBRIDGE) { 3833 } else if(ivideo->vbflags2 & VB2_SISBRIDGE) {
3584 3834
3585 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43; 3835 u8 p2_1f,p2_20,p2_2b,p2_42,p2_43;
3586 unsigned short temp; 3836 unsigned short temp;
3587 3837
3588 p2_1f = ivideo->p2_1f; 3838 p2_1f = ivideo->p2_1f;
3589 p2_20 = ivideo->p2_20; 3839 p2_20 = ivideo->p2_20;
3590 p2_2b = ivideo->p2_2b; 3840 p2_2b = ivideo->p2_2b;
3591 p2_42 = ivideo->p2_42; 3841 p2_42 = ivideo->p2_42;
3592 p2_43 = ivideo->p2_43; 3842 p2_43 = ivideo->p2_43;
3593 3843
3594 temp = p2_1f | ((p2_20 & 0xf0) << 4); 3844 temp = p2_1f | ((p2_20 & 0xf0) << 4);
3595 temp += (val * 2); 3845 temp += (val * 2);
3596 p2_1f = temp & 0xff; 3846 p2_1f = temp & 0xff;
3597 p2_20 = (temp & 0xf00) >> 4; 3847 p2_20 = (temp & 0xf00) >> 4;
3598 p2_2b = ((p2_2b & 0x0f) + (val * 2)) & 0x0f; 3848 p2_2b = ((p2_2b & 0x0f) + (val * 2)) & 0x0f;
3599 temp = p2_43 | ((p2_42 & 0xf0) << 4); 3849 temp = p2_43 | ((p2_42 & 0xf0) << 4);
3600 temp += (val * 2); 3850 temp += (val * 2);
3601 p2_43 = temp & 0xff; 3851 p2_43 = temp & 0xff;
3602 p2_42 = (temp & 0xf00) >> 4; 3852 p2_42 = (temp & 0xf00) >> 4;
3603 outSISIDXREG(SISPART2,0x1f,p2_1f); 3853 outSISIDXREG(SISPART2,0x1f,p2_1f);
3604 setSISIDXREG(SISPART2,0x20,0x0F,p2_20); 3854 setSISIDXREG(SISPART2,0x20,0x0F,p2_20);
3605 setSISIDXREG(SISPART2,0x2b,0xF0,p2_2b); 3855 setSISIDXREG(SISPART2,0x2b,0xF0,p2_2b);
3606 setSISIDXREG(SISPART2,0x42,0x0F,p2_42); 3856 setSISIDXREG(SISPART2,0x42,0x0F,p2_42);
3607 outSISIDXREG(SISPART2,0x43,p2_43); 3857 outSISIDXREG(SISPART2,0x43,p2_43);
3608 } 3858 }
3609 } 3859 }
3610} 3860}
3611 3861
3612static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val) 3862static void
3863sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val)
3613{ 3864{
3614 if(val > 32) val = 32; 3865 if(val > 32) val = 32;
3615 if(val < -32) val = -32; 3866 if(val < -32) val = -32;
3616 ivideo->tvypos = val; 3867 ivideo->tvypos = val;
3617 3868
3618 if(ivideo->sisfblocked) return; 3869 if(ivideo->sisfblocked) return;
3619 if(!ivideo->modechanged) return; 3870 if(!ivideo->modechanged) return;
3620 3871
3621 if(ivideo->currentvbflags & CRT2_TV) { 3872 if(ivideo->currentvbflags & CRT2_TV) {
3622 3873
3623 if(ivideo->vbflags & VB_CHRONTEL) { 3874 if(ivideo->vbflags2 & VB2_CHRONTEL) {
3624 3875
3625 int y = ivideo->tvy; 3876 int y = ivideo->tvy;
3626 3877
3627 switch(ivideo->chronteltype) { 3878 switch(ivideo->chronteltype) {
3628 case 1: 3879 case 1:
3629 y -= val; 3880 y -= val;
3630 if(y < 0) y = 0; 3881 if(y < 0) y = 0;
3631 outSISIDXREG(SISSR,0x05,0x86); 3882 outSISIDXREG(SISSR,0x05,0x86);
3632 SiS_SetCH700x(&ivideo->SiS_Pr, (((y & 0xff) << 8) | 0x0b)); 3883 SiS_SetCH700x(&ivideo->SiS_Pr, 0x0b, (y & 0xff));
3633 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, ((y & 0x0100) | 0x08),0xFE); 3884 SiS_SetCH70xxANDOR(&ivideo->SiS_Pr, 0x08, ((y & 0x0100) >> 8), 0xFE);
3634 break; 3885 break;
3635 case 2: 3886 case 2:
3636 /* Not supported by hardware */ 3887 /* Not supported by hardware */
3637 break; 3888 break;
3638 } 3889 }
3639 3890
3640 } else if(ivideo->vbflags & VB_SISBRIDGE) { 3891 } else if(ivideo->vbflags2 & VB2_SISBRIDGE) {
3641 3892
3642 char p2_01, p2_02; 3893 char p2_01, p2_02;
3643 val /= 2; 3894 val /= 2;
3644 p2_01 = ivideo->p2_01; 3895 p2_01 = ivideo->p2_01;
3645 p2_02 = ivideo->p2_02; 3896 p2_02 = ivideo->p2_02;
3646 3897
3647 p2_01 += val; 3898 p2_01 += val;
3648 p2_02 += val; 3899 p2_02 += val;
3649 while((p2_01 <= 0) || (p2_02 <= 0)) { 3900 if(!(ivideo->currentvbflags & (TV_HIVISION | TV_YPBPR))) {
3650 p2_01 += 2; 3901 while((p2_01 <= 0) || (p2_02 <= 0)) {
3651 p2_02 += 2; 3902 p2_01 += 2;
3652 } 3903 p2_02 += 2;
3653 outSISIDXREG(SISPART2,0x01,p2_01); 3904 }
3654 outSISIDXREG(SISPART2,0x02,p2_02); 3905 }
3655 } 3906 outSISIDXREG(SISPART2,0x01,p2_01);
3656 } 3907 outSISIDXREG(SISPART2,0x02,p2_02);
3908 }
3909 }
3657} 3910}
3658 3911
3659static void 3912static void
@@ -3668,207 +3921,172 @@ sisfb_post_setmode(struct sis_video_info *ivideo)
3668 u8 reg1; 3921 u8 reg1;
3669#endif 3922#endif
3670 3923
3671 outSISIDXREG(SISSR,0x05,0x86); 3924 outSISIDXREG(SISSR, 0x05, 0x86);
3672 3925
3673#ifdef CONFIG_FB_SIS_315 3926#ifdef CONFIG_FB_SIS_315
3674 sisfb_fixup_SR11(ivideo); 3927 sisfb_fixup_SR11(ivideo);
3675#endif 3928#endif
3676 3929
3677 /* Now we actually HAVE changed the display mode */ 3930 /* Now we actually HAVE changed the display mode */
3678 ivideo->modechanged = 1; 3931 ivideo->modechanged = 1;
3679 3932
3680 /* We can't switch off CRT1 if bridge is in slave mode */ 3933 /* We can't switch off CRT1 if bridge is in slave mode */
3681 if(ivideo->vbflags & VB_VIDEOBRIDGE) { 3934 if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) {
3682 if(sisfb_bridgeisslave(ivideo)) doit = FALSE; 3935 if(sisfb_bridgeisslave(ivideo)) doit = FALSE;
3683 } else ivideo->sisfb_crt1off = 0; 3936 } else
3937 ivideo->sisfb_crt1off = 0;
3684 3938
3685#ifdef CONFIG_FB_SIS_300 3939#ifdef CONFIG_FB_SIS_300
3686 if(ivideo->sisvga_engine == SIS_300_VGA) { 3940 if(ivideo->sisvga_engine == SIS_300_VGA) {
3687 if((ivideo->sisfb_crt1off) && (doit)) { 3941 if((ivideo->sisfb_crt1off) && (doit)) {
3688 crt1isoff = TRUE; 3942 crt1isoff = TRUE;
3689 reg = 0x00; 3943 reg = 0x00;
3690 } else { 3944 } else {
3691 crt1isoff = FALSE; 3945 crt1isoff = FALSE;
3692 reg = 0x80; 3946 reg = 0x80;
3693 } 3947 }
3694 setSISIDXREG(SISCR, 0x17, 0x7f, reg); 3948 setSISIDXREG(SISCR, 0x17, 0x7f, reg);
3695 } 3949 }
3696#endif 3950#endif
3697#ifdef CONFIG_FB_SIS_315 3951#ifdef CONFIG_FB_SIS_315
3698 if(ivideo->sisvga_engine == SIS_315_VGA) { 3952 if(ivideo->sisvga_engine == SIS_315_VGA) {
3699 if((ivideo->sisfb_crt1off) && (doit)) { 3953 if((ivideo->sisfb_crt1off) && (doit)) {
3700 crt1isoff = TRUE; 3954 crt1isoff = TRUE;
3701 reg = 0x40; 3955 reg = 0x40;
3702 reg1 = 0xc0; 3956 reg1 = 0xc0;
3703 } else { 3957 } else {
3704 crt1isoff = FALSE; 3958 crt1isoff = FALSE;
3705 reg = 0x00; 3959 reg = 0x00;
3706 reg1 = 0x00; 3960 reg1 = 0x00;
3707 3961 }
3708 } 3962 setSISIDXREG(SISCR, ivideo->SiS_Pr.SiS_MyCR63, ~0x40, reg);
3709 setSISIDXREG(SISCR, ivideo->SiS_Pr.SiS_MyCR63, ~0x40, reg); 3963 setSISIDXREG(SISSR, 0x1f, ~0xc0, reg1);
3710 setSISIDXREG(SISSR, 0x1f, ~0xc0, reg1);
3711 } 3964 }
3712#endif 3965#endif
3713 3966
3714 if(crt1isoff) { 3967 if(crt1isoff) {
3715 ivideo->currentvbflags &= ~VB_DISPTYPE_CRT1; 3968 ivideo->currentvbflags &= ~VB_DISPTYPE_CRT1;
3716 ivideo->currentvbflags |= VB_SINGLE_MODE; 3969 ivideo->currentvbflags |= VB_SINGLE_MODE;
3717 } else { 3970 } else {
3718 ivideo->currentvbflags |= VB_DISPTYPE_CRT1; 3971 ivideo->currentvbflags |= VB_DISPTYPE_CRT1;
3719 if(ivideo->currentvbflags & VB_DISPTYPE_CRT2) { 3972 if(ivideo->currentvbflags & VB_DISPTYPE_CRT2) {
3720 ivideo->currentvbflags |= VB_MIRROR_MODE; 3973 ivideo->currentvbflags |= VB_MIRROR_MODE;
3721 } else { 3974 } else {
3722 ivideo->currentvbflags |= VB_SINGLE_MODE; 3975 ivideo->currentvbflags |= VB_SINGLE_MODE;
3723 } 3976 }
3724 } 3977 }
3725 3978
3726 andSISIDXREG(SISSR, IND_SIS_RAMDAC_CONTROL, ~0x04); 3979 andSISIDXREG(SISSR, IND_SIS_RAMDAC_CONTROL, ~0x04);
3727 3980
3728 if(ivideo->currentvbflags & CRT2_TV) { 3981 if(ivideo->currentvbflags & CRT2_TV) {
3729 if(ivideo->vbflags & VB_SISBRIDGE) { 3982 if(ivideo->vbflags2 & VB2_SISBRIDGE) {
3730 inSISIDXREG(SISPART2,0x1f,ivideo->p2_1f); 3983 inSISIDXREG(SISPART2,0x1f,ivideo->p2_1f);
3731 inSISIDXREG(SISPART2,0x20,ivideo->p2_20); 3984 inSISIDXREG(SISPART2,0x20,ivideo->p2_20);
3732 inSISIDXREG(SISPART2,0x2b,ivideo->p2_2b); 3985 inSISIDXREG(SISPART2,0x2b,ivideo->p2_2b);
3733 inSISIDXREG(SISPART2,0x42,ivideo->p2_42); 3986 inSISIDXREG(SISPART2,0x42,ivideo->p2_42);
3734 inSISIDXREG(SISPART2,0x43,ivideo->p2_43); 3987 inSISIDXREG(SISPART2,0x43,ivideo->p2_43);
3735 inSISIDXREG(SISPART2,0x01,ivideo->p2_01); 3988 inSISIDXREG(SISPART2,0x01,ivideo->p2_01);
3736 inSISIDXREG(SISPART2,0x02,ivideo->p2_02); 3989 inSISIDXREG(SISPART2,0x02,ivideo->p2_02);
3737 } else if(ivideo->vbflags & VB_CHRONTEL) { 3990 } else if(ivideo->vbflags2 & VB2_CHRONTEL) {
3738 if(ivideo->chronteltype == 1) { 3991 if(ivideo->chronteltype == 1) {
3739 ivideo->tvx = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0a); 3992 ivideo->tvx = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0a);
3740 ivideo->tvx |= (((SiS_GetCH700x(&ivideo->SiS_Pr, 0x08) & 0x02) >> 1) << 8); 3993 ivideo->tvx |= (((SiS_GetCH700x(&ivideo->SiS_Pr, 0x08) & 0x02) >> 1) << 8);
3741 ivideo->tvy = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0b); 3994 ivideo->tvy = SiS_GetCH700x(&ivideo->SiS_Pr, 0x0b);
3742 ivideo->tvy |= ((SiS_GetCH700x(&ivideo->SiS_Pr, 0x08) & 0x01) << 8); 3995 ivideo->tvy |= ((SiS_GetCH700x(&ivideo->SiS_Pr, 0x08) & 0x01) << 8);
3743 } 3996 }
3744 } 3997 }
3745 } 3998 }
3746 3999
3747 if(ivideo->tvxpos) { 4000 if(ivideo->tvxpos) {
3748 sisfb_set_TVxposoffset(ivideo, ivideo->tvxpos); 4001 sisfb_set_TVxposoffset(ivideo, ivideo->tvxpos);
3749 } 4002 }
3750 if(ivideo->tvypos) { 4003 if(ivideo->tvypos) {
3751 sisfb_set_TVyposoffset(ivideo, ivideo->tvypos); 4004 sisfb_set_TVyposoffset(ivideo, ivideo->tvypos);
3752 } 4005 }
3753 4006
3754 if((ivideo->currentvbflags & CRT2_TV) && (ivideo->vbflags & VB_301)) { /* Set filter for SiS301 */ 4007 /* Eventually sync engines */
4008 sisfb_check_engine_and_sync(ivideo);
3755 4009
3756 unsigned char filter_tb = 0; 4010 /* (Re-)Initialize chip engines */
4011 if(ivideo->accel) {
4012 sisfb_engine_init(ivideo);
4013 } else {
4014 ivideo->engineok = 0;
4015 }
4016}
3757 4017
3758 switch (ivideo->video_width) { 4018static int
3759 case 320: 4019sisfb_reset_mode(struct sis_video_info *ivideo)
3760 filter_tb = (ivideo->vbflags & TV_NTSC) ? 4 : 12; 4020{
3761 break; 4021 if(sisfb_set_mode(ivideo, 0))
3762 case 640: 4022 return 1;
3763 filter_tb = (ivideo->vbflags & TV_NTSC) ? 5 : 13;
3764 break;
3765 case 720:
3766 filter_tb = (ivideo->vbflags & TV_NTSC) ? 6 : 14;
3767 break;
3768 case 400:
3769 case 800:
3770 filter_tb = (ivideo->vbflags & TV_NTSC) ? 7 : 15;
3771 break;
3772 default:
3773 ivideo->sisfb_filter = -1;
3774 break;
3775 }
3776 4023
3777 orSISIDXREG(SISPART1, ivideo->CRT2_write_enable, 0x01); 4024 sisfb_set_pitch(ivideo);
4025 sisfb_set_base_CRT1(ivideo, ivideo->current_base);
4026 sisfb_set_base_CRT2(ivideo, ivideo->current_base);
3778 4027
3779 if(ivideo->vbflags & TV_NTSC) { 4028 return 0;
3780 4029}
3781 andSISIDXREG(SISPART2, 0x3a, 0x1f); 4030
3782 4031static void
3783 if (ivideo->vbflags & TV_SVIDEO) { 4032sisfb_handle_command(struct sis_video_info *ivideo, struct sisfb_cmd *sisfb_command)
3784 4033{
3785 andSISIDXREG(SISPART2, 0x30, 0xdf); 4034 int mycrt1off;
3786
3787 } else if (ivideo->vbflags & TV_AVIDEO) {
3788
3789 orSISIDXREG(SISPART2, 0x30, 0x20);
3790
3791 switch (ivideo->video_width) {
3792 case 640:
3793 outSISIDXREG(SISPART2, 0x35, 0xEB);
3794 outSISIDXREG(SISPART2, 0x36, 0x04);
3795 outSISIDXREG(SISPART2, 0x37, 0x25);
3796 outSISIDXREG(SISPART2, 0x38, 0x18);
3797 break;
3798 case 720:
3799 outSISIDXREG(SISPART2, 0x35, 0xEE);
3800 outSISIDXREG(SISPART2, 0x36, 0x0C);
3801 outSISIDXREG(SISPART2, 0x37, 0x22);
3802 outSISIDXREG(SISPART2, 0x38, 0x08);
3803 break;
3804 case 400:
3805 case 800:
3806 outSISIDXREG(SISPART2, 0x35, 0xEB);
3807 outSISIDXREG(SISPART2, 0x36, 0x15);
3808 outSISIDXREG(SISPART2, 0x37, 0x25);
3809 outSISIDXREG(SISPART2, 0x38, 0xF6);
3810 break;
3811 }
3812 }
3813 4035
3814 } else if(ivideo->vbflags & TV_PAL) { 4036 switch(sisfb_command->sisfb_cmd) {
3815 4037 case SISFB_CMD_GETVBFLAGS:
3816 andSISIDXREG(SISPART2, 0x3A, 0x1F); 4038 if(!ivideo->modechanged) {
3817 4039 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_EARLY;
3818 if (ivideo->vbflags & TV_SVIDEO) { 4040 } else {
3819 4041 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OK;
3820 andSISIDXREG(SISPART2, 0x30, 0xDF); 4042 sisfb_command->sisfb_result[1] = ivideo->currentvbflags;
3821 4043 sisfb_command->sisfb_result[2] = ivideo->vbflags2;
3822 } else if (ivideo->vbflags & TV_AVIDEO) { 4044 }
3823 4045 break;
3824 orSISIDXREG(SISPART2, 0x30, 0x20); 4046 case SISFB_CMD_SWITCHCRT1:
3825 4047 /* arg[0]: 0 = off, 1 = on, 99 = query */
3826 switch (ivideo->video_width) { 4048 if(!ivideo->modechanged) {
3827 case 640: 4049 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_EARLY;
3828 outSISIDXREG(SISPART2, 0x35, 0xF1); 4050 } else if(sisfb_command->sisfb_arg[0] == 99) {
3829 outSISIDXREG(SISPART2, 0x36, 0xF7); 4051 /* Query */
3830 outSISIDXREG(SISPART2, 0x37, 0x1F); 4052 sisfb_command->sisfb_result[1] = ivideo->sisfb_crt1off ? 0 : 1;
3831 outSISIDXREG(SISPART2, 0x38, 0x32); 4053 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OK;
3832 break; 4054 } else if(ivideo->sisfblocked) {
3833 case 720: 4055 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_LOCKED;
3834 outSISIDXREG(SISPART2, 0x35, 0xF3); 4056 } else if((!(ivideo->currentvbflags & CRT2_ENABLE)) &&
3835 outSISIDXREG(SISPART2, 0x36, 0x00); 4057 (sisfb_command->sisfb_arg[0] == 0)) {
3836 outSISIDXREG(SISPART2, 0x37, 0x1D); 4058 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_NOCRT2;
3837 outSISIDXREG(SISPART2, 0x38, 0x20); 4059 } else {
3838 break; 4060 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OK;
3839 case 400: 4061 mycrt1off = sisfb_command->sisfb_arg[0] ? 0 : 1;
3840 case 800: 4062 if( ((ivideo->currentvbflags & VB_DISPTYPE_CRT1) && mycrt1off) ||
3841 outSISIDXREG(SISPART2, 0x35, 0xFC); 4063 ((!(ivideo->currentvbflags & VB_DISPTYPE_CRT1)) && !mycrt1off) ) {
3842 outSISIDXREG(SISPART2, 0x36, 0xFB); 4064 ivideo->sisfb_crt1off = mycrt1off;
3843 outSISIDXREG(SISPART2, 0x37, 0x14); 4065 if(sisfb_reset_mode(ivideo)) {
3844 outSISIDXREG(SISPART2, 0x38, 0x2A); 4066 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_OTHER;
3845 break;
3846 } 4067 }
3847 } 4068 }
4069 sisfb_command->sisfb_result[1] = ivideo->sisfb_crt1off ? 0 : 1;
3848 } 4070 }
3849 4071 break;
3850 if((ivideo->sisfb_filter >= 0) && (ivideo->sisfb_filter <= 7)) { 4072 /* more to come */
3851 outSISIDXREG(SISPART2,0x35,(sis_TV_filter[filter_tb].filter[ivideo->sisfb_filter][0])); 4073 default:
3852 outSISIDXREG(SISPART2,0x36,(sis_TV_filter[filter_tb].filter[ivideo->sisfb_filter][1])); 4074 sisfb_command->sisfb_result[0] = SISFB_CMD_ERR_UNKNOWN;
3853 outSISIDXREG(SISPART2,0x37,(sis_TV_filter[filter_tb].filter[ivideo->sisfb_filter][2])); 4075 printk(KERN_ERR "sisfb: Unknown command 0x%x\n",
3854 outSISIDXREG(SISPART2,0x38,(sis_TV_filter[filter_tb].filter[ivideo->sisfb_filter][3])); 4076 sisfb_command->sisfb_cmd);
3855 }
3856
3857 } 4077 }
3858} 4078}
3859 4079
3860#ifndef MODULE 4080#ifndef MODULE
3861SISINITSTATIC int __init sisfb_setup(char *options) 4081SISINITSTATIC int __init
4082sisfb_setup(char *options)
3862{ 4083{
3863 char *this_opt; 4084 char *this_opt;
3864
3865 sisfb_setdefaultparms();
3866 4085
3867 printk(KERN_DEBUG "sisfb: Options %s\n", options); 4086 sisfb_setdefaultparms();
3868 4087
3869 if(!options || !(*options)) { 4088 if(!options || !(*options))
3870 return 0; 4089 return 0;
3871 }
3872 4090
3873 while((this_opt = strsep(&options, ",")) != NULL) { 4091 while((this_opt = strsep(&options, ",")) != NULL) {
3874 4092
@@ -3880,9 +4098,9 @@ SISINITSTATIC int __init sisfb_setup(char *options)
3880 /* Need to check crt2 type first for fstn/dstn */ 4098 /* Need to check crt2 type first for fstn/dstn */
3881 sisfb_search_crt2type(this_opt + 14); 4099 sisfb_search_crt2type(this_opt + 14);
3882 } else if(!strnicmp(this_opt, "tvmode:",7)) { 4100 } else if(!strnicmp(this_opt, "tvmode:",7)) {
3883 sisfb_search_tvstd(this_opt + 7);
3884 } else if(!strnicmp(this_opt, "tvstandard:",11)) {
3885 sisfb_search_tvstd(this_opt + 7); 4101 sisfb_search_tvstd(this_opt + 7);
4102 } else if(!strnicmp(this_opt, "tvstandard:",11)) {
4103 sisfb_search_tvstd(this_opt + 11);
3886 } else if(!strnicmp(this_opt, "mode:", 5)) { 4104 } else if(!strnicmp(this_opt, "mode:", 5)) {
3887 sisfb_search_mode(this_opt + 5, FALSE); 4105 sisfb_search_mode(this_opt + 5, FALSE);
3888 } else if(!strnicmp(this_opt, "vesa:", 5)) { 4106 } else if(!strnicmp(this_opt, "vesa:", 5)) {
@@ -3892,74 +4110,72 @@ SISINITSTATIC int __init sisfb_setup(char *options)
3892 sisfb_inverse = 1; 4110 sisfb_inverse = 1;
3893 /* fb_invert_cmaps(); */ 4111 /* fb_invert_cmaps(); */
3894 } else if(!strnicmp(this_opt, "font:", 5)) { 4112 } else if(!strnicmp(this_opt, "font:", 5)) {
3895 if(strlen(this_opt + 5) < 40) { 4113 if(strlen(this_opt + 5) < 40) {
3896 strncpy(sisfb_fontname, this_opt + 5, sizeof(sisfb_fontname) - 1); 4114 strncpy(sisfb_fontname, this_opt + 5, sizeof(sisfb_fontname) - 1);
3897 sisfb_fontname[sizeof(sisfb_fontname) - 1] = '\0'; 4115 sisfb_fontname[sizeof(sisfb_fontname) - 1] = '\0';
3898 } 4116 }
3899#endif 4117#endif
3900 } else if(!strnicmp(this_opt, "rate:", 5)) { 4118 } else if(!strnicmp(this_opt, "rate:", 5)) {
3901 sisfb_parm_rate = simple_strtoul(this_opt + 5, NULL, 0); 4119 sisfb_parm_rate = simple_strtoul(this_opt + 5, NULL, 0);
3902 } else if(!strnicmp(this_opt, "filter:", 7)) {
3903 sisfb_filter = (int)simple_strtoul(this_opt + 7, NULL, 0);
3904 } else if(!strnicmp(this_opt, "forcecrt1:", 10)) { 4120 } else if(!strnicmp(this_opt, "forcecrt1:", 10)) {
3905 sisfb_forcecrt1 = (int)simple_strtoul(this_opt + 10, NULL, 0); 4121 sisfb_forcecrt1 = (int)simple_strtoul(this_opt + 10, NULL, 0);
3906 } else if(!strnicmp(this_opt, "mem:",4)) { 4122 } else if(!strnicmp(this_opt, "mem:",4)) {
3907 sisfb_parm_mem = simple_strtoul(this_opt + 4, NULL, 0); 4123 sisfb_parm_mem = simple_strtoul(this_opt + 4, NULL, 0);
3908 } else if(!strnicmp(this_opt, "pdc:", 4)) { 4124 } else if(!strnicmp(this_opt, "pdc:", 4)) {
3909 sisfb_pdc = simple_strtoul(this_opt + 4, NULL, 0); 4125 sisfb_pdc = simple_strtoul(this_opt + 4, NULL, 0);
3910 } else if(!strnicmp(this_opt, "pdc1:", 5)) { 4126 } else if(!strnicmp(this_opt, "pdc1:", 5)) {
3911 sisfb_pdca = simple_strtoul(this_opt + 5, NULL, 0); 4127 sisfb_pdca = simple_strtoul(this_opt + 5, NULL, 0);
3912 } else if(!strnicmp(this_opt, "noaccel", 7)) { 4128 } else if(!strnicmp(this_opt, "noaccel", 7)) {
3913 sisfb_accel = 0; 4129 sisfb_accel = 0;
3914 } else if(!strnicmp(this_opt, "accel", 5)) { 4130 } else if(!strnicmp(this_opt, "accel", 5)) {
3915 sisfb_accel = -1; 4131 sisfb_accel = -1;
3916 } else if(!strnicmp(this_opt, "noypan", 6)) { 4132 } else if(!strnicmp(this_opt, "noypan", 6)) {
3917 sisfb_ypan = 0; 4133 sisfb_ypan = 0;
3918 } else if(!strnicmp(this_opt, "ypan", 4)) { 4134 } else if(!strnicmp(this_opt, "ypan", 4)) {
3919 sisfb_ypan = -1; 4135 sisfb_ypan = -1;
3920 } else if(!strnicmp(this_opt, "nomax", 5)) { 4136 } else if(!strnicmp(this_opt, "nomax", 5)) {
3921 sisfb_max = 0; 4137 sisfb_max = 0;
3922 } else if(!strnicmp(this_opt, "max", 3)) { 4138 } else if(!strnicmp(this_opt, "max", 3)) {
3923 sisfb_max = -1; 4139 sisfb_max = -1;
3924 } else if(!strnicmp(this_opt, "userom:", 7)) { 4140 } else if(!strnicmp(this_opt, "userom:", 7)) {
3925 sisfb_userom = (int)simple_strtoul(this_opt + 7, NULL, 0); 4141 sisfb_userom = (int)simple_strtoul(this_opt + 7, NULL, 0);
3926 } else if(!strnicmp(this_opt, "useoem:", 7)) { 4142 } else if(!strnicmp(this_opt, "useoem:", 7)) {
3927 sisfb_useoem = (int)simple_strtoul(this_opt + 7, NULL, 0); 4143 sisfb_useoem = (int)simple_strtoul(this_opt + 7, NULL, 0);
3928 } else if(!strnicmp(this_opt, "nocrt2rate", 10)) { 4144 } else if(!strnicmp(this_opt, "nocrt2rate", 10)) {
3929 sisfb_nocrt2rate = 1; 4145 sisfb_nocrt2rate = 1;
3930 } else if(!strnicmp(this_opt, "scalelcd:", 9)) { 4146 } else if(!strnicmp(this_opt, "scalelcd:", 9)) {
3931 unsigned long temp = 2; 4147 unsigned long temp = 2;
3932 temp = simple_strtoul(this_opt + 9, NULL, 0); 4148 temp = simple_strtoul(this_opt + 9, NULL, 0);
3933 if((temp == 0) || (temp == 1)) { 4149 if((temp == 0) || (temp == 1)) {
3934 sisfb_scalelcd = temp ^ 1; 4150 sisfb_scalelcd = temp ^ 1;
3935 } 4151 }
3936 } else if(!strnicmp(this_opt, "tvxposoffset:", 13)) { 4152 } else if(!strnicmp(this_opt, "tvxposoffset:", 13)) {
3937 int temp = 0; 4153 int temp = 0;
3938 temp = (int)simple_strtol(this_opt + 13, NULL, 0); 4154 temp = (int)simple_strtol(this_opt + 13, NULL, 0);
3939 if((temp >= -32) && (temp <= 32)) { 4155 if((temp >= -32) && (temp <= 32)) {
3940 sisfb_tvxposoffset = temp; 4156 sisfb_tvxposoffset = temp;
3941 } 4157 }
3942 } else if(!strnicmp(this_opt, "tvyposoffset:", 13)) { 4158 } else if(!strnicmp(this_opt, "tvyposoffset:", 13)) {
3943 int temp = 0; 4159 int temp = 0;
3944 temp = (int)simple_strtol(this_opt + 13, NULL, 0); 4160 temp = (int)simple_strtol(this_opt + 13, NULL, 0);
3945 if((temp >= -32) && (temp <= 32)) { 4161 if((temp >= -32) && (temp <= 32)) {
3946 sisfb_tvyposoffset = temp; 4162 sisfb_tvyposoffset = temp;
3947 } 4163 }
3948 } else if(!strnicmp(this_opt, "specialtiming:", 14)) { 4164 } else if(!strnicmp(this_opt, "specialtiming:", 14)) {
3949 sisfb_search_specialtiming(this_opt + 14); 4165 sisfb_search_specialtiming(this_opt + 14);
3950 } else if(!strnicmp(this_opt, "lvdshl:", 7)) { 4166 } else if(!strnicmp(this_opt, "lvdshl:", 7)) {
3951 int temp = 4; 4167 int temp = 4;
3952 temp = simple_strtoul(this_opt + 7, NULL, 0); 4168 temp = simple_strtoul(this_opt + 7, NULL, 0);
3953 if((temp >= 0) && (temp <= 3)) { 4169 if((temp >= 0) && (temp <= 3)) {
3954 sisfb_lvdshl = temp; 4170 sisfb_lvdshl = temp;
3955 } 4171 }
3956 } else if(this_opt[0] >= '0' && this_opt[0] <= '9') { 4172 } else if(this_opt[0] >= '0' && this_opt[0] <= '9') {
3957 sisfb_search_mode(this_opt, TRUE); 4173 sisfb_search_mode(this_opt, TRUE);
3958#if !defined(__i386__) && !defined(__x86_64__) 4174#if !defined(__i386__) && !defined(__x86_64__)
3959 } else if(!strnicmp(this_opt, "resetcard", 9)) { 4175 } else if(!strnicmp(this_opt, "resetcard", 9)) {
3960 sisfb_resetcard = 1; 4176 sisfb_resetcard = 1;
3961 } else if(!strnicmp(this_opt, "videoram:", 9)) { 4177 } else if(!strnicmp(this_opt, "videoram:", 9)) {
3962 sisfb_videoram = simple_strtoul(this_opt + 9, NULL, 0); 4178 sisfb_videoram = simple_strtoul(this_opt + 9, NULL, 0);
3963#endif 4179#endif
3964 } else { 4180 } else {
3965 printk(KERN_INFO "sisfb: Invalid option %s\n", this_opt); 4181 printk(KERN_INFO "sisfb: Invalid option %s\n", this_opt);
@@ -3967,63 +4183,99 @@ SISINITSTATIC int __init sisfb_setup(char *options)
3967 4183
3968 } 4184 }
3969 4185
3970
3971
3972 return 0; 4186 return 0;
3973} 4187}
3974#endif 4188#endif
3975 4189
3976static UCHAR * __devinit sis_find_rom(struct pci_dev *pdev) 4190static int __devinit
4191sisfb_check_rom(SIS_IOTYPE1 *rom_base, struct sis_video_info *ivideo)
4192{
4193 SIS_IOTYPE1 *rom;
4194 int romptr;
4195
4196 if((readb(rom_base) != 0x55) || (readb(rom_base + 1) != 0xaa))
4197 return 0;
4198
4199 romptr = (readb(rom_base + 0x18) | (readb(rom_base + 0x19) << 8));
4200 if(romptr > (0x10000 - 8))
4201 return 0;
4202
4203 rom = rom_base + romptr;
4204
4205 if((readb(rom) != 'P') || (readb(rom + 1) != 'C') ||
4206 (readb(rom + 2) != 'I') || (readb(rom + 3) != 'R'))
4207 return 0;
4208
4209 if((readb(rom + 4) | (readb(rom + 5) << 8)) != ivideo->chip_vendor)
4210 return 0;
4211
4212 if((readb(rom + 6) | (readb(rom + 7) << 8)) != ivideo->chip_id)
4213 return 0;
4214
4215 return 1;
4216}
4217
4218static unsigned char * __devinit
4219sisfb_find_rom(struct pci_dev *pdev)
3977{ 4220{
3978 struct sis_video_info *ivideo = pci_get_drvdata(pdev); 4221 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
3979 USHORT pciid; 4222 SIS_IOTYPE1 *rom_base;
3980 int romptr; 4223 unsigned char *myrombase = NULL;
3981 UCHAR *myrombase; 4224 u32 temp;
3982 u32 temp; 4225#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,11)
3983 SIS_IOTYPE1 *rom_base, *rom; 4226 size_t romsize;
4227
4228 /* First, try the official pci ROM functions (except
4229 * on integrated chipsets which have no ROM).
4230 */
3984 4231
3985 if(!(myrombase = vmalloc(65536))) return NULL; 4232 if(!ivideo->nbridge) {
3986 4233
3987#if defined(__i386__) || defined(__x86_64__) 4234 if((rom_base = pci_map_rom(pdev, &romsize))) {
3988 4235
3989 for(temp = 0x000c0000; temp < 0x000f0000; temp += 0x00001000) { 4236 if(sisfb_check_rom(rom_base, ivideo)) {
3990 4237
3991 rom_base = ioremap(temp, 0x10000); 4238 if((myrombase = vmalloc(65536))) {
3992 if(!rom_base) continue;
3993 4239
3994 if((readb(rom_base) != 0x55) || (readb(rom_base + 1) != 0xaa)) { 4240 /* Work around bug in pci/rom.c: Folks forgot to check
3995 iounmap(rom_base); 4241 * whether the size retrieved from the BIOS image eventually
3996 continue; 4242 * is larger than the mapped size
3997 } 4243 */
4244 if(pci_resource_len(pdev, PCI_ROM_RESOURCE) < romsize)
4245 romsize = pci_resource_len(pdev, PCI_ROM_RESOURCE);
3998 4246
3999 romptr = (unsigned short)(readb(rom_base + 0x18) | (readb(rom_base + 0x19) << 8)); 4247 memcpy_fromio(myrombase, rom_base,
4000 if(romptr > (0x10000 - 8)) { 4248 (romsize > 65536) ? 65536 : romsize);
4001 iounmap(rom_base); 4249 }
4002 continue; 4250 }
4003 } 4251 pci_unmap_rom(pdev, rom_base);
4252 }
4253 }
4004 4254
4005 rom = rom_base + romptr; 4255 if(myrombase) return myrombase;
4256#endif
4006 4257
4007 if((readb(rom) != 'P') || (readb(rom + 1) != 'C') || 4258 /* Otherwise do it the conventional way. */
4008 (readb(rom + 2) != 'I') || (readb(rom + 3) != 'R')) {
4009 iounmap(rom_base);
4010 continue;
4011 }
4012 4259
4013 pciid = readb(rom + 4) | (readb(rom + 5) << 8); 4260#if defined(__i386__) || defined(__x86_64__)
4014 if(pciid != 0x1039) {
4015 iounmap(rom_base);
4016 continue;
4017 }
4018 4261
4019 pciid = readb(rom + 6) | (readb(rom + 7) << 8); 4262 for(temp = 0x000c0000; temp < 0x000f0000; temp += 0x00001000) {
4020 if(pciid == ivideo->chip_id) { 4263
4021 memcpy_fromio(myrombase, rom_base, 65536); 4264 rom_base = ioremap(temp, 65536);
4022 iounmap(rom_base); 4265 if(!rom_base)
4023 return myrombase; 4266 continue;
4024 } 4267
4268 if(!sisfb_check_rom(rom_base, ivideo)) {
4269 iounmap(rom_base);
4270 continue;
4271 }
4272
4273 if((myrombase = vmalloc(65536)))
4274 memcpy_fromio(myrombase, rom_base, 65536);
4275
4276 iounmap(rom_base);
4277 break;
4025 4278
4026 iounmap(rom_base);
4027 } 4279 }
4028 4280
4029#else 4281#else
@@ -4034,752 +4286,1603 @@ static UCHAR * __devinit sis_find_rom(struct pci_dev *pdev)
4034 4286
4035 rom_base = ioremap(ivideo->video_base, 65536); 4287 rom_base = ioremap(ivideo->video_base, 65536);
4036 if(rom_base) { 4288 if(rom_base) {
4037 if((readb(rom_base) == 0x55) && (readb(rom_base + 1) == 0xaa)) { 4289 if(sisfb_check_rom(rom_base, ivideo)) {
4038 romptr = (u16)(readb(rom_base + 0x18) | (readb(rom_base + 0x19) << 8)); 4290 if((myrombase = vmalloc(65536)))
4039 if(romptr <= (0x10000 - 8)) { 4291 memcpy_fromio(myrombase, rom_base, 65536);
4040 rom = rom_base + romptr; 4292 }
4041 if((readb(rom) == 'P') && (readb(rom + 1) == 'C') && 4293 iounmap(rom_base);
4042 (readb(rom + 2) == 'I') && (readb(rom + 3) == 'R')) {
4043 pciid = readb(rom + 4) | (readb(rom + 5) << 8);
4044 if(pciid == 0x1039) {
4045 pciid = readb(rom + 6) | (readb(rom + 7) << 8);
4046 if(pciid == ivideo->chip_id) {
4047 memcpy_fromio(myrombase, rom_base, 65536);
4048 iounmap(rom_base);
4049 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, temp);
4050 return myrombase;
4051 }
4052 }
4053 }
4054 }
4055 }
4056 iounmap(rom_base);
4057 } 4294 }
4058 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, temp); 4295
4296 pci_write_config_dword(pdev, PCI_ROM_ADDRESS, temp);
4059 4297
4060#endif 4298#endif
4061 4299
4062 vfree(myrombase); 4300 return myrombase;
4063 return NULL; 4301}
4302
4303static void __devinit
4304sisfb_post_map_vram(struct sis_video_info *ivideo, unsigned int *mapsize,
4305 unsigned int min)
4306{
4307 ivideo->video_vbase = ioremap(ivideo->video_base, (*mapsize));
4308
4309 if(!ivideo->video_vbase) {
4310 printk(KERN_ERR
4311 "sisfb: Unable to map maximum video RAM for size detection\n");
4312 (*mapsize) >>= 1;
4313 while((!(ivideo->video_vbase = ioremap(ivideo->video_base, (*mapsize))))) {
4314 (*mapsize) >>= 1;
4315 if((*mapsize) < (min << 20))
4316 break;
4317 }
4318 if(ivideo->video_vbase) {
4319 printk(KERN_ERR
4320 "sisfb: Video RAM size detection limited to %dMB\n",
4321 (int)((*mapsize) >> 20));
4322 }
4323 }
4064} 4324}
4065 4325
4066#ifdef CONFIG_FB_SIS_300 4326#ifdef CONFIG_FB_SIS_300
4067static int __devinit 4327static int __devinit
4068sisfb_chkbuswidth300(struct pci_dev *pdev, SIS_IOTYPE1 *FBAddress) 4328sisfb_post_300_buswidth(struct sis_video_info *ivideo)
4069{ 4329{
4070 struct sis_video_info *ivideo = pci_get_drvdata(pdev); 4330 SIS_IOTYPE1 *FBAddress = ivideo->video_vbase;
4331 unsigned short temp;
4332 unsigned char reg;
4071 int i, j; 4333 int i, j;
4072 USHORT temp; 4334
4073 UCHAR reg; 4335 andSISIDXREG(SISSR, 0x15, 0xFB);
4074 4336 orSISIDXREG(SISSR, 0x15, 0x04);
4075 andSISIDXREG(SISSR,0x15,0xFB); 4337 outSISIDXREG(SISSR, 0x13, 0x00);
4076 orSISIDXREG(SISSR,0x15,0x04); 4338 outSISIDXREG(SISSR, 0x14, 0xBF);
4077 outSISIDXREG(SISSR,0x13,0x00); 4339
4078 outSISIDXREG(SISSR,0x14,0xBF); 4340 for(i = 0; i < 2; i++) {
4079 4341 temp = 0x1234;
4080 for(i=0; i<2; i++) { 4342 for(j = 0; j < 4; j++) {
4081 temp = 0x1234; 4343 writew(temp, FBAddress);
4082 for(j=0; j<4; j++) { 4344 if(readw(FBAddress) == temp)
4083 writew(temp, FBAddress); 4345 break;
4084 if(readw(FBAddress) == temp) break; 4346 orSISIDXREG(SISSR, 0x3c, 0x01);
4085 orSISIDXREG(SISSR,0x3c,0x01); 4347 inSISIDXREG(SISSR, 0x05, reg);
4086 inSISIDXREG(SISSR,0x05,reg); 4348 inSISIDXREG(SISSR, 0x05, reg);
4087 inSISIDXREG(SISSR,0x05,reg); 4349 andSISIDXREG(SISSR, 0x3c, 0xfe);
4088 andSISIDXREG(SISSR,0x3c,0xfe); 4350 inSISIDXREG(SISSR, 0x05, reg);
4089 inSISIDXREG(SISSR,0x05,reg); 4351 inSISIDXREG(SISSR, 0x05, reg);
4090 inSISIDXREG(SISSR,0x05,reg); 4352 temp++;
4091 temp++; 4353 }
4092 }
4093 } 4354 }
4094 4355
4095 writel(0x01234567L, FBAddress); 4356 writel(0x01234567L, FBAddress);
4096 writel(0x456789ABL, (FBAddress+4)); 4357 writel(0x456789ABL, (FBAddress + 4));
4097 writel(0x89ABCDEFL, (FBAddress+8)); 4358 writel(0x89ABCDEFL, (FBAddress + 8));
4098 writel(0xCDEF0123L, (FBAddress+12)); 4359 writel(0xCDEF0123L, (FBAddress + 12));
4099 inSISIDXREG(SISSR,0x3b,reg); 4360
4361 inSISIDXREG(SISSR, 0x3b, reg);
4100 if(reg & 0x01) { 4362 if(reg & 0x01) {
4101 if(readl((FBAddress+12)) == 0xCDEF0123L) return(4); /* Channel A 128bit */ 4363 if(readl((FBAddress + 12)) == 0xCDEF0123L)
4364 return 4; /* Channel A 128bit */
4102 } 4365 }
4103 if(readl((FBAddress+4)) == 0x456789ABL) return(2); /* Channel B 64bit */ 4366
4104 return(1); /* 32bit */ 4367 if(readl((FBAddress + 4)) == 0x456789ABL)
4368 return 2; /* Channel B 64bit */
4369
4370 return 1; /* 32bit */
4371}
4372
4373static int __devinit
4374sisfb_post_300_rwtest(struct sis_video_info *ivideo, int iteration, int buswidth,
4375 int PseudoRankCapacity, int PseudoAdrPinCount,
4376 unsigned int mapsize)
4377{
4378 SIS_IOTYPE1 *FBAddr = ivideo->video_vbase;
4379 unsigned short sr14;
4380 unsigned int k, RankCapacity, PageCapacity, BankNumHigh, BankNumMid;
4381 unsigned int PhysicalAdrOtherPage, PhysicalAdrHigh, PhysicalAdrHalfPage;
4382 static const unsigned short SiS_DRAMType[17][5] = {
4383 {0x0C,0x0A,0x02,0x40,0x39},
4384 {0x0D,0x0A,0x01,0x40,0x48},
4385 {0x0C,0x09,0x02,0x20,0x35},
4386 {0x0D,0x09,0x01,0x20,0x44},
4387 {0x0C,0x08,0x02,0x10,0x31},
4388 {0x0D,0x08,0x01,0x10,0x40},
4389 {0x0C,0x0A,0x01,0x20,0x34},
4390 {0x0C,0x09,0x01,0x08,0x32},
4391 {0x0B,0x08,0x02,0x08,0x21},
4392 {0x0C,0x08,0x01,0x08,0x30},
4393 {0x0A,0x08,0x02,0x04,0x11},
4394 {0x0B,0x0A,0x01,0x10,0x28},
4395 {0x09,0x08,0x02,0x02,0x01},
4396 {0x0B,0x09,0x01,0x08,0x24},
4397 {0x0B,0x08,0x01,0x04,0x20},
4398 {0x0A,0x08,0x01,0x02,0x10},
4399 {0x09,0x08,0x01,0x01,0x00}
4400 };
4401
4402 for(k = 0; k <= 16; k++) {
4403
4404 RankCapacity = buswidth * SiS_DRAMType[k][3];
4405
4406 if(RankCapacity != PseudoRankCapacity)
4407 continue;
4408
4409 if((SiS_DRAMType[k][2] + SiS_DRAMType[k][0]) > PseudoAdrPinCount)
4410 continue;
4411
4412 BankNumHigh = RankCapacity * 16 * iteration - 1;
4413 if(iteration == 3) { /* Rank No */
4414 BankNumMid = RankCapacity * 16 - 1;
4415 } else {
4416 BankNumMid = RankCapacity * 16 * iteration / 2 - 1;
4417 }
4418
4419 PageCapacity = (1 << SiS_DRAMType[k][1]) * buswidth * 4;
4420 PhysicalAdrHigh = BankNumHigh;
4421 PhysicalAdrHalfPage = (PageCapacity / 2 + PhysicalAdrHigh) % PageCapacity;
4422 PhysicalAdrOtherPage = PageCapacity * SiS_DRAMType[k][2] + PhysicalAdrHigh;
4423
4424 andSISIDXREG(SISSR, 0x15, 0xFB); /* Test */
4425 orSISIDXREG(SISSR, 0x15, 0x04); /* Test */
4426 sr14 = (SiS_DRAMType[k][3] * buswidth) - 1;
4427 if(buswidth == 4) sr14 |= 0x80;
4428 else if(buswidth == 2) sr14 |= 0x40;
4429 outSISIDXREG(SISSR, 0x13, SiS_DRAMType[k][4]);
4430 outSISIDXREG(SISSR, 0x14, sr14);
4431
4432 BankNumHigh <<= 16;
4433 BankNumMid <<= 16;
4434
4435 if((BankNumHigh + PhysicalAdrHigh >= mapsize) ||
4436 (BankNumMid + PhysicalAdrHigh >= mapsize) ||
4437 (BankNumHigh + PhysicalAdrHalfPage >= mapsize) ||
4438 (BankNumHigh + PhysicalAdrOtherPage >= mapsize))
4439 continue;
4440
4441 /* Write data */
4442 writew(((unsigned short)PhysicalAdrHigh),
4443 (FBAddr + BankNumHigh + PhysicalAdrHigh));
4444 writew(((unsigned short)BankNumMid),
4445 (FBAddr + BankNumMid + PhysicalAdrHigh));
4446 writew(((unsigned short)PhysicalAdrHalfPage),
4447 (FBAddr + BankNumHigh + PhysicalAdrHalfPage));
4448 writew(((unsigned short)PhysicalAdrOtherPage),
4449 (FBAddr + BankNumHigh + PhysicalAdrOtherPage));
4450
4451 /* Read data */
4452 if(readw(FBAddr + BankNumHigh + PhysicalAdrHigh) == PhysicalAdrHigh)
4453 return 1;
4454 }
4455
4456 return 0;
4105} 4457}
4106 4458
4107static void __devinit 4459static void __devinit
4108sisfb_setramsize300(struct pci_dev *pdev) 4460sisfb_post_300_ramsize(struct pci_dev *pdev, unsigned int mapsize)
4109{ 4461{
4110 struct sis_video_info *ivideo = pci_get_drvdata(pdev); 4462 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
4111 SIS_IOTYPE1 *FBAddr = ivideo->video_vbase; 4463 int i, j, buswidth;
4112 SIS_IOTYPE1 *Addr; 4464 int PseudoRankCapacity, PseudoAdrPinCount;
4113 USHORT sr13, sr14=0, buswidth, Done, data, TotalCapacity, PhysicalAdrOtherPage=0; 4465
4114 int PseudoRankCapacity, PseudoTotalCapacity, PseudoAdrPinCount; 4466 buswidth = sisfb_post_300_buswidth(ivideo);
4115 int RankCapacity, AdrPinCount, BankNumHigh, BankNumMid, MB2Bank; 4467
4116 int PageCapacity, PhysicalAdrHigh, PhysicalAdrHalfPage, i, j, k; 4468 for(i = 6; i >= 0; i--) {
4117 const USHORT SiS_DRAMType[17][5] = { 4469 PseudoRankCapacity = 1 << i;
4118 {0x0C,0x0A,0x02,0x40,0x39}, 4470 for(j = 4; j >= 1; j--) {
4119 {0x0D,0x0A,0x01,0x40,0x48}, 4471 PseudoAdrPinCount = 15 - j;
4120 {0x0C,0x09,0x02,0x20,0x35}, 4472 if((PseudoRankCapacity * j) <= 64) {
4121 {0x0D,0x09,0x01,0x20,0x44}, 4473 if(sisfb_post_300_rwtest(ivideo,
4122 {0x0C,0x08,0x02,0x10,0x31}, 4474 j,
4123 {0x0D,0x08,0x01,0x10,0x40}, 4475 buswidth,
4124 {0x0C,0x0A,0x01,0x20,0x34}, 4476 PseudoRankCapacity,
4125 {0x0C,0x09,0x01,0x08,0x32}, 4477 PseudoAdrPinCount,
4126 {0x0B,0x08,0x02,0x08,0x21}, 4478 mapsize))
4127 {0x0C,0x08,0x01,0x08,0x30}, 4479 return;
4128 {0x0A,0x08,0x02,0x04,0x11}, 4480 }
4129 {0x0B,0x0A,0x01,0x10,0x28}, 4481 }
4130 {0x09,0x08,0x02,0x02,0x01}, 4482 }
4131 {0x0B,0x09,0x01,0x08,0x24},
4132 {0x0B,0x08,0x01,0x04,0x20},
4133 {0x0A,0x08,0x01,0x02,0x10},
4134 {0x09,0x08,0x01,0x01,0x00}
4135 };
4136
4137 buswidth = sisfb_chkbuswidth300(pdev, FBAddr);
4138
4139 MB2Bank = 16;
4140 Done = 0;
4141 for(i = 6; i >= 0; i--) {
4142 if(Done) break;
4143 PseudoRankCapacity = 1 << i;
4144 for(j = 4; j >= 1; j--) {
4145 if(Done) break;
4146 PseudoTotalCapacity = PseudoRankCapacity * j;
4147 PseudoAdrPinCount = 15 - j;
4148 if(PseudoTotalCapacity <= 64) {
4149 for(k = 0; k <= 16; k++) {
4150 if(Done) break;
4151 RankCapacity = buswidth * SiS_DRAMType[k][3];
4152 AdrPinCount = SiS_DRAMType[k][2] + SiS_DRAMType[k][0];
4153 if(RankCapacity == PseudoRankCapacity)
4154 if(AdrPinCount <= PseudoAdrPinCount) {
4155 if(j == 3) { /* Rank No */
4156 BankNumHigh = RankCapacity * MB2Bank * 3 - 1;
4157 BankNumMid = RankCapacity * MB2Bank * 1 - 1;
4158 } else {
4159 BankNumHigh = RankCapacity * MB2Bank * j - 1;
4160 BankNumMid = RankCapacity * MB2Bank * j / 2 - 1;
4161 }
4162 PageCapacity = (1 << SiS_DRAMType[k][1]) * buswidth * 4;
4163 PhysicalAdrHigh = BankNumHigh;
4164 PhysicalAdrHalfPage = (PageCapacity / 2 + PhysicalAdrHigh) % PageCapacity;
4165 PhysicalAdrOtherPage = PageCapacity * SiS_DRAMType[k][2] + PhysicalAdrHigh;
4166 /* Write data */
4167 andSISIDXREG(SISSR,0x15,0xFB); /* Test */
4168 orSISIDXREG(SISSR,0x15,0x04); /* Test */
4169 TotalCapacity = SiS_DRAMType[k][3] * buswidth;
4170 sr13 = SiS_DRAMType[k][4];
4171 if(buswidth == 4) sr14 = (TotalCapacity - 1) | 0x80;
4172 if(buswidth == 2) sr14 = (TotalCapacity - 1) | 0x40;
4173 if(buswidth == 1) sr14 = (TotalCapacity - 1) | 0x00;
4174 outSISIDXREG(SISSR,0x13,sr13);
4175 outSISIDXREG(SISSR,0x14,sr14);
4176 Addr = FBAddr + BankNumHigh * 64 * 1024 + PhysicalAdrHigh;
4177 /* *((USHORT *)(Addr)) = (USHORT)PhysicalAdrHigh; */
4178 writew(((USHORT)PhysicalAdrHigh), Addr);
4179 Addr = FBAddr + BankNumMid * 64 * 1024 + PhysicalAdrHigh;
4180 /* *((USHORT *)(Addr)) = (USHORT)BankNumMid; */
4181 writew(((USHORT)BankNumMid), Addr);
4182 Addr = FBAddr + BankNumHigh * 64 * 1024 + PhysicalAdrHalfPage;
4183 /* *((USHORT *)(Addr)) = (USHORT)PhysicalAdrHalfPage; */
4184 writew(((USHORT)PhysicalAdrHalfPage), Addr);
4185 Addr = FBAddr + BankNumHigh * 64 * 1024 + PhysicalAdrOtherPage;
4186 /* *((USHORT *)(Addr)) = PhysicalAdrOtherPage; */
4187 writew(((USHORT)PhysicalAdrOtherPage), Addr);
4188 /* Read data */
4189 Addr = FBAddr + BankNumHigh * 64 * 1024 + PhysicalAdrHigh;
4190 data = readw(Addr); /* *((USHORT *)(Addr)); */
4191 if(data == PhysicalAdrHigh) Done = 1;
4192 } /* if */
4193 } /* for k */
4194 } /* if */
4195 } /* for j */
4196 } /* for i */
4197} 4483}
4198 4484
4199static void __devinit sisfb_post_sis300(struct pci_dev *pdev) 4485static void __devinit
4486sisfb_post_sis300(struct pci_dev *pdev)
4200{ 4487{
4201 struct sis_video_info *ivideo = pci_get_drvdata(pdev); 4488 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
4489 unsigned char *bios = ivideo->SiS_Pr.VirtualRomBase;
4202 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; 4490 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8;
4203 u16 index, rindex, memtype = 0; 4491 u16 index, rindex, memtype = 0;
4492 unsigned int mapsize;
4204 4493
4205 outSISIDXREG(SISSR,0x05,0x86); 4494 if(!ivideo->SiS_Pr.UseROM)
4495 bios = NULL;
4206 4496
4207 if(ivideo->sishw_ext.UseROM) { 4497 outSISIDXREG(SISSR, 0x05, 0x86);
4208 if(ivideo->sishw_ext.pjVirtualRomBase[0x52] & 0x80) { 4498
4209 memtype = ivideo->sishw_ext.pjVirtualRomBase[0x52]; 4499 if(bios) {
4210 } else { 4500 if(bios[0x52] & 0x80) {
4211 inSISIDXREG(SISSR,0x3a,memtype); 4501 memtype = bios[0x52];
4212 } 4502 } else {
4213 memtype &= 0x07; 4503 inSISIDXREG(SISSR, 0x3a, memtype);
4504 }
4505 memtype &= 0x07;
4214 } 4506 }
4215 4507
4508 v3 = 0x80; v6 = 0x80;
4216 if(ivideo->revision_id <= 0x13) { 4509 if(ivideo->revision_id <= 0x13) {
4217 v1 = 0x44; v2 = 0x42; v3 = 0x80; 4510 v1 = 0x44; v2 = 0x42;
4218 v4 = 0x44; v5 = 0x42; v6 = 0x80; 4511 v4 = 0x44; v5 = 0x42;
4219 } else { 4512 } else {
4220 v1 = 0x68; v2 = 0x43; v3 = 0x80; /* Assume 125Mhz MCLK */ 4513 v1 = 0x68; v2 = 0x43; /* Assume 125Mhz MCLK */
4221 v4 = 0x68; v5 = 0x43; v6 = 0x80; /* Assume 125Mhz ECLK */ 4514 v4 = 0x68; v5 = 0x43; /* Assume 125Mhz ECLK */
4222 if(ivideo->sishw_ext.UseROM) { 4515 if(bios) {
4223 index = memtype * 5; 4516 index = memtype * 5;
4224 rindex = index + 0x54; 4517 rindex = index + 0x54;
4225 v1 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 4518 v1 = bios[rindex++];
4226 v2 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 4519 v2 = bios[rindex++];
4227 v3 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 4520 v3 = bios[rindex++];
4228 rindex = index + 0x7c; 4521 rindex = index + 0x7c;
4229 v4 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 4522 v4 = bios[rindex++];
4230 v5 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 4523 v5 = bios[rindex++];
4231 v6 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 4524 v6 = bios[rindex++];
4232 } 4525 }
4233 } 4526 }
4234 outSISIDXREG(SISSR,0x28,v1); 4527 outSISIDXREG(SISSR, 0x28, v1);
4235 outSISIDXREG(SISSR,0x29,v2); 4528 outSISIDXREG(SISSR, 0x29, v2);
4236 outSISIDXREG(SISSR,0x2a,v3); 4529 outSISIDXREG(SISSR, 0x2a, v3);
4237 outSISIDXREG(SISSR,0x2e,v4); 4530 outSISIDXREG(SISSR, 0x2e, v4);
4238 outSISIDXREG(SISSR,0x2f,v5); 4531 outSISIDXREG(SISSR, 0x2f, v5);
4239 outSISIDXREG(SISSR,0x30,v6); 4532 outSISIDXREG(SISSR, 0x30, v6);
4533
4240 v1 = 0x10; 4534 v1 = 0x10;
4241 if(ivideo->sishw_ext.UseROM) v1 = ivideo->sishw_ext.pjVirtualRomBase[0xa4]; 4535 if(bios)
4242 outSISIDXREG(SISSR,0x07,v1); /* DAC speed */ 4536 v1 = bios[0xa4];
4243 outSISIDXREG(SISSR,0x11,0x0f); /* DDC, power save */ 4537 outSISIDXREG(SISSR, 0x07, v1); /* DAC speed */
4538
4539 outSISIDXREG(SISSR, 0x11, 0x0f); /* DDC, power save */
4540
4244 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a; 4541 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a;
4245 v5 = 0x06; v6 = 0x00; v7 = 0x00; v8 = 0x00; 4542 v5 = 0x06; v6 = 0x00; v7 = 0x00; v8 = 0x00;
4246 if(ivideo->sishw_ext.UseROM) { 4543 if(bios) {
4247 memtype += 0xa5; 4544 memtype += 0xa5;
4248 v1 = ivideo->sishw_ext.pjVirtualRomBase[memtype]; 4545 v1 = bios[memtype];
4249 v2 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 8]; 4546 v2 = bios[memtype + 8];
4250 v3 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 16]; 4547 v3 = bios[memtype + 16];
4251 v4 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 24]; 4548 v4 = bios[memtype + 24];
4252 v5 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 32]; 4549 v5 = bios[memtype + 32];
4253 v6 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 40]; 4550 v6 = bios[memtype + 40];
4254 v7 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 48]; 4551 v7 = bios[memtype + 48];
4255 v8 = ivideo->sishw_ext.pjVirtualRomBase[memtype + 56]; 4552 v8 = bios[memtype + 56];
4256 } 4553 }
4257 if(ivideo->revision_id >= 0x80) v3 &= 0xfd; 4554 if(ivideo->revision_id >= 0x80)
4258 outSISIDXREG(SISSR,0x15,v1); /* Ram type (assuming 0, BIOS 0xa5 step 8) */ 4555 v3 &= 0xfd;
4259 outSISIDXREG(SISSR,0x16,v2); 4556 outSISIDXREG(SISSR, 0x15, v1); /* Ram type (assuming 0, BIOS 0xa5 step 8) */
4260 outSISIDXREG(SISSR,0x17,v3); 4557 outSISIDXREG(SISSR, 0x16, v2);
4261 outSISIDXREG(SISSR,0x18,v4); 4558 outSISIDXREG(SISSR, 0x17, v3);
4262 outSISIDXREG(SISSR,0x19,v5); 4559 outSISIDXREG(SISSR, 0x18, v4);
4263 outSISIDXREG(SISSR,0x1a,v6); 4560 outSISIDXREG(SISSR, 0x19, v5);
4264 outSISIDXREG(SISSR,0x1b,v7); 4561 outSISIDXREG(SISSR, 0x1a, v6);
4265 outSISIDXREG(SISSR,0x1c,v8); /* ---- */ 4562 outSISIDXREG(SISSR, 0x1b, v7);
4266 andSISIDXREG(SISSR,0x15,0xfb); 4563 outSISIDXREG(SISSR, 0x1c, v8); /* ---- */
4267 orSISIDXREG(SISSR,0x15,0x04); 4564 andSISIDXREG(SISSR, 0x15 ,0xfb);
4268 if(ivideo->sishw_ext.UseROM) { 4565 orSISIDXREG(SISSR, 0x15, 0x04);
4269 if(ivideo->sishw_ext.pjVirtualRomBase[0x53] & 0x02) { 4566 if(bios) {
4270 orSISIDXREG(SISSR,0x19,0x20); 4567 if(bios[0x53] & 0x02) {
4271 } 4568 orSISIDXREG(SISSR, 0x19, 0x20);
4569 }
4272 } 4570 }
4273 v1 = 0x04; /* DAC pedestal (BIOS 0xe5) */ 4571 v1 = 0x04; /* DAC pedestal (BIOS 0xe5) */
4274 if(ivideo->revision_id >= 0x80) v1 |= 0x01; 4572 if(ivideo->revision_id >= 0x80)
4275 outSISIDXREG(SISSR,0x1f,v1); 4573 v1 |= 0x01;
4276 outSISIDXREG(SISSR,0x20,0xa0); /* linear & relocated io */ 4574 outSISIDXREG(SISSR, 0x1f, v1);
4575 outSISIDXREG(SISSR, 0x20, 0xa4); /* linear & relocated io & disable a0000 */
4277 v1 = 0xf6; v2 = 0x0d; v3 = 0x00; 4576 v1 = 0xf6; v2 = 0x0d; v3 = 0x00;
4278 if(ivideo->sishw_ext.UseROM) { 4577 if(bios) {
4279 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xe8]; 4578 v1 = bios[0xe8];
4280 v2 = ivideo->sishw_ext.pjVirtualRomBase[0xe9]; 4579 v2 = bios[0xe9];
4281 v3 = ivideo->sishw_ext.pjVirtualRomBase[0xea]; 4580 v3 = bios[0xea];
4282 } 4581 }
4283 outSISIDXREG(SISSR,0x23,v1); 4582 outSISIDXREG(SISSR, 0x23, v1);
4284 outSISIDXREG(SISSR,0x24,v2); 4583 outSISIDXREG(SISSR, 0x24, v2);
4285 outSISIDXREG(SISSR,0x25,v3); 4584 outSISIDXREG(SISSR, 0x25, v3);
4286 outSISIDXREG(SISSR,0x21,0x84); 4585 outSISIDXREG(SISSR, 0x21, 0x84);
4287 outSISIDXREG(SISSR,0x22,0x00); 4586 outSISIDXREG(SISSR, 0x22, 0x00);
4288 outSISIDXREG(SISCR,0x37,0x00); 4587 outSISIDXREG(SISCR, 0x37, 0x00);
4289 orSISIDXREG(SISPART1,0x24,0x01); /* unlock crt2 */ 4588 orSISIDXREG(SISPART1, 0x24, 0x01); /* unlock crt2 */
4290 outSISIDXREG(SISPART1,0x00,0x00); 4589 outSISIDXREG(SISPART1, 0x00, 0x00);
4291 v1 = 0x40; v2 = 0x11; 4590 v1 = 0x40; v2 = 0x11;
4292 if(ivideo->sishw_ext.UseROM) { 4591 if(bios) {
4293 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xec]; 4592 v1 = bios[0xec];
4294 v2 = ivideo->sishw_ext.pjVirtualRomBase[0xeb]; 4593 v2 = bios[0xeb];
4295 } 4594 }
4296 outSISIDXREG(SISPART1,0x02,v1); 4595 outSISIDXREG(SISPART1, 0x02, v1);
4297 if(ivideo->revision_id >= 0x80) v2 &= ~0x01; 4596
4298 inSISIDXREG(SISPART4,0x00,reg); 4597 if(ivideo->revision_id >= 0x80)
4598 v2 &= ~0x01;
4599
4600 inSISIDXREG(SISPART4, 0x00, reg);
4299 if((reg == 1) || (reg == 2)) { 4601 if((reg == 1) || (reg == 2)) {
4300 outSISIDXREG(SISCR,0x37,0x02); 4602 outSISIDXREG(SISCR, 0x37, 0x02);
4301 outSISIDXREG(SISPART2,0x00,0x1c); 4603 outSISIDXREG(SISPART2, 0x00, 0x1c);
4302 v4 = 0x00; v5 = 0x00; v6 = 0x10; 4604 v4 = 0x00; v5 = 0x00; v6 = 0x10;
4303 if(ivideo->sishw_ext.UseROM) { 4605 if(ivideo->SiS_Pr.UseROM) {
4304 v4 = ivideo->sishw_ext.pjVirtualRomBase[0xf5]; 4606 v4 = bios[0xf5];
4305 v5 = ivideo->sishw_ext.pjVirtualRomBase[0xf6]; 4607 v5 = bios[0xf6];
4306 v6 = ivideo->sishw_ext.pjVirtualRomBase[0xf7]; 4608 v6 = bios[0xf7];
4307 } 4609 }
4308 outSISIDXREG(SISPART4,0x0d,v4); 4610 outSISIDXREG(SISPART4, 0x0d, v4);
4309 outSISIDXREG(SISPART4,0x0e,v5); 4611 outSISIDXREG(SISPART4, 0x0e, v5);
4310 outSISIDXREG(SISPART4,0x10,v6); 4612 outSISIDXREG(SISPART4, 0x10, v6);
4311 outSISIDXREG(SISPART4,0x0f,0x3f); 4613 outSISIDXREG(SISPART4, 0x0f, 0x3f);
4312 inSISIDXREG(SISPART4,0x01,reg); 4614 inSISIDXREG(SISPART4, 0x01, reg);
4313 if(reg >= 0xb0) { 4615 if(reg >= 0xb0) {
4314 inSISIDXREG(SISPART4,0x23,reg); 4616 inSISIDXREG(SISPART4, 0x23, reg);
4315 reg &= 0x20; 4617 reg &= 0x20;
4316 reg <<= 1; 4618 reg <<= 1;
4317 outSISIDXREG(SISPART4,0x23,reg); 4619 outSISIDXREG(SISPART4, 0x23, reg);
4318 } 4620 }
4319 } else { 4621 } else {
4320 v2 &= ~0x10; 4622 v2 &= ~0x10;
4321 } 4623 }
4322 outSISIDXREG(SISSR,0x32,v2); 4624 outSISIDXREG(SISSR, 0x32, v2);
4323 andSISIDXREG(SISPART1,0x24,0xfe); /* Lock CRT2 */ 4625
4324 inSISIDXREG(SISSR,0x16,reg); 4626 andSISIDXREG(SISPART1, 0x24, 0xfe); /* Lock CRT2 */
4627
4628 inSISIDXREG(SISSR, 0x16, reg);
4325 reg &= 0xc3; 4629 reg &= 0xc3;
4326 outSISIDXREG(SISCR,0x35,reg); 4630 outSISIDXREG(SISCR, 0x35, reg);
4327 outSISIDXREG(SISCR,0x83,0x00); 4631 outSISIDXREG(SISCR, 0x83, 0x00);
4328#if !defined(__i386__) && !defined(__x86_64__) 4632#if !defined(__i386__) && !defined(__x86_64__)
4329 if(sisfb_videoram) { 4633 if(sisfb_videoram) {
4330 outSISIDXREG(SISSR,0x13,0x28); /* ? */ 4634 outSISIDXREG(SISSR, 0x13, 0x28); /* ? */
4331 reg = ((sisfb_videoram >> 10) - 1) | 0x40; 4635 reg = ((sisfb_videoram >> 10) - 1) | 0x40;
4332 outSISIDXREG(SISSR,0x14,reg); 4636 outSISIDXREG(SISSR, 0x14, reg);
4333 } else { 4637 } else {
4334#endif 4638#endif
4335 /* Need to map max FB size for finding out about RAM size */ 4639 /* Need to map max FB size for finding out about RAM size */
4336 ivideo->video_vbase = ioremap(ivideo->video_base, 0x4000000); 4640 mapsize = 64 << 20;
4337 if(ivideo->video_vbase) { 4641 sisfb_post_map_vram(ivideo, &mapsize, 4);
4338 sisfb_setramsize300(pdev); 4642
4339 iounmap(ivideo->video_vbase); 4643 if(ivideo->video_vbase) {
4340 } else { 4644 sisfb_post_300_ramsize(pdev, mapsize);
4341 printk(KERN_DEBUG "sisfb: Failed to map memory for size detection, assuming 8MB\n"); 4645 iounmap(ivideo->video_vbase);
4342 outSISIDXREG(SISSR,0x13,0x28); /* ? */ 4646 } else {
4343 outSISIDXREG(SISSR,0x14,0x47); /* 8MB, 64bit default */ 4647 printk(KERN_DEBUG
4344 } 4648 "sisfb: Failed to map memory for size detection, assuming 8MB\n");
4649 outSISIDXREG(SISSR, 0x13, 0x28); /* ? */
4650 outSISIDXREG(SISSR, 0x14, 0x47); /* 8MB, 64bit default */
4651 }
4345#if !defined(__i386__) && !defined(__x86_64__) 4652#if !defined(__i386__) && !defined(__x86_64__)
4346 } 4653 }
4347#endif 4654#endif
4348 if(ivideo->sishw_ext.UseROM) { 4655 if(bios) {
4349 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xe6]; 4656 v1 = bios[0xe6];
4350 v2 = ivideo->sishw_ext.pjVirtualRomBase[0xe7]; 4657 v2 = bios[0xe7];
4351 } else { 4658 } else {
4352 inSISIDXREG(SISSR,0x3a,reg); 4659 inSISIDXREG(SISSR, 0x3a, reg);
4353 if((reg & 0x30) == 0x30) { 4660 if((reg & 0x30) == 0x30) {
4354 v1 = 0x04; /* PCI */ 4661 v1 = 0x04; /* PCI */
4355 v2 = 0x92; 4662 v2 = 0x92;
4356 } else { 4663 } else {
4357 v1 = 0x14; /* AGP */ 4664 v1 = 0x14; /* AGP */
4358 v2 = 0xb2; 4665 v2 = 0xb2;
4359 } 4666 }
4360 } 4667 }
4361 outSISIDXREG(SISSR,0x21,v1); 4668 outSISIDXREG(SISSR, 0x21, v1);
4362 outSISIDXREG(SISSR,0x22,v2); 4669 outSISIDXREG(SISSR, 0x22, v2);
4670
4671 /* Sense CRT1 */
4672 sisfb_sense_crt1(ivideo);
4673
4674 /* Set default mode, don't clear screen */
4675 ivideo->SiS_Pr.SiS_UseOEM = FALSE;
4676 SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE);
4677 SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE);
4678 ivideo->curFSTN = ivideo->curDSTN = 0;
4679 ivideo->SiS_Pr.VideoMemorySize = 8 << 20;
4680 SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80);
4681
4682 outSISIDXREG(SISSR, 0x05, 0x86);
4683
4684 /* Display off */
4685 orSISIDXREG(SISSR, 0x01, 0x20);
4686
4687 /* Save mode number in CR34 */
4688 outSISIDXREG(SISCR, 0x34, 0x2e);
4689
4690 /* Let everyone know what the current mode is */
4691 ivideo->modeprechange = 0x2e;
4363} 4692}
4364#endif 4693#endif
4365 4694
4366#ifdef CONFIG_FB_SIS_315 4695#ifdef CONFIG_FB_SIS_315
4367static void __devinit sisfb_post_sis315330(struct pci_dev *pdev) 4696#if 0
4697static void __devinit
4698sisfb_post_sis315330(struct pci_dev *pdev)
4368{ 4699{
4369#ifdef YET_TO_BE_DONE 4700 /* TODO */
4370 struct sis_video_info *ivideo = pci_get_drvdata(pdev); 4701}
4371 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; 4702#endif
4372 u16 index, rindex, memtype = 0; 4703
4373 u32 reg1_32, reg2_32, reg3_32; 4704static void __devinit
4705sisfb_post_xgi_delay(struct sis_video_info *ivideo, int delay)
4706{
4707 unsigned int i;
4708 u8 reg;
4709
4710 for(i = 0; i <= (delay * 10 * 36); i++) {
4711 inSISIDXREG(SISSR, 0x05, reg);
4712 reg++;
4713 }
4714}
4715
4716static int __devinit
4717sisfb_find_host_bridge(struct sis_video_info *ivideo, struct pci_dev *mypdev,
4718 unsigned short pcivendor)
4719{
4720 struct pci_dev *pdev = NULL;
4721 unsigned short temp;
4722 int ret = 0;
4723
4724 while((pdev = SIS_PCI_GET_CLASS(PCI_CLASS_BRIDGE_HOST, pdev))) {
4725 temp = pdev->vendor;
4726 SIS_PCI_PUT_DEVICE(pdev);
4727 if(temp == pcivendor) {
4728 ret = 1;
4729 break;
4730 }
4731 }
4732
4733 return ret;
4734}
4735
4736static int __devinit
4737sisfb_post_xgi_rwtest(struct sis_video_info *ivideo, int starta,
4738 unsigned int enda, unsigned int mapsize)
4739{
4740 unsigned int pos;
4374 int i; 4741 int i;
4375 4742
4376 /* Unlock */ 4743 writel(0, ivideo->video_vbase);
4377 /* outSISIDXREG(0x3c4,0x05,0x86); */
4378 outSISIDXREG(SISSR,0x05,0x86);
4379 4744
4380 /* Enable relocated i/o ports */ 4745 for(i = starta; i <= enda; i++) {
4381 /* setSISIDXREG(0x3c4,0x20,~0x10,0x20); */ 4746 pos = 1 << i;
4382 setSISIDXREG(SISSR,0x20,~0x10,0x20); 4747 if(pos < mapsize)
4748 writel(pos, ivideo->video_vbase + pos);
4749 }
4750
4751 sisfb_post_xgi_delay(ivideo, 150);
4752
4753 if(readl(ivideo->video_vbase) != 0)
4754 return 0;
4383 4755
4384 /* Clear regs */ 4756 for(i = starta; i <= enda; i++) {
4757 pos = 1 << i;
4758 if(pos < mapsize) {
4759 if(readl(ivideo->video_vbase + pos) != pos)
4760 return 0;
4761 } else
4762 return 0;
4763 }
4764
4765 return 1;
4766}
4767
4768static void __devinit
4769sisfb_post_xgi_ramsize(struct sis_video_info *ivideo)
4770{
4771 unsigned int buswidth, ranksize, channelab, mapsize;
4772 int i, j, k, l;
4773 u8 reg, sr14;
4774 static const u8 dramsr13[12 * 5] = {
4775 0x02, 0x0e, 0x0b, 0x80, 0x5d,
4776 0x02, 0x0e, 0x0a, 0x40, 0x59,
4777 0x02, 0x0d, 0x0b, 0x40, 0x4d,
4778 0x02, 0x0e, 0x09, 0x20, 0x55,
4779 0x02, 0x0d, 0x0a, 0x20, 0x49,
4780 0x02, 0x0c, 0x0b, 0x20, 0x3d,
4781 0x02, 0x0e, 0x08, 0x10, 0x51,
4782 0x02, 0x0d, 0x09, 0x10, 0x45,
4783 0x02, 0x0c, 0x0a, 0x10, 0x39,
4784 0x02, 0x0d, 0x08, 0x08, 0x41,
4785 0x02, 0x0c, 0x09, 0x08, 0x35,
4786 0x02, 0x0c, 0x08, 0x04, 0x31
4787 };
4788 static const u8 dramsr13_4[4 * 5] = {
4789 0x02, 0x0d, 0x09, 0x40, 0x45,
4790 0x02, 0x0c, 0x09, 0x20, 0x35,
4791 0x02, 0x0c, 0x08, 0x10, 0x31,
4792 0x02, 0x0b, 0x08, 0x08, 0x21
4793 };
4794
4795 /* Enable linear mode, disable 0xa0000 address decoding */
4796 /* We disable a0000 address decoding, because
4797 * - if running on x86, if the card is disabled, it means
4798 * that another card is in the system. We don't want
4799 * to interphere with that primary card's textmode.
4800 * - if running on non-x86, there usually is no VGA window
4801 * at a0000.
4802 */
4803 orSISIDXREG(SISSR, 0x20, (0x80 | 0x04));
4804
4805 /* Need to map max FB size for finding out about RAM size */
4806 mapsize = 256 << 20;
4807 sisfb_post_map_vram(ivideo, &mapsize, 32);
4808
4809 if(!ivideo->video_vbase) {
4810 printk(KERN_ERR "sisfb: Unable to detect RAM size. Setting default.\n");
4811 outSISIDXREG(SISSR, 0x13, 0x35);
4812 outSISIDXREG(SISSR, 0x14, 0x41);
4813 /* TODO */
4814 return;
4815 }
4816
4817 /* Non-interleaving */
4818 outSISIDXREG(SISSR, 0x15, 0x00);
4819 /* No tiling */
4820 outSISIDXREG(SISSR, 0x1c, 0x00);
4821
4822 if(ivideo->chip == XGI_20) {
4823
4824 channelab = 1;
4825 inSISIDXREG(SISCR, 0x97, reg);
4826 if(!(reg & 0x01)) { /* Single 32/16 */
4827 buswidth = 32;
4828 outSISIDXREG(SISSR, 0x13, 0xb1);
4829 outSISIDXREG(SISSR, 0x14, 0x52);
4830 sisfb_post_xgi_delay(ivideo, 1);
4831 sr14 = 0x02;
4832 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4833 goto bail_out;
4834
4835 outSISIDXREG(SISSR, 0x13, 0x31);
4836 outSISIDXREG(SISSR, 0x14, 0x42);
4837 sisfb_post_xgi_delay(ivideo, 1);
4838 if(sisfb_post_xgi_rwtest(ivideo, 23, 23, mapsize))
4839 goto bail_out;
4840
4841 buswidth = 16;
4842 outSISIDXREG(SISSR, 0x13, 0xb1);
4843 outSISIDXREG(SISSR, 0x14, 0x41);
4844 sisfb_post_xgi_delay(ivideo, 1);
4845 sr14 = 0x01;
4846 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4847 goto bail_out;
4848 else
4849 outSISIDXREG(SISSR, 0x13, 0x31);
4850 } else { /* Dual 16/8 */
4851 buswidth = 16;
4852 outSISIDXREG(SISSR, 0x13, 0xb1);
4853 outSISIDXREG(SISSR, 0x14, 0x41);
4854 sisfb_post_xgi_delay(ivideo, 1);
4855 sr14 = 0x01;
4856 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4857 goto bail_out;
4858
4859 outSISIDXREG(SISSR, 0x13, 0x31);
4860 outSISIDXREG(SISSR, 0x14, 0x31);
4861 sisfb_post_xgi_delay(ivideo, 1);
4862 if(sisfb_post_xgi_rwtest(ivideo, 22, 22, mapsize))
4863 goto bail_out;
4864
4865 buswidth = 8;
4866 outSISIDXREG(SISSR, 0x13, 0xb1);
4867 outSISIDXREG(SISSR, 0x14, 0x30);
4868 sisfb_post_xgi_delay(ivideo, 1);
4869 sr14 = 0x00;
4870 if(sisfb_post_xgi_rwtest(ivideo, 21, 22, mapsize))
4871 goto bail_out;
4872 else
4873 outSISIDXREG(SISSR, 0x13, 0x31);
4874 }
4875
4876 } else { /* XGI_40 */
4877
4878 inSISIDXREG(SISCR, 0x97, reg);
4879 if(!(reg & 0x10)) {
4880 inSISIDXREG(SISSR, 0x39, reg);
4881 reg >>= 1;
4882 }
4883
4884 if(reg & 0x01) { /* DDRII */
4885 buswidth = 32;
4886 if(ivideo->revision_id == 2) {
4887 channelab = 2;
4888 outSISIDXREG(SISSR, 0x13, 0xa1);
4889 outSISIDXREG(SISSR, 0x14, 0x44);
4890 sr14 = 0x04;
4891 sisfb_post_xgi_delay(ivideo, 1);
4892 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4893 goto bail_out;
4894
4895 outSISIDXREG(SISSR, 0x13, 0x21);
4896 outSISIDXREG(SISSR, 0x14, 0x34);
4897 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4898 goto bail_out;
4899
4900 channelab = 1;
4901 outSISIDXREG(SISSR, 0x13, 0xa1);
4902 outSISIDXREG(SISSR, 0x14, 0x40);
4903 sr14 = 0x00;
4904 if(sisfb_post_xgi_rwtest(ivideo, 22, 23, mapsize))
4905 goto bail_out;
4906
4907 outSISIDXREG(SISSR, 0x13, 0x21);
4908 outSISIDXREG(SISSR, 0x14, 0x30);
4909 } else {
4910 channelab = 3;
4911 outSISIDXREG(SISSR, 0x13, 0xa1);
4912 outSISIDXREG(SISSR, 0x14, 0x4c);
4913 sr14 = 0x0c;
4914 sisfb_post_xgi_delay(ivideo, 1);
4915 if(sisfb_post_xgi_rwtest(ivideo, 23, 25, mapsize))
4916 goto bail_out;
4917
4918 channelab = 2;
4919 outSISIDXREG(SISSR, 0x14, 0x48);
4920 sisfb_post_xgi_delay(ivideo, 1);
4921 sr14 = 0x08;
4922 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4923 goto bail_out;
4924
4925 outSISIDXREG(SISSR, 0x13, 0x21);
4926 outSISIDXREG(SISSR, 0x14, 0x3c);
4927 sr14 = 0x0c;
4928
4929 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize)) {
4930 channelab = 3;
4931 } else {
4932 channelab = 2;
4933 outSISIDXREG(SISSR, 0x14, 0x38);
4934 sr14 = 0x08;
4935 }
4936 }
4937 sisfb_post_xgi_delay(ivideo, 1);
4938
4939 } else { /* DDR */
4940
4941 buswidth = 64;
4942 if(ivideo->revision_id == 2) {
4943 channelab = 1;
4944 outSISIDXREG(SISSR, 0x13, 0xa1);
4945 outSISIDXREG(SISSR, 0x14, 0x52);
4946 sisfb_post_xgi_delay(ivideo, 1);
4947 sr14 = 0x02;
4948 if(sisfb_post_xgi_rwtest(ivideo, 23, 24, mapsize))
4949 goto bail_out;
4950
4951 outSISIDXREG(SISSR, 0x13, 0x21);
4952 outSISIDXREG(SISSR, 0x14, 0x42);
4953 } else {
4954 channelab = 2;
4955 outSISIDXREG(SISSR, 0x13, 0xa1);
4956 outSISIDXREG(SISSR, 0x14, 0x5a);
4957 sisfb_post_xgi_delay(ivideo, 1);
4958 sr14 = 0x0a;
4959 if(sisfb_post_xgi_rwtest(ivideo, 24, 25, mapsize))
4960 goto bail_out;
4961
4962 outSISIDXREG(SISSR, 0x13, 0x21);
4963 outSISIDXREG(SISSR, 0x14, 0x4a);
4964 }
4965 sisfb_post_xgi_delay(ivideo, 1);
4966
4967 }
4968 }
4969
4970bail_out:
4971 setSISIDXREG(SISSR, 0x14, 0xf0, sr14);
4972 sisfb_post_xgi_delay(ivideo, 1);
4973
4974 j = (ivideo->chip == XGI_20) ? 5 : 9;
4975 k = (ivideo->chip == XGI_20) ? 12 : 4;
4976
4977 for(i = 0; i < k; i++) {
4978
4979 reg = (ivideo->chip == XGI_20) ?
4980 dramsr13[(i * 5) + 4] : dramsr13_4[(i * 5) + 4];
4981 setSISIDXREG(SISSR, 0x13, 0x80, reg);
4982 sisfb_post_xgi_delay(ivideo, 50);
4983
4984 ranksize = (ivideo->chip == XGI_20) ?
4985 dramsr13[(i * 5) + 3] : dramsr13_4[(i * 5) + 3];
4986
4987 inSISIDXREG(SISSR, 0x13, reg);
4988 if(reg & 0x80) ranksize <<= 1;
4989
4990 if(ivideo->chip == XGI_20) {
4991 if(buswidth == 16) ranksize <<= 1;
4992 else if(buswidth == 32) ranksize <<= 2;
4993 } else {
4994 if(buswidth == 64) ranksize <<= 1;
4995 }
4996
4997 reg = 0;
4998 l = channelab;
4999 if(l == 3) l = 4;
5000 if((ranksize * l) <= 256) {
5001 while((ranksize >>= 1)) reg += 0x10;
5002 }
5003
5004 if(!reg) continue;
5005
5006 setSISIDXREG(SISSR, 0x14, 0x0f, (reg & 0xf0));
5007 sisfb_post_xgi_delay(ivideo, 1);
5008
5009 if(sisfb_post_xgi_rwtest(ivideo, j, ((reg >> 4) + channelab - 2 + 20), mapsize))
5010 break;
5011 }
5012
5013 iounmap(ivideo->video_vbase);
5014}
5015
5016static void __devinit
5017sisfb_post_xgi_setclocks(struct sis_video_info *ivideo, u8 regb)
5018{
5019 u8 v1, v2, v3;
5020 int index;
5021 static const u8 cs90[8 * 3] = {
5022 0x16, 0x01, 0x01,
5023 0x3e, 0x03, 0x01,
5024 0x7c, 0x08, 0x01,
5025 0x79, 0x06, 0x01,
5026 0x29, 0x01, 0x81,
5027 0x5c, 0x23, 0x01,
5028 0x5c, 0x23, 0x01,
5029 0x5c, 0x23, 0x01
5030 };
5031 static const u8 csb8[8 * 3] = {
5032 0x5c, 0x23, 0x01,
5033 0x29, 0x01, 0x01,
5034 0x7c, 0x08, 0x01,
5035 0x79, 0x06, 0x01,
5036 0x29, 0x01, 0x81,
5037 0x5c, 0x23, 0x01,
5038 0x5c, 0x23, 0x01,
5039 0x5c, 0x23, 0x01
5040 };
5041
5042 regb = 0; /* ! */
5043
5044 index = regb * 3;
5045 v1 = cs90[index]; v2 = cs90[index + 1]; v3 = cs90[index + 2];
5046 if(ivideo->haveXGIROM) {
5047 v1 = ivideo->bios_abase[0x90 + index];
5048 v2 = ivideo->bios_abase[0x90 + index + 1];
5049 v3 = ivideo->bios_abase[0x90 + index + 2];
5050 }
5051 outSISIDXREG(SISSR, 0x28, v1);
5052 outSISIDXREG(SISSR, 0x29, v2);
5053 outSISIDXREG(SISSR, 0x2a, v3);
5054 sisfb_post_xgi_delay(ivideo, 0x43);
5055 sisfb_post_xgi_delay(ivideo, 0x43);
5056 sisfb_post_xgi_delay(ivideo, 0x43);
5057 index = regb * 3;
5058 v1 = csb8[index]; v2 = csb8[index + 1]; v3 = csb8[index + 2];
5059 if(ivideo->haveXGIROM) {
5060 v1 = ivideo->bios_abase[0xb8 + index];
5061 v2 = ivideo->bios_abase[0xb8 + index + 1];
5062 v3 = ivideo->bios_abase[0xb8 + index + 2];
5063 }
5064 outSISIDXREG(SISSR, 0x2e, v1);
5065 outSISIDXREG(SISSR, 0x2f, v2);
5066 outSISIDXREG(SISSR, 0x30, v3);
5067 sisfb_post_xgi_delay(ivideo, 0x43);
5068 sisfb_post_xgi_delay(ivideo, 0x43);
5069 sisfb_post_xgi_delay(ivideo, 0x43);
5070}
5071
5072static int __devinit
5073sisfb_post_xgi(struct pci_dev *pdev)
5074{
5075 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
5076 unsigned char *bios = ivideo->bios_abase;
5077 struct pci_dev *mypdev = NULL;
5078 const u8 *ptr, *ptr2;
5079 u8 v1, v2, v3, v4, v5, reg, ramtype;
5080 u32 rega, regb, regd;
5081 int i, j, k, index;
5082 static const u8 cs78[3] = { 0xf6, 0x0d, 0x00 };
5083 static const u8 cs76[2] = { 0xa3, 0xfb };
5084 static const u8 cs7b[3] = { 0xc0, 0x11, 0x00 };
5085 static const u8 cs158[8] = {
5086 0x88, 0xaa, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00
5087 };
5088 static const u8 cs160[8] = {
5089 0x44, 0x77, 0x77, 0x00, 0x00, 0x00, 0x00, 0x00
5090 };
5091 static const u8 cs168[8] = {
5092 0x48, 0x78, 0x88, 0x00, 0x00, 0x00, 0x00, 0x00
5093 };
5094 static const u8 cs128[3 * 8] = {
5095 0x90, 0x28, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00,
5096 0x77, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
5097 0x77, 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00
5098 };
5099 static const u8 cs148[2 * 8] = {
5100 0x55, 0x55, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00,
5101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5102 };
5103 static const u8 cs31a[8 * 4] = {
5104 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
5105 0xaa, 0xaa, 0xaa, 0xaa, 0x00, 0x00, 0x00, 0x00,
5106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5108 };
5109 static const u8 cs33a[8 * 4] = {
5110 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5112 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
5113 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5114 };
5115 static const u8 cs45a[8 * 2] = {
5116 0x00, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0x00, 0x00,
5117 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5118 };
5119 static const u8 cs170[7 * 8] = {
5120 0x54, 0x32, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
5121 0x54, 0x43, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
5122 0x0a, 0x05, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
5123 0x44, 0x34, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00,
5124 0x10, 0x0a, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00,
5125 0x11, 0x0c, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00,
5126 0x05, 0x05, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00
5127 };
5128 static const u8 cs1a8[3 * 8] = {
5129 0xf0, 0xf0, 0xf0, 0x00, 0x00, 0x00, 0x00, 0x00,
5130 0x05, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,
5131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
5132 };
5133 static const u8 cs100[2 * 8] = {
5134 0xc4, 0x04, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00,
5135 0xc4, 0x04, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00
5136 };
5137
5138 /* VGA enable */
5139 reg = inSISREG(SISVGAENABLE) | 0x01;
5140 outSISREG(SISVGAENABLE, reg);
5141
5142 /* Misc */
5143 reg = inSISREG(SISMISCR) | 0x01;
5144 outSISREG(SISMISCW, reg);
5145
5146 /* Unlock SR */
5147 outSISIDXREG(SISSR, 0x05, 0x86);
5148 inSISIDXREG(SISSR, 0x05, reg);
5149 if(reg != 0xa1)
5150 return 0;
5151
5152 /* Clear some regs */
4385 for(i = 0; i < 0x22; i++) { 5153 for(i = 0; i < 0x22; i++) {
4386 outSISIDXREG(SISSR,(0x06 + i),0x00); 5154 if(0x06 + i == 0x20) continue;
5155 outSISIDXREG(SISSR, 0x06 + i, 0x00);
4387 } 5156 }
4388 v1 = 0x0d; 5157 for(i = 0; i < 0x0b; i++) {
4389 if( is 330) v1 = 0x0b; 5158 outSISIDXREG(SISSR, 0x31 + i, 0x00);
4390 for(i = 0; i < v1; i++) {
4391 outSISIDXREG(SISSR,(0x31 + i),0x00);
4392 } 5159 }
4393 for(i = 0; i < 0x10; i++) { 5160 for(i = 0; i < 0x10; i++) {
4394 outSISIDXREG(SISCR,(0x30 + i),0x00); 5161 outSISIDXREG(SISCR, 0x30 + i, 0x00);
4395 }
4396
4397 /* Reset clocks */
4398 reg = inSISREG(SISMISCR);
4399 outSISIDXREG(SISSR,0x28,0x81);
4400 outSISIDXREG(SISSR,0x2A,0x00);
4401 outSISIDXREG(SISSR,0x29,0xE1);
4402 outSISREG(SISMISCW,(reg | 0x0c));
4403 outSISIDXREG(SISSR,0x2B,0x81);
4404 outSISIDXREG(SISSR,0x2D,0x00);
4405 outSISIDXREG(SISSR,0x2C,0xE1);
4406 outSISIDXREG(SISSR,0x2E,0x81);
4407 outSISIDXREG(SISSR,0x30,0x00);
4408 outSISIDXREG(SISSR,0x2F,0xE1);
4409 SiS_DDC2Delay(....);
4410 outSISREG(SISMISCW,reg);
4411
4412 /* Get memory type */
4413 if(ivideo->sishw_ext.UseROM) {
4414 if(ivideo->sishw_ext.pjVirtualRomBase[0x52] & 0x80)) {
4415 memtype = ivideo->sishw_ext.pjVirtualRomBase[0x52];
4416 } else {
4417 inSISIDXREG(SISSR,0x3a,memtype);
4418 }
4419 memtype &= 0x03;
4420 if( is 330 ) {
4421 if(memtype <= 1) memtype = 0;
4422 else {
4423 inSISIDXREG(SISCR,0x5F,reg);
4424 reg &= 0x30;
4425 switch(reg) {
4426 case 0x00: memtype = 1; break;
4427 case 0x10: memtype = 3; break;
4428 case 0x20: memtype = 3; break;
4429 default: memtype = 2;
4430 }
4431 }
4432 }
4433 } 5162 }
4434 5163
4435 /* Set clocks */ 5164 ptr = cs78;
4436 v1 = 0x3b; v2 = 0x22; v3 = 0x01; /* Assume 143Mhz MCLK */ 5165 if(ivideo->haveXGIROM) {
4437 v4 = 0x5c; v5 = 0x23; v6 = 0x01; /* Assume 166Mhz ECLK */ 5166 ptr = (const u8 *)&bios[0x78];
4438 if(ivideo->sishw_ext.UseROM) { 5167 }
4439 index = memtype * 5; 5168 for(i = 0; i < 3; i++) {
4440 rindex = index + 0x54; 5169 outSISIDXREG(SISSR, 0x23 + i, ptr[i]);
4441 v1 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 5170 }
4442 v2 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 5171
4443 v3 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 5172 ptr = cs76;
4444 rindex = index + 0x68; 5173 if(ivideo->haveXGIROM) {
4445 v4 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 5174 ptr = (const u8 *)&bios[0x76];
4446 v5 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 5175 }
4447 v6 = ivideo->sishw_ext.pjVirtualRomBase[rindex++]; 5176 for(i = 0; i < 2; i++) {
4448 } 5177 outSISIDXREG(SISSR, 0x21 + i, ptr[i]);
4449 outSISIDXREG(SISSR,0x28,v1); 5178 }
4450 outSISIDXREG(SISSR,0x29,v2); 5179
4451 outSISIDXREG(SISSR,0x2a,v3); 5180 v1 = 0x18; v2 = 0x00;
4452 if( is 330 ) { 5181 if(ivideo->haveXGIROM) {
4453 inSISIDXREG(SISSR,0x3a,reg); 5182 v1 = bios[0x74];
4454 reg &= 0x03; 5183 v2 = bios[0x75];
4455 if(reg >= 2) { 5184 }
4456 ... 5185 outSISIDXREG(SISSR, 0x07, v1);
4457 } 5186 outSISIDXREG(SISSR, 0x11, 0x0f);
5187 outSISIDXREG(SISSR, 0x1f, v2);
5188 /* PCI linear mode, RelIO enabled, A0000 decoding disabled */
5189 outSISIDXREG(SISSR, 0x20, 0x80 | 0x20 | 0x04);
5190 outSISIDXREG(SISSR, 0x27, 0x74);
5191
5192 ptr = cs7b;
5193 if(ivideo->haveXGIROM) {
5194 ptr = (const u8 *)&bios[0x7b];
5195 }
5196 for(i = 0; i < 3; i++) {
5197 outSISIDXREG(SISSR, 0x31 + i, ptr[i]);
4458 } 5198 }
4459 outSISIDXREG(SISSR,0x2e,v4);
4460 outSISIDXREG(SISSR,0x2f,v5);
4461 outSISIDXREG(SISSR,0x30,v6);
4462
4463 /* End of comp with 330 */
4464
4465 v1 = 0x18;
4466 if(ivideo->sishw_ext.UseROM) v1 = ivideo->sishw_ext.pjVirtualRomBase[0x7c];
4467 outSISIDXREG(SISSR,0x07,v1);
4468 outSISIDXREG(SISSR,0x11,0x0f);
4469
4470 v1 = 0x00; v2 = 0x0f; v3 = 0xba; v4 = 0xa9;
4471 v5 = 0xa0; v6 = 0x00; v7 = 0x30;
4472 if(ivideo->sishw_ext.UseROM) {
4473 index = memtype + 0x7d;
4474 v1 = ivideo->sishw_ext.pjVirtualRomBase[index];
4475 v2 = ivideo->sishw_ext.pjVirtualRomBase[index + 4];
4476 v3 = ivideo->sishw_ext.pjVirtualRomBase[index + 8];
4477 v4 = ivideo->sishw_ext.pjVirtualRomBase[index + 12];
4478 v5 = ivideo->sishw_ext.pjVirtualRomBase[index + 16];
4479 v6 = ivideo->sishw_ext.pjVirtualRomBase[index + 20];
4480 v7 = ivideo->sishw_ext.pjVirtualRomBase[index + 24];
4481 }
4482 outSISIDXREG(SISSR,0x15,v1); /* Ram type (assuming 0, BIOS 0x7d step 4) */
4483 outSISIDXREG(SISSR,0x16,v2);
4484 outSISIDXREG(SISSR,0x17,v3);
4485 outSISIDXREG(SISSR,0x18,v4);
4486 outSISIDXREG(SISSR,0x19,v5);
4487 outSISIDXREG(SISSR,0x1a,v6);
4488 outSISIDXREG(SISSR,0x1b,v7);
4489 outSISIDXREG(SISSR,0x1c,v8); /* ---- */
4490
4491 v1 = 0x77; v2 = 0x77; v3 = 0x00; v4 = 0x5b; v5 = 0x00;
4492 if(ivideo->sishw_ext.UseROM) {
4493 index = memtype + 0xa2;
4494 v1 = ivideo->sishw_ext.pjVirtualRomBase[index];
4495 v2 = ivideo->sishw_ext.pjVirtualRomBase[index + 4];
4496 v3 = ivideo->sishw_ext.pjVirtualRomBase[index + 8];
4497 v4 = ivideo->sishw_ext.pjVirtualRomBase[index + 12];
4498 v5 = ivideo->sishw_ext.pjVirtualRomBase[index + 16];
4499 }
4500 outSISIDXREG(SISCR,0x40,v1);
4501 outSISIDXREG(SISCR,0x41,v2);
4502 outSISIDXREG(SISCR,0x42,v3);
4503 outSISIDXREG(SISCR,0x43,v4);
4504 outSISIDXREG(SISCR,0x44,v5);
4505
4506 if( is 330 ) {
4507
4508 v1 = 0x;
4509 if(ivideo->sishw_ext.UseROM) {
4510 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xBA];
4511 }
4512 outSISIDXREG(SISCR,0x59,v1);
4513
4514 v1 = 0x; v2 = 0x; v3 = 0x; v4 = 0x;
4515 v5 = 0x; v6 = 0x; v7 = 0x; v8 = 0x;
4516 if(ivideo->sishw_ext.UseROM) {
4517 index = memtype + 0xbe;
4518 v1 = ivideo->sishw_ext.pjVirtualRomBase[index];
4519 v2 = ivideo->sishw_ext.pjVirtualRomBase[index + 4];
4520 v3 = ivideo->sishw_ext.pjVirtualRomBase[index + 8];
4521 v4 = ivideo->sishw_ext.pjVirtualRomBase[index + 12];
4522 v5 = ivideo->sishw_ext.pjVirtualRomBase[index + 16];
4523 v6 = ivideo->sishw_ext.pjVirtualRomBase[index + 20];
4524 v7 = ivideo->sishw_ext.pjVirtualRomBase[index + 24];
4525 v8 = ivideo->sishw_ext.pjVirtualRomBase[index + 28];
4526 }
4527 outSISIDXREG(SISCR,0x68,v1);
4528 outSISIDXREG(SISCR,0x69,v2);
4529 outSISIDXREG(SISCR,0x6a,v3);
4530 outSISIDXREG(SISCR,0x6b,v4);
4531 outSISIDXREG(SISCR,0x6c,v5);
4532 outSISIDXREG(SISCR,0x6d,v6);
4533 outSISIDXREG(SISCR,0x6e,v7);
4534 outSISIDXREG(SISCR,0x6f,v8);
4535
4536 v1 = 0x20;
4537 inSISIDXREG(SISSR,0x3b,reg);
4538
4539 if(!(reg & 0x04)) {
4540 inSISIDXREG(SISCR,0x5F,reg);
4541 reg &= 0x30;
4542 if(reg) v1 = 0x23;
4543 }
4544 outSISIDXREG(SISCR,0x48,v1);
4545 outSISIDXREG(SISCR,0x4c,0x20);
4546
4547 xx= xxx();
4548 if(xx >= 1) {
4549 v1 = 0x;
4550 if(ivideo->sishw_ext.UseROM) {
4551 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xBA];
4552 }
4553 outSISIDXREG(SISCR,0x59,v1);
4554 }
4555 5199
5200 if(ivideo->chip == XGI_40) {
5201 if(ivideo->revision_id == 2) {
5202 setSISIDXREG(SISSR, 0x3b, 0x3f, 0xc0);
5203 }
5204 outSISIDXREG(SISCR, 0x7d, 0xfe);
5205 outSISIDXREG(SISCR, 0x7e, 0x0f);
5206 }
5207 if(ivideo->revision_id == 0) { /* 40 *and* 20? */
5208 andSISIDXREG(SISCR, 0x58, 0xd7);
5209 inSISIDXREG(SISCR, 0xcb, reg);
5210 if(reg & 0x20) {
5211 setSISIDXREG(SISCR, 0x58, 0xd7, (reg & 0x10) ? 0x08 : 0x20); /* =0x28 Z7 ? */
5212 }
5213 }
4556 5214
5215 reg = (ivideo->chip == XGI_40) ? 0x20 : 0x00;
5216 setSISIDXREG(SISCR, 0x38, 0x1f, reg);
4557 5217
5218 if(ivideo->chip == XGI_20) {
5219 outSISIDXREG(SISSR, 0x36, 0x70);
4558 } else { 5220 } else {
5221 outSISIDXREG(SISVID, 0x00, 0x86);
5222 outSISIDXREG(SISVID, 0x32, 0x00);
5223 outSISIDXREG(SISVID, 0x30, 0x00);
5224 outSISIDXREG(SISVID, 0x32, 0x01);
5225 outSISIDXREG(SISVID, 0x30, 0x00);
5226 andSISIDXREG(SISVID, 0x2f, 0xdf);
5227 andSISIDXREG(SISCAP, 0x00, 0x3f);
5228
5229 outSISIDXREG(SISPART1, 0x2f, 0x01);
5230 outSISIDXREG(SISPART1, 0x00, 0x00);
5231 outSISIDXREG(SISPART1, 0x02, bios[0x7e]);
5232 outSISIDXREG(SISPART1, 0x2e, 0x08);
5233 andSISIDXREG(SISPART1, 0x35, 0x7f);
5234 andSISIDXREG(SISPART1, 0x50, 0xfe);
5235
5236 inSISIDXREG(SISPART4, 0x00, reg);
5237 if(reg == 1 || reg == 2) {
5238 outSISIDXREG(SISPART2, 0x00, 0x1c);
5239 outSISIDXREG(SISPART4, 0x0d, bios[0x7f]);
5240 outSISIDXREG(SISPART4, 0x0e, bios[0x80]);
5241 outSISIDXREG(SISPART4, 0x10, bios[0x81]);
5242 andSISIDXREG(SISPART4, 0x0f, 0x3f);
5243
5244 inSISIDXREG(SISPART4, 0x01, reg);
5245 if((reg & 0xf0) >= 0xb0) {
5246 inSISIDXREG(SISPART4, 0x23, reg);
5247 if(reg & 0x20) reg |= 0x40;
5248 outSISIDXREG(SISPART4, 0x23, reg);
5249 reg = (reg & 0x20) ? 0x02 : 0x00;
5250 setSISIDXREG(SISPART1, 0x1e, 0xfd, reg);
5251 }
5252 }
4559 5253
4560 outSISIDXREG(SISCR,0x48,0x23); 5254 v1 = bios[0x77];
5255
5256 inSISIDXREG(SISSR, 0x3b, reg);
5257 if(reg & 0x02) {
5258 inSISIDXREG(SISSR, 0x3a, reg);
5259 v2 = (reg & 0x30) >> 3;
5260 if(!(v2 & 0x04)) v2 ^= 0x02;
5261 inSISIDXREG(SISSR, 0x39, reg);
5262 if(reg & 0x80) v2 |= 0x80;
5263 v2 |= 0x01;
5264
5265 if((mypdev = SIS_PCI_GET_DEVICE(PCI_VENDOR_ID_SI, 0x0730, NULL))) {
5266 SIS_PCI_PUT_DEVICE(mypdev);
5267 if(((v2 & 0x06) == 2) || ((v2 & 0x06) == 4))
5268 v2 &= 0xf9;
5269 v2 |= 0x08;
5270 v1 &= 0xfe;
5271 } else {
5272 mypdev = SIS_PCI_GET_DEVICE(PCI_VENDOR_ID_SI, 0x0735, NULL);
5273 if(!mypdev)
5274 mypdev = SIS_PCI_GET_DEVICE(PCI_VENDOR_ID_SI, 0x0645, NULL);
5275 if(!mypdev)
5276 mypdev = SIS_PCI_GET_DEVICE(PCI_VENDOR_ID_SI, 0x0650, NULL);
5277 if(mypdev) {
5278 pci_read_config_dword(mypdev, 0x94, &regd);
5279 regd &= 0xfffffeff;
5280 pci_write_config_dword(mypdev, 0x94, regd);
5281 v1 &= 0xfe;
5282 SIS_PCI_PUT_DEVICE(mypdev);
5283 } else if(sisfb_find_host_bridge(ivideo, pdev, PCI_VENDOR_ID_SI)) {
5284 v1 &= 0xfe;
5285 } else if(sisfb_find_host_bridge(ivideo, pdev, 0x1106) ||
5286 sisfb_find_host_bridge(ivideo, pdev, 0x1022) ||
5287 sisfb_find_host_bridge(ivideo, pdev, 0x700e) ||
5288 sisfb_find_host_bridge(ivideo, pdev, 0x10de)) {
5289 if((v2 & 0x06) == 4)
5290 v2 ^= 0x06;
5291 v2 |= 0x08;
5292 }
5293 }
5294 setSISIDXREG(SISCR, 0x5f, 0xf0, v2);
5295 }
5296 outSISIDXREG(SISSR, 0x22, v1);
5297
5298 if(ivideo->revision_id == 2) {
5299 inSISIDXREG(SISSR, 0x3b, v1);
5300 inSISIDXREG(SISSR, 0x3a, v2);
5301 regd = bios[0x90 + 3] | (bios[0x90 + 4] << 8);
5302 if( (!(v1 & 0x02)) && (v2 & 0x30) && (regd < 0xcf) )
5303 setSISIDXREG(SISCR, 0x5f, 0xf1, 0x01);
5304
5305 if((mypdev = SIS_PCI_GET_DEVICE(0x10de, 0x01e0, NULL))) {
5306 /* TODO: set CR5f &0xf1 | 0x01 for version 6570
5307 * of nforce 2 ROM
5308 */
5309 if(0)
5310 setSISIDXREG(SISCR, 0x5f, 0xf1, 0x01);
5311 SIS_PCI_PUT_DEVICE(mypdev);
5312 }
5313 }
4561 5314
4562 andSISIDXREG(SISSR,0x16,0x0f); 5315 v1 = 0x30;
4563 if(memtype <= 1) { 5316 inSISIDXREG(SISSR, 0x3b, reg);
4564 orSISIDXREG(SISSR,0x16,0x80); 5317 inSISIDXREG(SISCR, 0x5f, v2);
4565 } else { 5318 if((!(reg & 0x02)) && (v2 & 0x0e))
4566 v1 = 0x0f; 5319 v1 |= 0x08;
4567 if(ivideo->sishw_ext.UseROM) { 5320 outSISIDXREG(SISSR, 0x27, v1);
4568 v1 = ivideo->sishw_ext.pjVirtualRomBase[0x81 + memtype]; 5321
4569 } 5322 if(bios[0x64] & 0x01) {
4570 if(!(v1 & 0x10)) v2 = 0xc0; 5323 setSISIDXREG(SISCR, 0x5f, 0xf0, bios[0x64]);
4571 else v2 = 0xd0; 5324 }
4572 orSISIDXREG(SISSR,0x16,v2);
4573 andSISIDXREG(SISSR,0x16,0x0f);
4574 if(!(v1 & 0x10)) v2 = 0x80;
4575 else v2 = 0xA0;
4576 orSISIDXREG(SISSR,0x16,v2);
4577 }
4578
4579 if(memtype >= 2) {
4580 const u8 sr3cseq1[] = { 0xc0,0xe0,0xf0,0xe0,0xf0,0xa0,0xb0,0xa0,0xb0,0x90,0xd0 };
4581 const u8 sr3cseq2[] = { 0xc0,0xa0,0xb0,0xa0,0xb0,0xe0,0xf0,0xa0,0xb0,0x90,0xd0 };
4582 for(i = 0; i < 11; i++) {
4583 outSISIDXREG(SISSR,0x3c,sr3cseq1[i]);
4584 }
4585 outSISIDXREG(SISSR,0x3d,0x00);
4586 outSISIDXREG(SISSR,0x3d,0x04);
4587 SiS_DDC2Delay(0x200);
4588 v1 = inSISIDXREG(SISCR,0xEC);
4589 v2 = inSISIDXREG(SISCR,0xED);
4590 reg1_32 = (v2 << 8) | v1;
4591 outSISIDXREG(SISSR,0x3D,0x00);
4592 for(i = 0; i < 11; i++) {
4593 outSISIDXREG(SISSR,0x3c,sr3cseq2[i]);
4594 }
4595 outSISIDXREG(SISSR,0x3d,0x00);
4596 outSISIDXREG(SISSR,0x3d,0x04);
4597 SiS_DDC2Delay(0x200);
4598 v1 = inSISIDXREG(SISCR,0xEC);
4599 v2 = inSISIDXREG(SISCR,0xED);
4600 reg2_32 = (v2 << 8) | v1;
4601 outSISIDXREG(SISSR,0x3D,0x00);
4602 reg3_32 = reg2_32 << 1;
4603 reg2_32 >>= 1;
4604 reg3_32 += reg2_32;
4605 v1 = 0x40;
4606 if(reg3_32 > reg1_32) v1 = 0x10;
4607 outSISIDXREG(SISCR,0x59,v1);
4608 }
4609 5325
5326 v1 = bios[0x4f7];
5327 pci_read_config_dword(pdev, 0x50, &regd);
5328 regd = (regd >> 20) & 0x0f;
5329 if(regd == 1) {
5330 v1 &= 0xfc;
5331 orSISIDXREG(SISCR, 0x5f, 0x08);
5332 }
5333 outSISIDXREG(SISCR, 0x48, v1);
5334
5335 setSISIDXREG(SISCR, 0x47, 0x04, bios[0x4f6] & 0xfb);
5336 setSISIDXREG(SISCR, 0x49, 0xf0, bios[0x4f8] & 0x0f);
5337 setSISIDXREG(SISCR, 0x4a, 0x60, bios[0x4f9] & 0x9f);
5338 setSISIDXREG(SISCR, 0x4b, 0x08, bios[0x4fa] & 0xf7);
5339 setSISIDXREG(SISCR, 0x4c, 0x80, bios[0x4fb] & 0x7f);
5340 outSISIDXREG(SISCR, 0x70, bios[0x4fc]);
5341 setSISIDXREG(SISCR, 0x71, 0xf0, bios[0x4fd] & 0x0f);
5342 outSISIDXREG(SISCR, 0x74, 0xd0);
5343 setSISIDXREG(SISCR, 0x74, 0xcf, bios[0x4fe] & 0x30);
5344 setSISIDXREG(SISCR, 0x75, 0xe0, bios[0x4ff] & 0x1f);
5345 setSISIDXREG(SISCR, 0x76, 0xe0, bios[0x500] & 0x1f);
5346 v1 = bios[0x501];
5347 if((mypdev = SIS_PCI_GET_DEVICE(0x8086, 0x2530, NULL))) {
5348 v1 = 0xf0;
5349 SIS_PCI_PUT_DEVICE(mypdev);
5350 }
5351 outSISIDXREG(SISCR, 0x77, v1);
4610 } 5352 }
4611 5353
4612 v1 = 0x00; 5354 /* RAM type */
4613 if(ivideo->sishw_ext.UseROM) { 5355
4614 v1 = ivideo->sishw_ext.pjVirtualRomBase[0x99]; 5356 regb = 0; /* ! */
5357
5358 v1 = 0xff;
5359 if(ivideo->haveXGIROM) {
5360 v1 = bios[0x140 + regb];
4615 } 5361 }
4616 outSISIDXREG(SISSR,0x1f,v1); 5362 outSISIDXREG(SISCR, 0x6d, v1);
4617 5363
4618 outSISIDXREG(SISSR,0x20,0x20); 5364 ptr = cs128;
5365 if(ivideo->haveXGIROM) {
5366 ptr = (const u8 *)&bios[0x128];
5367 }
5368 for(i = 0, j = 0; i < 3; i++, j += 8) {
5369 outSISIDXREG(SISCR, 0x68 + i, ptr[j + regb]);
5370 }
4619 5371
4620 v1 = 0xf6; v2 = 0x0d; v3 = 0x33; 5372 ptr = cs31a;
4621 if(ivideo->sishw_ext.UseROM) { 5373 ptr2 = cs33a;
4622 v1 = ivideo->sishw_ext.pjVirtualRomBase[0x9c]; 5374 if(ivideo->haveXGIROM) {
4623 v2 = ivideo->sishw_ext.pjVirtualRomBase[0x9d]; 5375 index = (ivideo->chip == XGI_20) ? 0x31a : 0x3a6;
4624 v3 = ivideo->sishw_ext.pjVirtualRomBase[0x9e]; 5376 ptr = (const u8 *)&bios[index];
5377 ptr2 = (const u8 *)&bios[index + 0x20];
5378 }
5379 for(i = 0; i < 2; i++) {
5380 if(i == 0) {
5381 regd = le32_to_cpu(((u32 *)ptr)[regb]);
5382 rega = 0x6b;
5383 } else {
5384 regd = le32_to_cpu(((u32 *)ptr2)[regb]);
5385 rega = 0x6e;
5386 }
5387 reg = 0x00;
5388 for(j = 0; j < 16; j++) {
5389 reg &= 0xf3;
5390 if(regd & 0x01) reg |= 0x04;
5391 if(regd & 0x02) reg |= 0x08;
5392 regd >>= 2;
5393 outSISIDXREG(SISCR, rega, reg);
5394 inSISIDXREG(SISCR, rega, reg);
5395 inSISIDXREG(SISCR, rega, reg);
5396 reg += 0x10;
5397 }
4625 } 5398 }
4626 outSISIDXREG(SISSR,0x23,v1);
4627 outSISIDXREG(SISSR,0x24,v2);
4628 outSISIDXREG(SISSR,0x25,v3);
4629 5399
4630 outSISIDXREG(SISSR,0x21,0x84); 5400 andSISIDXREG(SISCR, 0x6e, 0xfc);
4631 outSISIDXREG(SISSR,0x22,0x00);
4632 outSISIDXREG(SISSR,0x27,0x1f);
4633 5401
4634 v1 = 0x00; v2 = 0x00; 5402 ptr = NULL;
4635 if(ivideo->sishw_ext.UseROM) { 5403 if(ivideo->haveXGIROM) {
4636 v1 = ivideo->sishw_ext.pjVirtualRomBase[0x9F]; 5404 index = (ivideo->chip == XGI_20) ? 0x35a : 0x3e6;
4637 v2 = ivideo->sishw_ext.pjVirtualRomBase[0xA1]; 5405 ptr = (const u8 *)&bios[index];
4638 } 5406 }
4639 outSISIDXREG(SISSR,0x31,v1); 5407 for(i = 0; i < 4; i++) {
4640 outSISIDXREG(SISSR,0x33,v2); 5408 setSISIDXREG(SISCR, 0x6e, 0xfc, i);
4641 5409 reg = 0x00;
4642 v1 = 0x11; 5410 for(j = 0; j < 2; j++) {
4643 if(ivideo->sishw_ext.UseROM) { 5411 regd = 0;
4644 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xA0]; 5412 if(ptr) {
4645 } 5413 regd = le32_to_cpu(((u32 *)ptr)[regb * 8]);
4646 v2 = inSISIDXREG(SISPART4,0x00); 5414 ptr += 4;
4647 if((v2 != 1) && (v2 != 2)) v1 &= 0xef; 5415 }
4648 outSISIDXREG(SISSR,0x32,v1); 5416 /* reg = 0x00; */
4649 5417 for(k = 0; k < 16; k++) {
4650 /* AGP */ 5418 reg &= 0xfc;
4651 pci_read_config_long(pdev, 0x50, &reg1_32); 5419 if(regd & 0x01) reg |= 0x01;
4652 reg1_32 >>= 20; 5420 if(regd & 0x02) reg |= 0x02;
4653 reg1_32 &= 0x0f; 5421 regd >>= 2;
4654 if(reg1_32 == 1) { 5422 outSISIDXREG(SISCR, 0x6f, reg);
4655 v1 = 0xAA; v2 = 0x33; 5423 inSISIDXREG(SISCR, 0x6f, reg);
4656 if(ivideo->sishw_ext.UseROM) { 5424 inSISIDXREG(SISCR, 0x6f, reg);
4657 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xF7]; 5425 reg += 0x08;
4658 v2 = ivideo->sishw_ext.pjVirtualRomBase[0x9E]; 5426 }
4659 } 5427 }
4660 } else {
4661 v1 = 0x88; v2 = 0x03;
4662 if(ivideo->sishw_ext.UseROM) {
4663 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xF8];
4664 v2 = ivideo->sishw_ext.pjVirtualRomBase[0xF6];
4665 }
4666 } 5428 }
4667 outSISIDXREG(SISCR,0x49,v1);
4668 outSISIDXREG(SISSR,0x25,v2);
4669 5429
4670 v1 = inSISIDXREG(SISPART4,0x00); 5430 ptr = cs148;
4671 if((v1 == 1) || (v1 == 2)) { 5431 if(ivideo->haveXGIROM) {
4672 orSISIDXREG(SISPART1,0x2F,0x01); /* Unlock CRT2 */ 5432 ptr = (const u8 *)&bios[0x148];
4673 outSISIDXREG(SISPART1,0x00,0x00); 5433 }
4674 v1 = 0x00; 5434 for(i = 0, j = 0; i < 2; i++, j += 8) {
4675 if(ivideo->sishw_ext.UseROM) { 5435 outSISIDXREG(SISCR, 0x80 + i, ptr[j + regb]);
4676 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xb6];
4677 }
4678 outSISIDXREG(SISPART1,0x02,v1);
4679 outSISIDXREG(SISPART1,0x2E,0x08);
4680 outSISIDXREG(SISPART2,0x00,0x1c);
4681 v1 = 0x40; v2 = 0x00; v3 = 0x80;
4682 if(ivideo->sishw_ext.UseROM) {
4683 v1 = ivideo->sishw_ext.pjVirtualRomBase[0xb7];
4684 v2 = ivideo->sishw_ext.pjVirtualRomBase[0xb8];
4685 v3 = ivideo->sishw_ext.pjVirtualRomBase[0xbb];
4686 }
4687 outSISIDXREG(SISPART4,0x0d,v1);
4688 outSISIDXREG(SISPART4,0x0e,v2);
4689 outSISIDXREG(SISPART4,0x10,v3);
4690 outSISIDXREG(SISPART4,0x0F,0x3F);
4691
4692 inSISIDXREG(SISPART4,0x01,reg);
4693 if(reg >= 0xb0) {
4694 inSISIDXREG(SISPART4,0x23,reg);
4695 reg &= 0x20;
4696 reg <<= 1;
4697 outSISIDXREG(SISPART4,0x23,reg);
4698 }
4699 } 5436 }
4700 outSISIDXREG(SISCR,0x37,0x02); /* Why? */
4701
4702 outSISIDXREG(SISCR,0x83,0x00);
4703 outSISIDXREG(SISCR,0x90,0x00);
4704 andSISIDXREG(SISSR,0x5B,0xDF);
4705 outSISIDXREG(SISVID,0x00,0x86);
4706 outSISIDXREG(SISVID,0x32,0x00);
4707 outSISIDXREG(SISVID,0x30,0x00);
4708 outSISIDXREG(SISVID,0x32,0x01);
4709 outSISIDXREG(SISVID,0x30,0x00);
4710 orSISIDXREG(SISCR,0x63,0x80);
4711 /* End of Init1 */
4712
4713 /* Set Mode 0x2e */
4714
4715 /* Ramsize */
4716 orSISIDXREG(SISSR,0x16,0x0f);
4717 orSISIDXREG(SISSR,0x18,0xA9);
4718 orSISIDXREG(SISSR,0x19,0xA0);
4719 orSISIDXREG(SISSR,0x1B,0x30);
4720 andSISIDXREG(SISSR,0x17,0xF8);
4721 orSISIDXREG(SISSR,0x19,0x03);
4722 andSIDIDXREG(SISSR,0x13,0x00);
4723 5437
4724 /* Need to map max FB size for finding out about RAM size */ 5438 andSISIDXREG(SISCR, 0x89, 0x8f);
4725 ivideo->video_vbase = ioremap(ivideo->video_base, 0x4000000);
4726 if(ivideo->video_vbase) {
4727 /* Find out about bus width */
4728 if(memtype <= 1) {
4729 outSISIDXREG(SISSR,0x14,0x02);
4730 andSISIDXREG(SISSR,0x16,0x0F);
4731 orSISIDXREG(SISSR,0x16,0x80);
4732 5439
4733 ... 5440 ptr = cs45a;
5441 if(ivideo->haveXGIROM) {
5442 index = (ivideo->chip == XGI_20) ? 0x45a : 0x4e6;
5443 ptr = (const u8 *)&bios[index];
5444 }
5445 regd = le16_to_cpu(((const u16 *)ptr)[regb]);
5446 reg = 0x80;
5447 for(i = 0; i < 5; i++) {
5448 reg &= 0xfc;
5449 if(regd & 0x01) reg |= 0x01;
5450 if(regd & 0x02) reg |= 0x02;
5451 regd >>= 2;
5452 outSISIDXREG(SISCR, 0x89, reg);
5453 inSISIDXREG(SISCR, 0x89, reg);
5454 inSISIDXREG(SISCR, 0x89, reg);
5455 reg += 0x10;
5456 }
4734 5457
4735 } else { 5458 v1 = 0xb5; v2 = 0x20; v3 = 0xf0; v4 = 0x13;
5459 if(ivideo->haveXGIROM) {
5460 v1 = bios[0x118 + regb];
5461 v2 = bios[0xf8 + regb];
5462 v3 = bios[0x120 + regb];
5463 v4 = bios[0x1ca];
5464 }
5465 outSISIDXREG(SISCR, 0x45, v1 & 0x0f);
5466 outSISIDXREG(SISCR, 0x99, (v1 >> 4) & 0x07);
5467 orSISIDXREG(SISCR, 0x40, v1 & 0x80);
5468 outSISIDXREG(SISCR, 0x41, v2);
4736 5469
4737 ... 5470 ptr = cs170;
5471 if(ivideo->haveXGIROM) {
5472 ptr = (const u8 *)&bios[0x170];
5473 }
5474 for(i = 0, j = 0; i < 7; i++, j += 8) {
5475 outSISIDXREG(SISCR, 0x90 + i, ptr[j + regb]);
5476 }
4738 5477
4739 } 5478 outSISIDXREG(SISCR, 0x59, v3);
4740 5479
4741 /* Find out about size */ 5480 ptr = cs1a8;
5481 if(ivideo->haveXGIROM) {
5482 ptr = (const u8 *)&bios[0x1a8];
5483 }
5484 for(i = 0, j = 0; i < 3; i++, j += 8) {
5485 outSISIDXREG(SISCR, 0xc3 + i, ptr[j + regb]);
5486 }
4742 5487
5488 ptr = cs100;
5489 if(ivideo->haveXGIROM) {
5490 ptr = (const u8 *)&bios[0x100];
5491 }
5492 for(i = 0, j = 0; i < 2; i++, j += 8) {
5493 outSISIDXREG(SISCR, 0x8a + i, ptr[j + regb]);
5494 }
4743 5495
4744 iounmap(ivideo->video_vbase); 5496 outSISIDXREG(SISCR, 0xcf, v4);
4745 } else { 5497
4746 printk(KERN_DEBUG "sisfb: Failed to map memory for size detection, assuming 8MB\n"); 5498 outSISIDXREG(SISCR, 0x83, 0x09);
4747 outSISIDXREG(SISSR,0x14,0x??); /* 8MB, 64bit default */ 5499 outSISIDXREG(SISCR, 0x87, 0x00);
5500
5501 if(ivideo->chip == XGI_40) {
5502 if( (ivideo->revision_id == 1) ||
5503 (ivideo->revision_id == 2) ) {
5504 outSISIDXREG(SISCR, 0x8c, 0x87);
5505 }
5506 }
5507
5508 outSISIDXREG(SISSR, 0x17, 0x00);
5509 outSISIDXREG(SISSR, 0x1a, 0x87);
5510
5511 if(ivideo->chip == XGI_20) {
5512 outSISIDXREG(SISSR, 0x15, 0x00);
5513 outSISIDXREG(SISSR, 0x1c, 0x00);
5514 }
5515
5516 ramtype = 0x00; v1 = 0x10;
5517 if(ivideo->haveXGIROM) {
5518 ramtype = bios[0x62];
5519 v1 = bios[0x1d2];
5520 }
5521 if(!(ramtype & 0x80)) {
5522 if(ivideo->chip == XGI_20) {
5523 outSISIDXREG(SISCR, 0x97, v1);
5524 inSISIDXREG(SISCR, 0x97, reg);
5525 if(reg & 0x10) {
5526 ramtype = (reg & 0x01) << 1;
5527 }
5528 } else {
5529 inSISIDXREG(SISSR, 0x39, reg);
5530 ramtype = reg & 0x02;
5531 if(!(ramtype)) {
5532 inSISIDXREG(SISSR, 0x3a, reg);
5533 ramtype = (reg >> 1) & 0x01;
5534 }
5535 }
5536 }
5537 ramtype &= 0x07;
5538
5539 regb = 0; /* ! */
5540
5541 switch(ramtype) {
5542 case 0:
5543 sisfb_post_xgi_setclocks(ivideo, regb);
5544 if((ivideo->chip == XGI_20) ||
5545 (ivideo->revision_id == 1) ||
5546 (ivideo->revision_id == 2)) {
5547 v1 = cs158[regb]; v2 = cs160[regb]; v3 = cs168[regb];
5548 if(ivideo->haveXGIROM) {
5549 v1 = bios[regb + 0x158];
5550 v2 = bios[regb + 0x160];
5551 v3 = bios[regb + 0x168];
5552 }
5553 outSISIDXREG(SISCR, 0x82, v1);
5554 outSISIDXREG(SISCR, 0x85, v2);
5555 outSISIDXREG(SISCR, 0x86, v3);
5556 } else {
5557 outSISIDXREG(SISCR, 0x82, 0x88);
5558 outSISIDXREG(SISCR, 0x86, 0x00);
5559 inSISIDXREG(SISCR, 0x86, reg);
5560 outSISIDXREG(SISCR, 0x86, 0x88);
5561 inSISIDXREG(SISCR, 0x86, reg);
5562 outSISIDXREG(SISCR, 0x86, bios[regb + 0x168]);
5563 outSISIDXREG(SISCR, 0x82, 0x77);
5564 outSISIDXREG(SISCR, 0x85, 0x00);
5565 inSISIDXREG(SISCR, 0x85, reg);
5566 outSISIDXREG(SISCR, 0x85, 0x88);
5567 inSISIDXREG(SISCR, 0x85, reg);
5568 outSISIDXREG(SISCR, 0x85, bios[regb + 0x160]);
5569 outSISIDXREG(SISCR, 0x82, bios[regb + 0x158]);
5570 }
5571 if(ivideo->chip == XGI_40) {
5572 outSISIDXREG(SISCR, 0x97, 0x00);
5573 }
5574 outSISIDXREG(SISCR, 0x98, 0x01);
5575 outSISIDXREG(SISCR, 0x9a, 0x02);
5576
5577 outSISIDXREG(SISSR, 0x18, 0x01);
5578 if((ivideo->chip == XGI_20) ||
5579 (ivideo->revision_id == 2)) {
5580 outSISIDXREG(SISSR, 0x19, 0x40);
5581 } else {
5582 outSISIDXREG(SISSR, 0x19, 0x20);
5583 }
5584 outSISIDXREG(SISSR, 0x16, 0x00);
5585 outSISIDXREG(SISSR, 0x16, 0x80);
5586 if((ivideo->chip == XGI_20) || (bios[0x1cb] != 0x0c)) {
5587 sisfb_post_xgi_delay(ivideo, 0x43);
5588 sisfb_post_xgi_delay(ivideo, 0x43);
5589 sisfb_post_xgi_delay(ivideo, 0x43);
5590 outSISIDXREG(SISSR, 0x18, 0x00);
5591 if((ivideo->chip == XGI_20) ||
5592 (ivideo->revision_id == 2)) {
5593 outSISIDXREG(SISSR, 0x19, 0x40);
5594 } else {
5595 outSISIDXREG(SISSR, 0x19, 0x20);
5596 }
5597 } else if((ivideo->chip == XGI_40) && (bios[0x1cb] == 0x0c)) {
5598 /* outSISIDXREG(SISSR, 0x16, 0x0c); */ /* ? */
5599 }
5600 outSISIDXREG(SISSR, 0x16, 0x00);
5601 outSISIDXREG(SISSR, 0x16, 0x80);
5602 sisfb_post_xgi_delay(ivideo, 4);
5603 v1 = 0x31; v2 = 0x03; v3 = 0x83; v4 = 0x03; v5 = 0x83;
5604 if(ivideo->haveXGIROM) {
5605 v1 = bios[0xf0];
5606 index = (ivideo->chip == XGI_20) ? 0x4b2 : 0x53e;
5607 v2 = bios[index];
5608 v3 = bios[index + 1];
5609 v4 = bios[index + 2];
5610 v5 = bios[index + 3];
5611 }
5612 outSISIDXREG(SISSR, 0x18, v1);
5613 outSISIDXREG(SISSR, 0x19, ((ivideo->chip == XGI_20) ? 0x02 : 0x01));
5614 outSISIDXREG(SISSR, 0x16, v2);
5615 outSISIDXREG(SISSR, 0x16, v3);
5616 sisfb_post_xgi_delay(ivideo, 0x43);
5617 outSISIDXREG(SISSR, 0x1b, 0x03);
5618 sisfb_post_xgi_delay(ivideo, 0x22);
5619 outSISIDXREG(SISSR, 0x18, v1);
5620 outSISIDXREG(SISSR, 0x19, 0x00);
5621 outSISIDXREG(SISSR, 0x16, v4);
5622 outSISIDXREG(SISSR, 0x16, v5);
5623 outSISIDXREG(SISSR, 0x1b, 0x00);
5624 break;
5625 case 1:
5626 outSISIDXREG(SISCR, 0x82, 0x77);
5627 outSISIDXREG(SISCR, 0x86, 0x00);
5628 inSISIDXREG(SISCR, 0x86, reg);
5629 outSISIDXREG(SISCR, 0x86, 0x88);
5630 inSISIDXREG(SISCR, 0x86, reg);
5631 v1 = cs168[regb]; v2 = cs160[regb]; v3 = cs158[regb];
5632 if(ivideo->haveXGIROM) {
5633 v1 = bios[regb + 0x168];
5634 v2 = bios[regb + 0x160];
5635 v3 = bios[regb + 0x158];
5636 }
5637 outSISIDXREG(SISCR, 0x86, v1);
5638 outSISIDXREG(SISCR, 0x82, 0x77);
5639 outSISIDXREG(SISCR, 0x85, 0x00);
5640 inSISIDXREG(SISCR, 0x85, reg);
5641 outSISIDXREG(SISCR, 0x85, 0x88);
5642 inSISIDXREG(SISCR, 0x85, reg);
5643 outSISIDXREG(SISCR, 0x85, v2);
5644 outSISIDXREG(SISCR, 0x82, v3);
5645 outSISIDXREG(SISCR, 0x98, 0x01);
5646 outSISIDXREG(SISCR, 0x9a, 0x02);
5647
5648 outSISIDXREG(SISSR, 0x28, 0x64);
5649 outSISIDXREG(SISSR, 0x29, 0x63);
5650 sisfb_post_xgi_delay(ivideo, 15);
5651 outSISIDXREG(SISSR, 0x18, 0x00);
5652 outSISIDXREG(SISSR, 0x19, 0x20);
5653 outSISIDXREG(SISSR, 0x16, 0x00);
5654 outSISIDXREG(SISSR, 0x16, 0x80);
5655 outSISIDXREG(SISSR, 0x18, 0xc5);
5656 outSISIDXREG(SISSR, 0x19, 0x23);
5657 outSISIDXREG(SISSR, 0x16, 0x00);
5658 outSISIDXREG(SISSR, 0x16, 0x80);
5659 sisfb_post_xgi_delay(ivideo, 1);
5660 outSISIDXREG(SISCR, 0x97,0x11);
5661 sisfb_post_xgi_setclocks(ivideo, regb);
5662 sisfb_post_xgi_delay(ivideo, 0x46);
5663 outSISIDXREG(SISSR, 0x18, 0xc5);
5664 outSISIDXREG(SISSR, 0x19, 0x23);
5665 outSISIDXREG(SISSR, 0x16, 0x00);
5666 outSISIDXREG(SISSR, 0x16, 0x80);
5667 sisfb_post_xgi_delay(ivideo, 1);
5668 outSISIDXREG(SISSR, 0x1b, 0x04);
5669 sisfb_post_xgi_delay(ivideo, 1);
5670 outSISIDXREG(SISSR, 0x1b, 0x00);
5671 sisfb_post_xgi_delay(ivideo, 1);
5672 v1 = 0x31;
5673 if(ivideo->haveXGIROM) {
5674 v1 = bios[0xf0];
5675 }
5676 outSISIDXREG(SISSR, 0x18, v1);
5677 outSISIDXREG(SISSR, 0x19, 0x06);
5678 outSISIDXREG(SISSR, 0x16, 0x04);
5679 outSISIDXREG(SISSR, 0x16, 0x84);
5680 sisfb_post_xgi_delay(ivideo, 1);
5681 break;
5682 default:
5683 sisfb_post_xgi_setclocks(ivideo, regb);
5684 if((ivideo->chip == XGI_40) &&
5685 ((ivideo->revision_id == 1) ||
5686 (ivideo->revision_id == 2))) {
5687 outSISIDXREG(SISCR, 0x82, bios[regb + 0x158]);
5688 outSISIDXREG(SISCR, 0x85, bios[regb + 0x160]);
5689 outSISIDXREG(SISCR, 0x86, bios[regb + 0x168]);
5690 } else {
5691 outSISIDXREG(SISCR, 0x82, 0x88);
5692 outSISIDXREG(SISCR, 0x86, 0x00);
5693 inSISIDXREG(SISCR, 0x86, reg);
5694 outSISIDXREG(SISCR, 0x86, 0x88);
5695 outSISIDXREG(SISCR, 0x82, 0x77);
5696 outSISIDXREG(SISCR, 0x85, 0x00);
5697 inSISIDXREG(SISCR, 0x85, reg);
5698 outSISIDXREG(SISCR, 0x85, 0x88);
5699 inSISIDXREG(SISCR, 0x85, reg);
5700 v1 = cs160[regb]; v2 = cs158[regb];
5701 if(ivideo->haveXGIROM) {
5702 v1 = bios[regb + 0x160];
5703 v2 = bios[regb + 0x158];
5704 }
5705 outSISIDXREG(SISCR, 0x85, v1);
5706 outSISIDXREG(SISCR, 0x82, v2);
5707 }
5708 if(ivideo->chip == XGI_40) {
5709 outSISIDXREG(SISCR, 0x97, 0x11);
5710 }
5711 if((ivideo->chip == XGI_40) && (ivideo->revision_id == 2)) {
5712 outSISIDXREG(SISCR, 0x98, 0x01);
5713 } else {
5714 outSISIDXREG(SISCR, 0x98, 0x03);
5715 }
5716 outSISIDXREG(SISCR, 0x9a, 0x02);
5717
5718 if(ivideo->chip == XGI_40) {
5719 outSISIDXREG(SISSR, 0x18, 0x01);
5720 } else {
5721 outSISIDXREG(SISSR, 0x18, 0x00);
5722 }
5723 outSISIDXREG(SISSR, 0x19, 0x40);
5724 outSISIDXREG(SISSR, 0x16, 0x00);
5725 outSISIDXREG(SISSR, 0x16, 0x80);
5726 if((ivideo->chip == XGI_40) && (bios[0x1cb] != 0x0c)) {
5727 sisfb_post_xgi_delay(ivideo, 0x43);
5728 sisfb_post_xgi_delay(ivideo, 0x43);
5729 sisfb_post_xgi_delay(ivideo, 0x43);
5730 outSISIDXREG(SISSR, 0x18, 0x00);
5731 outSISIDXREG(SISSR, 0x19, 0x40);
5732 outSISIDXREG(SISSR, 0x16, 0x00);
5733 outSISIDXREG(SISSR, 0x16, 0x80);
5734 }
5735 sisfb_post_xgi_delay(ivideo, 4);
5736 v1 = 0x31;
5737 if(ivideo->haveXGIROM) {
5738 v1 = bios[0xf0];
5739 }
5740 outSISIDXREG(SISSR, 0x18, v1);
5741 outSISIDXREG(SISSR, 0x19, 0x01);
5742 if(ivideo->chip == XGI_40) {
5743 outSISIDXREG(SISSR, 0x16, bios[0x53e]);
5744 outSISIDXREG(SISSR, 0x16, bios[0x53f]);
5745 } else {
5746 outSISIDXREG(SISSR, 0x16, 0x05);
5747 outSISIDXREG(SISSR, 0x16, 0x85);
5748 }
5749 sisfb_post_xgi_delay(ivideo, 0x43);
5750 if(ivideo->chip == XGI_40) {
5751 outSISIDXREG(SISSR, 0x1b, 0x01);
5752 } else {
5753 outSISIDXREG(SISSR, 0x1b, 0x03);
5754 }
5755 sisfb_post_xgi_delay(ivideo, 0x22);
5756 outSISIDXREG(SISSR, 0x18, v1);
5757 outSISIDXREG(SISSR, 0x19, 0x00);
5758 if(ivideo->chip == XGI_40) {
5759 outSISIDXREG(SISSR, 0x16, bios[0x540]);
5760 outSISIDXREG(SISSR, 0x16, bios[0x541]);
5761 } else {
5762 outSISIDXREG(SISSR, 0x16, 0x05);
5763 outSISIDXREG(SISSR, 0x16, 0x85);
5764 }
5765 outSISIDXREG(SISSR, 0x1b, 0x00);
5766 }
5767
5768 regb = 0; /* ! */
5769 v1 = 0x03;
5770 if(ivideo->haveXGIROM) {
5771 v1 = bios[0x110 + regb];
5772 }
5773 outSISIDXREG(SISSR, 0x1b, v1);
5774
5775 /* RAM size */
5776 v1 = 0x00; v2 = 0x00;
5777 if(ivideo->haveXGIROM) {
5778 v1 = bios[0x62];
5779 v2 = bios[0x63];
4748 } 5780 }
5781 regb = 0; /* ! */
5782 regd = 1 << regb;
5783 if((v1 & 0x40) && (v2 & regd) && ivideo->haveXGIROM) {
5784
5785 outSISIDXREG(SISSR, 0x13, bios[regb + 0xe0]);
5786 outSISIDXREG(SISSR, 0x14, bios[regb + 0xe0 + 8]);
5787
5788 } else {
5789
5790 /* Set default mode, don't clear screen */
5791 ivideo->SiS_Pr.SiS_UseOEM = FALSE;
5792 SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE);
5793 SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE);
5794 ivideo->curFSTN = ivideo->curDSTN = 0;
5795 ivideo->SiS_Pr.VideoMemorySize = 8 << 20;
5796 SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80);
5797
5798 outSISIDXREG(SISSR, 0x05, 0x86);
5799
5800 /* Disable read-cache */
5801 andSISIDXREG(SISSR, 0x21, 0xdf);
5802 sisfb_post_xgi_ramsize(ivideo);
5803 /* Enable read-cache */
5804 orSISIDXREG(SISSR, 0x21, 0x20);
4749 5805
4750 /* AGP (Missing: Checks for VIA and AMD hosts) */
4751 v1 = 0xA5; v2 = 0xFB;
4752 if(ivideo->sishw_ext.UseROM) {
4753 v1 = ivideo->sishw_ext.pjVirtualRomBase[0x9A];
4754 v2 = ivideo->sishw_ext.pjVirtualRomBase[0x9B];
4755 } 5806 }
4756 outSISIDXREG(SISSR,0x21,v1);
4757 outSISIDXREG(SISSR,0x22,v2);
4758 5807
5808#if 0
5809 printk(KERN_DEBUG "-----------------\n");
5810 for(i = 0; i < 0xff; i++) {
5811 inSISIDXREG(SISCR, i, reg);
5812 printk(KERN_DEBUG "CR%02x(%x) = 0x%02x\n", i, SISCR, reg);
5813 }
5814 for(i = 0; i < 0x40; i++) {
5815 inSISIDXREG(SISSR, i, reg);
5816 printk(KERN_DEBUG "SR%02x(%x) = 0x%02x\n", i, SISSR, reg);
5817 }
5818 printk(KERN_DEBUG "-----------------\n");
4759#endif 5819#endif
4760 return; 5820
5821 /* Sense CRT1 */
5822 if(ivideo->chip == XGI_20) {
5823 orSISIDXREG(SISCR, 0x32, 0x20);
5824 } else {
5825 inSISIDXREG(SISPART4, 0x00, reg);
5826 if((reg == 1) || (reg == 2)) {
5827 sisfb_sense_crt1(ivideo);
5828 } else {
5829 orSISIDXREG(SISCR, 0x32, 0x20);
5830 }
5831 }
5832
5833 /* Set default mode, don't clear screen */
5834 ivideo->SiS_Pr.SiS_UseOEM = FALSE;
5835 SiS_SetEnableDstn(&ivideo->SiS_Pr, FALSE);
5836 SiS_SetEnableFstn(&ivideo->SiS_Pr, FALSE);
5837 ivideo->curFSTN = ivideo->curDSTN = 0;
5838 SiSSetMode(&ivideo->SiS_Pr, 0x2e | 0x80);
5839
5840 outSISIDXREG(SISSR, 0x05, 0x86);
5841
5842 /* Display off */
5843 orSISIDXREG(SISSR, 0x01, 0x20);
5844
5845 /* Save mode number in CR34 */
5846 outSISIDXREG(SISCR, 0x34, 0x2e);
5847
5848 /* Let everyone know what the current mode is */
5849 ivideo->modeprechange = 0x2e;
5850
5851 if(ivideo->chip == XGI_40) {
5852 inSISIDXREG(SISCR, 0xca, reg);
5853 inSISIDXREG(SISCR, 0xcc, v1);
5854 if((reg & 0x10) && (!(v1 & 0x04))) {
5855 printk(KERN_ERR
5856 "sisfb: Please connect power to the card.\n");
5857 return 0;
5858 }
5859 }
5860
5861 return 1;
4761} 5862}
4762#endif 5863#endif
4763 5864
4764 5865static int __devinit
4765static int __devinit sisfb_probe(struct pci_dev *pdev, 5866sisfb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4766 const struct pci_device_id *ent)
4767{ 5867{
4768 struct sisfb_chip_info *chipinfo = &sisfb_chip_info[ent->driver_data]; 5868 struct sisfb_chip_info *chipinfo = &sisfb_chip_info[ent->driver_data];
4769 struct sis_video_info *ivideo = NULL; 5869 struct sis_video_info *ivideo = NULL;
4770 struct fb_info *sis_fb_info = NULL; 5870 struct fb_info *sis_fb_info = NULL;
4771 u16 reg16; 5871 u16 reg16;
4772 u8 reg; 5872 u8 reg;
4773 int sisvga_enabled = 0, i; 5873 int i, ret;
4774 5874
4775 if(sisfb_off) return -ENXIO; 5875 if(sisfb_off)
5876 return -ENXIO;
4776 5877
4777#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,3)) 5878#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,3))
4778 sis_fb_info = framebuffer_alloc(sizeof(*ivideo), &pdev->dev); 5879 sis_fb_info = framebuffer_alloc(sizeof(*ivideo), &pdev->dev);
4779 if(!sis_fb_info) return -ENOMEM; 5880 if(!sis_fb_info)
5881 return -ENOMEM;
4780#else 5882#else
4781 sis_fb_info = kmalloc(sizeof(*sis_fb_info) + sizeof(*ivideo), GFP_KERNEL); 5883 sis_fb_info = kmalloc(sizeof(*sis_fb_info) + sizeof(*ivideo), GFP_KERNEL);
4782 if(!sis_fb_info) return -ENOMEM; 5884 if(!sis_fb_info)
5885 return -ENOMEM;
4783 memset(sis_fb_info, 0, sizeof(*sis_fb_info) + sizeof(*ivideo)); 5886 memset(sis_fb_info, 0, sizeof(*sis_fb_info) + sizeof(*ivideo));
4784 sis_fb_info->par = ((char *)sis_fb_info + sizeof(*sis_fb_info)); 5887 sis_fb_info->par = ((char *)sis_fb_info + sizeof(*sis_fb_info));
4785#endif 5888#endif
@@ -4787,27 +5890,34 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4787 ivideo = (struct sis_video_info *)sis_fb_info->par; 5890 ivideo = (struct sis_video_info *)sis_fb_info->par;
4788 ivideo->memyselfandi = sis_fb_info; 5891 ivideo->memyselfandi = sis_fb_info;
4789 5892
5893 ivideo->sisfb_id = SISFB_ID;
5894
4790 if(card_list == NULL) { 5895 if(card_list == NULL) {
4791 ivideo->cardnumber = 0; 5896 ivideo->cardnumber = 0;
4792 } else { 5897 } else {
4793 struct sis_video_info *countvideo = card_list; 5898 struct sis_video_info *countvideo = card_list;
4794 ivideo->cardnumber = 1; 5899 ivideo->cardnumber = 1;
4795 while((countvideo = countvideo->next) != NULL) ivideo->cardnumber++; 5900 while((countvideo = countvideo->next) != 0)
5901 ivideo->cardnumber++;
4796 } 5902 }
4797 5903
4798 strncpy(ivideo->myid, chipinfo->chip_name, 30); 5904 strncpy(ivideo->myid, chipinfo->chip_name, 30);
4799 5905
4800 ivideo->warncount = 0; 5906 ivideo->warncount = 0;
4801 ivideo->chip_id = pdev->device; 5907 ivideo->chip_id = pdev->device;
5908 ivideo->chip_vendor = pdev->vendor;
4802 pci_read_config_byte(pdev, PCI_REVISION_ID, &ivideo->revision_id); 5909 pci_read_config_byte(pdev, PCI_REVISION_ID, &ivideo->revision_id);
4803 ivideo->sishw_ext.jChipRevision = ivideo->revision_id; 5910 ivideo->SiS_Pr.ChipRevision = ivideo->revision_id;
4804 pci_read_config_word(pdev, PCI_COMMAND, &reg16); 5911 pci_read_config_word(pdev, PCI_COMMAND, &reg16);
4805 sisvga_enabled = reg16 & 0x01; 5912 ivideo->sisvga_enabled = reg16 & 0x01;
4806 ivideo->pcibus = pdev->bus->number; 5913 ivideo->pcibus = pdev->bus->number;
4807 ivideo->pcislot = PCI_SLOT(pdev->devfn); 5914 ivideo->pcislot = PCI_SLOT(pdev->devfn);
4808 ivideo->pcifunc = PCI_FUNC(pdev->devfn); 5915 ivideo->pcifunc = PCI_FUNC(pdev->devfn);
4809 ivideo->subsysvendor = pdev->subsystem_vendor; 5916 ivideo->subsysvendor = pdev->subsystem_vendor;
4810 ivideo->subsysdevice = pdev->subsystem_device; 5917 ivideo->subsysdevice = pdev->subsystem_device;
5918#ifdef SIS_OLD_CONFIG_COMPAT
5919 ivideo->ioctl32registered = 0;
5920#endif
4811 5921
4812#ifndef MODULE 5922#ifndef MODULE
4813 if(sisfb_mode_idx == -1) { 5923 if(sisfb_mode_idx == -1) {
@@ -4827,6 +5937,24 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4827 5937
4828 ivideo->sisfb_thismonitor.datavalid = FALSE; 5938 ivideo->sisfb_thismonitor.datavalid = FALSE;
4829 5939
5940 ivideo->current_base = 0;
5941
5942 ivideo->engineok = 0;
5943
5944 ivideo->sisfb_was_boot_device = 0;
5945#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12))
5946 if(pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW) {
5947 if(ivideo->sisvga_enabled)
5948 ivideo->sisfb_was_boot_device = 1;
5949 else {
5950 printk(KERN_DEBUG "sisfb: PCI device is disabled, "
5951 "but marked as boot video device ???\n");
5952 printk(KERN_DEBUG "sisfb: I will not accept this "
5953 "as the primary VGA device\n");
5954 }
5955 }
5956#endif
5957
4830 ivideo->sisfb_parm_mem = sisfb_parm_mem; 5958 ivideo->sisfb_parm_mem = sisfb_parm_mem;
4831 ivideo->sisfb_accel = sisfb_accel; 5959 ivideo->sisfb_accel = sisfb_accel;
4832 ivideo->sisfb_ypan = sisfb_ypan; 5960 ivideo->sisfb_ypan = sisfb_ypan;
@@ -4846,7 +5974,6 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4846 ivideo->sisfb_tvstd = sisfb_tvstd; 5974 ivideo->sisfb_tvstd = sisfb_tvstd;
4847 ivideo->tvxpos = sisfb_tvxposoffset; 5975 ivideo->tvxpos = sisfb_tvxposoffset;
4848 ivideo->tvypos = sisfb_tvyposoffset; 5976 ivideo->tvypos = sisfb_tvyposoffset;
4849 ivideo->sisfb_filter = sisfb_filter;
4850 ivideo->sisfb_nocrt2rate = sisfb_nocrt2rate; 5977 ivideo->sisfb_nocrt2rate = sisfb_nocrt2rate;
4851#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0) 5978#if LINUX_VERSION_CODE <= KERNEL_VERSION(2,5,0)
4852 ivideo->sisfb_inverse = sisfb_inverse; 5979 ivideo->sisfb_inverse = sisfb_inverse;
@@ -4854,7 +5981,7 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4854 5981
4855 ivideo->refresh_rate = 0; 5982 ivideo->refresh_rate = 0;
4856 if(ivideo->sisfb_parm_rate != -1) { 5983 if(ivideo->sisfb_parm_rate != -1) {
4857 ivideo->refresh_rate = ivideo->sisfb_parm_rate; 5984 ivideo->refresh_rate = ivideo->sisfb_parm_rate;
4858 } 5985 }
4859 5986
4860 ivideo->SiS_Pr.UsePanelScaler = sisfb_scalelcd; 5987 ivideo->SiS_Pr.UsePanelScaler = sisfb_scalelcd;
@@ -4863,8 +5990,8 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4863 ivideo->SiS_Pr.LVDSHL = sisfb_lvdshl; 5990 ivideo->SiS_Pr.LVDSHL = sisfb_lvdshl;
4864 5991
4865 ivideo->SiS_Pr.SiS_Backup70xx = 0xff; 5992 ivideo->SiS_Pr.SiS_Backup70xx = 0xff;
4866 ivideo->SiS_Pr.SiS_CHOverScan = -1; 5993 ivideo->SiS_Pr.SiS_CHOverScan = -1;
4867 ivideo->SiS_Pr.SiS_ChSW = FALSE; 5994 ivideo->SiS_Pr.SiS_ChSW = FALSE;
4868 ivideo->SiS_Pr.SiS_UseLCDA = FALSE; 5995 ivideo->SiS_Pr.SiS_UseLCDA = FALSE;
4869 ivideo->SiS_Pr.HaveEMI = FALSE; 5996 ivideo->SiS_Pr.HaveEMI = FALSE;
4870 ivideo->SiS_Pr.HaveEMILCD = FALSE; 5997 ivideo->SiS_Pr.HaveEMILCD = FALSE;
@@ -4873,12 +6000,13 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4873 ivideo->SiS_Pr.SiS_MyCR63 = 0x63; 6000 ivideo->SiS_Pr.SiS_MyCR63 = 0x63;
4874 ivideo->SiS_Pr.PDC = -1; 6001 ivideo->SiS_Pr.PDC = -1;
4875 ivideo->SiS_Pr.PDCA = -1; 6002 ivideo->SiS_Pr.PDCA = -1;
6003 ivideo->SiS_Pr.DDCPortMixup = FALSE;
4876#ifdef CONFIG_FB_SIS_315 6004#ifdef CONFIG_FB_SIS_315
4877 if(ivideo->chip >= SIS_330) { 6005 if(ivideo->chip >= SIS_330) {
4878 ivideo->SiS_Pr.SiS_MyCR63 = 0x53; 6006 ivideo->SiS_Pr.SiS_MyCR63 = 0x53;
4879 if(ivideo->chip >= SIS_661) { 6007 if(ivideo->chip >= SIS_661) {
4880 ivideo->SiS_Pr.SiS_SensibleSR11 = TRUE; 6008 ivideo->SiS_Pr.SiS_SensibleSR11 = TRUE;
4881 } 6009 }
4882 } 6010 }
4883#endif 6011#endif
4884 6012
@@ -4891,9 +6019,9 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4891 switch(ivideo->nbridge->device) { 6019 switch(ivideo->nbridge->device) {
4892#ifdef CONFIG_FB_SIS_300 6020#ifdef CONFIG_FB_SIS_300
4893 case PCI_DEVICE_ID_SI_730: 6021 case PCI_DEVICE_ID_SI_730:
4894 ivideo->chip = SIS_730; 6022 ivideo->chip = SIS_730;
4895 strcpy(ivideo->myid, "SiS 730"); 6023 strcpy(ivideo->myid, "SiS 730");
4896 break; 6024 break;
4897#endif 6025#endif
4898#ifdef CONFIG_FB_SIS_315 6026#ifdef CONFIG_FB_SIS_315
4899 case PCI_DEVICE_ID_SI_651: 6027 case PCI_DEVICE_ID_SI_651:
@@ -4901,22 +6029,28 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4901 strcpy(ivideo->myid, "SiS 651"); 6029 strcpy(ivideo->myid, "SiS 651");
4902 break; 6030 break;
4903 case PCI_DEVICE_ID_SI_740: 6031 case PCI_DEVICE_ID_SI_740:
4904 ivideo->chip = SIS_740; 6032 ivideo->chip = SIS_740;
4905 strcpy(ivideo->myid, "SiS 740"); 6033 strcpy(ivideo->myid, "SiS 740");
4906 break; 6034 break;
4907 case PCI_DEVICE_ID_SI_661: 6035 case PCI_DEVICE_ID_SI_661:
4908 ivideo->chip = SIS_661; 6036 ivideo->chip = SIS_661;
4909 strcpy(ivideo->myid, "SiS 661"); 6037 strcpy(ivideo->myid, "SiS 661");
4910 break; 6038 break;
4911 case PCI_DEVICE_ID_SI_741: 6039 case PCI_DEVICE_ID_SI_741:
4912 ivideo->chip = SIS_741; 6040 ivideo->chip = SIS_741;
4913 strcpy(ivideo->myid, "SiS 741"); 6041 strcpy(ivideo->myid, "SiS 741");
4914 break; 6042 break;
4915 case PCI_DEVICE_ID_SI_760: 6043 case PCI_DEVICE_ID_SI_760:
4916 ivideo->chip = SIS_760; 6044 ivideo->chip = SIS_760;
4917 strcpy(ivideo->myid, "SiS 760"); 6045 strcpy(ivideo->myid, "SiS 760");
4918 break; 6046 break;
6047 case PCI_DEVICE_ID_SI_761:
6048 ivideo->chip = SIS_761;
6049 strcpy(ivideo->myid, "SiS 761");
6050 break;
4919#endif 6051#endif
6052 default:
6053 break;
4920 } 6054 }
4921 } 6055 }
4922 6056
@@ -4924,71 +6058,83 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4924 strcpy(sis_fb_info->modename, ivideo->myid); 6058 strcpy(sis_fb_info->modename, ivideo->myid);
4925#endif 6059#endif
4926 6060
4927 ivideo->sishw_ext.jChipType = ivideo->chip; 6061 ivideo->SiS_Pr.ChipType = ivideo->chip;
6062
6063 ivideo->SiS_Pr.ivideo = (void *)ivideo;
4928 6064
4929#ifdef CONFIG_FB_SIS_315 6065#ifdef CONFIG_FB_SIS_315
4930 if((ivideo->sishw_ext.jChipType == SIS_315PRO) || 6066 if((ivideo->SiS_Pr.ChipType == SIS_315PRO) ||
4931 (ivideo->sishw_ext.jChipType == SIS_315)) { 6067 (ivideo->SiS_Pr.ChipType == SIS_315)) {
4932 ivideo->sishw_ext.jChipType = SIS_315H; 6068 ivideo->SiS_Pr.ChipType = SIS_315H;
4933 } 6069 }
4934#endif 6070#endif
4935 6071
6072 if(!ivideo->sisvga_enabled) {
6073 if(pci_enable_device(pdev)) {
6074 if(ivideo->nbridge) SIS_PCI_PUT_DEVICE(ivideo->nbridge);
6075 pci_set_drvdata(pdev, NULL);
6076 kfree(sis_fb_info);
6077 return -EIO;
6078 }
6079 }
6080
4936 ivideo->video_base = pci_resource_start(pdev, 0); 6081 ivideo->video_base = pci_resource_start(pdev, 0);
4937 ivideo->mmio_base = pci_resource_start(pdev, 1); 6082 ivideo->mmio_base = pci_resource_start(pdev, 1);
4938 ivideo->mmio_size = pci_resource_len(pdev, 1); 6083 ivideo->mmio_size = pci_resource_len(pdev, 1);
4939 ivideo->SiS_Pr.RelIO = pci_resource_start(pdev, 2) + 0x30; 6084 ivideo->SiS_Pr.RelIO = pci_resource_start(pdev, 2) + 0x30;
4940 ivideo->sishw_ext.ulIOAddress = ivideo->vga_base = ivideo->SiS_Pr.RelIO; 6085 ivideo->SiS_Pr.IOAddress = ivideo->vga_base = ivideo->SiS_Pr.RelIO;
4941 6086
4942 if(!sisvga_enabled) { 6087 SiSRegInit(&ivideo->SiS_Pr, ivideo->SiS_Pr.IOAddress);
4943 if(pci_enable_device(pdev)) {
4944 pci_set_drvdata(pdev, NULL);
4945 kfree(sis_fb_info);
4946 return -EIO;
4947 }
4948 }
4949
4950 SiSRegInit(&ivideo->SiS_Pr, ivideo->sishw_ext.ulIOAddress);
4951 6088
4952#ifdef CONFIG_FB_SIS_300 6089#ifdef CONFIG_FB_SIS_300
4953 /* Find PCI systems for Chrontel/GPIO communication setup */ 6090 /* Find PCI systems for Chrontel/GPIO communication setup */
4954 if(ivideo->chip == SIS_630) { 6091 if(ivideo->chip == SIS_630) {
4955 i=0; 6092 i = 0;
4956 do { 6093 do {
4957 if(mychswtable[i].subsysVendor == ivideo->subsysvendor && 6094 if(mychswtable[i].subsysVendor == ivideo->subsysvendor &&
4958 mychswtable[i].subsysCard == ivideo->subsysdevice) { 6095 mychswtable[i].subsysCard == ivideo->subsysdevice) {
4959 ivideo->SiS_Pr.SiS_ChSW = TRUE; 6096 ivideo->SiS_Pr.SiS_ChSW = TRUE;
4960 printk(KERN_DEBUG "sisfb: Identified [%s %s] requiring Chrontel/GPIO setup\n", 6097 printk(KERN_DEBUG "sisfb: Identified [%s %s] "
4961 mychswtable[i].vendorName, mychswtable[i].cardName); 6098 "requiring Chrontel/GPIO setup\n",
4962 break; 6099 mychswtable[i].vendorName,
4963 } 6100 mychswtable[i].cardName);
4964 i++; 6101 ivideo->lpcdev = SIS_PCI_GET_DEVICE(PCI_VENDOR_ID_SI, 0x0008, NULL);
4965 } while(mychswtable[i].subsysVendor != 0); 6102 break;
6103 }
6104 i++;
6105 } while(mychswtable[i].subsysVendor != 0);
6106 }
6107#endif
6108
6109#ifdef CONFIG_FB_SIS_315
6110 if((ivideo->chip == SIS_760) && (ivideo->nbridge)) {
6111 ivideo->lpcdev = SIS_PCI_GET_SLOT(ivideo->nbridge->bus, (2 << 3));
4966 } 6112 }
4967#endif 6113#endif
4968 6114
4969 outSISIDXREG(SISSR, 0x05, 0x86); 6115 outSISIDXREG(SISSR, 0x05, 0x86);
4970 6116
4971 if( (!sisvga_enabled) 6117 if( (!ivideo->sisvga_enabled)
4972#if !defined(__i386__) && !defined(__x86_64__) 6118#if !defined(__i386__) && !defined(__x86_64__)
4973 || (sisfb_resetcard) 6119 || (sisfb_resetcard)
4974#endif 6120#endif
4975 ) { 6121 ) {
4976 for(i = 0x30; i <= 0x3f; i++) { 6122 for(i = 0x30; i <= 0x3f; i++) {
4977 outSISIDXREG(SISCR,i,0x00); 6123 outSISIDXREG(SISCR, i, 0x00);
4978 } 6124 }
4979 } 6125 }
4980 6126
4981 /* Find out about current video mode */ 6127 /* Find out about current video mode */
4982 ivideo->modeprechange = 0x03; 6128 ivideo->modeprechange = 0x03;
4983 inSISIDXREG(SISCR,0x34,reg); 6129 inSISIDXREG(SISCR, 0x34, reg);
4984 if(reg & 0x7f) { 6130 if(reg & 0x7f) {
4985 ivideo->modeprechange = reg & 0x7f; 6131 ivideo->modeprechange = reg & 0x7f;
4986 } else if(sisvga_enabled) { 6132 } else if(ivideo->sisvga_enabled) {
4987#if defined(__i386__) || defined(__x86_64__) 6133#if defined(__i386__) || defined(__x86_64__)
4988 unsigned char SIS_IOTYPE2 *tt = ioremap(0, 0x1000); 6134 unsigned char SIS_IOTYPE2 *tt = ioremap(0x400, 0x100);
4989 if(tt) { 6135 if(tt) {
4990 ivideo->modeprechange = readb(tt + 0x449); 6136 ivideo->modeprechange = readb(tt + 0x49);
4991 iounmap(tt); 6137 iounmap(tt);
4992 } 6138 }
4993#endif 6139#endif
4994 } 6140 }
@@ -4996,219 +6142,221 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
4996#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 6142#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
4997#ifdef MODULE 6143#ifdef MODULE
4998 if((reg & 0x80) && (reg != 0xff)) { 6144 if((reg & 0x80) && (reg != 0xff)) {
4999 if((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF) { 6145 if((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni])
5000 printk(KERN_INFO "sisfb: Cannot initialize display mode, X server is active\n"); 6146 != 0xFF) {
5001 pci_set_drvdata(pdev, NULL); 6147 printk(KERN_INFO "sisfb: Cannot initialize display mode, "
5002 kfree(sis_fb_info); 6148 "X server is active\n");
5003 return -EBUSY; 6149 ret = -EBUSY;
5004 } 6150 goto error_4;
6151 }
5005 } 6152 }
5006#endif
5007#endif 6153#endif
5008
5009 ivideo->sishw_ext.bIntegratedMMEnabled = TRUE;
5010#ifdef CONFIG_FB_SIS_300
5011 if(ivideo->sisvga_engine == SIS_300_VGA) {
5012 if(ivideo->chip != SIS_300) {
5013 inSISIDXREG(SISSR, 0x1a, reg);
5014 if(!(reg & 0x10)) {
5015 ivideo->sishw_ext.bIntegratedMMEnabled = FALSE;
5016 }
5017 }
5018 }
5019#endif 6154#endif
5020 6155
6156 /* Search and copy ROM image */
5021 ivideo->bios_abase = NULL; 6157 ivideo->bios_abase = NULL;
6158 ivideo->SiS_Pr.VirtualRomBase = NULL;
6159 ivideo->SiS_Pr.UseROM = FALSE;
6160 ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = FALSE;
5022 if(ivideo->sisfb_userom) { 6161 if(ivideo->sisfb_userom) {
5023 ivideo->sishw_ext.pjVirtualRomBase = sis_find_rom(pdev); 6162 ivideo->SiS_Pr.VirtualRomBase = sisfb_find_rom(pdev);
5024 ivideo->bios_abase = ivideo->sishw_ext.pjVirtualRomBase; 6163 ivideo->bios_abase = ivideo->SiS_Pr.VirtualRomBase;
5025 if(ivideo->sishw_ext.pjVirtualRomBase) { 6164 ivideo->SiS_Pr.UseROM = (ivideo->SiS_Pr.VirtualRomBase) ? TRUE : FALSE;
5026 printk(KERN_INFO "sisfb: Video ROM found and copied\n"); 6165 printk(KERN_INFO "sisfb: Video ROM %sfound\n",
5027 ivideo->sishw_ext.UseROM = TRUE; 6166 ivideo->SiS_Pr.UseROM ? "" : "not ");
5028 } else { 6167 if((ivideo->SiS_Pr.UseROM) && (ivideo->chip >= XGI_20)) {
5029 ivideo->sishw_ext.UseROM = FALSE; 6168 ivideo->SiS_Pr.UseROM = FALSE;
5030 printk(KERN_INFO "sisfb: Video ROM not found\n"); 6169 ivideo->haveXGIROM = ivideo->SiS_Pr.SiS_XGIROM = TRUE;
5031 } 6170 if( (ivideo->revision_id == 2) &&
6171 (!(ivideo->bios_abase[0x1d1] & 0x01)) ) {
6172 ivideo->SiS_Pr.DDCPortMixup = TRUE;
6173 }
6174 }
5032 } else { 6175 } else {
5033 ivideo->sishw_ext.pjVirtualRomBase = NULL; 6176 printk(KERN_INFO "sisfb: Video ROM usage disabled\n");
5034 ivideo->sishw_ext.UseROM = FALSE;
5035 printk(KERN_INFO "sisfb: Video ROM usage disabled\n");
5036 } 6177 }
5037 6178
5038 /* Find systems for special custom timing */ 6179 /* Find systems for special custom timing */
5039 if(ivideo->SiS_Pr.SiS_CustomT == CUT_NONE) { 6180 if(ivideo->SiS_Pr.SiS_CustomT == CUT_NONE) {
5040 int j; 6181 sisfb_detect_custom_timing(ivideo);
5041 unsigned char *biosver = NULL;
5042 unsigned char *biosdate = NULL;
5043 BOOLEAN footprint;
5044 u32 chksum = 0;
5045
5046 if(ivideo->sishw_ext.UseROM) {
5047 biosver = ivideo->sishw_ext.pjVirtualRomBase + 0x06;
5048 biosdate = ivideo->sishw_ext.pjVirtualRomBase + 0x2c;
5049 for(i=0; i<32768; i++) chksum += ivideo->sishw_ext.pjVirtualRomBase[i];
5050 }
5051
5052 i=0;
5053 do {
5054 if( (mycustomttable[i].chipID == ivideo->chip) &&
5055 ((!strlen(mycustomttable[i].biosversion)) ||
5056 (ivideo->sishw_ext.UseROM &&
5057 (!strncmp(mycustomttable[i].biosversion, biosver, strlen(mycustomttable[i].biosversion))))) &&
5058 ((!strlen(mycustomttable[i].biosdate)) ||
5059 (ivideo->sishw_ext.UseROM &&
5060 (!strncmp(mycustomttable[i].biosdate, biosdate, strlen(mycustomttable[i].biosdate))))) &&
5061 ((!mycustomttable[i].bioschksum) ||
5062 (ivideo->sishw_ext.UseROM &&
5063 (mycustomttable[i].bioschksum == chksum))) &&
5064 (mycustomttable[i].pcisubsysvendor == ivideo->subsysvendor) &&
5065 (mycustomttable[i].pcisubsyscard == ivideo->subsysdevice) ) {
5066 footprint = TRUE;
5067 for(j = 0; j < 5; j++) {
5068 if(mycustomttable[i].biosFootprintAddr[j]) {
5069 if(ivideo->sishw_ext.UseROM) {
5070 if(ivideo->sishw_ext.pjVirtualRomBase[mycustomttable[i].biosFootprintAddr[j]] !=
5071 mycustomttable[i].biosFootprintData[j]) {
5072 footprint = FALSE;
5073 }
5074 } else footprint = FALSE;
5075 }
5076 }
5077 if(footprint) {
5078 ivideo->SiS_Pr.SiS_CustomT = mycustomttable[i].SpecialID;
5079 printk(KERN_DEBUG "sisfb: Identified [%s %s], special timing applies\n",
5080 mycustomttable[i].vendorName,
5081 mycustomttable[i].cardName);
5082 printk(KERN_DEBUG "sisfb: [specialtiming parameter name: %s]\n",
5083 mycustomttable[i].optionName);
5084 break;
5085 }
5086 }
5087 i++;
5088 } while(mycustomttable[i].chipID);
5089 } 6182 }
5090 6183
5091#ifdef CONFIG_FB_SIS_300 6184 /* POST card in case this has not been done by the BIOS */
5092 if(ivideo->sisvga_engine == SIS_300_VGA) { 6185 if( (!ivideo->sisvga_enabled)
5093 if( (!sisvga_enabled)
5094#if !defined(__i386__) && !defined(__x86_64__) 6186#if !defined(__i386__) && !defined(__x86_64__)
5095 || (sisfb_resetcard) 6187 || (sisfb_resetcard)
5096#endif 6188#endif
5097 ) { 6189 ) {
6190#ifdef CONFIG_FB_SIS_300
6191 if(ivideo->sisvga_engine == SIS_300_VGA) {
5098 if(ivideo->chip == SIS_300) { 6192 if(ivideo->chip == SIS_300) {
5099 sisfb_post_sis300(pdev); 6193 sisfb_post_sis300(pdev);
6194 ivideo->sisfb_can_post = 1;
5100 } 6195 }
5101 } 6196 }
5102 }
5103#endif 6197#endif
5104 6198
5105#ifdef CONFIG_FB_SIS_315 6199#ifdef CONFIG_FB_SIS_315
5106 if(ivideo->sisvga_engine == SIS_315_VGA) { 6200 if(ivideo->sisvga_engine == SIS_315_VGA) {
5107 if( (!sisvga_enabled) 6201 int result = 1;
5108#if !defined(__i386__) && !defined(__x86_64__) 6202 /* if((ivideo->chip == SIS_315H) ||
5109 || (sisfb_resetcard)
5110#endif
5111 ) {
5112 if((ivideo->chip == SIS_315H) ||
5113 (ivideo->chip == SIS_315) || 6203 (ivideo->chip == SIS_315) ||
5114 (ivideo->chip == SIS_315PRO) || 6204 (ivideo->chip == SIS_315PRO) ||
5115 (ivideo->chip == SIS_330)) { 6205 (ivideo->chip == SIS_330)) {
5116 sisfb_post_sis315330(pdev); 6206 sisfb_post_sis315330(pdev);
6207 } else */ if(ivideo->chip == XGI_20) {
6208 result = sisfb_post_xgi(pdev);
6209 ivideo->sisfb_can_post = 1;
6210 } else if((ivideo->chip == XGI_40) && ivideo->haveXGIROM) {
6211 result = sisfb_post_xgi(pdev);
6212 ivideo->sisfb_can_post = 1;
6213 } else {
6214 printk(KERN_INFO "sisfb: Card is not "
6215 "POSTed and sisfb can't do this either.\n");
6216 }
6217 if(!result) {
6218 printk(KERN_ERR "sisfb: Failed to POST card\n");
6219 ret = -ENODEV;
6220 goto error_3;
5117 } 6221 }
5118 } 6222 }
5119 }
5120#endif 6223#endif
6224 }
5121 6225
6226 ivideo->sisfb_card_posted = 1;
6227
6228 /* Find out about RAM size */
5122 if(sisfb_get_dram_size(ivideo)) { 6229 if(sisfb_get_dram_size(ivideo)) {
5123 printk(KERN_INFO "sisfb: Fatal error: Unable to determine RAM size.\n"); 6230 printk(KERN_INFO "sisfb: Fatal error: Unable to determine VRAM size.\n");
5124 if(ivideo->bios_abase) vfree(ivideo->bios_abase); 6231 ret = -ENODEV;
5125 pci_set_drvdata(pdev, NULL); 6232 goto error_3;
5126 kfree(sis_fb_info);
5127 return -ENODEV;
5128 } 6233 }
5129 6234
6235
6236 /* Enable PCI addressing and MMIO */
5130 if((ivideo->sisfb_mode_idx < 0) || 6237 if((ivideo->sisfb_mode_idx < 0) ||
5131 ((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF)) { 6238 ((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF)) {
5132 /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */ 6239 /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */
5133 orSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE)); 6240 orSISIDXREG(SISSR, IND_SIS_PCI_ADDRESS_SET, (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE));
5134 /* Enable 2D accelerator engine */ 6241 /* Enable 2D accelerator engine */
5135 orSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D); 6242 orSISIDXREG(SISSR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D);
5136 } 6243 }
5137 6244
5138 if(sisfb_pdc != 0xff) { 6245 if(sisfb_pdc != 0xff) {
5139 if(ivideo->sisvga_engine == SIS_300_VGA) sisfb_pdc &= 0x3c; 6246 if(ivideo->sisvga_engine == SIS_300_VGA)
5140 else sisfb_pdc &= 0x1f; 6247 sisfb_pdc &= 0x3c;
5141 ivideo->SiS_Pr.PDC = sisfb_pdc; 6248 else
6249 sisfb_pdc &= 0x1f;
6250 ivideo->SiS_Pr.PDC = sisfb_pdc;
5142 } 6251 }
5143#ifdef CONFIG_FB_SIS_315 6252#ifdef CONFIG_FB_SIS_315
5144 if(ivideo->sisvga_engine == SIS_315_VGA) { 6253 if(ivideo->sisvga_engine == SIS_315_VGA) {
5145 if(sisfb_pdca != 0xff) ivideo->SiS_Pr.PDCA = sisfb_pdca & 0x1f; 6254 if(sisfb_pdca != 0xff)
6255 ivideo->SiS_Pr.PDCA = sisfb_pdca & 0x1f;
5146 } 6256 }
5147#endif 6257#endif
5148 6258
5149 if(!request_mem_region(ivideo->video_base, ivideo->video_size, "sisfb FB")) { 6259 if(!request_mem_region(ivideo->video_base, ivideo->video_size, "sisfb FB")) {
5150 printk(KERN_ERR "sisfb: Fatal error: Unable to reserve frame buffer memory\n"); 6260 printk(KERN_ERR "sisfb: Fatal error: Unable to reserve %dMB framebuffer memory\n",
6261 (int)(ivideo->video_size >> 20));
5151 printk(KERN_ERR "sisfb: Is there another framebuffer driver active?\n"); 6262 printk(KERN_ERR "sisfb: Is there another framebuffer driver active?\n");
5152 if(ivideo->bios_abase) vfree(ivideo->bios_abase); 6263 ret = -ENODEV;
5153 pci_set_drvdata(pdev, NULL); 6264 goto error_3;
5154 kfree(sis_fb_info);
5155 return -ENODEV;
5156 } 6265 }
5157 6266
5158 if(!request_mem_region(ivideo->mmio_base, ivideo->mmio_size, "sisfb MMIO")) { 6267 if(!request_mem_region(ivideo->mmio_base, ivideo->mmio_size, "sisfb MMIO")) {
5159 printk(KERN_ERR "sisfb: Fatal error: Unable to reserve MMIO region\n"); 6268 printk(KERN_ERR "sisfb: Fatal error: Unable to reserve MMIO region\n");
5160 release_mem_region(ivideo->video_base, ivideo->video_size); 6269 ret = -ENODEV;
5161 if(ivideo->bios_abase) vfree(ivideo->bios_abase); 6270 goto error_2;
5162 pci_set_drvdata(pdev, NULL);
5163 kfree(sis_fb_info);
5164 return -ENODEV;
5165 } 6271 }
5166 6272
5167 ivideo->video_vbase = ioremap(ivideo->video_base, ivideo->video_size); 6273 ivideo->video_vbase = ioremap(ivideo->video_base, ivideo->video_size);
5168 ivideo->sishw_ext.pjVideoMemoryAddress = ivideo->video_vbase; 6274 ivideo->SiS_Pr.VideoMemoryAddress = ivideo->video_vbase;
5169 if(!ivideo->video_vbase) { 6275 if(!ivideo->video_vbase) {
5170 printk(KERN_ERR "sisfb: Fatal error: Unable to map frame buffer memory\n"); 6276 printk(KERN_ERR "sisfb: Fatal error: Unable to map framebuffer memory\n");
5171 release_mem_region(ivideo->video_base, ivideo->video_size); 6277 ret = -ENODEV;
5172 release_mem_region(ivideo->mmio_base, ivideo->mmio_size); 6278 goto error_1;
5173 if(ivideo->bios_abase) vfree(ivideo->bios_abase);
5174 pci_set_drvdata(pdev, NULL);
5175 kfree(sis_fb_info);
5176 return -ENODEV;
5177 } 6279 }
5178 6280
5179 ivideo->mmio_vbase = ioremap(ivideo->mmio_base, ivideo->mmio_size); 6281 ivideo->mmio_vbase = ioremap(ivideo->mmio_base, ivideo->mmio_size);
5180 if(!ivideo->mmio_vbase) { 6282 if(!ivideo->mmio_vbase) {
5181 printk(KERN_ERR "sisfb: Fatal error: Unable to map MMIO region\n"); 6283 printk(KERN_ERR "sisfb: Fatal error: Unable to map MMIO region\n");
5182 iounmap(ivideo->video_vbase); 6284 ret = -ENODEV;
5183 release_mem_region(ivideo->video_base, ivideo->video_size); 6285error_0: iounmap(ivideo->video_vbase);
5184 release_mem_region(ivideo->mmio_base, ivideo->mmio_size); 6286error_1: release_mem_region(ivideo->video_base, ivideo->video_size);
5185 if(ivideo->bios_abase) vfree(ivideo->bios_abase); 6287error_2: release_mem_region(ivideo->mmio_base, ivideo->mmio_size);
6288error_3: vfree(ivideo->bios_abase);
6289#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
6290error_4:
6291#endif
6292 if(ivideo->lpcdev)
6293 SIS_PCI_PUT_DEVICE(ivideo->lpcdev);
6294 if(ivideo->nbridge)
6295 SIS_PCI_PUT_DEVICE(ivideo->nbridge);
5186 pci_set_drvdata(pdev, NULL); 6296 pci_set_drvdata(pdev, NULL);
5187 kfree(sis_fb_info); 6297 if(!ivideo->sisvga_enabled)
5188 return -ENODEV; 6298 pci_disable_device(pdev);
6299 kfree(sis_fb_info);
6300 return ret;
5189 } 6301 }
5190 6302
5191 printk(KERN_INFO "sisfb: Framebuffer at 0x%lx, mapped to 0x%lx, size %ldk\n", 6303 printk(KERN_INFO "sisfb: Video RAM at 0x%lx, mapped to 0x%lx, size %ldk\n",
5192 ivideo->video_base, (ULONG)ivideo->video_vbase, ivideo->video_size / 1024); 6304 ivideo->video_base, (unsigned long)ivideo->video_vbase, ivideo->video_size / 1024);
6305
6306 if(ivideo->video_offset) {
6307 printk(KERN_INFO "sisfb: Viewport offset %ldk\n",
6308 ivideo->video_offset / 1024);
6309 }
5193 6310
5194 printk(KERN_INFO "sisfb: MMIO at 0x%lx, mapped to 0x%lx, size %ldk\n", 6311 printk(KERN_INFO "sisfb: MMIO at 0x%lx, mapped to 0x%lx, size %ldk\n",
5195 ivideo->mmio_base, (ULONG)ivideo->mmio_vbase, ivideo->mmio_size / 1024); 6312 ivideo->mmio_base, (unsigned long)ivideo->mmio_vbase, ivideo->mmio_size / 1024);
6313
5196 6314
6315 /* Determine the size of the command queue */
6316 if(ivideo->sisvga_engine == SIS_300_VGA) {
6317 ivideo->cmdQueueSize = TURBO_QUEUE_AREA_SIZE;
6318 } else {
6319 if(ivideo->chip == XGI_20) {
6320 ivideo->cmdQueueSize = COMMAND_QUEUE_AREA_SIZE_Z7;
6321 } else {
6322 ivideo->cmdQueueSize = COMMAND_QUEUE_AREA_SIZE;
6323 }
6324 }
6325
6326 /* Engines are no longer initialized here; this is
6327 * now done after the first mode-switch (if the
6328 * submitted var has its acceleration flags set).
6329 */
6330
6331 /* Calculate the base of the (unused) hw cursor */
6332 ivideo->hwcursor_vbase = ivideo->video_vbase
6333 + ivideo->video_size
6334 - ivideo->cmdQueueSize
6335 - ivideo->hwcursor_size;
6336 ivideo->caps |= HW_CURSOR_CAP;
6337
6338 /* Initialize offscreen memory manager */
5197 if((ivideo->havenoheap = sisfb_heap_init(ivideo))) { 6339 if((ivideo->havenoheap = sisfb_heap_init(ivideo))) {
5198 printk(KERN_WARNING "sisfb: Failed to initialize offscreen memory heap\n"); 6340 printk(KERN_WARNING "sisfb: Failed to initialize offscreen memory heap\n");
5199 } 6341 }
5200 6342
5201 /* Used for clearing the screen only, therefore respect our mem limit */ 6343 /* Used for clearing the screen only, therefore respect our mem limit */
5202 ivideo->sishw_ext.ulVideoMemorySize = ivideo->sisfb_mem; 6344 ivideo->SiS_Pr.VideoMemoryAddress += ivideo->video_offset;
6345 ivideo->SiS_Pr.VideoMemorySize = ivideo->sisfb_mem;
5203 6346
5204 ivideo->mtrr = 0; 6347 ivideo->mtrr = -1;
5205 6348
5206 ivideo->vbflags = 0; 6349 ivideo->vbflags = 0;
5207 ivideo->lcddefmodeidx = DEFAULT_LCDMODE; 6350 ivideo->lcddefmodeidx = DEFAULT_LCDMODE;
5208 ivideo->tvdefmodeidx = DEFAULT_TVMODE; 6351 ivideo->tvdefmodeidx = DEFAULT_TVMODE;
5209 ivideo->defmodeidx = DEFAULT_MODE; 6352 ivideo->defmodeidx = DEFAULT_MODE;
5210 6353
5211 ivideo->newrom = SiSDetermineROMLayout661(&ivideo->SiS_Pr, &ivideo->sishw_ext); 6354 ivideo->newrom = 0;
6355 if(ivideo->chip < XGI_20) {
6356 if(ivideo->bios_abase) {
6357 ivideo->newrom = SiSDetermineROMLayout661(&ivideo->SiS_Pr);
6358 }
6359 }
5212 6360
5213 if((ivideo->sisfb_mode_idx < 0) || 6361 if((ivideo->sisfb_mode_idx < 0) ||
5214 ((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF)) { 6362 ((sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]) != 0xFF)) {
@@ -5217,192 +6365,57 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5217 6365
5218 sisfb_get_VB_type(ivideo); 6366 sisfb_get_VB_type(ivideo);
5219 6367
5220 if(ivideo->vbflags & VB_VIDEOBRIDGE) { 6368 if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) {
5221 sisfb_detect_VB_connect(ivideo); 6369 sisfb_detect_VB_connect(ivideo);
5222 } 6370 }
5223 6371
5224 ivideo->currentvbflags = ivideo->vbflags & (VB_VIDEOBRIDGE | TV_STANDARD); 6372 ivideo->currentvbflags = ivideo->vbflags & (VB_VIDEOBRIDGE | TV_STANDARD);
5225 6373
5226 if(ivideo->vbflags & VB_VIDEOBRIDGE) { 6374 /* Decide on which CRT2 device to use */
5227 if(ivideo->sisfb_crt2type != -1) { 6375 if(ivideo->vbflags2 & VB2_VIDEOBRIDGE) {
5228 if((ivideo->sisfb_crt2type == CRT2_LCD) && (ivideo->vbflags & CRT2_LCD)) { 6376 if(ivideo->sisfb_crt2type != -1) {
5229 ivideo->currentvbflags |= CRT2_LCD; 6377 if((ivideo->sisfb_crt2type == CRT2_LCD) &&
5230 } else if(ivideo->sisfb_crt2type != CRT2_LCD) { 6378 (ivideo->vbflags & CRT2_LCD)) {
5231 ivideo->currentvbflags |= ivideo->sisfb_crt2type; 6379 ivideo->currentvbflags |= CRT2_LCD;
5232 } 6380 } else if(ivideo->sisfb_crt2type != CRT2_LCD) {
5233 } else { 6381 ivideo->currentvbflags |= ivideo->sisfb_crt2type;
5234 /* Chrontel 700x TV detection often unreliable, therefore use a 6382 }
5235 * different default order on such machines 6383 } else {
5236 */ 6384 /* Chrontel 700x TV detection often unreliable, therefore
5237 if((ivideo->sisvga_engine == SIS_300_VGA) && (ivideo->vbflags & VB_CHRONTEL)) { 6385 * use a different default order on such machines
5238 if(ivideo->vbflags & CRT2_LCD) ivideo->currentvbflags |= CRT2_LCD; 6386 */
5239 else if(ivideo->vbflags & CRT2_TV) ivideo->currentvbflags |= CRT2_TV; 6387 if((ivideo->sisvga_engine == SIS_300_VGA) &&
5240 else if(ivideo->vbflags & CRT2_VGA) ivideo->currentvbflags |= CRT2_VGA; 6388 (ivideo->vbflags2 & VB2_CHRONTEL)) {
5241 } else { 6389 if(ivideo->vbflags & CRT2_LCD)
5242 if(ivideo->vbflags & CRT2_TV) ivideo->currentvbflags |= CRT2_TV; 6390 ivideo->currentvbflags |= CRT2_LCD;
5243 else if(ivideo->vbflags & CRT2_LCD) ivideo->currentvbflags |= CRT2_LCD; 6391 else if(ivideo->vbflags & CRT2_TV)
5244 else if(ivideo->vbflags & CRT2_VGA) ivideo->currentvbflags |= CRT2_VGA; 6392 ivideo->currentvbflags |= CRT2_TV;
5245 } 6393 else if(ivideo->vbflags & CRT2_VGA)
5246 } 6394 ivideo->currentvbflags |= CRT2_VGA;
6395 } else {
6396 if(ivideo->vbflags & CRT2_TV)
6397 ivideo->currentvbflags |= CRT2_TV;
6398 else if(ivideo->vbflags & CRT2_LCD)
6399 ivideo->currentvbflags |= CRT2_LCD;
6400 else if(ivideo->vbflags & CRT2_VGA)
6401 ivideo->currentvbflags |= CRT2_VGA;
6402 }
6403 }
5247 } 6404 }
5248 6405
5249 if(ivideo->vbflags & CRT2_LCD) { 6406 if(ivideo->vbflags & CRT2_LCD) {
5250 inSISIDXREG(SISCR, 0x36, reg); 6407 sisfb_detect_lcd_type(ivideo);
5251 reg &= 0x0f;
5252 if(ivideo->sisvga_engine == SIS_300_VGA) {
5253 ivideo->CRT2LCDType = sis300paneltype[reg];
5254 } else if(ivideo->chip >= SIS_661) {
5255 ivideo->CRT2LCDType = sis661paneltype[reg];
5256 } else {
5257 ivideo->CRT2LCDType = sis310paneltype[reg];
5258 if((ivideo->chip == SIS_550) && (sisfb_fstn)) {
5259 if((ivideo->CRT2LCDType != LCD_640x480_2) &&
5260 (ivideo->CRT2LCDType != LCD_640x480_3)) {
5261 ivideo->CRT2LCDType = LCD_320x480;
5262 }
5263 }
5264 }
5265 if(ivideo->CRT2LCDType == LCD_UNKNOWN) {
5266 /* For broken BIOSes: Assume 1024x768, RGB18 */
5267 ivideo->CRT2LCDType = LCD_1024x768;
5268 setSISIDXREG(SISCR,0x36,0xf0,0x02);
5269 setSISIDXREG(SISCR,0x37,0xee,0x01);
5270 printk(KERN_DEBUG "sisfb: Invalid panel ID (%02x), assuming 1024x768, RGB18\n", reg);
5271 }
5272 for(i = 0; i < SIS_LCD_NUMBER; i++) {
5273 if(ivideo->CRT2LCDType == sis_lcd_data[i].lcdtype) {
5274 ivideo->lcdxres = sis_lcd_data[i].xres;
5275 ivideo->lcdyres = sis_lcd_data[i].yres;
5276 ivideo->lcddefmodeidx = sis_lcd_data[i].default_mode_idx;
5277 break;
5278 }
5279 }
5280 if(ivideo->SiS_Pr.SiS_CustomT == CUT_BARCO1366) {
5281 ivideo->lcdxres = 1360; ivideo->lcdyres = 1024; ivideo->lcddefmodeidx = 99;
5282 } else if(ivideo->SiS_Pr.SiS_CustomT == CUT_PANEL848) {
5283 ivideo->lcdxres = 848; ivideo->lcdyres = 480; ivideo->lcddefmodeidx = 47;
5284 }
5285 printk(KERN_DEBUG "sisfb: Detected %dx%d flat panel\n",
5286 ivideo->lcdxres, ivideo->lcdyres);
5287 }
5288
5289#ifdef CONFIG_FB_SIS_300
5290 /* Save the current PanelDelayCompensation if the LCD is currently used */
5291 if(ivideo->sisvga_engine == SIS_300_VGA) {
5292 if(ivideo->vbflags & (VB_LVDS | VB_30xBDH)) {
5293 int tmp;
5294 inSISIDXREG(SISCR,0x30,tmp);
5295 if(tmp & 0x20) {
5296 /* Currently on LCD? If yes, read current pdc */
5297 inSISIDXREG(SISPART1,0x13,ivideo->detectedpdc);
5298 ivideo->detectedpdc &= 0x3c;
5299 if(ivideo->SiS_Pr.PDC == -1) {
5300 /* Let option override detection */
5301 ivideo->SiS_Pr.PDC = ivideo->detectedpdc;
5302 }
5303 printk(KERN_INFO "sisfb: Detected LCD PDC 0x%02x\n",
5304 ivideo->detectedpdc);
5305 }
5306 if((ivideo->SiS_Pr.PDC != -1) && (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) {
5307 printk(KERN_INFO "sisfb: Using LCD PDC 0x%02x\n",
5308 ivideo->SiS_Pr.PDC);
5309 }
5310 }
5311 } 6408 }
5312#endif
5313
5314#ifdef CONFIG_FB_SIS_315
5315 if(ivideo->sisvga_engine == SIS_315_VGA) {
5316
5317 /* Try to find about LCDA */
5318 if(ivideo->vbflags & (VB_301C | VB_302B | VB_301LV | VB_302LV | VB_302ELV)) {
5319 int tmp;
5320 inSISIDXREG(SISPART1,0x13,tmp);
5321 if(tmp & 0x04) {
5322 ivideo->SiS_Pr.SiS_UseLCDA = TRUE;
5323 ivideo->detectedlcda = 0x03;
5324 }
5325 }
5326
5327 /* Save PDC */
5328 if(ivideo->vbflags & (VB_301LV | VB_302LV | VB_302ELV)) {
5329 int tmp;
5330 inSISIDXREG(SISCR,0x30,tmp);
5331 if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) {
5332 /* Currently on LCD? If yes, read current pdc */
5333 u8 pdc;
5334 inSISIDXREG(SISPART1,0x2D,pdc);
5335 ivideo->detectedpdc = (pdc & 0x0f) << 1;
5336 ivideo->detectedpdca = (pdc & 0xf0) >> 3;
5337 inSISIDXREG(SISPART1,0x35,pdc);
5338 ivideo->detectedpdc |= ((pdc >> 7) & 0x01);
5339 inSISIDXREG(SISPART1,0x20,pdc);
5340 ivideo->detectedpdca |= ((pdc >> 6) & 0x01);
5341 if(ivideo->newrom) {
5342 /* New ROM invalidates other PDC resp. */
5343 if(ivideo->detectedlcda != 0xff) {
5344 ivideo->detectedpdc = 0xff;
5345 } else {
5346 ivideo->detectedpdca = 0xff;
5347 }
5348 }
5349 if(ivideo->SiS_Pr.PDC == -1) {
5350 if(ivideo->detectedpdc != 0xff) {
5351 ivideo->SiS_Pr.PDC = ivideo->detectedpdc;
5352 }
5353 }
5354 if(ivideo->SiS_Pr.PDCA == -1) {
5355 if(ivideo->detectedpdca != 0xff) {
5356 ivideo->SiS_Pr.PDCA = ivideo->detectedpdca;
5357 }
5358 }
5359 if(ivideo->detectedpdc != 0xff) {
5360 printk(KERN_INFO
5361 "sisfb: Detected LCD PDC 0x%02x (for LCD=CRT2)\n",
5362 ivideo->detectedpdc);
5363 }
5364 if(ivideo->detectedpdca != 0xff) {
5365 printk(KERN_INFO
5366 "sisfb: Detected LCD PDC1 0x%02x (for LCD=CRT1)\n",
5367 ivideo->detectedpdca);
5368 }
5369 }
5370
5371 /* Save EMI */
5372 if(ivideo->vbflags & (VB_302LV | VB_302ELV)) {
5373 inSISIDXREG(SISPART4,0x30,ivideo->SiS_Pr.EMI_30);
5374 inSISIDXREG(SISPART4,0x31,ivideo->SiS_Pr.EMI_31);
5375 inSISIDXREG(SISPART4,0x32,ivideo->SiS_Pr.EMI_32);
5376 inSISIDXREG(SISPART4,0x33,ivideo->SiS_Pr.EMI_33);
5377 ivideo->SiS_Pr.HaveEMI = TRUE;
5378 if((tmp & 0x20) || (ivideo->detectedlcda != 0xff)) {
5379 ivideo->SiS_Pr.HaveEMILCD = TRUE;
5380 }
5381 }
5382 }
5383
5384 /* Let user override detected PDCs (all bridges) */
5385 if(ivideo->vbflags & (VB_301B | VB_301C | VB_301LV | VB_302LV | VB_302ELV)) {
5386 if((ivideo->SiS_Pr.PDC != -1) && (ivideo->SiS_Pr.PDC != ivideo->detectedpdc)) {
5387 printk(KERN_INFO "sisfb: Using LCD PDC 0x%02x (for LCD=CRT2)\n",
5388 ivideo->SiS_Pr.PDC);
5389 }
5390 if((ivideo->SiS_Pr.PDCA != -1) && (ivideo->SiS_Pr.PDCA != ivideo->detectedpdca)) {
5391 printk(KERN_INFO "sisfb: Using LCD PDC1 0x%02x (for LCD=CRT1)\n",
5392 ivideo->SiS_Pr.PDCA);
5393 }
5394 }
5395 6409
5396 } 6410 sisfb_save_pdc_emi(ivideo);
5397#endif
5398 6411
5399 if(!ivideo->sisfb_crt1off) { 6412 if(!ivideo->sisfb_crt1off) {
5400 sisfb_handle_ddc(ivideo, &ivideo->sisfb_thismonitor, 0); 6413 sisfb_handle_ddc(ivideo, &ivideo->sisfb_thismonitor, 0);
5401 } else { 6414 } else {
5402 if((ivideo->vbflags & (VB_301|VB_301B|VB_301C|VB_302B)) && 6415 if((ivideo->vbflags2 & VB2_SISTMDSBRIDGE) &&
5403 (ivideo->vbflags & (CRT2_VGA | CRT2_LCD))) { 6416 (ivideo->vbflags & (CRT2_VGA | CRT2_LCD))) {
5404 sisfb_handle_ddc(ivideo, &ivideo->sisfb_thismonitor, 1); 6417 sisfb_handle_ddc(ivideo, &ivideo->sisfb_thismonitor, 1);
5405 } 6418 }
5406 } 6419 }
5407 6420
5408 if(ivideo->sisfb_mode_idx >= 0) { 6421 if(ivideo->sisfb_mode_idx >= 0) {
@@ -5434,7 +6447,8 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5434 ivideo->mode_no = sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni]; 6447 ivideo->mode_no = sisbios_mode[ivideo->sisfb_mode_idx].mode_no[ivideo->mni];
5435 6448
5436 if(ivideo->refresh_rate != 0) { 6449 if(ivideo->refresh_rate != 0) {
5437 sisfb_search_refresh_rate(ivideo, ivideo->refresh_rate, ivideo->sisfb_mode_idx); 6450 sisfb_search_refresh_rate(ivideo, ivideo->refresh_rate,
6451 ivideo->sisfb_mode_idx);
5438 } 6452 }
5439 6453
5440 if(ivideo->rate_idx == 0) { 6454 if(ivideo->rate_idx == 0) {
@@ -5443,9 +6457,12 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5443 } 6457 }
5444 6458
5445 if(ivideo->sisfb_thismonitor.datavalid) { 6459 if(ivideo->sisfb_thismonitor.datavalid) {
5446 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor, ivideo->sisfb_mode_idx, 6460 if(!sisfb_verify_rate(ivideo, &ivideo->sisfb_thismonitor,
5447 ivideo->rate_idx, ivideo->refresh_rate)) { 6461 ivideo->sisfb_mode_idx,
5448 printk(KERN_INFO "sisfb: WARNING: Refresh rate exceeds monitor specs!\n"); 6462 ivideo->rate_idx,
6463 ivideo->refresh_rate)) {
6464 printk(KERN_INFO "sisfb: WARNING: Refresh rate "
6465 "exceeds monitor specs!\n");
5449 } 6466 }
5450 } 6467 }
5451 6468
@@ -5454,28 +6471,34 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5454 ivideo->video_height = sisbios_mode[ivideo->sisfb_mode_idx].yres; 6471 ivideo->video_height = sisbios_mode[ivideo->sisfb_mode_idx].yres;
5455 6472
5456 sisfb_set_vparms(ivideo); 6473 sisfb_set_vparms(ivideo);
5457
5458#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5459 6474
5460 /* ---------------- For 2.4: Now switch the mode ------------------ */ 6475#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5461 6476
5462 printk(KERN_INFO "sisfb: Mode is %dx%dx%d (%dHz)\n", 6477 /* ---------------- For 2.4: Now switch the mode ------------------ */
5463 ivideo->video_width, ivideo->video_height, ivideo->video_bpp, 6478
6479 printk(KERN_INFO "sisfb: Setting mode %dx%dx%d (%dHz)\n",
6480 ivideo->video_width, ivideo->video_height, ivideo->video_bpp,
5464 ivideo->refresh_rate); 6481 ivideo->refresh_rate);
5465 6482
6483 /* Determine whether or not acceleration is to be
6484 * used. Need to know before pre/post_set_mode()
6485 */
6486 ivideo->accel = 0;
6487 ivideo->default_var.accel_flags &= ~FB_ACCELF_TEXT;
6488 if(ivideo->sisfb_accel) {
6489 ivideo->accel = -1;
6490 ivideo->default_var.accel_flags |= FB_ACCELF_TEXT;
6491 }
6492
6493 /* Now switch the mode */
5466 sisfb_pre_setmode(ivideo); 6494 sisfb_pre_setmode(ivideo);
5467 6495
5468 if(SiSSetMode(&ivideo->SiS_Pr, &ivideo->sishw_ext, ivideo->mode_no) == 0) { 6496 if(SiSSetMode(&ivideo->SiS_Pr, ivideo->mode_no) == 0) {
5469 printk(KERN_ERR "sisfb: Fatal error: Setting mode[0x%x] failed\n", 6497 printk(KERN_ERR "sisfb: Fatal error: Setting mode[0x%x] failed\n",
5470 ivideo->mode_no); 6498 ivideo->mode_no);
5471 iounmap(ivideo->video_vbase); 6499 ret = -EINVAL;
5472 iounmap(ivideo->mmio_vbase); 6500 iounmap(ivideo->mmio_vbase);
5473 release_mem_region(ivideo->video_base, ivideo->video_size); 6501 goto error_0;
5474 release_mem_region(ivideo->mmio_base, ivideo->mmio_size);
5475 if(ivideo->bios_abase) vfree(ivideo->bios_abase);
5476 pci_set_drvdata(pdev, NULL);
5477 kfree(sis_fb_info);
5478 return -EINVAL;
5479 } 6502 }
5480 6503
5481 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD); 6504 outSISIDXREG(SISSR, IND_SIS_PASSWORD, SIS_PASSWORD);
@@ -5488,18 +6511,17 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5488 /* Force reset of x virtual in crtc_to_var */ 6511 /* Force reset of x virtual in crtc_to_var */
5489 ivideo->default_var.xres_virtual = 0; 6512 ivideo->default_var.xres_virtual = 0;
5490 6513
6514 /* Copy mode timing to var */
5491 sisfb_crtc_to_var(ivideo, &ivideo->default_var); 6515 sisfb_crtc_to_var(ivideo, &ivideo->default_var);
5492 6516
6517 /* Find out about screen pitch */
5493 sisfb_calc_pitch(ivideo, &ivideo->default_var); 6518 sisfb_calc_pitch(ivideo, &ivideo->default_var);
5494 sisfb_set_pitch(ivideo); 6519 sisfb_set_pitch(ivideo);
5495 6520
5496 ivideo->accel = 0; 6521 /* Init the accelerator (does nothing currently) */
5497 if(ivideo->sisfb_accel) {
5498 ivideo->accel = -1;
5499 ivideo->default_var.accel_flags |= FB_ACCELF_TEXT;
5500 }
5501 sisfb_initaccel(ivideo); 6522 sisfb_initaccel(ivideo);
5502 6523
6524 /* Init some fbinfo entries */
5503 sis_fb_info->node = -1; 6525 sis_fb_info->node = -1;
5504 sis_fb_info->flags = FBINFO_FLAG_DEFAULT; 6526 sis_fb_info->flags = FBINFO_FLAG_DEFAULT;
5505 sis_fb_info->fbops = &sisfb_ops; 6527 sis_fb_info->fbops = &sisfb_ops;
@@ -5515,41 +6537,42 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5515#else /* --------- For 2.6: Setup a somewhat sane default var ------------ */ 6537#else /* --------- For 2.6: Setup a somewhat sane default var ------------ */
5516 6538
5517 printk(KERN_INFO "sisfb: Default mode is %dx%dx%d (%dHz)\n", 6539 printk(KERN_INFO "sisfb: Default mode is %dx%dx%d (%dHz)\n",
5518 ivideo->video_width, ivideo->video_height, ivideo->video_bpp, 6540 ivideo->video_width, ivideo->video_height, ivideo->video_bpp,
5519 ivideo->refresh_rate); 6541 ivideo->refresh_rate);
5520 6542
6543 /* Set up the default var according to chosen default display mode */
5521 ivideo->default_var.xres = ivideo->default_var.xres_virtual = ivideo->video_width; 6544 ivideo->default_var.xres = ivideo->default_var.xres_virtual = ivideo->video_width;
5522 ivideo->default_var.yres = ivideo->default_var.yres_virtual = ivideo->video_height; 6545 ivideo->default_var.yres = ivideo->default_var.yres_virtual = ivideo->video_height;
5523 ivideo->default_var.bits_per_pixel = ivideo->video_bpp; 6546 ivideo->default_var.bits_per_pixel = ivideo->video_bpp;
5524 6547
5525 sisfb_bpp_to_var(ivideo, &ivideo->default_var); 6548 sisfb_bpp_to_var(ivideo, &ivideo->default_var);
5526 6549
5527 ivideo->default_var.pixclock = (u32) (1000000000 / 6550 ivideo->default_var.pixclock = (u32) (1000000000 /
5528 sisfb_mode_rate_to_dclock(&ivideo->SiS_Pr, &ivideo->sishw_ext, 6551 sisfb_mode_rate_to_dclock(&ivideo->SiS_Pr, ivideo->mode_no, ivideo->rate_idx));
5529 ivideo->mode_no, ivideo->rate_idx)); 6552
5530 6553 if(sisfb_mode_rate_to_ddata(&ivideo->SiS_Pr, ivideo->mode_no,
5531 if(sisfb_mode_rate_to_ddata(&ivideo->SiS_Pr, &ivideo->sishw_ext, 6554 ivideo->rate_idx, &ivideo->default_var)) {
5532 ivideo->mode_no, ivideo->rate_idx, &ivideo->default_var)) { 6555 if((ivideo->default_var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
5533 if((ivideo->default_var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) { 6556 ivideo->default_var.pixclock <<= 1;
5534 ivideo->default_var.pixclock <<= 1; 6557 }
5535 } 6558 }
5536 }
5537 6559
5538 if(ivideo->sisfb_ypan) { 6560 if(ivideo->sisfb_ypan) {
5539 /* Maximize regardless of sisfb_max at startup */ 6561 /* Maximize regardless of sisfb_max at startup */
5540 ivideo->default_var.yres_virtual = sisfb_calc_maxyres(ivideo, &ivideo->default_var); 6562 ivideo->default_var.yres_virtual =
5541 if(ivideo->default_var.yres_virtual < ivideo->default_var.yres) { 6563 sisfb_calc_maxyres(ivideo, &ivideo->default_var);
5542 ivideo->default_var.yres_virtual = ivideo->default_var.yres; 6564 if(ivideo->default_var.yres_virtual < ivideo->default_var.yres) {
5543 } 6565 ivideo->default_var.yres_virtual = ivideo->default_var.yres;
6566 }
5544 } 6567 }
5545 6568
5546 sisfb_calc_pitch(ivideo, &ivideo->default_var); 6569 sisfb_calc_pitch(ivideo, &ivideo->default_var);
5547 6570
5548 ivideo->accel = 0; 6571 ivideo->accel = 0;
5549 if(ivideo->sisfb_accel) { 6572 if(ivideo->sisfb_accel) {
5550 ivideo->accel = -1; 6573 ivideo->accel = -1;
5551#ifdef STUPID_ACCELF_TEXT_SHIT 6574#ifdef STUPID_ACCELF_TEXT_SHIT
5552 ivideo->default_var.accel_flags |= FB_ACCELF_TEXT; 6575 ivideo->default_var.accel_flags |= FB_ACCELF_TEXT;
5553#endif 6576#endif
5554 } 6577 }
5555 sisfb_initaccel(ivideo); 6578 sisfb_initaccel(ivideo);
@@ -5566,21 +6589,21 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5566#endif 6589#endif
5567 sis_fb_info->var = ivideo->default_var; 6590 sis_fb_info->var = ivideo->default_var;
5568 sis_fb_info->fix = ivideo->sisfb_fix; 6591 sis_fb_info->fix = ivideo->sisfb_fix;
5569 sis_fb_info->screen_base = ivideo->video_vbase; 6592 sis_fb_info->screen_base = ivideo->video_vbase + ivideo->video_offset;
5570 sis_fb_info->fbops = &sisfb_ops; 6593 sis_fb_info->fbops = &sisfb_ops;
5571 6594
5572 sisfb_get_fix(&sis_fb_info->fix, -1, sis_fb_info); 6595 sisfb_get_fix(&sis_fb_info->fix, -1, sis_fb_info);
5573 sis_fb_info->pseudo_palette = ivideo->pseudo_palette; 6596 sis_fb_info->pseudo_palette = ivideo->pseudo_palette;
5574 6597
5575 fb_alloc_cmap(&sis_fb_info->cmap, 256 , 0); 6598 fb_alloc_cmap(&sis_fb_info->cmap, 256 , 0);
5576#endif /* 2.6 */ 6599#endif /* 2.6 */
5577 6600
5578 printk(KERN_DEBUG "sisfb: Initial vbflags 0x%lx\n", (unsigned long)ivideo->vbflags); 6601 printk(KERN_DEBUG "sisfb: Initial vbflags 0x%x\n", (int)ivideo->vbflags);
5579 6602
5580#ifdef CONFIG_MTRR 6603#ifdef CONFIG_MTRR
5581 ivideo->mtrr = mtrr_add(ivideo->video_base, ivideo->video_size, 6604 ivideo->mtrr = mtrr_add(ivideo->video_base, ivideo->video_size,
5582 MTRR_TYPE_WRCOMB, 1); 6605 MTRR_TYPE_WRCOMB, 1);
5583 if(!ivideo->mtrr) { 6606 if(ivideo->mtrr < 0) {
5584 printk(KERN_DEBUG "sisfb: Failed to add MTRRs\n"); 6607 printk(KERN_DEBUG "sisfb: Failed to add MTRRs\n");
5585 } 6608 }
5586#endif 6609#endif
@@ -5591,14 +6614,9 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5591 6614
5592 if(register_framebuffer(sis_fb_info) < 0) { 6615 if(register_framebuffer(sis_fb_info) < 0) {
5593 printk(KERN_ERR "sisfb: Fatal error: Failed to register framebuffer\n"); 6616 printk(KERN_ERR "sisfb: Fatal error: Failed to register framebuffer\n");
5594 iounmap(ivideo->video_vbase); 6617 ret = -EINVAL;
5595 iounmap(ivideo->mmio_vbase); 6618 iounmap(ivideo->mmio_vbase);
5596 release_mem_region(ivideo->video_base, ivideo->video_size); 6619 goto error_0;
5597 release_mem_region(ivideo->mmio_base, ivideo->mmio_size);
5598 if(ivideo->bios_abase) vfree(ivideo->bios_abase);
5599 pci_set_drvdata(pdev, NULL);
5600 kfree(sis_fb_info);
5601 return -EINVAL;
5602 } 6620 }
5603 6621
5604 ivideo->registered = 1; 6622 ivideo->registered = 1;
@@ -5607,21 +6625,47 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5607 ivideo->next = card_list; 6625 ivideo->next = card_list;
5608 card_list = ivideo; 6626 card_list = ivideo;
5609 6627
6628#ifdef SIS_OLD_CONFIG_COMPAT
6629 {
6630 int ret;
6631 /* Our ioctls are all "32/64bit compatible" */
6632 ret = register_ioctl32_conversion(FBIO_ALLOC, NULL);
6633 ret |= register_ioctl32_conversion(FBIO_FREE, NULL);
6634 ret |= register_ioctl32_conversion(FBIOGET_VBLANK, NULL);
6635 ret |= register_ioctl32_conversion(SISFB_GET_INFO_SIZE, NULL);
6636 ret |= register_ioctl32_conversion(SISFB_GET_INFO, NULL);
6637 ret |= register_ioctl32_conversion(SISFB_GET_TVPOSOFFSET, NULL);
6638 ret |= register_ioctl32_conversion(SISFB_SET_TVPOSOFFSET, NULL);
6639 ret |= register_ioctl32_conversion(SISFB_SET_LOCK, NULL);
6640 ret |= register_ioctl32_conversion(SISFB_GET_VBRSTATUS, NULL);
6641 ret |= register_ioctl32_conversion(SISFB_GET_AUTOMAXIMIZE, NULL);
6642 ret |= register_ioctl32_conversion(SISFB_SET_AUTOMAXIMIZE, NULL);
6643 ret |= register_ioctl32_conversion(SISFB_COMMAND, NULL);
6644 if(ret)
6645 printk(KERN_ERR
6646 "sisfb: Error registering ioctl32 translations\n");
6647 else
6648 ivideo->ioctl32registered = 1;
6649 }
6650#endif
6651
5610 printk(KERN_INFO "sisfb: 2D acceleration is %s, y-panning %s\n", 6652 printk(KERN_INFO "sisfb: 2D acceleration is %s, y-panning %s\n",
5611 ivideo->sisfb_accel ? "enabled" : "disabled", 6653 ivideo->sisfb_accel ? "enabled" : "disabled",
5612 ivideo->sisfb_ypan ? 6654 ivideo->sisfb_ypan ?
5613 (ivideo->sisfb_max ? "enabled (auto-max)" : "enabled (no auto-max)") : "disabled"); 6655 (ivideo->sisfb_max ? "enabled (auto-max)" :
6656 "enabled (no auto-max)") :
6657 "disabled");
5614 6658
5615 6659
5616 printk(KERN_INFO "fb%d: %s frame buffer device, Version %d.%d.%d\n", 6660 printk(KERN_INFO "fb%d: %s frame buffer device version %d.%d.%d\n",
5617#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 6661#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5618 GET_FB_IDX(sis_fb_info->node), 6662 GET_FB_IDX(sis_fb_info->node),
5619#else 6663#else
5620 sis_fb_info->node, 6664 sis_fb_info->node,
5621#endif 6665#endif
5622 ivideo->myid, VER_MAJOR, VER_MINOR, VER_LEVEL); 6666 ivideo->myid, VER_MAJOR, VER_MINOR, VER_LEVEL);
5623 6667
5624 printk(KERN_INFO "sisfb: (C) 2001-2004 Thomas Winischhofer.\n"); 6668 printk(KERN_INFO "sisfb: Copyright (C) 2001-2005 Thomas Winischhofer\n");
5625 6669
5626 } /* if mode = "none" */ 6670 } /* if mode = "none" */
5627 6671
@@ -5634,26 +6678,62 @@ static int __devinit sisfb_probe(struct pci_dev *pdev,
5634 6678
5635static void __devexit sisfb_remove(struct pci_dev *pdev) 6679static void __devexit sisfb_remove(struct pci_dev *pdev)
5636{ 6680{
5637 struct sis_video_info *ivideo = pci_get_drvdata(pdev); 6681 struct sis_video_info *ivideo = pci_get_drvdata(pdev);
5638 struct fb_info *sis_fb_info = ivideo->memyselfandi; 6682 struct fb_info *sis_fb_info = ivideo->memyselfandi;
5639 int registered = ivideo->registered; 6683 int registered = ivideo->registered;
6684 int modechanged = ivideo->modechanged;
6685
6686#ifdef SIS_OLD_CONFIG_COMPAT
6687 if(ivideo->ioctl32registered) {
6688 int ret;
6689 ret = unregister_ioctl32_conversion(FBIO_ALLOC);
6690 ret |= unregister_ioctl32_conversion(FBIO_FREE);
6691 ret |= unregister_ioctl32_conversion(FBIOGET_VBLANK);
6692 ret |= unregister_ioctl32_conversion(SISFB_GET_INFO_SIZE);
6693 ret |= unregister_ioctl32_conversion(SISFB_GET_INFO);
6694 ret |= unregister_ioctl32_conversion(SISFB_GET_TVPOSOFFSET);
6695 ret |= unregister_ioctl32_conversion(SISFB_SET_TVPOSOFFSET);
6696 ret |= unregister_ioctl32_conversion(SISFB_SET_LOCK);
6697 ret |= unregister_ioctl32_conversion(SISFB_GET_VBRSTATUS);
6698 ret |= unregister_ioctl32_conversion(SISFB_GET_AUTOMAXIMIZE);
6699 ret |= unregister_ioctl32_conversion(SISFB_SET_AUTOMAXIMIZE);
6700 ret |= unregister_ioctl32_conversion(SISFB_COMMAND);
6701 if(ret)
6702 printk(KERN_ERR
6703 "sisfb: Error unregistering ioctl32 translations\n");
6704 }
6705#endif
5640 6706
5641 /* Unmap */ 6707 /* Unmap */
5642 iounmap(ivideo->video_vbase);
5643 iounmap(ivideo->mmio_vbase); 6708 iounmap(ivideo->mmio_vbase);
5644 vfree(ivideo->bios_abase); 6709 iounmap(ivideo->video_vbase);
5645 6710
5646 /* Release mem regions */ 6711 /* Release mem regions */
5647 release_mem_region(ivideo->video_base, ivideo->video_size); 6712 release_mem_region(ivideo->video_base, ivideo->video_size);
5648 release_mem_region(ivideo->mmio_base, ivideo->mmio_size); 6713 release_mem_region(ivideo->mmio_base, ivideo->mmio_size);
5649 6714
6715 vfree(ivideo->bios_abase);
6716
6717 if(ivideo->lpcdev)
6718 SIS_PCI_PUT_DEVICE(ivideo->lpcdev);
6719
6720 if(ivideo->nbridge)
6721 SIS_PCI_PUT_DEVICE(ivideo->nbridge);
6722
5650#ifdef CONFIG_MTRR 6723#ifdef CONFIG_MTRR
5651 /* Release MTRR region */ 6724 /* Release MTRR region */
5652 if(ivideo->mtrr) { 6725 if(ivideo->mtrr >= 0)
5653 mtrr_del(ivideo->mtrr, ivideo->video_base, ivideo->video_size); 6726 mtrr_del(ivideo->mtrr, ivideo->video_base, ivideo->video_size);
5654 }
5655#endif 6727#endif
5656 6728
6729 pci_set_drvdata(pdev, NULL);
6730
6731 /* If device was disabled when starting, disable
6732 * it when quitting.
6733 */
6734 if(!ivideo->sisvga_enabled)
6735 pci_disable_device(pdev);
6736
5657 /* Unregister the framebuffer */ 6737 /* Unregister the framebuffer */
5658 if(ivideo->registered) { 6738 if(ivideo->registered) {
5659 unregister_framebuffer(sis_fb_info); 6739 unregister_framebuffer(sis_fb_info);
@@ -5664,7 +6744,7 @@ static void __devexit sisfb_remove(struct pci_dev *pdev)
5664#endif 6744#endif
5665 } 6745 }
5666 6746
5667 pci_set_drvdata(pdev, NULL); 6747 /* OK, our ivideo is gone for good from here. */
5668 6748
5669 /* TODO: Restore the initial mode 6749 /* TODO: Restore the initial mode
5670 * This sounds easy but is as good as impossible 6750 * This sounds easy but is as good as impossible
@@ -5673,15 +6753,15 @@ static void __devexit sisfb_remove(struct pci_dev *pdev)
5673 * from machine to machine. Depends on the type 6753 * from machine to machine. Depends on the type
5674 * of integration between chipset and bridge. 6754 * of integration between chipset and bridge.
5675 */ 6755 */
5676 if(registered) { 6756 if(registered && modechanged)
5677 printk(KERN_INFO "sisfb: Restoring of text mode not supported yet\n"); 6757 printk(KERN_INFO
5678 } 6758 "sisfb: Restoring of text mode not supported yet\n");
5679}; 6759};
5680 6760
5681static struct pci_driver sisfb_driver = { 6761static struct pci_driver sisfb_driver = {
5682 .name = "sisfb", 6762 .name = "sisfb",
5683 .id_table = sisfb_pci_table, 6763 .id_table = sisfb_pci_table,
5684 .probe = sisfb_probe, 6764 .probe = sisfb_probe,
5685 .remove = __devexit_p(sisfb_remove) 6765 .remove = __devexit_p(sisfb_remove)
5686}; 6766};
5687 6767
@@ -5693,10 +6773,11 @@ SISINITSTATIC int __init sisfb_init(void)
5693 6773
5694 if(fb_get_options("sisfb", &options)) 6774 if(fb_get_options("sisfb", &options))
5695 return -ENODEV; 6775 return -ENODEV;
6776
5696 sisfb_setup(options); 6777 sisfb_setup(options);
5697#endif 6778#endif
5698#endif 6779#endif
5699 return(pci_register_driver(&sisfb_driver)); 6780 return pci_register_driver(&sisfb_driver);
5700} 6781}
5701 6782
5702#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8) 6783#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
@@ -5711,36 +6792,129 @@ module_init(sisfb_init);
5711 6792
5712#ifdef MODULE 6793#ifdef MODULE
5713 6794
5714static char *mode = NULL; 6795static char *mode = NULL;
5715static int vesa = -1; 6796static int vesa = -1;
5716static unsigned int rate = 0; 6797static unsigned int rate = 0;
5717static unsigned int crt1off = 1; 6798static unsigned int crt1off = 1;
5718static unsigned int mem = 0; 6799static unsigned int mem = 0;
5719static char *forcecrt2type = NULL; 6800static char *forcecrt2type = NULL;
5720static int forcecrt1 = -1; 6801static int forcecrt1 = -1;
5721static int pdc = -1; 6802static int pdc = -1;
5722static int pdc1 = -1; 6803static int pdc1 = -1;
5723static int noaccel = -1; 6804static int noaccel = -1;
5724static int noypan = -1; 6805static int noypan = -1;
5725static int nomax = -1; 6806static int nomax = -1;
6807#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
6808static int inverse = 0;
6809#endif
6810static int userom = -1;
6811static int useoem = -1;
6812static char *tvstandard = NULL;
6813static int nocrt2rate = 0;
6814static int scalelcd = -1;
6815static char *specialtiming = NULL;
6816static int lvdshl = -1;
6817static int tvxposoffset = 0, tvyposoffset = 0;
6818#if !defined(__i386__) && !defined(__x86_64__)
6819static int resetcard = 0;
6820static int videoram = 0;
6821#endif
6822
6823static int __init sisfb_init_module(void)
6824{
6825 sisfb_setdefaultparms();
6826
6827 if(rate)
6828 sisfb_parm_rate = rate;
6829
6830 if((scalelcd == 0) || (scalelcd == 1))
6831 sisfb_scalelcd = scalelcd ^ 1;
6832
6833 /* Need to check crt2 type first for fstn/dstn */
6834
6835 if(forcecrt2type)
6836 sisfb_search_crt2type(forcecrt2type);
6837
6838 if(tvstandard)
6839 sisfb_search_tvstd(tvstandard);
6840
6841 if(mode)
6842 sisfb_search_mode(mode, FALSE);
6843 else if(vesa != -1)
6844 sisfb_search_vesamode(vesa, FALSE);
6845
6846 sisfb_crt1off = (crt1off == 0) ? 1 : 0;
6847
6848 sisfb_forcecrt1 = forcecrt1;
6849 if(forcecrt1 == 1)
6850 sisfb_crt1off = 0;
6851 else if(forcecrt1 == 0)
6852 sisfb_crt1off = 1;
6853
6854 if(noaccel == 1)
6855 sisfb_accel = 0;
6856 else if(noaccel == 0)
6857 sisfb_accel = 1;
6858
6859 if(noypan == 1)
6860 sisfb_ypan = 0;
6861 else if(noypan == 0)
6862 sisfb_ypan = 1;
6863
6864 if(nomax == 1)
6865 sisfb_max = 0;
6866 else if(nomax == 0)
6867 sisfb_max = 1;
6868
5726#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 6869#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5727static int inverse = 0; 6870 if(inverse) sisfb_inverse = 1;
5728#endif 6871#endif
5729static int userom = -1; 6872
5730static int useoem = -1; 6873 if(mem)
5731static char *tvstandard = NULL; 6874 sisfb_parm_mem = mem;
5732static int nocrt2rate = 0; 6875
5733static int scalelcd = -1; 6876 if(userom != -1)
5734static char *specialtiming = NULL; 6877 sisfb_userom = userom;
5735static int lvdshl = -1; 6878
5736static int tvxposoffset = 0, tvyposoffset = 0; 6879 if(useoem != -1)
5737static int filter = -1; 6880 sisfb_useoem = useoem;
6881
6882 if(pdc != -1)
6883 sisfb_pdc = (pdc & 0x7f);
6884
6885 if(pdc1 != -1)
6886 sisfb_pdca = (pdc1 & 0x1f);
6887
6888 sisfb_nocrt2rate = nocrt2rate;
6889
6890 if(specialtiming)
6891 sisfb_search_specialtiming(specialtiming);
6892
6893 if((lvdshl >= 0) && (lvdshl <= 3))
6894 sisfb_lvdshl = lvdshl;
6895
6896 sisfb_tvxposoffset = tvxposoffset;
6897 sisfb_tvyposoffset = tvyposoffset;
6898
5738#if !defined(__i386__) && !defined(__x86_64__) 6899#if !defined(__i386__) && !defined(__x86_64__)
5739static int resetcard = 0; 6900 sisfb_resetcard = (resetcard) ? 1 : 0;
5740static int videoram = 0; 6901 if(videoram)
6902 sisfb_videoram = videoram;
5741#endif 6903#endif
5742 6904
5743MODULE_DESCRIPTION("SiS 300/540/630/730/315/550/65x/661/74x/330/760 framebuffer device driver"); 6905 return sisfb_init();
6906}
6907
6908static void __exit sisfb_remove_module(void)
6909{
6910 pci_unregister_driver(&sisfb_driver);
6911 printk(KERN_DEBUG "sisfb: Module unloaded\n");
6912}
6913
6914module_init(sisfb_init_module);
6915module_exit(sisfb_remove_module);
6916
6917MODULE_DESCRIPTION("SiS 300/540/630/730/315/55x/65x/661/74x/330/76x/34x, XGI V3XT/V5/V8/Z7 framebuffer device driver");
5744MODULE_LICENSE("GPL"); 6918MODULE_LICENSE("GPL");
5745MODULE_AUTHOR("Thomas Winischhofer <thomas@winischhofer.net>, Others"); 6919MODULE_AUTHOR("Thomas Winischhofer <thomas@winischhofer.net>, Others");
5746 6920
@@ -5764,7 +6938,6 @@ MODULE_PARM(lvdshl, "i");
5764MODULE_PARM(tvstandard, "s"); 6938MODULE_PARM(tvstandard, "s");
5765MODULE_PARM(tvxposoffset, "i"); 6939MODULE_PARM(tvxposoffset, "i");
5766MODULE_PARM(tvyposoffset, "i"); 6940MODULE_PARM(tvyposoffset, "i");
5767MODULE_PARM(filter, "i");
5768MODULE_PARM(nocrt2rate, "i"); 6941MODULE_PARM(nocrt2rate, "i");
5769MODULE_PARM(inverse, "i"); 6942MODULE_PARM(inverse, "i");
5770#if !defined(__i386__) && !defined(__x86_64__) 6943#if !defined(__i386__) && !defined(__x86_64__)
@@ -5793,7 +6966,6 @@ module_param(lvdshl, int, 0);
5793module_param(tvstandard, charp, 0); 6966module_param(tvstandard, charp, 0);
5794module_param(tvxposoffset, int, 0); 6967module_param(tvxposoffset, int, 0);
5795module_param(tvyposoffset, int, 0); 6968module_param(tvyposoffset, int, 0);
5796module_param(filter, int, 0);
5797module_param(nocrt2rate, int, 0); 6969module_param(nocrt2rate, int, 0);
5798#if !defined(__i386__) && !defined(__x86_64__) 6970#if !defined(__i386__) && !defined(__x86_64__)
5799module_param(resetcard, int, 0); 6971module_param(resetcard, int, 0);
@@ -5801,25 +6973,35 @@ module_param(videoram, int, 0);
5801#endif 6973#endif
5802#endif 6974#endif
5803 6975
6976#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5804MODULE_PARM_DESC(mem, 6977MODULE_PARM_DESC(mem,
5805 "\nDetermines the beginning of the video memory heap in KB. This heap is used\n" 6978 "\nDetermines the beginning of the video memory heap in KB. This heap is used\n"
5806 "for video RAM management for eg. DRM/DRI. On 300 series, the default depends\n" 6979 "for video RAM management for eg. DRM/DRI. On 300 series, the default depends\n"
5807 "on the amount of video RAM available. If 8MB of video RAM or less is available,\n" 6980 "on the amount of video RAM available. If 8MB of video RAM or less is available,\n"
5808 "the heap starts at 4096KB, if between 8 and 16MB are available at 8192KB,\n" 6981 "the heap starts at 4096KB, if between 8 and 16MB are available at 8192KB,\n"
5809 "otherwise at 12288KB. On 315 and Xabre series, the heap size is 32KB by default.\n" 6982 "otherwise at 12288KB. On 315/330/340 series, the heap size is 32KB by default.\n"
5810 "The value is to be specified without 'KB' and must match the MaxXFBMem setting\n" 6983 "The value is to be specified without 'KB' and must match the MaxXFBMem setting\n"
5811 "for XFree86 4.x/X.org 6.7 and later.\n"); 6984 "for XFree86 4.x/X.org 6.7 and later.\n");
6985#else
6986MODULE_PARM_DESC(mem,
6987 "\nDetermines the beginning of the video memory heap in KB. This heap is used\n"
6988 "for video RAM management for eg. DRM/DRI. On 300 series, the default depends\n"
6989 "on the amount of video RAM available. If 8MB of video RAM or less is available,\n"
6990 "the heap starts at 4096KB, if between 8 and 16MB are available at 8192KB,\n"
6991 "otherwise at 12288KB. On 315/330/340 series, the heap size is 32KB by default.\n"
6992 "The value is to be specified without 'KB'.\n");
6993#endif
5812 6994
5813MODULE_PARM_DESC(noaccel, 6995MODULE_PARM_DESC(noaccel,
5814 "\nIf set to anything other than 0, 2D acceleration will be disabled.\n" 6996 "\nIf set to anything other than 0, 2D acceleration will be disabled.\n"
5815 "(default: 0)\n"); 6997 "(default: 0)\n");
5816 6998
5817MODULE_PARM_DESC(noypan, 6999MODULE_PARM_DESC(noypan,
5818 "\nIf set to anything other than 0, y-panning will be disabled and scrolling\n" 7000 "\nIf set to anything other than 0, y-panning will be disabled and scrolling\n"
5819 "will be performed by redrawing the screen. (default: 0)\n"); 7001 "will be performed by redrawing the screen. (default: 0)\n");
5820 7002
5821MODULE_PARM_DESC(nomax, 7003MODULE_PARM_DESC(nomax,
5822 "\nIf y-panning is enabled, sisfb will by default use the entire available video\n" 7004 "\nIf y-panning is enabled, sisfb will by default use the entire available video\n"
5823 "memory for the virtual screen in order to optimize scrolling performance. If\n" 7005 "memory for the virtual screen in order to optimize scrolling performance. If\n"
5824 "this is set to anything other than 0, sisfb will not do this and thereby \n" 7006 "this is set to anything other than 0, sisfb will not do this and thereby \n"
5825 "enable the user to positively specify a virtual Y size of the screen using\n" 7007 "enable the user to positively specify a virtual Y size of the screen using\n"
@@ -5827,30 +7009,30 @@ MODULE_PARM_DESC(nomax,
5827 7009
5828#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 7010#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5829MODULE_PARM_DESC(mode, 7011MODULE_PARM_DESC(mode,
5830 "\nSelects the desired display mode in the format [X]x[Y]x[Depth], eg.\n" 7012 "\nSelects the desired display mode in the format [X]x[Y]x[Depth], eg.\n"
5831 "1024x768x16. Other formats supported include XxY-Depth and\n" 7013 "1024x768x16. Other formats supported include XxY-Depth and\n"
5832 "XxY-Depth@Rate. If the parameter is only one (decimal or hexadecimal)\n" 7014 "XxY-Depth@Rate. If the parameter is only one (decimal or hexadecimal)\n"
5833 "number, it will be interpreted as a VESA mode number. (default: none if\n" 7015 "number, it will be interpreted as a VESA mode number. (default: none if\n"
5834 "sisfb is a module; this leaves the console untouched and the driver will\n" 7016 "sisfb is a module; this leaves the console untouched and the driver will\n"
5835 "only do the video memory management for eg. DRM/DRI; 800x600x8 if sisfb\n" 7017 "only do the video memory management for eg. DRM/DRI; 800x600x8 if sisfb\n"
5836 "is in the kernel)\n"); 7018 "is in the kernel)\n");
5837MODULE_PARM_DESC(vesa, 7019MODULE_PARM_DESC(vesa,
5838 "\nSelects the desired display mode by VESA defined mode number, eg. 0x117\n" 7020 "\nSelects the desired display mode by VESA defined mode number, eg. 0x117\n"
5839 "(default: 0x0000 if sisfb is a module; this leaves the console untouched\n" 7021 "(default: 0x0000 if sisfb is a module; this leaves the console untouched\n"
5840 "and the driver will only do the video memory management for eg. DRM/DRI;\n" 7022 "and the driver will only do the video memory management for eg. DRM/DRI;\n"
5841 "0x0103 if sisfb is in the kernel)\n"); 7023 "0x0103 if sisfb is in the kernel)\n");
5842#endif 7024#endif
5843 7025
5844#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 7026#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
5845MODULE_PARM_DESC(mode, 7027MODULE_PARM_DESC(mode,
5846 "\nSelects the desired default display mode in the format XxYxDepth,\n" 7028 "\nSelects the desired default display mode in the format XxYxDepth,\n"
5847 "eg. 1024x768x16. Other formats supported include XxY-Depth and\n" 7029 "eg. 1024x768x16. Other formats supported include XxY-Depth and\n"
5848 "XxY-Depth@Rate. If the parameter is only one (decimal or hexadecimal)\n" 7030 "XxY-Depth@Rate. If the parameter is only one (decimal or hexadecimal)\n"
5849 "number, it will be interpreted as a VESA mode number. (default: 800x600x8)\n"); 7031 "number, it will be interpreted as a VESA mode number. (default: 800x600x8)\n");
5850 7032
5851MODULE_PARM_DESC(vesa, 7033MODULE_PARM_DESC(vesa,
5852 "\nSelects the desired default display mode by VESA defined mode number, eg.\n" 7034 "\nSelects the desired default display mode by VESA defined mode number, eg.\n"
5853 "0x117 (default: 0x0103)\n"); 7035 "0x117 (default: 0x0103)\n");
5854#endif 7036#endif
5855 7037
5856MODULE_PARM_DESC(rate, 7038MODULE_PARM_DESC(rate,
@@ -5880,16 +7062,16 @@ MODULE_PARM_DESC(scalelcd,
5880 "themselves. Default: 1 on LVDS panels, 0 on TMDS panels\n"); 7062 "themselves. Default: 1 on LVDS panels, 0 on TMDS panels\n");
5881 7063
5882MODULE_PARM_DESC(pdc, 7064MODULE_PARM_DESC(pdc,
5883 "\nThis is for manually selecting the LCD panel delay compensation. The driver\n" 7065 "\nThis is for manually selecting the LCD panel delay compensation. The driver\n"
5884 "should detect this correctly in most cases; however, sometimes this is not\n" 7066 "should detect this correctly in most cases; however, sometimes this is not\n"
5885 "possible. If you see 'small waves' on the LCD, try setting this to 4, 32 or 24\n" 7067 "possible. If you see 'small waves' on the LCD, try setting this to 4, 32 or 24\n"
5886 "on a 300 series chipset; 6 on a 315 series chipset. If the problem persists,\n" 7068 "on a 300 series chipset; 6 on other chipsets. If the problem persists, try\n"
5887 "try other values (on 300 series: between 4 and 60 in steps of 4; on 315 series:\n" 7069 "other values (on 300 series: between 4 and 60 in steps of 4; otherwise: any\n"
5888 "any value from 0 to 31). (default: autodetected, if LCD is active during start)\n"); 7070 "value from 0 to 31). (default: autodetected, if LCD is active during start)\n");
5889 7071
5890#ifdef CONFIG_FB_SIS_315 7072#ifdef CONFIG_FB_SIS_315
5891MODULE_PARM_DESC(pdc1, 7073MODULE_PARM_DESC(pdc1,
5892 "\nThis is same as pdc, but for LCD-via CRT1. Hence, this is for the 315/330\n" 7074 "\nThis is same as pdc, but for LCD-via CRT1. Hence, this is for the 315/330/340\n"
5893 "series only. (default: autodetected if LCD is in LCD-via-CRT1 mode during\n" 7075 "series only. (default: autodetected if LCD is in LCD-via-CRT1 mode during\n"
5894 "startup) - Note: currently, this has no effect because LCD-via-CRT1 is not\n" 7076 "startup) - Note: currently, this has no effect because LCD-via-CRT1 is not\n"
5895 "implemented yet.\n"); 7077 "implemented yet.\n");
@@ -5913,17 +7095,13 @@ MODULE_PARM_DESC(tvyposoffset,
5913 "\nRelocate TV output vertically. Possible parameters: -32 through 32.\n" 7095 "\nRelocate TV output vertically. Possible parameters: -32 through 32.\n"
5914 "Default: 0\n"); 7096 "Default: 0\n");
5915 7097
5916MODULE_PARM_DESC(filter,
5917 "\nSelects TV flicker filter type (only for systems with a SiS301 video bridge).\n"
5918 "(Possible values 0-7, default: [no filter])\n");
5919
5920MODULE_PARM_DESC(nocrt2rate, 7098MODULE_PARM_DESC(nocrt2rate,
5921 "\nSetting this to 1 will force the driver to use the default refresh rate for\n" 7099 "\nSetting this to 1 will force the driver to use the default refresh rate for\n"
5922 "CRT2 if CRT2 type is VGA. (default: 0, use same rate as CRT1)\n"); 7100 "CRT2 if CRT2 type is VGA. (default: 0, use same rate as CRT1)\n");
5923 7101
5924#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 7102#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5925MODULE_PARM_DESC(inverse, 7103MODULE_PARM_DESC(inverse,
5926 "\nSetting this to anything but 0 should invert the display colors, but this\n" 7104 "\nSetting this to anything but 0 should invert the display colors, but this\n"
5927 "does not seem to work. (default: 0)\n"); 7105 "does not seem to work. (default: 0)\n");
5928#endif 7106#endif
5929 7107
@@ -5931,98 +7109,23 @@ MODULE_PARM_DESC(inverse,
5931#ifdef CONFIG_FB_SIS_300 7109#ifdef CONFIG_FB_SIS_300
5932MODULE_PARM_DESC(resetcard, 7110MODULE_PARM_DESC(resetcard,
5933 "\nSet this to 1 in order to reset (POST) the card on non-x86 machines where\n" 7111 "\nSet this to 1 in order to reset (POST) the card on non-x86 machines where\n"
5934 "the BIOS did not POST the card (only supported for SiS 300/305 currently).\n" 7112 "the BIOS did not POST the card (only supported for SiS 300/305 and XGI cards\n"
5935 "Default: 0\n"); 7113 "currently). Default: 0\n");
5936 7114
5937MODULE_PARM_DESC(videoram, 7115MODULE_PARM_DESC(videoram,
5938 "\nSet this to the amount of video RAM (in kilobyte) the card has. Required on\n" 7116 "\nSet this to the amount of video RAM (in kilobyte) the card has. Required on\n"
5939 "some non-x86 architectures where the memory auto detection fails. Only\n" 7117 "some non-x86 architectures where the memory auto detection fails. Only\n"
5940 "relevant if resetcard is set, too. Default: [auto-detect]\n"); 7118 "relevant if resetcard is set, too. SiS300/305 only. Default: [auto-detect]\n");
5941#endif
5942#endif 7119#endif
5943
5944static int __devinit sisfb_init_module(void)
5945{
5946 sisfb_setdefaultparms();
5947
5948 if(rate) sisfb_parm_rate = rate;
5949
5950 if((scalelcd == 0) || (scalelcd == 1)) {
5951 sisfb_scalelcd = scalelcd ^ 1;
5952 }
5953
5954 /* Need to check crt2 type first for fstn/dstn */
5955
5956 if(forcecrt2type)
5957 sisfb_search_crt2type(forcecrt2type);
5958
5959 if(tvstandard)
5960 sisfb_search_tvstd(tvstandard);
5961
5962 if(mode)
5963 sisfb_search_mode(mode, FALSE);
5964 else if(vesa != -1)
5965 sisfb_search_vesamode(vesa, FALSE);
5966
5967 sisfb_crt1off = (crt1off == 0) ? 1 : 0;
5968
5969 sisfb_forcecrt1 = forcecrt1;
5970 if(forcecrt1 == 1) sisfb_crt1off = 0;
5971 else if(forcecrt1 == 0) sisfb_crt1off = 1;
5972
5973 if(noaccel == 1) sisfb_accel = 0;
5974 else if(noaccel == 0) sisfb_accel = 1;
5975
5976 if(noypan == 1) sisfb_ypan = 0;
5977 else if(noypan == 0) sisfb_ypan = 1;
5978
5979 if(nomax == 1) sisfb_max = 0;
5980 else if(nomax == 0) sisfb_max = 1;
5981
5982#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
5983 if(inverse) sisfb_inverse = 1;
5984#endif 7120#endif
5985 7121
5986 if(mem) sisfb_parm_mem = mem;
5987
5988 if(userom != -1) sisfb_userom = userom;
5989 if(useoem != -1) sisfb_useoem = useoem;
5990
5991 if(pdc != -1) sisfb_pdc = (pdc & 0x7f);
5992 if(pdc1 != -1) sisfb_pdca = (pdc1 & 0x1f);
5993
5994 sisfb_nocrt2rate = nocrt2rate;
5995
5996 if(specialtiming)
5997 sisfb_search_specialtiming(specialtiming);
5998
5999 if((lvdshl >= 0) && (lvdshl <= 3)) sisfb_lvdshl = lvdshl;
6000
6001 if(filter != -1) sisfb_filter = filter;
6002
6003 sisfb_tvxposoffset = tvxposoffset;
6004 sisfb_tvyposoffset = tvyposoffset;
6005
6006#if !defined(__i386__) && !defined(__x86_64__)
6007 sisfb_resetcard = (resetcard) ? 1 : 0;
6008 if(videoram) sisfb_videoram = videoram;
6009#endif
6010
6011 return(sisfb_init());
6012}
6013
6014static void __exit sisfb_remove_module(void)
6015{
6016 pci_unregister_driver(&sisfb_driver);
6017 printk(KERN_DEBUG "sisfb: Module unloaded\n");
6018}
6019
6020module_init(sisfb_init_module);
6021module_exit(sisfb_remove_module);
6022
6023#endif /* /MODULE */ 7122#endif /* /MODULE */
6024 7123
7124/* _GPL only for new symbols. */
6025EXPORT_SYMBOL(sis_malloc); 7125EXPORT_SYMBOL(sis_malloc);
6026EXPORT_SYMBOL(sis_free); 7126EXPORT_SYMBOL(sis_free);
7127EXPORT_SYMBOL_GPL(sis_malloc_new);
7128EXPORT_SYMBOL_GPL(sis_free_new);
7129
6027 7130
6028 7131
diff --git a/drivers/video/sis/sis_main.h b/drivers/video/sis/sis_main.h
index a6678a7aff35..445bcbba03ae 100644
--- a/drivers/video/sis/sis_main.h
+++ b/drivers/video/sis/sis_main.h
@@ -1,9 +1,10 @@
1/* 1/*
2 * SiS 300/305/540/630(S)/730(S) 2 * SiS 300/305/540/630(S)/730(S),
3 * SiS 315(H/PRO)/55x/(M)65x/(M)661(F/M)X/740/741(GX)/330/(M)760 3 * SiS 315[E|PRO]/550/[M]65x/[M]66x[F|M|G]X/[M]74x[GX]/330/[M]76x[GX],
4 * XGI V3XT/V5/V8, Z7
4 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3 5 * frame buffer driver for Linux kernels >=2.4.14 and >=2.6.3
5 * 6 *
6 * Copyright (C) 2001-2004 Thomas Winischhofer, Vienna, Austria. 7 * Copyright (C) 2001-2005 Thomas Winischhofer, Vienna, Austria.
7 * 8 *
8 * This program is free software; you can redistribute it and/or modify 9 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by 10 * it under the terms of the GNU General Public License as published by
@@ -23,13 +24,9 @@
23#ifndef _SISFB_MAIN 24#ifndef _SISFB_MAIN
24#define _SISFB_MAIN 25#define _SISFB_MAIN
25 26
26#include <linux/spinlock.h>
27
28#include "vstruct.h" 27#include "vstruct.h"
29#include "sis.h" 28#include "sis.h"
30 29
31#define MODE_INDEX_NONE 0 /* index for mode=none */
32
33/* Fbcon stuff */ 30/* Fbcon stuff */
34static struct fb_var_screeninfo my_default_var = { 31static struct fb_var_screeninfo my_default_var = {
35 .xres = 0, 32 .xres = 0,
@@ -60,6 +57,8 @@ static struct fb_var_screeninfo my_default_var = {
60 .vmode = FB_VMODE_NONINTERLACED, 57 .vmode = FB_VMODE_NONINTERLACED,
61}; 58};
62 59
60#define MODE_INDEX_NONE 0 /* index for mode=none */
61
63/* Boot-time parameters */ 62/* Boot-time parameters */
64static int sisfb_off = 0; 63static int sisfb_off = 0;
65static int sisfb_parm_mem = 0; 64static int sisfb_parm_mem = 0;
@@ -93,7 +92,6 @@ static int sisfb_tvplug = -1; /* Tv plug type (for overriding autodetection) */
93static int sisfb_tvstd = -1; 92static int sisfb_tvstd = -1;
94static int sisfb_tvxposoffset = 0; 93static int sisfb_tvxposoffset = 0;
95static int sisfb_tvyposoffset = 0; 94static int sisfb_tvyposoffset = 0;
96static int sisfb_filter = -1;
97static int sisfb_nocrt2rate = 0; 95static int sisfb_nocrt2rate = 0;
98#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 96#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
99static int sisfb_inverse = 0; 97static int sisfb_inverse = 0;
@@ -106,12 +104,12 @@ static int sisfb_videoram = 0;
106 104
107/* List of supported chips */ 105/* List of supported chips */
108static struct sisfb_chip_info { 106static struct sisfb_chip_info {
109 int chip; 107 int chip;
110 int vgaengine; 108 int vgaengine;
111 int mni; 109 int mni;
112 int hwcursor_size; 110 int hwcursor_size;
113 int CRT2_write_enable; 111 int CRT2_write_enable;
114 const char *chip_name; 112 const char *chip_name;
115} sisfb_chip_info[] __devinitdata = { 113} sisfb_chip_info[] __devinitdata = {
116 { SIS_300, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 300/305" }, 114 { SIS_300, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 300/305" },
117 { SIS_540, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 540" }, 115 { SIS_540, SIS_300_VGA, 0, HW_CURSOR_AREA_SIZE_300 * 2, SIS_CRT2_WENABLE_300, "SiS 540" },
@@ -123,6 +121,8 @@ static struct sisfb_chip_info {
123 { SIS_650, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 650" }, 121 { SIS_650, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 650" },
124 { SIS_330, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 330" }, 122 { SIS_330, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 330" },
125 { SIS_660, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 660" }, 123 { SIS_660, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "SiS 660" },
124 { XGI_20, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "XGI Z7" },
125 { XGI_40, SIS_315_VGA, 1, HW_CURSOR_AREA_SIZE_315 * 4, SIS_CRT2_WENABLE_315, "XGI V3XT/V5/V8" },
126}; 126};
127 127
128static struct pci_device_id __devinitdata sisfb_pci_table[] = { 128static struct pci_device_id __devinitdata sisfb_pci_table[] = {
@@ -139,6 +139,8 @@ static struct pci_device_id __devinitdata sisfb_pci_table[] = {
139 { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7}, 139 { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_650_VGA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7},
140 { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_330, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8}, 140 { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_330, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8},
141 { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_660_VGA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9}, 141 { PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_660_VGA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9},
142 { PCI_VENDOR_ID_XGI,PCI_DEVICE_ID_XGI_20, PCI_ANY_ID, PCI_ANY_ID, 0, 0,10},
143 { PCI_VENDOR_ID_XGI,PCI_DEVICE_ID_XGI_40, PCI_ANY_ID, PCI_ANY_ID, 0, 0,11},
142#endif 144#endif
143 { 0 } 145 { 0 }
144}; 146};
@@ -147,13 +149,12 @@ MODULE_DEVICE_TABLE(pci, sisfb_pci_table);
147 149
148static struct sis_video_info *card_list = NULL; 150static struct sis_video_info *card_list = NULL;
149 151
150/* TODO: This is not handled card-wise because the DRM 152/* The memory heap is now handled card-wise, by using
151 does not refer to a unique fb when calling sis_alloc 153 sis_malloc_new/sis_free_new. However, the DRM does
152 or sis_free. Therefore, this is handled globally for 154 not do this yet. Until it does, we keep a "global"
153 now (hoping that nobody is crazy enough to run two 155 heap which is actually the first card's one.
154 SiS cards at the same time).
155 */ 156 */
156static SIS_HEAP sisfb_heap; 157static struct SIS_HEAP *sisfb_heap;
157 158
158#define MD_SIS300 1 159#define MD_SIS300 1
159#define MD_SIS315 2 160#define MD_SIS315 2
@@ -181,8 +182,10 @@ static const struct _sisbios_mode {
181 {"320x240x16", {0x56,0x56}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS300|MD_SIS315}, 182 {"320x240x16", {0x56,0x56}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS300|MD_SIS315},
182 {"320x240x24", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315}, 183 {"320x240x24", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315},
183 {"320x240x32", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315}, 184 {"320x240x32", {0x53,0x53}, 0x0000, 0x0000, 320, 240, 32, 1, 40, 15, MD_SIS300|MD_SIS315},
184 {"320x240x8", {0x5a,0x5a}, 0x0132, 0x0000, 320, 480, 8, 1, 40, 30, MD_SIS315}, /* FSTN */ 185#define MODE_FSTN_8 9
185/*10*/ {"320x240x16", {0x5b,0x5b}, 0x0135, 0x0000, 320, 480, 16, 1, 40, 30, MD_SIS315}, /* FSTN */ 186#define MODE_FSTN_16 10
187 {"320x240x8", {0x5a,0x5a}, 0x0132, 0x0000, 320, 240, 8, 1, 40, 15, MD_SIS315}, /* FSTN */
188/*10*/ {"320x240x16", {0x5b,0x5b}, 0x0135, 0x0000, 320, 240, 16, 1, 40, 15, MD_SIS315}, /* FSTN */
186 {"400x300x8", {0x51,0x51}, 0x0133, 0x0000, 400, 300, 8, 1, 50, 18, MD_SIS300|MD_SIS315}, 189 {"400x300x8", {0x51,0x51}, 0x0133, 0x0000, 400, 300, 8, 1, 50, 18, MD_SIS300|MD_SIS315},
187 {"400x300x16", {0x57,0x57}, 0x0136, 0x0000, 400, 300, 16, 1, 50, 18, MD_SIS300|MD_SIS315}, 190 {"400x300x16", {0x57,0x57}, 0x0136, 0x0000, 400, 300, 16, 1, 50, 18, MD_SIS300|MD_SIS315},
188 {"400x300x24", {0x54,0x54}, 0x0000, 0x0000, 400, 300, 32, 1, 50, 18, MD_SIS300|MD_SIS315}, 191 {"400x300x24", {0x54,0x54}, 0x0000, 0x0000, 400, 300, 32, 1, 50, 18, MD_SIS300|MD_SIS315},
@@ -215,18 +218,20 @@ static const struct _sisbios_mode {
215/*40*/ {"800x480x16", {0x7a,0x7a}, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_SIS300|MD_SIS315}, 218/*40*/ {"800x480x16", {0x7a,0x7a}, 0x0000, 0x0000, 800, 480, 16, 1, 100, 30, MD_SIS300|MD_SIS315},
216 {"800x480x24", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315}, 219 {"800x480x24", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
217 {"800x480x32", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315}, 220 {"800x480x32", {0x76,0x76}, 0x0000, 0x0000, 800, 480, 32, 1, 100, 30, MD_SIS300|MD_SIS315},
218#define DEFAULT_MODE 43 /* index for 800x600x8 */ 221#define DEFAULT_MODE 43 /* index for 800x600x8 */
219#define DEFAULT_LCDMODE 43 /* index for 800x600x8 */ 222#define DEFAULT_LCDMODE 43 /* index for 800x600x8 */
220#define DEFAULT_TVMODE 43 /* index for 800x600x8 */ 223#define DEFAULT_TVMODE 43 /* index for 800x600x8 */
221 {"800x600x8", {0x30,0x30}, 0x0103, 0x0103, 800, 600, 8, 2, 100, 37, MD_SIS300|MD_SIS315}, 224 {"800x600x8", {0x30,0x30}, 0x0103, 0x0103, 800, 600, 8, 2, 100, 37, MD_SIS300|MD_SIS315},
222 {"800x600x16", {0x47,0x47}, 0x0114, 0x0114, 800, 600, 16, 2, 100, 37, MD_SIS300|MD_SIS315}, 225 {"800x600x16", {0x47,0x47}, 0x0114, 0x0114, 800, 600, 16, 2, 100, 37, MD_SIS300|MD_SIS315},
223 {"800x600x24", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315}, 226 {"800x600x24", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
224 {"800x600x32", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315}, 227 {"800x600x32", {0x63,0x63}, 0x013b, 0x0115, 800, 600, 32, 2, 100, 37, MD_SIS300|MD_SIS315},
225 {"848x480x8", {0x39,0x39}, 0x0000, 0x0000, 848, 480, 8, 2, 106, 30, MD_SIS300|MD_SIS315}, 228 {"848x480x8", {0x39,0x39}, 0x0000, 0x0000, 848, 480, 8, 2, 106, 30, MD_SIS300|MD_SIS315},
229#define DEFAULT_MODE_848 48
226 {"848x480x16", {0x3b,0x3b}, 0x0000, 0x0000, 848, 480, 16, 2, 106, 30, MD_SIS300|MD_SIS315}, 230 {"848x480x16", {0x3b,0x3b}, 0x0000, 0x0000, 848, 480, 16, 2, 106, 30, MD_SIS300|MD_SIS315},
227 {"848x480x24", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315}, 231 {"848x480x24", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315},
228/*50*/ {"848x480x32", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315}, 232/*50*/ {"848x480x32", {0x3e,0x3e}, 0x0000, 0x0000, 848, 480, 32, 2, 106, 30, MD_SIS300|MD_SIS315},
229 {"856x480x8", {0x3f,0x3f}, 0x0000, 0x0000, 856, 480, 8, 2, 107, 30, MD_SIS300|MD_SIS315}, 233 {"856x480x8", {0x3f,0x3f}, 0x0000, 0x0000, 856, 480, 8, 2, 107, 30, MD_SIS300|MD_SIS315},
234#define DEFAULT_MODE_856 52
230 {"856x480x16", {0x42,0x42}, 0x0000, 0x0000, 856, 480, 16, 2, 107, 30, MD_SIS300|MD_SIS315}, 235 {"856x480x16", {0x42,0x42}, 0x0000, 0x0000, 856, 480, 16, 2, 107, 30, MD_SIS300|MD_SIS315},
231 {"856x480x24", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315}, 236 {"856x480x24", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315},
232 {"856x480x32", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315}, 237 {"856x480x32", {0x45,0x45}, 0x0000, 0x0000, 856, 480, 32, 2, 107, 30, MD_SIS300|MD_SIS315},
@@ -270,42 +275,47 @@ static const struct _sisbios_mode {
270 {"1280x800x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 800, 16, 1, 160, 50, MD_SIS315}, 275 {"1280x800x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 800, 16, 1, 160, 50, MD_SIS315},
271 {"1280x800x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315}, 276 {"1280x800x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315},
272 {"1280x800x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315}, 277 {"1280x800x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 800, 32, 1, 160, 50, MD_SIS315},
278 {"1280x854x8", {0x14,0x14}, 0x0000, 0x0000, 1280, 854, 8, 1, 160, 53, MD_SIS315},
279 {"1280x854x16", {0x15,0x15}, 0x0000, 0x0000, 1280, 854, 16, 1, 160, 53, MD_SIS315},
280 {"1280x854x24", {0x16,0x16}, 0x0000, 0x0000, 1280, 854, 32, 1, 160, 53, MD_SIS315},
281 {"1280x854x32", {0x16,0x16}, 0x0000, 0x0000, 1280, 854, 32, 1, 160, 53, MD_SIS315},
273 {"1280x960x8", {0x7c,0x7c}, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_SIS300|MD_SIS315}, 282 {"1280x960x8", {0x7c,0x7c}, 0x0000, 0x0000, 1280, 960, 8, 1, 160, 60, MD_SIS300|MD_SIS315},
274 {"1280x960x16", {0x7d,0x7d}, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_SIS300|MD_SIS315}, 283/*100*/ {"1280x960x16", {0x7d,0x7d}, 0x0000, 0x0000, 1280, 960, 16, 1, 160, 60, MD_SIS300|MD_SIS315},
275 {"1280x960x24", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315}, 284 {"1280x960x24", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
276 {"1280x960x32", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315}, 285 {"1280x960x32", {0x7e,0x7e}, 0x0000, 0x0000, 1280, 960, 32, 1, 160, 60, MD_SIS300|MD_SIS315},
277 {"1280x1024x8", {0x3a,0x3a}, 0x0107, 0x0107, 1280, 1024, 8, 2, 160, 64, MD_SIS300|MD_SIS315}, 286 {"1280x1024x8", {0x3a,0x3a}, 0x0107, 0x0107, 1280, 1024, 8, 2, 160, 64, MD_SIS300|MD_SIS315},
278/*100*/ {"1280x1024x16", {0x4d,0x4d}, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315}, 287 {"1280x1024x16", {0x4d,0x4d}, 0x011a, 0x011a, 1280, 1024, 16, 2, 160, 64, MD_SIS300|MD_SIS315},
279 {"1280x1024x24", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315}, 288 {"1280x1024x24", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
280 {"1280x1024x32", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315}, 289 {"1280x1024x32", {0x65,0x65}, 0x013d, 0x011b, 1280, 1024, 32, 2, 160, 64, MD_SIS300|MD_SIS315},
281 {"1360x768x8", {0x48,0x48}, 0x0000, 0x0000, 1360, 768, 8, 1, 170, 48, MD_SIS300|MD_SIS315}, 290 {"1360x768x8", {0x48,0x48}, 0x0000, 0x0000, 1360, 768, 8, 1, 170, 48, MD_SIS300|MD_SIS315},
282 {"1360x768x16", {0x4b,0x4b}, 0x0000, 0x0000, 1360, 768, 16, 1, 170, 48, MD_SIS300|MD_SIS315}, 291 {"1360x768x16", {0x4b,0x4b}, 0x0000, 0x0000, 1360, 768, 16, 1, 170, 48, MD_SIS300|MD_SIS315},
283 {"1360x768x24", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315}, 292 {"1360x768x24", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
284 {"1360x768x32", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315}, 293/*110*/ {"1360x768x32", {0x4e,0x4e}, 0x0000, 0x0000, 1360, 768, 32, 1, 170, 48, MD_SIS300|MD_SIS315},
285 {"1360x1024x8", {0x67,0x67}, 0x0000, 0x0000, 1360, 1024, 8, 1, 170, 64, MD_SIS300 }, 294 {"1360x1024x8", {0x67,0x67}, 0x0000, 0x0000, 1360, 1024, 8, 1, 170, 64, MD_SIS300 },
295#define DEFAULT_MODE_1360 112
286 {"1360x1024x16", {0x6f,0x6f}, 0x0000, 0x0000, 1360, 1024, 16, 1, 170, 64, MD_SIS300 }, 296 {"1360x1024x16", {0x6f,0x6f}, 0x0000, 0x0000, 1360, 1024, 16, 1, 170, 64, MD_SIS300 },
287 {"1360x1024x24", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 }, 297 {"1360x1024x24", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
288/*110*/ {"1360x1024x32", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 }, 298 {"1360x1024x32", {0x72,0x72}, 0x0000, 0x0000, 1360, 1024, 32, 1, 170, 64, MD_SIS300 },
289 {"1400x1050x8", {0x26,0x26}, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_SIS315}, 299 {"1400x1050x8", {0x26,0x26}, 0x0000, 0x0000, 1400, 1050, 8, 1, 175, 65, MD_SIS315},
290 {"1400x1050x16", {0x27,0x27}, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_SIS315}, 300 {"1400x1050x16", {0x27,0x27}, 0x0000, 0x0000, 1400, 1050, 16, 1, 175, 65, MD_SIS315},
291 {"1400x1050x24", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315}, 301 {"1400x1050x24", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
292 {"1400x1050x32", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315}, 302 {"1400x1050x32", {0x28,0x28}, 0x0000, 0x0000, 1400, 1050, 32, 1, 175, 65, MD_SIS315},
293 {"1600x1200x8", {0x3c,0x3c}, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_SIS300|MD_SIS315}, 303 {"1600x1200x8", {0x3c,0x3c}, 0x0130, 0x011c, 1600, 1200, 8, 1, 200, 75, MD_SIS300|MD_SIS315},
294 {"1600x1200x16", {0x3d,0x3d}, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315}, 304/*120*/ {"1600x1200x16", {0x3d,0x3d}, 0x0131, 0x011e, 1600, 1200, 16, 1, 200, 75, MD_SIS300|MD_SIS315},
295 {"1600x1200x24", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315}, 305 {"1600x1200x24", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
296 {"1600x1200x32", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315}, 306 {"1600x1200x32", {0x66,0x66}, 0x013e, 0x011f, 1600, 1200, 32, 1, 200, 75, MD_SIS300|MD_SIS315},
297 {"1680x1050x8", {0x17,0x17}, 0x0000, 0x0000, 1680, 1050, 8, 1, 210, 65, MD_SIS315}, 307 {"1680x1050x8", {0x17,0x17}, 0x0000, 0x0000, 1680, 1050, 8, 1, 210, 65, MD_SIS315},
298/*120*/ {"1680x1050x16", {0x18,0x18}, 0x0000, 0x0000, 1680, 1050, 16, 1, 210, 65, MD_SIS315}, 308 {"1680x1050x16", {0x18,0x18}, 0x0000, 0x0000, 1680, 1050, 16, 1, 210, 65, MD_SIS315},
299 {"1680x1050x24", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315}, 309 {"1680x1050x24", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315},
300 {"1680x1050x32", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315}, 310 {"1680x1050x32", {0x19,0x19}, 0x0000, 0x0000, 1680, 1050, 32, 1, 210, 65, MD_SIS315},
301 {"1920x1080x8", {0x2c,0x2c}, 0x0000, 0x0000, 1920, 1080, 8, 1, 240, 67, MD_SIS315}, 311 {"1920x1080x8", {0x2c,0x2c}, 0x0000, 0x0000, 1920, 1080, 8, 1, 240, 67, MD_SIS315},
302 {"1920x1080x16", {0x2d,0x2d}, 0x0000, 0x0000, 1920, 1080, 16, 1, 240, 67, MD_SIS315}, 312 {"1920x1080x16", {0x2d,0x2d}, 0x0000, 0x0000, 1920, 1080, 16, 1, 240, 67, MD_SIS315},
303 {"1920x1080x24", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315}, 313 {"1920x1080x24", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
304 {"1920x1080x32", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315}, 314/*130*/ {"1920x1080x32", {0x73,0x73}, 0x0000, 0x0000, 1920, 1080, 32, 1, 240, 67, MD_SIS315},
305 {"1920x1440x8", {0x68,0x68}, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_SIS300|MD_SIS315}, 315 {"1920x1440x8", {0x68,0x68}, 0x013f, 0x0000, 1920, 1440, 8, 1, 240, 75, MD_SIS300|MD_SIS315},
306 {"1920x1440x16", {0x69,0x69}, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_SIS300|MD_SIS315}, 316 {"1920x1440x16", {0x69,0x69}, 0x0140, 0x0000, 1920, 1440, 16, 1, 240, 75, MD_SIS300|MD_SIS315},
307 {"1920x1440x24", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315}, 317 {"1920x1440x24", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
308/*130*/ {"1920x1440x32", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315}, 318 {"1920x1440x32", {0x6b,0x6b}, 0x0141, 0x0000, 1920, 1440, 32, 1, 240, 75, MD_SIS300|MD_SIS315},
309 {"2048x1536x8", {0x6c,0x6c}, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_SIS315}, 319 {"2048x1536x8", {0x6c,0x6c}, 0x0000, 0x0000, 2048, 1536, 8, 1, 256, 96, MD_SIS315},
310 {"2048x1536x16", {0x6d,0x6d}, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_SIS315}, 320 {"2048x1536x16", {0x6d,0x6d}, 0x0000, 0x0000, 2048, 1536, 16, 1, 256, 96, MD_SIS315},
311 {"2048x1536x24", {0x6e,0x6e}, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315}, 321 {"2048x1536x24", {0x6e,0x6e}, 0x0000, 0x0000, 2048, 1536, 32, 1, 256, 96, MD_SIS315},
@@ -313,13 +323,13 @@ static const struct _sisbios_mode {
313 {"\0", {0x00,0x00}, 0, 0, 0, 0, 0, 0, 0} 323 {"\0", {0x00,0x00}, 0, 0, 0, 0, 0, 0, 0}
314}; 324};
315 325
316#define SIS_LCD_NUMBER 17 326#define SIS_LCD_NUMBER 18
317static const struct _sis_lcd_data { 327static struct _sis_lcd_data {
318 u32 lcdtype; 328 u32 lcdtype;
319 u16 xres; 329 u16 xres;
320 u16 yres; 330 u16 yres;
321 u8 default_mode_idx; 331 u8 default_mode_idx;
322} sis_lcd_data[] = { 332} sis_lcd_data[] __devinitdata = {
323 { LCD_640x480, 640, 480, 23 }, 333 { LCD_640x480, 640, 480, 23 },
324 { LCD_800x600, 800, 600, 43 }, 334 { LCD_800x600, 800, 600, 43 },
325 { LCD_1024x600, 1024, 600, 67 }, 335 { LCD_1024x600, 1024, 600, 67 },
@@ -329,34 +339,38 @@ static const struct _sis_lcd_data {
329 { LCD_1280x720, 1280, 720, 83 }, 339 { LCD_1280x720, 1280, 720, 83 },
330 { LCD_1280x768, 1280, 768, 87 }, 340 { LCD_1280x768, 1280, 768, 87 },
331 { LCD_1280x800, 1280, 800, 91 }, 341 { LCD_1280x800, 1280, 800, 91 },
332 { LCD_1280x960, 1280, 960, 95 }, 342 { LCD_1280x854, 1280, 854, 95 },
333 { LCD_1280x1024, 1280, 1024, 99 }, 343 { LCD_1280x960, 1280, 960, 99 },
334 { LCD_1400x1050, 1400, 1050, 111 }, 344 { LCD_1280x1024, 1280, 1024, 103 },
335 { LCD_1680x1050, 1680, 1050, 119 }, 345 { LCD_1400x1050, 1400, 1050, 115 },
336 { LCD_1600x1200, 1600, 1200, 115 }, 346 { LCD_1680x1050, 1680, 1050, 123 },
337 { LCD_640x480_2, 640, 480, 23 }, 347 { LCD_1600x1200, 1600, 1200, 119 },
338 { LCD_640x480_3, 640, 480, 23 }, 348 { LCD_320x240_2, 320, 240, 9 },
339 { LCD_320x480, 320, 480, 9 }, 349 { LCD_320x240_3, 320, 240, 9 },
350 { LCD_320x240, 320, 240, 9 },
340}; 351};
341 352
342/* CR36 evaluation */ 353/* CR36 evaluation */
343static const USHORT sis300paneltype[] = 354static unsigned short sis300paneltype[] __devinitdata = {
344 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024, 355 LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
345 LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768, 356 LCD_1280x960, LCD_640x480, LCD_1024x600, LCD_1152x768,
346 LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, 357 LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN,
347 LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN }; 358 LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN, LCD_UNKNOWN
348 359};
349static const USHORT sis310paneltype[] = 360
350 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024, 361static unsigned short sis310paneltype[] __devinitdata = {
351 LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960, 362 LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
352 LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200, 363 LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
353 LCD_640x480_2, LCD_640x480_3, LCD_UNKNOWN, LCD_UNKNOWN }; 364 LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
354 365 LCD_320x240_2, LCD_320x240_3, LCD_UNKNOWN, LCD_UNKNOWN
355static const USHORT sis661paneltype[] = 366};
356 { LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024, 367
357 LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960, 368static unsigned short sis661paneltype[] __devinitdata = {
358 LCD_1152x768, LCD_1400x1050, LCD_1280x768, LCD_1600x1200, 369 LCD_UNKNOWN, LCD_800x600, LCD_1024x768, LCD_1280x1024,
359 LCD_1280x800, LCD_1680x1050, LCD_1280x720, LCD_UNKNOWN }; 370 LCD_640x480, LCD_1024x600, LCD_1152x864, LCD_1280x960,
371 LCD_1280x854, LCD_1400x1050, LCD_1280x768, LCD_1600x1200,
372 LCD_1280x800, LCD_1680x1050, LCD_1280x720, LCD_UNKNOWN
373};
360 374
361#define FL_550_DSTN 0x01 375#define FL_550_DSTN 0x01
362#define FL_550_FSTN 0x02 376#define FL_550_FSTN 0x02
@@ -413,7 +427,6 @@ static const struct _sis_vrate {
413} sisfb_vrate[] = { 427} sisfb_vrate[] = {
414 {1, 320, 200, 70, TRUE}, 428 {1, 320, 200, 70, TRUE},
415 {1, 320, 240, 60, TRUE}, 429 {1, 320, 240, 60, TRUE},
416 {1, 320, 480, 60, TRUE},
417 {1, 400, 300, 60, TRUE}, 430 {1, 400, 300, 60, TRUE},
418 {1, 512, 384, 60, TRUE}, 431 {1, 512, 384, 60, TRUE},
419 {1, 640, 400, 72, TRUE}, 432 {1, 640, 400, 72, TRUE},
@@ -437,10 +450,11 @@ static const struct _sis_vrate {
437 {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE}, 450 {4, 1024, 768, 75, FALSE}, {5, 1024, 768, 85, TRUE}, {6, 1024, 768, 100, TRUE},
438 {7, 1024, 768, 120, TRUE}, 451 {7, 1024, 768, 120, TRUE},
439 {1, 1152, 768, 60, TRUE}, 452 {1, 1152, 768, 60, TRUE},
440 {1, 1152, 864, 60, TRUE}, {1, 1152, 864, 75, TRUE}, {2, 1152, 864, 84, TRUE}, 453 {1, 1152, 864, 60, TRUE}, {2, 1152, 864, 75, TRUE}, {3, 1152, 864, 84, TRUE},
441 {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, TRUE}, {3, 1280, 720, 85, TRUE}, 454 {1, 1280, 720, 60, TRUE}, {2, 1280, 720, 75, TRUE}, {3, 1280, 720, 85, TRUE},
442 {1, 1280, 768, 60, TRUE}, 455 {1, 1280, 768, 60, TRUE},
443 {1, 1280, 800, 60, TRUE}, 456 {1, 1280, 800, 60, TRUE},
457 {1, 1280, 854, 60, TRUE},
444 {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE}, 458 {1, 1280, 960, 60, TRUE}, {2, 1280, 960, 85, TRUE},
445 {1, 1280, 1024, 43, TRUE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, TRUE}, 459 {1, 1280, 1024, 43, TRUE}, {2, 1280, 1024, 60, TRUE}, {3, 1280, 1024, 75, TRUE},
446 {4, 1280, 1024, 85, TRUE}, 460 {4, 1280, 1024, 85, TRUE},
@@ -459,12 +473,12 @@ static const struct _sis_vrate {
459 {0, 0, 0, 0, FALSE} 473 {0, 0, 0, 0, FALSE}
460}; 474};
461 475
462static const struct _sisfbddcsmodes { 476static struct _sisfbddcsmodes {
463 u32 mask; 477 u32 mask;
464 u16 h; 478 u16 h;
465 u16 v; 479 u16 v;
466 u32 d; 480 u32 d;
467} sisfb_ddcsmodes[] = { 481} sisfb_ddcsmodes[] __devinitdata = {
468 { 0x10000, 67, 75, 108000}, 482 { 0x10000, 67, 75, 108000},
469 { 0x08000, 48, 72, 50000}, 483 { 0x08000, 48, 72, 50000},
470 { 0x04000, 46, 75, 49500}, 484 { 0x04000, 46, 75, 49500},
@@ -480,49 +494,49 @@ static const struct _sisfbddcsmodes {
480 { 0x00001, 38, 60, 40000} 494 { 0x00001, 38, 60, 40000}
481}; 495};
482 496
483static const struct _sisfbddcfmodes { 497static struct _sisfbddcfmodes {
484 u16 x; 498 u16 x;
485 u16 y; 499 u16 y;
486 u16 v; 500 u16 v;
487 u16 h; 501 u16 h;
488 u32 d; 502 u32 d;
489} sisfb_ddcfmodes[] = { 503} sisfb_ddcfmodes[] __devinitdata = {
490 { 1280, 1024, 85, 92, 157500}, 504 { 1280, 1024, 85, 92, 157500},
491 { 1600, 1200, 60, 75, 162000}, 505 { 1600, 1200, 60, 75, 162000},
492 { 1600, 1200, 65, 82, 175500}, 506 { 1600, 1200, 65, 82, 175500},
493 { 1600, 1200, 70, 88, 189000}, 507 { 1600, 1200, 70, 88, 189000},
494 { 1600, 1200, 75, 94, 202500}, 508 { 1600, 1200, 75, 94, 202500},
495 { 1600, 1200, 85, 107,229500}, 509 { 1600, 1200, 85, 107,229500},
496 { 1920, 1440, 60, 90, 234000}, 510 { 1920, 1440, 60, 90, 234000},
497 { 1920, 1440, 75, 113,297000} 511 { 1920, 1440, 75, 113,297000}
498}; 512};
499 513
500#ifdef CONFIG_FB_SIS_300 514#ifdef CONFIG_FB_SIS_300
501static struct _chswtable { 515static struct _chswtable {
502 u16 subsysVendor; 516 u16 subsysVendor;
503 u16 subsysCard; 517 u16 subsysCard;
504 char *vendorName; 518 char *vendorName;
505 char *cardName; 519 char *cardName;
506} mychswtable[] __devinitdata = { 520} mychswtable[] __devinitdata = {
507 { 0x1631, 0x1002, "Mitachi", "0x1002" }, 521 { 0x1631, 0x1002, "Mitachi", "0x1002" },
508 { 0x1071, 0x7521, "Mitac" , "7521P" }, 522 { 0x1071, 0x7521, "Mitac" , "7521P" },
509 { 0, 0, "" , "" } 523 { 0, 0, "" , "" }
510}; 524};
511#endif 525#endif
512 526
513static struct _customttable { 527static struct _customttable {
514 u16 chipID; 528 u16 chipID;
515 char *biosversion; 529 char *biosversion;
516 char *biosdate; 530 char *biosdate;
517 u32 bioschksum; 531 u32 bioschksum;
518 u16 biosFootprintAddr[5]; 532 u16 biosFootprintAddr[5];
519 u8 biosFootprintData[5]; 533 u8 biosFootprintData[5];
520 u16 pcisubsysvendor; 534 u16 pcisubsysvendor;
521 u16 pcisubsyscard; 535 u16 pcisubsyscard;
522 char *vendorName; 536 char *vendorName;
523 char *cardName; 537 char *cardName;
524 u32 SpecialID; 538 u32 SpecialID;
525 char *optionName; 539 char *optionName;
526} mycustomttable[] __devinitdata = { 540} mycustomttable[] __devinitdata = {
527 { SIS_630, "2.00.07", "09/27/2002-13:38:25", 541 { SIS_630, "2.00.07", "09/27/2002-13:38:25",
528 0x3240A8, 542 0x3240A8,
@@ -643,6 +657,13 @@ static struct _customttable {
643 0, 0, 657 0, 0,
644 "Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480" 658 "Generic", "LVDS/Parallel 848x480", CUT_PANEL848, "PANEL848x480"
645 }, 659 },
660 { 4322, "", "", /* never autodetected */
661 0,
662 { 0, 0, 0, 0, 0 },
663 { 0, 0, 0, 0, 0 },
664 0, 0,
665 "Generic", "LVDS/Parallel 856x480", CUT_PANEL856, "PANEL856x480"
666 },
646 { 0, "", "", 667 { 0, "", "",
647 0, 668 0,
648 { 0, 0, 0, 0 }, 669 { 0, 0, 0, 0 },
@@ -652,155 +673,6 @@ static struct _customttable {
652 } 673 }
653}; 674};
654 675
655static const struct _sis_TV_filter {
656 u8 filter[9][4];
657} sis_TV_filter[] = {
658 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_0 */
659 {0x00,0xE0,0x10,0x60},
660 {0x00,0xEE,0x10,0x44},
661 {0x00,0xF4,0x10,0x38},
662 {0xF8,0xF4,0x18,0x38},
663 {0xFC,0xFB,0x14,0x2A},
664 {0x00,0x00,0x10,0x20},
665 {0x00,0x04,0x10,0x18},
666 {0xFF,0xFF,0xFF,0xFF} }},
667 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_1 */
668 {0x00,0xE0,0x10,0x60},
669 {0x00,0xEE,0x10,0x44},
670 {0x00,0xF4,0x10,0x38},
671 {0xF8,0xF4,0x18,0x38},
672 {0xFC,0xFB,0x14,0x2A},
673 {0x00,0x00,0x10,0x20},
674 {0x00,0x04,0x10,0x18},
675 {0xFF,0xFF,0xFF,0xFF} }},
676 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_2 */
677 {0xF5,0xEE,0x1B,0x44},
678 {0xF8,0xF4,0x18,0x38},
679 {0xEB,0x04,0x25,0x18},
680 {0xF1,0x05,0x1F,0x16},
681 {0xF6,0x06,0x1A,0x14},
682 {0xFA,0x06,0x16,0x14},
683 {0x00,0x04,0x10,0x18},
684 {0xFF,0xFF,0xFF,0xFF} }},
685 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_3 */
686 {0xF1,0x04,0x1F,0x18},
687 {0xEE,0x0D,0x22,0x06},
688 {0xF7,0x06,0x19,0x14},
689 {0xF4,0x0B,0x1C,0x0A},
690 {0xFA,0x07,0x16,0x12},
691 {0xF9,0x0A,0x17,0x0C},
692 {0x00,0x07,0x10,0x12},
693 {0xFF,0xFF,0xFF,0xFF} }},
694 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_4 - 320 */
695 {0x00,0xE0,0x10,0x60},
696 {0x00,0xEE,0x10,0x44},
697 {0x00,0xF4,0x10,0x38},
698 {0xF8,0xF4,0x18,0x38},
699 {0xFC,0xFB,0x14,0x2A},
700 {0x00,0x00,0x10,0x20},
701 {0x00,0x04,0x10,0x18},
702 {0xFF,0xFF,0xFF,0xFF} }},
703 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_5 - 640 */
704 {0xF5,0xEE,0x1B,0x44},
705 {0xF8,0xF4,0x18,0x38},
706 {0xEB,0x04,0x25,0x18},
707 {0xF1,0x05,0x1F,0x16},
708 {0xF6,0x06,0x1A,0x14},
709 {0xFA,0x06,0x16,0x14},
710 {0x00,0x04,0x10,0x18},
711 {0xFF,0xFF,0xFF,0xFF} }},
712 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_6 - 720 */
713 {0xEB,0x04,0x25,0x18},
714 {0xE7,0x0E,0x29,0x04},
715 {0xEE,0x0C,0x22,0x08},
716 {0xF6,0x0B,0x1A,0x0A},
717 {0xF9,0x0A,0x17,0x0C},
718 {0xFC,0x0A,0x14,0x0C},
719 {0x00,0x08,0x10,0x10},
720 {0xFF,0xFF,0xFF,0xFF} }},
721 { {{0x00,0x00,0x00,0x40}, /* NTSCFilter_7 - 800 */
722 {0xEC,0x02,0x24,0x1C},
723 {0xF2,0x04,0x1E,0x18},
724 {0xEB,0x15,0x25,0xF6},
725 {0xF4,0x10,0x1C,0x00},
726 {0xF8,0x0F,0x18,0x02},
727 {0x00,0x04,0x10,0x18},
728 {0x01,0x06,0x0F,0x14},
729 {0xFF,0xFF,0xFF,0xFF} }},
730 { {{0x00,0x00,0x00,0x40}, /* PALFilter_0 */
731 {0x00,0xE0,0x10,0x60},
732 {0x00,0xEE,0x10,0x44},
733 {0x00,0xF4,0x10,0x38},
734 {0xF8,0xF4,0x18,0x38},
735 {0xFC,0xFB,0x14,0x2A},
736 {0x00,0x00,0x10,0x20},
737 {0x00,0x04,0x10,0x18},
738 {0xFF,0xFF,0xFF,0xFF} }},
739 { {{0x00,0x00,0x00,0x40}, /* PALFilter_1 */
740 {0x00,0xE0,0x10,0x60},
741 {0x00,0xEE,0x10,0x44},
742 {0x00,0xF4,0x10,0x38},
743 {0xF8,0xF4,0x18,0x38},
744 {0xFC,0xFB,0x14,0x2A},
745 {0x00,0x00,0x10,0x20},
746 {0x00,0x04,0x10,0x18},
747 {0xFF,0xFF,0xFF,0xFF} }},
748 { {{0x00,0x00,0x00,0x40}, /* PALFilter_2 */
749 {0xF5,0xEE,0x1B,0x44},
750 {0xF8,0xF4,0x18,0x38},
751 {0xF1,0xF7,0x01,0x32},
752 {0xF5,0xFB,0x1B,0x2A},
753 {0xF9,0xFF,0x17,0x22},
754 {0xFB,0x01,0x15,0x1E},
755 {0x00,0x04,0x10,0x18},
756 {0xFF,0xFF,0xFF,0xFF} }},
757 { {{0x00,0x00,0x00,0x40}, /* PALFilter_3 */
758 {0xF5,0xFB,0x1B,0x2A},
759 {0xEE,0xFE,0x22,0x24},
760 {0xF3,0x00,0x1D,0x20},
761 {0xF9,0x03,0x17,0x1A},
762 {0xFB,0x02,0x14,0x1E},
763 {0xFB,0x04,0x15,0x18},
764 {0x00,0x06,0x10,0x14},
765 {0xFF,0xFF,0xFF,0xFF} }},
766 { {{0x00,0x00,0x00,0x40}, /* PALFilter_4 - 320 */
767 {0x00,0xE0,0x10,0x60},
768 {0x00,0xEE,0x10,0x44},
769 {0x00,0xF4,0x10,0x38},
770 {0xF8,0xF4,0x18,0x38},
771 {0xFC,0xFB,0x14,0x2A},
772 {0x00,0x00,0x10,0x20},
773 {0x00,0x04,0x10,0x18},
774 {0xFF,0xFF,0xFF,0xFF} }},
775 { {{0x00,0x00,0x00,0x40}, /* PALFilter_5 - 640 */
776 {0xF5,0xEE,0x1B,0x44},
777 {0xF8,0xF4,0x18,0x38},
778 {0xF1,0xF7,0x1F,0x32},
779 {0xF5,0xFB,0x1B,0x2A},
780 {0xF9,0xFF,0x17,0x22},
781 {0xFB,0x01,0x15,0x1E},
782 {0x00,0x04,0x10,0x18},
783 {0xFF,0xFF,0xFF,0xFF} }},
784 { {{0x00,0x00,0x00,0x40}, /* PALFilter_6 - 720 */
785 {0xF5,0xEE,0x1B,0x2A},
786 {0xEE,0xFE,0x22,0x24},
787 {0xF3,0x00,0x1D,0x20},
788 {0xF9,0x03,0x17,0x1A},
789 {0xFB,0x02,0x14,0x1E},
790 {0xFB,0x04,0x15,0x18},
791 {0x00,0x06,0x10,0x14},
792 {0xFF,0xFF,0xFF,0xFF} }},
793 { {{0x00,0x00,0x00,0x40}, /* PALFilter_7 - 800 */
794 {0xF5,0xEE,0x1B,0x44},
795 {0xF8,0xF4,0x18,0x38},
796 {0xFC,0xFB,0x14,0x2A},
797 {0xEB,0x05,0x25,0x16},
798 {0xF1,0x05,0x1F,0x16},
799 {0xFA,0x07,0x16,0x12},
800 {0x00,0x07,0x10,0x12},
801 {0xFF,0xFF,0xFF,0xFF} }}
802};
803
804/* ---------------------- Prototypes ------------------------- */ 676/* ---------------------- Prototypes ------------------------- */
805 677
806/* Interface used by the world */ 678/* Interface used by the world */
@@ -811,145 +683,159 @@ SISINITSTATIC int sisfb_setup(char *options);
811/* Interface to the low level console driver */ 683/* Interface to the low level console driver */
812SISINITSTATIC int sisfb_init(void); 684SISINITSTATIC int sisfb_init(void);
813 685
814
815/* fbdev routines */ 686/* fbdev routines */
816static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con, 687static int sisfb_get_fix(struct fb_fix_screeninfo *fix, int con,
817 struct fb_info *info); 688 struct fb_info *info);
818 689
819#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0) 690#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
820static int sisfb_get_fix(struct fb_fix_screeninfo *fix, 691static int sisfb_get_fix(struct fb_fix_screeninfo *fix,
821 int con, 692 int con,
822 struct fb_info *info); 693 struct fb_info *info);
823static int sisfb_get_var(struct fb_var_screeninfo *var, 694static int sisfb_get_var(struct fb_var_screeninfo *var,
824 int con, 695 int con,
825 struct fb_info *info); 696 struct fb_info *info);
826static int sisfb_set_var(struct fb_var_screeninfo *var, 697static int sisfb_set_var(struct fb_var_screeninfo *var,
827 int con, 698 int con,
828 struct fb_info *info); 699 struct fb_info *info);
829static void sisfb_crtc_to_var(struct sis_video_info *ivideo, 700static void sisfb_crtc_to_var(struct sis_video_info *ivideo,
830 struct fb_var_screeninfo *var); 701 struct fb_var_screeninfo *var);
831static int sisfb_get_cmap(struct fb_cmap *cmap, 702static int sisfb_get_cmap(struct fb_cmap *cmap,
832 int kspc, 703 int kspc,
833 int con, 704 int con,
834 struct fb_info *info); 705 struct fb_info *info);
835static int sisfb_set_cmap(struct fb_cmap *cmap, 706static int sisfb_set_cmap(struct fb_cmap *cmap,
836 int kspc, 707 int kspc,
837 int con, 708 int con,
838 struct fb_info *info); 709 struct fb_info *info);
839static int sisfb_update_var(int con, 710static int sisfb_update_var(int con,
840 struct fb_info *info); 711 struct fb_info *info);
841static int sisfb_switch(int con, 712static int sisfb_switch(int con,
842 struct fb_info *info); 713 struct fb_info *info);
843static void sisfb_blank(int blank, 714static void sisfb_blank(int blank,
844 struct fb_info *info); 715 struct fb_info *info);
845static void sisfb_set_disp(int con, 716static void sisfb_set_disp(int con,
846 struct fb_var_screeninfo *var, 717 struct fb_var_screeninfo *var,
847 struct fb_info *info); 718 struct fb_info *info);
848static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green, 719static int sis_getcolreg(unsigned regno, unsigned *red, unsigned *green,
849 unsigned *blue, unsigned *transp, 720 unsigned *blue, unsigned *transp,
850 struct fb_info *fb_info); 721 struct fb_info *fb_info);
851static void sisfb_do_install_cmap(int con, 722static void sisfb_do_install_cmap(int con,
852 struct fb_info *info); 723 struct fb_info *info);
853static int sisfb_ioctl(struct inode *inode, struct file *file, 724static int sisfb_ioctl(struct inode *inode, struct file *file,
854 unsigned int cmd, unsigned long arg, int con, 725 unsigned int cmd, unsigned long arg, int con,
855 struct fb_info *info); 726 struct fb_info *info);
856#endif 727#endif
857 728
858#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 729#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
859static int sisfb_ioctl(struct inode *inode, struct file *file, 730static int sisfb_ioctl(struct inode *inode, struct file *file,
860 unsigned int cmd, unsigned long arg, 731 unsigned int cmd, unsigned long arg,
861 struct fb_info *info); 732 struct fb_info *info);
862static int sisfb_set_par(struct fb_info *info); 733static int sisfb_set_par(struct fb_info *info);
863static int sisfb_blank(int blank, 734static int sisfb_blank(int blank,
864 struct fb_info *info); 735 struct fb_info *info);
865extern void fbcon_sis_fillrect(struct fb_info *info, 736extern void fbcon_sis_fillrect(struct fb_info *info,
866 const struct fb_fillrect *rect); 737 const struct fb_fillrect *rect);
867extern void fbcon_sis_copyarea(struct fb_info *info, 738extern void fbcon_sis_copyarea(struct fb_info *info,
868 const struct fb_copyarea *area); 739 const struct fb_copyarea *area);
869extern int fbcon_sis_sync(struct fb_info *info); 740extern int fbcon_sis_sync(struct fb_info *info);
870#endif 741#endif
871 742
872/* Internal 2D accelerator functions */ 743/* Internal 2D accelerator functions */
873extern int sisfb_initaccel(struct sis_video_info *ivideo); 744extern int sisfb_initaccel(struct sis_video_info *ivideo);
874extern void sisfb_syncaccel(struct sis_video_info *ivideo); 745extern void sisfb_syncaccel(struct sis_video_info *ivideo);
875 746
876/* Internal general routines */ 747/* Internal general routines */
877static void sisfb_search_mode(char *name, BOOLEAN quiet); 748static void sisfb_search_mode(char *name, BOOLEAN quiet);
878static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags); 749static int sisfb_validate_mode(struct sis_video_info *ivideo, int modeindex, u32 vbflags);
879static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate, 750static u8 sisfb_search_refresh_rate(struct sis_video_info *ivideo, unsigned int rate,
880 int index); 751 int index);
881static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green, 752static int sisfb_setcolreg(unsigned regno, unsigned red, unsigned green,
882 unsigned blue, unsigned transp, 753 unsigned blue, unsigned transp,
883 struct fb_info *fb_info); 754 struct fb_info *fb_info);
884static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive, 755static int sisfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
885 struct fb_info *info); 756 struct fb_info *info);
886static void sisfb_pre_setmode(struct sis_video_info *ivideo); 757static void sisfb_pre_setmode(struct sis_video_info *ivideo);
887static void sisfb_post_setmode(struct sis_video_info *ivideo); 758static void sisfb_post_setmode(struct sis_video_info *ivideo);
888static BOOLEAN sisfb_CheckVBRetrace(struct sis_video_info *ivideo); 759static BOOLEAN sisfb_CheckVBRetrace(struct sis_video_info *ivideo);
889static BOOLEAN sisfbcheckvretracecrt2(struct sis_video_info *ivideo); 760static BOOLEAN sisfbcheckvretracecrt2(struct sis_video_info *ivideo);
890static BOOLEAN sisfbcheckvretracecrt1(struct sis_video_info *ivideo); 761static BOOLEAN sisfbcheckvretracecrt1(struct sis_video_info *ivideo);
891static BOOLEAN sisfb_bridgeisslave(struct sis_video_info *ivideo); 762static BOOLEAN sisfb_bridgeisslave(struct sis_video_info *ivideo);
892static void sisfb_detect_VB_connect(struct sis_video_info *ivideo); 763static void sisfb_detect_VB_connect(struct sis_video_info *ivideo);
893static void sisfb_get_VB_type(struct sis_video_info *ivideo); 764static void sisfb_get_VB_type(struct sis_video_info *ivideo);
894static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val); 765static void sisfb_set_TVxposoffset(struct sis_video_info *ivideo, int val);
895static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val); 766static void sisfb_set_TVyposoffset(struct sis_video_info *ivideo, int val);
767#ifdef CONFIG_FB_SIS_300
768unsigned int sisfb_read_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg);
769void sisfb_write_nbridge_pci_dword(struct SiS_Private *SiS_Pr, int reg, unsigned int val);
770unsigned int sisfb_read_lpc_pci_dword(struct SiS_Private *SiS_Pr, int reg);
771#endif
772#ifdef CONFIG_FB_SIS_315
773void sisfb_write_nbridge_pci_byte(struct SiS_Private *SiS_Pr, int reg, unsigned char val);
774unsigned int sisfb_read_mio_pci_word(struct SiS_Private *SiS_Pr, int reg);
775#endif
896 776
897/* SiS-specific exported functions */ 777/* SiS-specific exported functions */
898void sis_malloc(struct sis_memreq *req); 778void sis_malloc(struct sis_memreq *req);
899void sis_free(u32 base); 779void sis_malloc_new(struct pci_dev *pdev, struct sis_memreq *req);
780void sis_free(u32 base);
781void sis_free_new(struct pci_dev *pdev, u32 base);
900 782
901/* Internal heap routines */ 783/* Internal heap routines */
902static int sisfb_heap_init(struct sis_video_info *ivideo); 784static int sisfb_heap_init(struct sis_video_info *ivideo);
903static SIS_OH *sisfb_poh_new_node(void); 785static struct SIS_OH * sisfb_poh_new_node(struct SIS_HEAP *memheap);
904static SIS_OH *sisfb_poh_allocate(u32 size); 786static struct SIS_OH * sisfb_poh_allocate(struct SIS_HEAP *memheap, u32 size);
905static void sisfb_delete_node(SIS_OH *poh); 787static void sisfb_delete_node(struct SIS_OH *poh);
906static void sisfb_insert_node(SIS_OH *pohList, SIS_OH *poh); 788static void sisfb_insert_node(struct SIS_OH *pohList, struct SIS_OH *poh);
907static SIS_OH *sisfb_poh_free(u32 base); 789static struct SIS_OH * sisfb_poh_free(struct SIS_HEAP *memheap, u32 base);
908static void sisfb_free_node(SIS_OH *poh); 790static void sisfb_free_node(struct SIS_HEAP *memheap, struct SIS_OH *poh);
909
910/* Sensing routines */
911static void SiS_Sense30x(struct sis_video_info *ivideo);
912static void SiS_SenseCh(struct sis_video_info *ivideo);
913 791
914/* Routines from init.c/init301.c */ 792/* Routines from init.c/init301.c */
915extern USHORT SiS_GetModeID_LCD(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth, 793extern unsigned short SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay,
916 BOOLEAN FSTN, USHORT CustomT, int LCDwith, int LCDheight); 794 int VDisplay, int Depth, BOOLEAN FSTN, unsigned short CustomT,
917extern USHORT SiS_GetModeID_TV(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth); 795 int LCDwith, int LCDheight, unsigned int VBFlags2);
918extern USHORT SiS_GetModeID_VGA2(int VGAEngine, ULONG VBFlags, int HDisplay, int VDisplay, int Depth); 796extern unsigned short SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay,
919 797 int VDisplay, int Depth, unsigned int VBFlags2);
920extern void SiSRegInit(SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr); 798extern unsigned short SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay,
921extern BOOLEAN SiSSetMode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo, USHORT ModeNo); 799 int VDisplay, int Depth, unsigned int VBFlags2);
922extern void SiS_SetEnableDstn(SiS_Private *SiS_Pr, int enable); 800extern void SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr);
923extern void SiS_SetEnableFstn(SiS_Private *SiS_Pr, int enable); 801extern BOOLEAN SiSSetMode(struct SiS_Private *SiS_Pr, unsigned short ModeNo);
924 802extern void SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable);
925extern BOOLEAN SiSDetermineROMLayout661(SiS_Private *SiS_Pr, PSIS_HW_INFO HwInfo); 803extern void SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable);
926 804
927extern BOOLEAN sisfb_gettotalfrommode(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension, 805extern BOOLEAN SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr);
928 unsigned char modeno, int *htotal, int *vtotal, unsigned char rateindex); 806
807extern BOOLEAN sisfb_gettotalfrommode(struct SiS_Private *SiS_Pr, unsigned char modeno,
808 int *htotal, int *vtotal, unsigned char rateindex);
929#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 809#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
930extern int sisfb_mode_rate_to_dclock(SiS_Private *SiS_Pr, 810extern int sisfb_mode_rate_to_dclock(struct SiS_Private *SiS_Pr,
931 PSIS_HW_INFO HwDeviceExtension, 811 unsigned char modeno, unsigned char rateindex);
932 unsigned char modeno, unsigned char rateindex); 812extern int sisfb_mode_rate_to_ddata(struct SiS_Private *SiS_Pr, unsigned char modeno,
933extern int sisfb_mode_rate_to_ddata(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceExtension, 813 unsigned char rateindex, struct fb_var_screeninfo *var);
934 unsigned char modeno, unsigned char rateindex, 814#endif
935 struct fb_var_screeninfo *var); 815#if LINUX_VERSION_CODE < KERNEL_VERSION(2,5,0)
816extern void SiS_Generic_ConvertCRData(struct SiS_Private *SiS_Pr, unsigned char *crdata, int xres,
817 int yres, struct fb_var_screeninfo *var, BOOLEAN writeres);
936#endif 818#endif
937 819
938/* Chrontel TV, DDC and DPMS functions */ 820/* Chrontel TV, DDC and DPMS functions */
939extern USHORT SiS_GetCH700x(SiS_Private *SiS_Pr, USHORT tempbx); 821extern unsigned short SiS_GetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg);
940extern void SiS_SetCH700x(SiS_Private *SiS_Pr, USHORT tempbx); 822extern void SiS_SetCH700x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
941extern USHORT SiS_GetCH701x(SiS_Private *SiS_Pr, USHORT tempbx); 823extern unsigned short SiS_GetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg);
942extern void SiS_SetCH701x(SiS_Private *SiS_Pr, USHORT tempbx); 824extern void SiS_SetCH701x(struct SiS_Private *SiS_Pr, unsigned short reg, unsigned char val);
943extern void SiS_SetCH70xxANDOR(SiS_Private *SiS_Pr, USHORT tempax,USHORT tempbh); 825extern void SiS_SetCH70xxANDOR(struct SiS_Private *SiS_Pr, unsigned short reg,
944extern void SiS_DDC2Delay(SiS_Private *SiS_Pr, USHORT delaytime); 826 unsigned char myor, unsigned char myand);
945extern void SiS_SetChrontelGPIO(SiS_Private *SiS_Pr, USHORT myvbinfo); 827extern void SiS_DDC2Delay(struct SiS_Private *SiS_Pr, unsigned int delaytime);
946extern USHORT SiS_HandleDDC(SiS_Private *SiS_Pr, ULONG VBFlags, int VGAEngine, 828extern void SiS_SetChrontelGPIO(struct SiS_Private *SiS_Pr, unsigned short myvbinfo);
947 USHORT adaptnum, USHORT DDCdatatype, unsigned char *buffer); 829extern unsigned short SiS_HandleDDC(struct SiS_Private *SiS_Pr, unsigned int VBFlags, int VGAEngine,
948extern USHORT SiS_ReadDDC1Bit(SiS_Private *SiS_Pr); 830 unsigned short adaptnum, unsigned short DDCdatatype, unsigned char *buffer,
949extern void SiS_Chrontel701xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo); 831 unsigned int VBFlags2);
950extern void SiS_Chrontel701xBLOff(SiS_Private *SiS_Pr); 832extern unsigned short SiS_ReadDDC1Bit(struct SiS_Private *SiS_Pr);
951extern void SiS_SiS30xBLOn(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo); 833#ifdef CONFIG_FB_SIS_315
952extern void SiS_SiS30xBLOff(SiS_Private *SiS_Pr, PSIS_HW_INFO HwDeviceInfo); 834extern void SiS_Chrontel701xBLOn(struct SiS_Private *SiS_Pr);
835extern void SiS_Chrontel701xBLOff(struct SiS_Private *SiS_Pr);
836#endif
837extern void SiS_SiS30xBLOn(struct SiS_Private *SiS_Pr);
838extern void SiS_SiS30xBLOff(struct SiS_Private *SiS_Pr);
953#endif 839#endif
954 840
955 841
diff --git a/drivers/video/sis/vgatypes.h b/drivers/video/sis/vgatypes.h
index 507bba1a71b5..831b9f42264b 100644
--- a/drivers/video/sis/vgatypes.h
+++ b/drivers/video/sis/vgatypes.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * General type definitions for universal mode switching modules 4 * General type definitions for universal mode switching modules
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,11 +50,10 @@
50 * 50 *
51 */ 51 */
52 52
53#ifndef _VGATYPES_ 53#ifndef _VGATYPES_H_
54#define _VGATYPES_ 54#define _VGATYPES_H_
55 55
56#ifdef LINUX_KERNEL /* We don't want the X driver to depend on kernel source */ 56#ifdef SIS_LINUX_KERNEL
57#include <linux/ioctl.h>
58#include <linux/version.h> 57#include <linux/version.h>
59#endif 58#endif
60 59
@@ -66,41 +65,13 @@
66#define TRUE 1 65#define TRUE 1
67#endif 66#endif
68 67
69#ifndef NULL
70#define NULL 0
71#endif
72
73#ifndef CHAR
74typedef char CHAR;
75#endif
76
77#ifndef SHORT
78typedef short SHORT;
79#endif
80
81#ifndef LONG
82typedef long LONG;
83#endif
84
85#ifndef UCHAR
86typedef unsigned char UCHAR;
87#endif
88
89#ifndef USHORT
90typedef unsigned short USHORT;
91#endif
92
93#ifndef ULONG
94typedef unsigned long ULONG;
95#endif
96
97#ifndef BOOLEAN 68#ifndef BOOLEAN
98typedef unsigned char BOOLEAN; 69typedef unsigned int BOOLEAN;
99#endif 70#endif
100 71
101#define SISIOMEMTYPE 72#define SISIOMEMTYPE
102 73
103#ifdef LINUX_KERNEL 74#ifdef SIS_LINUX_KERNEL
104typedef unsigned long SISIOADDRESS; 75typedef unsigned long SISIOADDRESS;
105#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8) 76#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
106#include <linux/types.h> /* Need __iomem */ 77#include <linux/types.h> /* Need __iomem */
@@ -109,7 +80,7 @@ typedef unsigned long SISIOADDRESS;
109#endif 80#endif
110#endif 81#endif
111 82
112#ifdef LINUX_XF86 83#ifdef SIS_XORG_XF86
113#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,0,0,0) 84#if XF86_VERSION_CURRENT < XF86_VERSION_NUMERIC(4,2,0,0,0)
114typedef unsigned long IOADDRESS; 85typedef unsigned long IOADDRESS;
115typedef unsigned long SISIOADDRESS; 86typedef unsigned long SISIOADDRESS;
@@ -118,7 +89,7 @@ typedef IOADDRESS SISIOADDRESS;
118#endif 89#endif
119#endif 90#endif
120 91
121enum _SIS_CHIP_TYPE { 92typedef enum _SIS_CHIP_TYPE {
122 SIS_VGALegacy = 0, 93 SIS_VGALegacy = 0,
123 SIS_530, 94 SIS_530,
124 SIS_OLD, 95 SIS_OLD,
@@ -128,115 +99,27 @@ enum _SIS_CHIP_TYPE {
128 SIS_540, 99 SIS_540,
129 SIS_315H, /* SiS 310 */ 100 SIS_315H, /* SiS 310 */
130 SIS_315, 101 SIS_315,
131 SIS_315PRO, 102 SIS_315PRO, /* SiS 325 */
132 SIS_550, 103 SIS_550,
133 SIS_650, 104 SIS_650,
134 SIS_740, 105 SIS_740,
135 SIS_330, 106 SIS_330,
136 SIS_661, 107 SIS_661,
137 SIS_741, 108 SIS_741,
138 SIS_660, 109 SIS_670,
110 SIS_660 = 35,
139 SIS_760, 111 SIS_760,
140 SIS_761, 112 SIS_761,
141 SIS_340, 113 SIS_762,
114 SIS_770,
115 SIS_340 = 55,
116 SIS_341,
117 SIS_342,
118 XGI_20 = 75,
119 XGI_40,
142 MAX_SIS_CHIP 120 MAX_SIS_CHIP
143}; 121} SIS_CHIP_TYPE;
144
145#ifndef SIS_HW_INFO
146typedef struct _SIS_HW_INFO SIS_HW_INFO, *PSIS_HW_INFO;
147
148struct _SIS_HW_INFO
149{
150#ifdef LINUX_XF86
151 PCITAG PciTag; /* PCI Tag */
152#endif
153
154 UCHAR *pjVirtualRomBase; /* ROM image */
155
156 BOOLEAN UseROM; /* Use the ROM image if provided */
157
158#ifdef LINUX_KERNEL
159 UCHAR SISIOMEMTYPE *pjVideoMemoryAddress;
160 /* base virtual memory address */
161 /* of Linear VGA memory */
162
163 ULONG ulVideoMemorySize; /* size, in bytes, of the memory on the board */
164#endif
165
166 SISIOADDRESS ulIOAddress; /* base I/O address of VGA ports (0x3B0; relocated) */
167
168 UCHAR jChipType; /* Used to Identify SiS Graphics Chip */
169 /* defined in the enum "SIS_CHIP_TYPE" (above or sisfb.h) */
170 122
171 UCHAR jChipRevision; /* Used to Identify SiS Graphics Chip Revision */
172
173 BOOLEAN bIntegratedMMEnabled;/* supporting integration MM enable */
174};
175#endif
176
177/* Addtional IOCTLs for communication sisfb <> X driver */
178/* If changing this, sisfb.h must also be changed (for sisfb) */
179
180#ifdef LINUX_XF86 /* We don't want the X driver to depend on the kernel source */
181
182/* ioctl for identifying and giving some info (esp. memory heap start) */
183#define SISFB_GET_INFO_SIZE 0x8004f300
184#define SISFB_GET_INFO 0x8000f301 /* Must be patched with result from ..._SIZE at D[29:16] */
185/* deprecated ioctl number (for older versions of sisfb) */
186#define SISFB_GET_INFO_OLD 0x80046ef8
187
188/* ioctls for tv parameters (position) */
189#define SISFB_SET_TVPOSOFFSET 0x4004f304
190
191/* lock sisfb from register access */
192#define SISFB_SET_LOCK 0x4004f306
193
194/* Structure argument for SISFB_GET_INFO ioctl */
195typedef struct _SISFB_INFO sisfb_info, *psisfb_info;
196
197struct _SISFB_INFO {
198 CARD32 sisfb_id; /* for identifying sisfb */
199#ifndef SISFB_ID
200#define SISFB_ID 0x53495346 /* Identify myself with 'SISF' */
201#endif
202 CARD32 chip_id; /* PCI ID of detected chip */
203 CARD32 memory; /* video memory in KB which sisfb manages */
204 CARD32 heapstart; /* heap start (= sisfb "mem" argument) in KB */
205 CARD8 fbvidmode; /* current sisfb mode */
206
207 CARD8 sisfb_version;
208 CARD8 sisfb_revision;
209 CARD8 sisfb_patchlevel;
210
211 CARD8 sisfb_caps; /* sisfb's capabilities */
212
213 CARD32 sisfb_tqlen; /* turbo queue length (in KB) */
214
215 CARD32 sisfb_pcibus; /* The card's PCI ID */
216 CARD32 sisfb_pcislot;
217 CARD32 sisfb_pcifunc;
218
219 CARD8 sisfb_lcdpdc;
220
221 CARD8 sisfb_lcda;
222
223 CARD32 sisfb_vbflags;
224 CARD32 sisfb_currentvbflags;
225
226 CARD32 sisfb_scalelcd;
227 CARD32 sisfb_specialtiming;
228
229 CARD8 sisfb_haveemi;
230 CARD8 sisfb_emi30,sisfb_emi31,sisfb_emi32,sisfb_emi33;
231 CARD8 sisfb_haveemilcd;
232
233 CARD8 sisfb_lcdpdca;
234
235 CARD16 sisfb_tvxpos, sisfb_tvypos; /* Warning: Values + 32 ! */
236
237 CARD8 reserved[208]; /* for future use */
238};
239#endif
240 123
241#endif 124#endif
242 125
diff --git a/drivers/video/sis/vstruct.h b/drivers/video/sis/vstruct.h
index d4d55c98bce6..9ae32923c142 100644
--- a/drivers/video/sis/vstruct.h
+++ b/drivers/video/sis/vstruct.h
@@ -3,7 +3,7 @@
3/* 3/*
4 * General structure definitions for universal mode switching modules 4 * General structure definitions for universal mode switching modules
5 * 5 *
6 * Copyright (C) 2001-2004 by Thomas Winischhofer, Vienna, Austria 6 * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
7 * 7 *
8 * If distributed as part of the Linux kernel, the following license terms 8 * If distributed as part of the Linux kernel, the following license terms
9 * apply: 9 * apply:
@@ -50,627 +50,514 @@
50 * 50 *
51 */ 51 */
52 52
53#ifndef _VSTRUCT_ 53#ifndef _VSTRUCT_H_
54#define _VSTRUCT_ 54#define _VSTRUCT_H_
55 55
56typedef struct _SiS_PanelDelayTblStruct 56struct SiS_PanelDelayTbl {
57{ 57 unsigned char timer[2];
58 UCHAR timer[2]; 58};
59} SiS_PanelDelayTblStruct; 59
60 60struct SiS_LCDData {
61typedef struct _SiS_LCDDataStruct 61 unsigned short RVBHCMAX;
62{ 62 unsigned short RVBHCFACT;
63 USHORT RVBHCMAX; 63 unsigned short VGAHT;
64 USHORT RVBHCFACT; 64 unsigned short VGAVT;
65 USHORT VGAHT; 65 unsigned short LCDHT;
66 USHORT VGAVT; 66 unsigned short LCDVT;
67 USHORT LCDHT; 67};
68 USHORT LCDVT; 68
69} SiS_LCDDataStruct; 69struct SiS_TVData {
70 70 unsigned short RVBHCMAX;
71typedef struct _SiS_TVDataStruct 71 unsigned short RVBHCFACT;
72{ 72 unsigned short VGAHT;
73 USHORT RVBHCMAX; 73 unsigned short VGAVT;
74 USHORT RVBHCFACT; 74 unsigned short TVHDE;
75 USHORT VGAHT; 75 unsigned short TVVDE;
76 USHORT VGAVT; 76 unsigned short RVBHRS;
77 USHORT TVHDE; 77 unsigned char FlickerMode;
78 USHORT TVVDE; 78 unsigned short HALFRVBHRS;
79 USHORT RVBHRS; 79 unsigned short RVBHRS2;
80 UCHAR FlickerMode; 80 unsigned char RY1COE;
81 USHORT HALFRVBHRS; 81 unsigned char RY2COE;
82 UCHAR RY1COE; 82 unsigned char RY3COE;
83 UCHAR RY2COE; 83 unsigned char RY4COE;
84 UCHAR RY3COE; 84};
85 UCHAR RY4COE; 85
86} SiS_TVDataStruct; 86struct SiS_LVDSData {
87 87 unsigned short VGAHT;
88typedef struct _SiS_LVDSDataStruct 88 unsigned short VGAVT;
89{ 89 unsigned short LCDHT;
90 USHORT VGAHT; 90 unsigned short LCDVT;
91 USHORT VGAVT; 91};
92 USHORT LCDHT; 92
93 USHORT LCDVT; 93struct SiS_LVDSDes {
94} SiS_LVDSDataStruct; 94 unsigned short LCDHDES;
95 95 unsigned short LCDVDES;
96typedef struct _SiS_LVDSDesStruct 96};
97{ 97
98 USHORT LCDHDES; 98struct SiS_LVDSCRT1Data {
99 USHORT LCDVDES; 99 unsigned char CR[15];
100} SiS_LVDSDesStruct; 100};
101 101
102typedef struct _SiS_LVDSCRT1DataStruct 102struct SiS_CHTVRegData {
103{ 103 unsigned char Reg[16];
104 UCHAR CR[15]; 104};
105} SiS_LVDSCRT1DataStruct; 105
106 106struct SiS_St {
107typedef struct _SiS_LCDACRT1DataStruct 107 unsigned char St_ModeID;
108{ 108 unsigned short St_ModeFlag;
109 UCHAR CR[17]; 109 unsigned char St_StTableIndex;
110} SiS_LCDACRT1DataStruct; 110 unsigned char St_CRT2CRTC;
111 111 unsigned char St_ResInfo;
112typedef struct _SiS_CHTVRegDataStruct 112 unsigned char VB_StTVFlickerIndex;
113{ 113 unsigned char VB_StTVEdgeIndex;
114 UCHAR Reg[16]; 114 unsigned char VB_StTVYFilterIndex;
115} SiS_CHTVRegDataStruct; 115 unsigned char St_PDC;
116 116};
117typedef struct _SiS_StStruct 117
118{ 118struct SiS_VBMode {
119 UCHAR St_ModeID; 119 unsigned char ModeID;
120 USHORT St_ModeFlag; 120 unsigned char VB_TVDelayIndex;
121 UCHAR St_StTableIndex; 121 unsigned char VB_TVFlickerIndex;
122 UCHAR St_CRT2CRTC; 122 unsigned char VB_TVPhaseIndex;
123 UCHAR St_ResInfo; 123 unsigned char VB_TVYFilterIndex;
124 UCHAR VB_StTVFlickerIndex; 124 unsigned char VB_LCDDelayIndex;
125 UCHAR VB_StTVEdgeIndex; 125 unsigned char _VB_LCDHIndex;
126 UCHAR VB_StTVYFilterIndex; 126 unsigned char _VB_LCDVIndex;
127 UCHAR St_PDC; 127};
128} SiS_StStruct; 128
129 129struct SiS_StandTable_S {
130typedef struct _SiS_VBModeStruct 130 unsigned char CRT_COLS;
131{ 131 unsigned char ROWS;
132 UCHAR ModeID; 132 unsigned char CHAR_HEIGHT;
133 UCHAR VB_TVDelayIndex; 133 unsigned short CRT_LEN;
134 UCHAR VB_TVFlickerIndex; 134 unsigned char SR[4];
135 UCHAR VB_TVPhaseIndex; 135 unsigned char MISC;
136 UCHAR VB_TVYFilterIndex; 136 unsigned char CRTC[0x19];
137 UCHAR VB_LCDDelayIndex; 137 unsigned char ATTR[0x14];
138 UCHAR _VB_LCDHIndex; 138 unsigned char GRC[9];
139 UCHAR _VB_LCDVIndex; 139};
140} SiS_VBModeStruct; 140
141 141struct SiS_Ext {
142typedef struct _SiS_StandTableStruct 142 unsigned char Ext_ModeID;
143{ 143 unsigned short Ext_ModeFlag;
144 UCHAR CRT_COLS; 144 unsigned short Ext_VESAID;
145 UCHAR ROWS; 145 unsigned char Ext_RESINFO;
146 UCHAR CHAR_HEIGHT; 146 unsigned char VB_ExtTVFlickerIndex;
147 USHORT CRT_LEN; 147 unsigned char VB_ExtTVEdgeIndex;
148 UCHAR SR[4]; 148 unsigned char VB_ExtTVYFilterIndex;
149 UCHAR MISC; 149 unsigned char VB_ExtTVYFilterIndexROM661;
150 UCHAR CRTC[0x19]; 150 unsigned char REFindex;
151 UCHAR ATTR[0x14]; 151 char ROMMODEIDX661;
152 UCHAR GRC[9]; 152};
153} SiS_StandTableStruct; 153
154 154struct SiS_Ext2 {
155typedef struct _SiS_ExtStruct 155 unsigned short Ext_InfoFlag;
156{ 156 unsigned char Ext_CRT1CRTC;
157 UCHAR Ext_ModeID; 157 unsigned char Ext_CRTVCLK;
158 USHORT Ext_ModeFlag; 158 unsigned char Ext_CRT2CRTC;
159 USHORT Ext_VESAID; 159 unsigned char Ext_CRT2CRTC_NS;
160 UCHAR Ext_RESINFO; 160 unsigned char ModeID;
161 UCHAR VB_ExtTVFlickerIndex; 161 unsigned short XRes;
162 UCHAR VB_ExtTVEdgeIndex; 162 unsigned short YRes;
163 UCHAR VB_ExtTVYFilterIndex; 163 unsigned char Ext_PDC;
164 UCHAR VB_ExtTVYFilterIndexROM661; 164 unsigned char Ext_FakeCRT2CRTC;
165 UCHAR REFindex; 165 unsigned char Ext_FakeCRT2Clk;
166 CHAR ROMMODEIDX661; 166 unsigned char Ext_CRT1CRTC_NORM;
167} SiS_ExtStruct; 167 unsigned char Ext_CRTVCLK_NORM;
168 168 unsigned char Ext_CRT1CRTC_WIDE;
169typedef struct _SiS_Ext2Struct 169 unsigned char Ext_CRTVCLK_WIDE;
170{ 170};
171 USHORT Ext_InfoFlag; 171
172 UCHAR Ext_CRT1CRTC; 172struct SiS_Part2PortTbl {
173 UCHAR Ext_CRTVCLK; 173 unsigned char CR[12];
174 UCHAR Ext_CRT2CRTC; 174};
175 UCHAR Ext_CRT2CRTC_NS; 175
176 UCHAR ModeID; 176struct SiS_CRT1Table {
177 USHORT XRes; 177 unsigned char CR[17];
178 USHORT YRes; 178};
179 UCHAR Ext_PDC; 179
180} SiS_Ext2Struct; 180struct SiS_MCLKData {
181 181 unsigned char SR28,SR29,SR2A;
182typedef struct _SiS_Part2PortTblStruct 182 unsigned short CLOCK;
183{ 183};
184 UCHAR CR[12]; 184
185} SiS_Part2PortTblStruct; 185struct SiS_VCLKData {
186 186 unsigned char SR2B,SR2C;
187typedef struct _SiS_CRT1TableStruct 187 unsigned short CLOCK;
188{ 188};
189 UCHAR CR[17]; 189
190} SiS_CRT1TableStruct; 190struct SiS_VBVCLKData {
191 191 unsigned char Part4_A,Part4_B;
192typedef struct _SiS_MCLKDataStruct 192 unsigned short CLOCK;
193{ 193};
194 UCHAR SR28,SR29,SR2A; 194
195 USHORT CLOCK; 195struct SiS_StResInfo_S {
196} SiS_MCLKDataStruct; 196 unsigned short HTotal;
197 197 unsigned short VTotal;
198typedef struct _SiS_VCLKDataStruct 198};
199{ 199
200 UCHAR SR2B,SR2C; 200struct SiS_ModeResInfo_S {
201 USHORT CLOCK; 201 unsigned short HTotal;
202} SiS_VCLKDataStruct; 202 unsigned short VTotal;
203 203 unsigned char XChar;
204typedef struct _SiS_VBVCLKDataStruct 204 unsigned char YChar;
205{ 205};
206 UCHAR Part4_A,Part4_B;
207 USHORT CLOCK;
208} SiS_VBVCLKDataStruct;
209
210typedef struct _SiS_StResInfoStruct
211{
212 USHORT HTotal;
213 USHORT VTotal;
214} SiS_StResInfoStruct;
215
216typedef struct _SiS_ModeResInfoStruct
217{
218 USHORT HTotal;
219 USHORT VTotal;
220 UCHAR XChar;
221 UCHAR YChar;
222} SiS_ModeResInfoStruct;
223
224
225
226typedef UCHAR DRAM4Type[4];
227 206
228/* Defines for SiS_CustomT */ 207/* Defines for SiS_CustomT */
229/* Never change these for sisfb compatibility */ 208/* Never change these for sisfb compatibility */
230#define CUT_NONE 0 209#define CUT_NONE 0
231#define CUT_FORCENONE 1 210#define CUT_FORCENONE 1
232#define CUT_BARCO1366 2 211#define CUT_BARCO1366 2
233#define CUT_BARCO1024 3 212#define CUT_BARCO1024 3
234#define CUT_COMPAQ1280 4 213#define CUT_COMPAQ1280 4
235#define CUT_COMPAQ12802 5 214#define CUT_COMPAQ12802 5
236#define CUT_PANEL848 6 215#define CUT_PANEL848 6
237#define CUT_CLEVO1024 7 216#define CUT_CLEVO1024 7
238#define CUT_CLEVO10242 8 217#define CUT_CLEVO10242 8
239#define CUT_CLEVO1400 9 218#define CUT_CLEVO1400 9
240#define CUT_CLEVO14002 10 219#define CUT_CLEVO14002 10
241#define CUT_UNIWILL1024 11 220#define CUT_UNIWILL1024 11
242#define CUT_ASUSL3000D 12 221#define CUT_ASUSL3000D 12
243#define CUT_UNIWILL10242 13 222#define CUT_UNIWILL10242 13
244#define CUT_ACER1280 14 223#define CUT_ACER1280 14
245#define CUT_COMPAL1400_1 15 224#define CUT_COMPAL1400_1 15
246#define CUT_COMPAL1400_2 16 225#define CUT_COMPAL1400_2 16
247#define CUT_ASUSA2H_1 17 226#define CUT_ASUSA2H_1 17
248#define CUT_ASUSA2H_2 18 227#define CUT_ASUSA2H_2 18
249 228#define CUT_UNKNOWNLCD 19
250typedef struct _SiS_Private 229#define CUT_AOP8060 20
230#define CUT_PANEL856 21
231
232struct SiS_Private
251{ 233{
252#ifdef LINUX_KERNEL 234 unsigned char ChipType;
253 SISIOADDRESS RelIO; 235 unsigned char ChipRevision;
236#ifdef SIS_XORG_XF86
237 PCITAG PciTag;
254#endif 238#endif
255 SISIOADDRESS SiS_P3c4; 239#ifdef SIS_LINUX_KERNEL
256 SISIOADDRESS SiS_P3d4; 240 void *ivideo;
257 SISIOADDRESS SiS_P3c0;
258 SISIOADDRESS SiS_P3ce;
259 SISIOADDRESS SiS_P3c2;
260 SISIOADDRESS SiS_P3ca;
261 SISIOADDRESS SiS_P3c6;
262 SISIOADDRESS SiS_P3c7;
263 SISIOADDRESS SiS_P3c8;
264 SISIOADDRESS SiS_P3c9;
265 SISIOADDRESS SiS_P3cb;
266 SISIOADDRESS SiS_P3cd;
267 SISIOADDRESS SiS_P3da;
268 SISIOADDRESS SiS_Part1Port;
269 SISIOADDRESS SiS_Part2Port;
270 SISIOADDRESS SiS_Part3Port;
271 SISIOADDRESS SiS_Part4Port;
272 SISIOADDRESS SiS_Part5Port;
273 SISIOADDRESS SiS_VidCapt;
274 SISIOADDRESS SiS_VidPlay;
275 USHORT SiS_IF_DEF_LVDS;
276 USHORT SiS_IF_DEF_CH70xx;
277 USHORT SiS_IF_DEF_CONEX;
278 USHORT SiS_IF_DEF_TRUMPION;
279 USHORT SiS_IF_DEF_DSTN;
280 USHORT SiS_IF_DEF_FSTN;
281 USHORT SiS_SysFlags;
282 UCHAR SiS_VGAINFO;
283#ifdef LINUX_XF86
284 USHORT SiS_CP1, SiS_CP2, SiS_CP3, SiS_CP4;
285#endif 241#endif
286 BOOLEAN SiS_UseROM; 242 unsigned char *VirtualRomBase;
287 BOOLEAN SiS_ROMNew; 243 BOOLEAN UseROM;
288 BOOLEAN SiS_NeedRomModeData; 244#ifdef SIS_LINUX_KERNEL
289 BOOLEAN PanelSelfDetected; 245 unsigned char SISIOMEMTYPE *VideoMemoryAddress;
290 int SiS_CHOverScan; 246 unsigned int VideoMemorySize;
291 BOOLEAN SiS_CHSOverScan;
292 BOOLEAN SiS_ChSW;
293 BOOLEAN SiS_UseLCDA;
294 int SiS_UseOEM;
295 ULONG SiS_CustomT;
296 USHORT SiS_Backup70xx;
297 BOOLEAN HaveEMI;
298 BOOLEAN HaveEMILCD;
299 BOOLEAN OverruleEMI;
300 UCHAR EMI_30,EMI_31,EMI_32,EMI_33;
301 USHORT SiS_EMIOffset;
302 SHORT PDC, PDCA;
303 UCHAR SiS_MyCR63;
304 USHORT SiS_CRT1Mode;
305 USHORT SiS_flag_clearbuffer;
306 int SiS_RAMType;
307 UCHAR SiS_ChannelAB;
308 UCHAR SiS_DataBusWidth;
309 USHORT SiS_ModeType;
310 USHORT SiS_VBInfo;
311 USHORT SiS_TVMode;
312 USHORT SiS_LCDResInfo;
313 USHORT SiS_LCDTypeInfo;
314 USHORT SiS_LCDInfo;
315 USHORT SiS_LCDInfo661;
316 USHORT SiS_VBType;
317 USHORT SiS_VBExtInfo;
318 USHORT SiS_YPbPr;
319 USHORT SiS_SelectCRT2Rate;
320 USHORT SiS_SetFlag;
321 USHORT SiS_RVBHCFACT;
322 USHORT SiS_RVBHCMAX;
323 USHORT SiS_RVBHRS;
324 USHORT SiS_VGAVT;
325 USHORT SiS_VGAHT;
326 USHORT SiS_VT;
327 USHORT SiS_HT;
328 USHORT SiS_VGAVDE;
329 USHORT SiS_VGAHDE;
330 USHORT SiS_VDE;
331 USHORT SiS_HDE;
332 USHORT SiS_NewFlickerMode;
333 USHORT SiS_RY1COE;
334 USHORT SiS_RY2COE;
335 USHORT SiS_RY3COE;
336 USHORT SiS_RY4COE;
337 USHORT SiS_LCDHDES;
338 USHORT SiS_LCDVDES;
339 USHORT SiS_DDC_Port;
340 USHORT SiS_DDC_Index;
341 USHORT SiS_DDC_Data;
342 USHORT SiS_DDC_NData;
343 USHORT SiS_DDC_Clk;
344 USHORT SiS_DDC_NClk;
345 USHORT SiS_DDC_DeviceAddr;
346 USHORT SiS_DDC_ReadAddr;
347 USHORT SiS_DDC_SecAddr;
348 USHORT SiS_ChrontelInit;
349 BOOLEAN SiS_SensibleSR11;
350 USHORT SiS661LCD2TableSize;
351
352 USHORT SiS_PanelMinLVDS;
353 USHORT SiS_PanelMin301;
354
355 const SiS_StStruct *SiS_SModeIDTable;
356 const SiS_StandTableStruct *SiS_StandTable;
357 const SiS_ExtStruct *SiS_EModeIDTable;
358 const SiS_Ext2Struct *SiS_RefIndex;
359 const SiS_VBModeStruct *SiS_VBModeIDTable;
360 const SiS_CRT1TableStruct *SiS_CRT1Table;
361 const SiS_MCLKDataStruct *SiS_MCLKData_0;
362 const SiS_MCLKDataStruct *SiS_MCLKData_1;
363 SiS_VCLKDataStruct *SiS_VCLKData;
364 SiS_VBVCLKDataStruct *SiS_VBVCLKData;
365 const SiS_StResInfoStruct *SiS_StResInfo;
366 const SiS_ModeResInfoStruct *SiS_ModeResInfo;
367
368 const UCHAR *pSiS_OutputSelect;
369 const UCHAR *pSiS_SoftSetting;
370
371 const DRAM4Type *SiS_SR15; /* pointer : point to array */
372#ifdef LINUX_KERNEL
373 UCHAR *pSiS_SR07;
374 const DRAM4Type *SiS_CR40; /* pointer : point to array */
375 UCHAR *SiS_CR49;
376 UCHAR *SiS_SR25;
377 UCHAR *pSiS_SR1F;
378 UCHAR *pSiS_SR21;
379 UCHAR *pSiS_SR22;
380 UCHAR *pSiS_SR23;
381 UCHAR *pSiS_SR24;
382 UCHAR *pSiS_SR31;
383 UCHAR *pSiS_SR32;
384 UCHAR *pSiS_SR33;
385 UCHAR *pSiS_CRT2Data_1_2;
386 UCHAR *pSiS_CRT2Data_4_D;
387 UCHAR *pSiS_CRT2Data_4_E;
388 UCHAR *pSiS_CRT2Data_4_10;
389 const USHORT *pSiS_RGBSenseData;
390 const USHORT *pSiS_VideoSenseData;
391 const USHORT *pSiS_YCSenseData;
392 const USHORT *pSiS_RGBSenseData2;
393 const USHORT *pSiS_VideoSenseData2;
394 const USHORT *pSiS_YCSenseData2;
395#endif 247#endif
248 SISIOADDRESS IOAddress;
249 SISIOADDRESS IOAddress2; /* For dual chip XGI volari */
396 250
397 const SiS_PanelDelayTblStruct *SiS_PanelDelayTbl; 251#ifdef SIS_LINUX_KERNEL
398 const SiS_PanelDelayTblStruct *SiS_PanelDelayTblLVDS; 252 SISIOADDRESS RelIO;
253#endif
254 SISIOADDRESS SiS_P3c4;
255 SISIOADDRESS SiS_P3d4;
256 SISIOADDRESS SiS_P3c0;
257 SISIOADDRESS SiS_P3ce;
258 SISIOADDRESS SiS_P3c2;
259 SISIOADDRESS SiS_P3ca;
260 SISIOADDRESS SiS_P3c6;
261 SISIOADDRESS SiS_P3c7;
262 SISIOADDRESS SiS_P3c8;
263 SISIOADDRESS SiS_P3c9;
264 SISIOADDRESS SiS_P3cb;
265 SISIOADDRESS SiS_P3cc;
266 SISIOADDRESS SiS_P3cd;
267 SISIOADDRESS SiS_P3da;
268 SISIOADDRESS SiS_Part1Port;
269 SISIOADDRESS SiS_Part2Port;
270 SISIOADDRESS SiS_Part3Port;
271 SISIOADDRESS SiS_Part4Port;
272 SISIOADDRESS SiS_Part5Port;
273 SISIOADDRESS SiS_VidCapt;
274 SISIOADDRESS SiS_VidPlay;
275 unsigned short SiS_IF_DEF_LVDS;
276 unsigned short SiS_IF_DEF_CH70xx;
277 unsigned short SiS_IF_DEF_CONEX;
278 unsigned short SiS_IF_DEF_TRUMPION;
279 unsigned short SiS_IF_DEF_DSTN;
280 unsigned short SiS_IF_DEF_FSTN;
281 unsigned short SiS_SysFlags;
282 unsigned char SiS_VGAINFO;
283#ifdef SIS_XORG_XF86
284 unsigned short SiS_CP1, SiS_CP2, SiS_CP3, SiS_CP4;
285#endif
286 BOOLEAN SiS_UseROM;
287 BOOLEAN SiS_ROMNew;
288 BOOLEAN SiS_XGIROM;
289 BOOLEAN SiS_NeedRomModeData;
290 BOOLEAN PanelSelfDetected;
291 BOOLEAN DDCPortMixup;
292 int SiS_CHOverScan;
293 BOOLEAN SiS_CHSOverScan;
294 BOOLEAN SiS_ChSW;
295 BOOLEAN SiS_UseLCDA;
296 int SiS_UseOEM;
297 unsigned int SiS_CustomT;
298 int SiS_UseWide, SiS_UseWideCRT2;
299 int SiS_TVBlue;
300 unsigned short SiS_Backup70xx;
301 BOOLEAN HaveEMI;
302 BOOLEAN HaveEMILCD;
303 BOOLEAN OverruleEMI;
304 unsigned char EMI_30,EMI_31,EMI_32,EMI_33;
305 unsigned short SiS_EMIOffset;
306 unsigned short SiS_PWDOffset;
307 short PDC, PDCA;
308 unsigned char SiS_MyCR63;
309 unsigned short SiS_CRT1Mode;
310 unsigned short SiS_flag_clearbuffer;
311 int SiS_RAMType;
312 unsigned char SiS_ChannelAB;
313 unsigned char SiS_DataBusWidth;
314 unsigned short SiS_ModeType;
315 unsigned short SiS_VBInfo;
316 unsigned short SiS_TVMode;
317 unsigned short SiS_LCDResInfo;
318 unsigned short SiS_LCDTypeInfo;
319 unsigned short SiS_LCDInfo;
320 unsigned short SiS_LCDInfo661;
321 unsigned short SiS_VBType;
322 unsigned short SiS_VBExtInfo;
323 unsigned short SiS_YPbPr;
324 unsigned short SiS_SelectCRT2Rate;
325 unsigned short SiS_SetFlag;
326 unsigned short SiS_RVBHCFACT;
327 unsigned short SiS_RVBHCMAX;
328 unsigned short SiS_RVBHRS;
329 unsigned short SiS_RVBHRS2;
330 unsigned short SiS_VGAVT;
331 unsigned short SiS_VGAHT;
332 unsigned short SiS_VT;
333 unsigned short SiS_HT;
334 unsigned short SiS_VGAVDE;
335 unsigned short SiS_VGAHDE;
336 unsigned short SiS_VDE;
337 unsigned short SiS_HDE;
338 unsigned short SiS_NewFlickerMode;
339 unsigned short SiS_RY1COE;
340 unsigned short SiS_RY2COE;
341 unsigned short SiS_RY3COE;
342 unsigned short SiS_RY4COE;
343 unsigned short SiS_LCDHDES;
344 unsigned short SiS_LCDVDES;
345 unsigned short SiS_DDC_Port;
346 unsigned short SiS_DDC_Index;
347 unsigned short SiS_DDC_Data;
348 unsigned short SiS_DDC_NData;
349 unsigned short SiS_DDC_Clk;
350 unsigned short SiS_DDC_NClk;
351 unsigned short SiS_DDC_DeviceAddr;
352 unsigned short SiS_DDC_ReadAddr;
353 unsigned short SiS_DDC_SecAddr;
354 unsigned short SiS_ChrontelInit;
355 BOOLEAN SiS_SensibleSR11;
356 unsigned short SiS661LCD2TableSize;
357
358 unsigned short SiS_PanelMinLVDS;
359 unsigned short SiS_PanelMin301;
360
361 const struct SiS_St *SiS_SModeIDTable;
362 const struct SiS_StandTable_S *SiS_StandTable;
363 const struct SiS_Ext *SiS_EModeIDTable;
364 const struct SiS_Ext2 *SiS_RefIndex;
365 const struct SiS_VBMode *SiS_VBModeIDTable;
366 const struct SiS_CRT1Table *SiS_CRT1Table;
367 const struct SiS_MCLKData *SiS_MCLKData_0;
368 const struct SiS_MCLKData *SiS_MCLKData_1;
369 struct SiS_VCLKData *SiS_VCLKData;
370 struct SiS_VBVCLKData *SiS_VBVCLKData;
371 const struct SiS_StResInfo_S *SiS_StResInfo;
372 const struct SiS_ModeResInfo_S *SiS_ModeResInfo;
373
374 const unsigned char *pSiS_OutputSelect;
375 const unsigned char *pSiS_SoftSetting;
376
377 const unsigned char *SiS_SR15;
378
379 const struct SiS_PanelDelayTbl *SiS_PanelDelayTbl;
380 const struct SiS_PanelDelayTbl *SiS_PanelDelayTblLVDS;
399 381
400 /* SiS bridge */ 382 /* SiS bridge */
401 383
402 const UCHAR *SiS_NTSCPhase; 384 const struct SiS_LCDData *SiS_ExtLCD1024x768Data;
403 const UCHAR *SiS_PALPhase; 385 const struct SiS_LCDData *SiS_St2LCD1024x768Data;
404 const UCHAR *SiS_NTSCPhase2; 386 const struct SiS_LCDData *SiS_LCD1280x720Data;
405 const UCHAR *SiS_PALPhase2; 387 const struct SiS_LCDData *SiS_StLCD1280x768_2Data;
406 const UCHAR *SiS_PALMPhase; 388 const struct SiS_LCDData *SiS_ExtLCD1280x768_2Data;
407 const UCHAR *SiS_PALNPhase; 389 const struct SiS_LCDData *SiS_LCD1280x800Data;
408 const UCHAR *SiS_PALMPhase2; 390 const struct SiS_LCDData *SiS_LCD1280x800_2Data;
409 const UCHAR *SiS_PALNPhase2; 391 const struct SiS_LCDData *SiS_LCD1280x854Data;
410 const UCHAR *SiS_SpecialPhase; 392 const struct SiS_LCDData *SiS_LCD1280x960Data;
411 const UCHAR *SiS_SpecialPhaseM; 393 const struct SiS_LCDData *SiS_ExtLCD1280x1024Data;
412 const UCHAR *SiS_SpecialPhaseJ; 394 const struct SiS_LCDData *SiS_St2LCD1280x1024Data;
413 const SiS_LCDDataStruct *SiS_ExtLCD1024x768Data; 395 const struct SiS_LCDData *SiS_StLCD1400x1050Data;
414 const SiS_LCDDataStruct *SiS_St2LCD1024x768Data; 396 const struct SiS_LCDData *SiS_ExtLCD1400x1050Data;
415 const SiS_LCDDataStruct *SiS_LCD1280x720Data; 397 const struct SiS_LCDData *SiS_StLCD1600x1200Data;
416 const SiS_LCDDataStruct *SiS_StLCD1280x768_2Data; 398 const struct SiS_LCDData *SiS_ExtLCD1600x1200Data;
417 const SiS_LCDDataStruct *SiS_ExtLCD1280x768_2Data; 399 const struct SiS_LCDData *SiS_LCD1680x1050Data;
418 const SiS_LCDDataStruct *SiS_LCD1280x800Data; 400 const struct SiS_LCDData *SiS_NoScaleData;
419 const SiS_LCDDataStruct *SiS_LCD1280x800_2Data; 401 const struct SiS_TVData *SiS_StPALData;
420 const SiS_LCDDataStruct *SiS_LCD1280x960Data; 402 const struct SiS_TVData *SiS_ExtPALData;
421 const SiS_LCDDataStruct *SiS_ExtLCD1280x1024Data; 403 const struct SiS_TVData *SiS_StNTSCData;
422 const SiS_LCDDataStruct *SiS_St2LCD1280x1024Data; 404 const struct SiS_TVData *SiS_ExtNTSCData;
423 const SiS_LCDDataStruct *SiS_StLCD1400x1050Data; 405 const struct SiS_TVData *SiS_St1HiTVData;
424 const SiS_LCDDataStruct *SiS_ExtLCD1400x1050Data; 406 const struct SiS_TVData *SiS_St2HiTVData;
425 const SiS_LCDDataStruct *SiS_StLCD1600x1200Data; 407 const struct SiS_TVData *SiS_ExtHiTVData;
426 const SiS_LCDDataStruct *SiS_ExtLCD1600x1200Data; 408 const struct SiS_TVData *SiS_St525iData;
427 const SiS_LCDDataStruct *SiS_LCD1680x1050Data; 409 const struct SiS_TVData *SiS_St525pData;
428 const SiS_LCDDataStruct *SiS_NoScaleData; 410 const struct SiS_TVData *SiS_St750pData;
429 const SiS_TVDataStruct *SiS_StPALData; 411 const struct SiS_TVData *SiS_Ext525iData;
430 const SiS_TVDataStruct *SiS_ExtPALData; 412 const struct SiS_TVData *SiS_Ext525pData;
431 const SiS_TVDataStruct *SiS_StNTSCData; 413 const struct SiS_TVData *SiS_Ext750pData;
432 const SiS_TVDataStruct *SiS_ExtNTSCData; 414 const unsigned char *SiS_NTSCTiming;
433 const SiS_TVDataStruct *SiS_St1HiTVData; 415 const unsigned char *SiS_PALTiming;
434 const SiS_TVDataStruct *SiS_St2HiTVData; 416 const unsigned char *SiS_HiTVExtTiming;
435 const SiS_TVDataStruct *SiS_ExtHiTVData; 417 const unsigned char *SiS_HiTVSt1Timing;
436 const SiS_TVDataStruct *SiS_St525iData; 418 const unsigned char *SiS_HiTVSt2Timing;
437 const SiS_TVDataStruct *SiS_St525pData; 419 const unsigned char *SiS_HiTVGroup3Data;
438 const SiS_TVDataStruct *SiS_St750pData; 420 const unsigned char *SiS_HiTVGroup3Simu;
439 const SiS_TVDataStruct *SiS_Ext525iData;
440 const SiS_TVDataStruct *SiS_Ext525pData;
441 const SiS_TVDataStruct *SiS_Ext750pData;
442 const UCHAR *SiS_NTSCTiming;
443 const UCHAR *SiS_PALTiming;
444 const UCHAR *SiS_HiTVExtTiming;
445 const UCHAR *SiS_HiTVSt1Timing;
446 const UCHAR *SiS_HiTVSt2Timing;
447 const UCHAR *SiS_HiTVGroup3Data;
448 const UCHAR *SiS_HiTVGroup3Simu;
449#if 0 421#if 0
450 const UCHAR *SiS_HiTVTextTiming; 422 const unsigned char *SiS_HiTVTextTiming;
451 const UCHAR *SiS_HiTVGroup3Text; 423 const unsigned char *SiS_HiTVGroup3Text;
452#endif 424#endif
453 425
454 const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_1; 426 const struct SiS_Part2PortTbl *SiS_CRT2Part2_1024x768_1;
455 const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_1; 427 const struct SiS_Part2PortTbl *SiS_CRT2Part2_1024x768_2;
456 const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_2; 428 const struct SiS_Part2PortTbl *SiS_CRT2Part2_1024x768_3;
457 const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_2;
458 const SiS_Part2PortTblStruct *SiS_CRT2Part2_1024x768_3;
459 const SiS_Part2PortTblStruct *SiS_CRT2Part2_1280x1024_3;
460 429
461 /* LVDS, Chrontel */ 430 /* LVDS, Chrontel */
462 431
463 const SiS_LVDSDataStruct *SiS_LVDS800x600Data_1; 432 const struct SiS_LVDSData *SiS_LVDS320x240Data_1;
464 const SiS_LVDSDataStruct *SiS_LVDS800x600Data_2; 433 const struct SiS_LVDSData *SiS_LVDS320x240Data_2;
465 const SiS_LVDSDataStruct *SiS_LVDS1024x768Data_1; 434 const struct SiS_LVDSData *SiS_LVDS640x480Data_1;
466 const SiS_LVDSDataStruct *SiS_LVDS1024x768Data_2; 435 const struct SiS_LVDSData *SiS_LVDS800x600Data_1;
467 const SiS_LVDSDataStruct *SiS_LVDS1280x1024Data_1; 436 const struct SiS_LVDSData *SiS_LVDS1024x600Data_1;
468 const SiS_LVDSDataStruct *SiS_LVDS1280x1024Data_2; 437 const struct SiS_LVDSData *SiS_LVDS1024x768Data_1;
469 const SiS_LVDSDataStruct *SiS_LVDS1280x960Data_1; 438 const struct SiS_LVDSData *SiS_LVDSBARCO1366Data_1;
470 const SiS_LVDSDataStruct *SiS_LVDS1280x960Data_2; 439 const struct SiS_LVDSData *SiS_LVDSBARCO1366Data_2;
471 const SiS_LVDSDataStruct *SiS_LVDS1400x1050Data_1; 440 const struct SiS_LVDSData *SiS_LVDSBARCO1024Data_1;
472 const SiS_LVDSDataStruct *SiS_LVDS1400x1050Data_2; 441 const struct SiS_LVDSData *SiS_LVDS848x480Data_1;
473 const SiS_LVDSDataStruct *SiS_LVDS1600x1200Data_1; 442 const struct SiS_LVDSData *SiS_LVDS848x480Data_2;
474 const SiS_LVDSDataStruct *SiS_LVDS1600x1200Data_2; 443 const struct SiS_LVDSData *SiS_CHTVUNTSCData;
475 const SiS_LVDSDataStruct *SiS_LVDS1280x768Data_1; 444 const struct SiS_LVDSData *SiS_CHTVONTSCData;
476 const SiS_LVDSDataStruct *SiS_LVDS1280x768Data_2; 445 const struct SiS_LVDSData *SiS_CHTVUPALData;
477 const SiS_LVDSDataStruct *SiS_LVDS1024x600Data_1; 446 const struct SiS_LVDSData *SiS_CHTVOPALData;
478 const SiS_LVDSDataStruct *SiS_LVDS1024x600Data_2; 447 const struct SiS_LVDSData *SiS_CHTVUPALMData;
479 const SiS_LVDSDataStruct *SiS_LVDS1152x768Data_1; 448 const struct SiS_LVDSData *SiS_CHTVOPALMData;
480 const SiS_LVDSDataStruct *SiS_LVDS1152x768Data_2; 449 const struct SiS_LVDSData *SiS_CHTVUPALNData;
481 const SiS_LVDSDataStruct *SiS_LVDS640x480Data_1; 450 const struct SiS_LVDSData *SiS_CHTVOPALNData;
482 const SiS_LVDSDataStruct *SiS_LVDS640x480Data_2; 451 const struct SiS_LVDSData *SiS_CHTVSOPALData;
483 const SiS_LVDSDataStruct *SiS_LVDS320x480Data_1; 452
484 const SiS_LVDSDataStruct *SiS_LVDSXXXxXXXData_1; 453 const struct SiS_LVDSDes *SiS_PanelType04_1a;
485 const SiS_LVDSDataStruct *SiS_LVDSBARCO1366Data_1; 454 const struct SiS_LVDSDes *SiS_PanelType04_2a;
486 const SiS_LVDSDataStruct *SiS_LVDSBARCO1366Data_2; 455 const struct SiS_LVDSDes *SiS_PanelType04_1b;
487 const SiS_LVDSDataStruct *SiS_LVDSBARCO1024Data_1; 456 const struct SiS_LVDSDes *SiS_PanelType04_2b;
488 const SiS_LVDSDataStruct *SiS_LVDSBARCO1024Data_2; 457
489 const SiS_LVDSDataStruct *SiS_LVDS848x480Data_1; 458 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_1;
490 const SiS_LVDSDataStruct *SiS_LVDS848x480Data_2; 459 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_2;
491 const SiS_LVDSDataStruct *SiS_CHTVUNTSCData; 460 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_2_H;
492 const SiS_LVDSDataStruct *SiS_CHTVONTSCData; 461 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_3;
493 const SiS_LVDSDataStruct *SiS_CHTVUPALData; 462 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1320x240_3_H;
494 const SiS_LVDSDataStruct *SiS_CHTVOPALData; 463 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1640x480_1;
495 const SiS_LVDSDataStruct *SiS_CHTVUPALMData; 464 const struct SiS_LVDSCRT1Data *SiS_LVDSCRT1640x480_1_H;
496 const SiS_LVDSDataStruct *SiS_CHTVOPALMData; 465 const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1UNTSC;
497 const SiS_LVDSDataStruct *SiS_CHTVUPALNData; 466 const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1ONTSC;
498 const SiS_LVDSDataStruct *SiS_CHTVOPALNData; 467 const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1UPAL;
499 const SiS_LVDSDataStruct *SiS_CHTVSOPALData; 468 const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1OPAL;
500 469 const struct SiS_LVDSCRT1Data *SiS_CHTVCRT1SOPAL;
501 const SiS_LVDSDesStruct *SiS_PanelType00_1; 470
502 const SiS_LVDSDesStruct *SiS_PanelType01_1; 471 const struct SiS_CHTVRegData *SiS_CHTVReg_UNTSC;
503 const SiS_LVDSDesStruct *SiS_PanelType02_1; 472 const struct SiS_CHTVRegData *SiS_CHTVReg_ONTSC;
504 const SiS_LVDSDesStruct *SiS_PanelType03_1; 473 const struct SiS_CHTVRegData *SiS_CHTVReg_UPAL;
505 const SiS_LVDSDesStruct *SiS_PanelType04_1; 474 const struct SiS_CHTVRegData *SiS_CHTVReg_OPAL;
506 const SiS_LVDSDesStruct *SiS_PanelType05_1; 475 const struct SiS_CHTVRegData *SiS_CHTVReg_UPALM;
507 const SiS_LVDSDesStruct *SiS_PanelType06_1; 476 const struct SiS_CHTVRegData *SiS_CHTVReg_OPALM;
508 const SiS_LVDSDesStruct *SiS_PanelType07_1; 477 const struct SiS_CHTVRegData *SiS_CHTVReg_UPALN;
509 const SiS_LVDSDesStruct *SiS_PanelType08_1; 478 const struct SiS_CHTVRegData *SiS_CHTVReg_OPALN;
510 const SiS_LVDSDesStruct *SiS_PanelType09_1; 479 const struct SiS_CHTVRegData *SiS_CHTVReg_SOPAL;
511 const SiS_LVDSDesStruct *SiS_PanelType0a_1; 480
512 const SiS_LVDSDesStruct *SiS_PanelType0b_1; 481 const unsigned char *SiS_CHTVVCLKUNTSC;
513 const SiS_LVDSDesStruct *SiS_PanelType0c_1; 482 const unsigned char *SiS_CHTVVCLKONTSC;
514 const SiS_LVDSDesStruct *SiS_PanelType0d_1; 483 const unsigned char *SiS_CHTVVCLKUPAL;
515 const SiS_LVDSDesStruct *SiS_PanelType0e_1; 484 const unsigned char *SiS_CHTVVCLKOPAL;
516 const SiS_LVDSDesStruct *SiS_PanelType0f_1; 485 const unsigned char *SiS_CHTVVCLKUPALM;
517 const SiS_LVDSDesStruct *SiS_PanelTypeNS_1; 486 const unsigned char *SiS_CHTVVCLKOPALM;
518 const SiS_LVDSDesStruct *SiS_PanelType00_2; 487 const unsigned char *SiS_CHTVVCLKUPALN;
519 const SiS_LVDSDesStruct *SiS_PanelType01_2; 488 const unsigned char *SiS_CHTVVCLKOPALN;
520 const SiS_LVDSDesStruct *SiS_PanelType02_2; 489 const unsigned char *SiS_CHTVVCLKSOPAL;
521 const SiS_LVDSDesStruct *SiS_PanelType03_2; 490
522 const SiS_LVDSDesStruct *SiS_PanelType04_2; 491 unsigned short PanelXRes, PanelHT;
523 const SiS_LVDSDesStruct *SiS_PanelType05_2; 492 unsigned short PanelYRes, PanelVT;
524 const SiS_LVDSDesStruct *SiS_PanelType06_2; 493 unsigned short PanelHRS, PanelHRE;
525 const SiS_LVDSDesStruct *SiS_PanelType07_2; 494 unsigned short PanelVRS, PanelVRE;
526 const SiS_LVDSDesStruct *SiS_PanelType08_2; 495 unsigned short PanelVCLKIdx300;
527 const SiS_LVDSDesStruct *SiS_PanelType09_2; 496 unsigned short PanelVCLKIdx315;
528 const SiS_LVDSDesStruct *SiS_PanelType0a_2; 497 BOOLEAN Alternate1600x1200;
529 const SiS_LVDSDesStruct *SiS_PanelType0b_2; 498
530 const SiS_LVDSDesStruct *SiS_PanelType0c_2; 499 BOOLEAN UseCustomMode;
531 const SiS_LVDSDesStruct *SiS_PanelType0d_2; 500 BOOLEAN CRT1UsesCustomMode;
532 const SiS_LVDSDesStruct *SiS_PanelType0e_2; 501 unsigned short CHDisplay;
533 const SiS_LVDSDesStruct *SiS_PanelType0f_2; 502 unsigned short CHSyncStart;
534 const SiS_LVDSDesStruct *SiS_PanelTypeNS_2; 503 unsigned short CHSyncEnd;
535 const SiS_LVDSDesStruct *SiS_CHTVUNTSCDesData; 504 unsigned short CHTotal;
536 const SiS_LVDSDesStruct *SiS_CHTVONTSCDesData; 505 unsigned short CHBlankStart;
537 const SiS_LVDSDesStruct *SiS_CHTVUPALDesData; 506 unsigned short CHBlankEnd;
538 const SiS_LVDSDesStruct *SiS_CHTVOPALDesData; 507 unsigned short CVDisplay;
539 508 unsigned short CVSyncStart;
540 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_1; 509 unsigned short CVSyncEnd;
541 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_1; 510 unsigned short CVTotal;
542 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_1; 511 unsigned short CVBlankStart;
543 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11400x1050_1; 512 unsigned short CVBlankEnd;
544 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x768_1; 513 unsigned int CDClock;
545 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x600_1; 514 unsigned int CFlags;
546 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11152x768_1; 515 unsigned char CCRT1CRTC[17];
547 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11600x1200_1; 516 unsigned char CSR2B;
548 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_1_H; 517 unsigned char CSR2C;
549 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_1_H; 518 unsigned short CSRClock;
550 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_1_H; 519 unsigned short CSRClock_CRT1;
551 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11400x1050_1_H; 520 unsigned short CModeFlag;
552 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x768_1_H; 521 unsigned short CModeFlag_CRT1;
553 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x600_1_H; 522 unsigned short CInfoFlag;
554 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11152x768_1_H; 523
555 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11600x1200_1_H; 524 int LVDSHL;
556 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_2; 525
557 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_2; 526 BOOLEAN Backup;
558 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_2; 527 unsigned char Backup_Mode;
559 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11400x1050_2; 528 unsigned char Backup_14;
560 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x768_2; 529 unsigned char Backup_15;
561 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x600_2; 530 unsigned char Backup_16;
562 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11152x768_2; 531 unsigned char Backup_17;
563 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11600x1200_2; 532 unsigned char Backup_18;
564 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1800x600_2_H; 533 unsigned char Backup_19;
565 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x768_2_H; 534 unsigned char Backup_1a;
566 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x1024_2_H; 535 unsigned char Backup_1b;
567 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11400x1050_2_H; 536 unsigned char Backup_1c;
568 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11280x768_2_H; 537 unsigned char Backup_1d;
569 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11024x600_2_H; 538
570 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11152x768_2_H; 539 unsigned char Init_P4_0E;
571 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT11600x1200_2_H; 540
572 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1XXXxXXX_1; 541 int UsePanelScaler;
573 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1XXXxXXX_1_H; 542 int CenterScreen;
574 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1640x480_1; 543
575 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1640x480_1_H; 544 unsigned short CP_Vendor, CP_Product;
576 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1640x480_2; 545 BOOLEAN CP_HaveCustomData;
577 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1640x480_2_H; 546 int CP_PreferredX, CP_PreferredY, CP_PreferredIndex;
578 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1640x480_3; 547 int CP_MaxX, CP_MaxY, CP_MaxClock;
579 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1640x480_3_H; 548 unsigned char CP_PrefSR2B, CP_PrefSR2C;
580 const SiS_LVDSCRT1DataStruct *SiS_LVDSCRT1320x480_1; 549 unsigned short CP_PrefClock;
581 const SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1UNTSC; 550 BOOLEAN CP_Supports64048075;
582 const SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1ONTSC; 551 int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */
583 const SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1UPAL; 552 int CP_HTotal[7], CP_VTotal[7];
584 const SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1OPAL; 553 int CP_HSyncStart[7], CP_VSyncStart[7];
585 const SiS_LVDSCRT1DataStruct *SiS_CHTVCRT1SOPAL; 554 int CP_HSyncEnd[7], CP_VSyncEnd[7];
586 555 int CP_HBlankStart[7], CP_VBlankStart[7];
587 const SiS_CHTVRegDataStruct *SiS_CHTVReg_UNTSC; 556 int CP_HBlankEnd[7], CP_VBlankEnd[7];
588 const SiS_CHTVRegDataStruct *SiS_CHTVReg_ONTSC; 557 int CP_Clock[7];
589 const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPAL; 558 BOOLEAN CP_DataValid[7];
590 const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPAL; 559 BOOLEAN CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7];
591 const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPALM; 560};
592 const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPALM;
593 const SiS_CHTVRegDataStruct *SiS_CHTVReg_UPALN;
594 const SiS_CHTVRegDataStruct *SiS_CHTVReg_OPALN;
595 const SiS_CHTVRegDataStruct *SiS_CHTVReg_SOPAL;
596
597 const UCHAR *SiS_CHTVVCLKUNTSC;
598 const UCHAR *SiS_CHTVVCLKONTSC;
599 const UCHAR *SiS_CHTVVCLKUPAL;
600 const UCHAR *SiS_CHTVVCLKOPAL;
601 const UCHAR *SiS_CHTVVCLKUPALM;
602 const UCHAR *SiS_CHTVVCLKOPALM;
603 const UCHAR *SiS_CHTVVCLKUPALN;
604 const UCHAR *SiS_CHTVVCLKOPALN;
605 const UCHAR *SiS_CHTVVCLKSOPAL;
606
607 USHORT PanelXRes, PanelHT;
608 USHORT PanelYRes, PanelVT;
609 USHORT PanelHRS, PanelHRE;
610 USHORT PanelVRS, PanelVRE;
611 USHORT PanelVCLKIdx300;
612 USHORT PanelVCLKIdx315;
613
614 BOOLEAN UseCustomMode;
615 BOOLEAN CRT1UsesCustomMode;
616 USHORT CHDisplay;
617 USHORT CHSyncStart;
618 USHORT CHSyncEnd;
619 USHORT CHTotal;
620 USHORT CHBlankStart;
621 USHORT CHBlankEnd;
622 USHORT CVDisplay;
623 USHORT CVSyncStart;
624 USHORT CVSyncEnd;
625 USHORT CVTotal;
626 USHORT CVBlankStart;
627 USHORT CVBlankEnd;
628 ULONG CDClock;
629 ULONG CFlags;
630 UCHAR CCRT1CRTC[17];
631 UCHAR CSR2B;
632 UCHAR CSR2C;
633 USHORT CSRClock;
634 USHORT CSRClock_CRT1;
635 USHORT CModeFlag;
636 USHORT CModeFlag_CRT1;
637 USHORT CInfoFlag;
638
639 int LVDSHL;
640
641 BOOLEAN Backup;
642 UCHAR Backup_Mode;
643 UCHAR Backup_14;
644 UCHAR Backup_15;
645 UCHAR Backup_16;
646 UCHAR Backup_17;
647 UCHAR Backup_18;
648 UCHAR Backup_19;
649 UCHAR Backup_1a;
650 UCHAR Backup_1b;
651 UCHAR Backup_1c;
652 UCHAR Backup_1d;
653
654 int UsePanelScaler;
655 int CenterScreen;
656
657 USHORT CP_Vendor, CP_Product;
658 BOOLEAN CP_HaveCustomData;
659 int CP_PreferredX, CP_PreferredY, CP_PreferredIndex;
660 int CP_MaxX, CP_MaxY, CP_MaxClock;
661 UCHAR CP_PrefSR2B, CP_PrefSR2C;
662 USHORT CP_PrefClock;
663 BOOLEAN CP_Supports64048075;
664 int CP_HDisplay[7], CP_VDisplay[7]; /* For Custom LCD panel dimensions */
665 int CP_HTotal[7], CP_VTotal[7];
666 int CP_HSyncStart[7], CP_VSyncStart[7];
667 int CP_HSyncEnd[7], CP_VSyncEnd[7];
668 int CP_HBlankStart[7], CP_VBlankStart[7];
669 int CP_HBlankEnd[7], CP_VBlankEnd[7];
670 int CP_Clock[7];
671 BOOLEAN CP_DataValid[7];
672 BOOLEAN CP_HSync_P[7], CP_VSync_P[7], CP_SyncValid[7];
673} SiS_Private;
674 561
675#endif 562#endif
676 563
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-22 03:08:12 -0500