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authorBen Dooks <ben-linux@fluff.org>2008-12-11 19:24:21 -0500
committerBen Dooks <ben-linux@fluff.org>2009-05-01 07:28:16 -0400
commit090f848da000083bf6c1a052222396970e53b4d7 (patch)
treeb4bcd27fb2c0e3c29a2781ca7870cbdc2c7a3bd6 /drivers
parent5ef316fbe7fd03802b8625833884587927161c14 (diff)
[ARM] S3C: Add UDIVSLOT support for newer UARTS
Add support for the UDIVSLOT register on the newer UART blocks which gives the capability of 1/16ths adjustment to the baud rate. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/serial/s3c6400.c1
-rw-r--r--drivers/serial/samsung.c61
-rw-r--r--drivers/serial/samsung.h4
3 files changed, 63 insertions, 3 deletions
diff --git a/drivers/serial/s3c6400.c b/drivers/serial/s3c6400.c
index 06936d13393f..3e3785233682 100644
--- a/drivers/serial/s3c6400.c
+++ b/drivers/serial/s3c6400.c
@@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c6400_uart_inf = {
102 .name = "Samsung S3C6400 UART", 102 .name = "Samsung S3C6400 UART",
103 .type = PORT_S3C6400, 103 .type = PORT_S3C6400,
104 .fifosize = 64, 104 .fifosize = 64,
105 .has_divslot = 1,
105 .rx_fifomask = S3C2440_UFSTAT_RXMASK, 106 .rx_fifomask = S3C2440_UFSTAT_RXMASK,
106 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, 107 .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT,
107 .rx_fifofull = S3C2440_UFSTAT_RXFULL, 108 .rx_fifofull = S3C2440_UFSTAT_RXFULL,
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index e06686ae858b..93b5d75db126 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -508,6 +508,7 @@ s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c)
508struct baud_calc { 508struct baud_calc {
509 struct s3c24xx_uart_clksrc *clksrc; 509 struct s3c24xx_uart_clksrc *clksrc;
510 unsigned int calc; 510 unsigned int calc;
511 unsigned int divslot;
511 unsigned int quot; 512 unsigned int quot;
512 struct clk *src; 513 struct clk *src;
513}; 514};
@@ -517,6 +518,7 @@ static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
517 struct s3c24xx_uart_clksrc *clksrc, 518 struct s3c24xx_uart_clksrc *clksrc,
518 unsigned int baud) 519 unsigned int baud)
519{ 520{
521 struct s3c24xx_uart_port *ourport = to_ourport(port);
520 unsigned long rate; 522 unsigned long rate;
521 523
522 calc->src = clk_get(port->dev, clksrc->name); 524 calc->src = clk_get(port->dev, clksrc->name);
@@ -527,8 +529,24 @@ static int s3c24xx_serial_calcbaud(struct baud_calc *calc,
527 rate /= clksrc->divisor; 529 rate /= clksrc->divisor;
528 530
529 calc->clksrc = clksrc; 531 calc->clksrc = clksrc;
530 calc->quot = (rate + (8 * baud)) / (16 * baud); 532
531 calc->calc = (rate / (calc->quot * 16)); 533 if (ourport->info->has_divslot) {
534 unsigned long div = rate / baud;
535
536 /* The UDIVSLOT register on the newer UARTs allows us to
537 * get a divisor adjustment of 1/16th on the baud clock.
538 *
539 * We don't keep the UDIVSLOT value (the 16ths we calculated
540 * by not multiplying the baud by 16) as it is easy enough
541 * to recalculate.
542 */
543
544 calc->quot = div / 16;
545 calc->calc = rate / div;
546 } else {
547 calc->quot = (rate + (8 * baud)) / (16 * baud);
548 calc->calc = (rate / (calc->quot * 16));
549 }
532 550
533 calc->quot--; 551 calc->quot--;
534 return 1; 552 return 1;
@@ -611,6 +629,30 @@ static unsigned int s3c24xx_serial_getclk(struct uart_port *port,
611 return best->quot; 629 return best->quot;
612} 630}
613 631
632/* udivslot_table[]
633 *
634 * This table takes the fractional value of the baud divisor and gives
635 * the recommended setting for the UDIVSLOT register.
636 */
637static u16 udivslot_table[16] = {
638 [0] = 0x0000,
639 [1] = 0x0080,
640 [2] = 0x0808,
641 [3] = 0x0888,
642 [4] = 0x2222,
643 [5] = 0x4924,
644 [6] = 0x4A52,
645 [7] = 0x54AA,
646 [8] = 0x5555,
647 [9] = 0xD555,
648 [10] = 0xD5D5,
649 [11] = 0xDDD5,
650 [12] = 0xDDDD,
651 [13] = 0xDFDD,
652 [14] = 0xDFDF,
653 [15] = 0xFFDF,
654};
655
614static void s3c24xx_serial_set_termios(struct uart_port *port, 656static void s3c24xx_serial_set_termios(struct uart_port *port,
615 struct ktermios *termios, 657 struct ktermios *termios,
616 struct ktermios *old) 658 struct ktermios *old)
@@ -623,6 +665,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
623 unsigned int baud, quot; 665 unsigned int baud, quot;
624 unsigned int ulcon; 666 unsigned int ulcon;
625 unsigned int umcon; 667 unsigned int umcon;
668 unsigned int udivslot = 0;
626 669
627 /* 670 /*
628 * We don't support modem control lines. 671 * We don't support modem control lines.
@@ -644,6 +687,7 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
644 /* check to see if we need to change clock source */ 687 /* check to see if we need to change clock source */
645 688
646 if (ourport->clksrc != clksrc || ourport->baudclk != clk) { 689 if (ourport->clksrc != clksrc || ourport->baudclk != clk) {
690 dbg("selecting clock %p\n", clk);
647 s3c24xx_serial_setsource(port, clksrc); 691 s3c24xx_serial_setsource(port, clksrc);
648 692
649 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { 693 if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) {
@@ -658,6 +702,13 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
658 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0; 702 ourport->baudclk_rate = clk ? clk_get_rate(clk) : 0;
659 } 703 }
660 704
705 if (ourport->info->has_divslot) {
706 unsigned int div = ourport->baudclk_rate / baud;
707
708 udivslot = udivslot_table[div & 15];
709 dbg("udivslot = %04x (div %d)\n", udivslot, div & 15);
710 }
711
661 switch (termios->c_cflag & CSIZE) { 712 switch (termios->c_cflag & CSIZE) {
662 case CS5: 713 case CS5:
663 dbg("config: 5bits/char\n"); 714 dbg("config: 5bits/char\n");
@@ -697,12 +748,16 @@ static void s3c24xx_serial_set_termios(struct uart_port *port,
697 748
698 spin_lock_irqsave(&port->lock, flags); 749 spin_lock_irqsave(&port->lock, flags);
699 750
700 dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot); 751 dbg("setting ulcon to %08x, brddiv to %d, udivslot %08x\n",
752 ulcon, quot, udivslot);
701 753
702 wr_regl(port, S3C2410_ULCON, ulcon); 754 wr_regl(port, S3C2410_ULCON, ulcon);
703 wr_regl(port, S3C2410_UBRDIV, quot); 755 wr_regl(port, S3C2410_UBRDIV, quot);
704 wr_regl(port, S3C2410_UMCON, umcon); 756 wr_regl(port, S3C2410_UMCON, umcon);
705 757
758 if (ourport->info->has_divslot)
759 wr_regl(port, S3C2443_DIVSLOT, udivslot);
760
706 dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", 761 dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n",
707 rd_regl(port, S3C2410_ULCON), 762 rd_regl(port, S3C2410_ULCON),
708 rd_regl(port, S3C2410_UCON), 763 rd_regl(port, S3C2410_UCON),
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h
index 571d6b90d206..7afb94843a08 100644
--- a/drivers/serial/samsung.h
+++ b/drivers/serial/samsung.h
@@ -21,6 +21,10 @@ struct s3c24xx_uart_info {
21 unsigned long tx_fifoshift; 21 unsigned long tx_fifoshift;
22 unsigned long tx_fifofull; 22 unsigned long tx_fifofull;
23 23
24 /* uart port features */
25
26 unsigned int has_divslot:1;
27
24 /* clock source control */ 28 /* clock source control */
25 29
26 int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); 30 int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk);