diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-25 01:01:40 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-06-25 01:01:40 -0400 |
commit | 536142f950f7ea4f3d146a138ad6938f28a34f33 (patch) | |
tree | e17b6130a1df035e08f6c930fc31c24017bca9f4 /drivers | |
parent | 5220cc9382e11ca955ce946ee6a5bac577bb14ff (diff) | |
parent | 483f1798998ede75b2575cc1813c3d89ba64a34e (diff) |
Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6:
drm/i915: save/resume forcewake lock fixes
Revert "drm/i915: Kill GTT mappings when moving from GTT domain"
drm/i915: Apply HWSTAM workaround for BSD ring on SandyBridge
drm/i915: Call intel_enable_plane from i9xx_crtc_mode_set (again)
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem_execbuffer.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 3 |
6 files changed, 12 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 94c84d744100..c6389de53161 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -1219,11 +1219,11 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
1219 | ret = i915_gem_object_bind_to_gtt(obj, 0, true); | 1219 | ret = i915_gem_object_bind_to_gtt(obj, 0, true); |
1220 | if (ret) | 1220 | if (ret) |
1221 | goto unlock; | 1221 | goto unlock; |
1222 | } | ||
1223 | 1222 | ||
1224 | ret = i915_gem_object_set_to_gtt_domain(obj, write); | 1223 | ret = i915_gem_object_set_to_gtt_domain(obj, write); |
1225 | if (ret) | 1224 | if (ret) |
1226 | goto unlock; | 1225 | goto unlock; |
1226 | } | ||
1227 | 1227 | ||
1228 | if (obj->tiling_mode == I915_TILING_NONE) | 1228 | if (obj->tiling_mode == I915_TILING_NONE) |
1229 | ret = i915_gem_object_put_fence(obj); | 1229 | ret = i915_gem_object_put_fence(obj); |
@@ -2926,8 +2926,6 @@ i915_gem_object_flush_gtt_write_domain(struct drm_i915_gem_object *obj) | |||
2926 | */ | 2926 | */ |
2927 | wmb(); | 2927 | wmb(); |
2928 | 2928 | ||
2929 | i915_gem_release_mmap(obj); | ||
2930 | |||
2931 | old_write_domain = obj->base.write_domain; | 2929 | old_write_domain = obj->base.write_domain; |
2932 | obj->base.write_domain = 0; | 2930 | obj->base.write_domain = 0; |
2933 | 2931 | ||
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index 20a4cc5b818f..4934cf84c320 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c | |||
@@ -187,10 +187,6 @@ i915_gem_object_set_to_gpu_domain(struct drm_i915_gem_object *obj, | |||
187 | if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_CPU) | 187 | if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_CPU) |
188 | i915_gem_clflush_object(obj); | 188 | i915_gem_clflush_object(obj); |
189 | 189 | ||
190 | /* blow away mappings if mapped through GTT */ | ||
191 | if ((flush_domains | invalidate_domains) & I915_GEM_DOMAIN_GTT) | ||
192 | i915_gem_release_mmap(obj); | ||
193 | |||
194 | if (obj->base.pending_write_domain) | 190 | if (obj->base.pending_write_domain) |
195 | cd->flips |= atomic_read(&obj->pending_flip); | 191 | cd->flips |= atomic_read(&obj->pending_flip); |
196 | 192 | ||
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 9e34a1abeb61..ae2b49969b99 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -1749,6 +1749,7 @@ void ironlake_irq_preinstall(struct drm_device *dev) | |||
1749 | * happens. | 1749 | * happens. |
1750 | */ | 1750 | */ |
1751 | I915_WRITE(GEN6_BLITTER_HWSTAM, ~GEN6_BLITTER_USER_INTERRUPT); | 1751 | I915_WRITE(GEN6_BLITTER_HWSTAM, ~GEN6_BLITTER_USER_INTERRUPT); |
1752 | I915_WRITE(GEN6_BSD_HWSTAM, ~GEN6_BSD_USER_INTERRUPT); | ||
1752 | } | 1753 | } |
1753 | 1754 | ||
1754 | /* XXX hotplug from PCH */ | 1755 | /* XXX hotplug from PCH */ |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2f967af8e62e..5d5def756c9e 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -531,6 +531,7 @@ | |||
531 | #define GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_ENABLE 0 | 531 | #define GEN6_BSD_SLEEP_PSMI_CONTROL_RC_ILDL_MESSAGE_ENABLE 0 |
532 | #define GEN6_BSD_SLEEP_PSMI_CONTROL_IDLE_INDICATOR (1 << 3) | 532 | #define GEN6_BSD_SLEEP_PSMI_CONTROL_IDLE_INDICATOR (1 << 3) |
533 | 533 | ||
534 | #define GEN6_BSD_HWSTAM 0x12098 | ||
534 | #define GEN6_BSD_IMR 0x120a8 | 535 | #define GEN6_BSD_IMR 0x120a8 |
535 | #define GEN6_BSD_USER_INTERRUPT (1 << 12) | 536 | #define GEN6_BSD_USER_INTERRUPT (1 << 12) |
536 | 537 | ||
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 60a94d2b5264..e8152d23d5b6 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -678,6 +678,7 @@ void i915_save_display(struct drm_device *dev) | |||
678 | } | 678 | } |
679 | 679 | ||
680 | /* VGA state */ | 680 | /* VGA state */ |
681 | mutex_lock(&dev->struct_mutex); | ||
681 | dev_priv->saveVGA0 = I915_READ(VGA0); | 682 | dev_priv->saveVGA0 = I915_READ(VGA0); |
682 | dev_priv->saveVGA1 = I915_READ(VGA1); | 683 | dev_priv->saveVGA1 = I915_READ(VGA1); |
683 | dev_priv->saveVGA_PD = I915_READ(VGA_PD); | 684 | dev_priv->saveVGA_PD = I915_READ(VGA_PD); |
@@ -687,6 +688,7 @@ void i915_save_display(struct drm_device *dev) | |||
687 | dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); | 688 | dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); |
688 | 689 | ||
689 | i915_save_vga(dev); | 690 | i915_save_vga(dev); |
691 | mutex_unlock(&dev->struct_mutex); | ||
690 | } | 692 | } |
691 | 693 | ||
692 | void i915_restore_display(struct drm_device *dev) | 694 | void i915_restore_display(struct drm_device *dev) |
@@ -780,6 +782,8 @@ void i915_restore_display(struct drm_device *dev) | |||
780 | I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL); | 782 | I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL); |
781 | else | 783 | else |
782 | I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); | 784 | I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); |
785 | |||
786 | mutex_lock(&dev->struct_mutex); | ||
783 | I915_WRITE(VGA0, dev_priv->saveVGA0); | 787 | I915_WRITE(VGA0, dev_priv->saveVGA0); |
784 | I915_WRITE(VGA1, dev_priv->saveVGA1); | 788 | I915_WRITE(VGA1, dev_priv->saveVGA1); |
785 | I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); | 789 | I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); |
@@ -787,6 +791,7 @@ void i915_restore_display(struct drm_device *dev) | |||
787 | udelay(150); | 791 | udelay(150); |
788 | 792 | ||
789 | i915_restore_vga(dev); | 793 | i915_restore_vga(dev); |
794 | mutex_unlock(&dev->struct_mutex); | ||
790 | } | 795 | } |
791 | 796 | ||
792 | int i915_save_state(struct drm_device *dev) | 797 | int i915_save_state(struct drm_device *dev) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 81a9059b6a94..aa43e7be6053 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4687,6 +4687,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, | |||
4687 | 4687 | ||
4688 | I915_WRITE(DSPCNTR(plane), dspcntr); | 4688 | I915_WRITE(DSPCNTR(plane), dspcntr); |
4689 | POSTING_READ(DSPCNTR(plane)); | 4689 | POSTING_READ(DSPCNTR(plane)); |
4690 | intel_enable_plane(dev_priv, plane, pipe); | ||
4690 | 4691 | ||
4691 | ret = intel_pipe_set_base(crtc, x, y, old_fb); | 4692 | ret = intel_pipe_set_base(crtc, x, y, old_fb); |
4692 | 4693 | ||
@@ -5217,8 +5218,6 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, | |||
5217 | 5218 | ||
5218 | I915_WRITE(DSPCNTR(plane), dspcntr); | 5219 | I915_WRITE(DSPCNTR(plane), dspcntr); |
5219 | POSTING_READ(DSPCNTR(plane)); | 5220 | POSTING_READ(DSPCNTR(plane)); |
5220 | if (!HAS_PCH_SPLIT(dev)) | ||
5221 | intel_enable_plane(dev_priv, plane, pipe); | ||
5222 | 5221 | ||
5223 | ret = intel_pipe_set_base(crtc, x, y, old_fb); | 5222 | ret = intel_pipe_set_base(crtc, x, y, old_fb); |
5224 | 5223 | ||