diff options
author | Ingo Molnar <mingo@elte.hu> | 2010-04-21 03:47:00 -0400 |
---|---|---|
committer | Ingo Molnar <mingo@elte.hu> | 2010-04-21 03:47:05 -0400 |
commit | ac0053fd51d2bac09a7d4b4a59f6dac863bd4373 (patch) | |
tree | 00c32e14428853f352fa3828d0131653ad6a7c69 /drivers | |
parent | b15c7b1cee119999e9eafcd602d24a595e77adac (diff) | |
parent | 01bf0b64579ead8a82e7cfc32ae44bc667e7ad0f (diff) |
Merge commit 'v2.6.34-rc5' into tracing/core
Merge reason: pick up latest -rc's.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'drivers')
148 files changed, 2223 insertions, 1596 deletions
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c index 837de669743a..78c55508aff5 100644 --- a/drivers/acpi/acpica/evgpe.c +++ b/drivers/acpi/acpica/evgpe.c | |||
@@ -117,19 +117,14 @@ acpi_status acpi_ev_enable_gpe(struct acpi_gpe_event_info *gpe_event_info) | |||
117 | if (ACPI_FAILURE(status)) | 117 | if (ACPI_FAILURE(status)) |
118 | return_ACPI_STATUS(status); | 118 | return_ACPI_STATUS(status); |
119 | 119 | ||
120 | /* Mark wake-enabled or HW enable, or both */ | 120 | /* Clear the GPE (of stale events), then enable it */ |
121 | 121 | status = acpi_hw_clear_gpe(gpe_event_info); | |
122 | if (gpe_event_info->runtime_count) { | 122 | if (ACPI_FAILURE(status)) |
123 | /* Clear the GPE (of stale events), then enable it */ | 123 | return_ACPI_STATUS(status); |
124 | status = acpi_hw_clear_gpe(gpe_event_info); | ||
125 | if (ACPI_FAILURE(status)) | ||
126 | return_ACPI_STATUS(status); | ||
127 | |||
128 | /* Enable the requested runtime GPE */ | ||
129 | status = acpi_hw_write_gpe_enable_reg(gpe_event_info); | ||
130 | } | ||
131 | 124 | ||
132 | return_ACPI_STATUS(AE_OK); | 125 | /* Enable the requested GPE */ |
126 | status = acpi_hw_write_gpe_enable_reg(gpe_event_info); | ||
127 | return_ACPI_STATUS(status); | ||
133 | } | 128 | } |
134 | 129 | ||
135 | /******************************************************************************* | 130 | /******************************************************************************* |
diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c index edf62bf5b266..2fbfe51fb141 100644 --- a/drivers/acpi/acpica/exprep.c +++ b/drivers/acpi/acpica/exprep.c | |||
@@ -468,6 +468,23 @@ acpi_status acpi_ex_prep_field_value(struct acpi_create_field_info *info) | |||
468 | 468 | ||
469 | acpi_ut_add_reference(obj_desc->field.region_obj); | 469 | acpi_ut_add_reference(obj_desc->field.region_obj); |
470 | 470 | ||
471 | /* allow full data read from EC address space */ | ||
472 | if (obj_desc->field.region_obj->region.space_id == | ||
473 | ACPI_ADR_SPACE_EC) { | ||
474 | if (obj_desc->common_field.bit_length > 8) { | ||
475 | unsigned width = | ||
476 | ACPI_ROUND_BITS_UP_TO_BYTES( | ||
477 | obj_desc->common_field.bit_length); | ||
478 | // access_bit_width is u8, don't overflow it | ||
479 | if (width > 8) | ||
480 | width = 8; | ||
481 | obj_desc->common_field.access_byte_width = | ||
482 | width; | ||
483 | obj_desc->common_field.access_bit_width = | ||
484 | 8 * width; | ||
485 | } | ||
486 | } | ||
487 | |||
471 | ACPI_DEBUG_PRINT((ACPI_DB_BFIELD, | 488 | ACPI_DEBUG_PRINT((ACPI_DB_BFIELD, |
472 | "RegionField: BitOff %X, Off %X, Gran %X, Region %p\n", | 489 | "RegionField: BitOff %X, Off %X, Gran %X, Region %p\n", |
473 | obj_desc->field.start_field_bit_offset, | 490 | obj_desc->field.start_field_bit_offset, |
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c index 5717bd300869..3026e3fa83ef 100644 --- a/drivers/acpi/battery.c +++ b/drivers/acpi/battery.c | |||
@@ -568,13 +568,13 @@ static int acpi_battery_update(struct acpi_battery *battery) | |||
568 | result = acpi_battery_get_status(battery); | 568 | result = acpi_battery_get_status(battery); |
569 | if (result) | 569 | if (result) |
570 | return result; | 570 | return result; |
571 | #ifdef CONFIG_ACPI_SYSFS_POWER | ||
572 | if (!acpi_battery_present(battery)) { | 571 | if (!acpi_battery_present(battery)) { |
572 | #ifdef CONFIG_ACPI_SYSFS_POWER | ||
573 | sysfs_remove_battery(battery); | 573 | sysfs_remove_battery(battery); |
574 | #endif | ||
574 | battery->update_time = 0; | 575 | battery->update_time = 0; |
575 | return 0; | 576 | return 0; |
576 | } | 577 | } |
577 | #endif | ||
578 | if (!battery->update_time || | 578 | if (!battery->update_time || |
579 | old_present != acpi_battery_present(battery)) { | 579 | old_present != acpi_battery_present(battery)) { |
580 | result = acpi_battery_get_info(battery); | 580 | result = acpi_battery_get_info(battery); |
@@ -880,7 +880,7 @@ static void acpi_battery_notify(struct acpi_device *device, u32 event) | |||
880 | #ifdef CONFIG_ACPI_SYSFS_POWER | 880 | #ifdef CONFIG_ACPI_SYSFS_POWER |
881 | /* acpi_battery_update could remove power_supply object */ | 881 | /* acpi_battery_update could remove power_supply object */ |
882 | if (battery->bat.dev) | 882 | if (battery->bat.dev) |
883 | kobject_uevent(&battery->bat.dev->kobj, KOBJ_CHANGE); | 883 | power_supply_changed(&battery->bat); |
884 | #endif | 884 | #endif |
885 | } | 885 | } |
886 | 886 | ||
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c index a9c429c5d50f..3fe29e992be8 100644 --- a/drivers/acpi/dock.c +++ b/drivers/acpi/dock.c | |||
@@ -1026,13 +1026,10 @@ static int dock_remove(struct dock_station *ds) | |||
1026 | static acpi_status | 1026 | static acpi_status |
1027 | find_dock(acpi_handle handle, u32 lvl, void *context, void **rv) | 1027 | find_dock(acpi_handle handle, u32 lvl, void *context, void **rv) |
1028 | { | 1028 | { |
1029 | acpi_status status = AE_OK; | ||
1030 | |||
1031 | if (is_dock(handle)) | 1029 | if (is_dock(handle)) |
1032 | if (dock_add(handle) >= 0) | 1030 | dock_add(handle); |
1033 | status = AE_CTRL_TERMINATE; | ||
1034 | 1031 | ||
1035 | return status; | 1032 | return AE_OK; |
1036 | } | 1033 | } |
1037 | 1034 | ||
1038 | static acpi_status | 1035 | static acpi_status |
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c index 35ba2547f544..f2234db85da0 100644 --- a/drivers/acpi/ec.c +++ b/drivers/acpi/ec.c | |||
@@ -629,12 +629,12 @@ static u32 acpi_ec_gpe_handler(void *data) | |||
629 | 629 | ||
630 | static acpi_status | 630 | static acpi_status |
631 | acpi_ec_space_handler(u32 function, acpi_physical_address address, | 631 | acpi_ec_space_handler(u32 function, acpi_physical_address address, |
632 | u32 bits, u64 *value, | 632 | u32 bits, u64 *value64, |
633 | void *handler_context, void *region_context) | 633 | void *handler_context, void *region_context) |
634 | { | 634 | { |
635 | struct acpi_ec *ec = handler_context; | 635 | struct acpi_ec *ec = handler_context; |
636 | int result = 0, i; | 636 | int result = 0, i, bytes = bits / 8; |
637 | u8 temp = 0; | 637 | u8 *value = (u8 *)value64; |
638 | 638 | ||
639 | if ((address > 0xFF) || !value || !handler_context) | 639 | if ((address > 0xFF) || !value || !handler_context) |
640 | return AE_BAD_PARAMETER; | 640 | return AE_BAD_PARAMETER; |
@@ -642,32 +642,15 @@ acpi_ec_space_handler(u32 function, acpi_physical_address address, | |||
642 | if (function != ACPI_READ && function != ACPI_WRITE) | 642 | if (function != ACPI_READ && function != ACPI_WRITE) |
643 | return AE_BAD_PARAMETER; | 643 | return AE_BAD_PARAMETER; |
644 | 644 | ||
645 | if (bits != 8 && acpi_strict) | 645 | if (EC_FLAGS_MSI || bits > 8) |
646 | return AE_BAD_PARAMETER; | ||
647 | |||
648 | if (EC_FLAGS_MSI) | ||
649 | acpi_ec_burst_enable(ec); | 646 | acpi_ec_burst_enable(ec); |
650 | 647 | ||
651 | if (function == ACPI_READ) { | 648 | for (i = 0; i < bytes; ++i, ++address, ++value) |
652 | result = acpi_ec_read(ec, address, &temp); | 649 | result = (function == ACPI_READ) ? |
653 | *value = temp; | 650 | acpi_ec_read(ec, address, value) : |
654 | } else { | 651 | acpi_ec_write(ec, address, *value); |
655 | temp = 0xff & (*value); | ||
656 | result = acpi_ec_write(ec, address, temp); | ||
657 | } | ||
658 | |||
659 | for (i = 8; unlikely(bits - i > 0); i += 8) { | ||
660 | ++address; | ||
661 | if (function == ACPI_READ) { | ||
662 | result = acpi_ec_read(ec, address, &temp); | ||
663 | (*value) |= ((u64)temp) << i; | ||
664 | } else { | ||
665 | temp = 0xff & ((*value) >> i); | ||
666 | result = acpi_ec_write(ec, address, temp); | ||
667 | } | ||
668 | } | ||
669 | 652 | ||
670 | if (EC_FLAGS_MSI) | 653 | if (EC_FLAGS_MSI || bits > 8) |
671 | acpi_ec_burst_disable(ec); | 654 | acpi_ec_burst_disable(ec); |
672 | 655 | ||
673 | switch (result) { | 656 | switch (result) { |
diff --git a/drivers/acpi/numa.c b/drivers/acpi/numa.c index b8725461d887..b0337d314604 100644 --- a/drivers/acpi/numa.c +++ b/drivers/acpi/numa.c | |||
@@ -61,8 +61,10 @@ int node_to_pxm(int node) | |||
61 | 61 | ||
62 | void __acpi_map_pxm_to_node(int pxm, int node) | 62 | void __acpi_map_pxm_to_node(int pxm, int node) |
63 | { | 63 | { |
64 | pxm_to_node_map[pxm] = node; | 64 | if (pxm_to_node_map[pxm] == NUMA_NO_NODE || node < pxm_to_node_map[pxm]) |
65 | node_to_pxm_map[node] = pxm; | 65 | pxm_to_node_map[pxm] = node; |
66 | if (node_to_pxm_map[node] == PXM_INVAL || pxm < node_to_pxm_map[node]) | ||
67 | node_to_pxm_map[node] = pxm; | ||
66 | } | 68 | } |
67 | 69 | ||
68 | int acpi_map_pxm_to_node(int pxm) | 70 | int acpi_map_pxm_to_node(int pxm) |
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index 8e6d8665f0ae..7594f65800cf 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c | |||
@@ -758,7 +758,14 @@ static acpi_status __acpi_os_execute(acpi_execute_type type, | |||
758 | queue = hp ? kacpi_hotplug_wq : | 758 | queue = hp ? kacpi_hotplug_wq : |
759 | (type == OSL_NOTIFY_HANDLER ? kacpi_notify_wq : kacpid_wq); | 759 | (type == OSL_NOTIFY_HANDLER ? kacpi_notify_wq : kacpid_wq); |
760 | dpc->wait = hp ? 1 : 0; | 760 | dpc->wait = hp ? 1 : 0; |
761 | INIT_WORK(&dpc->work, acpi_os_execute_deferred); | 761 | |
762 | if (queue == kacpi_hotplug_wq) | ||
763 | INIT_WORK(&dpc->work, acpi_os_execute_deferred); | ||
764 | else if (queue == kacpi_notify_wq) | ||
765 | INIT_WORK(&dpc->work, acpi_os_execute_deferred); | ||
766 | else | ||
767 | INIT_WORK(&dpc->work, acpi_os_execute_deferred); | ||
768 | |||
762 | ret = queue_work(queue, &dpc->work); | 769 | ret = queue_work(queue, &dpc->work); |
763 | 770 | ||
764 | if (!ret) { | 771 | if (!ret) { |
@@ -1151,16 +1158,10 @@ int acpi_check_resource_conflict(const struct resource *res) | |||
1151 | 1158 | ||
1152 | if (clash) { | 1159 | if (clash) { |
1153 | if (acpi_enforce_resources != ENFORCE_RESOURCES_NO) { | 1160 | if (acpi_enforce_resources != ENFORCE_RESOURCES_NO) { |
1154 | printk("%sACPI: %s resource %s [0x%llx-0x%llx]" | 1161 | printk(KERN_WARNING "ACPI: resource %s %pR" |
1155 | " conflicts with ACPI region %s" | 1162 | " conflicts with ACPI region %s %pR\n", |
1156 | " [0x%llx-0x%llx]\n", | 1163 | res->name, res, res_list_elem->name, |
1157 | acpi_enforce_resources == ENFORCE_RESOURCES_LAX | 1164 | res_list_elem); |
1158 | ? KERN_WARNING : KERN_ERR, | ||
1159 | ioport ? "I/O" : "Memory", res->name, | ||
1160 | (long long) res->start, (long long) res->end, | ||
1161 | res_list_elem->name, | ||
1162 | (long long) res_list_elem->start, | ||
1163 | (long long) res_list_elem->end); | ||
1164 | if (acpi_enforce_resources == ENFORCE_RESOURCES_LAX) | 1165 | if (acpi_enforce_resources == ENFORCE_RESOURCES_LAX) |
1165 | printk(KERN_NOTICE "ACPI: This conflict may" | 1166 | printk(KERN_NOTICE "ACPI: This conflict may" |
1166 | " cause random problems and system" | 1167 | " cause random problems and system" |
diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 0261b116d051..0338f513a010 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c | |||
@@ -1081,12 +1081,6 @@ static void acpi_device_set_id(struct acpi_device *device) | |||
1081 | if (ACPI_IS_ROOT_DEVICE(device)) { | 1081 | if (ACPI_IS_ROOT_DEVICE(device)) { |
1082 | acpi_add_id(device, ACPI_SYSTEM_HID); | 1082 | acpi_add_id(device, ACPI_SYSTEM_HID); |
1083 | break; | 1083 | break; |
1084 | } else if (ACPI_IS_ROOT_DEVICE(device->parent)) { | ||
1085 | /* \_SB_, the only root-level namespace device */ | ||
1086 | acpi_add_id(device, ACPI_BUS_HID); | ||
1087 | strcpy(device->pnp.device_name, ACPI_BUS_DEVICE_NAME); | ||
1088 | strcpy(device->pnp.device_class, ACPI_BUS_CLASS); | ||
1089 | break; | ||
1090 | } | 1084 | } |
1091 | 1085 | ||
1092 | status = acpi_get_object_info(device->handle, &info); | 1086 | status = acpi_get_object_info(device->handle, &info); |
@@ -1121,6 +1115,12 @@ static void acpi_device_set_id(struct acpi_device *device) | |||
1121 | acpi_add_id(device, ACPI_DOCK_HID); | 1115 | acpi_add_id(device, ACPI_DOCK_HID); |
1122 | else if (!acpi_ibm_smbus_match(device)) | 1116 | else if (!acpi_ibm_smbus_match(device)) |
1123 | acpi_add_id(device, ACPI_SMBUS_IBM_HID); | 1117 | acpi_add_id(device, ACPI_SMBUS_IBM_HID); |
1118 | else if (!acpi_device_hid(device) && | ||
1119 | ACPI_IS_ROOT_DEVICE(device->parent)) { | ||
1120 | acpi_add_id(device, ACPI_BUS_HID); /* \_SB, LNXSYBUS */ | ||
1121 | strcpy(device->pnp.device_name, ACPI_BUS_DEVICE_NAME); | ||
1122 | strcpy(device->pnp.device_class, ACPI_BUS_CLASS); | ||
1123 | } | ||
1124 | 1124 | ||
1125 | break; | 1125 | break; |
1126 | case ACPI_BUS_TYPE_POWER: | 1126 | case ACPI_BUS_TYPE_POWER: |
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c index 6a0143796772..a0c93b321482 100644 --- a/drivers/acpi/video.c +++ b/drivers/acpi/video.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <linux/dmi.h> | 44 | #include <linux/dmi.h> |
45 | #include <acpi/acpi_bus.h> | 45 | #include <acpi/acpi_bus.h> |
46 | #include <acpi/acpi_drivers.h> | 46 | #include <acpi/acpi_drivers.h> |
47 | #include <linux/suspend.h> | ||
47 | 48 | ||
48 | #define PREFIX "ACPI: " | 49 | #define PREFIX "ACPI: " |
49 | 50 | ||
@@ -89,7 +90,6 @@ module_param(allow_duplicates, bool, 0644); | |||
89 | static int register_count = 0; | 90 | static int register_count = 0; |
90 | static int acpi_video_bus_add(struct acpi_device *device); | 91 | static int acpi_video_bus_add(struct acpi_device *device); |
91 | static int acpi_video_bus_remove(struct acpi_device *device, int type); | 92 | static int acpi_video_bus_remove(struct acpi_device *device, int type); |
92 | static int acpi_video_resume(struct acpi_device *device); | ||
93 | static void acpi_video_bus_notify(struct acpi_device *device, u32 event); | 93 | static void acpi_video_bus_notify(struct acpi_device *device, u32 event); |
94 | 94 | ||
95 | static const struct acpi_device_id video_device_ids[] = { | 95 | static const struct acpi_device_id video_device_ids[] = { |
@@ -105,7 +105,6 @@ static struct acpi_driver acpi_video_bus = { | |||
105 | .ops = { | 105 | .ops = { |
106 | .add = acpi_video_bus_add, | 106 | .add = acpi_video_bus_add, |
107 | .remove = acpi_video_bus_remove, | 107 | .remove = acpi_video_bus_remove, |
108 | .resume = acpi_video_resume, | ||
109 | .notify = acpi_video_bus_notify, | 108 | .notify = acpi_video_bus_notify, |
110 | }, | 109 | }, |
111 | }; | 110 | }; |
@@ -160,6 +159,7 @@ struct acpi_video_bus { | |||
160 | struct proc_dir_entry *dir; | 159 | struct proc_dir_entry *dir; |
161 | struct input_dev *input; | 160 | struct input_dev *input; |
162 | char phys[32]; /* for input device */ | 161 | char phys[32]; /* for input device */ |
162 | struct notifier_block pm_nb; | ||
163 | }; | 163 | }; |
164 | 164 | ||
165 | struct acpi_video_device_flags { | 165 | struct acpi_video_device_flags { |
@@ -1021,6 +1021,13 @@ static void acpi_video_device_find_cap(struct acpi_video_device *device) | |||
1021 | if (IS_ERR(device->backlight)) | 1021 | if (IS_ERR(device->backlight)) |
1022 | return; | 1022 | return; |
1023 | 1023 | ||
1024 | /* | ||
1025 | * Save current brightness level in case we have to restore it | ||
1026 | * before acpi_video_device_lcd_set_level() is called next time. | ||
1027 | */ | ||
1028 | device->backlight->props.brightness = | ||
1029 | acpi_video_get_brightness(device->backlight); | ||
1030 | |||
1024 | result = sysfs_create_link(&device->backlight->dev.kobj, | 1031 | result = sysfs_create_link(&device->backlight->dev.kobj, |
1025 | &device->dev->dev.kobj, "device"); | 1032 | &device->dev->dev.kobj, "device"); |
1026 | if (result) | 1033 | if (result) |
@@ -2123,7 +2130,7 @@ static void acpi_video_bus_notify(struct acpi_device *device, u32 event) | |||
2123 | { | 2130 | { |
2124 | struct acpi_video_bus *video = acpi_driver_data(device); | 2131 | struct acpi_video_bus *video = acpi_driver_data(device); |
2125 | struct input_dev *input; | 2132 | struct input_dev *input; |
2126 | int keycode; | 2133 | int keycode = 0; |
2127 | 2134 | ||
2128 | if (!video) | 2135 | if (!video) |
2129 | return; | 2136 | return; |
@@ -2159,17 +2166,19 @@ static void acpi_video_bus_notify(struct acpi_device *device, u32 event) | |||
2159 | break; | 2166 | break; |
2160 | 2167 | ||
2161 | default: | 2168 | default: |
2162 | keycode = KEY_UNKNOWN; | ||
2163 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | 2169 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
2164 | "Unsupported event [0x%x]\n", event)); | 2170 | "Unsupported event [0x%x]\n", event)); |
2165 | break; | 2171 | break; |
2166 | } | 2172 | } |
2167 | 2173 | ||
2168 | acpi_notifier_call_chain(device, event, 0); | 2174 | acpi_notifier_call_chain(device, event, 0); |
2169 | input_report_key(input, keycode, 1); | 2175 | |
2170 | input_sync(input); | 2176 | if (keycode) { |
2171 | input_report_key(input, keycode, 0); | 2177 | input_report_key(input, keycode, 1); |
2172 | input_sync(input); | 2178 | input_sync(input); |
2179 | input_report_key(input, keycode, 0); | ||
2180 | input_sync(input); | ||
2181 | } | ||
2173 | 2182 | ||
2174 | return; | 2183 | return; |
2175 | } | 2184 | } |
@@ -2180,7 +2189,7 @@ static void acpi_video_device_notify(acpi_handle handle, u32 event, void *data) | |||
2180 | struct acpi_device *device = NULL; | 2189 | struct acpi_device *device = NULL; |
2181 | struct acpi_video_bus *bus; | 2190 | struct acpi_video_bus *bus; |
2182 | struct input_dev *input; | 2191 | struct input_dev *input; |
2183 | int keycode; | 2192 | int keycode = 0; |
2184 | 2193 | ||
2185 | if (!video_device) | 2194 | if (!video_device) |
2186 | return; | 2195 | return; |
@@ -2221,39 +2230,48 @@ static void acpi_video_device_notify(acpi_handle handle, u32 event, void *data) | |||
2221 | keycode = KEY_DISPLAY_OFF; | 2230 | keycode = KEY_DISPLAY_OFF; |
2222 | break; | 2231 | break; |
2223 | default: | 2232 | default: |
2224 | keycode = KEY_UNKNOWN; | ||
2225 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | 2233 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
2226 | "Unsupported event [0x%x]\n", event)); | 2234 | "Unsupported event [0x%x]\n", event)); |
2227 | break; | 2235 | break; |
2228 | } | 2236 | } |
2229 | 2237 | ||
2230 | acpi_notifier_call_chain(device, event, 0); | 2238 | acpi_notifier_call_chain(device, event, 0); |
2231 | input_report_key(input, keycode, 1); | 2239 | |
2232 | input_sync(input); | 2240 | if (keycode) { |
2233 | input_report_key(input, keycode, 0); | 2241 | input_report_key(input, keycode, 1); |
2234 | input_sync(input); | 2242 | input_sync(input); |
2243 | input_report_key(input, keycode, 0); | ||
2244 | input_sync(input); | ||
2245 | } | ||
2235 | 2246 | ||
2236 | return; | 2247 | return; |
2237 | } | 2248 | } |
2238 | 2249 | ||
2239 | static int instance; | 2250 | static int acpi_video_resume(struct notifier_block *nb, |
2240 | static int acpi_video_resume(struct acpi_device *device) | 2251 | unsigned long val, void *ign) |
2241 | { | 2252 | { |
2242 | struct acpi_video_bus *video; | 2253 | struct acpi_video_bus *video; |
2243 | struct acpi_video_device *video_device; | 2254 | struct acpi_video_device *video_device; |
2244 | int i; | 2255 | int i; |
2245 | 2256 | ||
2246 | if (!device || !acpi_driver_data(device)) | 2257 | switch (val) { |
2247 | return -EINVAL; | 2258 | case PM_HIBERNATION_PREPARE: |
2259 | case PM_SUSPEND_PREPARE: | ||
2260 | case PM_RESTORE_PREPARE: | ||
2261 | return NOTIFY_DONE; | ||
2262 | } | ||
2248 | 2263 | ||
2249 | video = acpi_driver_data(device); | 2264 | video = container_of(nb, struct acpi_video_bus, pm_nb); |
2265 | |||
2266 | dev_info(&video->device->dev, "Restoring backlight state\n"); | ||
2250 | 2267 | ||
2251 | for (i = 0; i < video->attached_count; i++) { | 2268 | for (i = 0; i < video->attached_count; i++) { |
2252 | video_device = video->attached_array[i].bind_info; | 2269 | video_device = video->attached_array[i].bind_info; |
2253 | if (video_device && video_device->backlight) | 2270 | if (video_device && video_device->backlight) |
2254 | acpi_video_set_brightness(video_device->backlight); | 2271 | acpi_video_set_brightness(video_device->backlight); |
2255 | } | 2272 | } |
2256 | return AE_OK; | 2273 | |
2274 | return NOTIFY_OK; | ||
2257 | } | 2275 | } |
2258 | 2276 | ||
2259 | static acpi_status | 2277 | static acpi_status |
@@ -2277,6 +2295,8 @@ acpi_video_bus_match(acpi_handle handle, u32 level, void *context, | |||
2277 | return AE_OK; | 2295 | return AE_OK; |
2278 | } | 2296 | } |
2279 | 2297 | ||
2298 | static int instance; | ||
2299 | |||
2280 | static int acpi_video_bus_add(struct acpi_device *device) | 2300 | static int acpi_video_bus_add(struct acpi_device *device) |
2281 | { | 2301 | { |
2282 | struct acpi_video_bus *video; | 2302 | struct acpi_video_bus *video; |
@@ -2358,7 +2378,6 @@ static int acpi_video_bus_add(struct acpi_device *device) | |||
2358 | set_bit(KEY_BRIGHTNESSDOWN, input->keybit); | 2378 | set_bit(KEY_BRIGHTNESSDOWN, input->keybit); |
2359 | set_bit(KEY_BRIGHTNESS_ZERO, input->keybit); | 2379 | set_bit(KEY_BRIGHTNESS_ZERO, input->keybit); |
2360 | set_bit(KEY_DISPLAY_OFF, input->keybit); | 2380 | set_bit(KEY_DISPLAY_OFF, input->keybit); |
2361 | set_bit(KEY_UNKNOWN, input->keybit); | ||
2362 | 2381 | ||
2363 | error = input_register_device(input); | 2382 | error = input_register_device(input); |
2364 | if (error) | 2383 | if (error) |
@@ -2370,6 +2389,10 @@ static int acpi_video_bus_add(struct acpi_device *device) | |||
2370 | video->flags.rom ? "yes" : "no", | 2389 | video->flags.rom ? "yes" : "no", |
2371 | video->flags.post ? "yes" : "no"); | 2390 | video->flags.post ? "yes" : "no"); |
2372 | 2391 | ||
2392 | video->pm_nb.notifier_call = acpi_video_resume; | ||
2393 | video->pm_nb.priority = 0; | ||
2394 | register_pm_notifier(&video->pm_nb); | ||
2395 | |||
2373 | return 0; | 2396 | return 0; |
2374 | 2397 | ||
2375 | err_free_input_dev: | 2398 | err_free_input_dev: |
@@ -2396,6 +2419,8 @@ static int acpi_video_bus_remove(struct acpi_device *device, int type) | |||
2396 | 2419 | ||
2397 | video = acpi_driver_data(device); | 2420 | video = acpi_driver_data(device); |
2398 | 2421 | ||
2422 | unregister_pm_notifier(&video->pm_nb); | ||
2423 | |||
2399 | acpi_video_bus_stop_devices(video); | 2424 | acpi_video_bus_stop_devices(video); |
2400 | acpi_video_bus_put_devices(video); | 2425 | acpi_video_bus_put_devices(video); |
2401 | acpi_video_bus_remove_fs(device); | 2426 | acpi_video_bus_remove_fs(device); |
diff --git a/drivers/base/memory.c b/drivers/base/memory.c index 4f4aa5897b4c..933442f40321 100644 --- a/drivers/base/memory.c +++ b/drivers/base/memory.c | |||
@@ -313,7 +313,7 @@ static ssize_t | |||
313 | print_block_size(struct sysdev_class *class, struct sysdev_class_attribute *attr, | 313 | print_block_size(struct sysdev_class *class, struct sysdev_class_attribute *attr, |
314 | char *buf) | 314 | char *buf) |
315 | { | 315 | { |
316 | return sprintf(buf, "%#lx\n", (unsigned long)PAGES_PER_SECTION * PAGE_SIZE); | 316 | return sprintf(buf, "%lx\n", (unsigned long)PAGES_PER_SECTION * PAGE_SIZE); |
317 | } | 317 | } |
318 | 318 | ||
319 | static SYSDEV_CLASS_ATTR(block_size_bytes, 0444, print_block_size, NULL); | 319 | static SYSDEV_CLASS_ATTR(block_size_bytes, 0444, print_block_size, NULL); |
diff --git a/drivers/block/DAC960.c b/drivers/block/DAC960.c index 459f1bc25a7b..c5f22bb0a48e 100644 --- a/drivers/block/DAC960.c +++ b/drivers/block/DAC960.c | |||
@@ -2533,7 +2533,6 @@ static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller) | |||
2533 | Controller->RequestQueue[n] = RequestQueue; | 2533 | Controller->RequestQueue[n] = RequestQueue; |
2534 | blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit); | 2534 | blk_queue_bounce_limit(RequestQueue, Controller->BounceBufferLimit); |
2535 | RequestQueue->queuedata = Controller; | 2535 | RequestQueue->queuedata = Controller; |
2536 | blk_queue_max_hw_segments(RequestQueue, Controller->DriverScatterGatherLimit); | ||
2537 | blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit); | 2536 | blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit); |
2538 | blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand); | 2537 | blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand); |
2539 | disk->queue = RequestQueue; | 2538 | disk->queue = RequestQueue; |
diff --git a/drivers/block/drbd/drbd_actlog.c b/drivers/block/drbd/drbd_actlog.c index 17956ff6a08d..df018990c422 100644 --- a/drivers/block/drbd/drbd_actlog.c +++ b/drivers/block/drbd/drbd_actlog.c | |||
@@ -536,7 +536,9 @@ static void atodb_endio(struct bio *bio, int error) | |||
536 | put_ldev(mdev); | 536 | put_ldev(mdev); |
537 | } | 537 | } |
538 | 538 | ||
539 | /* sector to word */ | ||
539 | #define S2W(s) ((s)<<(BM_EXT_SHIFT-BM_BLOCK_SHIFT-LN2_BPL)) | 540 | #define S2W(s) ((s)<<(BM_EXT_SHIFT-BM_BLOCK_SHIFT-LN2_BPL)) |
541 | |||
540 | /* activity log to on disk bitmap -- prepare bio unless that sector | 542 | /* activity log to on disk bitmap -- prepare bio unless that sector |
541 | * is already covered by previously prepared bios */ | 543 | * is already covered by previously prepared bios */ |
542 | static int atodb_prepare_unless_covered(struct drbd_conf *mdev, | 544 | static int atodb_prepare_unless_covered(struct drbd_conf *mdev, |
@@ -546,13 +548,20 @@ static int atodb_prepare_unless_covered(struct drbd_conf *mdev, | |||
546 | { | 548 | { |
547 | struct bio *bio; | 549 | struct bio *bio; |
548 | struct page *page; | 550 | struct page *page; |
549 | sector_t on_disk_sector = enr + mdev->ldev->md.md_offset | 551 | sector_t on_disk_sector; |
550 | + mdev->ldev->md.bm_offset; | ||
551 | unsigned int page_offset = PAGE_SIZE; | 552 | unsigned int page_offset = PAGE_SIZE; |
552 | int offset; | 553 | int offset; |
553 | int i = 0; | 554 | int i = 0; |
554 | int err = -ENOMEM; | 555 | int err = -ENOMEM; |
555 | 556 | ||
557 | /* We always write aligned, full 4k blocks, | ||
558 | * so we can ignore the logical_block_size (for now) */ | ||
559 | enr &= ~7U; | ||
560 | on_disk_sector = enr + mdev->ldev->md.md_offset | ||
561 | + mdev->ldev->md.bm_offset; | ||
562 | |||
563 | D_ASSERT(!(on_disk_sector & 7U)); | ||
564 | |||
556 | /* Check if that enr is already covered by an already created bio. | 565 | /* Check if that enr is already covered by an already created bio. |
557 | * Caution, bios[] is not NULL terminated, | 566 | * Caution, bios[] is not NULL terminated, |
558 | * but only initialized to all NULL. | 567 | * but only initialized to all NULL. |
@@ -588,7 +597,7 @@ static int atodb_prepare_unless_covered(struct drbd_conf *mdev, | |||
588 | 597 | ||
589 | offset = S2W(enr); | 598 | offset = S2W(enr); |
590 | drbd_bm_get_lel(mdev, offset, | 599 | drbd_bm_get_lel(mdev, offset, |
591 | min_t(size_t, S2W(1), drbd_bm_words(mdev) - offset), | 600 | min_t(size_t, S2W(8), drbd_bm_words(mdev) - offset), |
592 | kmap(page) + page_offset); | 601 | kmap(page) + page_offset); |
593 | kunmap(page); | 602 | kunmap(page); |
594 | 603 | ||
@@ -597,7 +606,7 @@ static int atodb_prepare_unless_covered(struct drbd_conf *mdev, | |||
597 | bio->bi_bdev = mdev->ldev->md_bdev; | 606 | bio->bi_bdev = mdev->ldev->md_bdev; |
598 | bio->bi_sector = on_disk_sector; | 607 | bio->bi_sector = on_disk_sector; |
599 | 608 | ||
600 | if (bio_add_page(bio, page, MD_SECTOR_SIZE, page_offset) != MD_SECTOR_SIZE) | 609 | if (bio_add_page(bio, page, 4096, page_offset) != 4096) |
601 | goto out_put_page; | 610 | goto out_put_page; |
602 | 611 | ||
603 | atomic_inc(&wc->count); | 612 | atomic_inc(&wc->count); |
@@ -1327,7 +1336,7 @@ int drbd_rs_del_all(struct drbd_conf *mdev) | |||
1327 | /* ok, ->resync is there. */ | 1336 | /* ok, ->resync is there. */ |
1328 | for (i = 0; i < mdev->resync->nr_elements; i++) { | 1337 | for (i = 0; i < mdev->resync->nr_elements; i++) { |
1329 | e = lc_element_by_index(mdev->resync, i); | 1338 | e = lc_element_by_index(mdev->resync, i); |
1330 | bm_ext = e ? lc_entry(e, struct bm_extent, lce) : NULL; | 1339 | bm_ext = lc_entry(e, struct bm_extent, lce); |
1331 | if (bm_ext->lce.lc_number == LC_FREE) | 1340 | if (bm_ext->lce.lc_number == LC_FREE) |
1332 | continue; | 1341 | continue; |
1333 | if (bm_ext->lce.lc_number == mdev->resync_wenr) { | 1342 | if (bm_ext->lce.lc_number == mdev->resync_wenr) { |
diff --git a/drivers/block/drbd/drbd_bitmap.c b/drivers/block/drbd/drbd_bitmap.c index 3d6f3d988949..3390716898d5 100644 --- a/drivers/block/drbd/drbd_bitmap.c +++ b/drivers/block/drbd/drbd_bitmap.c | |||
@@ -67,7 +67,7 @@ struct drbd_bitmap { | |||
67 | size_t bm_words; | 67 | size_t bm_words; |
68 | size_t bm_number_of_pages; | 68 | size_t bm_number_of_pages; |
69 | sector_t bm_dev_capacity; | 69 | sector_t bm_dev_capacity; |
70 | struct semaphore bm_change; /* serializes resize operations */ | 70 | struct mutex bm_change; /* serializes resize operations */ |
71 | 71 | ||
72 | atomic_t bm_async_io; | 72 | atomic_t bm_async_io; |
73 | wait_queue_head_t bm_io_wait; | 73 | wait_queue_head_t bm_io_wait; |
@@ -115,7 +115,7 @@ void drbd_bm_lock(struct drbd_conf *mdev, char *why) | |||
115 | return; | 115 | return; |
116 | } | 116 | } |
117 | 117 | ||
118 | trylock_failed = down_trylock(&b->bm_change); | 118 | trylock_failed = !mutex_trylock(&b->bm_change); |
119 | 119 | ||
120 | if (trylock_failed) { | 120 | if (trylock_failed) { |
121 | dev_warn(DEV, "%s going to '%s' but bitmap already locked for '%s' by %s\n", | 121 | dev_warn(DEV, "%s going to '%s' but bitmap already locked for '%s' by %s\n", |
@@ -126,7 +126,7 @@ void drbd_bm_lock(struct drbd_conf *mdev, char *why) | |||
126 | b->bm_task == mdev->receiver.task ? "receiver" : | 126 | b->bm_task == mdev->receiver.task ? "receiver" : |
127 | b->bm_task == mdev->asender.task ? "asender" : | 127 | b->bm_task == mdev->asender.task ? "asender" : |
128 | b->bm_task == mdev->worker.task ? "worker" : "?"); | 128 | b->bm_task == mdev->worker.task ? "worker" : "?"); |
129 | down(&b->bm_change); | 129 | mutex_lock(&b->bm_change); |
130 | } | 130 | } |
131 | if (__test_and_set_bit(BM_LOCKED, &b->bm_flags)) | 131 | if (__test_and_set_bit(BM_LOCKED, &b->bm_flags)) |
132 | dev_err(DEV, "FIXME bitmap already locked in bm_lock\n"); | 132 | dev_err(DEV, "FIXME bitmap already locked in bm_lock\n"); |
@@ -148,7 +148,7 @@ void drbd_bm_unlock(struct drbd_conf *mdev) | |||
148 | 148 | ||
149 | b->bm_why = NULL; | 149 | b->bm_why = NULL; |
150 | b->bm_task = NULL; | 150 | b->bm_task = NULL; |
151 | up(&b->bm_change); | 151 | mutex_unlock(&b->bm_change); |
152 | } | 152 | } |
153 | 153 | ||
154 | /* word offset to long pointer */ | 154 | /* word offset to long pointer */ |
@@ -296,7 +296,7 @@ int drbd_bm_init(struct drbd_conf *mdev) | |||
296 | if (!b) | 296 | if (!b) |
297 | return -ENOMEM; | 297 | return -ENOMEM; |
298 | spin_lock_init(&b->bm_lock); | 298 | spin_lock_init(&b->bm_lock); |
299 | init_MUTEX(&b->bm_change); | 299 | mutex_init(&b->bm_change); |
300 | init_waitqueue_head(&b->bm_io_wait); | 300 | init_waitqueue_head(&b->bm_io_wait); |
301 | 301 | ||
302 | mdev->bitmap = b; | 302 | mdev->bitmap = b; |
diff --git a/drivers/block/drbd/drbd_int.h b/drivers/block/drbd/drbd_int.h index d9301e861d9f..e5e86a781820 100644 --- a/drivers/block/drbd/drbd_int.h +++ b/drivers/block/drbd/drbd_int.h | |||
@@ -261,6 +261,9 @@ static inline const char *cmdname(enum drbd_packets cmd) | |||
261 | [P_OV_REQUEST] = "OVRequest", | 261 | [P_OV_REQUEST] = "OVRequest", |
262 | [P_OV_REPLY] = "OVReply", | 262 | [P_OV_REPLY] = "OVReply", |
263 | [P_OV_RESULT] = "OVResult", | 263 | [P_OV_RESULT] = "OVResult", |
264 | [P_CSUM_RS_REQUEST] = "CsumRSRequest", | ||
265 | [P_RS_IS_IN_SYNC] = "CsumRSIsInSync", | ||
266 | [P_COMPRESSED_BITMAP] = "CBitmap", | ||
264 | [P_MAX_CMD] = NULL, | 267 | [P_MAX_CMD] = NULL, |
265 | }; | 268 | }; |
266 | 269 | ||
@@ -443,13 +446,18 @@ struct p_rs_param_89 { | |||
443 | char csums_alg[SHARED_SECRET_MAX]; | 446 | char csums_alg[SHARED_SECRET_MAX]; |
444 | } __packed; | 447 | } __packed; |
445 | 448 | ||
449 | enum drbd_conn_flags { | ||
450 | CF_WANT_LOSE = 1, | ||
451 | CF_DRY_RUN = 2, | ||
452 | }; | ||
453 | |||
446 | struct p_protocol { | 454 | struct p_protocol { |
447 | struct p_header head; | 455 | struct p_header head; |
448 | u32 protocol; | 456 | u32 protocol; |
449 | u32 after_sb_0p; | 457 | u32 after_sb_0p; |
450 | u32 after_sb_1p; | 458 | u32 after_sb_1p; |
451 | u32 after_sb_2p; | 459 | u32 after_sb_2p; |
452 | u32 want_lose; | 460 | u32 conn_flags; |
453 | u32 two_primaries; | 461 | u32 two_primaries; |
454 | 462 | ||
455 | /* Since protocol version 87 and higher. */ | 463 | /* Since protocol version 87 and higher. */ |
@@ -791,6 +799,8 @@ enum { | |||
791 | * while this is set. */ | 799 | * while this is set. */ |
792 | RESIZE_PENDING, /* Size change detected locally, waiting for the response from | 800 | RESIZE_PENDING, /* Size change detected locally, waiting for the response from |
793 | * the peer, if it changed there as well. */ | 801 | * the peer, if it changed there as well. */ |
802 | CONN_DRY_RUN, /* Expect disconnect after resync handshake. */ | ||
803 | GOT_PING_ACK, /* set when we receive a ping_ack packet, misc wait gets woken */ | ||
794 | }; | 804 | }; |
795 | 805 | ||
796 | struct drbd_bitmap; /* opaque for drbd_conf */ | 806 | struct drbd_bitmap; /* opaque for drbd_conf */ |
diff --git a/drivers/block/drbd/drbd_main.c b/drivers/block/drbd/drbd_main.c index ab871e00ffc5..67e0fc542249 100644 --- a/drivers/block/drbd/drbd_main.c +++ b/drivers/block/drbd/drbd_main.c | |||
@@ -1668,7 +1668,7 @@ int drbd_send_sync_param(struct drbd_conf *mdev, struct syncer_conf *sc) | |||
1668 | int drbd_send_protocol(struct drbd_conf *mdev) | 1668 | int drbd_send_protocol(struct drbd_conf *mdev) |
1669 | { | 1669 | { |
1670 | struct p_protocol *p; | 1670 | struct p_protocol *p; |
1671 | int size, rv; | 1671 | int size, cf, rv; |
1672 | 1672 | ||
1673 | size = sizeof(struct p_protocol); | 1673 | size = sizeof(struct p_protocol); |
1674 | 1674 | ||
@@ -1685,9 +1685,21 @@ int drbd_send_protocol(struct drbd_conf *mdev) | |||
1685 | p->after_sb_0p = cpu_to_be32(mdev->net_conf->after_sb_0p); | 1685 | p->after_sb_0p = cpu_to_be32(mdev->net_conf->after_sb_0p); |
1686 | p->after_sb_1p = cpu_to_be32(mdev->net_conf->after_sb_1p); | 1686 | p->after_sb_1p = cpu_to_be32(mdev->net_conf->after_sb_1p); |
1687 | p->after_sb_2p = cpu_to_be32(mdev->net_conf->after_sb_2p); | 1687 | p->after_sb_2p = cpu_to_be32(mdev->net_conf->after_sb_2p); |
1688 | p->want_lose = cpu_to_be32(mdev->net_conf->want_lose); | ||
1689 | p->two_primaries = cpu_to_be32(mdev->net_conf->two_primaries); | 1688 | p->two_primaries = cpu_to_be32(mdev->net_conf->two_primaries); |
1690 | 1689 | ||
1690 | cf = 0; | ||
1691 | if (mdev->net_conf->want_lose) | ||
1692 | cf |= CF_WANT_LOSE; | ||
1693 | if (mdev->net_conf->dry_run) { | ||
1694 | if (mdev->agreed_pro_version >= 92) | ||
1695 | cf |= CF_DRY_RUN; | ||
1696 | else { | ||
1697 | dev_err(DEV, "--dry-run is not supported by peer"); | ||
1698 | return 0; | ||
1699 | } | ||
1700 | } | ||
1701 | p->conn_flags = cpu_to_be32(cf); | ||
1702 | |||
1691 | if (mdev->agreed_pro_version >= 87) | 1703 | if (mdev->agreed_pro_version >= 87) |
1692 | strcpy(p->integrity_alg, mdev->net_conf->integrity_alg); | 1704 | strcpy(p->integrity_alg, mdev->net_conf->integrity_alg); |
1693 | 1705 | ||
@@ -3161,14 +3173,18 @@ void drbd_free_bc(struct drbd_backing_dev *ldev) | |||
3161 | void drbd_free_sock(struct drbd_conf *mdev) | 3173 | void drbd_free_sock(struct drbd_conf *mdev) |
3162 | { | 3174 | { |
3163 | if (mdev->data.socket) { | 3175 | if (mdev->data.socket) { |
3176 | mutex_lock(&mdev->data.mutex); | ||
3164 | kernel_sock_shutdown(mdev->data.socket, SHUT_RDWR); | 3177 | kernel_sock_shutdown(mdev->data.socket, SHUT_RDWR); |
3165 | sock_release(mdev->data.socket); | 3178 | sock_release(mdev->data.socket); |
3166 | mdev->data.socket = NULL; | 3179 | mdev->data.socket = NULL; |
3180 | mutex_unlock(&mdev->data.mutex); | ||
3167 | } | 3181 | } |
3168 | if (mdev->meta.socket) { | 3182 | if (mdev->meta.socket) { |
3183 | mutex_lock(&mdev->meta.mutex); | ||
3169 | kernel_sock_shutdown(mdev->meta.socket, SHUT_RDWR); | 3184 | kernel_sock_shutdown(mdev->meta.socket, SHUT_RDWR); |
3170 | sock_release(mdev->meta.socket); | 3185 | sock_release(mdev->meta.socket); |
3171 | mdev->meta.socket = NULL; | 3186 | mdev->meta.socket = NULL; |
3187 | mutex_unlock(&mdev->meta.mutex); | ||
3172 | } | 3188 | } |
3173 | } | 3189 | } |
3174 | 3190 | ||
diff --git a/drivers/block/drbd/drbd_nl.c b/drivers/block/drbd/drbd_nl.c index 4df3b40b1057..6429d2b19e06 100644 --- a/drivers/block/drbd/drbd_nl.c +++ b/drivers/block/drbd/drbd_nl.c | |||
@@ -285,8 +285,8 @@ int drbd_set_role(struct drbd_conf *mdev, enum drbd_role new_role, int force) | |||
285 | } | 285 | } |
286 | 286 | ||
287 | if (r == SS_NO_UP_TO_DATE_DISK && force && | 287 | if (r == SS_NO_UP_TO_DATE_DISK && force && |
288 | (mdev->state.disk == D_INCONSISTENT || | 288 | (mdev->state.disk < D_UP_TO_DATE && |
289 | mdev->state.disk == D_OUTDATED)) { | 289 | mdev->state.disk >= D_INCONSISTENT)) { |
290 | mask.disk = D_MASK; | 290 | mask.disk = D_MASK; |
291 | val.disk = D_UP_TO_DATE; | 291 | val.disk = D_UP_TO_DATE; |
292 | forced = 1; | 292 | forced = 1; |
@@ -407,7 +407,7 @@ static int drbd_nl_primary(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp, | |||
407 | } | 407 | } |
408 | 408 | ||
409 | reply->ret_code = | 409 | reply->ret_code = |
410 | drbd_set_role(mdev, R_PRIMARY, primary_args.overwrite_peer); | 410 | drbd_set_role(mdev, R_PRIMARY, primary_args.primary_force); |
411 | 411 | ||
412 | return 0; | 412 | return 0; |
413 | } | 413 | } |
@@ -941,6 +941,25 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp | |||
941 | 941 | ||
942 | drbd_md_set_sector_offsets(mdev, nbc); | 942 | drbd_md_set_sector_offsets(mdev, nbc); |
943 | 943 | ||
944 | /* allocate a second IO page if logical_block_size != 512 */ | ||
945 | logical_block_size = bdev_logical_block_size(nbc->md_bdev); | ||
946 | if (logical_block_size == 0) | ||
947 | logical_block_size = MD_SECTOR_SIZE; | ||
948 | |||
949 | if (logical_block_size != MD_SECTOR_SIZE) { | ||
950 | if (!mdev->md_io_tmpp) { | ||
951 | struct page *page = alloc_page(GFP_NOIO); | ||
952 | if (!page) | ||
953 | goto force_diskless_dec; | ||
954 | |||
955 | dev_warn(DEV, "Meta data's bdev logical_block_size = %d != %d\n", | ||
956 | logical_block_size, MD_SECTOR_SIZE); | ||
957 | dev_warn(DEV, "Workaround engaged (has performance impact).\n"); | ||
958 | |||
959 | mdev->md_io_tmpp = page; | ||
960 | } | ||
961 | } | ||
962 | |||
944 | if (!mdev->bitmap) { | 963 | if (!mdev->bitmap) { |
945 | if (drbd_bm_init(mdev)) { | 964 | if (drbd_bm_init(mdev)) { |
946 | retcode = ERR_NOMEM; | 965 | retcode = ERR_NOMEM; |
@@ -980,25 +999,6 @@ static int drbd_nl_disk_conf(struct drbd_conf *mdev, struct drbd_nl_cfg_req *nlp | |||
980 | goto force_diskless_dec; | 999 | goto force_diskless_dec; |
981 | } | 1000 | } |
982 | 1001 | ||
983 | /* allocate a second IO page if logical_block_size != 512 */ | ||
984 | logical_block_size = bdev_logical_block_size(nbc->md_bdev); | ||
985 | if (logical_block_size == 0) | ||
986 | logical_block_size = MD_SECTOR_SIZE; | ||
987 | |||
988 | if (logical_block_size != MD_SECTOR_SIZE) { | ||
989 | if (!mdev->md_io_tmpp) { | ||
990 | struct page *page = alloc_page(GFP_NOIO); | ||
991 | if (!page) | ||
992 | goto force_diskless_dec; | ||
993 | |||
994 | dev_warn(DEV, "Meta data's bdev logical_block_size = %d != %d\n", | ||
995 | logical_block_size, MD_SECTOR_SIZE); | ||
996 | dev_warn(DEV, "Workaround engaged (has performance impact).\n"); | ||
997 | |||
998 | mdev->md_io_tmpp = page; | ||
999 | } | ||
1000 | } | ||
1001 | |||
1002 | /* Reset the "barriers don't work" bits here, then force meta data to | 1002 | /* Reset the "barriers don't work" bits here, then force meta data to |
1003 | * be written, to ensure we determine if barriers are supported. */ | 1003 | * be written, to ensure we determine if barriers are supported. */ |
1004 | if (nbc->dc.no_md_flush) | 1004 | if (nbc->dc.no_md_flush) |
diff --git a/drivers/block/drbd/drbd_receiver.c b/drivers/block/drbd/drbd_receiver.c index d065c646b35a..ed9f1de24a71 100644 --- a/drivers/block/drbd/drbd_receiver.c +++ b/drivers/block/drbd/drbd_receiver.c | |||
@@ -2513,6 +2513,10 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_conf *mdev, enum drbd_rol | |||
2513 | } | 2513 | } |
2514 | 2514 | ||
2515 | if (hg == -100) { | 2515 | if (hg == -100) { |
2516 | /* FIXME this log message is not correct if we end up here | ||
2517 | * after an attempted attach on a diskless node. | ||
2518 | * We just refuse to attach -- well, we drop the "connection" | ||
2519 | * to that disk, in a way... */ | ||
2516 | dev_alert(DEV, "Split-Brain detected, dropping connection!\n"); | 2520 | dev_alert(DEV, "Split-Brain detected, dropping connection!\n"); |
2517 | drbd_khelper(mdev, "split-brain"); | 2521 | drbd_khelper(mdev, "split-brain"); |
2518 | return C_MASK; | 2522 | return C_MASK; |
@@ -2538,6 +2542,16 @@ static enum drbd_conns drbd_sync_handshake(struct drbd_conf *mdev, enum drbd_rol | |||
2538 | } | 2542 | } |
2539 | } | 2543 | } |
2540 | 2544 | ||
2545 | if (mdev->net_conf->dry_run || test_bit(CONN_DRY_RUN, &mdev->flags)) { | ||
2546 | if (hg == 0) | ||
2547 | dev_info(DEV, "dry-run connect: No resync, would become Connected immediately.\n"); | ||
2548 | else | ||
2549 | dev_info(DEV, "dry-run connect: Would become %s, doing a %s resync.", | ||
2550 | drbd_conn_str(hg > 0 ? C_SYNC_SOURCE : C_SYNC_TARGET), | ||
2551 | abs(hg) >= 2 ? "full" : "bit-map based"); | ||
2552 | return C_MASK; | ||
2553 | } | ||
2554 | |||
2541 | if (abs(hg) >= 2) { | 2555 | if (abs(hg) >= 2) { |
2542 | dev_info(DEV, "Writing the whole bitmap, full sync required after drbd_sync_handshake.\n"); | 2556 | dev_info(DEV, "Writing the whole bitmap, full sync required after drbd_sync_handshake.\n"); |
2543 | if (drbd_bitmap_io(mdev, &drbd_bmio_set_n_write, "set_n_write from sync_handshake")) | 2557 | if (drbd_bitmap_io(mdev, &drbd_bmio_set_n_write, "set_n_write from sync_handshake")) |
@@ -2585,7 +2599,7 @@ static int receive_protocol(struct drbd_conf *mdev, struct p_header *h) | |||
2585 | struct p_protocol *p = (struct p_protocol *)h; | 2599 | struct p_protocol *p = (struct p_protocol *)h; |
2586 | int header_size, data_size; | 2600 | int header_size, data_size; |
2587 | int p_proto, p_after_sb_0p, p_after_sb_1p, p_after_sb_2p; | 2601 | int p_proto, p_after_sb_0p, p_after_sb_1p, p_after_sb_2p; |
2588 | int p_want_lose, p_two_primaries; | 2602 | int p_want_lose, p_two_primaries, cf; |
2589 | char p_integrity_alg[SHARED_SECRET_MAX] = ""; | 2603 | char p_integrity_alg[SHARED_SECRET_MAX] = ""; |
2590 | 2604 | ||
2591 | header_size = sizeof(*p) - sizeof(*h); | 2605 | header_size = sizeof(*p) - sizeof(*h); |
@@ -2598,8 +2612,14 @@ static int receive_protocol(struct drbd_conf *mdev, struct p_header *h) | |||
2598 | p_after_sb_0p = be32_to_cpu(p->after_sb_0p); | 2612 | p_after_sb_0p = be32_to_cpu(p->after_sb_0p); |
2599 | p_after_sb_1p = be32_to_cpu(p->after_sb_1p); | 2613 | p_after_sb_1p = be32_to_cpu(p->after_sb_1p); |
2600 | p_after_sb_2p = be32_to_cpu(p->after_sb_2p); | 2614 | p_after_sb_2p = be32_to_cpu(p->after_sb_2p); |
2601 | p_want_lose = be32_to_cpu(p->want_lose); | ||
2602 | p_two_primaries = be32_to_cpu(p->two_primaries); | 2615 | p_two_primaries = be32_to_cpu(p->two_primaries); |
2616 | cf = be32_to_cpu(p->conn_flags); | ||
2617 | p_want_lose = cf & CF_WANT_LOSE; | ||
2618 | |||
2619 | clear_bit(CONN_DRY_RUN, &mdev->flags); | ||
2620 | |||
2621 | if (cf & CF_DRY_RUN) | ||
2622 | set_bit(CONN_DRY_RUN, &mdev->flags); | ||
2603 | 2623 | ||
2604 | if (p_proto != mdev->net_conf->wire_protocol) { | 2624 | if (p_proto != mdev->net_conf->wire_protocol) { |
2605 | dev_err(DEV, "incompatible communication protocols\n"); | 2625 | dev_err(DEV, "incompatible communication protocols\n"); |
@@ -3118,13 +3138,16 @@ static int receive_state(struct drbd_conf *mdev, struct p_header *h) | |||
3118 | 3138 | ||
3119 | put_ldev(mdev); | 3139 | put_ldev(mdev); |
3120 | if (nconn == C_MASK) { | 3140 | if (nconn == C_MASK) { |
3141 | nconn = C_CONNECTED; | ||
3121 | if (mdev->state.disk == D_NEGOTIATING) { | 3142 | if (mdev->state.disk == D_NEGOTIATING) { |
3122 | drbd_force_state(mdev, NS(disk, D_DISKLESS)); | 3143 | drbd_force_state(mdev, NS(disk, D_DISKLESS)); |
3123 | nconn = C_CONNECTED; | ||
3124 | } else if (peer_state.disk == D_NEGOTIATING) { | 3144 | } else if (peer_state.disk == D_NEGOTIATING) { |
3125 | dev_err(DEV, "Disk attach process on the peer node was aborted.\n"); | 3145 | dev_err(DEV, "Disk attach process on the peer node was aborted.\n"); |
3126 | peer_state.disk = D_DISKLESS; | 3146 | peer_state.disk = D_DISKLESS; |
3147 | real_peer_disk = D_DISKLESS; | ||
3127 | } else { | 3148 | } else { |
3149 | if (test_and_clear_bit(CONN_DRY_RUN, &mdev->flags)) | ||
3150 | return FALSE; | ||
3128 | D_ASSERT(oconn == C_WF_REPORT_PARAMS); | 3151 | D_ASSERT(oconn == C_WF_REPORT_PARAMS); |
3129 | drbd_force_state(mdev, NS(conn, C_DISCONNECTING)); | 3152 | drbd_force_state(mdev, NS(conn, C_DISCONNECTING)); |
3130 | return FALSE; | 3153 | return FALSE; |
@@ -3594,10 +3617,7 @@ static void drbd_disconnect(struct drbd_conf *mdev) | |||
3594 | 3617 | ||
3595 | /* asender does not clean up anything. it must not interfere, either */ | 3618 | /* asender does not clean up anything. it must not interfere, either */ |
3596 | drbd_thread_stop(&mdev->asender); | 3619 | drbd_thread_stop(&mdev->asender); |
3597 | |||
3598 | mutex_lock(&mdev->data.mutex); | ||
3599 | drbd_free_sock(mdev); | 3620 | drbd_free_sock(mdev); |
3600 | mutex_unlock(&mdev->data.mutex); | ||
3601 | 3621 | ||
3602 | spin_lock_irq(&mdev->req_lock); | 3622 | spin_lock_irq(&mdev->req_lock); |
3603 | _drbd_wait_ee_list_empty(mdev, &mdev->active_ee); | 3623 | _drbd_wait_ee_list_empty(mdev, &mdev->active_ee); |
@@ -4054,6 +4074,8 @@ static int got_PingAck(struct drbd_conf *mdev, struct p_header *h) | |||
4054 | { | 4074 | { |
4055 | /* restore idle timeout */ | 4075 | /* restore idle timeout */ |
4056 | mdev->meta.socket->sk->sk_rcvtimeo = mdev->net_conf->ping_int*HZ; | 4076 | mdev->meta.socket->sk->sk_rcvtimeo = mdev->net_conf->ping_int*HZ; |
4077 | if (!test_and_set_bit(GOT_PING_ACK, &mdev->flags)) | ||
4078 | wake_up(&mdev->misc_wait); | ||
4057 | 4079 | ||
4058 | return TRUE; | 4080 | return TRUE; |
4059 | } | 4081 | } |
diff --git a/drivers/block/drbd/drbd_worker.c b/drivers/block/drbd/drbd_worker.c index b453c2bca3be..44bf6d11197e 100644 --- a/drivers/block/drbd/drbd_worker.c +++ b/drivers/block/drbd/drbd_worker.c | |||
@@ -938,7 +938,8 @@ int w_e_end_csum_rs_req(struct drbd_conf *mdev, struct drbd_work *w, int cancel) | |||
938 | 938 | ||
939 | if (eq) { | 939 | if (eq) { |
940 | drbd_set_in_sync(mdev, e->sector, e->size); | 940 | drbd_set_in_sync(mdev, e->sector, e->size); |
941 | mdev->rs_same_csum++; | 941 | /* rs_same_csums unit is BM_BLOCK_SIZE */ |
942 | mdev->rs_same_csum += e->size >> BM_BLOCK_SHIFT; | ||
942 | ok = drbd_send_ack(mdev, P_RS_IS_IN_SYNC, e); | 943 | ok = drbd_send_ack(mdev, P_RS_IS_IN_SYNC, e); |
943 | } else { | 944 | } else { |
944 | inc_rs_pending(mdev); | 945 | inc_rs_pending(mdev); |
@@ -1288,6 +1289,14 @@ int drbd_alter_sa(struct drbd_conf *mdev, int na) | |||
1288 | return retcode; | 1289 | return retcode; |
1289 | } | 1290 | } |
1290 | 1291 | ||
1292 | static void ping_peer(struct drbd_conf *mdev) | ||
1293 | { | ||
1294 | clear_bit(GOT_PING_ACK, &mdev->flags); | ||
1295 | request_ping(mdev); | ||
1296 | wait_event(mdev->misc_wait, | ||
1297 | test_bit(GOT_PING_ACK, &mdev->flags) || mdev->state.conn < C_CONNECTED); | ||
1298 | } | ||
1299 | |||
1291 | /** | 1300 | /** |
1292 | * drbd_start_resync() - Start the resync process | 1301 | * drbd_start_resync() - Start the resync process |
1293 | * @mdev: DRBD device. | 1302 | * @mdev: DRBD device. |
@@ -1371,7 +1380,6 @@ void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side) | |||
1371 | _drbd_pause_after(mdev); | 1380 | _drbd_pause_after(mdev); |
1372 | } | 1381 | } |
1373 | write_unlock_irq(&global_state_lock); | 1382 | write_unlock_irq(&global_state_lock); |
1374 | drbd_state_unlock(mdev); | ||
1375 | put_ldev(mdev); | 1383 | put_ldev(mdev); |
1376 | 1384 | ||
1377 | if (r == SS_SUCCESS) { | 1385 | if (r == SS_SUCCESS) { |
@@ -1382,11 +1390,8 @@ void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side) | |||
1382 | 1390 | ||
1383 | if (mdev->rs_total == 0) { | 1391 | if (mdev->rs_total == 0) { |
1384 | /* Peer still reachable? Beware of failing before-resync-target handlers! */ | 1392 | /* Peer still reachable? Beware of failing before-resync-target handlers! */ |
1385 | request_ping(mdev); | 1393 | ping_peer(mdev); |
1386 | __set_current_state(TASK_INTERRUPTIBLE); | ||
1387 | schedule_timeout(mdev->net_conf->ping_timeo*HZ/9); /* 9 instead 10 */ | ||
1388 | drbd_resync_finished(mdev); | 1394 | drbd_resync_finished(mdev); |
1389 | return; | ||
1390 | } | 1395 | } |
1391 | 1396 | ||
1392 | /* ns.conn may already be != mdev->state.conn, | 1397 | /* ns.conn may already be != mdev->state.conn, |
@@ -1398,6 +1403,7 @@ void drbd_start_resync(struct drbd_conf *mdev, enum drbd_conns side) | |||
1398 | 1403 | ||
1399 | drbd_md_sync(mdev); | 1404 | drbd_md_sync(mdev); |
1400 | } | 1405 | } |
1406 | drbd_state_unlock(mdev); | ||
1401 | } | 1407 | } |
1402 | 1408 | ||
1403 | int drbd_worker(struct drbd_thread *thi) | 1409 | int drbd_worker(struct drbd_thread *thi) |
diff --git a/drivers/block/loop.c b/drivers/block/loop.c index cb69929d917a..8546d123b9a7 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c | |||
@@ -237,6 +237,8 @@ static int do_lo_send_aops(struct loop_device *lo, struct bio_vec *bvec, | |||
237 | if (ret) | 237 | if (ret) |
238 | goto fail; | 238 | goto fail; |
239 | 239 | ||
240 | file_update_time(file); | ||
241 | |||
240 | transfer_result = lo_do_transfer(lo, WRITE, page, offset, | 242 | transfer_result = lo_do_transfer(lo, WRITE, page, offset, |
241 | bvec->bv_page, bv_offs, size, IV); | 243 | bvec->bv_page, bv_offs, size, IV); |
242 | copied = size; | 244 | copied = size; |
diff --git a/drivers/block/paride/pcd.c b/drivers/block/paride/pcd.c index 8866ca369d5e..71acf4e53356 100644 --- a/drivers/block/paride/pcd.c +++ b/drivers/block/paride/pcd.c | |||
@@ -341,11 +341,11 @@ static int pcd_wait(struct pcd_unit *cd, int go, int stop, char *fun, char *msg) | |||
341 | && (j++ < PCD_SPIN)) | 341 | && (j++ < PCD_SPIN)) |
342 | udelay(PCD_DELAY); | 342 | udelay(PCD_DELAY); |
343 | 343 | ||
344 | if ((r & (IDE_ERR & stop)) || (j >= PCD_SPIN)) { | 344 | if ((r & (IDE_ERR & stop)) || (j > PCD_SPIN)) { |
345 | s = read_reg(cd, 7); | 345 | s = read_reg(cd, 7); |
346 | e = read_reg(cd, 1); | 346 | e = read_reg(cd, 1); |
347 | p = read_reg(cd, 2); | 347 | p = read_reg(cd, 2); |
348 | if (j >= PCD_SPIN) | 348 | if (j > PCD_SPIN) |
349 | e |= 0x100; | 349 | e |= 0x100; |
350 | if (fun) | 350 | if (fun) |
351 | printk("%s: %s %s: alt=0x%x stat=0x%x err=0x%x" | 351 | printk("%s: %s %s: alt=0x%x stat=0x%x err=0x%x" |
diff --git a/drivers/block/paride/pf.c b/drivers/block/paride/pf.c index ddb4f9abd480..c059aab3006b 100644 --- a/drivers/block/paride/pf.c +++ b/drivers/block/paride/pf.c | |||
@@ -391,11 +391,11 @@ static int pf_wait(struct pf_unit *pf, int go, int stop, char *fun, char *msg) | |||
391 | && (j++ < PF_SPIN)) | 391 | && (j++ < PF_SPIN)) |
392 | udelay(PF_SPIN_DEL); | 392 | udelay(PF_SPIN_DEL); |
393 | 393 | ||
394 | if ((r & (STAT_ERR & stop)) || (j >= PF_SPIN)) { | 394 | if ((r & (STAT_ERR & stop)) || (j > PF_SPIN)) { |
395 | s = read_reg(pf, 7); | 395 | s = read_reg(pf, 7); |
396 | e = read_reg(pf, 1); | 396 | e = read_reg(pf, 1); |
397 | p = read_reg(pf, 2); | 397 | p = read_reg(pf, 2); |
398 | if (j >= PF_SPIN) | 398 | if (j > PF_SPIN) |
399 | e |= 0x100; | 399 | e |= 0x100; |
400 | if (fun) | 400 | if (fun) |
401 | printk("%s: %s %s: alt=0x%x stat=0x%x err=0x%x" | 401 | printk("%s: %s %s: alt=0x%x stat=0x%x err=0x%x" |
diff --git a/drivers/block/paride/pt.c b/drivers/block/paride/pt.c index 1e4006e18f03..bc5825fdeaab 100644 --- a/drivers/block/paride/pt.c +++ b/drivers/block/paride/pt.c | |||
@@ -274,11 +274,11 @@ static int pt_wait(struct pt_unit *tape, int go, int stop, char *fun, char *msg) | |||
274 | && (j++ < PT_SPIN)) | 274 | && (j++ < PT_SPIN)) |
275 | udelay(PT_SPIN_DEL); | 275 | udelay(PT_SPIN_DEL); |
276 | 276 | ||
277 | if ((r & (STAT_ERR & stop)) || (j >= PT_SPIN)) { | 277 | if ((r & (STAT_ERR & stop)) || (j > PT_SPIN)) { |
278 | s = read_reg(pi, 7); | 278 | s = read_reg(pi, 7); |
279 | e = read_reg(pi, 1); | 279 | e = read_reg(pi, 1); |
280 | p = read_reg(pi, 2); | 280 | p = read_reg(pi, 2); |
281 | if (j >= PT_SPIN) | 281 | if (j > PT_SPIN) |
282 | e |= 0x100; | 282 | e |= 0x100; |
283 | if (fun) | 283 | if (fun) |
284 | printk("%s: %s %s: alt=0x%x stat=0x%x err=0x%x" | 284 | printk("%s: %s %s: alt=0x%x stat=0x%x err=0x%x" |
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c index 4b12b820c9a6..2138a7ae050c 100644 --- a/drivers/block/virtio_blk.c +++ b/drivers/block/virtio_blk.c | |||
@@ -348,14 +348,13 @@ static int __devinit virtblk_probe(struct virtio_device *vdev) | |||
348 | set_capacity(vblk->disk, cap); | 348 | set_capacity(vblk->disk, cap); |
349 | 349 | ||
350 | /* We can handle whatever the host told us to handle. */ | 350 | /* We can handle whatever the host told us to handle. */ |
351 | blk_queue_max_phys_segments(q, vblk->sg_elems-2); | 351 | blk_queue_max_segments(q, vblk->sg_elems-2); |
352 | blk_queue_max_hw_segments(q, vblk->sg_elems-2); | ||
353 | 352 | ||
354 | /* No need to bounce any requests */ | 353 | /* No need to bounce any requests */ |
355 | blk_queue_bounce_limit(q, BLK_BOUNCE_ANY); | 354 | blk_queue_bounce_limit(q, BLK_BOUNCE_ANY); |
356 | 355 | ||
357 | /* No real sector limit. */ | 356 | /* No real sector limit. */ |
358 | blk_queue_max_sectors(q, -1U); | 357 | blk_queue_max_hw_sectors(q, -1U); |
359 | 358 | ||
360 | /* Host can optionally specify maximum segment size and number of | 359 | /* Host can optionally specify maximum segment size and number of |
361 | * segments. */ | 360 | * segments. */ |
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index d41331bc2aa7..aa4248efc5d8 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c | |||
@@ -1817,8 +1817,6 @@ static int intel_845_configure(void) | |||
1817 | pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1)); | 1817 | pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1)); |
1818 | /* clear any possible error conditions */ | 1818 | /* clear any possible error conditions */ |
1819 | pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c); | 1819 | pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c); |
1820 | |||
1821 | intel_i830_setup_flush(); | ||
1822 | return 0; | 1820 | return 0; |
1823 | } | 1821 | } |
1824 | 1822 | ||
@@ -2188,7 +2186,6 @@ static const struct agp_bridge_driver intel_845_driver = { | |||
2188 | .agp_destroy_page = agp_generic_destroy_page, | 2186 | .agp_destroy_page = agp_generic_destroy_page, |
2189 | .agp_destroy_pages = agp_generic_destroy_pages, | 2187 | .agp_destroy_pages = agp_generic_destroy_pages, |
2190 | .agp_type_to_mask_type = agp_generic_type_to_mask_type, | 2188 | .agp_type_to_mask_type = agp_generic_type_to_mask_type, |
2191 | .chipset_flush = intel_i830_chipset_flush, | ||
2192 | }; | 2189 | }; |
2193 | 2190 | ||
2194 | static const struct agp_bridge_driver intel_850_driver = { | 2191 | static const struct agp_bridge_driver intel_850_driver = { |
diff --git a/drivers/firewire/core-cdev.c b/drivers/firewire/core-cdev.c index 702dcc98c074..14a34d99eea2 100644 --- a/drivers/firewire/core-cdev.c +++ b/drivers/firewire/core-cdev.c | |||
@@ -960,6 +960,8 @@ static int ioctl_queue_iso(struct client *client, union ioctl_arg *arg) | |||
960 | u.packet.header_length = GET_HEADER_LENGTH(control); | 960 | u.packet.header_length = GET_HEADER_LENGTH(control); |
961 | 961 | ||
962 | if (ctx->type == FW_ISO_CONTEXT_TRANSMIT) { | 962 | if (ctx->type == FW_ISO_CONTEXT_TRANSMIT) { |
963 | if (u.packet.header_length % 4 != 0) | ||
964 | return -EINVAL; | ||
963 | header_length = u.packet.header_length; | 965 | header_length = u.packet.header_length; |
964 | } else { | 966 | } else { |
965 | /* | 967 | /* |
@@ -969,7 +971,8 @@ static int ioctl_queue_iso(struct client *client, union ioctl_arg *arg) | |||
969 | if (ctx->header_size == 0) { | 971 | if (ctx->header_size == 0) { |
970 | if (u.packet.header_length > 0) | 972 | if (u.packet.header_length > 0) |
971 | return -EINVAL; | 973 | return -EINVAL; |
972 | } else if (u.packet.header_length % ctx->header_size != 0) { | 974 | } else if (u.packet.header_length == 0 || |
975 | u.packet.header_length % ctx->header_size != 0) { | ||
973 | return -EINVAL; | 976 | return -EINVAL; |
974 | } | 977 | } |
975 | header_length = 0; | 978 | header_length = 0; |
@@ -1354,24 +1357,24 @@ static int dispatch_ioctl(struct client *client, | |||
1354 | return -ENODEV; | 1357 | return -ENODEV; |
1355 | 1358 | ||
1356 | if (_IOC_TYPE(cmd) != '#' || | 1359 | if (_IOC_TYPE(cmd) != '#' || |
1357 | _IOC_NR(cmd) >= ARRAY_SIZE(ioctl_handlers)) | 1360 | _IOC_NR(cmd) >= ARRAY_SIZE(ioctl_handlers) || |
1361 | _IOC_SIZE(cmd) > sizeof(buffer)) | ||
1358 | return -EINVAL; | 1362 | return -EINVAL; |
1359 | 1363 | ||
1360 | if (_IOC_DIR(cmd) & _IOC_WRITE) { | 1364 | if (_IOC_DIR(cmd) == _IOC_READ) |
1361 | if (_IOC_SIZE(cmd) > sizeof(buffer) || | 1365 | memset(&buffer, 0, _IOC_SIZE(cmd)); |
1362 | copy_from_user(&buffer, arg, _IOC_SIZE(cmd))) | 1366 | |
1367 | if (_IOC_DIR(cmd) & _IOC_WRITE) | ||
1368 | if (copy_from_user(&buffer, arg, _IOC_SIZE(cmd))) | ||
1363 | return -EFAULT; | 1369 | return -EFAULT; |
1364 | } | ||
1365 | 1370 | ||
1366 | ret = ioctl_handlers[_IOC_NR(cmd)](client, &buffer); | 1371 | ret = ioctl_handlers[_IOC_NR(cmd)](client, &buffer); |
1367 | if (ret < 0) | 1372 | if (ret < 0) |
1368 | return ret; | 1373 | return ret; |
1369 | 1374 | ||
1370 | if (_IOC_DIR(cmd) & _IOC_READ) { | 1375 | if (_IOC_DIR(cmd) & _IOC_READ) |
1371 | if (_IOC_SIZE(cmd) > sizeof(buffer) || | 1376 | if (copy_to_user(arg, &buffer, _IOC_SIZE(cmd))) |
1372 | copy_to_user(arg, &buffer, _IOC_SIZE(cmd))) | ||
1373 | return -EFAULT; | 1377 | return -EFAULT; |
1374 | } | ||
1375 | 1378 | ||
1376 | return ret; | 1379 | return ret; |
1377 | } | 1380 | } |
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 2cc6e87d849d..18f41d7061f0 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c | |||
@@ -85,6 +85,8 @@ static struct edid_quirk { | |||
85 | 85 | ||
86 | /* Envision Peripherals, Inc. EN-7100e */ | 86 | /* Envision Peripherals, Inc. EN-7100e */ |
87 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, | 87 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, |
88 | /* Envision EN2028 */ | ||
89 | { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, | ||
88 | 90 | ||
89 | /* Funai Electronics PM36B */ | 91 | /* Funai Electronics PM36B */ |
90 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | | 92 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index b574503dddd0..a0b8447b06e7 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -226,7 +226,7 @@ static int i915_gem_fence_regs_info(struct seq_file *m, void *data) | |||
226 | } else { | 226 | } else { |
227 | struct drm_i915_gem_object *obj_priv; | 227 | struct drm_i915_gem_object *obj_priv; |
228 | 228 | ||
229 | obj_priv = obj->driver_private; | 229 | obj_priv = to_intel_bo(obj); |
230 | seq_printf(m, "Fenced object[%2d] = %p: %s " | 230 | seq_printf(m, "Fenced object[%2d] = %p: %s " |
231 | "%08x %08zx %08x %s %08x %08x %d", | 231 | "%08x %08zx %08x %s %08x %08x %d", |
232 | i, obj, get_pin_flag(obj_priv), | 232 | i, obj, get_pin_flag(obj_priv), |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 4b26919abdb2..0af3dcc85ce9 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -80,14 +80,14 @@ const static struct intel_device_info intel_i915g_info = { | |||
80 | .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1, | 80 | .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1, |
81 | }; | 81 | }; |
82 | const static struct intel_device_info intel_i915gm_info = { | 82 | const static struct intel_device_info intel_i915gm_info = { |
83 | .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1, | 83 | .is_i9xx = 1, .is_mobile = 1, |
84 | .cursor_needs_physical = 1, | 84 | .cursor_needs_physical = 1, |
85 | }; | 85 | }; |
86 | const static struct intel_device_info intel_i945g_info = { | 86 | const static struct intel_device_info intel_i945g_info = { |
87 | .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1, | 87 | .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1, |
88 | }; | 88 | }; |
89 | const static struct intel_device_info intel_i945gm_info = { | 89 | const static struct intel_device_info intel_i945gm_info = { |
90 | .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1, | 90 | .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, |
91 | .has_hotplug = 1, .cursor_needs_physical = 1, | 91 | .has_hotplug = 1, .cursor_needs_physical = 1, |
92 | }; | 92 | }; |
93 | 93 | ||
@@ -361,7 +361,7 @@ int i965_reset(struct drm_device *dev, u8 flags) | |||
361 | !dev_priv->mm.suspended) { | 361 | !dev_priv->mm.suspended) { |
362 | drm_i915_ring_buffer_t *ring = &dev_priv->ring; | 362 | drm_i915_ring_buffer_t *ring = &dev_priv->ring; |
363 | struct drm_gem_object *obj = ring->ring_obj; | 363 | struct drm_gem_object *obj = ring->ring_obj; |
364 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 364 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
365 | dev_priv->mm.suspended = 0; | 365 | dev_priv->mm.suspended = 0; |
366 | 366 | ||
367 | /* Stop the ring if it's running. */ | 367 | /* Stop the ring if it's running. */ |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index aba8260fbc5e..6960849522f8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -611,6 +611,8 @@ typedef struct drm_i915_private { | |||
611 | /* Reclocking support */ | 611 | /* Reclocking support */ |
612 | bool render_reclock_avail; | 612 | bool render_reclock_avail; |
613 | bool lvds_downclock_avail; | 613 | bool lvds_downclock_avail; |
614 | /* indicate whether the LVDS EDID is OK */ | ||
615 | bool lvds_edid_good; | ||
614 | /* indicates the reduced downclock for LVDS*/ | 616 | /* indicates the reduced downclock for LVDS*/ |
615 | int lvds_downclock; | 617 | int lvds_downclock; |
616 | struct work_struct idle_work; | 618 | struct work_struct idle_work; |
@@ -731,6 +733,8 @@ struct drm_i915_gem_object { | |||
731 | atomic_t pending_flip; | 733 | atomic_t pending_flip; |
732 | }; | 734 | }; |
733 | 735 | ||
736 | #define to_intel_bo(x) ((struct drm_i915_gem_object *) (x)->driver_private) | ||
737 | |||
734 | /** | 738 | /** |
735 | * Request queue structure. | 739 | * Request queue structure. |
736 | * | 740 | * |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 368d726853d1..80871c62a571 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -163,7 +163,7 @@ fast_shmem_read(struct page **pages, | |||
163 | static int i915_gem_object_needs_bit17_swizzle(struct drm_gem_object *obj) | 163 | static int i915_gem_object_needs_bit17_swizzle(struct drm_gem_object *obj) |
164 | { | 164 | { |
165 | drm_i915_private_t *dev_priv = obj->dev->dev_private; | 165 | drm_i915_private_t *dev_priv = obj->dev->dev_private; |
166 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 166 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
167 | 167 | ||
168 | return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 && | 168 | return dev_priv->mm.bit_6_swizzle_x == I915_BIT_6_SWIZZLE_9_10_17 && |
169 | obj_priv->tiling_mode != I915_TILING_NONE; | 169 | obj_priv->tiling_mode != I915_TILING_NONE; |
@@ -264,7 +264,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
264 | struct drm_i915_gem_pread *args, | 264 | struct drm_i915_gem_pread *args, |
265 | struct drm_file *file_priv) | 265 | struct drm_file *file_priv) |
266 | { | 266 | { |
267 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 267 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
268 | ssize_t remain; | 268 | ssize_t remain; |
269 | loff_t offset, page_base; | 269 | loff_t offset, page_base; |
270 | char __user *user_data; | 270 | char __user *user_data; |
@@ -285,7 +285,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
285 | if (ret != 0) | 285 | if (ret != 0) |
286 | goto fail_put_pages; | 286 | goto fail_put_pages; |
287 | 287 | ||
288 | obj_priv = obj->driver_private; | 288 | obj_priv = to_intel_bo(obj); |
289 | offset = args->offset; | 289 | offset = args->offset; |
290 | 290 | ||
291 | while (remain > 0) { | 291 | while (remain > 0) { |
@@ -354,7 +354,7 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
354 | struct drm_i915_gem_pread *args, | 354 | struct drm_i915_gem_pread *args, |
355 | struct drm_file *file_priv) | 355 | struct drm_file *file_priv) |
356 | { | 356 | { |
357 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 357 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
358 | struct mm_struct *mm = current->mm; | 358 | struct mm_struct *mm = current->mm; |
359 | struct page **user_pages; | 359 | struct page **user_pages; |
360 | ssize_t remain; | 360 | ssize_t remain; |
@@ -403,7 +403,7 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
403 | if (ret != 0) | 403 | if (ret != 0) |
404 | goto fail_put_pages; | 404 | goto fail_put_pages; |
405 | 405 | ||
406 | obj_priv = obj->driver_private; | 406 | obj_priv = to_intel_bo(obj); |
407 | offset = args->offset; | 407 | offset = args->offset; |
408 | 408 | ||
409 | while (remain > 0) { | 409 | while (remain > 0) { |
@@ -479,7 +479,7 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data, | |||
479 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 479 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
480 | if (obj == NULL) | 480 | if (obj == NULL) |
481 | return -EBADF; | 481 | return -EBADF; |
482 | obj_priv = obj->driver_private; | 482 | obj_priv = to_intel_bo(obj); |
483 | 483 | ||
484 | /* Bounds check source. | 484 | /* Bounds check source. |
485 | * | 485 | * |
@@ -581,7 +581,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
581 | struct drm_i915_gem_pwrite *args, | 581 | struct drm_i915_gem_pwrite *args, |
582 | struct drm_file *file_priv) | 582 | struct drm_file *file_priv) |
583 | { | 583 | { |
584 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 584 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
585 | drm_i915_private_t *dev_priv = dev->dev_private; | 585 | drm_i915_private_t *dev_priv = dev->dev_private; |
586 | ssize_t remain; | 586 | ssize_t remain; |
587 | loff_t offset, page_base; | 587 | loff_t offset, page_base; |
@@ -605,7 +605,7 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
605 | if (ret) | 605 | if (ret) |
606 | goto fail; | 606 | goto fail; |
607 | 607 | ||
608 | obj_priv = obj->driver_private; | 608 | obj_priv = to_intel_bo(obj); |
609 | offset = obj_priv->gtt_offset + args->offset; | 609 | offset = obj_priv->gtt_offset + args->offset; |
610 | 610 | ||
611 | while (remain > 0) { | 611 | while (remain > 0) { |
@@ -655,7 +655,7 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
655 | struct drm_i915_gem_pwrite *args, | 655 | struct drm_i915_gem_pwrite *args, |
656 | struct drm_file *file_priv) | 656 | struct drm_file *file_priv) |
657 | { | 657 | { |
658 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 658 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
659 | drm_i915_private_t *dev_priv = dev->dev_private; | 659 | drm_i915_private_t *dev_priv = dev->dev_private; |
660 | ssize_t remain; | 660 | ssize_t remain; |
661 | loff_t gtt_page_base, offset; | 661 | loff_t gtt_page_base, offset; |
@@ -699,7 +699,7 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
699 | if (ret) | 699 | if (ret) |
700 | goto out_unpin_object; | 700 | goto out_unpin_object; |
701 | 701 | ||
702 | obj_priv = obj->driver_private; | 702 | obj_priv = to_intel_bo(obj); |
703 | offset = obj_priv->gtt_offset + args->offset; | 703 | offset = obj_priv->gtt_offset + args->offset; |
704 | 704 | ||
705 | while (remain > 0) { | 705 | while (remain > 0) { |
@@ -761,7 +761,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
761 | struct drm_i915_gem_pwrite *args, | 761 | struct drm_i915_gem_pwrite *args, |
762 | struct drm_file *file_priv) | 762 | struct drm_file *file_priv) |
763 | { | 763 | { |
764 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 764 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
765 | ssize_t remain; | 765 | ssize_t remain; |
766 | loff_t offset, page_base; | 766 | loff_t offset, page_base; |
767 | char __user *user_data; | 767 | char __user *user_data; |
@@ -781,7 +781,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev, struct drm_gem_object *obj, | |||
781 | if (ret != 0) | 781 | if (ret != 0) |
782 | goto fail_put_pages; | 782 | goto fail_put_pages; |
783 | 783 | ||
784 | obj_priv = obj->driver_private; | 784 | obj_priv = to_intel_bo(obj); |
785 | offset = args->offset; | 785 | offset = args->offset; |
786 | obj_priv->dirty = 1; | 786 | obj_priv->dirty = 1; |
787 | 787 | ||
@@ -829,7 +829,7 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
829 | struct drm_i915_gem_pwrite *args, | 829 | struct drm_i915_gem_pwrite *args, |
830 | struct drm_file *file_priv) | 830 | struct drm_file *file_priv) |
831 | { | 831 | { |
832 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 832 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
833 | struct mm_struct *mm = current->mm; | 833 | struct mm_struct *mm = current->mm; |
834 | struct page **user_pages; | 834 | struct page **user_pages; |
835 | ssize_t remain; | 835 | ssize_t remain; |
@@ -877,7 +877,7 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, struct drm_gem_object *obj, | |||
877 | if (ret != 0) | 877 | if (ret != 0) |
878 | goto fail_put_pages; | 878 | goto fail_put_pages; |
879 | 879 | ||
880 | obj_priv = obj->driver_private; | 880 | obj_priv = to_intel_bo(obj); |
881 | offset = args->offset; | 881 | offset = args->offset; |
882 | obj_priv->dirty = 1; | 882 | obj_priv->dirty = 1; |
883 | 883 | ||
@@ -952,7 +952,7 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, | |||
952 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 952 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
953 | if (obj == NULL) | 953 | if (obj == NULL) |
954 | return -EBADF; | 954 | return -EBADF; |
955 | obj_priv = obj->driver_private; | 955 | obj_priv = to_intel_bo(obj); |
956 | 956 | ||
957 | /* Bounds check destination. | 957 | /* Bounds check destination. |
958 | * | 958 | * |
@@ -1034,7 +1034,7 @@ i915_gem_set_domain_ioctl(struct drm_device *dev, void *data, | |||
1034 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 1034 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
1035 | if (obj == NULL) | 1035 | if (obj == NULL) |
1036 | return -EBADF; | 1036 | return -EBADF; |
1037 | obj_priv = obj->driver_private; | 1037 | obj_priv = to_intel_bo(obj); |
1038 | 1038 | ||
1039 | mutex_lock(&dev->struct_mutex); | 1039 | mutex_lock(&dev->struct_mutex); |
1040 | 1040 | ||
@@ -1096,7 +1096,7 @@ i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data, | |||
1096 | DRM_INFO("%s: sw_finish %d (%p %zd)\n", | 1096 | DRM_INFO("%s: sw_finish %d (%p %zd)\n", |
1097 | __func__, args->handle, obj, obj->size); | 1097 | __func__, args->handle, obj, obj->size); |
1098 | #endif | 1098 | #endif |
1099 | obj_priv = obj->driver_private; | 1099 | obj_priv = to_intel_bo(obj); |
1100 | 1100 | ||
1101 | /* Pinned buffers may be scanout, so flush the cache */ | 1101 | /* Pinned buffers may be scanout, so flush the cache */ |
1102 | if (obj_priv->pin_count) | 1102 | if (obj_priv->pin_count) |
@@ -1167,7 +1167,7 @@ int i915_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
1167 | struct drm_gem_object *obj = vma->vm_private_data; | 1167 | struct drm_gem_object *obj = vma->vm_private_data; |
1168 | struct drm_device *dev = obj->dev; | 1168 | struct drm_device *dev = obj->dev; |
1169 | struct drm_i915_private *dev_priv = dev->dev_private; | 1169 | struct drm_i915_private *dev_priv = dev->dev_private; |
1170 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1170 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1171 | pgoff_t page_offset; | 1171 | pgoff_t page_offset; |
1172 | unsigned long pfn; | 1172 | unsigned long pfn; |
1173 | int ret = 0; | 1173 | int ret = 0; |
@@ -1234,7 +1234,7 @@ i915_gem_create_mmap_offset(struct drm_gem_object *obj) | |||
1234 | { | 1234 | { |
1235 | struct drm_device *dev = obj->dev; | 1235 | struct drm_device *dev = obj->dev; |
1236 | struct drm_gem_mm *mm = dev->mm_private; | 1236 | struct drm_gem_mm *mm = dev->mm_private; |
1237 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1237 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1238 | struct drm_map_list *list; | 1238 | struct drm_map_list *list; |
1239 | struct drm_local_map *map; | 1239 | struct drm_local_map *map; |
1240 | int ret = 0; | 1240 | int ret = 0; |
@@ -1305,7 +1305,7 @@ void | |||
1305 | i915_gem_release_mmap(struct drm_gem_object *obj) | 1305 | i915_gem_release_mmap(struct drm_gem_object *obj) |
1306 | { | 1306 | { |
1307 | struct drm_device *dev = obj->dev; | 1307 | struct drm_device *dev = obj->dev; |
1308 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1308 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1309 | 1309 | ||
1310 | if (dev->dev_mapping) | 1310 | if (dev->dev_mapping) |
1311 | unmap_mapping_range(dev->dev_mapping, | 1311 | unmap_mapping_range(dev->dev_mapping, |
@@ -1316,7 +1316,7 @@ static void | |||
1316 | i915_gem_free_mmap_offset(struct drm_gem_object *obj) | 1316 | i915_gem_free_mmap_offset(struct drm_gem_object *obj) |
1317 | { | 1317 | { |
1318 | struct drm_device *dev = obj->dev; | 1318 | struct drm_device *dev = obj->dev; |
1319 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1319 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1320 | struct drm_gem_mm *mm = dev->mm_private; | 1320 | struct drm_gem_mm *mm = dev->mm_private; |
1321 | struct drm_map_list *list; | 1321 | struct drm_map_list *list; |
1322 | 1322 | ||
@@ -1347,7 +1347,7 @@ static uint32_t | |||
1347 | i915_gem_get_gtt_alignment(struct drm_gem_object *obj) | 1347 | i915_gem_get_gtt_alignment(struct drm_gem_object *obj) |
1348 | { | 1348 | { |
1349 | struct drm_device *dev = obj->dev; | 1349 | struct drm_device *dev = obj->dev; |
1350 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1350 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1351 | int start, i; | 1351 | int start, i; |
1352 | 1352 | ||
1353 | /* | 1353 | /* |
@@ -1406,7 +1406,7 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data, | |||
1406 | 1406 | ||
1407 | mutex_lock(&dev->struct_mutex); | 1407 | mutex_lock(&dev->struct_mutex); |
1408 | 1408 | ||
1409 | obj_priv = obj->driver_private; | 1409 | obj_priv = to_intel_bo(obj); |
1410 | 1410 | ||
1411 | if (obj_priv->madv != I915_MADV_WILLNEED) { | 1411 | if (obj_priv->madv != I915_MADV_WILLNEED) { |
1412 | DRM_ERROR("Attempting to mmap a purgeable buffer\n"); | 1412 | DRM_ERROR("Attempting to mmap a purgeable buffer\n"); |
@@ -1450,7 +1450,7 @@ i915_gem_mmap_gtt_ioctl(struct drm_device *dev, void *data, | |||
1450 | void | 1450 | void |
1451 | i915_gem_object_put_pages(struct drm_gem_object *obj) | 1451 | i915_gem_object_put_pages(struct drm_gem_object *obj) |
1452 | { | 1452 | { |
1453 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1453 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1454 | int page_count = obj->size / PAGE_SIZE; | 1454 | int page_count = obj->size / PAGE_SIZE; |
1455 | int i; | 1455 | int i; |
1456 | 1456 | ||
@@ -1486,7 +1486,7 @@ i915_gem_object_move_to_active(struct drm_gem_object *obj, uint32_t seqno) | |||
1486 | { | 1486 | { |
1487 | struct drm_device *dev = obj->dev; | 1487 | struct drm_device *dev = obj->dev; |
1488 | drm_i915_private_t *dev_priv = dev->dev_private; | 1488 | drm_i915_private_t *dev_priv = dev->dev_private; |
1489 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1489 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1490 | 1490 | ||
1491 | /* Add a reference if we're newly entering the active list. */ | 1491 | /* Add a reference if we're newly entering the active list. */ |
1492 | if (!obj_priv->active) { | 1492 | if (!obj_priv->active) { |
@@ -1506,7 +1506,7 @@ i915_gem_object_move_to_flushing(struct drm_gem_object *obj) | |||
1506 | { | 1506 | { |
1507 | struct drm_device *dev = obj->dev; | 1507 | struct drm_device *dev = obj->dev; |
1508 | drm_i915_private_t *dev_priv = dev->dev_private; | 1508 | drm_i915_private_t *dev_priv = dev->dev_private; |
1509 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1509 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1510 | 1510 | ||
1511 | BUG_ON(!obj_priv->active); | 1511 | BUG_ON(!obj_priv->active); |
1512 | list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list); | 1512 | list_move_tail(&obj_priv->list, &dev_priv->mm.flushing_list); |
@@ -1517,7 +1517,7 @@ i915_gem_object_move_to_flushing(struct drm_gem_object *obj) | |||
1517 | static void | 1517 | static void |
1518 | i915_gem_object_truncate(struct drm_gem_object *obj) | 1518 | i915_gem_object_truncate(struct drm_gem_object *obj) |
1519 | { | 1519 | { |
1520 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1520 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1521 | struct inode *inode; | 1521 | struct inode *inode; |
1522 | 1522 | ||
1523 | inode = obj->filp->f_path.dentry->d_inode; | 1523 | inode = obj->filp->f_path.dentry->d_inode; |
@@ -1538,7 +1538,7 @@ i915_gem_object_move_to_inactive(struct drm_gem_object *obj) | |||
1538 | { | 1538 | { |
1539 | struct drm_device *dev = obj->dev; | 1539 | struct drm_device *dev = obj->dev; |
1540 | drm_i915_private_t *dev_priv = dev->dev_private; | 1540 | drm_i915_private_t *dev_priv = dev->dev_private; |
1541 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1541 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1542 | 1542 | ||
1543 | i915_verify_inactive(dev, __FILE__, __LINE__); | 1543 | i915_verify_inactive(dev, __FILE__, __LINE__); |
1544 | if (obj_priv->pin_count != 0) | 1544 | if (obj_priv->pin_count != 0) |
@@ -1965,7 +1965,7 @@ static int | |||
1965 | i915_gem_object_wait_rendering(struct drm_gem_object *obj) | 1965 | i915_gem_object_wait_rendering(struct drm_gem_object *obj) |
1966 | { | 1966 | { |
1967 | struct drm_device *dev = obj->dev; | 1967 | struct drm_device *dev = obj->dev; |
1968 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1968 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1969 | int ret; | 1969 | int ret; |
1970 | 1970 | ||
1971 | /* This function only exists to support waiting for existing rendering, | 1971 | /* This function only exists to support waiting for existing rendering, |
@@ -1997,7 +1997,7 @@ i915_gem_object_unbind(struct drm_gem_object *obj) | |||
1997 | { | 1997 | { |
1998 | struct drm_device *dev = obj->dev; | 1998 | struct drm_device *dev = obj->dev; |
1999 | drm_i915_private_t *dev_priv = dev->dev_private; | 1999 | drm_i915_private_t *dev_priv = dev->dev_private; |
2000 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2000 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2001 | int ret = 0; | 2001 | int ret = 0; |
2002 | 2002 | ||
2003 | #if WATCH_BUF | 2003 | #if WATCH_BUF |
@@ -2173,7 +2173,7 @@ i915_gem_evict_something(struct drm_device *dev, int min_size) | |||
2173 | #if WATCH_LRU | 2173 | #if WATCH_LRU |
2174 | DRM_INFO("%s: evicting %p\n", __func__, obj); | 2174 | DRM_INFO("%s: evicting %p\n", __func__, obj); |
2175 | #endif | 2175 | #endif |
2176 | obj_priv = obj->driver_private; | 2176 | obj_priv = to_intel_bo(obj); |
2177 | BUG_ON(obj_priv->pin_count != 0); | 2177 | BUG_ON(obj_priv->pin_count != 0); |
2178 | BUG_ON(obj_priv->active); | 2178 | BUG_ON(obj_priv->active); |
2179 | 2179 | ||
@@ -2244,7 +2244,7 @@ int | |||
2244 | i915_gem_object_get_pages(struct drm_gem_object *obj, | 2244 | i915_gem_object_get_pages(struct drm_gem_object *obj, |
2245 | gfp_t gfpmask) | 2245 | gfp_t gfpmask) |
2246 | { | 2246 | { |
2247 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2247 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2248 | int page_count, i; | 2248 | int page_count, i; |
2249 | struct address_space *mapping; | 2249 | struct address_space *mapping; |
2250 | struct inode *inode; | 2250 | struct inode *inode; |
@@ -2297,7 +2297,7 @@ static void sandybridge_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2297 | struct drm_gem_object *obj = reg->obj; | 2297 | struct drm_gem_object *obj = reg->obj; |
2298 | struct drm_device *dev = obj->dev; | 2298 | struct drm_device *dev = obj->dev; |
2299 | drm_i915_private_t *dev_priv = dev->dev_private; | 2299 | drm_i915_private_t *dev_priv = dev->dev_private; |
2300 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2300 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2301 | int regnum = obj_priv->fence_reg; | 2301 | int regnum = obj_priv->fence_reg; |
2302 | uint64_t val; | 2302 | uint64_t val; |
2303 | 2303 | ||
@@ -2319,7 +2319,7 @@ static void i965_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2319 | struct drm_gem_object *obj = reg->obj; | 2319 | struct drm_gem_object *obj = reg->obj; |
2320 | struct drm_device *dev = obj->dev; | 2320 | struct drm_device *dev = obj->dev; |
2321 | drm_i915_private_t *dev_priv = dev->dev_private; | 2321 | drm_i915_private_t *dev_priv = dev->dev_private; |
2322 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2322 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2323 | int regnum = obj_priv->fence_reg; | 2323 | int regnum = obj_priv->fence_reg; |
2324 | uint64_t val; | 2324 | uint64_t val; |
2325 | 2325 | ||
@@ -2339,7 +2339,7 @@ static void i915_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2339 | struct drm_gem_object *obj = reg->obj; | 2339 | struct drm_gem_object *obj = reg->obj; |
2340 | struct drm_device *dev = obj->dev; | 2340 | struct drm_device *dev = obj->dev; |
2341 | drm_i915_private_t *dev_priv = dev->dev_private; | 2341 | drm_i915_private_t *dev_priv = dev->dev_private; |
2342 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2342 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2343 | int regnum = obj_priv->fence_reg; | 2343 | int regnum = obj_priv->fence_reg; |
2344 | int tile_width; | 2344 | int tile_width; |
2345 | uint32_t fence_reg, val; | 2345 | uint32_t fence_reg, val; |
@@ -2381,7 +2381,7 @@ static void i830_write_fence_reg(struct drm_i915_fence_reg *reg) | |||
2381 | struct drm_gem_object *obj = reg->obj; | 2381 | struct drm_gem_object *obj = reg->obj; |
2382 | struct drm_device *dev = obj->dev; | 2382 | struct drm_device *dev = obj->dev; |
2383 | drm_i915_private_t *dev_priv = dev->dev_private; | 2383 | drm_i915_private_t *dev_priv = dev->dev_private; |
2384 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2384 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2385 | int regnum = obj_priv->fence_reg; | 2385 | int regnum = obj_priv->fence_reg; |
2386 | uint32_t val; | 2386 | uint32_t val; |
2387 | uint32_t pitch_val; | 2387 | uint32_t pitch_val; |
@@ -2425,7 +2425,7 @@ static int i915_find_fence_reg(struct drm_device *dev) | |||
2425 | if (!reg->obj) | 2425 | if (!reg->obj) |
2426 | return i; | 2426 | return i; |
2427 | 2427 | ||
2428 | obj_priv = reg->obj->driver_private; | 2428 | obj_priv = to_intel_bo(reg->obj); |
2429 | if (!obj_priv->pin_count) | 2429 | if (!obj_priv->pin_count) |
2430 | avail++; | 2430 | avail++; |
2431 | } | 2431 | } |
@@ -2480,7 +2480,7 @@ i915_gem_object_get_fence_reg(struct drm_gem_object *obj) | |||
2480 | { | 2480 | { |
2481 | struct drm_device *dev = obj->dev; | 2481 | struct drm_device *dev = obj->dev; |
2482 | struct drm_i915_private *dev_priv = dev->dev_private; | 2482 | struct drm_i915_private *dev_priv = dev->dev_private; |
2483 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2483 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2484 | struct drm_i915_fence_reg *reg = NULL; | 2484 | struct drm_i915_fence_reg *reg = NULL; |
2485 | int ret; | 2485 | int ret; |
2486 | 2486 | ||
@@ -2547,7 +2547,7 @@ i915_gem_clear_fence_reg(struct drm_gem_object *obj) | |||
2547 | { | 2547 | { |
2548 | struct drm_device *dev = obj->dev; | 2548 | struct drm_device *dev = obj->dev; |
2549 | drm_i915_private_t *dev_priv = dev->dev_private; | 2549 | drm_i915_private_t *dev_priv = dev->dev_private; |
2550 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2550 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2551 | 2551 | ||
2552 | if (IS_GEN6(dev)) { | 2552 | if (IS_GEN6(dev)) { |
2553 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + | 2553 | I915_WRITE64(FENCE_REG_SANDYBRIDGE_0 + |
@@ -2583,7 +2583,7 @@ int | |||
2583 | i915_gem_object_put_fence_reg(struct drm_gem_object *obj) | 2583 | i915_gem_object_put_fence_reg(struct drm_gem_object *obj) |
2584 | { | 2584 | { |
2585 | struct drm_device *dev = obj->dev; | 2585 | struct drm_device *dev = obj->dev; |
2586 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2586 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2587 | 2587 | ||
2588 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE) | 2588 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE) |
2589 | return 0; | 2589 | return 0; |
@@ -2621,7 +2621,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment) | |||
2621 | { | 2621 | { |
2622 | struct drm_device *dev = obj->dev; | 2622 | struct drm_device *dev = obj->dev; |
2623 | drm_i915_private_t *dev_priv = dev->dev_private; | 2623 | drm_i915_private_t *dev_priv = dev->dev_private; |
2624 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2624 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2625 | struct drm_mm_node *free_space; | 2625 | struct drm_mm_node *free_space; |
2626 | gfp_t gfpmask = __GFP_NORETRY | __GFP_NOWARN; | 2626 | gfp_t gfpmask = __GFP_NORETRY | __GFP_NOWARN; |
2627 | int ret; | 2627 | int ret; |
@@ -2728,7 +2728,7 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment) | |||
2728 | void | 2728 | void |
2729 | i915_gem_clflush_object(struct drm_gem_object *obj) | 2729 | i915_gem_clflush_object(struct drm_gem_object *obj) |
2730 | { | 2730 | { |
2731 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2731 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2732 | 2732 | ||
2733 | /* If we don't have a page list set up, then we're not pinned | 2733 | /* If we don't have a page list set up, then we're not pinned |
2734 | * to GPU, and we can ignore the cache flush because it'll happen | 2734 | * to GPU, and we can ignore the cache flush because it'll happen |
@@ -2829,7 +2829,7 @@ i915_gem_object_flush_write_domain(struct drm_gem_object *obj) | |||
2829 | int | 2829 | int |
2830 | i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) | 2830 | i915_gem_object_set_to_gtt_domain(struct drm_gem_object *obj, int write) |
2831 | { | 2831 | { |
2832 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2832 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2833 | uint32_t old_write_domain, old_read_domains; | 2833 | uint32_t old_write_domain, old_read_domains; |
2834 | int ret; | 2834 | int ret; |
2835 | 2835 | ||
@@ -2879,7 +2879,7 @@ int | |||
2879 | i915_gem_object_set_to_display_plane(struct drm_gem_object *obj) | 2879 | i915_gem_object_set_to_display_plane(struct drm_gem_object *obj) |
2880 | { | 2880 | { |
2881 | struct drm_device *dev = obj->dev; | 2881 | struct drm_device *dev = obj->dev; |
2882 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 2882 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
2883 | uint32_t old_write_domain, old_read_domains; | 2883 | uint32_t old_write_domain, old_read_domains; |
2884 | int ret; | 2884 | int ret; |
2885 | 2885 | ||
@@ -3092,7 +3092,7 @@ static void | |||
3092 | i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) | 3092 | i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) |
3093 | { | 3093 | { |
3094 | struct drm_device *dev = obj->dev; | 3094 | struct drm_device *dev = obj->dev; |
3095 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3095 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3096 | uint32_t invalidate_domains = 0; | 3096 | uint32_t invalidate_domains = 0; |
3097 | uint32_t flush_domains = 0; | 3097 | uint32_t flush_domains = 0; |
3098 | uint32_t old_read_domains; | 3098 | uint32_t old_read_domains; |
@@ -3177,7 +3177,7 @@ i915_gem_object_set_to_gpu_domain(struct drm_gem_object *obj) | |||
3177 | static void | 3177 | static void |
3178 | i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) | 3178 | i915_gem_object_set_to_full_cpu_read_domain(struct drm_gem_object *obj) |
3179 | { | 3179 | { |
3180 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3180 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3181 | 3181 | ||
3182 | if (!obj_priv->page_cpu_valid) | 3182 | if (!obj_priv->page_cpu_valid) |
3183 | return; | 3183 | return; |
@@ -3217,7 +3217,7 @@ static int | |||
3217 | i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj, | 3217 | i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj, |
3218 | uint64_t offset, uint64_t size) | 3218 | uint64_t offset, uint64_t size) |
3219 | { | 3219 | { |
3220 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3220 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3221 | uint32_t old_read_domains; | 3221 | uint32_t old_read_domains; |
3222 | int i, ret; | 3222 | int i, ret; |
3223 | 3223 | ||
@@ -3286,7 +3286,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
3286 | { | 3286 | { |
3287 | struct drm_device *dev = obj->dev; | 3287 | struct drm_device *dev = obj->dev; |
3288 | drm_i915_private_t *dev_priv = dev->dev_private; | 3288 | drm_i915_private_t *dev_priv = dev->dev_private; |
3289 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3289 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3290 | int i, ret; | 3290 | int i, ret; |
3291 | void __iomem *reloc_page; | 3291 | void __iomem *reloc_page; |
3292 | bool need_fence; | 3292 | bool need_fence; |
@@ -3337,7 +3337,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj, | |||
3337 | i915_gem_object_unpin(obj); | 3337 | i915_gem_object_unpin(obj); |
3338 | return -EBADF; | 3338 | return -EBADF; |
3339 | } | 3339 | } |
3340 | target_obj_priv = target_obj->driver_private; | 3340 | target_obj_priv = to_intel_bo(target_obj); |
3341 | 3341 | ||
3342 | #if WATCH_RELOC | 3342 | #if WATCH_RELOC |
3343 | DRM_INFO("%s: obj %p offset %08x target %d " | 3343 | DRM_INFO("%s: obj %p offset %08x target %d " |
@@ -3689,7 +3689,7 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev, | |||
3689 | prepare_to_wait(&dev_priv->pending_flip_queue, | 3689 | prepare_to_wait(&dev_priv->pending_flip_queue, |
3690 | &wait, TASK_INTERRUPTIBLE); | 3690 | &wait, TASK_INTERRUPTIBLE); |
3691 | for (i = 0; i < count; i++) { | 3691 | for (i = 0; i < count; i++) { |
3692 | obj_priv = object_list[i]->driver_private; | 3692 | obj_priv = to_intel_bo(object_list[i]); |
3693 | if (atomic_read(&obj_priv->pending_flip) > 0) | 3693 | if (atomic_read(&obj_priv->pending_flip) > 0) |
3694 | break; | 3694 | break; |
3695 | } | 3695 | } |
@@ -3798,7 +3798,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, | |||
3798 | goto err; | 3798 | goto err; |
3799 | } | 3799 | } |
3800 | 3800 | ||
3801 | obj_priv = object_list[i]->driver_private; | 3801 | obj_priv = to_intel_bo(object_list[i]); |
3802 | if (obj_priv->in_execbuffer) { | 3802 | if (obj_priv->in_execbuffer) { |
3803 | DRM_ERROR("Object %p appears more than once in object list\n", | 3803 | DRM_ERROR("Object %p appears more than once in object list\n", |
3804 | object_list[i]); | 3804 | object_list[i]); |
@@ -3924,7 +3924,7 @@ i915_gem_do_execbuffer(struct drm_device *dev, void *data, | |||
3924 | 3924 | ||
3925 | for (i = 0; i < args->buffer_count; i++) { | 3925 | for (i = 0; i < args->buffer_count; i++) { |
3926 | struct drm_gem_object *obj = object_list[i]; | 3926 | struct drm_gem_object *obj = object_list[i]; |
3927 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 3927 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
3928 | uint32_t old_write_domain = obj->write_domain; | 3928 | uint32_t old_write_domain = obj->write_domain; |
3929 | 3929 | ||
3930 | obj->write_domain = obj->pending_write_domain; | 3930 | obj->write_domain = obj->pending_write_domain; |
@@ -3999,7 +3999,7 @@ err: | |||
3999 | 3999 | ||
4000 | for (i = 0; i < args->buffer_count; i++) { | 4000 | for (i = 0; i < args->buffer_count; i++) { |
4001 | if (object_list[i]) { | 4001 | if (object_list[i]) { |
4002 | obj_priv = object_list[i]->driver_private; | 4002 | obj_priv = to_intel_bo(object_list[i]); |
4003 | obj_priv->in_execbuffer = false; | 4003 | obj_priv->in_execbuffer = false; |
4004 | } | 4004 | } |
4005 | drm_gem_object_unreference(object_list[i]); | 4005 | drm_gem_object_unreference(object_list[i]); |
@@ -4177,7 +4177,7 @@ int | |||
4177 | i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment) | 4177 | i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment) |
4178 | { | 4178 | { |
4179 | struct drm_device *dev = obj->dev; | 4179 | struct drm_device *dev = obj->dev; |
4180 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 4180 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
4181 | int ret; | 4181 | int ret; |
4182 | 4182 | ||
4183 | i915_verify_inactive(dev, __FILE__, __LINE__); | 4183 | i915_verify_inactive(dev, __FILE__, __LINE__); |
@@ -4210,7 +4210,7 @@ i915_gem_object_unpin(struct drm_gem_object *obj) | |||
4210 | { | 4210 | { |
4211 | struct drm_device *dev = obj->dev; | 4211 | struct drm_device *dev = obj->dev; |
4212 | drm_i915_private_t *dev_priv = dev->dev_private; | 4212 | drm_i915_private_t *dev_priv = dev->dev_private; |
4213 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 4213 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
4214 | 4214 | ||
4215 | i915_verify_inactive(dev, __FILE__, __LINE__); | 4215 | i915_verify_inactive(dev, __FILE__, __LINE__); |
4216 | obj_priv->pin_count--; | 4216 | obj_priv->pin_count--; |
@@ -4250,7 +4250,7 @@ i915_gem_pin_ioctl(struct drm_device *dev, void *data, | |||
4250 | mutex_unlock(&dev->struct_mutex); | 4250 | mutex_unlock(&dev->struct_mutex); |
4251 | return -EBADF; | 4251 | return -EBADF; |
4252 | } | 4252 | } |
4253 | obj_priv = obj->driver_private; | 4253 | obj_priv = to_intel_bo(obj); |
4254 | 4254 | ||
4255 | if (obj_priv->madv != I915_MADV_WILLNEED) { | 4255 | if (obj_priv->madv != I915_MADV_WILLNEED) { |
4256 | DRM_ERROR("Attempting to pin a purgeable buffer\n"); | 4256 | DRM_ERROR("Attempting to pin a purgeable buffer\n"); |
@@ -4307,7 +4307,7 @@ i915_gem_unpin_ioctl(struct drm_device *dev, void *data, | |||
4307 | return -EBADF; | 4307 | return -EBADF; |
4308 | } | 4308 | } |
4309 | 4309 | ||
4310 | obj_priv = obj->driver_private; | 4310 | obj_priv = to_intel_bo(obj); |
4311 | if (obj_priv->pin_filp != file_priv) { | 4311 | if (obj_priv->pin_filp != file_priv) { |
4312 | DRM_ERROR("Not pinned by caller in i915_gem_pin_ioctl(): %d\n", | 4312 | DRM_ERROR("Not pinned by caller in i915_gem_pin_ioctl(): %d\n", |
4313 | args->handle); | 4313 | args->handle); |
@@ -4349,7 +4349,7 @@ i915_gem_busy_ioctl(struct drm_device *dev, void *data, | |||
4349 | */ | 4349 | */ |
4350 | i915_gem_retire_requests(dev); | 4350 | i915_gem_retire_requests(dev); |
4351 | 4351 | ||
4352 | obj_priv = obj->driver_private; | 4352 | obj_priv = to_intel_bo(obj); |
4353 | /* Don't count being on the flushing list against the object being | 4353 | /* Don't count being on the flushing list against the object being |
4354 | * done. Otherwise, a buffer left on the flushing list but not getting | 4354 | * done. Otherwise, a buffer left on the flushing list but not getting |
4355 | * flushed (because nobody's flushing that domain) won't ever return | 4355 | * flushed (because nobody's flushing that domain) won't ever return |
@@ -4395,7 +4395,7 @@ i915_gem_madvise_ioctl(struct drm_device *dev, void *data, | |||
4395 | } | 4395 | } |
4396 | 4396 | ||
4397 | mutex_lock(&dev->struct_mutex); | 4397 | mutex_lock(&dev->struct_mutex); |
4398 | obj_priv = obj->driver_private; | 4398 | obj_priv = to_intel_bo(obj); |
4399 | 4399 | ||
4400 | if (obj_priv->pin_count) { | 4400 | if (obj_priv->pin_count) { |
4401 | drm_gem_object_unreference(obj); | 4401 | drm_gem_object_unreference(obj); |
@@ -4456,7 +4456,7 @@ int i915_gem_init_object(struct drm_gem_object *obj) | |||
4456 | void i915_gem_free_object(struct drm_gem_object *obj) | 4456 | void i915_gem_free_object(struct drm_gem_object *obj) |
4457 | { | 4457 | { |
4458 | struct drm_device *dev = obj->dev; | 4458 | struct drm_device *dev = obj->dev; |
4459 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 4459 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
4460 | 4460 | ||
4461 | trace_i915_gem_object_destroy(obj); | 4461 | trace_i915_gem_object_destroy(obj); |
4462 | 4462 | ||
@@ -4565,7 +4565,7 @@ i915_gem_init_hws(struct drm_device *dev) | |||
4565 | DRM_ERROR("Failed to allocate status page\n"); | 4565 | DRM_ERROR("Failed to allocate status page\n"); |
4566 | return -ENOMEM; | 4566 | return -ENOMEM; |
4567 | } | 4567 | } |
4568 | obj_priv = obj->driver_private; | 4568 | obj_priv = to_intel_bo(obj); |
4569 | obj_priv->agp_type = AGP_USER_CACHED_MEMORY; | 4569 | obj_priv->agp_type = AGP_USER_CACHED_MEMORY; |
4570 | 4570 | ||
4571 | ret = i915_gem_object_pin(obj, 4096); | 4571 | ret = i915_gem_object_pin(obj, 4096); |
@@ -4609,7 +4609,7 @@ i915_gem_cleanup_hws(struct drm_device *dev) | |||
4609 | return; | 4609 | return; |
4610 | 4610 | ||
4611 | obj = dev_priv->hws_obj; | 4611 | obj = dev_priv->hws_obj; |
4612 | obj_priv = obj->driver_private; | 4612 | obj_priv = to_intel_bo(obj); |
4613 | 4613 | ||
4614 | kunmap(obj_priv->pages[0]); | 4614 | kunmap(obj_priv->pages[0]); |
4615 | i915_gem_object_unpin(obj); | 4615 | i915_gem_object_unpin(obj); |
@@ -4643,7 +4643,7 @@ i915_gem_init_ringbuffer(struct drm_device *dev) | |||
4643 | i915_gem_cleanup_hws(dev); | 4643 | i915_gem_cleanup_hws(dev); |
4644 | return -ENOMEM; | 4644 | return -ENOMEM; |
4645 | } | 4645 | } |
4646 | obj_priv = obj->driver_private; | 4646 | obj_priv = to_intel_bo(obj); |
4647 | 4647 | ||
4648 | ret = i915_gem_object_pin(obj, 4096); | 4648 | ret = i915_gem_object_pin(obj, 4096); |
4649 | if (ret != 0) { | 4649 | if (ret != 0) { |
@@ -4936,7 +4936,7 @@ void i915_gem_detach_phys_object(struct drm_device *dev, | |||
4936 | int ret; | 4936 | int ret; |
4937 | int page_count; | 4937 | int page_count; |
4938 | 4938 | ||
4939 | obj_priv = obj->driver_private; | 4939 | obj_priv = to_intel_bo(obj); |
4940 | if (!obj_priv->phys_obj) | 4940 | if (!obj_priv->phys_obj) |
4941 | return; | 4941 | return; |
4942 | 4942 | ||
@@ -4975,7 +4975,7 @@ i915_gem_attach_phys_object(struct drm_device *dev, | |||
4975 | if (id > I915_MAX_PHYS_OBJECT) | 4975 | if (id > I915_MAX_PHYS_OBJECT) |
4976 | return -EINVAL; | 4976 | return -EINVAL; |
4977 | 4977 | ||
4978 | obj_priv = obj->driver_private; | 4978 | obj_priv = to_intel_bo(obj); |
4979 | 4979 | ||
4980 | if (obj_priv->phys_obj) { | 4980 | if (obj_priv->phys_obj) { |
4981 | if (obj_priv->phys_obj->id == id) | 4981 | if (obj_priv->phys_obj->id == id) |
@@ -5026,7 +5026,7 @@ i915_gem_phys_pwrite(struct drm_device *dev, struct drm_gem_object *obj, | |||
5026 | struct drm_i915_gem_pwrite *args, | 5026 | struct drm_i915_gem_pwrite *args, |
5027 | struct drm_file *file_priv) | 5027 | struct drm_file *file_priv) |
5028 | { | 5028 | { |
5029 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 5029 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
5030 | void *obj_addr; | 5030 | void *obj_addr; |
5031 | int ret; | 5031 | int ret; |
5032 | char __user *user_data; | 5032 | char __user *user_data; |
diff --git a/drivers/gpu/drm/i915/i915_gem_debug.c b/drivers/gpu/drm/i915/i915_gem_debug.c index e602614bd3f8..35507cf53fa3 100644 --- a/drivers/gpu/drm/i915/i915_gem_debug.c +++ b/drivers/gpu/drm/i915/i915_gem_debug.c | |||
@@ -72,7 +72,7 @@ void | |||
72 | i915_gem_dump_object(struct drm_gem_object *obj, int len, | 72 | i915_gem_dump_object(struct drm_gem_object *obj, int len, |
73 | const char *where, uint32_t mark) | 73 | const char *where, uint32_t mark) |
74 | { | 74 | { |
75 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 75 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
76 | int page; | 76 | int page; |
77 | 77 | ||
78 | DRM_INFO("%s: object at offset %08x\n", where, obj_priv->gtt_offset); | 78 | DRM_INFO("%s: object at offset %08x\n", where, obj_priv->gtt_offset); |
@@ -137,7 +137,7 @@ void | |||
137 | i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle) | 137 | i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle) |
138 | { | 138 | { |
139 | struct drm_device *dev = obj->dev; | 139 | struct drm_device *dev = obj->dev; |
140 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 140 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
141 | int page; | 141 | int page; |
142 | uint32_t *gtt_mapping; | 142 | uint32_t *gtt_mapping; |
143 | uint32_t *backing_map = NULL; | 143 | uint32_t *backing_map = NULL; |
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c index c01c878e51ba..449157f71610 100644 --- a/drivers/gpu/drm/i915/i915_gem_tiling.c +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c | |||
@@ -240,7 +240,7 @@ bool | |||
240 | i915_gem_object_fence_offset_ok(struct drm_gem_object *obj, int tiling_mode) | 240 | i915_gem_object_fence_offset_ok(struct drm_gem_object *obj, int tiling_mode) |
241 | { | 241 | { |
242 | struct drm_device *dev = obj->dev; | 242 | struct drm_device *dev = obj->dev; |
243 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 243 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
244 | 244 | ||
245 | if (obj_priv->gtt_space == NULL) | 245 | if (obj_priv->gtt_space == NULL) |
246 | return true; | 246 | return true; |
@@ -280,7 +280,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data, | |||
280 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 280 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
281 | if (obj == NULL) | 281 | if (obj == NULL) |
282 | return -EINVAL; | 282 | return -EINVAL; |
283 | obj_priv = obj->driver_private; | 283 | obj_priv = to_intel_bo(obj); |
284 | 284 | ||
285 | if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) { | 285 | if (!i915_tiling_ok(dev, args->stride, obj->size, args->tiling_mode)) { |
286 | drm_gem_object_unreference_unlocked(obj); | 286 | drm_gem_object_unreference_unlocked(obj); |
@@ -364,7 +364,7 @@ i915_gem_get_tiling(struct drm_device *dev, void *data, | |||
364 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); | 364 | obj = drm_gem_object_lookup(dev, file_priv, args->handle); |
365 | if (obj == NULL) | 365 | if (obj == NULL) |
366 | return -EINVAL; | 366 | return -EINVAL; |
367 | obj_priv = obj->driver_private; | 367 | obj_priv = to_intel_bo(obj); |
368 | 368 | ||
369 | mutex_lock(&dev->struct_mutex); | 369 | mutex_lock(&dev->struct_mutex); |
370 | 370 | ||
@@ -427,7 +427,7 @@ i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj) | |||
427 | { | 427 | { |
428 | struct drm_device *dev = obj->dev; | 428 | struct drm_device *dev = obj->dev; |
429 | drm_i915_private_t *dev_priv = dev->dev_private; | 429 | drm_i915_private_t *dev_priv = dev->dev_private; |
430 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 430 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
431 | int page_count = obj->size >> PAGE_SHIFT; | 431 | int page_count = obj->size >> PAGE_SHIFT; |
432 | int i; | 432 | int i; |
433 | 433 | ||
@@ -456,7 +456,7 @@ i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj) | |||
456 | { | 456 | { |
457 | struct drm_device *dev = obj->dev; | 457 | struct drm_device *dev = obj->dev; |
458 | drm_i915_private_t *dev_priv = dev->dev_private; | 458 | drm_i915_private_t *dev_priv = dev->dev_private; |
459 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 459 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
460 | int page_count = obj->size >> PAGE_SHIFT; | 460 | int page_count = obj->size >> PAGE_SHIFT; |
461 | int i; | 461 | int i; |
462 | 462 | ||
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 49c458bc6502..6421481d6222 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -260,10 +260,10 @@ static void i915_hotplug_work_func(struct work_struct *work) | |||
260 | 260 | ||
261 | if (mode_config->num_connector) { | 261 | if (mode_config->num_connector) { |
262 | list_for_each_entry(connector, &mode_config->connector_list, head) { | 262 | list_for_each_entry(connector, &mode_config->connector_list, head) { |
263 | struct intel_output *intel_output = to_intel_output(connector); | 263 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
264 | 264 | ||
265 | if (intel_output->hot_plug) | 265 | if (intel_encoder->hot_plug) |
266 | (*intel_output->hot_plug) (intel_output); | 266 | (*intel_encoder->hot_plug) (intel_encoder); |
267 | } | 267 | } |
268 | } | 268 | } |
269 | /* Just fire off a uevent and let userspace tell us what to do */ | 269 | /* Just fire off a uevent and let userspace tell us what to do */ |
@@ -444,7 +444,7 @@ i915_error_object_create(struct drm_device *dev, | |||
444 | if (src == NULL) | 444 | if (src == NULL) |
445 | return NULL; | 445 | return NULL; |
446 | 446 | ||
447 | src_priv = src->driver_private; | 447 | src_priv = to_intel_bo(src); |
448 | if (src_priv->pages == NULL) | 448 | if (src_priv->pages == NULL) |
449 | return NULL; | 449 | return NULL; |
450 | 450 | ||
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 38110ce742a5..759c2ef72eff 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -247,19 +247,19 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector) | |||
247 | 247 | ||
248 | static bool intel_crt_detect_ddc(struct drm_connector *connector) | 248 | static bool intel_crt_detect_ddc(struct drm_connector *connector) |
249 | { | 249 | { |
250 | struct intel_output *intel_output = to_intel_output(connector); | 250 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
251 | 251 | ||
252 | /* CRT should always be at 0, but check anyway */ | 252 | /* CRT should always be at 0, but check anyway */ |
253 | if (intel_output->type != INTEL_OUTPUT_ANALOG) | 253 | if (intel_encoder->type != INTEL_OUTPUT_ANALOG) |
254 | return false; | 254 | return false; |
255 | 255 | ||
256 | return intel_ddc_probe(intel_output); | 256 | return intel_ddc_probe(intel_encoder); |
257 | } | 257 | } |
258 | 258 | ||
259 | static enum drm_connector_status | 259 | static enum drm_connector_status |
260 | intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output) | 260 | intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder) |
261 | { | 261 | { |
262 | struct drm_encoder *encoder = &intel_output->enc; | 262 | struct drm_encoder *encoder = &intel_encoder->enc; |
263 | struct drm_device *dev = encoder->dev; | 263 | struct drm_device *dev = encoder->dev; |
264 | struct drm_i915_private *dev_priv = dev->dev_private; | 264 | struct drm_i915_private *dev_priv = dev->dev_private; |
265 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 265 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
@@ -387,8 +387,8 @@ intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output) | |||
387 | static enum drm_connector_status intel_crt_detect(struct drm_connector *connector) | 387 | static enum drm_connector_status intel_crt_detect(struct drm_connector *connector) |
388 | { | 388 | { |
389 | struct drm_device *dev = connector->dev; | 389 | struct drm_device *dev = connector->dev; |
390 | struct intel_output *intel_output = to_intel_output(connector); | 390 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
391 | struct drm_encoder *encoder = &intel_output->enc; | 391 | struct drm_encoder *encoder = &intel_encoder->enc; |
392 | struct drm_crtc *crtc; | 392 | struct drm_crtc *crtc; |
393 | int dpms_mode; | 393 | int dpms_mode; |
394 | enum drm_connector_status status; | 394 | enum drm_connector_status status; |
@@ -405,13 +405,13 @@ static enum drm_connector_status intel_crt_detect(struct drm_connector *connecto | |||
405 | 405 | ||
406 | /* for pre-945g platforms use load detect */ | 406 | /* for pre-945g platforms use load detect */ |
407 | if (encoder->crtc && encoder->crtc->enabled) { | 407 | if (encoder->crtc && encoder->crtc->enabled) { |
408 | status = intel_crt_load_detect(encoder->crtc, intel_output); | 408 | status = intel_crt_load_detect(encoder->crtc, intel_encoder); |
409 | } else { | 409 | } else { |
410 | crtc = intel_get_load_detect_pipe(intel_output, | 410 | crtc = intel_get_load_detect_pipe(intel_encoder, |
411 | NULL, &dpms_mode); | 411 | NULL, &dpms_mode); |
412 | if (crtc) { | 412 | if (crtc) { |
413 | status = intel_crt_load_detect(crtc, intel_output); | 413 | status = intel_crt_load_detect(crtc, intel_encoder); |
414 | intel_release_load_detect_pipe(intel_output, dpms_mode); | 414 | intel_release_load_detect_pipe(intel_encoder, dpms_mode); |
415 | } else | 415 | } else |
416 | status = connector_status_unknown; | 416 | status = connector_status_unknown; |
417 | } | 417 | } |
@@ -421,9 +421,9 @@ static enum drm_connector_status intel_crt_detect(struct drm_connector *connecto | |||
421 | 421 | ||
422 | static void intel_crt_destroy(struct drm_connector *connector) | 422 | static void intel_crt_destroy(struct drm_connector *connector) |
423 | { | 423 | { |
424 | struct intel_output *intel_output = to_intel_output(connector); | 424 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
425 | 425 | ||
426 | intel_i2c_destroy(intel_output->ddc_bus); | 426 | intel_i2c_destroy(intel_encoder->ddc_bus); |
427 | drm_sysfs_connector_remove(connector); | 427 | drm_sysfs_connector_remove(connector); |
428 | drm_connector_cleanup(connector); | 428 | drm_connector_cleanup(connector); |
429 | kfree(connector); | 429 | kfree(connector); |
@@ -432,28 +432,28 @@ static void intel_crt_destroy(struct drm_connector *connector) | |||
432 | static int intel_crt_get_modes(struct drm_connector *connector) | 432 | static int intel_crt_get_modes(struct drm_connector *connector) |
433 | { | 433 | { |
434 | int ret; | 434 | int ret; |
435 | struct intel_output *intel_output = to_intel_output(connector); | 435 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
436 | struct i2c_adapter *ddcbus; | 436 | struct i2c_adapter *ddcbus; |
437 | struct drm_device *dev = connector->dev; | 437 | struct drm_device *dev = connector->dev; |
438 | 438 | ||
439 | 439 | ||
440 | ret = intel_ddc_get_modes(intel_output); | 440 | ret = intel_ddc_get_modes(intel_encoder); |
441 | if (ret || !IS_G4X(dev)) | 441 | if (ret || !IS_G4X(dev)) |
442 | goto end; | 442 | goto end; |
443 | 443 | ||
444 | ddcbus = intel_output->ddc_bus; | 444 | ddcbus = intel_encoder->ddc_bus; |
445 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ | 445 | /* Try to probe digital port for output in DVI-I -> VGA mode. */ |
446 | intel_output->ddc_bus = | 446 | intel_encoder->ddc_bus = |
447 | intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D"); | 447 | intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D"); |
448 | 448 | ||
449 | if (!intel_output->ddc_bus) { | 449 | if (!intel_encoder->ddc_bus) { |
450 | intel_output->ddc_bus = ddcbus; | 450 | intel_encoder->ddc_bus = ddcbus; |
451 | dev_printk(KERN_ERR, &connector->dev->pdev->dev, | 451 | dev_printk(KERN_ERR, &connector->dev->pdev->dev, |
452 | "DDC bus registration failed for CRTDDC_D.\n"); | 452 | "DDC bus registration failed for CRTDDC_D.\n"); |
453 | goto end; | 453 | goto end; |
454 | } | 454 | } |
455 | /* Try to get modes by GPIOD port */ | 455 | /* Try to get modes by GPIOD port */ |
456 | ret = intel_ddc_get_modes(intel_output); | 456 | ret = intel_ddc_get_modes(intel_encoder); |
457 | intel_i2c_destroy(ddcbus); | 457 | intel_i2c_destroy(ddcbus); |
458 | 458 | ||
459 | end: | 459 | end: |
@@ -506,23 +506,23 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = { | |||
506 | void intel_crt_init(struct drm_device *dev) | 506 | void intel_crt_init(struct drm_device *dev) |
507 | { | 507 | { |
508 | struct drm_connector *connector; | 508 | struct drm_connector *connector; |
509 | struct intel_output *intel_output; | 509 | struct intel_encoder *intel_encoder; |
510 | struct drm_i915_private *dev_priv = dev->dev_private; | 510 | struct drm_i915_private *dev_priv = dev->dev_private; |
511 | u32 i2c_reg; | 511 | u32 i2c_reg; |
512 | 512 | ||
513 | intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL); | 513 | intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL); |
514 | if (!intel_output) | 514 | if (!intel_encoder) |
515 | return; | 515 | return; |
516 | 516 | ||
517 | connector = &intel_output->base; | 517 | connector = &intel_encoder->base; |
518 | drm_connector_init(dev, &intel_output->base, | 518 | drm_connector_init(dev, &intel_encoder->base, |
519 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); | 519 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); |
520 | 520 | ||
521 | drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs, | 521 | drm_encoder_init(dev, &intel_encoder->enc, &intel_crt_enc_funcs, |
522 | DRM_MODE_ENCODER_DAC); | 522 | DRM_MODE_ENCODER_DAC); |
523 | 523 | ||
524 | drm_mode_connector_attach_encoder(&intel_output->base, | 524 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
525 | &intel_output->enc); | 525 | &intel_encoder->enc); |
526 | 526 | ||
527 | /* Set up the DDC bus. */ | 527 | /* Set up the DDC bus. */ |
528 | if (HAS_PCH_SPLIT(dev)) | 528 | if (HAS_PCH_SPLIT(dev)) |
@@ -533,22 +533,22 @@ void intel_crt_init(struct drm_device *dev) | |||
533 | if (dev_priv->crt_ddc_bus != 0) | 533 | if (dev_priv->crt_ddc_bus != 0) |
534 | i2c_reg = dev_priv->crt_ddc_bus; | 534 | i2c_reg = dev_priv->crt_ddc_bus; |
535 | } | 535 | } |
536 | intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A"); | 536 | intel_encoder->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A"); |
537 | if (!intel_output->ddc_bus) { | 537 | if (!intel_encoder->ddc_bus) { |
538 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " | 538 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
539 | "failed.\n"); | 539 | "failed.\n"); |
540 | return; | 540 | return; |
541 | } | 541 | } |
542 | 542 | ||
543 | intel_output->type = INTEL_OUTPUT_ANALOG; | 543 | intel_encoder->type = INTEL_OUTPUT_ANALOG; |
544 | intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 544 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
545 | (1 << INTEL_ANALOG_CLONE_BIT) | | 545 | (1 << INTEL_ANALOG_CLONE_BIT) | |
546 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 546 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
547 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 547 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
548 | connector->interlace_allowed = 0; | 548 | connector->interlace_allowed = 0; |
549 | connector->doublescan_allowed = 0; | 549 | connector->doublescan_allowed = 0; |
550 | 550 | ||
551 | drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs); | 551 | drm_encoder_helper_add(&intel_encoder->enc, &intel_crt_helper_funcs); |
552 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); | 552 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
553 | 553 | ||
554 | drm_sysfs_connector_add(connector); | 554 | drm_sysfs_connector_add(connector); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index e7e753b2845f..e7356fb6c918 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -747,16 +747,16 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type) | |||
747 | list_for_each_entry(l_entry, &mode_config->connector_list, head) { | 747 | list_for_each_entry(l_entry, &mode_config->connector_list, head) { |
748 | if (l_entry->encoder && | 748 | if (l_entry->encoder && |
749 | l_entry->encoder->crtc == crtc) { | 749 | l_entry->encoder->crtc == crtc) { |
750 | struct intel_output *intel_output = to_intel_output(l_entry); | 750 | struct intel_encoder *intel_encoder = to_intel_encoder(l_entry); |
751 | if (intel_output->type == type) | 751 | if (intel_encoder->type == type) |
752 | return true; | 752 | return true; |
753 | } | 753 | } |
754 | } | 754 | } |
755 | return false; | 755 | return false; |
756 | } | 756 | } |
757 | 757 | ||
758 | struct drm_connector * | 758 | static struct drm_connector * |
759 | intel_pipe_get_output (struct drm_crtc *crtc) | 759 | intel_pipe_get_connector (struct drm_crtc *crtc) |
760 | { | 760 | { |
761 | struct drm_device *dev = crtc->dev; | 761 | struct drm_device *dev = crtc->dev; |
762 | struct drm_mode_config *mode_config = &dev->mode_config; | 762 | struct drm_mode_config *mode_config = &dev->mode_config; |
@@ -1003,7 +1003,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1003 | struct drm_i915_private *dev_priv = dev->dev_private; | 1003 | struct drm_i915_private *dev_priv = dev->dev_private; |
1004 | struct drm_framebuffer *fb = crtc->fb; | 1004 | struct drm_framebuffer *fb = crtc->fb; |
1005 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); | 1005 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); |
1006 | struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private; | 1006 | struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj); |
1007 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1007 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1008 | int plane, i; | 1008 | int plane, i; |
1009 | u32 fbc_ctl, fbc_ctl2; | 1009 | u32 fbc_ctl, fbc_ctl2; |
@@ -1080,7 +1080,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1080 | struct drm_i915_private *dev_priv = dev->dev_private; | 1080 | struct drm_i915_private *dev_priv = dev->dev_private; |
1081 | struct drm_framebuffer *fb = crtc->fb; | 1081 | struct drm_framebuffer *fb = crtc->fb; |
1082 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); | 1082 | struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); |
1083 | struct drm_i915_gem_object *obj_priv = intel_fb->obj->driver_private; | 1083 | struct drm_i915_gem_object *obj_priv = to_intel_bo(intel_fb->obj); |
1084 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1084 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1085 | int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : | 1085 | int plane = (intel_crtc->plane == 0 ? DPFC_CTL_PLANEA : |
1086 | DPFC_CTL_PLANEB); | 1086 | DPFC_CTL_PLANEB); |
@@ -1176,7 +1176,7 @@ static void intel_update_fbc(struct drm_crtc *crtc, | |||
1176 | return; | 1176 | return; |
1177 | 1177 | ||
1178 | intel_fb = to_intel_framebuffer(fb); | 1178 | intel_fb = to_intel_framebuffer(fb); |
1179 | obj_priv = intel_fb->obj->driver_private; | 1179 | obj_priv = to_intel_bo(intel_fb->obj); |
1180 | 1180 | ||
1181 | /* | 1181 | /* |
1182 | * If FBC is already on, we just have to verify that we can | 1182 | * If FBC is already on, we just have to verify that we can |
@@ -1243,7 +1243,7 @@ out_disable: | |||
1243 | static int | 1243 | static int |
1244 | intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) | 1244 | intel_pin_and_fence_fb_obj(struct drm_device *dev, struct drm_gem_object *obj) |
1245 | { | 1245 | { |
1246 | struct drm_i915_gem_object *obj_priv = obj->driver_private; | 1246 | struct drm_i915_gem_object *obj_priv = to_intel_bo(obj); |
1247 | u32 alignment; | 1247 | u32 alignment; |
1248 | int ret; | 1248 | int ret; |
1249 | 1249 | ||
@@ -1323,7 +1323,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1323 | 1323 | ||
1324 | intel_fb = to_intel_framebuffer(crtc->fb); | 1324 | intel_fb = to_intel_framebuffer(crtc->fb); |
1325 | obj = intel_fb->obj; | 1325 | obj = intel_fb->obj; |
1326 | obj_priv = obj->driver_private; | 1326 | obj_priv = to_intel_bo(obj); |
1327 | 1327 | ||
1328 | mutex_lock(&dev->struct_mutex); | 1328 | mutex_lock(&dev->struct_mutex); |
1329 | ret = intel_pin_and_fence_fb_obj(dev, obj); | 1329 | ret = intel_pin_and_fence_fb_obj(dev, obj); |
@@ -1401,7 +1401,7 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1401 | 1401 | ||
1402 | if (old_fb) { | 1402 | if (old_fb) { |
1403 | intel_fb = to_intel_framebuffer(old_fb); | 1403 | intel_fb = to_intel_framebuffer(old_fb); |
1404 | obj_priv = intel_fb->obj->driver_private; | 1404 | obj_priv = to_intel_bo(intel_fb->obj); |
1405 | i915_gem_object_unpin(intel_fb->obj); | 1405 | i915_gem_object_unpin(intel_fb->obj); |
1406 | } | 1406 | } |
1407 | intel_increase_pllclock(crtc, true); | 1407 | intel_increase_pllclock(crtc, true); |
@@ -2917,7 +2917,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2917 | int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; | 2917 | int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; |
2918 | int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; | 2918 | int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; |
2919 | int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; | 2919 | int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; |
2920 | int refclk, num_outputs = 0; | 2920 | int refclk, num_connectors = 0; |
2921 | intel_clock_t clock, reduced_clock; | 2921 | intel_clock_t clock, reduced_clock; |
2922 | u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; | 2922 | u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; |
2923 | bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false; | 2923 | bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false; |
@@ -2943,19 +2943,19 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2943 | drm_vblank_pre_modeset(dev, pipe); | 2943 | drm_vblank_pre_modeset(dev, pipe); |
2944 | 2944 | ||
2945 | list_for_each_entry(connector, &mode_config->connector_list, head) { | 2945 | list_for_each_entry(connector, &mode_config->connector_list, head) { |
2946 | struct intel_output *intel_output = to_intel_output(connector); | 2946 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
2947 | 2947 | ||
2948 | if (!connector->encoder || connector->encoder->crtc != crtc) | 2948 | if (!connector->encoder || connector->encoder->crtc != crtc) |
2949 | continue; | 2949 | continue; |
2950 | 2950 | ||
2951 | switch (intel_output->type) { | 2951 | switch (intel_encoder->type) { |
2952 | case INTEL_OUTPUT_LVDS: | 2952 | case INTEL_OUTPUT_LVDS: |
2953 | is_lvds = true; | 2953 | is_lvds = true; |
2954 | break; | 2954 | break; |
2955 | case INTEL_OUTPUT_SDVO: | 2955 | case INTEL_OUTPUT_SDVO: |
2956 | case INTEL_OUTPUT_HDMI: | 2956 | case INTEL_OUTPUT_HDMI: |
2957 | is_sdvo = true; | 2957 | is_sdvo = true; |
2958 | if (intel_output->needs_tv_clock) | 2958 | if (intel_encoder->needs_tv_clock) |
2959 | is_tv = true; | 2959 | is_tv = true; |
2960 | break; | 2960 | break; |
2961 | case INTEL_OUTPUT_DVO: | 2961 | case INTEL_OUTPUT_DVO: |
@@ -2975,10 +2975,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2975 | break; | 2975 | break; |
2976 | } | 2976 | } |
2977 | 2977 | ||
2978 | num_outputs++; | 2978 | num_connectors++; |
2979 | } | 2979 | } |
2980 | 2980 | ||
2981 | if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) { | 2981 | if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2) { |
2982 | refclk = dev_priv->lvds_ssc_freq * 1000; | 2982 | refclk = dev_priv->lvds_ssc_freq * 1000; |
2983 | DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", | 2983 | DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", |
2984 | refclk / 1000); | 2984 | refclk / 1000); |
@@ -3049,8 +3049,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
3049 | if (is_edp) { | 3049 | if (is_edp) { |
3050 | struct drm_connector *edp; | 3050 | struct drm_connector *edp; |
3051 | target_clock = mode->clock; | 3051 | target_clock = mode->clock; |
3052 | edp = intel_pipe_get_output(crtc); | 3052 | edp = intel_pipe_get_connector(crtc); |
3053 | intel_edp_link_config(to_intel_output(edp), | 3053 | intel_edp_link_config(to_intel_encoder(edp), |
3054 | &lane, &link_bw); | 3054 | &lane, &link_bw); |
3055 | } else { | 3055 | } else { |
3056 | /* DP over FDI requires target mode clock | 3056 | /* DP over FDI requires target mode clock |
@@ -3231,7 +3231,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
3231 | /* XXX: just matching BIOS for now */ | 3231 | /* XXX: just matching BIOS for now */ |
3232 | /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ | 3232 | /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ |
3233 | dpll |= 3; | 3233 | dpll |= 3; |
3234 | else if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) | 3234 | else if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2) |
3235 | dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; | 3235 | dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; |
3236 | else | 3236 | else |
3237 | dpll |= PLL_REF_INPUT_DREFCLK; | 3237 | dpll |= PLL_REF_INPUT_DREFCLK; |
@@ -3511,7 +3511,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc, | |||
3511 | if (!bo) | 3511 | if (!bo) |
3512 | return -ENOENT; | 3512 | return -ENOENT; |
3513 | 3513 | ||
3514 | obj_priv = bo->driver_private; | 3514 | obj_priv = to_intel_bo(bo); |
3515 | 3515 | ||
3516 | if (bo->size < width * height * 4) { | 3516 | if (bo->size < width * height * 4) { |
3517 | DRM_ERROR("buffer is to small\n"); | 3517 | DRM_ERROR("buffer is to small\n"); |
@@ -3655,9 +3655,9 @@ static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
3655 | * detection. | 3655 | * detection. |
3656 | * | 3656 | * |
3657 | * It will be up to the load-detect code to adjust the pipe as appropriate for | 3657 | * It will be up to the load-detect code to adjust the pipe as appropriate for |
3658 | * its requirements. The pipe will be connected to no other outputs. | 3658 | * its requirements. The pipe will be connected to no other encoders. |
3659 | * | 3659 | * |
3660 | * Currently this code will only succeed if there is a pipe with no outputs | 3660 | * Currently this code will only succeed if there is a pipe with no encoders |
3661 | * configured for it. In the future, it could choose to temporarily disable | 3661 | * configured for it. In the future, it could choose to temporarily disable |
3662 | * some outputs to free up a pipe for its use. | 3662 | * some outputs to free up a pipe for its use. |
3663 | * | 3663 | * |
@@ -3670,14 +3670,14 @@ static struct drm_display_mode load_detect_mode = { | |||
3670 | 704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), | 3670 | 704, 832, 0, 480, 489, 491, 520, 0, DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
3671 | }; | 3671 | }; |
3672 | 3672 | ||
3673 | struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | 3673 | struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, |
3674 | struct drm_display_mode *mode, | 3674 | struct drm_display_mode *mode, |
3675 | int *dpms_mode) | 3675 | int *dpms_mode) |
3676 | { | 3676 | { |
3677 | struct intel_crtc *intel_crtc; | 3677 | struct intel_crtc *intel_crtc; |
3678 | struct drm_crtc *possible_crtc; | 3678 | struct drm_crtc *possible_crtc; |
3679 | struct drm_crtc *supported_crtc =NULL; | 3679 | struct drm_crtc *supported_crtc =NULL; |
3680 | struct drm_encoder *encoder = &intel_output->enc; | 3680 | struct drm_encoder *encoder = &intel_encoder->enc; |
3681 | struct drm_crtc *crtc = NULL; | 3681 | struct drm_crtc *crtc = NULL; |
3682 | struct drm_device *dev = encoder->dev; | 3682 | struct drm_device *dev = encoder->dev; |
3683 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | 3683 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; |
@@ -3729,8 +3729,8 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | |||
3729 | } | 3729 | } |
3730 | 3730 | ||
3731 | encoder->crtc = crtc; | 3731 | encoder->crtc = crtc; |
3732 | intel_output->base.encoder = encoder; | 3732 | intel_encoder->base.encoder = encoder; |
3733 | intel_output->load_detect_temp = true; | 3733 | intel_encoder->load_detect_temp = true; |
3734 | 3734 | ||
3735 | intel_crtc = to_intel_crtc(crtc); | 3735 | intel_crtc = to_intel_crtc(crtc); |
3736 | *dpms_mode = intel_crtc->dpms_mode; | 3736 | *dpms_mode = intel_crtc->dpms_mode; |
@@ -3755,23 +3755,23 @@ struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | |||
3755 | return crtc; | 3755 | return crtc; |
3756 | } | 3756 | } |
3757 | 3757 | ||
3758 | void intel_release_load_detect_pipe(struct intel_output *intel_output, int dpms_mode) | 3758 | void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, int dpms_mode) |
3759 | { | 3759 | { |
3760 | struct drm_encoder *encoder = &intel_output->enc; | 3760 | struct drm_encoder *encoder = &intel_encoder->enc; |
3761 | struct drm_device *dev = encoder->dev; | 3761 | struct drm_device *dev = encoder->dev; |
3762 | struct drm_crtc *crtc = encoder->crtc; | 3762 | struct drm_crtc *crtc = encoder->crtc; |
3763 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; | 3763 | struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private; |
3764 | struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; | 3764 | struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; |
3765 | 3765 | ||
3766 | if (intel_output->load_detect_temp) { | 3766 | if (intel_encoder->load_detect_temp) { |
3767 | encoder->crtc = NULL; | 3767 | encoder->crtc = NULL; |
3768 | intel_output->base.encoder = NULL; | 3768 | intel_encoder->base.encoder = NULL; |
3769 | intel_output->load_detect_temp = false; | 3769 | intel_encoder->load_detect_temp = false; |
3770 | crtc->enabled = drm_helper_crtc_in_use(crtc); | 3770 | crtc->enabled = drm_helper_crtc_in_use(crtc); |
3771 | drm_helper_disable_unused_functions(dev); | 3771 | drm_helper_disable_unused_functions(dev); |
3772 | } | 3772 | } |
3773 | 3773 | ||
3774 | /* Switch crtc and output back off if necessary */ | 3774 | /* Switch crtc and encoder back off if necessary */ |
3775 | if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) { | 3775 | if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) { |
3776 | if (encoder->crtc == crtc) | 3776 | if (encoder->crtc == crtc) |
3777 | encoder_funcs->dpms(encoder, dpms_mode); | 3777 | encoder_funcs->dpms(encoder, dpms_mode); |
@@ -4156,7 +4156,7 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe) | |||
4156 | work = intel_crtc->unpin_work; | 4156 | work = intel_crtc->unpin_work; |
4157 | if (work == NULL || !work->pending) { | 4157 | if (work == NULL || !work->pending) { |
4158 | if (work && !work->pending) { | 4158 | if (work && !work->pending) { |
4159 | obj_priv = work->pending_flip_obj->driver_private; | 4159 | obj_priv = to_intel_bo(work->pending_flip_obj); |
4160 | DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n", | 4160 | DRM_DEBUG_DRIVER("flip finish: %p (%d) not pending?\n", |
4161 | obj_priv, | 4161 | obj_priv, |
4162 | atomic_read(&obj_priv->pending_flip)); | 4162 | atomic_read(&obj_priv->pending_flip)); |
@@ -4181,7 +4181,7 @@ void intel_finish_page_flip(struct drm_device *dev, int pipe) | |||
4181 | 4181 | ||
4182 | spin_unlock_irqrestore(&dev->event_lock, flags); | 4182 | spin_unlock_irqrestore(&dev->event_lock, flags); |
4183 | 4183 | ||
4184 | obj_priv = work->pending_flip_obj->driver_private; | 4184 | obj_priv = to_intel_bo(work->pending_flip_obj); |
4185 | 4185 | ||
4186 | /* Initial scanout buffer will have a 0 pending flip count */ | 4186 | /* Initial scanout buffer will have a 0 pending flip count */ |
4187 | if ((atomic_read(&obj_priv->pending_flip) == 0) || | 4187 | if ((atomic_read(&obj_priv->pending_flip) == 0) || |
@@ -4252,7 +4252,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, | |||
4252 | ret = intel_pin_and_fence_fb_obj(dev, obj); | 4252 | ret = intel_pin_and_fence_fb_obj(dev, obj); |
4253 | if (ret != 0) { | 4253 | if (ret != 0) { |
4254 | DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n", | 4254 | DRM_DEBUG_DRIVER("flip queue: %p pin & fence failed\n", |
4255 | obj->driver_private); | 4255 | to_intel_bo(obj)); |
4256 | kfree(work); | 4256 | kfree(work); |
4257 | intel_crtc->unpin_work = NULL; | 4257 | intel_crtc->unpin_work = NULL; |
4258 | mutex_unlock(&dev->struct_mutex); | 4258 | mutex_unlock(&dev->struct_mutex); |
@@ -4266,7 +4266,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc, | |||
4266 | crtc->fb = fb; | 4266 | crtc->fb = fb; |
4267 | i915_gem_object_flush_write_domain(obj); | 4267 | i915_gem_object_flush_write_domain(obj); |
4268 | drm_vblank_get(dev, intel_crtc->pipe); | 4268 | drm_vblank_get(dev, intel_crtc->pipe); |
4269 | obj_priv = obj->driver_private; | 4269 | obj_priv = to_intel_bo(obj); |
4270 | atomic_inc(&obj_priv->pending_flip); | 4270 | atomic_inc(&obj_priv->pending_flip); |
4271 | work->pending_flip_obj = obj; | 4271 | work->pending_flip_obj = obj; |
4272 | 4272 | ||
@@ -4399,8 +4399,8 @@ static int intel_connector_clones(struct drm_device *dev, int type_mask) | |||
4399 | int entry = 0; | 4399 | int entry = 0; |
4400 | 4400 | ||
4401 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 4401 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
4402 | struct intel_output *intel_output = to_intel_output(connector); | 4402 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
4403 | if (type_mask & intel_output->clone_mask) | 4403 | if (type_mask & intel_encoder->clone_mask) |
4404 | index_mask |= (1 << entry); | 4404 | index_mask |= (1 << entry); |
4405 | entry++; | 4405 | entry++; |
4406 | } | 4406 | } |
@@ -4495,12 +4495,12 @@ static void intel_setup_outputs(struct drm_device *dev) | |||
4495 | intel_tv_init(dev); | 4495 | intel_tv_init(dev); |
4496 | 4496 | ||
4497 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 4497 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
4498 | struct intel_output *intel_output = to_intel_output(connector); | 4498 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
4499 | struct drm_encoder *encoder = &intel_output->enc; | 4499 | struct drm_encoder *encoder = &intel_encoder->enc; |
4500 | 4500 | ||
4501 | encoder->possible_crtcs = intel_output->crtc_mask; | 4501 | encoder->possible_crtcs = intel_encoder->crtc_mask; |
4502 | encoder->possible_clones = intel_connector_clones(dev, | 4502 | encoder->possible_clones = intel_connector_clones(dev, |
4503 | intel_output->clone_mask); | 4503 | intel_encoder->clone_mask); |
4504 | } | 4504 | } |
4505 | } | 4505 | } |
4506 | 4506 | ||
@@ -4779,14 +4779,14 @@ void intel_init_clock_gating(struct drm_device *dev) | |||
4779 | struct drm_i915_gem_object *obj_priv = NULL; | 4779 | struct drm_i915_gem_object *obj_priv = NULL; |
4780 | 4780 | ||
4781 | if (dev_priv->pwrctx) { | 4781 | if (dev_priv->pwrctx) { |
4782 | obj_priv = dev_priv->pwrctx->driver_private; | 4782 | obj_priv = to_intel_bo(dev_priv->pwrctx); |
4783 | } else { | 4783 | } else { |
4784 | struct drm_gem_object *pwrctx; | 4784 | struct drm_gem_object *pwrctx; |
4785 | 4785 | ||
4786 | pwrctx = intel_alloc_power_context(dev); | 4786 | pwrctx = intel_alloc_power_context(dev); |
4787 | if (pwrctx) { | 4787 | if (pwrctx) { |
4788 | dev_priv->pwrctx = pwrctx; | 4788 | dev_priv->pwrctx = pwrctx; |
4789 | obj_priv = pwrctx->driver_private; | 4789 | obj_priv = to_intel_bo(pwrctx); |
4790 | } | 4790 | } |
4791 | } | 4791 | } |
4792 | 4792 | ||
@@ -4815,7 +4815,7 @@ static void intel_init_display(struct drm_device *dev) | |||
4815 | dev_priv->display.fbc_enabled = g4x_fbc_enabled; | 4815 | dev_priv->display.fbc_enabled = g4x_fbc_enabled; |
4816 | dev_priv->display.enable_fbc = g4x_enable_fbc; | 4816 | dev_priv->display.enable_fbc = g4x_enable_fbc; |
4817 | dev_priv->display.disable_fbc = g4x_disable_fbc; | 4817 | dev_priv->display.disable_fbc = g4x_disable_fbc; |
4818 | } else if (IS_I965GM(dev) || IS_I945GM(dev) || IS_I915GM(dev)) { | 4818 | } else if (IS_I965GM(dev)) { |
4819 | dev_priv->display.fbc_enabled = i8xx_fbc_enabled; | 4819 | dev_priv->display.fbc_enabled = i8xx_fbc_enabled; |
4820 | dev_priv->display.enable_fbc = i8xx_enable_fbc; | 4820 | dev_priv->display.enable_fbc = i8xx_enable_fbc; |
4821 | dev_priv->display.disable_fbc = i8xx_disable_fbc; | 4821 | dev_priv->display.disable_fbc = i8xx_disable_fbc; |
@@ -4957,7 +4957,7 @@ void intel_modeset_cleanup(struct drm_device *dev) | |||
4957 | if (dev_priv->pwrctx) { | 4957 | if (dev_priv->pwrctx) { |
4958 | struct drm_i915_gem_object *obj_priv; | 4958 | struct drm_i915_gem_object *obj_priv; |
4959 | 4959 | ||
4960 | obj_priv = dev_priv->pwrctx->driver_private; | 4960 | obj_priv = to_intel_bo(dev_priv->pwrctx); |
4961 | I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN); | 4961 | I915_WRITE(PWRCTXA, obj_priv->gtt_offset &~ PWRCTX_EN); |
4962 | I915_READ(PWRCTXA); | 4962 | I915_READ(PWRCTXA); |
4963 | i915_gem_object_unpin(dev_priv->pwrctx); | 4963 | i915_gem_object_unpin(dev_priv->pwrctx); |
@@ -4978,9 +4978,9 @@ void intel_modeset_cleanup(struct drm_device *dev) | |||
4978 | */ | 4978 | */ |
4979 | struct drm_encoder *intel_best_encoder(struct drm_connector *connector) | 4979 | struct drm_encoder *intel_best_encoder(struct drm_connector *connector) |
4980 | { | 4980 | { |
4981 | struct intel_output *intel_output = to_intel_output(connector); | 4981 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
4982 | 4982 | ||
4983 | return &intel_output->enc; | 4983 | return &intel_encoder->enc; |
4984 | } | 4984 | } |
4985 | 4985 | ||
4986 | /* | 4986 | /* |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 8e283f75941d..77e40cfcf216 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -55,23 +55,23 @@ struct intel_dp_priv { | |||
55 | uint8_t link_bw; | 55 | uint8_t link_bw; |
56 | uint8_t lane_count; | 56 | uint8_t lane_count; |
57 | uint8_t dpcd[4]; | 57 | uint8_t dpcd[4]; |
58 | struct intel_output *intel_output; | 58 | struct intel_encoder *intel_encoder; |
59 | struct i2c_adapter adapter; | 59 | struct i2c_adapter adapter; |
60 | struct i2c_algo_dp_aux_data algo; | 60 | struct i2c_algo_dp_aux_data algo; |
61 | }; | 61 | }; |
62 | 62 | ||
63 | static void | 63 | static void |
64 | intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | 64 | intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP, |
65 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]); | 65 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]); |
66 | 66 | ||
67 | static void | 67 | static void |
68 | intel_dp_link_down(struct intel_output *intel_output, uint32_t DP); | 68 | intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP); |
69 | 69 | ||
70 | void | 70 | void |
71 | intel_edp_link_config (struct intel_output *intel_output, | 71 | intel_edp_link_config (struct intel_encoder *intel_encoder, |
72 | int *lane_num, int *link_bw) | 72 | int *lane_num, int *link_bw) |
73 | { | 73 | { |
74 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 74 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
75 | 75 | ||
76 | *lane_num = dp_priv->lane_count; | 76 | *lane_num = dp_priv->lane_count; |
77 | if (dp_priv->link_bw == DP_LINK_BW_1_62) | 77 | if (dp_priv->link_bw == DP_LINK_BW_1_62) |
@@ -81,9 +81,9 @@ intel_edp_link_config (struct intel_output *intel_output, | |||
81 | } | 81 | } |
82 | 82 | ||
83 | static int | 83 | static int |
84 | intel_dp_max_lane_count(struct intel_output *intel_output) | 84 | intel_dp_max_lane_count(struct intel_encoder *intel_encoder) |
85 | { | 85 | { |
86 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 86 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
87 | int max_lane_count = 4; | 87 | int max_lane_count = 4; |
88 | 88 | ||
89 | if (dp_priv->dpcd[0] >= 0x11) { | 89 | if (dp_priv->dpcd[0] >= 0x11) { |
@@ -99,9 +99,9 @@ intel_dp_max_lane_count(struct intel_output *intel_output) | |||
99 | } | 99 | } |
100 | 100 | ||
101 | static int | 101 | static int |
102 | intel_dp_max_link_bw(struct intel_output *intel_output) | 102 | intel_dp_max_link_bw(struct intel_encoder *intel_encoder) |
103 | { | 103 | { |
104 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 104 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
105 | int max_link_bw = dp_priv->dpcd[1]; | 105 | int max_link_bw = dp_priv->dpcd[1]; |
106 | 106 | ||
107 | switch (max_link_bw) { | 107 | switch (max_link_bw) { |
@@ -127,11 +127,11 @@ intel_dp_link_clock(uint8_t link_bw) | |||
127 | /* I think this is a fiction */ | 127 | /* I think this is a fiction */ |
128 | static int | 128 | static int |
129 | intel_dp_link_required(struct drm_device *dev, | 129 | intel_dp_link_required(struct drm_device *dev, |
130 | struct intel_output *intel_output, int pixel_clock) | 130 | struct intel_encoder *intel_encoder, int pixel_clock) |
131 | { | 131 | { |
132 | struct drm_i915_private *dev_priv = dev->dev_private; | 132 | struct drm_i915_private *dev_priv = dev->dev_private; |
133 | 133 | ||
134 | if (IS_eDP(intel_output)) | 134 | if (IS_eDP(intel_encoder)) |
135 | return (pixel_clock * dev_priv->edp_bpp) / 8; | 135 | return (pixel_clock * dev_priv->edp_bpp) / 8; |
136 | else | 136 | else |
137 | return pixel_clock * 3; | 137 | return pixel_clock * 3; |
@@ -141,11 +141,11 @@ static int | |||
141 | intel_dp_mode_valid(struct drm_connector *connector, | 141 | intel_dp_mode_valid(struct drm_connector *connector, |
142 | struct drm_display_mode *mode) | 142 | struct drm_display_mode *mode) |
143 | { | 143 | { |
144 | struct intel_output *intel_output = to_intel_output(connector); | 144 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
145 | int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_output)); | 145 | int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_encoder)); |
146 | int max_lanes = intel_dp_max_lane_count(intel_output); | 146 | int max_lanes = intel_dp_max_lane_count(intel_encoder); |
147 | 147 | ||
148 | if (intel_dp_link_required(connector->dev, intel_output, mode->clock) | 148 | if (intel_dp_link_required(connector->dev, intel_encoder, mode->clock) |
149 | > max_link_clock * max_lanes) | 149 | > max_link_clock * max_lanes) |
150 | return MODE_CLOCK_HIGH; | 150 | return MODE_CLOCK_HIGH; |
151 | 151 | ||
@@ -209,13 +209,13 @@ intel_hrawclk(struct drm_device *dev) | |||
209 | } | 209 | } |
210 | 210 | ||
211 | static int | 211 | static int |
212 | intel_dp_aux_ch(struct intel_output *intel_output, | 212 | intel_dp_aux_ch(struct intel_encoder *intel_encoder, |
213 | uint8_t *send, int send_bytes, | 213 | uint8_t *send, int send_bytes, |
214 | uint8_t *recv, int recv_size) | 214 | uint8_t *recv, int recv_size) |
215 | { | 215 | { |
216 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 216 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
217 | uint32_t output_reg = dp_priv->output_reg; | 217 | uint32_t output_reg = dp_priv->output_reg; |
218 | struct drm_device *dev = intel_output->base.dev; | 218 | struct drm_device *dev = intel_encoder->base.dev; |
219 | struct drm_i915_private *dev_priv = dev->dev_private; | 219 | struct drm_i915_private *dev_priv = dev->dev_private; |
220 | uint32_t ch_ctl = output_reg + 0x10; | 220 | uint32_t ch_ctl = output_reg + 0x10; |
221 | uint32_t ch_data = ch_ctl + 4; | 221 | uint32_t ch_data = ch_ctl + 4; |
@@ -230,7 +230,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
230 | * and would like to run at 2MHz. So, take the | 230 | * and would like to run at 2MHz. So, take the |
231 | * hrawclk value and divide by 2 and use that | 231 | * hrawclk value and divide by 2 and use that |
232 | */ | 232 | */ |
233 | if (IS_eDP(intel_output)) | 233 | if (IS_eDP(intel_encoder)) |
234 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ | 234 | aux_clock_divider = 225; /* eDP input clock at 450Mhz */ |
235 | else if (HAS_PCH_SPLIT(dev)) | 235 | else if (HAS_PCH_SPLIT(dev)) |
236 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ | 236 | aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */ |
@@ -313,7 +313,7 @@ intel_dp_aux_ch(struct intel_output *intel_output, | |||
313 | 313 | ||
314 | /* Write data to the aux channel in native mode */ | 314 | /* Write data to the aux channel in native mode */ |
315 | static int | 315 | static int |
316 | intel_dp_aux_native_write(struct intel_output *intel_output, | 316 | intel_dp_aux_native_write(struct intel_encoder *intel_encoder, |
317 | uint16_t address, uint8_t *send, int send_bytes) | 317 | uint16_t address, uint8_t *send, int send_bytes) |
318 | { | 318 | { |
319 | int ret; | 319 | int ret; |
@@ -330,7 +330,7 @@ intel_dp_aux_native_write(struct intel_output *intel_output, | |||
330 | memcpy(&msg[4], send, send_bytes); | 330 | memcpy(&msg[4], send, send_bytes); |
331 | msg_bytes = send_bytes + 4; | 331 | msg_bytes = send_bytes + 4; |
332 | for (;;) { | 332 | for (;;) { |
333 | ret = intel_dp_aux_ch(intel_output, msg, msg_bytes, &ack, 1); | 333 | ret = intel_dp_aux_ch(intel_encoder, msg, msg_bytes, &ack, 1); |
334 | if (ret < 0) | 334 | if (ret < 0) |
335 | return ret; | 335 | return ret; |
336 | if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) | 336 | if ((ack & AUX_NATIVE_REPLY_MASK) == AUX_NATIVE_REPLY_ACK) |
@@ -345,15 +345,15 @@ intel_dp_aux_native_write(struct intel_output *intel_output, | |||
345 | 345 | ||
346 | /* Write a single byte to the aux channel in native mode */ | 346 | /* Write a single byte to the aux channel in native mode */ |
347 | static int | 347 | static int |
348 | intel_dp_aux_native_write_1(struct intel_output *intel_output, | 348 | intel_dp_aux_native_write_1(struct intel_encoder *intel_encoder, |
349 | uint16_t address, uint8_t byte) | 349 | uint16_t address, uint8_t byte) |
350 | { | 350 | { |
351 | return intel_dp_aux_native_write(intel_output, address, &byte, 1); | 351 | return intel_dp_aux_native_write(intel_encoder, address, &byte, 1); |
352 | } | 352 | } |
353 | 353 | ||
354 | /* read bytes from a native aux channel */ | 354 | /* read bytes from a native aux channel */ |
355 | static int | 355 | static int |
356 | intel_dp_aux_native_read(struct intel_output *intel_output, | 356 | intel_dp_aux_native_read(struct intel_encoder *intel_encoder, |
357 | uint16_t address, uint8_t *recv, int recv_bytes) | 357 | uint16_t address, uint8_t *recv, int recv_bytes) |
358 | { | 358 | { |
359 | uint8_t msg[4]; | 359 | uint8_t msg[4]; |
@@ -372,7 +372,7 @@ intel_dp_aux_native_read(struct intel_output *intel_output, | |||
372 | reply_bytes = recv_bytes + 1; | 372 | reply_bytes = recv_bytes + 1; |
373 | 373 | ||
374 | for (;;) { | 374 | for (;;) { |
375 | ret = intel_dp_aux_ch(intel_output, msg, msg_bytes, | 375 | ret = intel_dp_aux_ch(intel_encoder, msg, msg_bytes, |
376 | reply, reply_bytes); | 376 | reply, reply_bytes); |
377 | if (ret == 0) | 377 | if (ret == 0) |
378 | return -EPROTO; | 378 | return -EPROTO; |
@@ -398,7 +398,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
398 | struct intel_dp_priv *dp_priv = container_of(adapter, | 398 | struct intel_dp_priv *dp_priv = container_of(adapter, |
399 | struct intel_dp_priv, | 399 | struct intel_dp_priv, |
400 | adapter); | 400 | adapter); |
401 | struct intel_output *intel_output = dp_priv->intel_output; | 401 | struct intel_encoder *intel_encoder = dp_priv->intel_encoder; |
402 | uint16_t address = algo_data->address; | 402 | uint16_t address = algo_data->address; |
403 | uint8_t msg[5]; | 403 | uint8_t msg[5]; |
404 | uint8_t reply[2]; | 404 | uint8_t reply[2]; |
@@ -437,7 +437,7 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
437 | } | 437 | } |
438 | 438 | ||
439 | for (;;) { | 439 | for (;;) { |
440 | ret = intel_dp_aux_ch(intel_output, | 440 | ret = intel_dp_aux_ch(intel_encoder, |
441 | msg, msg_bytes, | 441 | msg, msg_bytes, |
442 | reply, reply_bytes); | 442 | reply, reply_bytes); |
443 | if (ret < 0) { | 443 | if (ret < 0) { |
@@ -465,9 +465,9 @@ intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
465 | } | 465 | } |
466 | 466 | ||
467 | static int | 467 | static int |
468 | intel_dp_i2c_init(struct intel_output *intel_output, const char *name) | 468 | intel_dp_i2c_init(struct intel_encoder *intel_encoder, const char *name) |
469 | { | 469 | { |
470 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 470 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
471 | 471 | ||
472 | DRM_DEBUG_KMS("i2c_init %s\n", name); | 472 | DRM_DEBUG_KMS("i2c_init %s\n", name); |
473 | dp_priv->algo.running = false; | 473 | dp_priv->algo.running = false; |
@@ -480,7 +480,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name) | |||
480 | strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1); | 480 | strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1); |
481 | dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0'; | 481 | dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0'; |
482 | dp_priv->adapter.algo_data = &dp_priv->algo; | 482 | dp_priv->adapter.algo_data = &dp_priv->algo; |
483 | dp_priv->adapter.dev.parent = &intel_output->base.kdev; | 483 | dp_priv->adapter.dev.parent = &intel_encoder->base.kdev; |
484 | 484 | ||
485 | return i2c_dp_aux_add_bus(&dp_priv->adapter); | 485 | return i2c_dp_aux_add_bus(&dp_priv->adapter); |
486 | } | 486 | } |
@@ -489,18 +489,18 @@ static bool | |||
489 | intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | 489 | intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, |
490 | struct drm_display_mode *adjusted_mode) | 490 | struct drm_display_mode *adjusted_mode) |
491 | { | 491 | { |
492 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 492 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
493 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 493 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
494 | int lane_count, clock; | 494 | int lane_count, clock; |
495 | int max_lane_count = intel_dp_max_lane_count(intel_output); | 495 | int max_lane_count = intel_dp_max_lane_count(intel_encoder); |
496 | int max_clock = intel_dp_max_link_bw(intel_output) == DP_LINK_BW_2_7 ? 1 : 0; | 496 | int max_clock = intel_dp_max_link_bw(intel_encoder) == DP_LINK_BW_2_7 ? 1 : 0; |
497 | static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; | 497 | static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; |
498 | 498 | ||
499 | for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { | 499 | for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { |
500 | for (clock = 0; clock <= max_clock; clock++) { | 500 | for (clock = 0; clock <= max_clock; clock++) { |
501 | int link_avail = intel_dp_link_clock(bws[clock]) * lane_count; | 501 | int link_avail = intel_dp_link_clock(bws[clock]) * lane_count; |
502 | 502 | ||
503 | if (intel_dp_link_required(encoder->dev, intel_output, mode->clock) | 503 | if (intel_dp_link_required(encoder->dev, intel_encoder, mode->clock) |
504 | <= link_avail) { | 504 | <= link_avail) { |
505 | dp_priv->link_bw = bws[clock]; | 505 | dp_priv->link_bw = bws[clock]; |
506 | dp_priv->lane_count = lane_count; | 506 | dp_priv->lane_count = lane_count; |
@@ -562,16 +562,16 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | |||
562 | struct intel_dp_m_n m_n; | 562 | struct intel_dp_m_n m_n; |
563 | 563 | ||
564 | /* | 564 | /* |
565 | * Find the lane count in the intel_output private | 565 | * Find the lane count in the intel_encoder private |
566 | */ | 566 | */ |
567 | list_for_each_entry(connector, &mode_config->connector_list, head) { | 567 | list_for_each_entry(connector, &mode_config->connector_list, head) { |
568 | struct intel_output *intel_output = to_intel_output(connector); | 568 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
569 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 569 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
570 | 570 | ||
571 | if (!connector->encoder || connector->encoder->crtc != crtc) | 571 | if (!connector->encoder || connector->encoder->crtc != crtc) |
572 | continue; | 572 | continue; |
573 | 573 | ||
574 | if (intel_output->type == INTEL_OUTPUT_DISPLAYPORT) { | 574 | if (intel_encoder->type == INTEL_OUTPUT_DISPLAYPORT) { |
575 | lane_count = dp_priv->lane_count; | 575 | lane_count = dp_priv->lane_count; |
576 | break; | 576 | break; |
577 | } | 577 | } |
@@ -626,9 +626,9 @@ static void | |||
626 | intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | 626 | intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, |
627 | struct drm_display_mode *adjusted_mode) | 627 | struct drm_display_mode *adjusted_mode) |
628 | { | 628 | { |
629 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 629 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
630 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 630 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
631 | struct drm_crtc *crtc = intel_output->enc.crtc; | 631 | struct drm_crtc *crtc = intel_encoder->enc.crtc; |
632 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 632 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
633 | 633 | ||
634 | dp_priv->DP = (DP_LINK_TRAIN_OFF | | 634 | dp_priv->DP = (DP_LINK_TRAIN_OFF | |
@@ -667,7 +667,7 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
667 | if (intel_crtc->pipe == 1) | 667 | if (intel_crtc->pipe == 1) |
668 | dp_priv->DP |= DP_PIPEB_SELECT; | 668 | dp_priv->DP |= DP_PIPEB_SELECT; |
669 | 669 | ||
670 | if (IS_eDP(intel_output)) { | 670 | if (IS_eDP(intel_encoder)) { |
671 | /* don't miss out required setting for eDP */ | 671 | /* don't miss out required setting for eDP */ |
672 | dp_priv->DP |= DP_PLL_ENABLE; | 672 | dp_priv->DP |= DP_PLL_ENABLE; |
673 | if (adjusted_mode->clock < 200000) | 673 | if (adjusted_mode->clock < 200000) |
@@ -702,22 +702,22 @@ static void ironlake_edp_backlight_off (struct drm_device *dev) | |||
702 | static void | 702 | static void |
703 | intel_dp_dpms(struct drm_encoder *encoder, int mode) | 703 | intel_dp_dpms(struct drm_encoder *encoder, int mode) |
704 | { | 704 | { |
705 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 705 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
706 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 706 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
707 | struct drm_device *dev = intel_output->base.dev; | 707 | struct drm_device *dev = intel_encoder->base.dev; |
708 | struct drm_i915_private *dev_priv = dev->dev_private; | 708 | struct drm_i915_private *dev_priv = dev->dev_private; |
709 | uint32_t dp_reg = I915_READ(dp_priv->output_reg); | 709 | uint32_t dp_reg = I915_READ(dp_priv->output_reg); |
710 | 710 | ||
711 | if (mode != DRM_MODE_DPMS_ON) { | 711 | if (mode != DRM_MODE_DPMS_ON) { |
712 | if (dp_reg & DP_PORT_EN) { | 712 | if (dp_reg & DP_PORT_EN) { |
713 | intel_dp_link_down(intel_output, dp_priv->DP); | 713 | intel_dp_link_down(intel_encoder, dp_priv->DP); |
714 | if (IS_eDP(intel_output)) | 714 | if (IS_eDP(intel_encoder)) |
715 | ironlake_edp_backlight_off(dev); | 715 | ironlake_edp_backlight_off(dev); |
716 | } | 716 | } |
717 | } else { | 717 | } else { |
718 | if (!(dp_reg & DP_PORT_EN)) { | 718 | if (!(dp_reg & DP_PORT_EN)) { |
719 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 719 | intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); |
720 | if (IS_eDP(intel_output)) | 720 | if (IS_eDP(intel_encoder)) |
721 | ironlake_edp_backlight_on(dev); | 721 | ironlake_edp_backlight_on(dev); |
722 | } | 722 | } |
723 | } | 723 | } |
@@ -729,12 +729,12 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) | |||
729 | * link status information | 729 | * link status information |
730 | */ | 730 | */ |
731 | static bool | 731 | static bool |
732 | intel_dp_get_link_status(struct intel_output *intel_output, | 732 | intel_dp_get_link_status(struct intel_encoder *intel_encoder, |
733 | uint8_t link_status[DP_LINK_STATUS_SIZE]) | 733 | uint8_t link_status[DP_LINK_STATUS_SIZE]) |
734 | { | 734 | { |
735 | int ret; | 735 | int ret; |
736 | 736 | ||
737 | ret = intel_dp_aux_native_read(intel_output, | 737 | ret = intel_dp_aux_native_read(intel_encoder, |
738 | DP_LANE0_1_STATUS, | 738 | DP_LANE0_1_STATUS, |
739 | link_status, DP_LINK_STATUS_SIZE); | 739 | link_status, DP_LINK_STATUS_SIZE); |
740 | if (ret != DP_LINK_STATUS_SIZE) | 740 | if (ret != DP_LINK_STATUS_SIZE) |
@@ -752,13 +752,13 @@ intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE], | |||
752 | static void | 752 | static void |
753 | intel_dp_save(struct drm_connector *connector) | 753 | intel_dp_save(struct drm_connector *connector) |
754 | { | 754 | { |
755 | struct intel_output *intel_output = to_intel_output(connector); | 755 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
756 | struct drm_device *dev = intel_output->base.dev; | 756 | struct drm_device *dev = intel_encoder->base.dev; |
757 | struct drm_i915_private *dev_priv = dev->dev_private; | 757 | struct drm_i915_private *dev_priv = dev->dev_private; |
758 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 758 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
759 | 759 | ||
760 | dp_priv->save_DP = I915_READ(dp_priv->output_reg); | 760 | dp_priv->save_DP = I915_READ(dp_priv->output_reg); |
761 | intel_dp_aux_native_read(intel_output, DP_LINK_BW_SET, | 761 | intel_dp_aux_native_read(intel_encoder, DP_LINK_BW_SET, |
762 | dp_priv->save_link_configuration, | 762 | dp_priv->save_link_configuration, |
763 | sizeof (dp_priv->save_link_configuration)); | 763 | sizeof (dp_priv->save_link_configuration)); |
764 | } | 764 | } |
@@ -825,7 +825,7 @@ intel_dp_pre_emphasis_max(uint8_t voltage_swing) | |||
825 | } | 825 | } |
826 | 826 | ||
827 | static void | 827 | static void |
828 | intel_get_adjust_train(struct intel_output *intel_output, | 828 | intel_get_adjust_train(struct intel_encoder *intel_encoder, |
829 | uint8_t link_status[DP_LINK_STATUS_SIZE], | 829 | uint8_t link_status[DP_LINK_STATUS_SIZE], |
830 | int lane_count, | 830 | int lane_count, |
831 | uint8_t train_set[4]) | 831 | uint8_t train_set[4]) |
@@ -942,15 +942,15 @@ intel_channel_eq_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count) | |||
942 | } | 942 | } |
943 | 943 | ||
944 | static bool | 944 | static bool |
945 | intel_dp_set_link_train(struct intel_output *intel_output, | 945 | intel_dp_set_link_train(struct intel_encoder *intel_encoder, |
946 | uint32_t dp_reg_value, | 946 | uint32_t dp_reg_value, |
947 | uint8_t dp_train_pat, | 947 | uint8_t dp_train_pat, |
948 | uint8_t train_set[4], | 948 | uint8_t train_set[4], |
949 | bool first) | 949 | bool first) |
950 | { | 950 | { |
951 | struct drm_device *dev = intel_output->base.dev; | 951 | struct drm_device *dev = intel_encoder->base.dev; |
952 | struct drm_i915_private *dev_priv = dev->dev_private; | 952 | struct drm_i915_private *dev_priv = dev->dev_private; |
953 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 953 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
954 | int ret; | 954 | int ret; |
955 | 955 | ||
956 | I915_WRITE(dp_priv->output_reg, dp_reg_value); | 956 | I915_WRITE(dp_priv->output_reg, dp_reg_value); |
@@ -958,11 +958,11 @@ intel_dp_set_link_train(struct intel_output *intel_output, | |||
958 | if (first) | 958 | if (first) |
959 | intel_wait_for_vblank(dev); | 959 | intel_wait_for_vblank(dev); |
960 | 960 | ||
961 | intel_dp_aux_native_write_1(intel_output, | 961 | intel_dp_aux_native_write_1(intel_encoder, |
962 | DP_TRAINING_PATTERN_SET, | 962 | DP_TRAINING_PATTERN_SET, |
963 | dp_train_pat); | 963 | dp_train_pat); |
964 | 964 | ||
965 | ret = intel_dp_aux_native_write(intel_output, | 965 | ret = intel_dp_aux_native_write(intel_encoder, |
966 | DP_TRAINING_LANE0_SET, train_set, 4); | 966 | DP_TRAINING_LANE0_SET, train_set, 4); |
967 | if (ret != 4) | 967 | if (ret != 4) |
968 | return false; | 968 | return false; |
@@ -971,12 +971,12 @@ intel_dp_set_link_train(struct intel_output *intel_output, | |||
971 | } | 971 | } |
972 | 972 | ||
973 | static void | 973 | static void |
974 | intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | 974 | intel_dp_link_train(struct intel_encoder *intel_encoder, uint32_t DP, |
975 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]) | 975 | uint8_t link_configuration[DP_LINK_CONFIGURATION_SIZE]) |
976 | { | 976 | { |
977 | struct drm_device *dev = intel_output->base.dev; | 977 | struct drm_device *dev = intel_encoder->base.dev; |
978 | struct drm_i915_private *dev_priv = dev->dev_private; | 978 | struct drm_i915_private *dev_priv = dev->dev_private; |
979 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 979 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
980 | uint8_t train_set[4]; | 980 | uint8_t train_set[4]; |
981 | uint8_t link_status[DP_LINK_STATUS_SIZE]; | 981 | uint8_t link_status[DP_LINK_STATUS_SIZE]; |
982 | int i; | 982 | int i; |
@@ -987,7 +987,7 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
987 | int tries; | 987 | int tries; |
988 | 988 | ||
989 | /* Write the link configuration data */ | 989 | /* Write the link configuration data */ |
990 | intel_dp_aux_native_write(intel_output, 0x100, | 990 | intel_dp_aux_native_write(intel_encoder, 0x100, |
991 | link_configuration, DP_LINK_CONFIGURATION_SIZE); | 991 | link_configuration, DP_LINK_CONFIGURATION_SIZE); |
992 | 992 | ||
993 | DP |= DP_PORT_EN; | 993 | DP |= DP_PORT_EN; |
@@ -1001,14 +1001,14 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1001 | uint32_t signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count); | 1001 | uint32_t signal_levels = intel_dp_signal_levels(train_set[0], dp_priv->lane_count); |
1002 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; | 1002 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; |
1003 | 1003 | ||
1004 | if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_1, | 1004 | if (!intel_dp_set_link_train(intel_encoder, DP | DP_LINK_TRAIN_PAT_1, |
1005 | DP_TRAINING_PATTERN_1, train_set, first)) | 1005 | DP_TRAINING_PATTERN_1, train_set, first)) |
1006 | break; | 1006 | break; |
1007 | first = false; | 1007 | first = false; |
1008 | /* Set training pattern 1 */ | 1008 | /* Set training pattern 1 */ |
1009 | 1009 | ||
1010 | udelay(100); | 1010 | udelay(100); |
1011 | if (!intel_dp_get_link_status(intel_output, link_status)) | 1011 | if (!intel_dp_get_link_status(intel_encoder, link_status)) |
1012 | break; | 1012 | break; |
1013 | 1013 | ||
1014 | if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) { | 1014 | if (intel_clock_recovery_ok(link_status, dp_priv->lane_count)) { |
@@ -1033,7 +1033,7 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1033 | voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; | 1033 | voltage = train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK; |
1034 | 1034 | ||
1035 | /* Compute new train_set as requested by target */ | 1035 | /* Compute new train_set as requested by target */ |
1036 | intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set); | 1036 | intel_get_adjust_train(intel_encoder, link_status, dp_priv->lane_count, train_set); |
1037 | } | 1037 | } |
1038 | 1038 | ||
1039 | /* channel equalization */ | 1039 | /* channel equalization */ |
@@ -1045,13 +1045,13 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1045 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; | 1045 | DP = (DP & ~(DP_VOLTAGE_MASK|DP_PRE_EMPHASIS_MASK)) | signal_levels; |
1046 | 1046 | ||
1047 | /* channel eq pattern */ | 1047 | /* channel eq pattern */ |
1048 | if (!intel_dp_set_link_train(intel_output, DP | DP_LINK_TRAIN_PAT_2, | 1048 | if (!intel_dp_set_link_train(intel_encoder, DP | DP_LINK_TRAIN_PAT_2, |
1049 | DP_TRAINING_PATTERN_2, train_set, | 1049 | DP_TRAINING_PATTERN_2, train_set, |
1050 | false)) | 1050 | false)) |
1051 | break; | 1051 | break; |
1052 | 1052 | ||
1053 | udelay(400); | 1053 | udelay(400); |
1054 | if (!intel_dp_get_link_status(intel_output, link_status)) | 1054 | if (!intel_dp_get_link_status(intel_encoder, link_status)) |
1055 | break; | 1055 | break; |
1056 | 1056 | ||
1057 | if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) { | 1057 | if (intel_channel_eq_ok(link_status, dp_priv->lane_count)) { |
@@ -1064,26 +1064,26 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP, | |||
1064 | break; | 1064 | break; |
1065 | 1065 | ||
1066 | /* Compute new train_set as requested by target */ | 1066 | /* Compute new train_set as requested by target */ |
1067 | intel_get_adjust_train(intel_output, link_status, dp_priv->lane_count, train_set); | 1067 | intel_get_adjust_train(intel_encoder, link_status, dp_priv->lane_count, train_set); |
1068 | ++tries; | 1068 | ++tries; |
1069 | } | 1069 | } |
1070 | 1070 | ||
1071 | I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_OFF); | 1071 | I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_OFF); |
1072 | POSTING_READ(dp_priv->output_reg); | 1072 | POSTING_READ(dp_priv->output_reg); |
1073 | intel_dp_aux_native_write_1(intel_output, | 1073 | intel_dp_aux_native_write_1(intel_encoder, |
1074 | DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE); | 1074 | DP_TRAINING_PATTERN_SET, DP_TRAINING_PATTERN_DISABLE); |
1075 | } | 1075 | } |
1076 | 1076 | ||
1077 | static void | 1077 | static void |
1078 | intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | 1078 | intel_dp_link_down(struct intel_encoder *intel_encoder, uint32_t DP) |
1079 | { | 1079 | { |
1080 | struct drm_device *dev = intel_output->base.dev; | 1080 | struct drm_device *dev = intel_encoder->base.dev; |
1081 | struct drm_i915_private *dev_priv = dev->dev_private; | 1081 | struct drm_i915_private *dev_priv = dev->dev_private; |
1082 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1082 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1083 | 1083 | ||
1084 | DRM_DEBUG_KMS("\n"); | 1084 | DRM_DEBUG_KMS("\n"); |
1085 | 1085 | ||
1086 | if (IS_eDP(intel_output)) { | 1086 | if (IS_eDP(intel_encoder)) { |
1087 | DP &= ~DP_PLL_ENABLE; | 1087 | DP &= ~DP_PLL_ENABLE; |
1088 | I915_WRITE(dp_priv->output_reg, DP); | 1088 | I915_WRITE(dp_priv->output_reg, DP); |
1089 | POSTING_READ(dp_priv->output_reg); | 1089 | POSTING_READ(dp_priv->output_reg); |
@@ -1096,7 +1096,7 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1096 | 1096 | ||
1097 | udelay(17000); | 1097 | udelay(17000); |
1098 | 1098 | ||
1099 | if (IS_eDP(intel_output)) | 1099 | if (IS_eDP(intel_encoder)) |
1100 | DP |= DP_LINK_TRAIN_OFF; | 1100 | DP |= DP_LINK_TRAIN_OFF; |
1101 | I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN); | 1101 | I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN); |
1102 | POSTING_READ(dp_priv->output_reg); | 1102 | POSTING_READ(dp_priv->output_reg); |
@@ -1105,13 +1105,13 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP) | |||
1105 | static void | 1105 | static void |
1106 | intel_dp_restore(struct drm_connector *connector) | 1106 | intel_dp_restore(struct drm_connector *connector) |
1107 | { | 1107 | { |
1108 | struct intel_output *intel_output = to_intel_output(connector); | 1108 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1109 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1109 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1110 | 1110 | ||
1111 | if (dp_priv->save_DP & DP_PORT_EN) | 1111 | if (dp_priv->save_DP & DP_PORT_EN) |
1112 | intel_dp_link_train(intel_output, dp_priv->save_DP, dp_priv->save_link_configuration); | 1112 | intel_dp_link_train(intel_encoder, dp_priv->save_DP, dp_priv->save_link_configuration); |
1113 | else | 1113 | else |
1114 | intel_dp_link_down(intel_output, dp_priv->save_DP); | 1114 | intel_dp_link_down(intel_encoder, dp_priv->save_DP); |
1115 | } | 1115 | } |
1116 | 1116 | ||
1117 | /* | 1117 | /* |
@@ -1124,32 +1124,32 @@ intel_dp_restore(struct drm_connector *connector) | |||
1124 | */ | 1124 | */ |
1125 | 1125 | ||
1126 | static void | 1126 | static void |
1127 | intel_dp_check_link_status(struct intel_output *intel_output) | 1127 | intel_dp_check_link_status(struct intel_encoder *intel_encoder) |
1128 | { | 1128 | { |
1129 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1129 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1130 | uint8_t link_status[DP_LINK_STATUS_SIZE]; | 1130 | uint8_t link_status[DP_LINK_STATUS_SIZE]; |
1131 | 1131 | ||
1132 | if (!intel_output->enc.crtc) | 1132 | if (!intel_encoder->enc.crtc) |
1133 | return; | 1133 | return; |
1134 | 1134 | ||
1135 | if (!intel_dp_get_link_status(intel_output, link_status)) { | 1135 | if (!intel_dp_get_link_status(intel_encoder, link_status)) { |
1136 | intel_dp_link_down(intel_output, dp_priv->DP); | 1136 | intel_dp_link_down(intel_encoder, dp_priv->DP); |
1137 | return; | 1137 | return; |
1138 | } | 1138 | } |
1139 | 1139 | ||
1140 | if (!intel_channel_eq_ok(link_status, dp_priv->lane_count)) | 1140 | if (!intel_channel_eq_ok(link_status, dp_priv->lane_count)) |
1141 | intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); | 1141 | intel_dp_link_train(intel_encoder, dp_priv->DP, dp_priv->link_configuration); |
1142 | } | 1142 | } |
1143 | 1143 | ||
1144 | static enum drm_connector_status | 1144 | static enum drm_connector_status |
1145 | ironlake_dp_detect(struct drm_connector *connector) | 1145 | ironlake_dp_detect(struct drm_connector *connector) |
1146 | { | 1146 | { |
1147 | struct intel_output *intel_output = to_intel_output(connector); | 1147 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1148 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1148 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1149 | enum drm_connector_status status; | 1149 | enum drm_connector_status status; |
1150 | 1150 | ||
1151 | status = connector_status_disconnected; | 1151 | status = connector_status_disconnected; |
1152 | if (intel_dp_aux_native_read(intel_output, | 1152 | if (intel_dp_aux_native_read(intel_encoder, |
1153 | 0x000, dp_priv->dpcd, | 1153 | 0x000, dp_priv->dpcd, |
1154 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) | 1154 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) |
1155 | { | 1155 | { |
@@ -1168,10 +1168,10 @@ ironlake_dp_detect(struct drm_connector *connector) | |||
1168 | static enum drm_connector_status | 1168 | static enum drm_connector_status |
1169 | intel_dp_detect(struct drm_connector *connector) | 1169 | intel_dp_detect(struct drm_connector *connector) |
1170 | { | 1170 | { |
1171 | struct intel_output *intel_output = to_intel_output(connector); | 1171 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1172 | struct drm_device *dev = intel_output->base.dev; | 1172 | struct drm_device *dev = intel_encoder->base.dev; |
1173 | struct drm_i915_private *dev_priv = dev->dev_private; | 1173 | struct drm_i915_private *dev_priv = dev->dev_private; |
1174 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1174 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1175 | uint32_t temp, bit; | 1175 | uint32_t temp, bit; |
1176 | enum drm_connector_status status; | 1176 | enum drm_connector_status status; |
1177 | 1177 | ||
@@ -1210,7 +1210,7 @@ intel_dp_detect(struct drm_connector *connector) | |||
1210 | return connector_status_disconnected; | 1210 | return connector_status_disconnected; |
1211 | 1211 | ||
1212 | status = connector_status_disconnected; | 1212 | status = connector_status_disconnected; |
1213 | if (intel_dp_aux_native_read(intel_output, | 1213 | if (intel_dp_aux_native_read(intel_encoder, |
1214 | 0x000, dp_priv->dpcd, | 1214 | 0x000, dp_priv->dpcd, |
1215 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) | 1215 | sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd)) |
1216 | { | 1216 | { |
@@ -1222,20 +1222,20 @@ intel_dp_detect(struct drm_connector *connector) | |||
1222 | 1222 | ||
1223 | static int intel_dp_get_modes(struct drm_connector *connector) | 1223 | static int intel_dp_get_modes(struct drm_connector *connector) |
1224 | { | 1224 | { |
1225 | struct intel_output *intel_output = to_intel_output(connector); | 1225 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1226 | struct drm_device *dev = intel_output->base.dev; | 1226 | struct drm_device *dev = intel_encoder->base.dev; |
1227 | struct drm_i915_private *dev_priv = dev->dev_private; | 1227 | struct drm_i915_private *dev_priv = dev->dev_private; |
1228 | int ret; | 1228 | int ret; |
1229 | 1229 | ||
1230 | /* We should parse the EDID data and find out if it has an audio sink | 1230 | /* We should parse the EDID data and find out if it has an audio sink |
1231 | */ | 1231 | */ |
1232 | 1232 | ||
1233 | ret = intel_ddc_get_modes(intel_output); | 1233 | ret = intel_ddc_get_modes(intel_encoder); |
1234 | if (ret) | 1234 | if (ret) |
1235 | return ret; | 1235 | return ret; |
1236 | 1236 | ||
1237 | /* if eDP has no EDID, try to use fixed panel mode from VBT */ | 1237 | /* if eDP has no EDID, try to use fixed panel mode from VBT */ |
1238 | if (IS_eDP(intel_output)) { | 1238 | if (IS_eDP(intel_encoder)) { |
1239 | if (dev_priv->panel_fixed_mode != NULL) { | 1239 | if (dev_priv->panel_fixed_mode != NULL) { |
1240 | struct drm_display_mode *mode; | 1240 | struct drm_display_mode *mode; |
1241 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); | 1241 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); |
@@ -1249,13 +1249,13 @@ static int intel_dp_get_modes(struct drm_connector *connector) | |||
1249 | static void | 1249 | static void |
1250 | intel_dp_destroy (struct drm_connector *connector) | 1250 | intel_dp_destroy (struct drm_connector *connector) |
1251 | { | 1251 | { |
1252 | struct intel_output *intel_output = to_intel_output(connector); | 1252 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1253 | 1253 | ||
1254 | if (intel_output->i2c_bus) | 1254 | if (intel_encoder->i2c_bus) |
1255 | intel_i2c_destroy(intel_output->i2c_bus); | 1255 | intel_i2c_destroy(intel_encoder->i2c_bus); |
1256 | drm_sysfs_connector_remove(connector); | 1256 | drm_sysfs_connector_remove(connector); |
1257 | drm_connector_cleanup(connector); | 1257 | drm_connector_cleanup(connector); |
1258 | kfree(intel_output); | 1258 | kfree(intel_encoder); |
1259 | } | 1259 | } |
1260 | 1260 | ||
1261 | static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = { | 1261 | static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = { |
@@ -1291,12 +1291,12 @@ static const struct drm_encoder_funcs intel_dp_enc_funcs = { | |||
1291 | }; | 1291 | }; |
1292 | 1292 | ||
1293 | void | 1293 | void |
1294 | intel_dp_hot_plug(struct intel_output *intel_output) | 1294 | intel_dp_hot_plug(struct intel_encoder *intel_encoder) |
1295 | { | 1295 | { |
1296 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 1296 | struct intel_dp_priv *dp_priv = intel_encoder->dev_priv; |
1297 | 1297 | ||
1298 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) | 1298 | if (dp_priv->dpms_mode == DRM_MODE_DPMS_ON) |
1299 | intel_dp_check_link_status(intel_output); | 1299 | intel_dp_check_link_status(intel_encoder); |
1300 | } | 1300 | } |
1301 | 1301 | ||
1302 | void | 1302 | void |
@@ -1304,53 +1304,53 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1304 | { | 1304 | { |
1305 | struct drm_i915_private *dev_priv = dev->dev_private; | 1305 | struct drm_i915_private *dev_priv = dev->dev_private; |
1306 | struct drm_connector *connector; | 1306 | struct drm_connector *connector; |
1307 | struct intel_output *intel_output; | 1307 | struct intel_encoder *intel_encoder; |
1308 | struct intel_dp_priv *dp_priv; | 1308 | struct intel_dp_priv *dp_priv; |
1309 | const char *name = NULL; | 1309 | const char *name = NULL; |
1310 | 1310 | ||
1311 | intel_output = kcalloc(sizeof(struct intel_output) + | 1311 | intel_encoder = kcalloc(sizeof(struct intel_encoder) + |
1312 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); | 1312 | sizeof(struct intel_dp_priv), 1, GFP_KERNEL); |
1313 | if (!intel_output) | 1313 | if (!intel_encoder) |
1314 | return; | 1314 | return; |
1315 | 1315 | ||
1316 | dp_priv = (struct intel_dp_priv *)(intel_output + 1); | 1316 | dp_priv = (struct intel_dp_priv *)(intel_encoder + 1); |
1317 | 1317 | ||
1318 | connector = &intel_output->base; | 1318 | connector = &intel_encoder->base; |
1319 | drm_connector_init(dev, connector, &intel_dp_connector_funcs, | 1319 | drm_connector_init(dev, connector, &intel_dp_connector_funcs, |
1320 | DRM_MODE_CONNECTOR_DisplayPort); | 1320 | DRM_MODE_CONNECTOR_DisplayPort); |
1321 | drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); | 1321 | drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); |
1322 | 1322 | ||
1323 | if (output_reg == DP_A) | 1323 | if (output_reg == DP_A) |
1324 | intel_output->type = INTEL_OUTPUT_EDP; | 1324 | intel_encoder->type = INTEL_OUTPUT_EDP; |
1325 | else | 1325 | else |
1326 | intel_output->type = INTEL_OUTPUT_DISPLAYPORT; | 1326 | intel_encoder->type = INTEL_OUTPUT_DISPLAYPORT; |
1327 | 1327 | ||
1328 | if (output_reg == DP_B || output_reg == PCH_DP_B) | 1328 | if (output_reg == DP_B || output_reg == PCH_DP_B) |
1329 | intel_output->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); | 1329 | intel_encoder->clone_mask = (1 << INTEL_DP_B_CLONE_BIT); |
1330 | else if (output_reg == DP_C || output_reg == PCH_DP_C) | 1330 | else if (output_reg == DP_C || output_reg == PCH_DP_C) |
1331 | intel_output->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); | 1331 | intel_encoder->clone_mask = (1 << INTEL_DP_C_CLONE_BIT); |
1332 | else if (output_reg == DP_D || output_reg == PCH_DP_D) | 1332 | else if (output_reg == DP_D || output_reg == PCH_DP_D) |
1333 | intel_output->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); | 1333 | intel_encoder->clone_mask = (1 << INTEL_DP_D_CLONE_BIT); |
1334 | 1334 | ||
1335 | if (IS_eDP(intel_output)) | 1335 | if (IS_eDP(intel_encoder)) |
1336 | intel_output->clone_mask = (1 << INTEL_EDP_CLONE_BIT); | 1336 | intel_encoder->clone_mask = (1 << INTEL_EDP_CLONE_BIT); |
1337 | 1337 | ||
1338 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 1338 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
1339 | connector->interlace_allowed = true; | 1339 | connector->interlace_allowed = true; |
1340 | connector->doublescan_allowed = 0; | 1340 | connector->doublescan_allowed = 0; |
1341 | 1341 | ||
1342 | dp_priv->intel_output = intel_output; | 1342 | dp_priv->intel_encoder = intel_encoder; |
1343 | dp_priv->output_reg = output_reg; | 1343 | dp_priv->output_reg = output_reg; |
1344 | dp_priv->has_audio = false; | 1344 | dp_priv->has_audio = false; |
1345 | dp_priv->dpms_mode = DRM_MODE_DPMS_ON; | 1345 | dp_priv->dpms_mode = DRM_MODE_DPMS_ON; |
1346 | intel_output->dev_priv = dp_priv; | 1346 | intel_encoder->dev_priv = dp_priv; |
1347 | 1347 | ||
1348 | drm_encoder_init(dev, &intel_output->enc, &intel_dp_enc_funcs, | 1348 | drm_encoder_init(dev, &intel_encoder->enc, &intel_dp_enc_funcs, |
1349 | DRM_MODE_ENCODER_TMDS); | 1349 | DRM_MODE_ENCODER_TMDS); |
1350 | drm_encoder_helper_add(&intel_output->enc, &intel_dp_helper_funcs); | 1350 | drm_encoder_helper_add(&intel_encoder->enc, &intel_dp_helper_funcs); |
1351 | 1351 | ||
1352 | drm_mode_connector_attach_encoder(&intel_output->base, | 1352 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
1353 | &intel_output->enc); | 1353 | &intel_encoder->enc); |
1354 | drm_sysfs_connector_add(connector); | 1354 | drm_sysfs_connector_add(connector); |
1355 | 1355 | ||
1356 | /* Set up the DDC bus. */ | 1356 | /* Set up the DDC bus. */ |
@@ -1378,10 +1378,10 @@ intel_dp_init(struct drm_device *dev, int output_reg) | |||
1378 | break; | 1378 | break; |
1379 | } | 1379 | } |
1380 | 1380 | ||
1381 | intel_dp_i2c_init(intel_output, name); | 1381 | intel_dp_i2c_init(intel_encoder, name); |
1382 | 1382 | ||
1383 | intel_output->ddc_bus = &dp_priv->adapter; | 1383 | intel_encoder->ddc_bus = &dp_priv->adapter; |
1384 | intel_output->hot_plug = intel_dp_hot_plug; | 1384 | intel_encoder->hot_plug = intel_dp_hot_plug; |
1385 | 1385 | ||
1386 | if (output_reg == DP_A) { | 1386 | if (output_reg == DP_A) { |
1387 | /* initialize panel mode from VBT if available for eDP */ | 1387 | /* initialize panel mode from VBT if available for eDP */ |
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 3a467ca57857..e30253755f12 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -95,7 +95,7 @@ struct intel_framebuffer { | |||
95 | }; | 95 | }; |
96 | 96 | ||
97 | 97 | ||
98 | struct intel_output { | 98 | struct intel_encoder { |
99 | struct drm_connector base; | 99 | struct drm_connector base; |
100 | 100 | ||
101 | struct drm_encoder enc; | 101 | struct drm_encoder enc; |
@@ -105,7 +105,7 @@ struct intel_output { | |||
105 | bool load_detect_temp; | 105 | bool load_detect_temp; |
106 | bool needs_tv_clock; | 106 | bool needs_tv_clock; |
107 | void *dev_priv; | 107 | void *dev_priv; |
108 | void (*hot_plug)(struct intel_output *); | 108 | void (*hot_plug)(struct intel_encoder *); |
109 | int crtc_mask; | 109 | int crtc_mask; |
110 | int clone_mask; | 110 | int clone_mask; |
111 | }; | 111 | }; |
@@ -152,15 +152,15 @@ struct intel_crtc { | |||
152 | }; | 152 | }; |
153 | 153 | ||
154 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) | 154 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) |
155 | #define to_intel_output(x) container_of(x, struct intel_output, base) | 155 | #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) |
156 | #define enc_to_intel_output(x) container_of(x, struct intel_output, enc) | 156 | #define enc_to_intel_encoder(x) container_of(x, struct intel_encoder, enc) |
157 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) | 157 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) |
158 | 158 | ||
159 | struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg, | 159 | struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg, |
160 | const char *name); | 160 | const char *name); |
161 | void intel_i2c_destroy(struct i2c_adapter *adapter); | 161 | void intel_i2c_destroy(struct i2c_adapter *adapter); |
162 | int intel_ddc_get_modes(struct intel_output *intel_output); | 162 | int intel_ddc_get_modes(struct intel_encoder *intel_encoder); |
163 | extern bool intel_ddc_probe(struct intel_output *intel_output); | 163 | extern bool intel_ddc_probe(struct intel_encoder *intel_encoder); |
164 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable); | 164 | void intel_i2c_quirk_set(struct drm_device *dev, bool enable); |
165 | void intel_i2c_reset_gmbus(struct drm_device *dev); | 165 | void intel_i2c_reset_gmbus(struct drm_device *dev); |
166 | 166 | ||
@@ -175,7 +175,7 @@ extern void intel_dp_init(struct drm_device *dev, int dp_reg); | |||
175 | void | 175 | void |
176 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, | 176 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, |
177 | struct drm_display_mode *adjusted_mode); | 177 | struct drm_display_mode *adjusted_mode); |
178 | extern void intel_edp_link_config (struct intel_output *, int *, int *); | 178 | extern void intel_edp_link_config (struct intel_encoder *, int *, int *); |
179 | 179 | ||
180 | 180 | ||
181 | extern int intel_panel_fitter_pipe (struct drm_device *dev); | 181 | extern int intel_panel_fitter_pipe (struct drm_device *dev); |
@@ -191,10 +191,10 @@ int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, | |||
191 | struct drm_file *file_priv); | 191 | struct drm_file *file_priv); |
192 | extern void intel_wait_for_vblank(struct drm_device *dev); | 192 | extern void intel_wait_for_vblank(struct drm_device *dev); |
193 | extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); | 193 | extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe); |
194 | extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_output *intel_output, | 194 | extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, |
195 | struct drm_display_mode *mode, | 195 | struct drm_display_mode *mode, |
196 | int *dpms_mode); | 196 | int *dpms_mode); |
197 | extern void intel_release_load_detect_pipe(struct intel_output *intel_output, | 197 | extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, |
198 | int dpms_mode); | 198 | int dpms_mode); |
199 | 199 | ||
200 | extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB); | 200 | extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB); |
diff --git a/drivers/gpu/drm/i915/intel_dvo.c b/drivers/gpu/drm/i915/intel_dvo.c index 0427ca5a2514..ebf213c96b9c 100644 --- a/drivers/gpu/drm/i915/intel_dvo.c +++ b/drivers/gpu/drm/i915/intel_dvo.c | |||
@@ -80,8 +80,8 @@ static struct intel_dvo_device intel_dvo_devices[] = { | |||
80 | static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) | 80 | static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) |
81 | { | 81 | { |
82 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; | 82 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; |
83 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 83 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
84 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 84 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
85 | u32 dvo_reg = dvo->dvo_reg; | 85 | u32 dvo_reg = dvo->dvo_reg; |
86 | u32 temp = I915_READ(dvo_reg); | 86 | u32 temp = I915_READ(dvo_reg); |
87 | 87 | ||
@@ -99,8 +99,8 @@ static void intel_dvo_dpms(struct drm_encoder *encoder, int mode) | |||
99 | static void intel_dvo_save(struct drm_connector *connector) | 99 | static void intel_dvo_save(struct drm_connector *connector) |
100 | { | 100 | { |
101 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | 101 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
102 | struct intel_output *intel_output = to_intel_output(connector); | 102 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
103 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 103 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
104 | 104 | ||
105 | /* Each output should probably just save the registers it touches, | 105 | /* Each output should probably just save the registers it touches, |
106 | * but for now, use more overkill. | 106 | * but for now, use more overkill. |
@@ -115,8 +115,8 @@ static void intel_dvo_save(struct drm_connector *connector) | |||
115 | static void intel_dvo_restore(struct drm_connector *connector) | 115 | static void intel_dvo_restore(struct drm_connector *connector) |
116 | { | 116 | { |
117 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | 117 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
118 | struct intel_output *intel_output = to_intel_output(connector); | 118 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
119 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 119 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
120 | 120 | ||
121 | dvo->dev_ops->restore(dvo); | 121 | dvo->dev_ops->restore(dvo); |
122 | 122 | ||
@@ -128,8 +128,8 @@ static void intel_dvo_restore(struct drm_connector *connector) | |||
128 | static int intel_dvo_mode_valid(struct drm_connector *connector, | 128 | static int intel_dvo_mode_valid(struct drm_connector *connector, |
129 | struct drm_display_mode *mode) | 129 | struct drm_display_mode *mode) |
130 | { | 130 | { |
131 | struct intel_output *intel_output = to_intel_output(connector); | 131 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
132 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 132 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
133 | 133 | ||
134 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 134 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
135 | return MODE_NO_DBLESCAN; | 135 | return MODE_NO_DBLESCAN; |
@@ -150,8 +150,8 @@ static bool intel_dvo_mode_fixup(struct drm_encoder *encoder, | |||
150 | struct drm_display_mode *mode, | 150 | struct drm_display_mode *mode, |
151 | struct drm_display_mode *adjusted_mode) | 151 | struct drm_display_mode *adjusted_mode) |
152 | { | 152 | { |
153 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 153 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
154 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 154 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
155 | 155 | ||
156 | /* If we have timings from the BIOS for the panel, put them in | 156 | /* If we have timings from the BIOS for the panel, put them in |
157 | * to the adjusted mode. The CRTC will be set up for this mode, | 157 | * to the adjusted mode. The CRTC will be set up for this mode, |
@@ -186,8 +186,8 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder, | |||
186 | struct drm_device *dev = encoder->dev; | 186 | struct drm_device *dev = encoder->dev; |
187 | struct drm_i915_private *dev_priv = dev->dev_private; | 187 | struct drm_i915_private *dev_priv = dev->dev_private; |
188 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | 188 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
189 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 189 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
190 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 190 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
191 | int pipe = intel_crtc->pipe; | 191 | int pipe = intel_crtc->pipe; |
192 | u32 dvo_val; | 192 | u32 dvo_val; |
193 | u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg; | 193 | u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg; |
@@ -241,23 +241,23 @@ static void intel_dvo_mode_set(struct drm_encoder *encoder, | |||
241 | */ | 241 | */ |
242 | static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector) | 242 | static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector) |
243 | { | 243 | { |
244 | struct intel_output *intel_output = to_intel_output(connector); | 244 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
245 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 245 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
246 | 246 | ||
247 | return dvo->dev_ops->detect(dvo); | 247 | return dvo->dev_ops->detect(dvo); |
248 | } | 248 | } |
249 | 249 | ||
250 | static int intel_dvo_get_modes(struct drm_connector *connector) | 250 | static int intel_dvo_get_modes(struct drm_connector *connector) |
251 | { | 251 | { |
252 | struct intel_output *intel_output = to_intel_output(connector); | 252 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
253 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 253 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
254 | 254 | ||
255 | /* We should probably have an i2c driver get_modes function for those | 255 | /* We should probably have an i2c driver get_modes function for those |
256 | * devices which will have a fixed set of modes determined by the chip | 256 | * devices which will have a fixed set of modes determined by the chip |
257 | * (TV-out, for example), but for now with just TMDS and LVDS, | 257 | * (TV-out, for example), but for now with just TMDS and LVDS, |
258 | * that's not the case. | 258 | * that's not the case. |
259 | */ | 259 | */ |
260 | intel_ddc_get_modes(intel_output); | 260 | intel_ddc_get_modes(intel_encoder); |
261 | if (!list_empty(&connector->probed_modes)) | 261 | if (!list_empty(&connector->probed_modes)) |
262 | return 1; | 262 | return 1; |
263 | 263 | ||
@@ -275,8 +275,8 @@ static int intel_dvo_get_modes(struct drm_connector *connector) | |||
275 | 275 | ||
276 | static void intel_dvo_destroy (struct drm_connector *connector) | 276 | static void intel_dvo_destroy (struct drm_connector *connector) |
277 | { | 277 | { |
278 | struct intel_output *intel_output = to_intel_output(connector); | 278 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
279 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 279 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
280 | 280 | ||
281 | if (dvo) { | 281 | if (dvo) { |
282 | if (dvo->dev_ops->destroy) | 282 | if (dvo->dev_ops->destroy) |
@@ -286,13 +286,13 @@ static void intel_dvo_destroy (struct drm_connector *connector) | |||
286 | /* no need, in i830_dvoices[] now */ | 286 | /* no need, in i830_dvoices[] now */ |
287 | //kfree(dvo); | 287 | //kfree(dvo); |
288 | } | 288 | } |
289 | if (intel_output->i2c_bus) | 289 | if (intel_encoder->i2c_bus) |
290 | intel_i2c_destroy(intel_output->i2c_bus); | 290 | intel_i2c_destroy(intel_encoder->i2c_bus); |
291 | if (intel_output->ddc_bus) | 291 | if (intel_encoder->ddc_bus) |
292 | intel_i2c_destroy(intel_output->ddc_bus); | 292 | intel_i2c_destroy(intel_encoder->ddc_bus); |
293 | drm_sysfs_connector_remove(connector); | 293 | drm_sysfs_connector_remove(connector); |
294 | drm_connector_cleanup(connector); | 294 | drm_connector_cleanup(connector); |
295 | kfree(intel_output); | 295 | kfree(intel_encoder); |
296 | } | 296 | } |
297 | 297 | ||
298 | #ifdef RANDR_GET_CRTC_INTERFACE | 298 | #ifdef RANDR_GET_CRTC_INTERFACE |
@@ -300,8 +300,8 @@ static struct drm_crtc *intel_dvo_get_crtc(struct drm_connector *connector) | |||
300 | { | 300 | { |
301 | struct drm_device *dev = connector->dev; | 301 | struct drm_device *dev = connector->dev; |
302 | struct drm_i915_private *dev_priv = dev->dev_private; | 302 | struct drm_i915_private *dev_priv = dev->dev_private; |
303 | struct intel_output *intel_output = to_intel_output(connector); | 303 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
304 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 304 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
305 | int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT); | 305 | int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT); |
306 | 306 | ||
307 | return intel_pipe_to_crtc(pScrn, pipe); | 307 | return intel_pipe_to_crtc(pScrn, pipe); |
@@ -352,8 +352,8 @@ intel_dvo_get_current_mode (struct drm_connector *connector) | |||
352 | { | 352 | { |
353 | struct drm_device *dev = connector->dev; | 353 | struct drm_device *dev = connector->dev; |
354 | struct drm_i915_private *dev_priv = dev->dev_private; | 354 | struct drm_i915_private *dev_priv = dev->dev_private; |
355 | struct intel_output *intel_output = to_intel_output(connector); | 355 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
356 | struct intel_dvo_device *dvo = intel_output->dev_priv; | 356 | struct intel_dvo_device *dvo = intel_encoder->dev_priv; |
357 | uint32_t dvo_reg = dvo->dvo_reg; | 357 | uint32_t dvo_reg = dvo->dvo_reg; |
358 | uint32_t dvo_val = I915_READ(dvo_reg); | 358 | uint32_t dvo_val = I915_READ(dvo_reg); |
359 | struct drm_display_mode *mode = NULL; | 359 | struct drm_display_mode *mode = NULL; |
@@ -383,24 +383,24 @@ intel_dvo_get_current_mode (struct drm_connector *connector) | |||
383 | 383 | ||
384 | void intel_dvo_init(struct drm_device *dev) | 384 | void intel_dvo_init(struct drm_device *dev) |
385 | { | 385 | { |
386 | struct intel_output *intel_output; | 386 | struct intel_encoder *intel_encoder; |
387 | struct intel_dvo_device *dvo; | 387 | struct intel_dvo_device *dvo; |
388 | struct i2c_adapter *i2cbus = NULL; | 388 | struct i2c_adapter *i2cbus = NULL; |
389 | int ret = 0; | 389 | int ret = 0; |
390 | int i; | 390 | int i; |
391 | int encoder_type = DRM_MODE_ENCODER_NONE; | 391 | int encoder_type = DRM_MODE_ENCODER_NONE; |
392 | intel_output = kzalloc (sizeof(struct intel_output), GFP_KERNEL); | 392 | intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL); |
393 | if (!intel_output) | 393 | if (!intel_encoder) |
394 | return; | 394 | return; |
395 | 395 | ||
396 | /* Set up the DDC bus */ | 396 | /* Set up the DDC bus */ |
397 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D"); | 397 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D"); |
398 | if (!intel_output->ddc_bus) | 398 | if (!intel_encoder->ddc_bus) |
399 | goto free_intel; | 399 | goto free_intel; |
400 | 400 | ||
401 | /* Now, try to find a controller */ | 401 | /* Now, try to find a controller */ |
402 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { | 402 | for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) { |
403 | struct drm_connector *connector = &intel_output->base; | 403 | struct drm_connector *connector = &intel_encoder->base; |
404 | int gpio; | 404 | int gpio; |
405 | 405 | ||
406 | dvo = &intel_dvo_devices[i]; | 406 | dvo = &intel_dvo_devices[i]; |
@@ -435,11 +435,11 @@ void intel_dvo_init(struct drm_device *dev) | |||
435 | if (!ret) | 435 | if (!ret) |
436 | continue; | 436 | continue; |
437 | 437 | ||
438 | intel_output->type = INTEL_OUTPUT_DVO; | 438 | intel_encoder->type = INTEL_OUTPUT_DVO; |
439 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 439 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
440 | switch (dvo->type) { | 440 | switch (dvo->type) { |
441 | case INTEL_DVO_CHIP_TMDS: | 441 | case INTEL_DVO_CHIP_TMDS: |
442 | intel_output->clone_mask = | 442 | intel_encoder->clone_mask = |
443 | (1 << INTEL_DVO_TMDS_CLONE_BIT) | | 443 | (1 << INTEL_DVO_TMDS_CLONE_BIT) | |
444 | (1 << INTEL_ANALOG_CLONE_BIT); | 444 | (1 << INTEL_ANALOG_CLONE_BIT); |
445 | drm_connector_init(dev, connector, | 445 | drm_connector_init(dev, connector, |
@@ -448,7 +448,7 @@ void intel_dvo_init(struct drm_device *dev) | |||
448 | encoder_type = DRM_MODE_ENCODER_TMDS; | 448 | encoder_type = DRM_MODE_ENCODER_TMDS; |
449 | break; | 449 | break; |
450 | case INTEL_DVO_CHIP_LVDS: | 450 | case INTEL_DVO_CHIP_LVDS: |
451 | intel_output->clone_mask = | 451 | intel_encoder->clone_mask = |
452 | (1 << INTEL_DVO_LVDS_CLONE_BIT); | 452 | (1 << INTEL_DVO_LVDS_CLONE_BIT); |
453 | drm_connector_init(dev, connector, | 453 | drm_connector_init(dev, connector, |
454 | &intel_dvo_connector_funcs, | 454 | &intel_dvo_connector_funcs, |
@@ -463,16 +463,16 @@ void intel_dvo_init(struct drm_device *dev) | |||
463 | connector->interlace_allowed = false; | 463 | connector->interlace_allowed = false; |
464 | connector->doublescan_allowed = false; | 464 | connector->doublescan_allowed = false; |
465 | 465 | ||
466 | intel_output->dev_priv = dvo; | 466 | intel_encoder->dev_priv = dvo; |
467 | intel_output->i2c_bus = i2cbus; | 467 | intel_encoder->i2c_bus = i2cbus; |
468 | 468 | ||
469 | drm_encoder_init(dev, &intel_output->enc, | 469 | drm_encoder_init(dev, &intel_encoder->enc, |
470 | &intel_dvo_enc_funcs, encoder_type); | 470 | &intel_dvo_enc_funcs, encoder_type); |
471 | drm_encoder_helper_add(&intel_output->enc, | 471 | drm_encoder_helper_add(&intel_encoder->enc, |
472 | &intel_dvo_helper_funcs); | 472 | &intel_dvo_helper_funcs); |
473 | 473 | ||
474 | drm_mode_connector_attach_encoder(&intel_output->base, | 474 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
475 | &intel_output->enc); | 475 | &intel_encoder->enc); |
476 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { | 476 | if (dvo->type == INTEL_DVO_CHIP_LVDS) { |
477 | /* For our LVDS chipsets, we should hopefully be able | 477 | /* For our LVDS chipsets, we should hopefully be able |
478 | * to dig the fixed panel mode out of the BIOS data. | 478 | * to dig the fixed panel mode out of the BIOS data. |
@@ -490,10 +490,10 @@ void intel_dvo_init(struct drm_device *dev) | |||
490 | return; | 490 | return; |
491 | } | 491 | } |
492 | 492 | ||
493 | intel_i2c_destroy(intel_output->ddc_bus); | 493 | intel_i2c_destroy(intel_encoder->ddc_bus); |
494 | /* Didn't find a chip, so tear down. */ | 494 | /* Didn't find a chip, so tear down. */ |
495 | if (i2cbus != NULL) | 495 | if (i2cbus != NULL) |
496 | intel_i2c_destroy(i2cbus); | 496 | intel_i2c_destroy(i2cbus); |
497 | free_intel: | 497 | free_intel: |
498 | kfree(intel_output); | 498 | kfree(intel_encoder); |
499 | } | 499 | } |
diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c index 69bbef92f130..8a0b3bcdc7b1 100644 --- a/drivers/gpu/drm/i915/intel_fb.c +++ b/drivers/gpu/drm/i915/intel_fb.c | |||
@@ -144,7 +144,7 @@ static int intelfb_create(struct drm_device *dev, uint32_t fb_width, | |||
144 | ret = -ENOMEM; | 144 | ret = -ENOMEM; |
145 | goto out; | 145 | goto out; |
146 | } | 146 | } |
147 | obj_priv = fbo->driver_private; | 147 | obj_priv = to_intel_bo(fbo); |
148 | 148 | ||
149 | mutex_lock(&dev->struct_mutex); | 149 | mutex_lock(&dev->struct_mutex); |
150 | 150 | ||
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 1ed02f641258..48cade0cf7b1 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -51,8 +51,8 @@ static void intel_hdmi_mode_set(struct drm_encoder *encoder, | |||
51 | struct drm_i915_private *dev_priv = dev->dev_private; | 51 | struct drm_i915_private *dev_priv = dev->dev_private; |
52 | struct drm_crtc *crtc = encoder->crtc; | 52 | struct drm_crtc *crtc = encoder->crtc; |
53 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 53 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
54 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 54 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
55 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 55 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
56 | u32 sdvox; | 56 | u32 sdvox; |
57 | 57 | ||
58 | sdvox = SDVO_ENCODING_HDMI | | 58 | sdvox = SDVO_ENCODING_HDMI | |
@@ -74,8 +74,8 @@ static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode) | |||
74 | { | 74 | { |
75 | struct drm_device *dev = encoder->dev; | 75 | struct drm_device *dev = encoder->dev; |
76 | struct drm_i915_private *dev_priv = dev->dev_private; | 76 | struct drm_i915_private *dev_priv = dev->dev_private; |
77 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 77 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
78 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 78 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
79 | u32 temp; | 79 | u32 temp; |
80 | 80 | ||
81 | temp = I915_READ(hdmi_priv->sdvox_reg); | 81 | temp = I915_READ(hdmi_priv->sdvox_reg); |
@@ -110,8 +110,8 @@ static void intel_hdmi_save(struct drm_connector *connector) | |||
110 | { | 110 | { |
111 | struct drm_device *dev = connector->dev; | 111 | struct drm_device *dev = connector->dev; |
112 | struct drm_i915_private *dev_priv = dev->dev_private; | 112 | struct drm_i915_private *dev_priv = dev->dev_private; |
113 | struct intel_output *intel_output = to_intel_output(connector); | 113 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
114 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 114 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
115 | 115 | ||
116 | hdmi_priv->save_SDVOX = I915_READ(hdmi_priv->sdvox_reg); | 116 | hdmi_priv->save_SDVOX = I915_READ(hdmi_priv->sdvox_reg); |
117 | } | 117 | } |
@@ -120,8 +120,8 @@ static void intel_hdmi_restore(struct drm_connector *connector) | |||
120 | { | 120 | { |
121 | struct drm_device *dev = connector->dev; | 121 | struct drm_device *dev = connector->dev; |
122 | struct drm_i915_private *dev_priv = dev->dev_private; | 122 | struct drm_i915_private *dev_priv = dev->dev_private; |
123 | struct intel_output *intel_output = to_intel_output(connector); | 123 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
124 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 124 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
125 | 125 | ||
126 | I915_WRITE(hdmi_priv->sdvox_reg, hdmi_priv->save_SDVOX); | 126 | I915_WRITE(hdmi_priv->sdvox_reg, hdmi_priv->save_SDVOX); |
127 | POSTING_READ(hdmi_priv->sdvox_reg); | 127 | POSTING_READ(hdmi_priv->sdvox_reg); |
@@ -151,21 +151,21 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, | |||
151 | static enum drm_connector_status | 151 | static enum drm_connector_status |
152 | intel_hdmi_detect(struct drm_connector *connector) | 152 | intel_hdmi_detect(struct drm_connector *connector) |
153 | { | 153 | { |
154 | struct intel_output *intel_output = to_intel_output(connector); | 154 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
155 | struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; | 155 | struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv; |
156 | struct edid *edid = NULL; | 156 | struct edid *edid = NULL; |
157 | enum drm_connector_status status = connector_status_disconnected; | 157 | enum drm_connector_status status = connector_status_disconnected; |
158 | 158 | ||
159 | hdmi_priv->has_hdmi_sink = false; | 159 | hdmi_priv->has_hdmi_sink = false; |
160 | edid = drm_get_edid(&intel_output->base, | 160 | edid = drm_get_edid(&intel_encoder->base, |
161 | intel_output->ddc_bus); | 161 | intel_encoder->ddc_bus); |
162 | 162 | ||
163 | if (edid) { | 163 | if (edid) { |
164 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { | 164 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { |
165 | status = connector_status_connected; | 165 | status = connector_status_connected; |
166 | hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); | 166 | hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid); |
167 | } | 167 | } |
168 | intel_output->base.display_info.raw_edid = NULL; | 168 | intel_encoder->base.display_info.raw_edid = NULL; |
169 | kfree(edid); | 169 | kfree(edid); |
170 | } | 170 | } |
171 | 171 | ||
@@ -174,24 +174,24 @@ intel_hdmi_detect(struct drm_connector *connector) | |||
174 | 174 | ||
175 | static int intel_hdmi_get_modes(struct drm_connector *connector) | 175 | static int intel_hdmi_get_modes(struct drm_connector *connector) |
176 | { | 176 | { |
177 | struct intel_output *intel_output = to_intel_output(connector); | 177 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
178 | 178 | ||
179 | /* We should parse the EDID data and find out if it's an HDMI sink so | 179 | /* We should parse the EDID data and find out if it's an HDMI sink so |
180 | * we can send audio to it. | 180 | * we can send audio to it. |
181 | */ | 181 | */ |
182 | 182 | ||
183 | return intel_ddc_get_modes(intel_output); | 183 | return intel_ddc_get_modes(intel_encoder); |
184 | } | 184 | } |
185 | 185 | ||
186 | static void intel_hdmi_destroy(struct drm_connector *connector) | 186 | static void intel_hdmi_destroy(struct drm_connector *connector) |
187 | { | 187 | { |
188 | struct intel_output *intel_output = to_intel_output(connector); | 188 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
189 | 189 | ||
190 | if (intel_output->i2c_bus) | 190 | if (intel_encoder->i2c_bus) |
191 | intel_i2c_destroy(intel_output->i2c_bus); | 191 | intel_i2c_destroy(intel_encoder->i2c_bus); |
192 | drm_sysfs_connector_remove(connector); | 192 | drm_sysfs_connector_remove(connector); |
193 | drm_connector_cleanup(connector); | 193 | drm_connector_cleanup(connector); |
194 | kfree(intel_output); | 194 | kfree(intel_encoder); |
195 | } | 195 | } |
196 | 196 | ||
197 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { | 197 | static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { |
@@ -230,63 +230,63 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) | |||
230 | { | 230 | { |
231 | struct drm_i915_private *dev_priv = dev->dev_private; | 231 | struct drm_i915_private *dev_priv = dev->dev_private; |
232 | struct drm_connector *connector; | 232 | struct drm_connector *connector; |
233 | struct intel_output *intel_output; | 233 | struct intel_encoder *intel_encoder; |
234 | struct intel_hdmi_priv *hdmi_priv; | 234 | struct intel_hdmi_priv *hdmi_priv; |
235 | 235 | ||
236 | intel_output = kcalloc(sizeof(struct intel_output) + | 236 | intel_encoder = kcalloc(sizeof(struct intel_encoder) + |
237 | sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); | 237 | sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL); |
238 | if (!intel_output) | 238 | if (!intel_encoder) |
239 | return; | 239 | return; |
240 | hdmi_priv = (struct intel_hdmi_priv *)(intel_output + 1); | 240 | hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1); |
241 | 241 | ||
242 | connector = &intel_output->base; | 242 | connector = &intel_encoder->base; |
243 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, | 243 | drm_connector_init(dev, connector, &intel_hdmi_connector_funcs, |
244 | DRM_MODE_CONNECTOR_HDMIA); | 244 | DRM_MODE_CONNECTOR_HDMIA); |
245 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); | 245 | drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs); |
246 | 246 | ||
247 | intel_output->type = INTEL_OUTPUT_HDMI; | 247 | intel_encoder->type = INTEL_OUTPUT_HDMI; |
248 | 248 | ||
249 | connector->interlace_allowed = 0; | 249 | connector->interlace_allowed = 0; |
250 | connector->doublescan_allowed = 0; | 250 | connector->doublescan_allowed = 0; |
251 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 251 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
252 | 252 | ||
253 | /* Set up the DDC bus. */ | 253 | /* Set up the DDC bus. */ |
254 | if (sdvox_reg == SDVOB) { | 254 | if (sdvox_reg == SDVOB) { |
255 | intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); | 255 | intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT); |
256 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); | 256 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB"); |
257 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; | 257 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
258 | } else if (sdvox_reg == SDVOC) { | 258 | } else if (sdvox_reg == SDVOC) { |
259 | intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); | 259 | intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT); |
260 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); | 260 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC"); |
261 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; | 261 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
262 | } else if (sdvox_reg == HDMIB) { | 262 | } else if (sdvox_reg == HDMIB) { |
263 | intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); | 263 | intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT); |
264 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, | 264 | intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE, |
265 | "HDMIB"); | 265 | "HDMIB"); |
266 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; | 266 | dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS; |
267 | } else if (sdvox_reg == HDMIC) { | 267 | } else if (sdvox_reg == HDMIC) { |
268 | intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); | 268 | intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT); |
269 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, | 269 | intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD, |
270 | "HDMIC"); | 270 | "HDMIC"); |
271 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; | 271 | dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS; |
272 | } else if (sdvox_reg == HDMID) { | 272 | } else if (sdvox_reg == HDMID) { |
273 | intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); | 273 | intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT); |
274 | intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, | 274 | intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF, |
275 | "HDMID"); | 275 | "HDMID"); |
276 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; | 276 | dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS; |
277 | } | 277 | } |
278 | if (!intel_output->ddc_bus) | 278 | if (!intel_encoder->ddc_bus) |
279 | goto err_connector; | 279 | goto err_connector; |
280 | 280 | ||
281 | hdmi_priv->sdvox_reg = sdvox_reg; | 281 | hdmi_priv->sdvox_reg = sdvox_reg; |
282 | intel_output->dev_priv = hdmi_priv; | 282 | intel_encoder->dev_priv = hdmi_priv; |
283 | 283 | ||
284 | drm_encoder_init(dev, &intel_output->enc, &intel_hdmi_enc_funcs, | 284 | drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs, |
285 | DRM_MODE_ENCODER_TMDS); | 285 | DRM_MODE_ENCODER_TMDS); |
286 | drm_encoder_helper_add(&intel_output->enc, &intel_hdmi_helper_funcs); | 286 | drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs); |
287 | 287 | ||
288 | drm_mode_connector_attach_encoder(&intel_output->base, | 288 | drm_mode_connector_attach_encoder(&intel_encoder->base, |
289 | &intel_output->enc); | 289 | &intel_encoder->enc); |
290 | drm_sysfs_connector_add(connector); | 290 | drm_sysfs_connector_add(connector); |
291 | 291 | ||
292 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written | 292 | /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written |
@@ -302,7 +302,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg) | |||
302 | 302 | ||
303 | err_connector: | 303 | err_connector: |
304 | drm_connector_cleanup(connector); | 304 | drm_connector_cleanup(connector); |
305 | kfree(intel_output); | 305 | kfree(intel_encoder); |
306 | 306 | ||
307 | return; | 307 | return; |
308 | } | 308 | } |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 216e9f52b6e0..b66806a37d37 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -239,8 +239,8 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
239 | struct drm_i915_private *dev_priv = dev->dev_private; | 239 | struct drm_i915_private *dev_priv = dev->dev_private; |
240 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); | 240 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
241 | struct drm_encoder *tmp_encoder; | 241 | struct drm_encoder *tmp_encoder; |
242 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 242 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
243 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; | 243 | struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; |
244 | u32 pfit_control = 0, pfit_pgm_ratios = 0; | 244 | u32 pfit_control = 0, pfit_pgm_ratios = 0; |
245 | int left_border = 0, right_border = 0, top_border = 0; | 245 | int left_border = 0, right_border = 0, top_border = 0; |
246 | int bottom_border = 0; | 246 | int bottom_border = 0; |
@@ -587,8 +587,8 @@ static void intel_lvds_mode_set(struct drm_encoder *encoder, | |||
587 | { | 587 | { |
588 | struct drm_device *dev = encoder->dev; | 588 | struct drm_device *dev = encoder->dev; |
589 | struct drm_i915_private *dev_priv = dev->dev_private; | 589 | struct drm_i915_private *dev_priv = dev->dev_private; |
590 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 590 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
591 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; | 591 | struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; |
592 | 592 | ||
593 | /* | 593 | /* |
594 | * The LVDS pin pair will already have been turned on in the | 594 | * The LVDS pin pair will already have been turned on in the |
@@ -635,14 +635,16 @@ static enum drm_connector_status intel_lvds_detect(struct drm_connector *connect | |||
635 | static int intel_lvds_get_modes(struct drm_connector *connector) | 635 | static int intel_lvds_get_modes(struct drm_connector *connector) |
636 | { | 636 | { |
637 | struct drm_device *dev = connector->dev; | 637 | struct drm_device *dev = connector->dev; |
638 | struct intel_output *intel_output = to_intel_output(connector); | 638 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
639 | struct drm_i915_private *dev_priv = dev->dev_private; | 639 | struct drm_i915_private *dev_priv = dev->dev_private; |
640 | int ret = 0; | 640 | int ret = 0; |
641 | 641 | ||
642 | ret = intel_ddc_get_modes(intel_output); | 642 | if (dev_priv->lvds_edid_good) { |
643 | ret = intel_ddc_get_modes(intel_encoder); | ||
643 | 644 | ||
644 | if (ret) | 645 | if (ret) |
645 | return ret; | 646 | return ret; |
647 | } | ||
646 | 648 | ||
647 | /* Didn't get an EDID, so | 649 | /* Didn't get an EDID, so |
648 | * Set wide sync ranges so we get all modes | 650 | * Set wide sync ranges so we get all modes |
@@ -715,11 +717,11 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | |||
715 | static void intel_lvds_destroy(struct drm_connector *connector) | 717 | static void intel_lvds_destroy(struct drm_connector *connector) |
716 | { | 718 | { |
717 | struct drm_device *dev = connector->dev; | 719 | struct drm_device *dev = connector->dev; |
718 | struct intel_output *intel_output = to_intel_output(connector); | 720 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
719 | struct drm_i915_private *dev_priv = dev->dev_private; | 721 | struct drm_i915_private *dev_priv = dev->dev_private; |
720 | 722 | ||
721 | if (intel_output->ddc_bus) | 723 | if (intel_encoder->ddc_bus) |
722 | intel_i2c_destroy(intel_output->ddc_bus); | 724 | intel_i2c_destroy(intel_encoder->ddc_bus); |
723 | if (dev_priv->lid_notifier.notifier_call) | 725 | if (dev_priv->lid_notifier.notifier_call) |
724 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); | 726 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); |
725 | drm_sysfs_connector_remove(connector); | 727 | drm_sysfs_connector_remove(connector); |
@@ -732,13 +734,13 @@ static int intel_lvds_set_property(struct drm_connector *connector, | |||
732 | uint64_t value) | 734 | uint64_t value) |
733 | { | 735 | { |
734 | struct drm_device *dev = connector->dev; | 736 | struct drm_device *dev = connector->dev; |
735 | struct intel_output *intel_output = | 737 | struct intel_encoder *intel_encoder = |
736 | to_intel_output(connector); | 738 | to_intel_encoder(connector); |
737 | 739 | ||
738 | if (property == dev->mode_config.scaling_mode_property && | 740 | if (property == dev->mode_config.scaling_mode_property && |
739 | connector->encoder) { | 741 | connector->encoder) { |
740 | struct drm_crtc *crtc = connector->encoder->crtc; | 742 | struct drm_crtc *crtc = connector->encoder->crtc; |
741 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; | 743 | struct intel_lvds_priv *lvds_priv = intel_encoder->dev_priv; |
742 | if (value == DRM_MODE_SCALE_NONE) { | 744 | if (value == DRM_MODE_SCALE_NONE) { |
743 | DRM_DEBUG_KMS("no scaling not supported\n"); | 745 | DRM_DEBUG_KMS("no scaling not supported\n"); |
744 | return 0; | 746 | return 0; |
@@ -858,6 +860,14 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
858 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), | 860 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
859 | }, | 861 | }, |
860 | }, | 862 | }, |
863 | { | ||
864 | .callback = intel_no_lvds_dmi_callback, | ||
865 | .ident = "Clientron U800", | ||
866 | .matches = { | ||
867 | DMI_MATCH(DMI_SYS_VENDOR, "Clientron"), | ||
868 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), | ||
869 | }, | ||
870 | }, | ||
861 | 871 | ||
862 | { } /* terminating entry */ | 872 | { } /* terminating entry */ |
863 | }; | 873 | }; |
@@ -968,7 +978,7 @@ static int lvds_is_present_in_vbt(struct drm_device *dev) | |||
968 | void intel_lvds_init(struct drm_device *dev) | 978 | void intel_lvds_init(struct drm_device *dev) |
969 | { | 979 | { |
970 | struct drm_i915_private *dev_priv = dev->dev_private; | 980 | struct drm_i915_private *dev_priv = dev->dev_private; |
971 | struct intel_output *intel_output; | 981 | struct intel_encoder *intel_encoder; |
972 | struct drm_connector *connector; | 982 | struct drm_connector *connector; |
973 | struct drm_encoder *encoder; | 983 | struct drm_encoder *encoder; |
974 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ | 984 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
@@ -996,40 +1006,40 @@ void intel_lvds_init(struct drm_device *dev) | |||
996 | gpio = PCH_GPIOC; | 1006 | gpio = PCH_GPIOC; |
997 | } | 1007 | } |
998 | 1008 | ||
999 | intel_output = kzalloc(sizeof(struct intel_output) + | 1009 | intel_encoder = kzalloc(sizeof(struct intel_encoder) + |
1000 | sizeof(struct intel_lvds_priv), GFP_KERNEL); | 1010 | sizeof(struct intel_lvds_priv), GFP_KERNEL); |
1001 | if (!intel_output) { | 1011 | if (!intel_encoder) { |
1002 | return; | 1012 | return; |
1003 | } | 1013 | } |
1004 | 1014 | ||
1005 | connector = &intel_output->base; | 1015 | connector = &intel_encoder->base; |
1006 | encoder = &intel_output->enc; | 1016 | encoder = &intel_encoder->enc; |
1007 | drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs, | 1017 | drm_connector_init(dev, &intel_encoder->base, &intel_lvds_connector_funcs, |
1008 | DRM_MODE_CONNECTOR_LVDS); | 1018 | DRM_MODE_CONNECTOR_LVDS); |
1009 | 1019 | ||
1010 | drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs, | 1020 | drm_encoder_init(dev, &intel_encoder->enc, &intel_lvds_enc_funcs, |
1011 | DRM_MODE_ENCODER_LVDS); | 1021 | DRM_MODE_ENCODER_LVDS); |
1012 | 1022 | ||
1013 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); | 1023 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
1014 | intel_output->type = INTEL_OUTPUT_LVDS; | 1024 | intel_encoder->type = INTEL_OUTPUT_LVDS; |
1015 | 1025 | ||
1016 | intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); | 1026 | intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); |
1017 | intel_output->crtc_mask = (1 << 1); | 1027 | intel_encoder->crtc_mask = (1 << 1); |
1018 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); | 1028 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
1019 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); | 1029 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
1020 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | 1030 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
1021 | connector->interlace_allowed = false; | 1031 | connector->interlace_allowed = false; |
1022 | connector->doublescan_allowed = false; | 1032 | connector->doublescan_allowed = false; |
1023 | 1033 | ||
1024 | lvds_priv = (struct intel_lvds_priv *)(intel_output + 1); | 1034 | lvds_priv = (struct intel_lvds_priv *)(intel_encoder + 1); |
1025 | intel_output->dev_priv = lvds_priv; | 1035 | intel_encoder->dev_priv = lvds_priv; |
1026 | /* create the scaling mode property */ | 1036 | /* create the scaling mode property */ |
1027 | drm_mode_create_scaling_mode_property(dev); | 1037 | drm_mode_create_scaling_mode_property(dev); |
1028 | /* | 1038 | /* |
1029 | * the initial panel fitting mode will be FULL_SCREEN. | 1039 | * the initial panel fitting mode will be FULL_SCREEN. |
1030 | */ | 1040 | */ |
1031 | 1041 | ||
1032 | drm_connector_attach_property(&intel_output->base, | 1042 | drm_connector_attach_property(&intel_encoder->base, |
1033 | dev->mode_config.scaling_mode_property, | 1043 | dev->mode_config.scaling_mode_property, |
1034 | DRM_MODE_SCALE_FULLSCREEN); | 1044 | DRM_MODE_SCALE_FULLSCREEN); |
1035 | lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN; | 1045 | lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN; |
@@ -1044,8 +1054,8 @@ void intel_lvds_init(struct drm_device *dev) | |||
1044 | */ | 1054 | */ |
1045 | 1055 | ||
1046 | /* Set up the DDC bus. */ | 1056 | /* Set up the DDC bus. */ |
1047 | intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); | 1057 | intel_encoder->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); |
1048 | if (!intel_output->ddc_bus) { | 1058 | if (!intel_encoder->ddc_bus) { |
1049 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " | 1059 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
1050 | "failed.\n"); | 1060 | "failed.\n"); |
1051 | goto failed; | 1061 | goto failed; |
@@ -1055,7 +1065,10 @@ void intel_lvds_init(struct drm_device *dev) | |||
1055 | * Attempt to get the fixed panel mode from DDC. Assume that the | 1065 | * Attempt to get the fixed panel mode from DDC. Assume that the |
1056 | * preferred mode is the right one. | 1066 | * preferred mode is the right one. |
1057 | */ | 1067 | */ |
1058 | intel_ddc_get_modes(intel_output); | 1068 | dev_priv->lvds_edid_good = true; |
1069 | |||
1070 | if (!intel_ddc_get_modes(intel_encoder)) | ||
1071 | dev_priv->lvds_edid_good = false; | ||
1059 | 1072 | ||
1060 | list_for_each_entry(scan, &connector->probed_modes, head) { | 1073 | list_for_each_entry(scan, &connector->probed_modes, head) { |
1061 | mutex_lock(&dev->mode_config.mutex); | 1074 | mutex_lock(&dev->mode_config.mutex); |
@@ -1133,9 +1146,9 @@ out: | |||
1133 | 1146 | ||
1134 | failed: | 1147 | failed: |
1135 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); | 1148 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
1136 | if (intel_output->ddc_bus) | 1149 | if (intel_encoder->ddc_bus) |
1137 | intel_i2c_destroy(intel_output->ddc_bus); | 1150 | intel_i2c_destroy(intel_encoder->ddc_bus); |
1138 | drm_connector_cleanup(connector); | 1151 | drm_connector_cleanup(connector); |
1139 | drm_encoder_cleanup(encoder); | 1152 | drm_encoder_cleanup(encoder); |
1140 | kfree(intel_output); | 1153 | kfree(intel_encoder); |
1141 | } | 1154 | } |
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c index 89d303d1d3fb..8e5c83b2d120 100644 --- a/drivers/gpu/drm/i915/intel_modes.c +++ b/drivers/gpu/drm/i915/intel_modes.c | |||
@@ -34,7 +34,7 @@ | |||
34 | * intel_ddc_probe | 34 | * intel_ddc_probe |
35 | * | 35 | * |
36 | */ | 36 | */ |
37 | bool intel_ddc_probe(struct intel_output *intel_output) | 37 | bool intel_ddc_probe(struct intel_encoder *intel_encoder) |
38 | { | 38 | { |
39 | u8 out_buf[] = { 0x0, 0x0}; | 39 | u8 out_buf[] = { 0x0, 0x0}; |
40 | u8 buf[2]; | 40 | u8 buf[2]; |
@@ -54,9 +54,9 @@ bool intel_ddc_probe(struct intel_output *intel_output) | |||
54 | } | 54 | } |
55 | }; | 55 | }; |
56 | 56 | ||
57 | intel_i2c_quirk_set(intel_output->base.dev, true); | 57 | intel_i2c_quirk_set(intel_encoder->base.dev, true); |
58 | ret = i2c_transfer(intel_output->ddc_bus, msgs, 2); | 58 | ret = i2c_transfer(intel_encoder->ddc_bus, msgs, 2); |
59 | intel_i2c_quirk_set(intel_output->base.dev, false); | 59 | intel_i2c_quirk_set(intel_encoder->base.dev, false); |
60 | if (ret == 2) | 60 | if (ret == 2) |
61 | return true; | 61 | return true; |
62 | 62 | ||
@@ -69,19 +69,19 @@ bool intel_ddc_probe(struct intel_output *intel_output) | |||
69 | * | 69 | * |
70 | * Fetch the EDID information from @connector using the DDC bus. | 70 | * Fetch the EDID information from @connector using the DDC bus. |
71 | */ | 71 | */ |
72 | int intel_ddc_get_modes(struct intel_output *intel_output) | 72 | int intel_ddc_get_modes(struct intel_encoder *intel_encoder) |
73 | { | 73 | { |
74 | struct edid *edid; | 74 | struct edid *edid; |
75 | int ret = 0; | 75 | int ret = 0; |
76 | 76 | ||
77 | intel_i2c_quirk_set(intel_output->base.dev, true); | 77 | intel_i2c_quirk_set(intel_encoder->base.dev, true); |
78 | edid = drm_get_edid(&intel_output->base, intel_output->ddc_bus); | 78 | edid = drm_get_edid(&intel_encoder->base, intel_encoder->ddc_bus); |
79 | intel_i2c_quirk_set(intel_output->base.dev, false); | 79 | intel_i2c_quirk_set(intel_encoder->base.dev, false); |
80 | if (edid) { | 80 | if (edid) { |
81 | drm_mode_connector_update_edid_property(&intel_output->base, | 81 | drm_mode_connector_update_edid_property(&intel_encoder->base, |
82 | edid); | 82 | edid); |
83 | ret = drm_add_edid_modes(&intel_output->base, edid); | 83 | ret = drm_add_edid_modes(&intel_encoder->base, edid); |
84 | intel_output->base.display_info.raw_edid = NULL; | 84 | intel_encoder->base.display_info.raw_edid = NULL; |
85 | kfree(edid); | 85 | kfree(edid); |
86 | } | 86 | } |
87 | 87 | ||
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c index 60595fc26fdd..6d524a1fc271 100644 --- a/drivers/gpu/drm/i915/intel_overlay.c +++ b/drivers/gpu/drm/i915/intel_overlay.c | |||
@@ -724,7 +724,7 @@ int intel_overlay_do_put_image(struct intel_overlay *overlay, | |||
724 | int ret, tmp_width; | 724 | int ret, tmp_width; |
725 | struct overlay_registers *regs; | 725 | struct overlay_registers *regs; |
726 | bool scale_changed = false; | 726 | bool scale_changed = false; |
727 | struct drm_i915_gem_object *bo_priv = new_bo->driver_private; | 727 | struct drm_i915_gem_object *bo_priv = to_intel_bo(new_bo); |
728 | struct drm_device *dev = overlay->dev; | 728 | struct drm_device *dev = overlay->dev; |
729 | 729 | ||
730 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); | 730 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); |
@@ -809,7 +809,7 @@ int intel_overlay_do_put_image(struct intel_overlay *overlay, | |||
809 | intel_overlay_continue(overlay, scale_changed); | 809 | intel_overlay_continue(overlay, scale_changed); |
810 | 810 | ||
811 | overlay->old_vid_bo = overlay->vid_bo; | 811 | overlay->old_vid_bo = overlay->vid_bo; |
812 | overlay->vid_bo = new_bo->driver_private; | 812 | overlay->vid_bo = to_intel_bo(new_bo); |
813 | 813 | ||
814 | return 0; | 814 | return 0; |
815 | 815 | ||
@@ -1344,7 +1344,7 @@ void intel_setup_overlay(struct drm_device *dev) | |||
1344 | reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE); | 1344 | reg_bo = drm_gem_object_alloc(dev, PAGE_SIZE); |
1345 | if (!reg_bo) | 1345 | if (!reg_bo) |
1346 | goto out_free; | 1346 | goto out_free; |
1347 | overlay->reg_bo = reg_bo->driver_private; | 1347 | overlay->reg_bo = to_intel_bo(reg_bo); |
1348 | 1348 | ||
1349 | if (OVERLAY_NONPHYSICAL(dev)) { | 1349 | if (OVERLAY_NONPHYSICAL(dev)) { |
1350 | ret = i915_gem_object_pin(reg_bo, PAGE_SIZE); | 1350 | ret = i915_gem_object_pin(reg_bo, PAGE_SIZE); |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 26e13a0bf30b..87d953664cb0 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -54,7 +54,7 @@ struct intel_sdvo_priv { | |||
54 | u8 slave_addr; | 54 | u8 slave_addr; |
55 | 55 | ||
56 | /* Register for the SDVO device: SDVOB or SDVOC */ | 56 | /* Register for the SDVO device: SDVOB or SDVOC */ |
57 | int output_device; | 57 | int sdvo_reg; |
58 | 58 | ||
59 | /* Active outputs controlled by this SDVO output */ | 59 | /* Active outputs controlled by this SDVO output */ |
60 | uint16_t controlled_output; | 60 | uint16_t controlled_output; |
@@ -124,7 +124,7 @@ struct intel_sdvo_priv { | |||
124 | */ | 124 | */ |
125 | struct intel_sdvo_encode encode; | 125 | struct intel_sdvo_encode encode; |
126 | 126 | ||
127 | /* DDC bus used by this SDVO output */ | 127 | /* DDC bus used by this SDVO encoder */ |
128 | uint8_t ddc_bus; | 128 | uint8_t ddc_bus; |
129 | 129 | ||
130 | /* Mac mini hack -- use the same DDC as the analog connector */ | 130 | /* Mac mini hack -- use the same DDC as the analog connector */ |
@@ -162,22 +162,22 @@ struct intel_sdvo_priv { | |||
162 | }; | 162 | }; |
163 | 163 | ||
164 | static bool | 164 | static bool |
165 | intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags); | 165 | intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags); |
166 | 166 | ||
167 | /** | 167 | /** |
168 | * Writes the SDVOB or SDVOC with the given value, but always writes both | 168 | * Writes the SDVOB or SDVOC with the given value, but always writes both |
169 | * SDVOB and SDVOC to work around apparent hardware issues (according to | 169 | * SDVOB and SDVOC to work around apparent hardware issues (according to |
170 | * comments in the BIOS). | 170 | * comments in the BIOS). |
171 | */ | 171 | */ |
172 | static void intel_sdvo_write_sdvox(struct intel_output *intel_output, u32 val) | 172 | static void intel_sdvo_write_sdvox(struct intel_encoder *intel_encoder, u32 val) |
173 | { | 173 | { |
174 | struct drm_device *dev = intel_output->base.dev; | 174 | struct drm_device *dev = intel_encoder->base.dev; |
175 | struct drm_i915_private *dev_priv = dev->dev_private; | 175 | struct drm_i915_private *dev_priv = dev->dev_private; |
176 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 176 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
177 | u32 bval = val, cval = val; | 177 | u32 bval = val, cval = val; |
178 | int i; | 178 | int i; |
179 | 179 | ||
180 | if (sdvo_priv->output_device == SDVOB) { | 180 | if (sdvo_priv->sdvo_reg == SDVOB) { |
181 | cval = I915_READ(SDVOC); | 181 | cval = I915_READ(SDVOC); |
182 | } else { | 182 | } else { |
183 | bval = I915_READ(SDVOB); | 183 | bval = I915_READ(SDVOB); |
@@ -196,10 +196,10 @@ static void intel_sdvo_write_sdvox(struct intel_output *intel_output, u32 val) | |||
196 | } | 196 | } |
197 | } | 197 | } |
198 | 198 | ||
199 | static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr, | 199 | static bool intel_sdvo_read_byte(struct intel_encoder *intel_encoder, u8 addr, |
200 | u8 *ch) | 200 | u8 *ch) |
201 | { | 201 | { |
202 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 202 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
203 | u8 out_buf[2]; | 203 | u8 out_buf[2]; |
204 | u8 buf[2]; | 204 | u8 buf[2]; |
205 | int ret; | 205 | int ret; |
@@ -222,7 +222,7 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr, | |||
222 | out_buf[0] = addr; | 222 | out_buf[0] = addr; |
223 | out_buf[1] = 0; | 223 | out_buf[1] = 0; |
224 | 224 | ||
225 | if ((ret = i2c_transfer(intel_output->i2c_bus, msgs, 2)) == 2) | 225 | if ((ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 2)) == 2) |
226 | { | 226 | { |
227 | *ch = buf[0]; | 227 | *ch = buf[0]; |
228 | return true; | 228 | return true; |
@@ -232,10 +232,10 @@ static bool intel_sdvo_read_byte(struct intel_output *intel_output, u8 addr, | |||
232 | return false; | 232 | return false; |
233 | } | 233 | } |
234 | 234 | ||
235 | static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr, | 235 | static bool intel_sdvo_write_byte(struct intel_encoder *intel_encoder, int addr, |
236 | u8 ch) | 236 | u8 ch) |
237 | { | 237 | { |
238 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 238 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
239 | u8 out_buf[2]; | 239 | u8 out_buf[2]; |
240 | struct i2c_msg msgs[] = { | 240 | struct i2c_msg msgs[] = { |
241 | { | 241 | { |
@@ -249,7 +249,7 @@ static bool intel_sdvo_write_byte(struct intel_output *intel_output, int addr, | |||
249 | out_buf[0] = addr; | 249 | out_buf[0] = addr; |
250 | out_buf[1] = ch; | 250 | out_buf[1] = ch; |
251 | 251 | ||
252 | if (i2c_transfer(intel_output->i2c_bus, msgs, 1) == 1) | 252 | if (i2c_transfer(intel_encoder->i2c_bus, msgs, 1) == 1) |
253 | { | 253 | { |
254 | return true; | 254 | return true; |
255 | } | 255 | } |
@@ -353,13 +353,13 @@ static const struct _sdvo_cmd_name { | |||
353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), | 353 | SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), |
354 | }; | 354 | }; |
355 | 355 | ||
356 | #define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC") | 356 | #define SDVO_NAME(dev_priv) ((dev_priv)->sdvo_reg == SDVOB ? "SDVOB" : "SDVOC") |
357 | #define SDVO_PRIV(output) ((struct intel_sdvo_priv *) (output)->dev_priv) | 357 | #define SDVO_PRIV(encoder) ((struct intel_sdvo_priv *) (encoder)->dev_priv) |
358 | 358 | ||
359 | static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd, | 359 | static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd, |
360 | void *args, int args_len) | 360 | void *args, int args_len) |
361 | { | 361 | { |
362 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 362 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
363 | int i; | 363 | int i; |
364 | 364 | ||
365 | DRM_DEBUG_KMS("%s: W: %02X ", | 365 | DRM_DEBUG_KMS("%s: W: %02X ", |
@@ -379,19 +379,19 @@ static void intel_sdvo_debug_write(struct intel_output *intel_output, u8 cmd, | |||
379 | DRM_LOG_KMS("\n"); | 379 | DRM_LOG_KMS("\n"); |
380 | } | 380 | } |
381 | 381 | ||
382 | static void intel_sdvo_write_cmd(struct intel_output *intel_output, u8 cmd, | 382 | static void intel_sdvo_write_cmd(struct intel_encoder *intel_encoder, u8 cmd, |
383 | void *args, int args_len) | 383 | void *args, int args_len) |
384 | { | 384 | { |
385 | int i; | 385 | int i; |
386 | 386 | ||
387 | intel_sdvo_debug_write(intel_output, cmd, args, args_len); | 387 | intel_sdvo_debug_write(intel_encoder, cmd, args, args_len); |
388 | 388 | ||
389 | for (i = 0; i < args_len; i++) { | 389 | for (i = 0; i < args_len; i++) { |
390 | intel_sdvo_write_byte(intel_output, SDVO_I2C_ARG_0 - i, | 390 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0 - i, |
391 | ((u8*)args)[i]); | 391 | ((u8*)args)[i]); |
392 | } | 392 | } |
393 | 393 | ||
394 | intel_sdvo_write_byte(intel_output, SDVO_I2C_OPCODE, cmd); | 394 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_OPCODE, cmd); |
395 | } | 395 | } |
396 | 396 | ||
397 | static const char *cmd_status_names[] = { | 397 | static const char *cmd_status_names[] = { |
@@ -404,11 +404,11 @@ static const char *cmd_status_names[] = { | |||
404 | "Scaling not supported" | 404 | "Scaling not supported" |
405 | }; | 405 | }; |
406 | 406 | ||
407 | static void intel_sdvo_debug_response(struct intel_output *intel_output, | 407 | static void intel_sdvo_debug_response(struct intel_encoder *intel_encoder, |
408 | void *response, int response_len, | 408 | void *response, int response_len, |
409 | u8 status) | 409 | u8 status) |
410 | { | 410 | { |
411 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 411 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
412 | int i; | 412 | int i; |
413 | 413 | ||
414 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv)); | 414 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(sdvo_priv)); |
@@ -423,7 +423,7 @@ static void intel_sdvo_debug_response(struct intel_output *intel_output, | |||
423 | DRM_LOG_KMS("\n"); | 423 | DRM_LOG_KMS("\n"); |
424 | } | 424 | } |
425 | 425 | ||
426 | static u8 intel_sdvo_read_response(struct intel_output *intel_output, | 426 | static u8 intel_sdvo_read_response(struct intel_encoder *intel_encoder, |
427 | void *response, int response_len) | 427 | void *response, int response_len) |
428 | { | 428 | { |
429 | int i; | 429 | int i; |
@@ -433,16 +433,16 @@ static u8 intel_sdvo_read_response(struct intel_output *intel_output, | |||
433 | while (retry--) { | 433 | while (retry--) { |
434 | /* Read the command response */ | 434 | /* Read the command response */ |
435 | for (i = 0; i < response_len; i++) { | 435 | for (i = 0; i < response_len; i++) { |
436 | intel_sdvo_read_byte(intel_output, | 436 | intel_sdvo_read_byte(intel_encoder, |
437 | SDVO_I2C_RETURN_0 + i, | 437 | SDVO_I2C_RETURN_0 + i, |
438 | &((u8 *)response)[i]); | 438 | &((u8 *)response)[i]); |
439 | } | 439 | } |
440 | 440 | ||
441 | /* read the return status */ | 441 | /* read the return status */ |
442 | intel_sdvo_read_byte(intel_output, SDVO_I2C_CMD_STATUS, | 442 | intel_sdvo_read_byte(intel_encoder, SDVO_I2C_CMD_STATUS, |
443 | &status); | 443 | &status); |
444 | 444 | ||
445 | intel_sdvo_debug_response(intel_output, response, response_len, | 445 | intel_sdvo_debug_response(intel_encoder, response, response_len, |
446 | status); | 446 | status); |
447 | if (status != SDVO_CMD_STATUS_PENDING) | 447 | if (status != SDVO_CMD_STATUS_PENDING) |
448 | return status; | 448 | return status; |
@@ -470,10 +470,10 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) | |||
470 | * another I2C transaction after issuing the DDC bus switch, it will be | 470 | * another I2C transaction after issuing the DDC bus switch, it will be |
471 | * switched to the internal SDVO register. | 471 | * switched to the internal SDVO register. |
472 | */ | 472 | */ |
473 | static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | 473 | static void intel_sdvo_set_control_bus_switch(struct intel_encoder *intel_encoder, |
474 | u8 target) | 474 | u8 target) |
475 | { | 475 | { |
476 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 476 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
477 | u8 out_buf[2], cmd_buf[2], ret_value[2], ret; | 477 | u8 out_buf[2], cmd_buf[2], ret_value[2], ret; |
478 | struct i2c_msg msgs[] = { | 478 | struct i2c_msg msgs[] = { |
479 | { | 479 | { |
@@ -497,10 +497,10 @@ static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | |||
497 | }, | 497 | }, |
498 | }; | 498 | }; |
499 | 499 | ||
500 | intel_sdvo_debug_write(intel_output, SDVO_CMD_SET_CONTROL_BUS_SWITCH, | 500 | intel_sdvo_debug_write(intel_encoder, SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
501 | &target, 1); | 501 | &target, 1); |
502 | /* write the DDC switch command argument */ | 502 | /* write the DDC switch command argument */ |
503 | intel_sdvo_write_byte(intel_output, SDVO_I2C_ARG_0, target); | 503 | intel_sdvo_write_byte(intel_encoder, SDVO_I2C_ARG_0, target); |
504 | 504 | ||
505 | out_buf[0] = SDVO_I2C_OPCODE; | 505 | out_buf[0] = SDVO_I2C_OPCODE; |
506 | out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH; | 506 | out_buf[1] = SDVO_CMD_SET_CONTROL_BUS_SWITCH; |
@@ -509,7 +509,7 @@ static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | |||
509 | ret_value[0] = 0; | 509 | ret_value[0] = 0; |
510 | ret_value[1] = 0; | 510 | ret_value[1] = 0; |
511 | 511 | ||
512 | ret = i2c_transfer(intel_output->i2c_bus, msgs, 3); | 512 | ret = i2c_transfer(intel_encoder->i2c_bus, msgs, 3); |
513 | if (ret != 3) { | 513 | if (ret != 3) { |
514 | /* failure in I2C transfer */ | 514 | /* failure in I2C transfer */ |
515 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); | 515 | DRM_DEBUG_KMS("I2c transfer returned %d\n", ret); |
@@ -523,7 +523,7 @@ static void intel_sdvo_set_control_bus_switch(struct intel_output *intel_output, | |||
523 | return; | 523 | return; |
524 | } | 524 | } |
525 | 525 | ||
526 | static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool target_0, bool target_1) | 526 | static bool intel_sdvo_set_target_input(struct intel_encoder *intel_encoder, bool target_0, bool target_1) |
527 | { | 527 | { |
528 | struct intel_sdvo_set_target_input_args targets = {0}; | 528 | struct intel_sdvo_set_target_input_args targets = {0}; |
529 | u8 status; | 529 | u8 status; |
@@ -534,10 +534,10 @@ static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool | |||
534 | if (target_1) | 534 | if (target_1) |
535 | targets.target_1 = 1; | 535 | targets.target_1 = 1; |
536 | 536 | ||
537 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_TARGET_INPUT, &targets, | 537 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_INPUT, &targets, |
538 | sizeof(targets)); | 538 | sizeof(targets)); |
539 | 539 | ||
540 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 540 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
541 | 541 | ||
542 | return (status == SDVO_CMD_STATUS_SUCCESS); | 542 | return (status == SDVO_CMD_STATUS_SUCCESS); |
543 | } | 543 | } |
@@ -548,13 +548,13 @@ static bool intel_sdvo_set_target_input(struct intel_output *intel_output, bool | |||
548 | * This function is making an assumption about the layout of the response, | 548 | * This function is making an assumption about the layout of the response, |
549 | * which should be checked against the docs. | 549 | * which should be checked against the docs. |
550 | */ | 550 | */ |
551 | static bool intel_sdvo_get_trained_inputs(struct intel_output *intel_output, bool *input_1, bool *input_2) | 551 | static bool intel_sdvo_get_trained_inputs(struct intel_encoder *intel_encoder, bool *input_1, bool *input_2) |
552 | { | 552 | { |
553 | struct intel_sdvo_get_trained_inputs_response response; | 553 | struct intel_sdvo_get_trained_inputs_response response; |
554 | u8 status; | 554 | u8 status; |
555 | 555 | ||
556 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0); | 556 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_TRAINED_INPUTS, NULL, 0); |
557 | status = intel_sdvo_read_response(intel_output, &response, sizeof(response)); | 557 | status = intel_sdvo_read_response(intel_encoder, &response, sizeof(response)); |
558 | if (status != SDVO_CMD_STATUS_SUCCESS) | 558 | if (status != SDVO_CMD_STATUS_SUCCESS) |
559 | return false; | 559 | return false; |
560 | 560 | ||
@@ -563,29 +563,29 @@ static bool intel_sdvo_get_trained_inputs(struct intel_output *intel_output, boo | |||
563 | return true; | 563 | return true; |
564 | } | 564 | } |
565 | 565 | ||
566 | static bool intel_sdvo_get_active_outputs(struct intel_output *intel_output, | 566 | static bool intel_sdvo_get_active_outputs(struct intel_encoder *intel_encoder, |
567 | u16 *outputs) | 567 | u16 *outputs) |
568 | { | 568 | { |
569 | u8 status; | 569 | u8 status; |
570 | 570 | ||
571 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ACTIVE_OUTPUTS, NULL, 0); | 571 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_OUTPUTS, NULL, 0); |
572 | status = intel_sdvo_read_response(intel_output, outputs, sizeof(*outputs)); | 572 | status = intel_sdvo_read_response(intel_encoder, outputs, sizeof(*outputs)); |
573 | 573 | ||
574 | return (status == SDVO_CMD_STATUS_SUCCESS); | 574 | return (status == SDVO_CMD_STATUS_SUCCESS); |
575 | } | 575 | } |
576 | 576 | ||
577 | static bool intel_sdvo_set_active_outputs(struct intel_output *intel_output, | 577 | static bool intel_sdvo_set_active_outputs(struct intel_encoder *intel_encoder, |
578 | u16 outputs) | 578 | u16 outputs) |
579 | { | 579 | { |
580 | u8 status; | 580 | u8 status; |
581 | 581 | ||
582 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs, | 582 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_OUTPUTS, &outputs, |
583 | sizeof(outputs)); | 583 | sizeof(outputs)); |
584 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 584 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
585 | return (status == SDVO_CMD_STATUS_SUCCESS); | 585 | return (status == SDVO_CMD_STATUS_SUCCESS); |
586 | } | 586 | } |
587 | 587 | ||
588 | static bool intel_sdvo_set_encoder_power_state(struct intel_output *intel_output, | 588 | static bool intel_sdvo_set_encoder_power_state(struct intel_encoder *intel_encoder, |
589 | int mode) | 589 | int mode) |
590 | { | 590 | { |
591 | u8 status, state = SDVO_ENCODER_STATE_ON; | 591 | u8 status, state = SDVO_ENCODER_STATE_ON; |
@@ -605,24 +605,24 @@ static bool intel_sdvo_set_encoder_power_state(struct intel_output *intel_output | |||
605 | break; | 605 | break; |
606 | } | 606 | } |
607 | 607 | ||
608 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ENCODER_POWER_STATE, &state, | 608 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODER_POWER_STATE, &state, |
609 | sizeof(state)); | 609 | sizeof(state)); |
610 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 610 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
611 | 611 | ||
612 | return (status == SDVO_CMD_STATUS_SUCCESS); | 612 | return (status == SDVO_CMD_STATUS_SUCCESS); |
613 | } | 613 | } |
614 | 614 | ||
615 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output *intel_output, | 615 | static bool intel_sdvo_get_input_pixel_clock_range(struct intel_encoder *intel_encoder, |
616 | int *clock_min, | 616 | int *clock_min, |
617 | int *clock_max) | 617 | int *clock_max) |
618 | { | 618 | { |
619 | struct intel_sdvo_pixel_clock_range clocks; | 619 | struct intel_sdvo_pixel_clock_range clocks; |
620 | u8 status; | 620 | u8 status; |
621 | 621 | ||
622 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, | 622 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE, |
623 | NULL, 0); | 623 | NULL, 0); |
624 | 624 | ||
625 | status = intel_sdvo_read_response(intel_output, &clocks, sizeof(clocks)); | 625 | status = intel_sdvo_read_response(intel_encoder, &clocks, sizeof(clocks)); |
626 | 626 | ||
627 | if (status != SDVO_CMD_STATUS_SUCCESS) | 627 | if (status != SDVO_CMD_STATUS_SUCCESS) |
628 | return false; | 628 | return false; |
@@ -634,31 +634,31 @@ static bool intel_sdvo_get_input_pixel_clock_range(struct intel_output *intel_ou | |||
634 | return true; | 634 | return true; |
635 | } | 635 | } |
636 | 636 | ||
637 | static bool intel_sdvo_set_target_output(struct intel_output *intel_output, | 637 | static bool intel_sdvo_set_target_output(struct intel_encoder *intel_encoder, |
638 | u16 outputs) | 638 | u16 outputs) |
639 | { | 639 | { |
640 | u8 status; | 640 | u8 status; |
641 | 641 | ||
642 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_TARGET_OUTPUT, &outputs, | 642 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TARGET_OUTPUT, &outputs, |
643 | sizeof(outputs)); | 643 | sizeof(outputs)); |
644 | 644 | ||
645 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 645 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
646 | return (status == SDVO_CMD_STATUS_SUCCESS); | 646 | return (status == SDVO_CMD_STATUS_SUCCESS); |
647 | } | 647 | } |
648 | 648 | ||
649 | static bool intel_sdvo_get_timing(struct intel_output *intel_output, u8 cmd, | 649 | static bool intel_sdvo_get_timing(struct intel_encoder *intel_encoder, u8 cmd, |
650 | struct intel_sdvo_dtd *dtd) | 650 | struct intel_sdvo_dtd *dtd) |
651 | { | 651 | { |
652 | u8 status; | 652 | u8 status; |
653 | 653 | ||
654 | intel_sdvo_write_cmd(intel_output, cmd, NULL, 0); | 654 | intel_sdvo_write_cmd(intel_encoder, cmd, NULL, 0); |
655 | status = intel_sdvo_read_response(intel_output, &dtd->part1, | 655 | status = intel_sdvo_read_response(intel_encoder, &dtd->part1, |
656 | sizeof(dtd->part1)); | 656 | sizeof(dtd->part1)); |
657 | if (status != SDVO_CMD_STATUS_SUCCESS) | 657 | if (status != SDVO_CMD_STATUS_SUCCESS) |
658 | return false; | 658 | return false; |
659 | 659 | ||
660 | intel_sdvo_write_cmd(intel_output, cmd + 1, NULL, 0); | 660 | intel_sdvo_write_cmd(intel_encoder, cmd + 1, NULL, 0); |
661 | status = intel_sdvo_read_response(intel_output, &dtd->part2, | 661 | status = intel_sdvo_read_response(intel_encoder, &dtd->part2, |
662 | sizeof(dtd->part2)); | 662 | sizeof(dtd->part2)); |
663 | if (status != SDVO_CMD_STATUS_SUCCESS) | 663 | if (status != SDVO_CMD_STATUS_SUCCESS) |
664 | return false; | 664 | return false; |
@@ -666,60 +666,60 @@ static bool intel_sdvo_get_timing(struct intel_output *intel_output, u8 cmd, | |||
666 | return true; | 666 | return true; |
667 | } | 667 | } |
668 | 668 | ||
669 | static bool intel_sdvo_get_input_timing(struct intel_output *intel_output, | 669 | static bool intel_sdvo_get_input_timing(struct intel_encoder *intel_encoder, |
670 | struct intel_sdvo_dtd *dtd) | 670 | struct intel_sdvo_dtd *dtd) |
671 | { | 671 | { |
672 | return intel_sdvo_get_timing(intel_output, | 672 | return intel_sdvo_get_timing(intel_encoder, |
673 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); | 673 | SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd); |
674 | } | 674 | } |
675 | 675 | ||
676 | static bool intel_sdvo_get_output_timing(struct intel_output *intel_output, | 676 | static bool intel_sdvo_get_output_timing(struct intel_encoder *intel_encoder, |
677 | struct intel_sdvo_dtd *dtd) | 677 | struct intel_sdvo_dtd *dtd) |
678 | { | 678 | { |
679 | return intel_sdvo_get_timing(intel_output, | 679 | return intel_sdvo_get_timing(intel_encoder, |
680 | SDVO_CMD_GET_OUTPUT_TIMINGS_PART1, dtd); | 680 | SDVO_CMD_GET_OUTPUT_TIMINGS_PART1, dtd); |
681 | } | 681 | } |
682 | 682 | ||
683 | static bool intel_sdvo_set_timing(struct intel_output *intel_output, u8 cmd, | 683 | static bool intel_sdvo_set_timing(struct intel_encoder *intel_encoder, u8 cmd, |
684 | struct intel_sdvo_dtd *dtd) | 684 | struct intel_sdvo_dtd *dtd) |
685 | { | 685 | { |
686 | u8 status; | 686 | u8 status; |
687 | 687 | ||
688 | intel_sdvo_write_cmd(intel_output, cmd, &dtd->part1, sizeof(dtd->part1)); | 688 | intel_sdvo_write_cmd(intel_encoder, cmd, &dtd->part1, sizeof(dtd->part1)); |
689 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 689 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
690 | if (status != SDVO_CMD_STATUS_SUCCESS) | 690 | if (status != SDVO_CMD_STATUS_SUCCESS) |
691 | return false; | 691 | return false; |
692 | 692 | ||
693 | intel_sdvo_write_cmd(intel_output, cmd + 1, &dtd->part2, sizeof(dtd->part2)); | 693 | intel_sdvo_write_cmd(intel_encoder, cmd + 1, &dtd->part2, sizeof(dtd->part2)); |
694 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 694 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
695 | if (status != SDVO_CMD_STATUS_SUCCESS) | 695 | if (status != SDVO_CMD_STATUS_SUCCESS) |
696 | return false; | 696 | return false; |
697 | 697 | ||
698 | return true; | 698 | return true; |
699 | } | 699 | } |
700 | 700 | ||
701 | static bool intel_sdvo_set_input_timing(struct intel_output *intel_output, | 701 | static bool intel_sdvo_set_input_timing(struct intel_encoder *intel_encoder, |
702 | struct intel_sdvo_dtd *dtd) | 702 | struct intel_sdvo_dtd *dtd) |
703 | { | 703 | { |
704 | return intel_sdvo_set_timing(intel_output, | 704 | return intel_sdvo_set_timing(intel_encoder, |
705 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); | 705 | SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd); |
706 | } | 706 | } |
707 | 707 | ||
708 | static bool intel_sdvo_set_output_timing(struct intel_output *intel_output, | 708 | static bool intel_sdvo_set_output_timing(struct intel_encoder *intel_encoder, |
709 | struct intel_sdvo_dtd *dtd) | 709 | struct intel_sdvo_dtd *dtd) |
710 | { | 710 | { |
711 | return intel_sdvo_set_timing(intel_output, | 711 | return intel_sdvo_set_timing(intel_encoder, |
712 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); | 712 | SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd); |
713 | } | 713 | } |
714 | 714 | ||
715 | static bool | 715 | static bool |
716 | intel_sdvo_create_preferred_input_timing(struct intel_output *output, | 716 | intel_sdvo_create_preferred_input_timing(struct intel_encoder *intel_encoder, |
717 | uint16_t clock, | 717 | uint16_t clock, |
718 | uint16_t width, | 718 | uint16_t width, |
719 | uint16_t height) | 719 | uint16_t height) |
720 | { | 720 | { |
721 | struct intel_sdvo_preferred_input_timing_args args; | 721 | struct intel_sdvo_preferred_input_timing_args args; |
722 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 722 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
723 | uint8_t status; | 723 | uint8_t status; |
724 | 724 | ||
725 | memset(&args, 0, sizeof(args)); | 725 | memset(&args, 0, sizeof(args)); |
@@ -733,32 +733,33 @@ intel_sdvo_create_preferred_input_timing(struct intel_output *output, | |||
733 | sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) | 733 | sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) |
734 | args.scaled = 1; | 734 | args.scaled = 1; |
735 | 735 | ||
736 | intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, | 736 | intel_sdvo_write_cmd(intel_encoder, |
737 | SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, | ||
737 | &args, sizeof(args)); | 738 | &args, sizeof(args)); |
738 | status = intel_sdvo_read_response(output, NULL, 0); | 739 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
739 | if (status != SDVO_CMD_STATUS_SUCCESS) | 740 | if (status != SDVO_CMD_STATUS_SUCCESS) |
740 | return false; | 741 | return false; |
741 | 742 | ||
742 | return true; | 743 | return true; |
743 | } | 744 | } |
744 | 745 | ||
745 | static bool intel_sdvo_get_preferred_input_timing(struct intel_output *output, | 746 | static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *intel_encoder, |
746 | struct intel_sdvo_dtd *dtd) | 747 | struct intel_sdvo_dtd *dtd) |
747 | { | 748 | { |
748 | bool status; | 749 | bool status; |
749 | 750 | ||
750 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, | 751 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, |
751 | NULL, 0); | 752 | NULL, 0); |
752 | 753 | ||
753 | status = intel_sdvo_read_response(output, &dtd->part1, | 754 | status = intel_sdvo_read_response(intel_encoder, &dtd->part1, |
754 | sizeof(dtd->part1)); | 755 | sizeof(dtd->part1)); |
755 | if (status != SDVO_CMD_STATUS_SUCCESS) | 756 | if (status != SDVO_CMD_STATUS_SUCCESS) |
756 | return false; | 757 | return false; |
757 | 758 | ||
758 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, | 759 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, |
759 | NULL, 0); | 760 | NULL, 0); |
760 | 761 | ||
761 | status = intel_sdvo_read_response(output, &dtd->part2, | 762 | status = intel_sdvo_read_response(intel_encoder, &dtd->part2, |
762 | sizeof(dtd->part2)); | 763 | sizeof(dtd->part2)); |
763 | if (status != SDVO_CMD_STATUS_SUCCESS) | 764 | if (status != SDVO_CMD_STATUS_SUCCESS) |
764 | return false; | 765 | return false; |
@@ -766,12 +767,12 @@ static bool intel_sdvo_get_preferred_input_timing(struct intel_output *output, | |||
766 | return false; | 767 | return false; |
767 | } | 768 | } |
768 | 769 | ||
769 | static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output) | 770 | static int intel_sdvo_get_clock_rate_mult(struct intel_encoder *intel_encoder) |
770 | { | 771 | { |
771 | u8 response, status; | 772 | u8 response, status; |
772 | 773 | ||
773 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_CLOCK_RATE_MULT, NULL, 0); | 774 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_CLOCK_RATE_MULT, NULL, 0); |
774 | status = intel_sdvo_read_response(intel_output, &response, 1); | 775 | status = intel_sdvo_read_response(intel_encoder, &response, 1); |
775 | 776 | ||
776 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 777 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
777 | DRM_DEBUG_KMS("Couldn't get SDVO clock rate multiplier\n"); | 778 | DRM_DEBUG_KMS("Couldn't get SDVO clock rate multiplier\n"); |
@@ -783,12 +784,12 @@ static int intel_sdvo_get_clock_rate_mult(struct intel_output *intel_output) | |||
783 | return response; | 784 | return response; |
784 | } | 785 | } |
785 | 786 | ||
786 | static bool intel_sdvo_set_clock_rate_mult(struct intel_output *intel_output, u8 val) | 787 | static bool intel_sdvo_set_clock_rate_mult(struct intel_encoder *intel_encoder, u8 val) |
787 | { | 788 | { |
788 | u8 status; | 789 | u8 status; |
789 | 790 | ||
790 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); | 791 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1); |
791 | status = intel_sdvo_read_response(intel_output, NULL, 0); | 792 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
792 | if (status != SDVO_CMD_STATUS_SUCCESS) | 793 | if (status != SDVO_CMD_STATUS_SUCCESS) |
793 | return false; | 794 | return false; |
794 | 795 | ||
@@ -877,13 +878,13 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode, | |||
877 | mode->flags |= DRM_MODE_FLAG_PVSYNC; | 878 | mode->flags |= DRM_MODE_FLAG_PVSYNC; |
878 | } | 879 | } |
879 | 880 | ||
880 | static bool intel_sdvo_get_supp_encode(struct intel_output *output, | 881 | static bool intel_sdvo_get_supp_encode(struct intel_encoder *intel_encoder, |
881 | struct intel_sdvo_encode *encode) | 882 | struct intel_sdvo_encode *encode) |
882 | { | 883 | { |
883 | uint8_t status; | 884 | uint8_t status; |
884 | 885 | ||
885 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); | 886 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); |
886 | status = intel_sdvo_read_response(output, encode, sizeof(*encode)); | 887 | status = intel_sdvo_read_response(intel_encoder, encode, sizeof(*encode)); |
887 | if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ | 888 | if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ |
888 | memset(encode, 0, sizeof(*encode)); | 889 | memset(encode, 0, sizeof(*encode)); |
889 | return false; | 890 | return false; |
@@ -892,29 +893,30 @@ static bool intel_sdvo_get_supp_encode(struct intel_output *output, | |||
892 | return true; | 893 | return true; |
893 | } | 894 | } |
894 | 895 | ||
895 | static bool intel_sdvo_set_encode(struct intel_output *output, uint8_t mode) | 896 | static bool intel_sdvo_set_encode(struct intel_encoder *intel_encoder, |
897 | uint8_t mode) | ||
896 | { | 898 | { |
897 | uint8_t status; | 899 | uint8_t status; |
898 | 900 | ||
899 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_ENCODE, &mode, 1); | 901 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODE, &mode, 1); |
900 | status = intel_sdvo_read_response(output, NULL, 0); | 902 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
901 | 903 | ||
902 | return (status == SDVO_CMD_STATUS_SUCCESS); | 904 | return (status == SDVO_CMD_STATUS_SUCCESS); |
903 | } | 905 | } |
904 | 906 | ||
905 | static bool intel_sdvo_set_colorimetry(struct intel_output *output, | 907 | static bool intel_sdvo_set_colorimetry(struct intel_encoder *intel_encoder, |
906 | uint8_t mode) | 908 | uint8_t mode) |
907 | { | 909 | { |
908 | uint8_t status; | 910 | uint8_t status; |
909 | 911 | ||
910 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_COLORIMETRY, &mode, 1); | 912 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_COLORIMETRY, &mode, 1); |
911 | status = intel_sdvo_read_response(output, NULL, 0); | 913 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
912 | 914 | ||
913 | return (status == SDVO_CMD_STATUS_SUCCESS); | 915 | return (status == SDVO_CMD_STATUS_SUCCESS); |
914 | } | 916 | } |
915 | 917 | ||
916 | #if 0 | 918 | #if 0 |
917 | static void intel_sdvo_dump_hdmi_buf(struct intel_output *output) | 919 | static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *intel_encoder) |
918 | { | 920 | { |
919 | int i, j; | 921 | int i, j; |
920 | uint8_t set_buf_index[2]; | 922 | uint8_t set_buf_index[2]; |
@@ -923,43 +925,45 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_output *output) | |||
923 | uint8_t buf[48]; | 925 | uint8_t buf[48]; |
924 | uint8_t *pos; | 926 | uint8_t *pos; |
925 | 927 | ||
926 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0); | 928 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0); |
927 | intel_sdvo_read_response(output, &av_split, 1); | 929 | intel_sdvo_read_response(encoder, &av_split, 1); |
928 | 930 | ||
929 | for (i = 0; i <= av_split; i++) { | 931 | for (i = 0; i <= av_split; i++) { |
930 | set_buf_index[0] = i; set_buf_index[1] = 0; | 932 | set_buf_index[0] = i; set_buf_index[1] = 0; |
931 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, | 933 | intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX, |
932 | set_buf_index, 2); | 934 | set_buf_index, 2); |
933 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_INFO, NULL, 0); | 935 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0); |
934 | intel_sdvo_read_response(output, &buf_size, 1); | 936 | intel_sdvo_read_response(encoder, &buf_size, 1); |
935 | 937 | ||
936 | pos = buf; | 938 | pos = buf; |
937 | for (j = 0; j <= buf_size; j += 8) { | 939 | for (j = 0; j <= buf_size; j += 8) { |
938 | intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_DATA, | 940 | intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA, |
939 | NULL, 0); | 941 | NULL, 0); |
940 | intel_sdvo_read_response(output, pos, 8); | 942 | intel_sdvo_read_response(encoder, pos, 8); |
941 | pos += 8; | 943 | pos += 8; |
942 | } | 944 | } |
943 | } | 945 | } |
944 | } | 946 | } |
945 | #endif | 947 | #endif |
946 | 948 | ||
947 | static void intel_sdvo_set_hdmi_buf(struct intel_output *output, int index, | 949 | static void intel_sdvo_set_hdmi_buf(struct intel_encoder *intel_encoder, |
948 | uint8_t *data, int8_t size, uint8_t tx_rate) | 950 | int index, |
951 | uint8_t *data, int8_t size, uint8_t tx_rate) | ||
949 | { | 952 | { |
950 | uint8_t set_buf_index[2]; | 953 | uint8_t set_buf_index[2]; |
951 | 954 | ||
952 | set_buf_index[0] = index; | 955 | set_buf_index[0] = index; |
953 | set_buf_index[1] = 0; | 956 | set_buf_index[1] = 0; |
954 | 957 | ||
955 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, set_buf_index, 2); | 958 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_INDEX, |
959 | set_buf_index, 2); | ||
956 | 960 | ||
957 | for (; size > 0; size -= 8) { | 961 | for (; size > 0; size -= 8) { |
958 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_DATA, data, 8); | 962 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_DATA, data, 8); |
959 | data += 8; | 963 | data += 8; |
960 | } | 964 | } |
961 | 965 | ||
962 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); | 966 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); |
963 | } | 967 | } |
964 | 968 | ||
965 | static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) | 969 | static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) |
@@ -1034,7 +1038,7 @@ struct dip_infoframe { | |||
1034 | } __attribute__ ((packed)) u; | 1038 | } __attribute__ ((packed)) u; |
1035 | } __attribute__((packed)); | 1039 | } __attribute__((packed)); |
1036 | 1040 | ||
1037 | static void intel_sdvo_set_avi_infoframe(struct intel_output *output, | 1041 | static void intel_sdvo_set_avi_infoframe(struct intel_encoder *intel_encoder, |
1038 | struct drm_display_mode * mode) | 1042 | struct drm_display_mode * mode) |
1039 | { | 1043 | { |
1040 | struct dip_infoframe avi_if = { | 1044 | struct dip_infoframe avi_if = { |
@@ -1045,15 +1049,16 @@ static void intel_sdvo_set_avi_infoframe(struct intel_output *output, | |||
1045 | 1049 | ||
1046 | avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, | 1050 | avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, |
1047 | 4 + avi_if.len); | 1051 | 4 + avi_if.len); |
1048 | intel_sdvo_set_hdmi_buf(output, 1, (uint8_t *)&avi_if, 4 + avi_if.len, | 1052 | intel_sdvo_set_hdmi_buf(intel_encoder, 1, (uint8_t *)&avi_if, |
1053 | 4 + avi_if.len, | ||
1049 | SDVO_HBUF_TX_VSYNC); | 1054 | SDVO_HBUF_TX_VSYNC); |
1050 | } | 1055 | } |
1051 | 1056 | ||
1052 | static void intel_sdvo_set_tv_format(struct intel_output *output) | 1057 | static void intel_sdvo_set_tv_format(struct intel_encoder *intel_encoder) |
1053 | { | 1058 | { |
1054 | 1059 | ||
1055 | struct intel_sdvo_tv_format format; | 1060 | struct intel_sdvo_tv_format format; |
1056 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1061 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1057 | uint32_t format_map, i; | 1062 | uint32_t format_map, i; |
1058 | uint8_t status; | 1063 | uint8_t status; |
1059 | 1064 | ||
@@ -1066,10 +1071,10 @@ static void intel_sdvo_set_tv_format(struct intel_output *output) | |||
1066 | memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? | 1071 | memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? |
1067 | sizeof(format) : sizeof(format_map)); | 1072 | sizeof(format) : sizeof(format_map)); |
1068 | 1073 | ||
1069 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, &format_map, | 1074 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TV_FORMAT, &format_map, |
1070 | sizeof(format)); | 1075 | sizeof(format)); |
1071 | 1076 | ||
1072 | status = intel_sdvo_read_response(output, NULL, 0); | 1077 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
1073 | if (status != SDVO_CMD_STATUS_SUCCESS) | 1078 | if (status != SDVO_CMD_STATUS_SUCCESS) |
1074 | DRM_DEBUG_KMS("%s: Failed to set TV format\n", | 1079 | DRM_DEBUG_KMS("%s: Failed to set TV format\n", |
1075 | SDVO_NAME(sdvo_priv)); | 1080 | SDVO_NAME(sdvo_priv)); |
@@ -1079,8 +1084,8 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1079 | struct drm_display_mode *mode, | 1084 | struct drm_display_mode *mode, |
1080 | struct drm_display_mode *adjusted_mode) | 1085 | struct drm_display_mode *adjusted_mode) |
1081 | { | 1086 | { |
1082 | struct intel_output *output = enc_to_intel_output(encoder); | 1087 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1083 | struct intel_sdvo_priv *dev_priv = output->dev_priv; | 1088 | struct intel_sdvo_priv *dev_priv = intel_encoder->dev_priv; |
1084 | 1089 | ||
1085 | if (dev_priv->is_tv) { | 1090 | if (dev_priv->is_tv) { |
1086 | struct intel_sdvo_dtd output_dtd; | 1091 | struct intel_sdvo_dtd output_dtd; |
@@ -1095,22 +1100,22 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1095 | 1100 | ||
1096 | /* Set output timings */ | 1101 | /* Set output timings */ |
1097 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); | 1102 | intel_sdvo_get_dtd_from_mode(&output_dtd, mode); |
1098 | intel_sdvo_set_target_output(output, | 1103 | intel_sdvo_set_target_output(intel_encoder, |
1099 | dev_priv->controlled_output); | 1104 | dev_priv->controlled_output); |
1100 | intel_sdvo_set_output_timing(output, &output_dtd); | 1105 | intel_sdvo_set_output_timing(intel_encoder, &output_dtd); |
1101 | 1106 | ||
1102 | /* Set the input timing to the screen. Assume always input 0. */ | 1107 | /* Set the input timing to the screen. Assume always input 0. */ |
1103 | intel_sdvo_set_target_input(output, true, false); | 1108 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1104 | 1109 | ||
1105 | 1110 | ||
1106 | success = intel_sdvo_create_preferred_input_timing(output, | 1111 | success = intel_sdvo_create_preferred_input_timing(intel_encoder, |
1107 | mode->clock / 10, | 1112 | mode->clock / 10, |
1108 | mode->hdisplay, | 1113 | mode->hdisplay, |
1109 | mode->vdisplay); | 1114 | mode->vdisplay); |
1110 | if (success) { | 1115 | if (success) { |
1111 | struct intel_sdvo_dtd input_dtd; | 1116 | struct intel_sdvo_dtd input_dtd; |
1112 | 1117 | ||
1113 | intel_sdvo_get_preferred_input_timing(output, | 1118 | intel_sdvo_get_preferred_input_timing(intel_encoder, |
1114 | &input_dtd); | 1119 | &input_dtd); |
1115 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); | 1120 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1116 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; | 1121 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; |
@@ -1133,16 +1138,16 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1133 | intel_sdvo_get_dtd_from_mode(&output_dtd, | 1138 | intel_sdvo_get_dtd_from_mode(&output_dtd, |
1134 | dev_priv->sdvo_lvds_fixed_mode); | 1139 | dev_priv->sdvo_lvds_fixed_mode); |
1135 | 1140 | ||
1136 | intel_sdvo_set_target_output(output, | 1141 | intel_sdvo_set_target_output(intel_encoder, |
1137 | dev_priv->controlled_output); | 1142 | dev_priv->controlled_output); |
1138 | intel_sdvo_set_output_timing(output, &output_dtd); | 1143 | intel_sdvo_set_output_timing(intel_encoder, &output_dtd); |
1139 | 1144 | ||
1140 | /* Set the input timing to the screen. Assume always input 0. */ | 1145 | /* Set the input timing to the screen. Assume always input 0. */ |
1141 | intel_sdvo_set_target_input(output, true, false); | 1146 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1142 | 1147 | ||
1143 | 1148 | ||
1144 | success = intel_sdvo_create_preferred_input_timing( | 1149 | success = intel_sdvo_create_preferred_input_timing( |
1145 | output, | 1150 | intel_encoder, |
1146 | mode->clock / 10, | 1151 | mode->clock / 10, |
1147 | mode->hdisplay, | 1152 | mode->hdisplay, |
1148 | mode->vdisplay); | 1153 | mode->vdisplay); |
@@ -1150,7 +1155,7 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder, | |||
1150 | if (success) { | 1155 | if (success) { |
1151 | struct intel_sdvo_dtd input_dtd; | 1156 | struct intel_sdvo_dtd input_dtd; |
1152 | 1157 | ||
1153 | intel_sdvo_get_preferred_input_timing(output, | 1158 | intel_sdvo_get_preferred_input_timing(intel_encoder, |
1154 | &input_dtd); | 1159 | &input_dtd); |
1155 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); | 1160 | intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); |
1156 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; | 1161 | dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; |
@@ -1182,8 +1187,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1182 | struct drm_i915_private *dev_priv = dev->dev_private; | 1187 | struct drm_i915_private *dev_priv = dev->dev_private; |
1183 | struct drm_crtc *crtc = encoder->crtc; | 1188 | struct drm_crtc *crtc = encoder->crtc; |
1184 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1189 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1185 | struct intel_output *output = enc_to_intel_output(encoder); | 1190 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1186 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1191 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1187 | u32 sdvox = 0; | 1192 | u32 sdvox = 0; |
1188 | int sdvo_pixel_multiply; | 1193 | int sdvo_pixel_multiply; |
1189 | struct intel_sdvo_in_out_map in_out; | 1194 | struct intel_sdvo_in_out_map in_out; |
@@ -1202,12 +1207,12 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1202 | in_out.in0 = sdvo_priv->controlled_output; | 1207 | in_out.in0 = sdvo_priv->controlled_output; |
1203 | in_out.in1 = 0; | 1208 | in_out.in1 = 0; |
1204 | 1209 | ||
1205 | intel_sdvo_write_cmd(output, SDVO_CMD_SET_IN_OUT_MAP, | 1210 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_IN_OUT_MAP, |
1206 | &in_out, sizeof(in_out)); | 1211 | &in_out, sizeof(in_out)); |
1207 | status = intel_sdvo_read_response(output, NULL, 0); | 1212 | status = intel_sdvo_read_response(intel_encoder, NULL, 0); |
1208 | 1213 | ||
1209 | if (sdvo_priv->is_hdmi) { | 1214 | if (sdvo_priv->is_hdmi) { |
1210 | intel_sdvo_set_avi_infoframe(output, mode); | 1215 | intel_sdvo_set_avi_infoframe(intel_encoder, mode); |
1211 | sdvox |= SDVO_AUDIO_ENABLE; | 1216 | sdvox |= SDVO_AUDIO_ENABLE; |
1212 | } | 1217 | } |
1213 | 1218 | ||
@@ -1224,16 +1229,16 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1224 | */ | 1229 | */ |
1225 | if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { | 1230 | if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { |
1226 | /* Set the output timing to the screen */ | 1231 | /* Set the output timing to the screen */ |
1227 | intel_sdvo_set_target_output(output, | 1232 | intel_sdvo_set_target_output(intel_encoder, |
1228 | sdvo_priv->controlled_output); | 1233 | sdvo_priv->controlled_output); |
1229 | intel_sdvo_set_output_timing(output, &input_dtd); | 1234 | intel_sdvo_set_output_timing(intel_encoder, &input_dtd); |
1230 | } | 1235 | } |
1231 | 1236 | ||
1232 | /* Set the input timing to the screen. Assume always input 0. */ | 1237 | /* Set the input timing to the screen. Assume always input 0. */ |
1233 | intel_sdvo_set_target_input(output, true, false); | 1238 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1234 | 1239 | ||
1235 | if (sdvo_priv->is_tv) | 1240 | if (sdvo_priv->is_tv) |
1236 | intel_sdvo_set_tv_format(output); | 1241 | intel_sdvo_set_tv_format(intel_encoder); |
1237 | 1242 | ||
1238 | /* We would like to use intel_sdvo_create_preferred_input_timing() to | 1243 | /* We would like to use intel_sdvo_create_preferred_input_timing() to |
1239 | * provide the device with a timing it can support, if it supports that | 1244 | * provide the device with a timing it can support, if it supports that |
@@ -1241,29 +1246,29 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1241 | * output the preferred timing, and we don't support that currently. | 1246 | * output the preferred timing, and we don't support that currently. |
1242 | */ | 1247 | */ |
1243 | #if 0 | 1248 | #if 0 |
1244 | success = intel_sdvo_create_preferred_input_timing(output, clock, | 1249 | success = intel_sdvo_create_preferred_input_timing(encoder, clock, |
1245 | width, height); | 1250 | width, height); |
1246 | if (success) { | 1251 | if (success) { |
1247 | struct intel_sdvo_dtd *input_dtd; | 1252 | struct intel_sdvo_dtd *input_dtd; |
1248 | 1253 | ||
1249 | intel_sdvo_get_preferred_input_timing(output, &input_dtd); | 1254 | intel_sdvo_get_preferred_input_timing(encoder, &input_dtd); |
1250 | intel_sdvo_set_input_timing(output, &input_dtd); | 1255 | intel_sdvo_set_input_timing(encoder, &input_dtd); |
1251 | } | 1256 | } |
1252 | #else | 1257 | #else |
1253 | intel_sdvo_set_input_timing(output, &input_dtd); | 1258 | intel_sdvo_set_input_timing(intel_encoder, &input_dtd); |
1254 | #endif | 1259 | #endif |
1255 | 1260 | ||
1256 | switch (intel_sdvo_get_pixel_multiplier(mode)) { | 1261 | switch (intel_sdvo_get_pixel_multiplier(mode)) { |
1257 | case 1: | 1262 | case 1: |
1258 | intel_sdvo_set_clock_rate_mult(output, | 1263 | intel_sdvo_set_clock_rate_mult(intel_encoder, |
1259 | SDVO_CLOCK_RATE_MULT_1X); | 1264 | SDVO_CLOCK_RATE_MULT_1X); |
1260 | break; | 1265 | break; |
1261 | case 2: | 1266 | case 2: |
1262 | intel_sdvo_set_clock_rate_mult(output, | 1267 | intel_sdvo_set_clock_rate_mult(intel_encoder, |
1263 | SDVO_CLOCK_RATE_MULT_2X); | 1268 | SDVO_CLOCK_RATE_MULT_2X); |
1264 | break; | 1269 | break; |
1265 | case 4: | 1270 | case 4: |
1266 | intel_sdvo_set_clock_rate_mult(output, | 1271 | intel_sdvo_set_clock_rate_mult(intel_encoder, |
1267 | SDVO_CLOCK_RATE_MULT_4X); | 1272 | SDVO_CLOCK_RATE_MULT_4X); |
1268 | break; | 1273 | break; |
1269 | } | 1274 | } |
@@ -1274,8 +1279,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1274 | SDVO_VSYNC_ACTIVE_HIGH | | 1279 | SDVO_VSYNC_ACTIVE_HIGH | |
1275 | SDVO_HSYNC_ACTIVE_HIGH; | 1280 | SDVO_HSYNC_ACTIVE_HIGH; |
1276 | } else { | 1281 | } else { |
1277 | sdvox |= I915_READ(sdvo_priv->output_device); | 1282 | sdvox |= I915_READ(sdvo_priv->sdvo_reg); |
1278 | switch (sdvo_priv->output_device) { | 1283 | switch (sdvo_priv->sdvo_reg) { |
1279 | case SDVOB: | 1284 | case SDVOB: |
1280 | sdvox &= SDVOB_PRESERVE_MASK; | 1285 | sdvox &= SDVOB_PRESERVE_MASK; |
1281 | break; | 1286 | break; |
@@ -1299,26 +1304,26 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder, | |||
1299 | 1304 | ||
1300 | if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) | 1305 | if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) |
1301 | sdvox |= SDVO_STALL_SELECT; | 1306 | sdvox |= SDVO_STALL_SELECT; |
1302 | intel_sdvo_write_sdvox(output, sdvox); | 1307 | intel_sdvo_write_sdvox(intel_encoder, sdvox); |
1303 | } | 1308 | } |
1304 | 1309 | ||
1305 | static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) | 1310 | static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) |
1306 | { | 1311 | { |
1307 | struct drm_device *dev = encoder->dev; | 1312 | struct drm_device *dev = encoder->dev; |
1308 | struct drm_i915_private *dev_priv = dev->dev_private; | 1313 | struct drm_i915_private *dev_priv = dev->dev_private; |
1309 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 1314 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1310 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1315 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1311 | u32 temp; | 1316 | u32 temp; |
1312 | 1317 | ||
1313 | if (mode != DRM_MODE_DPMS_ON) { | 1318 | if (mode != DRM_MODE_DPMS_ON) { |
1314 | intel_sdvo_set_active_outputs(intel_output, 0); | 1319 | intel_sdvo_set_active_outputs(intel_encoder, 0); |
1315 | if (0) | 1320 | if (0) |
1316 | intel_sdvo_set_encoder_power_state(intel_output, mode); | 1321 | intel_sdvo_set_encoder_power_state(intel_encoder, mode); |
1317 | 1322 | ||
1318 | if (mode == DRM_MODE_DPMS_OFF) { | 1323 | if (mode == DRM_MODE_DPMS_OFF) { |
1319 | temp = I915_READ(sdvo_priv->output_device); | 1324 | temp = I915_READ(sdvo_priv->sdvo_reg); |
1320 | if ((temp & SDVO_ENABLE) != 0) { | 1325 | if ((temp & SDVO_ENABLE) != 0) { |
1321 | intel_sdvo_write_sdvox(intel_output, temp & ~SDVO_ENABLE); | 1326 | intel_sdvo_write_sdvox(intel_encoder, temp & ~SDVO_ENABLE); |
1322 | } | 1327 | } |
1323 | } | 1328 | } |
1324 | } else { | 1329 | } else { |
@@ -1326,13 +1331,13 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) | |||
1326 | int i; | 1331 | int i; |
1327 | u8 status; | 1332 | u8 status; |
1328 | 1333 | ||
1329 | temp = I915_READ(sdvo_priv->output_device); | 1334 | temp = I915_READ(sdvo_priv->sdvo_reg); |
1330 | if ((temp & SDVO_ENABLE) == 0) | 1335 | if ((temp & SDVO_ENABLE) == 0) |
1331 | intel_sdvo_write_sdvox(intel_output, temp | SDVO_ENABLE); | 1336 | intel_sdvo_write_sdvox(intel_encoder, temp | SDVO_ENABLE); |
1332 | for (i = 0; i < 2; i++) | 1337 | for (i = 0; i < 2; i++) |
1333 | intel_wait_for_vblank(dev); | 1338 | intel_wait_for_vblank(dev); |
1334 | 1339 | ||
1335 | status = intel_sdvo_get_trained_inputs(intel_output, &input1, | 1340 | status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, |
1336 | &input2); | 1341 | &input2); |
1337 | 1342 | ||
1338 | 1343 | ||
@@ -1346,8 +1351,8 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) | |||
1346 | } | 1351 | } |
1347 | 1352 | ||
1348 | if (0) | 1353 | if (0) |
1349 | intel_sdvo_set_encoder_power_state(intel_output, mode); | 1354 | intel_sdvo_set_encoder_power_state(intel_encoder, mode); |
1350 | intel_sdvo_set_active_outputs(intel_output, sdvo_priv->controlled_output); | 1355 | intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->controlled_output); |
1351 | } | 1356 | } |
1352 | return; | 1357 | return; |
1353 | } | 1358 | } |
@@ -1356,22 +1361,22 @@ static void intel_sdvo_save(struct drm_connector *connector) | |||
1356 | { | 1361 | { |
1357 | struct drm_device *dev = connector->dev; | 1362 | struct drm_device *dev = connector->dev; |
1358 | struct drm_i915_private *dev_priv = dev->dev_private; | 1363 | struct drm_i915_private *dev_priv = dev->dev_private; |
1359 | struct intel_output *intel_output = to_intel_output(connector); | 1364 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1360 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1365 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1361 | int o; | 1366 | int o; |
1362 | 1367 | ||
1363 | sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_output); | 1368 | sdvo_priv->save_sdvo_mult = intel_sdvo_get_clock_rate_mult(intel_encoder); |
1364 | intel_sdvo_get_active_outputs(intel_output, &sdvo_priv->save_active_outputs); | 1369 | intel_sdvo_get_active_outputs(intel_encoder, &sdvo_priv->save_active_outputs); |
1365 | 1370 | ||
1366 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { | 1371 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { |
1367 | intel_sdvo_set_target_input(intel_output, true, false); | 1372 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1368 | intel_sdvo_get_input_timing(intel_output, | 1373 | intel_sdvo_get_input_timing(intel_encoder, |
1369 | &sdvo_priv->save_input_dtd_1); | 1374 | &sdvo_priv->save_input_dtd_1); |
1370 | } | 1375 | } |
1371 | 1376 | ||
1372 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { | 1377 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { |
1373 | intel_sdvo_set_target_input(intel_output, false, true); | 1378 | intel_sdvo_set_target_input(intel_encoder, false, true); |
1374 | intel_sdvo_get_input_timing(intel_output, | 1379 | intel_sdvo_get_input_timing(intel_encoder, |
1375 | &sdvo_priv->save_input_dtd_2); | 1380 | &sdvo_priv->save_input_dtd_2); |
1376 | } | 1381 | } |
1377 | 1382 | ||
@@ -1380,8 +1385,8 @@ static void intel_sdvo_save(struct drm_connector *connector) | |||
1380 | u16 this_output = (1 << o); | 1385 | u16 this_output = (1 << o); |
1381 | if (sdvo_priv->caps.output_flags & this_output) | 1386 | if (sdvo_priv->caps.output_flags & this_output) |
1382 | { | 1387 | { |
1383 | intel_sdvo_set_target_output(intel_output, this_output); | 1388 | intel_sdvo_set_target_output(intel_encoder, this_output); |
1384 | intel_sdvo_get_output_timing(intel_output, | 1389 | intel_sdvo_get_output_timing(intel_encoder, |
1385 | &sdvo_priv->save_output_dtd[o]); | 1390 | &sdvo_priv->save_output_dtd[o]); |
1386 | } | 1391 | } |
1387 | } | 1392 | } |
@@ -1389,66 +1394,66 @@ static void intel_sdvo_save(struct drm_connector *connector) | |||
1389 | /* XXX: Save TV format/enhancements. */ | 1394 | /* XXX: Save TV format/enhancements. */ |
1390 | } | 1395 | } |
1391 | 1396 | ||
1392 | sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->output_device); | 1397 | sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->sdvo_reg); |
1393 | } | 1398 | } |
1394 | 1399 | ||
1395 | static void intel_sdvo_restore(struct drm_connector *connector) | 1400 | static void intel_sdvo_restore(struct drm_connector *connector) |
1396 | { | 1401 | { |
1397 | struct drm_device *dev = connector->dev; | 1402 | struct drm_device *dev = connector->dev; |
1398 | struct intel_output *intel_output = to_intel_output(connector); | 1403 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1399 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1404 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1400 | int o; | 1405 | int o; |
1401 | int i; | 1406 | int i; |
1402 | bool input1, input2; | 1407 | bool input1, input2; |
1403 | u8 status; | 1408 | u8 status; |
1404 | 1409 | ||
1405 | intel_sdvo_set_active_outputs(intel_output, 0); | 1410 | intel_sdvo_set_active_outputs(intel_encoder, 0); |
1406 | 1411 | ||
1407 | for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++) | 1412 | for (o = SDVO_OUTPUT_FIRST; o <= SDVO_OUTPUT_LAST; o++) |
1408 | { | 1413 | { |
1409 | u16 this_output = (1 << o); | 1414 | u16 this_output = (1 << o); |
1410 | if (sdvo_priv->caps.output_flags & this_output) { | 1415 | if (sdvo_priv->caps.output_flags & this_output) { |
1411 | intel_sdvo_set_target_output(intel_output, this_output); | 1416 | intel_sdvo_set_target_output(intel_encoder, this_output); |
1412 | intel_sdvo_set_output_timing(intel_output, &sdvo_priv->save_output_dtd[o]); | 1417 | intel_sdvo_set_output_timing(intel_encoder, &sdvo_priv->save_output_dtd[o]); |
1413 | } | 1418 | } |
1414 | } | 1419 | } |
1415 | 1420 | ||
1416 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { | 1421 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x1) { |
1417 | intel_sdvo_set_target_input(intel_output, true, false); | 1422 | intel_sdvo_set_target_input(intel_encoder, true, false); |
1418 | intel_sdvo_set_input_timing(intel_output, &sdvo_priv->save_input_dtd_1); | 1423 | intel_sdvo_set_input_timing(intel_encoder, &sdvo_priv->save_input_dtd_1); |
1419 | } | 1424 | } |
1420 | 1425 | ||
1421 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { | 1426 | if (sdvo_priv->caps.sdvo_inputs_mask & 0x2) { |
1422 | intel_sdvo_set_target_input(intel_output, false, true); | 1427 | intel_sdvo_set_target_input(intel_encoder, false, true); |
1423 | intel_sdvo_set_input_timing(intel_output, &sdvo_priv->save_input_dtd_2); | 1428 | intel_sdvo_set_input_timing(intel_encoder, &sdvo_priv->save_input_dtd_2); |
1424 | } | 1429 | } |
1425 | 1430 | ||
1426 | intel_sdvo_set_clock_rate_mult(intel_output, sdvo_priv->save_sdvo_mult); | 1431 | intel_sdvo_set_clock_rate_mult(intel_encoder, sdvo_priv->save_sdvo_mult); |
1427 | 1432 | ||
1428 | if (sdvo_priv->is_tv) { | 1433 | if (sdvo_priv->is_tv) { |
1429 | /* XXX: Restore TV format/enhancements. */ | 1434 | /* XXX: Restore TV format/enhancements. */ |
1430 | } | 1435 | } |
1431 | 1436 | ||
1432 | intel_sdvo_write_sdvox(intel_output, sdvo_priv->save_SDVOX); | 1437 | intel_sdvo_write_sdvox(intel_encoder, sdvo_priv->save_SDVOX); |
1433 | 1438 | ||
1434 | if (sdvo_priv->save_SDVOX & SDVO_ENABLE) | 1439 | if (sdvo_priv->save_SDVOX & SDVO_ENABLE) |
1435 | { | 1440 | { |
1436 | for (i = 0; i < 2; i++) | 1441 | for (i = 0; i < 2; i++) |
1437 | intel_wait_for_vblank(dev); | 1442 | intel_wait_for_vblank(dev); |
1438 | status = intel_sdvo_get_trained_inputs(intel_output, &input1, &input2); | 1443 | status = intel_sdvo_get_trained_inputs(intel_encoder, &input1, &input2); |
1439 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) | 1444 | if (status == SDVO_CMD_STATUS_SUCCESS && !input1) |
1440 | DRM_DEBUG_KMS("First %s output reported failure to " | 1445 | DRM_DEBUG_KMS("First %s output reported failure to " |
1441 | "sync\n", SDVO_NAME(sdvo_priv)); | 1446 | "sync\n", SDVO_NAME(sdvo_priv)); |
1442 | } | 1447 | } |
1443 | 1448 | ||
1444 | intel_sdvo_set_active_outputs(intel_output, sdvo_priv->save_active_outputs); | 1449 | intel_sdvo_set_active_outputs(intel_encoder, sdvo_priv->save_active_outputs); |
1445 | } | 1450 | } |
1446 | 1451 | ||
1447 | static int intel_sdvo_mode_valid(struct drm_connector *connector, | 1452 | static int intel_sdvo_mode_valid(struct drm_connector *connector, |
1448 | struct drm_display_mode *mode) | 1453 | struct drm_display_mode *mode) |
1449 | { | 1454 | { |
1450 | struct intel_output *intel_output = to_intel_output(connector); | 1455 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1451 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1456 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1452 | 1457 | ||
1453 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 1458 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
1454 | return MODE_NO_DBLESCAN; | 1459 | return MODE_NO_DBLESCAN; |
@@ -1473,12 +1478,12 @@ static int intel_sdvo_mode_valid(struct drm_connector *connector, | |||
1473 | return MODE_OK; | 1478 | return MODE_OK; |
1474 | } | 1479 | } |
1475 | 1480 | ||
1476 | static bool intel_sdvo_get_capabilities(struct intel_output *intel_output, struct intel_sdvo_caps *caps) | 1481 | static bool intel_sdvo_get_capabilities(struct intel_encoder *intel_encoder, struct intel_sdvo_caps *caps) |
1477 | { | 1482 | { |
1478 | u8 status; | 1483 | u8 status; |
1479 | 1484 | ||
1480 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0); | 1485 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_DEVICE_CAPS, NULL, 0); |
1481 | status = intel_sdvo_read_response(intel_output, caps, sizeof(*caps)); | 1486 | status = intel_sdvo_read_response(intel_encoder, caps, sizeof(*caps)); |
1482 | if (status != SDVO_CMD_STATUS_SUCCESS) | 1487 | if (status != SDVO_CMD_STATUS_SUCCESS) |
1483 | return false; | 1488 | return false; |
1484 | 1489 | ||
@@ -1488,22 +1493,22 @@ static bool intel_sdvo_get_capabilities(struct intel_output *intel_output, struc | |||
1488 | struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB) | 1493 | struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB) |
1489 | { | 1494 | { |
1490 | struct drm_connector *connector = NULL; | 1495 | struct drm_connector *connector = NULL; |
1491 | struct intel_output *iout = NULL; | 1496 | struct intel_encoder *iout = NULL; |
1492 | struct intel_sdvo_priv *sdvo; | 1497 | struct intel_sdvo_priv *sdvo; |
1493 | 1498 | ||
1494 | /* find the sdvo connector */ | 1499 | /* find the sdvo connector */ |
1495 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 1500 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
1496 | iout = to_intel_output(connector); | 1501 | iout = to_intel_encoder(connector); |
1497 | 1502 | ||
1498 | if (iout->type != INTEL_OUTPUT_SDVO) | 1503 | if (iout->type != INTEL_OUTPUT_SDVO) |
1499 | continue; | 1504 | continue; |
1500 | 1505 | ||
1501 | sdvo = iout->dev_priv; | 1506 | sdvo = iout->dev_priv; |
1502 | 1507 | ||
1503 | if (sdvo->output_device == SDVOB && sdvoB) | 1508 | if (sdvo->sdvo_reg == SDVOB && sdvoB) |
1504 | return connector; | 1509 | return connector; |
1505 | 1510 | ||
1506 | if (sdvo->output_device == SDVOC && !sdvoB) | 1511 | if (sdvo->sdvo_reg == SDVOC && !sdvoB) |
1507 | return connector; | 1512 | return connector; |
1508 | 1513 | ||
1509 | } | 1514 | } |
@@ -1515,16 +1520,16 @@ int intel_sdvo_supports_hotplug(struct drm_connector *connector) | |||
1515 | { | 1520 | { |
1516 | u8 response[2]; | 1521 | u8 response[2]; |
1517 | u8 status; | 1522 | u8 status; |
1518 | struct intel_output *intel_output; | 1523 | struct intel_encoder *intel_encoder; |
1519 | DRM_DEBUG_KMS("\n"); | 1524 | DRM_DEBUG_KMS("\n"); |
1520 | 1525 | ||
1521 | if (!connector) | 1526 | if (!connector) |
1522 | return 0; | 1527 | return 0; |
1523 | 1528 | ||
1524 | intel_output = to_intel_output(connector); | 1529 | intel_encoder = to_intel_encoder(connector); |
1525 | 1530 | ||
1526 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); | 1531 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); |
1527 | status = intel_sdvo_read_response(intel_output, &response, 2); | 1532 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
1528 | 1533 | ||
1529 | if (response[0] !=0) | 1534 | if (response[0] !=0) |
1530 | return 1; | 1535 | return 1; |
@@ -1536,30 +1541,30 @@ void intel_sdvo_set_hotplug(struct drm_connector *connector, int on) | |||
1536 | { | 1541 | { |
1537 | u8 response[2]; | 1542 | u8 response[2]; |
1538 | u8 status; | 1543 | u8 status; |
1539 | struct intel_output *intel_output = to_intel_output(connector); | 1544 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1540 | 1545 | ||
1541 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); | 1546 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); |
1542 | intel_sdvo_read_response(intel_output, &response, 2); | 1547 | intel_sdvo_read_response(intel_encoder, &response, 2); |
1543 | 1548 | ||
1544 | if (on) { | 1549 | if (on) { |
1545 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); | 1550 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0); |
1546 | status = intel_sdvo_read_response(intel_output, &response, 2); | 1551 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
1547 | 1552 | ||
1548 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); | 1553 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); |
1549 | } else { | 1554 | } else { |
1550 | response[0] = 0; | 1555 | response[0] = 0; |
1551 | response[1] = 0; | 1556 | response[1] = 0; |
1552 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); | 1557 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2); |
1553 | } | 1558 | } |
1554 | 1559 | ||
1555 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); | 1560 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0); |
1556 | intel_sdvo_read_response(intel_output, &response, 2); | 1561 | intel_sdvo_read_response(intel_encoder, &response, 2); |
1557 | } | 1562 | } |
1558 | 1563 | ||
1559 | static bool | 1564 | static bool |
1560 | intel_sdvo_multifunc_encoder(struct intel_output *intel_output) | 1565 | intel_sdvo_multifunc_encoder(struct intel_encoder *intel_encoder) |
1561 | { | 1566 | { |
1562 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1567 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1563 | int caps = 0; | 1568 | int caps = 0; |
1564 | 1569 | ||
1565 | if (sdvo_priv->caps.output_flags & | 1570 | if (sdvo_priv->caps.output_flags & |
@@ -1593,11 +1598,11 @@ static struct drm_connector * | |||
1593 | intel_find_analog_connector(struct drm_device *dev) | 1598 | intel_find_analog_connector(struct drm_device *dev) |
1594 | { | 1599 | { |
1595 | struct drm_connector *connector; | 1600 | struct drm_connector *connector; |
1596 | struct intel_output *intel_output; | 1601 | struct intel_encoder *intel_encoder; |
1597 | 1602 | ||
1598 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { | 1603 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) { |
1599 | intel_output = to_intel_output(connector); | 1604 | intel_encoder = to_intel_encoder(connector); |
1600 | if (intel_output->type == INTEL_OUTPUT_ANALOG) | 1605 | if (intel_encoder->type == INTEL_OUTPUT_ANALOG) |
1601 | return connector; | 1606 | return connector; |
1602 | } | 1607 | } |
1603 | return NULL; | 1608 | return NULL; |
@@ -1622,16 +1627,16 @@ intel_analog_is_connected(struct drm_device *dev) | |||
1622 | enum drm_connector_status | 1627 | enum drm_connector_status |
1623 | intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | 1628 | intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) |
1624 | { | 1629 | { |
1625 | struct intel_output *intel_output = to_intel_output(connector); | 1630 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1626 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1631 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1627 | enum drm_connector_status status = connector_status_connected; | 1632 | enum drm_connector_status status = connector_status_connected; |
1628 | struct edid *edid = NULL; | 1633 | struct edid *edid = NULL; |
1629 | 1634 | ||
1630 | edid = drm_get_edid(&intel_output->base, | 1635 | edid = drm_get_edid(&intel_encoder->base, |
1631 | intel_output->ddc_bus); | 1636 | intel_encoder->ddc_bus); |
1632 | 1637 | ||
1633 | /* This is only applied to SDVO cards with multiple outputs */ | 1638 | /* This is only applied to SDVO cards with multiple outputs */ |
1634 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_output)) { | 1639 | if (edid == NULL && intel_sdvo_multifunc_encoder(intel_encoder)) { |
1635 | uint8_t saved_ddc, temp_ddc; | 1640 | uint8_t saved_ddc, temp_ddc; |
1636 | saved_ddc = sdvo_priv->ddc_bus; | 1641 | saved_ddc = sdvo_priv->ddc_bus; |
1637 | temp_ddc = sdvo_priv->ddc_bus >> 1; | 1642 | temp_ddc = sdvo_priv->ddc_bus >> 1; |
@@ -1641,8 +1646,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | |||
1641 | */ | 1646 | */ |
1642 | while(temp_ddc > 1) { | 1647 | while(temp_ddc > 1) { |
1643 | sdvo_priv->ddc_bus = temp_ddc; | 1648 | sdvo_priv->ddc_bus = temp_ddc; |
1644 | edid = drm_get_edid(&intel_output->base, | 1649 | edid = drm_get_edid(&intel_encoder->base, |
1645 | intel_output->ddc_bus); | 1650 | intel_encoder->ddc_bus); |
1646 | if (edid) { | 1651 | if (edid) { |
1647 | /* | 1652 | /* |
1648 | * When we can get the EDID, maybe it is the | 1653 | * When we can get the EDID, maybe it is the |
@@ -1661,8 +1666,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | |||
1661 | */ | 1666 | */ |
1662 | if (edid == NULL && | 1667 | if (edid == NULL && |
1663 | sdvo_priv->analog_ddc_bus && | 1668 | sdvo_priv->analog_ddc_bus && |
1664 | !intel_analog_is_connected(intel_output->base.dev)) | 1669 | !intel_analog_is_connected(intel_encoder->base.dev)) |
1665 | edid = drm_get_edid(&intel_output->base, | 1670 | edid = drm_get_edid(&intel_encoder->base, |
1666 | sdvo_priv->analog_ddc_bus); | 1671 | sdvo_priv->analog_ddc_bus); |
1667 | if (edid != NULL) { | 1672 | if (edid != NULL) { |
1668 | /* Don't report the output as connected if it's a DVI-I | 1673 | /* Don't report the output as connected if it's a DVI-I |
@@ -1677,7 +1682,7 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response) | |||
1677 | } | 1682 | } |
1678 | 1683 | ||
1679 | kfree(edid); | 1684 | kfree(edid); |
1680 | intel_output->base.display_info.raw_edid = NULL; | 1685 | intel_encoder->base.display_info.raw_edid = NULL; |
1681 | 1686 | ||
1682 | } else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) | 1687 | } else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) |
1683 | status = connector_status_disconnected; | 1688 | status = connector_status_disconnected; |
@@ -1689,16 +1694,16 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect | |||
1689 | { | 1694 | { |
1690 | uint16_t response; | 1695 | uint16_t response; |
1691 | u8 status; | 1696 | u8 status; |
1692 | struct intel_output *intel_output = to_intel_output(connector); | 1697 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1693 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1698 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1694 | 1699 | ||
1695 | intel_sdvo_write_cmd(intel_output, | 1700 | intel_sdvo_write_cmd(intel_encoder, |
1696 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); | 1701 | SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); |
1697 | if (sdvo_priv->is_tv) { | 1702 | if (sdvo_priv->is_tv) { |
1698 | /* add 30ms delay when the output type is SDVO-TV */ | 1703 | /* add 30ms delay when the output type is SDVO-TV */ |
1699 | mdelay(30); | 1704 | mdelay(30); |
1700 | } | 1705 | } |
1701 | status = intel_sdvo_read_response(intel_output, &response, 2); | 1706 | status = intel_sdvo_read_response(intel_encoder, &response, 2); |
1702 | 1707 | ||
1703 | DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8); | 1708 | DRM_DEBUG_KMS("SDVO response %d %d\n", response & 0xff, response >> 8); |
1704 | 1709 | ||
@@ -1708,10 +1713,10 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect | |||
1708 | if (response == 0) | 1713 | if (response == 0) |
1709 | return connector_status_disconnected; | 1714 | return connector_status_disconnected; |
1710 | 1715 | ||
1711 | if (intel_sdvo_multifunc_encoder(intel_output) && | 1716 | if (intel_sdvo_multifunc_encoder(intel_encoder) && |
1712 | sdvo_priv->attached_output != response) { | 1717 | sdvo_priv->attached_output != response) { |
1713 | if (sdvo_priv->controlled_output != response && | 1718 | if (sdvo_priv->controlled_output != response && |
1714 | intel_sdvo_output_setup(intel_output, response) != true) | 1719 | intel_sdvo_output_setup(intel_encoder, response) != true) |
1715 | return connector_status_unknown; | 1720 | return connector_status_unknown; |
1716 | sdvo_priv->attached_output = response; | 1721 | sdvo_priv->attached_output = response; |
1717 | } | 1722 | } |
@@ -1720,12 +1725,12 @@ static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connect | |||
1720 | 1725 | ||
1721 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) | 1726 | static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) |
1722 | { | 1727 | { |
1723 | struct intel_output *intel_output = to_intel_output(connector); | 1728 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1724 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1729 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1725 | int num_modes; | 1730 | int num_modes; |
1726 | 1731 | ||
1727 | /* set the bus switch and get the modes */ | 1732 | /* set the bus switch and get the modes */ |
1728 | num_modes = intel_ddc_get_modes(intel_output); | 1733 | num_modes = intel_ddc_get_modes(intel_encoder); |
1729 | 1734 | ||
1730 | /* | 1735 | /* |
1731 | * Mac mini hack. On this device, the DVI-I connector shares one DDC | 1736 | * Mac mini hack. On this device, the DVI-I connector shares one DDC |
@@ -1735,17 +1740,17 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) | |||
1735 | */ | 1740 | */ |
1736 | if (num_modes == 0 && | 1741 | if (num_modes == 0 && |
1737 | sdvo_priv->analog_ddc_bus && | 1742 | sdvo_priv->analog_ddc_bus && |
1738 | !intel_analog_is_connected(intel_output->base.dev)) { | 1743 | !intel_analog_is_connected(intel_encoder->base.dev)) { |
1739 | struct i2c_adapter *digital_ddc_bus; | 1744 | struct i2c_adapter *digital_ddc_bus; |
1740 | 1745 | ||
1741 | /* Switch to the analog ddc bus and try that | 1746 | /* Switch to the analog ddc bus and try that |
1742 | */ | 1747 | */ |
1743 | digital_ddc_bus = intel_output->ddc_bus; | 1748 | digital_ddc_bus = intel_encoder->ddc_bus; |
1744 | intel_output->ddc_bus = sdvo_priv->analog_ddc_bus; | 1749 | intel_encoder->ddc_bus = sdvo_priv->analog_ddc_bus; |
1745 | 1750 | ||
1746 | (void) intel_ddc_get_modes(intel_output); | 1751 | (void) intel_ddc_get_modes(intel_encoder); |
1747 | 1752 | ||
1748 | intel_output->ddc_bus = digital_ddc_bus; | 1753 | intel_encoder->ddc_bus = digital_ddc_bus; |
1749 | } | 1754 | } |
1750 | } | 1755 | } |
1751 | 1756 | ||
@@ -1816,7 +1821,7 @@ struct drm_display_mode sdvo_tv_modes[] = { | |||
1816 | 1821 | ||
1817 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) | 1822 | static void intel_sdvo_get_tv_modes(struct drm_connector *connector) |
1818 | { | 1823 | { |
1819 | struct intel_output *output = to_intel_output(connector); | 1824 | struct intel_encoder *output = to_intel_encoder(connector); |
1820 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1825 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
1821 | struct intel_sdvo_sdtv_resolution_request tv_res; | 1826 | struct intel_sdvo_sdtv_resolution_request tv_res; |
1822 | uint32_t reply = 0, format_map = 0; | 1827 | uint32_t reply = 0, format_map = 0; |
@@ -1858,9 +1863,9 @@ static void intel_sdvo_get_tv_modes(struct drm_connector *connector) | |||
1858 | 1863 | ||
1859 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) | 1864 | static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) |
1860 | { | 1865 | { |
1861 | struct intel_output *intel_output = to_intel_output(connector); | 1866 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1862 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | 1867 | struct drm_i915_private *dev_priv = connector->dev->dev_private; |
1863 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1868 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1864 | struct drm_display_mode *newmode; | 1869 | struct drm_display_mode *newmode; |
1865 | 1870 | ||
1866 | /* | 1871 | /* |
@@ -1868,7 +1873,7 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) | |||
1868 | * Assume that the preferred modes are | 1873 | * Assume that the preferred modes are |
1869 | * arranged in priority order. | 1874 | * arranged in priority order. |
1870 | */ | 1875 | */ |
1871 | intel_ddc_get_modes(intel_output); | 1876 | intel_ddc_get_modes(intel_encoder); |
1872 | if (list_empty(&connector->probed_modes) == false) | 1877 | if (list_empty(&connector->probed_modes) == false) |
1873 | goto end; | 1878 | goto end; |
1874 | 1879 | ||
@@ -1897,7 +1902,7 @@ end: | |||
1897 | 1902 | ||
1898 | static int intel_sdvo_get_modes(struct drm_connector *connector) | 1903 | static int intel_sdvo_get_modes(struct drm_connector *connector) |
1899 | { | 1904 | { |
1900 | struct intel_output *output = to_intel_output(connector); | 1905 | struct intel_encoder *output = to_intel_encoder(connector); |
1901 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 1906 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
1902 | 1907 | ||
1903 | if (sdvo_priv->is_tv) | 1908 | if (sdvo_priv->is_tv) |
@@ -1915,8 +1920,8 @@ static int intel_sdvo_get_modes(struct drm_connector *connector) | |||
1915 | static | 1920 | static |
1916 | void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) | 1921 | void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) |
1917 | { | 1922 | { |
1918 | struct intel_output *intel_output = to_intel_output(connector); | 1923 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1919 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1924 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1920 | struct drm_device *dev = connector->dev; | 1925 | struct drm_device *dev = connector->dev; |
1921 | 1926 | ||
1922 | if (sdvo_priv->is_tv) { | 1927 | if (sdvo_priv->is_tv) { |
@@ -1953,13 +1958,13 @@ void intel_sdvo_destroy_enhance_property(struct drm_connector *connector) | |||
1953 | 1958 | ||
1954 | static void intel_sdvo_destroy(struct drm_connector *connector) | 1959 | static void intel_sdvo_destroy(struct drm_connector *connector) |
1955 | { | 1960 | { |
1956 | struct intel_output *intel_output = to_intel_output(connector); | 1961 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1957 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1962 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1958 | 1963 | ||
1959 | if (intel_output->i2c_bus) | 1964 | if (intel_encoder->i2c_bus) |
1960 | intel_i2c_destroy(intel_output->i2c_bus); | 1965 | intel_i2c_destroy(intel_encoder->i2c_bus); |
1961 | if (intel_output->ddc_bus) | 1966 | if (intel_encoder->ddc_bus) |
1962 | intel_i2c_destroy(intel_output->ddc_bus); | 1967 | intel_i2c_destroy(intel_encoder->ddc_bus); |
1963 | if (sdvo_priv->analog_ddc_bus) | 1968 | if (sdvo_priv->analog_ddc_bus) |
1964 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); | 1969 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); |
1965 | 1970 | ||
@@ -1977,7 +1982,7 @@ static void intel_sdvo_destroy(struct drm_connector *connector) | |||
1977 | drm_sysfs_connector_remove(connector); | 1982 | drm_sysfs_connector_remove(connector); |
1978 | drm_connector_cleanup(connector); | 1983 | drm_connector_cleanup(connector); |
1979 | 1984 | ||
1980 | kfree(intel_output); | 1985 | kfree(intel_encoder); |
1981 | } | 1986 | } |
1982 | 1987 | ||
1983 | static int | 1988 | static int |
@@ -1985,9 +1990,9 @@ intel_sdvo_set_property(struct drm_connector *connector, | |||
1985 | struct drm_property *property, | 1990 | struct drm_property *property, |
1986 | uint64_t val) | 1991 | uint64_t val) |
1987 | { | 1992 | { |
1988 | struct intel_output *intel_output = to_intel_output(connector); | 1993 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1989 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 1994 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
1990 | struct drm_encoder *encoder = &intel_output->enc; | 1995 | struct drm_encoder *encoder = &intel_encoder->enc; |
1991 | struct drm_crtc *crtc = encoder->crtc; | 1996 | struct drm_crtc *crtc = encoder->crtc; |
1992 | int ret = 0; | 1997 | int ret = 0; |
1993 | bool changed = false; | 1998 | bool changed = false; |
@@ -2095,8 +2100,8 @@ intel_sdvo_set_property(struct drm_connector *connector, | |||
2095 | sdvo_priv->cur_brightness = temp_value; | 2100 | sdvo_priv->cur_brightness = temp_value; |
2096 | } | 2101 | } |
2097 | if (cmd) { | 2102 | if (cmd) { |
2098 | intel_sdvo_write_cmd(intel_output, cmd, &temp_value, 2); | 2103 | intel_sdvo_write_cmd(intel_encoder, cmd, &temp_value, 2); |
2099 | status = intel_sdvo_read_response(intel_output, | 2104 | status = intel_sdvo_read_response(intel_encoder, |
2100 | NULL, 0); | 2105 | NULL, 0); |
2101 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2106 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2102 | DRM_DEBUG_KMS("Incorrect SDVO command \n"); | 2107 | DRM_DEBUG_KMS("Incorrect SDVO command \n"); |
@@ -2191,7 +2196,7 @@ intel_sdvo_select_ddc_bus(struct intel_sdvo_priv *dev_priv) | |||
2191 | } | 2196 | } |
2192 | 2197 | ||
2193 | static bool | 2198 | static bool |
2194 | intel_sdvo_get_digital_encoding_mode(struct intel_output *output) | 2199 | intel_sdvo_get_digital_encoding_mode(struct intel_encoder *output) |
2195 | { | 2200 | { |
2196 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; | 2201 | struct intel_sdvo_priv *sdvo_priv = output->dev_priv; |
2197 | uint8_t status; | 2202 | uint8_t status; |
@@ -2205,42 +2210,42 @@ intel_sdvo_get_digital_encoding_mode(struct intel_output *output) | |||
2205 | return true; | 2210 | return true; |
2206 | } | 2211 | } |
2207 | 2212 | ||
2208 | static struct intel_output * | 2213 | static struct intel_encoder * |
2209 | intel_sdvo_chan_to_intel_output(struct intel_i2c_chan *chan) | 2214 | intel_sdvo_chan_to_intel_encoder(struct intel_i2c_chan *chan) |
2210 | { | 2215 | { |
2211 | struct drm_device *dev = chan->drm_dev; | 2216 | struct drm_device *dev = chan->drm_dev; |
2212 | struct drm_connector *connector; | 2217 | struct drm_connector *connector; |
2213 | struct intel_output *intel_output = NULL; | 2218 | struct intel_encoder *intel_encoder = NULL; |
2214 | 2219 | ||
2215 | list_for_each_entry(connector, | 2220 | list_for_each_entry(connector, |
2216 | &dev->mode_config.connector_list, head) { | 2221 | &dev->mode_config.connector_list, head) { |
2217 | if (to_intel_output(connector)->ddc_bus == &chan->adapter) { | 2222 | if (to_intel_encoder(connector)->ddc_bus == &chan->adapter) { |
2218 | intel_output = to_intel_output(connector); | 2223 | intel_encoder = to_intel_encoder(connector); |
2219 | break; | 2224 | break; |
2220 | } | 2225 | } |
2221 | } | 2226 | } |
2222 | return intel_output; | 2227 | return intel_encoder; |
2223 | } | 2228 | } |
2224 | 2229 | ||
2225 | static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap, | 2230 | static int intel_sdvo_master_xfer(struct i2c_adapter *i2c_adap, |
2226 | struct i2c_msg msgs[], int num) | 2231 | struct i2c_msg msgs[], int num) |
2227 | { | 2232 | { |
2228 | struct intel_output *intel_output; | 2233 | struct intel_encoder *intel_encoder; |
2229 | struct intel_sdvo_priv *sdvo_priv; | 2234 | struct intel_sdvo_priv *sdvo_priv; |
2230 | struct i2c_algo_bit_data *algo_data; | 2235 | struct i2c_algo_bit_data *algo_data; |
2231 | const struct i2c_algorithm *algo; | 2236 | const struct i2c_algorithm *algo; |
2232 | 2237 | ||
2233 | algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; | 2238 | algo_data = (struct i2c_algo_bit_data *)i2c_adap->algo_data; |
2234 | intel_output = | 2239 | intel_encoder = |
2235 | intel_sdvo_chan_to_intel_output( | 2240 | intel_sdvo_chan_to_intel_encoder( |
2236 | (struct intel_i2c_chan *)(algo_data->data)); | 2241 | (struct intel_i2c_chan *)(algo_data->data)); |
2237 | if (intel_output == NULL) | 2242 | if (intel_encoder == NULL) |
2238 | return -EINVAL; | 2243 | return -EINVAL; |
2239 | 2244 | ||
2240 | sdvo_priv = intel_output->dev_priv; | 2245 | sdvo_priv = intel_encoder->dev_priv; |
2241 | algo = intel_output->i2c_bus->algo; | 2246 | algo = intel_encoder->i2c_bus->algo; |
2242 | 2247 | ||
2243 | intel_sdvo_set_control_bus_switch(intel_output, sdvo_priv->ddc_bus); | 2248 | intel_sdvo_set_control_bus_switch(intel_encoder, sdvo_priv->ddc_bus); |
2244 | return algo->master_xfer(i2c_adap, msgs, num); | 2249 | return algo->master_xfer(i2c_adap, msgs, num); |
2245 | } | 2250 | } |
2246 | 2251 | ||
@@ -2249,12 +2254,12 @@ static struct i2c_algorithm intel_sdvo_i2c_bit_algo = { | |||
2249 | }; | 2254 | }; |
2250 | 2255 | ||
2251 | static u8 | 2256 | static u8 |
2252 | intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) | 2257 | intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg) |
2253 | { | 2258 | { |
2254 | struct drm_i915_private *dev_priv = dev->dev_private; | 2259 | struct drm_i915_private *dev_priv = dev->dev_private; |
2255 | struct sdvo_device_mapping *my_mapping, *other_mapping; | 2260 | struct sdvo_device_mapping *my_mapping, *other_mapping; |
2256 | 2261 | ||
2257 | if (output_device == SDVOB) { | 2262 | if (sdvo_reg == SDVOB) { |
2258 | my_mapping = &dev_priv->sdvo_mappings[0]; | 2263 | my_mapping = &dev_priv->sdvo_mappings[0]; |
2259 | other_mapping = &dev_priv->sdvo_mappings[1]; | 2264 | other_mapping = &dev_priv->sdvo_mappings[1]; |
2260 | } else { | 2265 | } else { |
@@ -2279,7 +2284,7 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) | |||
2279 | /* No SDVO device info is found for another DVO port, | 2284 | /* No SDVO device info is found for another DVO port, |
2280 | * so use mapping assumption we had before BIOS parsing. | 2285 | * so use mapping assumption we had before BIOS parsing. |
2281 | */ | 2286 | */ |
2282 | if (output_device == SDVOB) | 2287 | if (sdvo_reg == SDVOB) |
2283 | return 0x70; | 2288 | return 0x70; |
2284 | else | 2289 | else |
2285 | return 0x72; | 2290 | return 0x72; |
@@ -2305,15 +2310,15 @@ static struct dmi_system_id intel_sdvo_bad_tv[] = { | |||
2305 | }; | 2310 | }; |
2306 | 2311 | ||
2307 | static bool | 2312 | static bool |
2308 | intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | 2313 | intel_sdvo_output_setup(struct intel_encoder *intel_encoder, uint16_t flags) |
2309 | { | 2314 | { |
2310 | struct drm_connector *connector = &intel_output->base; | 2315 | struct drm_connector *connector = &intel_encoder->base; |
2311 | struct drm_encoder *encoder = &intel_output->enc; | 2316 | struct drm_encoder *encoder = &intel_encoder->enc; |
2312 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 2317 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
2313 | bool ret = true, registered = false; | 2318 | bool ret = true, registered = false; |
2314 | 2319 | ||
2315 | sdvo_priv->is_tv = false; | 2320 | sdvo_priv->is_tv = false; |
2316 | intel_output->needs_tv_clock = false; | 2321 | intel_encoder->needs_tv_clock = false; |
2317 | sdvo_priv->is_lvds = false; | 2322 | sdvo_priv->is_lvds = false; |
2318 | 2323 | ||
2319 | if (device_is_registered(&connector->kdev)) { | 2324 | if (device_is_registered(&connector->kdev)) { |
@@ -2331,16 +2336,16 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2331 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; | 2336 | encoder->encoder_type = DRM_MODE_ENCODER_TMDS; |
2332 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; | 2337 | connector->connector_type = DRM_MODE_CONNECTOR_DVID; |
2333 | 2338 | ||
2334 | if (intel_sdvo_get_supp_encode(intel_output, | 2339 | if (intel_sdvo_get_supp_encode(intel_encoder, |
2335 | &sdvo_priv->encode) && | 2340 | &sdvo_priv->encode) && |
2336 | intel_sdvo_get_digital_encoding_mode(intel_output) && | 2341 | intel_sdvo_get_digital_encoding_mode(intel_encoder) && |
2337 | sdvo_priv->is_hdmi) { | 2342 | sdvo_priv->is_hdmi) { |
2338 | /* enable hdmi encoding mode if supported */ | 2343 | /* enable hdmi encoding mode if supported */ |
2339 | intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI); | 2344 | intel_sdvo_set_encode(intel_encoder, SDVO_ENCODE_HDMI); |
2340 | intel_sdvo_set_colorimetry(intel_output, | 2345 | intel_sdvo_set_colorimetry(intel_encoder, |
2341 | SDVO_COLORIMETRY_RGB256); | 2346 | SDVO_COLORIMETRY_RGB256); |
2342 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; | 2347 | connector->connector_type = DRM_MODE_CONNECTOR_HDMIA; |
2343 | intel_output->clone_mask = | 2348 | intel_encoder->clone_mask = |
2344 | (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2349 | (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
2345 | (1 << INTEL_ANALOG_CLONE_BIT); | 2350 | (1 << INTEL_ANALOG_CLONE_BIT); |
2346 | } | 2351 | } |
@@ -2351,21 +2356,21 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2351 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; | 2356 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2352 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; | 2357 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2353 | sdvo_priv->is_tv = true; | 2358 | sdvo_priv->is_tv = true; |
2354 | intel_output->needs_tv_clock = true; | 2359 | intel_encoder->needs_tv_clock = true; |
2355 | intel_output->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; | 2360 | intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; |
2356 | } else if (flags & SDVO_OUTPUT_RGB0) { | 2361 | } else if (flags & SDVO_OUTPUT_RGB0) { |
2357 | 2362 | ||
2358 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0; | 2363 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0; |
2359 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; | 2364 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2360 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; | 2365 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2361 | intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2366 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
2362 | (1 << INTEL_ANALOG_CLONE_BIT); | 2367 | (1 << INTEL_ANALOG_CLONE_BIT); |
2363 | } else if (flags & SDVO_OUTPUT_RGB1) { | 2368 | } else if (flags & SDVO_OUTPUT_RGB1) { |
2364 | 2369 | ||
2365 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1; | 2370 | sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1; |
2366 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; | 2371 | encoder->encoder_type = DRM_MODE_ENCODER_DAC; |
2367 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; | 2372 | connector->connector_type = DRM_MODE_CONNECTOR_VGA; |
2368 | intel_output->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 2373 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | |
2369 | (1 << INTEL_ANALOG_CLONE_BIT); | 2374 | (1 << INTEL_ANALOG_CLONE_BIT); |
2370 | } else if (flags & SDVO_OUTPUT_CVBS0) { | 2375 | } else if (flags & SDVO_OUTPUT_CVBS0) { |
2371 | 2376 | ||
@@ -2373,15 +2378,15 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2373 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; | 2378 | encoder->encoder_type = DRM_MODE_ENCODER_TVDAC; |
2374 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; | 2379 | connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO; |
2375 | sdvo_priv->is_tv = true; | 2380 | sdvo_priv->is_tv = true; |
2376 | intel_output->needs_tv_clock = true; | 2381 | intel_encoder->needs_tv_clock = true; |
2377 | intel_output->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; | 2382 | intel_encoder->clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT; |
2378 | } else if (flags & SDVO_OUTPUT_LVDS0) { | 2383 | } else if (flags & SDVO_OUTPUT_LVDS0) { |
2379 | 2384 | ||
2380 | sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; | 2385 | sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0; |
2381 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; | 2386 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2382 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; | 2387 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2383 | sdvo_priv->is_lvds = true; | 2388 | sdvo_priv->is_lvds = true; |
2384 | intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | | 2389 | intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | |
2385 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 2390 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
2386 | } else if (flags & SDVO_OUTPUT_LVDS1) { | 2391 | } else if (flags & SDVO_OUTPUT_LVDS1) { |
2387 | 2392 | ||
@@ -2389,7 +2394,7 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2389 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; | 2394 | encoder->encoder_type = DRM_MODE_ENCODER_LVDS; |
2390 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; | 2395 | connector->connector_type = DRM_MODE_CONNECTOR_LVDS; |
2391 | sdvo_priv->is_lvds = true; | 2396 | sdvo_priv->is_lvds = true; |
2392 | intel_output->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | | 2397 | intel_encoder->clone_mask = (1 << INTEL_ANALOG_CLONE_BIT) | |
2393 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 2398 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); |
2394 | } else { | 2399 | } else { |
2395 | 2400 | ||
@@ -2402,7 +2407,7 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2402 | bytes[0], bytes[1]); | 2407 | bytes[0], bytes[1]); |
2403 | ret = false; | 2408 | ret = false; |
2404 | } | 2409 | } |
2405 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 2410 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
2406 | 2411 | ||
2407 | if (ret && registered) | 2412 | if (ret && registered) |
2408 | ret = drm_sysfs_connector_add(connector) == 0 ? true : false; | 2413 | ret = drm_sysfs_connector_add(connector) == 0 ? true : false; |
@@ -2414,18 +2419,18 @@ intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags) | |||
2414 | 2419 | ||
2415 | static void intel_sdvo_tv_create_property(struct drm_connector *connector) | 2420 | static void intel_sdvo_tv_create_property(struct drm_connector *connector) |
2416 | { | 2421 | { |
2417 | struct intel_output *intel_output = to_intel_output(connector); | 2422 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
2418 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 2423 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
2419 | struct intel_sdvo_tv_format format; | 2424 | struct intel_sdvo_tv_format format; |
2420 | uint32_t format_map, i; | 2425 | uint32_t format_map, i; |
2421 | uint8_t status; | 2426 | uint8_t status; |
2422 | 2427 | ||
2423 | intel_sdvo_set_target_output(intel_output, | 2428 | intel_sdvo_set_target_output(intel_encoder, |
2424 | sdvo_priv->controlled_output); | 2429 | sdvo_priv->controlled_output); |
2425 | 2430 | ||
2426 | intel_sdvo_write_cmd(intel_output, | 2431 | intel_sdvo_write_cmd(intel_encoder, |
2427 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0); | 2432 | SDVO_CMD_GET_SUPPORTED_TV_FORMATS, NULL, 0); |
2428 | status = intel_sdvo_read_response(intel_output, | 2433 | status = intel_sdvo_read_response(intel_encoder, |
2429 | &format, sizeof(format)); | 2434 | &format, sizeof(format)); |
2430 | if (status != SDVO_CMD_STATUS_SUCCESS) | 2435 | if (status != SDVO_CMD_STATUS_SUCCESS) |
2431 | return; | 2436 | return; |
@@ -2463,16 +2468,16 @@ static void intel_sdvo_tv_create_property(struct drm_connector *connector) | |||
2463 | 2468 | ||
2464 | static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | 2469 | static void intel_sdvo_create_enhance_property(struct drm_connector *connector) |
2465 | { | 2470 | { |
2466 | struct intel_output *intel_output = to_intel_output(connector); | 2471 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
2467 | struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; | 2472 | struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv; |
2468 | struct intel_sdvo_enhancements_reply sdvo_data; | 2473 | struct intel_sdvo_enhancements_reply sdvo_data; |
2469 | struct drm_device *dev = connector->dev; | 2474 | struct drm_device *dev = connector->dev; |
2470 | uint8_t status; | 2475 | uint8_t status; |
2471 | uint16_t response, data_value[2]; | 2476 | uint16_t response, data_value[2]; |
2472 | 2477 | ||
2473 | intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, | 2478 | intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS, |
2474 | NULL, 0); | 2479 | NULL, 0); |
2475 | status = intel_sdvo_read_response(intel_output, &sdvo_data, | 2480 | status = intel_sdvo_read_response(intel_encoder, &sdvo_data, |
2476 | sizeof(sdvo_data)); | 2481 | sizeof(sdvo_data)); |
2477 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2482 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2478 | DRM_DEBUG_KMS(" incorrect response is returned\n"); | 2483 | DRM_DEBUG_KMS(" incorrect response is returned\n"); |
@@ -2488,18 +2493,18 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2488 | * property | 2493 | * property |
2489 | */ | 2494 | */ |
2490 | if (sdvo_data.overscan_h) { | 2495 | if (sdvo_data.overscan_h) { |
2491 | intel_sdvo_write_cmd(intel_output, | 2496 | intel_sdvo_write_cmd(intel_encoder, |
2492 | SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0); | 2497 | SDVO_CMD_GET_MAX_OVERSCAN_H, NULL, 0); |
2493 | status = intel_sdvo_read_response(intel_output, | 2498 | status = intel_sdvo_read_response(intel_encoder, |
2494 | &data_value, 4); | 2499 | &data_value, 4); |
2495 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2500 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2496 | DRM_DEBUG_KMS("Incorrect SDVO max " | 2501 | DRM_DEBUG_KMS("Incorrect SDVO max " |
2497 | "h_overscan\n"); | 2502 | "h_overscan\n"); |
2498 | return; | 2503 | return; |
2499 | } | 2504 | } |
2500 | intel_sdvo_write_cmd(intel_output, | 2505 | intel_sdvo_write_cmd(intel_encoder, |
2501 | SDVO_CMD_GET_OVERSCAN_H, NULL, 0); | 2506 | SDVO_CMD_GET_OVERSCAN_H, NULL, 0); |
2502 | status = intel_sdvo_read_response(intel_output, | 2507 | status = intel_sdvo_read_response(intel_encoder, |
2503 | &response, 2); | 2508 | &response, 2); |
2504 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2509 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2505 | DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n"); | 2510 | DRM_DEBUG_KMS("Incorrect SDVO h_overscan\n"); |
@@ -2529,18 +2534,18 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2529 | data_value[0], data_value[1], response); | 2534 | data_value[0], data_value[1], response); |
2530 | } | 2535 | } |
2531 | if (sdvo_data.overscan_v) { | 2536 | if (sdvo_data.overscan_v) { |
2532 | intel_sdvo_write_cmd(intel_output, | 2537 | intel_sdvo_write_cmd(intel_encoder, |
2533 | SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0); | 2538 | SDVO_CMD_GET_MAX_OVERSCAN_V, NULL, 0); |
2534 | status = intel_sdvo_read_response(intel_output, | 2539 | status = intel_sdvo_read_response(intel_encoder, |
2535 | &data_value, 4); | 2540 | &data_value, 4); |
2536 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2541 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2537 | DRM_DEBUG_KMS("Incorrect SDVO max " | 2542 | DRM_DEBUG_KMS("Incorrect SDVO max " |
2538 | "v_overscan\n"); | 2543 | "v_overscan\n"); |
2539 | return; | 2544 | return; |
2540 | } | 2545 | } |
2541 | intel_sdvo_write_cmd(intel_output, | 2546 | intel_sdvo_write_cmd(intel_encoder, |
2542 | SDVO_CMD_GET_OVERSCAN_V, NULL, 0); | 2547 | SDVO_CMD_GET_OVERSCAN_V, NULL, 0); |
2543 | status = intel_sdvo_read_response(intel_output, | 2548 | status = intel_sdvo_read_response(intel_encoder, |
2544 | &response, 2); | 2549 | &response, 2); |
2545 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2550 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2546 | DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n"); | 2551 | DRM_DEBUG_KMS("Incorrect SDVO v_overscan\n"); |
@@ -2570,17 +2575,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2570 | data_value[0], data_value[1], response); | 2575 | data_value[0], data_value[1], response); |
2571 | } | 2576 | } |
2572 | if (sdvo_data.position_h) { | 2577 | if (sdvo_data.position_h) { |
2573 | intel_sdvo_write_cmd(intel_output, | 2578 | intel_sdvo_write_cmd(intel_encoder, |
2574 | SDVO_CMD_GET_MAX_POSITION_H, NULL, 0); | 2579 | SDVO_CMD_GET_MAX_POSITION_H, NULL, 0); |
2575 | status = intel_sdvo_read_response(intel_output, | 2580 | status = intel_sdvo_read_response(intel_encoder, |
2576 | &data_value, 4); | 2581 | &data_value, 4); |
2577 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2582 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2578 | DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n"); | 2583 | DRM_DEBUG_KMS("Incorrect SDVO Max h_pos\n"); |
2579 | return; | 2584 | return; |
2580 | } | 2585 | } |
2581 | intel_sdvo_write_cmd(intel_output, | 2586 | intel_sdvo_write_cmd(intel_encoder, |
2582 | SDVO_CMD_GET_POSITION_H, NULL, 0); | 2587 | SDVO_CMD_GET_POSITION_H, NULL, 0); |
2583 | status = intel_sdvo_read_response(intel_output, | 2588 | status = intel_sdvo_read_response(intel_encoder, |
2584 | &response, 2); | 2589 | &response, 2); |
2585 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2590 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2586 | DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n"); | 2591 | DRM_DEBUG_KMS("Incorrect SDVO get h_postion\n"); |
@@ -2601,17 +2606,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2601 | data_value[0], data_value[1], response); | 2606 | data_value[0], data_value[1], response); |
2602 | } | 2607 | } |
2603 | if (sdvo_data.position_v) { | 2608 | if (sdvo_data.position_v) { |
2604 | intel_sdvo_write_cmd(intel_output, | 2609 | intel_sdvo_write_cmd(intel_encoder, |
2605 | SDVO_CMD_GET_MAX_POSITION_V, NULL, 0); | 2610 | SDVO_CMD_GET_MAX_POSITION_V, NULL, 0); |
2606 | status = intel_sdvo_read_response(intel_output, | 2611 | status = intel_sdvo_read_response(intel_encoder, |
2607 | &data_value, 4); | 2612 | &data_value, 4); |
2608 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2613 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2609 | DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n"); | 2614 | DRM_DEBUG_KMS("Incorrect SDVO Max v_pos\n"); |
2610 | return; | 2615 | return; |
2611 | } | 2616 | } |
2612 | intel_sdvo_write_cmd(intel_output, | 2617 | intel_sdvo_write_cmd(intel_encoder, |
2613 | SDVO_CMD_GET_POSITION_V, NULL, 0); | 2618 | SDVO_CMD_GET_POSITION_V, NULL, 0); |
2614 | status = intel_sdvo_read_response(intel_output, | 2619 | status = intel_sdvo_read_response(intel_encoder, |
2615 | &response, 2); | 2620 | &response, 2); |
2616 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2621 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2617 | DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n"); | 2622 | DRM_DEBUG_KMS("Incorrect SDVO get v_postion\n"); |
@@ -2634,17 +2639,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2634 | } | 2639 | } |
2635 | if (sdvo_priv->is_tv) { | 2640 | if (sdvo_priv->is_tv) { |
2636 | if (sdvo_data.saturation) { | 2641 | if (sdvo_data.saturation) { |
2637 | intel_sdvo_write_cmd(intel_output, | 2642 | intel_sdvo_write_cmd(intel_encoder, |
2638 | SDVO_CMD_GET_MAX_SATURATION, NULL, 0); | 2643 | SDVO_CMD_GET_MAX_SATURATION, NULL, 0); |
2639 | status = intel_sdvo_read_response(intel_output, | 2644 | status = intel_sdvo_read_response(intel_encoder, |
2640 | &data_value, 4); | 2645 | &data_value, 4); |
2641 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2646 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2642 | DRM_DEBUG_KMS("Incorrect SDVO Max sat\n"); | 2647 | DRM_DEBUG_KMS("Incorrect SDVO Max sat\n"); |
2643 | return; | 2648 | return; |
2644 | } | 2649 | } |
2645 | intel_sdvo_write_cmd(intel_output, | 2650 | intel_sdvo_write_cmd(intel_encoder, |
2646 | SDVO_CMD_GET_SATURATION, NULL, 0); | 2651 | SDVO_CMD_GET_SATURATION, NULL, 0); |
2647 | status = intel_sdvo_read_response(intel_output, | 2652 | status = intel_sdvo_read_response(intel_encoder, |
2648 | &response, 2); | 2653 | &response, 2); |
2649 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2654 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2650 | DRM_DEBUG_KMS("Incorrect SDVO get sat\n"); | 2655 | DRM_DEBUG_KMS("Incorrect SDVO get sat\n"); |
@@ -2666,17 +2671,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2666 | data_value[0], data_value[1], response); | 2671 | data_value[0], data_value[1], response); |
2667 | } | 2672 | } |
2668 | if (sdvo_data.contrast) { | 2673 | if (sdvo_data.contrast) { |
2669 | intel_sdvo_write_cmd(intel_output, | 2674 | intel_sdvo_write_cmd(intel_encoder, |
2670 | SDVO_CMD_GET_MAX_CONTRAST, NULL, 0); | 2675 | SDVO_CMD_GET_MAX_CONTRAST, NULL, 0); |
2671 | status = intel_sdvo_read_response(intel_output, | 2676 | status = intel_sdvo_read_response(intel_encoder, |
2672 | &data_value, 4); | 2677 | &data_value, 4); |
2673 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2678 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2674 | DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n"); | 2679 | DRM_DEBUG_KMS("Incorrect SDVO Max contrast\n"); |
2675 | return; | 2680 | return; |
2676 | } | 2681 | } |
2677 | intel_sdvo_write_cmd(intel_output, | 2682 | intel_sdvo_write_cmd(intel_encoder, |
2678 | SDVO_CMD_GET_CONTRAST, NULL, 0); | 2683 | SDVO_CMD_GET_CONTRAST, NULL, 0); |
2679 | status = intel_sdvo_read_response(intel_output, | 2684 | status = intel_sdvo_read_response(intel_encoder, |
2680 | &response, 2); | 2685 | &response, 2); |
2681 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2686 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2682 | DRM_DEBUG_KMS("Incorrect SDVO get contrast\n"); | 2687 | DRM_DEBUG_KMS("Incorrect SDVO get contrast\n"); |
@@ -2697,17 +2702,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2697 | data_value[0], data_value[1], response); | 2702 | data_value[0], data_value[1], response); |
2698 | } | 2703 | } |
2699 | if (sdvo_data.hue) { | 2704 | if (sdvo_data.hue) { |
2700 | intel_sdvo_write_cmd(intel_output, | 2705 | intel_sdvo_write_cmd(intel_encoder, |
2701 | SDVO_CMD_GET_MAX_HUE, NULL, 0); | 2706 | SDVO_CMD_GET_MAX_HUE, NULL, 0); |
2702 | status = intel_sdvo_read_response(intel_output, | 2707 | status = intel_sdvo_read_response(intel_encoder, |
2703 | &data_value, 4); | 2708 | &data_value, 4); |
2704 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2709 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2705 | DRM_DEBUG_KMS("Incorrect SDVO Max hue\n"); | 2710 | DRM_DEBUG_KMS("Incorrect SDVO Max hue\n"); |
2706 | return; | 2711 | return; |
2707 | } | 2712 | } |
2708 | intel_sdvo_write_cmd(intel_output, | 2713 | intel_sdvo_write_cmd(intel_encoder, |
2709 | SDVO_CMD_GET_HUE, NULL, 0); | 2714 | SDVO_CMD_GET_HUE, NULL, 0); |
2710 | status = intel_sdvo_read_response(intel_output, | 2715 | status = intel_sdvo_read_response(intel_encoder, |
2711 | &response, 2); | 2716 | &response, 2); |
2712 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2717 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2713 | DRM_DEBUG_KMS("Incorrect SDVO get hue\n"); | 2718 | DRM_DEBUG_KMS("Incorrect SDVO get hue\n"); |
@@ -2730,17 +2735,17 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2730 | } | 2735 | } |
2731 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { | 2736 | if (sdvo_priv->is_tv || sdvo_priv->is_lvds) { |
2732 | if (sdvo_data.brightness) { | 2737 | if (sdvo_data.brightness) { |
2733 | intel_sdvo_write_cmd(intel_output, | 2738 | intel_sdvo_write_cmd(intel_encoder, |
2734 | SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0); | 2739 | SDVO_CMD_GET_MAX_BRIGHTNESS, NULL, 0); |
2735 | status = intel_sdvo_read_response(intel_output, | 2740 | status = intel_sdvo_read_response(intel_encoder, |
2736 | &data_value, 4); | 2741 | &data_value, 4); |
2737 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2742 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2738 | DRM_DEBUG_KMS("Incorrect SDVO Max bright\n"); | 2743 | DRM_DEBUG_KMS("Incorrect SDVO Max bright\n"); |
2739 | return; | 2744 | return; |
2740 | } | 2745 | } |
2741 | intel_sdvo_write_cmd(intel_output, | 2746 | intel_sdvo_write_cmd(intel_encoder, |
2742 | SDVO_CMD_GET_BRIGHTNESS, NULL, 0); | 2747 | SDVO_CMD_GET_BRIGHTNESS, NULL, 0); |
2743 | status = intel_sdvo_read_response(intel_output, | 2748 | status = intel_sdvo_read_response(intel_encoder, |
2744 | &response, 2); | 2749 | &response, 2); |
2745 | if (status != SDVO_CMD_STATUS_SUCCESS) { | 2750 | if (status != SDVO_CMD_STATUS_SUCCESS) { |
2746 | DRM_DEBUG_KMS("Incorrect SDVO get brigh\n"); | 2751 | DRM_DEBUG_KMS("Incorrect SDVO get brigh\n"); |
@@ -2765,81 +2770,81 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector) | |||
2765 | return; | 2770 | return; |
2766 | } | 2771 | } |
2767 | 2772 | ||
2768 | bool intel_sdvo_init(struct drm_device *dev, int output_device) | 2773 | bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg) |
2769 | { | 2774 | { |
2770 | struct drm_i915_private *dev_priv = dev->dev_private; | 2775 | struct drm_i915_private *dev_priv = dev->dev_private; |
2771 | struct drm_connector *connector; | 2776 | struct drm_connector *connector; |
2772 | struct intel_output *intel_output; | 2777 | struct intel_encoder *intel_encoder; |
2773 | struct intel_sdvo_priv *sdvo_priv; | 2778 | struct intel_sdvo_priv *sdvo_priv; |
2774 | 2779 | ||
2775 | u8 ch[0x40]; | 2780 | u8 ch[0x40]; |
2776 | int i; | 2781 | int i; |
2777 | 2782 | ||
2778 | intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); | 2783 | intel_encoder = kcalloc(sizeof(struct intel_encoder)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); |
2779 | if (!intel_output) { | 2784 | if (!intel_encoder) { |
2780 | return false; | 2785 | return false; |
2781 | } | 2786 | } |
2782 | 2787 | ||
2783 | sdvo_priv = (struct intel_sdvo_priv *)(intel_output + 1); | 2788 | sdvo_priv = (struct intel_sdvo_priv *)(intel_encoder + 1); |
2784 | sdvo_priv->output_device = output_device; | 2789 | sdvo_priv->sdvo_reg = sdvo_reg; |
2785 | 2790 | ||
2786 | intel_output->dev_priv = sdvo_priv; | 2791 | intel_encoder->dev_priv = sdvo_priv; |
2787 | intel_output->type = INTEL_OUTPUT_SDVO; | 2792 | intel_encoder->type = INTEL_OUTPUT_SDVO; |
2788 | 2793 | ||
2789 | /* setup the DDC bus. */ | 2794 | /* setup the DDC bus. */ |
2790 | if (output_device == SDVOB) | 2795 | if (sdvo_reg == SDVOB) |
2791 | intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); | 2796 | intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); |
2792 | else | 2797 | else |
2793 | intel_output->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); | 2798 | intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); |
2794 | 2799 | ||
2795 | if (!intel_output->i2c_bus) | 2800 | if (!intel_encoder->i2c_bus) |
2796 | goto err_inteloutput; | 2801 | goto err_inteloutput; |
2797 | 2802 | ||
2798 | sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, output_device); | 2803 | sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg); |
2799 | 2804 | ||
2800 | /* Save the bit-banging i2c functionality for use by the DDC wrapper */ | 2805 | /* Save the bit-banging i2c functionality for use by the DDC wrapper */ |
2801 | intel_sdvo_i2c_bit_algo.functionality = intel_output->i2c_bus->algo->functionality; | 2806 | intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality; |
2802 | 2807 | ||
2803 | /* Read the regs to test if we can talk to the device */ | 2808 | /* Read the regs to test if we can talk to the device */ |
2804 | for (i = 0; i < 0x40; i++) { | 2809 | for (i = 0; i < 0x40; i++) { |
2805 | if (!intel_sdvo_read_byte(intel_output, i, &ch[i])) { | 2810 | if (!intel_sdvo_read_byte(intel_encoder, i, &ch[i])) { |
2806 | DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", | 2811 | DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", |
2807 | output_device == SDVOB ? 'B' : 'C'); | 2812 | sdvo_reg == SDVOB ? 'B' : 'C'); |
2808 | goto err_i2c; | 2813 | goto err_i2c; |
2809 | } | 2814 | } |
2810 | } | 2815 | } |
2811 | 2816 | ||
2812 | /* setup the DDC bus. */ | 2817 | /* setup the DDC bus. */ |
2813 | if (output_device == SDVOB) { | 2818 | if (sdvo_reg == SDVOB) { |
2814 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); | 2819 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); |
2815 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, | 2820 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, |
2816 | "SDVOB/VGA DDC BUS"); | 2821 | "SDVOB/VGA DDC BUS"); |
2817 | dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; | 2822 | dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS; |
2818 | } else { | 2823 | } else { |
2819 | intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); | 2824 | intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS"); |
2820 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, | 2825 | sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, |
2821 | "SDVOC/VGA DDC BUS"); | 2826 | "SDVOC/VGA DDC BUS"); |
2822 | dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; | 2827 | dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS; |
2823 | } | 2828 | } |
2824 | 2829 | ||
2825 | if (intel_output->ddc_bus == NULL) | 2830 | if (intel_encoder->ddc_bus == NULL) |
2826 | goto err_i2c; | 2831 | goto err_i2c; |
2827 | 2832 | ||
2828 | /* Wrap with our custom algo which switches to DDC mode */ | 2833 | /* Wrap with our custom algo which switches to DDC mode */ |
2829 | intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; | 2834 | intel_encoder->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; |
2830 | 2835 | ||
2831 | /* In default case sdvo lvds is false */ | 2836 | /* In default case sdvo lvds is false */ |
2832 | intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps); | 2837 | intel_sdvo_get_capabilities(intel_encoder, &sdvo_priv->caps); |
2833 | 2838 | ||
2834 | if (intel_sdvo_output_setup(intel_output, | 2839 | if (intel_sdvo_output_setup(intel_encoder, |
2835 | sdvo_priv->caps.output_flags) != true) { | 2840 | sdvo_priv->caps.output_flags) != true) { |
2836 | DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", | 2841 | DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", |
2837 | output_device == SDVOB ? 'B' : 'C'); | 2842 | sdvo_reg == SDVOB ? 'B' : 'C'); |
2838 | goto err_i2c; | 2843 | goto err_i2c; |
2839 | } | 2844 | } |
2840 | 2845 | ||
2841 | 2846 | ||
2842 | connector = &intel_output->base; | 2847 | connector = &intel_encoder->base; |
2843 | drm_connector_init(dev, connector, &intel_sdvo_connector_funcs, | 2848 | drm_connector_init(dev, connector, &intel_sdvo_connector_funcs, |
2844 | connector->connector_type); | 2849 | connector->connector_type); |
2845 | 2850 | ||
@@ -2848,12 +2853,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) | |||
2848 | connector->doublescan_allowed = 0; | 2853 | connector->doublescan_allowed = 0; |
2849 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; | 2854 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
2850 | 2855 | ||
2851 | drm_encoder_init(dev, &intel_output->enc, | 2856 | drm_encoder_init(dev, &intel_encoder->enc, |
2852 | &intel_sdvo_enc_funcs, intel_output->enc.encoder_type); | 2857 | &intel_sdvo_enc_funcs, intel_encoder->enc.encoder_type); |
2853 | 2858 | ||
2854 | drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs); | 2859 | drm_encoder_helper_add(&intel_encoder->enc, &intel_sdvo_helper_funcs); |
2855 | 2860 | ||
2856 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); | 2861 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
2857 | if (sdvo_priv->is_tv) | 2862 | if (sdvo_priv->is_tv) |
2858 | intel_sdvo_tv_create_property(connector); | 2863 | intel_sdvo_tv_create_property(connector); |
2859 | 2864 | ||
@@ -2865,9 +2870,9 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) | |||
2865 | intel_sdvo_select_ddc_bus(sdvo_priv); | 2870 | intel_sdvo_select_ddc_bus(sdvo_priv); |
2866 | 2871 | ||
2867 | /* Set the input timing to the screen. Assume always input 0. */ | 2872 | /* Set the input timing to the screen. Assume always input 0. */ |
2868 | intel_sdvo_set_target_input(intel_output, true, false); | 2873 | intel_sdvo_set_target_input(intel_encoder, true, false); |
2869 | 2874 | ||
2870 | intel_sdvo_get_input_pixel_clock_range(intel_output, | 2875 | intel_sdvo_get_input_pixel_clock_range(intel_encoder, |
2871 | &sdvo_priv->pixel_clock_min, | 2876 | &sdvo_priv->pixel_clock_min, |
2872 | &sdvo_priv->pixel_clock_max); | 2877 | &sdvo_priv->pixel_clock_max); |
2873 | 2878 | ||
@@ -2894,12 +2899,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device) | |||
2894 | err_i2c: | 2899 | err_i2c: |
2895 | if (sdvo_priv->analog_ddc_bus != NULL) | 2900 | if (sdvo_priv->analog_ddc_bus != NULL) |
2896 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); | 2901 | intel_i2c_destroy(sdvo_priv->analog_ddc_bus); |
2897 | if (intel_output->ddc_bus != NULL) | 2902 | if (intel_encoder->ddc_bus != NULL) |
2898 | intel_i2c_destroy(intel_output->ddc_bus); | 2903 | intel_i2c_destroy(intel_encoder->ddc_bus); |
2899 | if (intel_output->i2c_bus != NULL) | 2904 | if (intel_encoder->i2c_bus != NULL) |
2900 | intel_i2c_destroy(intel_output->i2c_bus); | 2905 | intel_i2c_destroy(intel_encoder->i2c_bus); |
2901 | err_inteloutput: | 2906 | err_inteloutput: |
2902 | kfree(intel_output); | 2907 | kfree(intel_encoder); |
2903 | 2908 | ||
2904 | return false; | 2909 | return false; |
2905 | } | 2910 | } |
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 552ec110b741..d7d39b2327df 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c | |||
@@ -921,8 +921,8 @@ intel_tv_save(struct drm_connector *connector) | |||
921 | { | 921 | { |
922 | struct drm_device *dev = connector->dev; | 922 | struct drm_device *dev = connector->dev; |
923 | struct drm_i915_private *dev_priv = dev->dev_private; | 923 | struct drm_i915_private *dev_priv = dev->dev_private; |
924 | struct intel_output *intel_output = to_intel_output(connector); | 924 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
925 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 925 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
926 | int i; | 926 | int i; |
927 | 927 | ||
928 | tv_priv->save_TV_H_CTL_1 = I915_READ(TV_H_CTL_1); | 928 | tv_priv->save_TV_H_CTL_1 = I915_READ(TV_H_CTL_1); |
@@ -971,8 +971,8 @@ intel_tv_restore(struct drm_connector *connector) | |||
971 | { | 971 | { |
972 | struct drm_device *dev = connector->dev; | 972 | struct drm_device *dev = connector->dev; |
973 | struct drm_i915_private *dev_priv = dev->dev_private; | 973 | struct drm_i915_private *dev_priv = dev->dev_private; |
974 | struct intel_output *intel_output = to_intel_output(connector); | 974 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
975 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 975 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
976 | struct drm_crtc *crtc = connector->encoder->crtc; | 976 | struct drm_crtc *crtc = connector->encoder->crtc; |
977 | struct intel_crtc *intel_crtc; | 977 | struct intel_crtc *intel_crtc; |
978 | int i; | 978 | int i; |
@@ -1068,9 +1068,9 @@ intel_tv_mode_lookup (char *tv_format) | |||
1068 | } | 1068 | } |
1069 | 1069 | ||
1070 | static const struct tv_mode * | 1070 | static const struct tv_mode * |
1071 | intel_tv_mode_find (struct intel_output *intel_output) | 1071 | intel_tv_mode_find (struct intel_encoder *intel_encoder) |
1072 | { | 1072 | { |
1073 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1073 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1074 | 1074 | ||
1075 | return intel_tv_mode_lookup(tv_priv->tv_format); | 1075 | return intel_tv_mode_lookup(tv_priv->tv_format); |
1076 | } | 1076 | } |
@@ -1078,8 +1078,8 @@ intel_tv_mode_find (struct intel_output *intel_output) | |||
1078 | static enum drm_mode_status | 1078 | static enum drm_mode_status |
1079 | intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) | 1079 | intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) |
1080 | { | 1080 | { |
1081 | struct intel_output *intel_output = to_intel_output(connector); | 1081 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1082 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1082 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1083 | 1083 | ||
1084 | /* Ensure TV refresh is close to desired refresh */ | 1084 | /* Ensure TV refresh is close to desired refresh */ |
1085 | if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) | 1085 | if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000) |
@@ -1095,8 +1095,8 @@ intel_tv_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1095 | { | 1095 | { |
1096 | struct drm_device *dev = encoder->dev; | 1096 | struct drm_device *dev = encoder->dev; |
1097 | struct drm_mode_config *drm_config = &dev->mode_config; | 1097 | struct drm_mode_config *drm_config = &dev->mode_config; |
1098 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 1098 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1099 | const struct tv_mode *tv_mode = intel_tv_mode_find (intel_output); | 1099 | const struct tv_mode *tv_mode = intel_tv_mode_find (intel_encoder); |
1100 | struct drm_encoder *other_encoder; | 1100 | struct drm_encoder *other_encoder; |
1101 | 1101 | ||
1102 | if (!tv_mode) | 1102 | if (!tv_mode) |
@@ -1121,9 +1121,9 @@ intel_tv_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
1121 | struct drm_i915_private *dev_priv = dev->dev_private; | 1121 | struct drm_i915_private *dev_priv = dev->dev_private; |
1122 | struct drm_crtc *crtc = encoder->crtc; | 1122 | struct drm_crtc *crtc = encoder->crtc; |
1123 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 1123 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
1124 | struct intel_output *intel_output = enc_to_intel_output(encoder); | 1124 | struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder); |
1125 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1125 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1126 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1126 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1127 | u32 tv_ctl; | 1127 | u32 tv_ctl; |
1128 | u32 hctl1, hctl2, hctl3; | 1128 | u32 hctl1, hctl2, hctl3; |
1129 | u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7; | 1129 | u32 vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7; |
@@ -1360,9 +1360,9 @@ static const struct drm_display_mode reported_modes[] = { | |||
1360 | * \return false if TV is disconnected. | 1360 | * \return false if TV is disconnected. |
1361 | */ | 1361 | */ |
1362 | static int | 1362 | static int |
1363 | intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output) | 1363 | intel_tv_detect_type (struct drm_crtc *crtc, struct intel_encoder *intel_encoder) |
1364 | { | 1364 | { |
1365 | struct drm_encoder *encoder = &intel_output->enc; | 1365 | struct drm_encoder *encoder = &intel_encoder->enc; |
1366 | struct drm_device *dev = encoder->dev; | 1366 | struct drm_device *dev = encoder->dev; |
1367 | struct drm_i915_private *dev_priv = dev->dev_private; | 1367 | struct drm_i915_private *dev_priv = dev->dev_private; |
1368 | unsigned long irqflags; | 1368 | unsigned long irqflags; |
@@ -1441,9 +1441,9 @@ intel_tv_detect_type (struct drm_crtc *crtc, struct intel_output *intel_output) | |||
1441 | */ | 1441 | */ |
1442 | static void intel_tv_find_better_format(struct drm_connector *connector) | 1442 | static void intel_tv_find_better_format(struct drm_connector *connector) |
1443 | { | 1443 | { |
1444 | struct intel_output *intel_output = to_intel_output(connector); | 1444 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1445 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1445 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1446 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1446 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1447 | int i; | 1447 | int i; |
1448 | 1448 | ||
1449 | if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) == | 1449 | if ((tv_priv->type == DRM_MODE_CONNECTOR_Component) == |
@@ -1475,9 +1475,9 @@ intel_tv_detect(struct drm_connector *connector) | |||
1475 | { | 1475 | { |
1476 | struct drm_crtc *crtc; | 1476 | struct drm_crtc *crtc; |
1477 | struct drm_display_mode mode; | 1477 | struct drm_display_mode mode; |
1478 | struct intel_output *intel_output = to_intel_output(connector); | 1478 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1479 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1479 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1480 | struct drm_encoder *encoder = &intel_output->enc; | 1480 | struct drm_encoder *encoder = &intel_encoder->enc; |
1481 | int dpms_mode; | 1481 | int dpms_mode; |
1482 | int type = tv_priv->type; | 1482 | int type = tv_priv->type; |
1483 | 1483 | ||
@@ -1485,12 +1485,12 @@ intel_tv_detect(struct drm_connector *connector) | |||
1485 | drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); | 1485 | drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); |
1486 | 1486 | ||
1487 | if (encoder->crtc && encoder->crtc->enabled) { | 1487 | if (encoder->crtc && encoder->crtc->enabled) { |
1488 | type = intel_tv_detect_type(encoder->crtc, intel_output); | 1488 | type = intel_tv_detect_type(encoder->crtc, intel_encoder); |
1489 | } else { | 1489 | } else { |
1490 | crtc = intel_get_load_detect_pipe(intel_output, &mode, &dpms_mode); | 1490 | crtc = intel_get_load_detect_pipe(intel_encoder, &mode, &dpms_mode); |
1491 | if (crtc) { | 1491 | if (crtc) { |
1492 | type = intel_tv_detect_type(crtc, intel_output); | 1492 | type = intel_tv_detect_type(crtc, intel_encoder); |
1493 | intel_release_load_detect_pipe(intel_output, dpms_mode); | 1493 | intel_release_load_detect_pipe(intel_encoder, dpms_mode); |
1494 | } else | 1494 | } else |
1495 | type = -1; | 1495 | type = -1; |
1496 | } | 1496 | } |
@@ -1525,8 +1525,8 @@ static void | |||
1525 | intel_tv_chose_preferred_modes(struct drm_connector *connector, | 1525 | intel_tv_chose_preferred_modes(struct drm_connector *connector, |
1526 | struct drm_display_mode *mode_ptr) | 1526 | struct drm_display_mode *mode_ptr) |
1527 | { | 1527 | { |
1528 | struct intel_output *intel_output = to_intel_output(connector); | 1528 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1529 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1529 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1530 | 1530 | ||
1531 | if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480) | 1531 | if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480) |
1532 | mode_ptr->type |= DRM_MODE_TYPE_PREFERRED; | 1532 | mode_ptr->type |= DRM_MODE_TYPE_PREFERRED; |
@@ -1550,8 +1550,8 @@ static int | |||
1550 | intel_tv_get_modes(struct drm_connector *connector) | 1550 | intel_tv_get_modes(struct drm_connector *connector) |
1551 | { | 1551 | { |
1552 | struct drm_display_mode *mode_ptr; | 1552 | struct drm_display_mode *mode_ptr; |
1553 | struct intel_output *intel_output = to_intel_output(connector); | 1553 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1554 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output); | 1554 | const struct tv_mode *tv_mode = intel_tv_mode_find(intel_encoder); |
1555 | int j, count = 0; | 1555 | int j, count = 0; |
1556 | u64 tmp; | 1556 | u64 tmp; |
1557 | 1557 | ||
@@ -1604,11 +1604,11 @@ intel_tv_get_modes(struct drm_connector *connector) | |||
1604 | static void | 1604 | static void |
1605 | intel_tv_destroy (struct drm_connector *connector) | 1605 | intel_tv_destroy (struct drm_connector *connector) |
1606 | { | 1606 | { |
1607 | struct intel_output *intel_output = to_intel_output(connector); | 1607 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1608 | 1608 | ||
1609 | drm_sysfs_connector_remove(connector); | 1609 | drm_sysfs_connector_remove(connector); |
1610 | drm_connector_cleanup(connector); | 1610 | drm_connector_cleanup(connector); |
1611 | kfree(intel_output); | 1611 | kfree(intel_encoder); |
1612 | } | 1612 | } |
1613 | 1613 | ||
1614 | 1614 | ||
@@ -1617,9 +1617,9 @@ intel_tv_set_property(struct drm_connector *connector, struct drm_property *prop | |||
1617 | uint64_t val) | 1617 | uint64_t val) |
1618 | { | 1618 | { |
1619 | struct drm_device *dev = connector->dev; | 1619 | struct drm_device *dev = connector->dev; |
1620 | struct intel_output *intel_output = to_intel_output(connector); | 1620 | struct intel_encoder *intel_encoder = to_intel_encoder(connector); |
1621 | struct intel_tv_priv *tv_priv = intel_output->dev_priv; | 1621 | struct intel_tv_priv *tv_priv = intel_encoder->dev_priv; |
1622 | struct drm_encoder *encoder = &intel_output->enc; | 1622 | struct drm_encoder *encoder = &intel_encoder->enc; |
1623 | struct drm_crtc *crtc = encoder->crtc; | 1623 | struct drm_crtc *crtc = encoder->crtc; |
1624 | int ret = 0; | 1624 | int ret = 0; |
1625 | bool changed = false; | 1625 | bool changed = false; |
@@ -1740,7 +1740,7 @@ intel_tv_init(struct drm_device *dev) | |||
1740 | { | 1740 | { |
1741 | struct drm_i915_private *dev_priv = dev->dev_private; | 1741 | struct drm_i915_private *dev_priv = dev->dev_private; |
1742 | struct drm_connector *connector; | 1742 | struct drm_connector *connector; |
1743 | struct intel_output *intel_output; | 1743 | struct intel_encoder *intel_encoder; |
1744 | struct intel_tv_priv *tv_priv; | 1744 | struct intel_tv_priv *tv_priv; |
1745 | u32 tv_dac_on, tv_dac_off, save_tv_dac; | 1745 | u32 tv_dac_on, tv_dac_off, save_tv_dac; |
1746 | char **tv_format_names; | 1746 | char **tv_format_names; |
@@ -1780,28 +1780,28 @@ intel_tv_init(struct drm_device *dev) | |||
1780 | (tv_dac_off & TVDAC_STATE_CHG_EN) != 0) | 1780 | (tv_dac_off & TVDAC_STATE_CHG_EN) != 0) |
1781 | return; | 1781 | return; |
1782 | 1782 | ||
1783 | intel_output = kzalloc(sizeof(struct intel_output) + | 1783 | intel_encoder = kzalloc(sizeof(struct intel_encoder) + |
1784 | sizeof(struct intel_tv_priv), GFP_KERNEL); | 1784 | sizeof(struct intel_tv_priv), GFP_KERNEL); |
1785 | if (!intel_output) { | 1785 | if (!intel_encoder) { |
1786 | return; | 1786 | return; |
1787 | } | 1787 | } |
1788 | 1788 | ||
1789 | connector = &intel_output->base; | 1789 | connector = &intel_encoder->base; |
1790 | 1790 | ||
1791 | drm_connector_init(dev, connector, &intel_tv_connector_funcs, | 1791 | drm_connector_init(dev, connector, &intel_tv_connector_funcs, |
1792 | DRM_MODE_CONNECTOR_SVIDEO); | 1792 | DRM_MODE_CONNECTOR_SVIDEO); |
1793 | 1793 | ||
1794 | drm_encoder_init(dev, &intel_output->enc, &intel_tv_enc_funcs, | 1794 | drm_encoder_init(dev, &intel_encoder->enc, &intel_tv_enc_funcs, |
1795 | DRM_MODE_ENCODER_TVDAC); | 1795 | DRM_MODE_ENCODER_TVDAC); |
1796 | 1796 | ||
1797 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); | 1797 | drm_mode_connector_attach_encoder(&intel_encoder->base, &intel_encoder->enc); |
1798 | tv_priv = (struct intel_tv_priv *)(intel_output + 1); | 1798 | tv_priv = (struct intel_tv_priv *)(intel_encoder + 1); |
1799 | intel_output->type = INTEL_OUTPUT_TVOUT; | 1799 | intel_encoder->type = INTEL_OUTPUT_TVOUT; |
1800 | intel_output->crtc_mask = (1 << 0) | (1 << 1); | 1800 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); |
1801 | intel_output->clone_mask = (1 << INTEL_TV_CLONE_BIT); | 1801 | intel_encoder->clone_mask = (1 << INTEL_TV_CLONE_BIT); |
1802 | intel_output->enc.possible_crtcs = ((1 << 0) | (1 << 1)); | 1802 | intel_encoder->enc.possible_crtcs = ((1 << 0) | (1 << 1)); |
1803 | intel_output->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT); | 1803 | intel_encoder->enc.possible_clones = (1 << INTEL_OUTPUT_TVOUT); |
1804 | intel_output->dev_priv = tv_priv; | 1804 | intel_encoder->dev_priv = tv_priv; |
1805 | tv_priv->type = DRM_MODE_CONNECTOR_Unknown; | 1805 | tv_priv->type = DRM_MODE_CONNECTOR_Unknown; |
1806 | 1806 | ||
1807 | /* BIOS margin values */ | 1807 | /* BIOS margin values */ |
@@ -1812,7 +1812,7 @@ intel_tv_init(struct drm_device *dev) | |||
1812 | 1812 | ||
1813 | tv_priv->tv_format = kstrdup(tv_modes[initial_mode].name, GFP_KERNEL); | 1813 | tv_priv->tv_format = kstrdup(tv_modes[initial_mode].name, GFP_KERNEL); |
1814 | 1814 | ||
1815 | drm_encoder_helper_add(&intel_output->enc, &intel_tv_helper_funcs); | 1815 | drm_encoder_helper_add(&intel_encoder->enc, &intel_tv_helper_funcs); |
1816 | drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs); | 1816 | drm_connector_helper_add(connector, &intel_tv_connector_helper_funcs); |
1817 | connector->interlace_allowed = false; | 1817 | connector->interlace_allowed = false; |
1818 | connector->doublescan_allowed = false; | 1818 | connector->doublescan_allowed = false; |
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile index 7f0d807a0d0d..453df3f6053f 100644 --- a/drivers/gpu/drm/nouveau/Makefile +++ b/drivers/gpu/drm/nouveau/Makefile | |||
@@ -22,7 +22,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \ | |||
22 | nv50_cursor.o nv50_display.o nv50_fbcon.o \ | 22 | nv50_cursor.o nv50_display.o nv50_fbcon.o \ |
23 | nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \ | 23 | nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \ |
24 | nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \ | 24 | nv04_crtc.o nv04_display.o nv04_cursor.o nv04_fbcon.o \ |
25 | nv17_gpio.o | 25 | nv17_gpio.o nv50_gpio.o |
26 | 26 | ||
27 | nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o | 27 | nouveau-$(CONFIG_DRM_NOUVEAU_DEBUG) += nouveau_debugfs.o |
28 | nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o | 28 | nouveau-$(CONFIG_COMPAT) += nouveau_ioc32.o |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index b5a9336a2e88..abc382a9918b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -2573,48 +2573,34 @@ init_gpio(struct nvbios *bios, uint16_t offset, struct init_exec *iexec) | |||
2573 | * each GPIO according to various values listed in each entry | 2573 | * each GPIO according to various values listed in each entry |
2574 | */ | 2574 | */ |
2575 | 2575 | ||
2576 | const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 }; | 2576 | struct drm_nouveau_private *dev_priv = bios->dev->dev_private; |
2577 | const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c }; | 2577 | const uint32_t nv50_gpio_ctl[2] = { 0xe100, 0xe28c }; |
2578 | const uint8_t *gpio_table = &bios->data[bios->dcb.gpio_table_ptr]; | ||
2579 | const uint8_t *gpio_entry; | ||
2580 | int i; | 2578 | int i; |
2581 | 2579 | ||
2582 | if (!iexec->execute) | 2580 | if (dev_priv->card_type != NV_50) { |
2583 | return 1; | 2581 | NV_ERROR(bios->dev, "INIT_GPIO on unsupported chipset\n"); |
2584 | 2582 | return -ENODEV; | |
2585 | if (bios->dcb.version != 0x40) { | ||
2586 | NV_ERROR(bios->dev, "DCB table not version 4.0\n"); | ||
2587 | return 0; | ||
2588 | } | ||
2589 | |||
2590 | if (!bios->dcb.gpio_table_ptr) { | ||
2591 | NV_WARN(bios->dev, "Invalid pointer to INIT_8E table\n"); | ||
2592 | return 0; | ||
2593 | } | 2583 | } |
2594 | 2584 | ||
2595 | gpio_entry = gpio_table + gpio_table[1]; | 2585 | if (!iexec->execute) |
2596 | for (i = 0; i < gpio_table[2]; i++, gpio_entry += gpio_table[3]) { | 2586 | return 1; |
2597 | uint32_t entry = ROM32(gpio_entry[0]), r, s, v; | ||
2598 | int line = (entry & 0x0000001f); | ||
2599 | 2587 | ||
2600 | BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, entry); | 2588 | for (i = 0; i < bios->dcb.gpio.entries; i++) { |
2589 | struct dcb_gpio_entry *gpio = &bios->dcb.gpio.entry[i]; | ||
2590 | uint32_t r, s, v; | ||
2601 | 2591 | ||
2602 | if ((entry & 0x0000ff00) == 0x0000ff00) | 2592 | BIOSLOG(bios, "0x%04X: Entry: 0x%08X\n", offset, gpio->entry); |
2603 | continue; | ||
2604 | 2593 | ||
2605 | r = nv50_gpio_reg[line >> 3]; | 2594 | nv50_gpio_set(bios->dev, gpio->tag, gpio->state_default); |
2606 | s = (line & 0x07) << 2; | ||
2607 | v = bios_rd32(bios, r) & ~(0x00000003 << s); | ||
2608 | if (entry & 0x01000000) | ||
2609 | v |= (((entry & 0x60000000) >> 29) ^ 2) << s; | ||
2610 | else | ||
2611 | v |= (((entry & 0x18000000) >> 27) ^ 2) << s; | ||
2612 | bios_wr32(bios, r, v); | ||
2613 | 2595 | ||
2614 | r = nv50_gpio_ctl[line >> 4]; | 2596 | /* The NVIDIA binary driver doesn't appear to actually do |
2615 | s = (line & 0x0f); | 2597 | * any of this, my VBIOS does however. |
2598 | */ | ||
2599 | /* Not a clue, needs de-magicing */ | ||
2600 | r = nv50_gpio_ctl[gpio->line >> 4]; | ||
2601 | s = (gpio->line & 0x0f); | ||
2616 | v = bios_rd32(bios, r) & ~(0x00010001 << s); | 2602 | v = bios_rd32(bios, r) & ~(0x00010001 << s); |
2617 | switch ((entry & 0x06000000) >> 25) { | 2603 | switch ((gpio->entry & 0x06000000) >> 25) { |
2618 | case 1: | 2604 | case 1: |
2619 | v |= (0x00000001 << s); | 2605 | v |= (0x00000001 << s); |
2620 | break; | 2606 | break; |
@@ -3198,7 +3184,6 @@ static int run_lvds_table(struct drm_device *dev, struct dcb_entry *dcbent, int | |||
3198 | struct nvbios *bios = &dev_priv->vbios; | 3184 | struct nvbios *bios = &dev_priv->vbios; |
3199 | unsigned int outputset = (dcbent->or == 4) ? 1 : 0; | 3185 | unsigned int outputset = (dcbent->or == 4) ? 1 : 0; |
3200 | uint16_t scriptptr = 0, clktable; | 3186 | uint16_t scriptptr = 0, clktable; |
3201 | uint8_t clktableptr = 0; | ||
3202 | 3187 | ||
3203 | /* | 3188 | /* |
3204 | * For now we assume version 3.0 table - g80 support will need some | 3189 | * For now we assume version 3.0 table - g80 support will need some |
@@ -3217,26 +3202,29 @@ static int run_lvds_table(struct drm_device *dev, struct dcb_entry *dcbent, int | |||
3217 | scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); | 3202 | scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]); |
3218 | break; | 3203 | break; |
3219 | case LVDS_RESET: | 3204 | case LVDS_RESET: |
3205 | clktable = bios->fp.lvdsmanufacturerpointer + 15; | ||
3206 | if (dcbent->or == 4) | ||
3207 | clktable += 8; | ||
3208 | |||
3220 | if (dcbent->lvdsconf.use_straps_for_mode) { | 3209 | if (dcbent->lvdsconf.use_straps_for_mode) { |
3221 | if (bios->fp.dual_link) | 3210 | if (bios->fp.dual_link) |
3222 | clktableptr += 2; | 3211 | clktable += 4; |
3223 | if (bios->fp.BITbit1) | 3212 | if (bios->fp.if_is_24bit) |
3224 | clktableptr++; | 3213 | clktable += 2; |
3225 | } else { | 3214 | } else { |
3226 | /* using EDID */ | 3215 | /* using EDID */ |
3227 | uint8_t fallback = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; | 3216 | int cmpval_24bit = (dcbent->or == 4) ? 4 : 1; |
3228 | int fallbackcmpval = (dcbent->or == 4) ? 4 : 1; | ||
3229 | 3217 | ||
3230 | if (bios->fp.dual_link) { | 3218 | if (bios->fp.dual_link) { |
3231 | clktableptr += 2; | 3219 | clktable += 4; |
3232 | fallbackcmpval *= 2; | 3220 | cmpval_24bit <<= 1; |
3233 | } | 3221 | } |
3234 | if (fallbackcmpval & fallback) | 3222 | |
3235 | clktableptr++; | 3223 | if (bios->fp.strapless_is_24bit & cmpval_24bit) |
3224 | clktable += 2; | ||
3236 | } | 3225 | } |
3237 | 3226 | ||
3238 | /* adding outputset * 8 may not be correct */ | 3227 | clktable = ROM16(bios->data[clktable]); |
3239 | clktable = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 15 + clktableptr * 2 + outputset * 8]); | ||
3240 | if (!clktable) { | 3228 | if (!clktable) { |
3241 | NV_ERROR(dev, "Pixel clock comparison table not found\n"); | 3229 | NV_ERROR(dev, "Pixel clock comparison table not found\n"); |
3242 | return -ENOENT; | 3230 | return -ENOENT; |
@@ -3638,37 +3626,40 @@ int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, b | |||
3638 | *if_is_24bit = bios->data[lvdsofs] & 16; | 3626 | *if_is_24bit = bios->data[lvdsofs] & 16; |
3639 | break; | 3627 | break; |
3640 | case 0x30: | 3628 | case 0x30: |
3641 | /* | 3629 | case 0x40: |
3642 | * My money would be on there being a 24 bit interface bit in | ||
3643 | * this table, but I have no example of a laptop bios with a | ||
3644 | * 24 bit panel to confirm that. Hence we shout loudly if any | ||
3645 | * bit other than bit 0 is set (I've not even seen bit 1) | ||
3646 | */ | ||
3647 | if (bios->data[lvdsofs] > 1) | ||
3648 | NV_ERROR(dev, | ||
3649 | "You have a very unusual laptop display; please report it\n"); | ||
3650 | /* | 3630 | /* |
3651 | * No sign of the "power off for reset" or "reset for panel | 3631 | * No sign of the "power off for reset" or "reset for panel |
3652 | * on" bits, but it's safer to assume we should | 3632 | * on" bits, but it's safer to assume we should |
3653 | */ | 3633 | */ |
3654 | bios->fp.power_off_for_reset = true; | 3634 | bios->fp.power_off_for_reset = true; |
3655 | bios->fp.reset_after_pclk_change = true; | 3635 | bios->fp.reset_after_pclk_change = true; |
3636 | |||
3656 | /* | 3637 | /* |
3657 | * It's ok lvdsofs is wrong for nv4x edid case; dual_link is | 3638 | * It's ok lvdsofs is wrong for nv4x edid case; dual_link is |
3658 | * over-written, and BITbit1 isn't used | 3639 | * over-written, and if_is_24bit isn't used |
3659 | */ | 3640 | */ |
3660 | bios->fp.dual_link = bios->data[lvdsofs] & 1; | 3641 | bios->fp.dual_link = bios->data[lvdsofs] & 1; |
3661 | bios->fp.BITbit1 = bios->data[lvdsofs] & 2; | ||
3662 | bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; | ||
3663 | break; | ||
3664 | case 0x40: | ||
3665 | bios->fp.dual_link = bios->data[lvdsofs] & 1; | ||
3666 | bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; | 3642 | bios->fp.if_is_24bit = bios->data[lvdsofs] & 2; |
3667 | bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; | 3643 | bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4]; |
3668 | bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; | 3644 | bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10; |
3669 | break; | 3645 | break; |
3670 | } | 3646 | } |
3671 | 3647 | ||
3648 | /* Dell Latitude D620 reports a too-high value for the dual-link | ||
3649 | * transition freq, causing us to program the panel incorrectly. | ||
3650 | * | ||
3651 | * It doesn't appear the VBIOS actually uses its transition freq | ||
3652 | * (90000kHz), instead it uses the "Number of LVDS channels" field | ||
3653 | * out of the panel ID structure (http://www.spwg.org/). | ||
3654 | * | ||
3655 | * For the moment, a quirk will do :) | ||
3656 | */ | ||
3657 | if ((dev->pdev->device == 0x01d7) && | ||
3658 | (dev->pdev->subsystem_vendor == 0x1028) && | ||
3659 | (dev->pdev->subsystem_device == 0x01c2)) { | ||
3660 | bios->fp.duallink_transition_clk = 80000; | ||
3661 | } | ||
3662 | |||
3672 | /* set dual_link flag for EDID case */ | 3663 | /* set dual_link flag for EDID case */ |
3673 | if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) | 3664 | if (pxclk && (chip_version < 0x25 || chip_version > 0x28)) |
3674 | bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); | 3665 | bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk); |
@@ -5077,25 +5068,25 @@ parse_dcb30_gpio_entry(struct nvbios *bios, uint16_t offset) | |||
5077 | gpio->tag = tag; | 5068 | gpio->tag = tag; |
5078 | gpio->line = line; | 5069 | gpio->line = line; |
5079 | gpio->invert = flags != 4; | 5070 | gpio->invert = flags != 4; |
5071 | gpio->entry = ent; | ||
5080 | } | 5072 | } |
5081 | 5073 | ||
5082 | static void | 5074 | static void |
5083 | parse_dcb40_gpio_entry(struct nvbios *bios, uint16_t offset) | 5075 | parse_dcb40_gpio_entry(struct nvbios *bios, uint16_t offset) |
5084 | { | 5076 | { |
5077 | uint32_t entry = ROM32(bios->data[offset]); | ||
5085 | struct dcb_gpio_entry *gpio; | 5078 | struct dcb_gpio_entry *gpio; |
5086 | uint32_t ent = ROM32(bios->data[offset]); | ||
5087 | uint8_t line = ent & 0x1f, | ||
5088 | tag = ent >> 8 & 0xff; | ||
5089 | 5079 | ||
5090 | if (tag == 0xff) | 5080 | if ((entry & 0x0000ff00) == 0x0000ff00) |
5091 | return; | 5081 | return; |
5092 | 5082 | ||
5093 | gpio = new_gpio_entry(bios); | 5083 | gpio = new_gpio_entry(bios); |
5094 | 5084 | gpio->tag = (entry & 0x0000ff00) >> 8; | |
5095 | /* Currently unused, we may need more fields parsed at some | 5085 | gpio->line = (entry & 0x0000001f) >> 0; |
5096 | * point. */ | 5086 | gpio->state_default = (entry & 0x01000000) >> 24; |
5097 | gpio->tag = tag; | 5087 | gpio->state[0] = (entry & 0x18000000) >> 27; |
5098 | gpio->line = line; | 5088 | gpio->state[1] = (entry & 0x60000000) >> 29; |
5089 | gpio->entry = entry; | ||
5099 | } | 5090 | } |
5100 | 5091 | ||
5101 | static void | 5092 | static void |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h index 4f88e6924d27..c0d7b0a3ece0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.h +++ b/drivers/gpu/drm/nouveau/nouveau_bios.h | |||
@@ -49,6 +49,9 @@ struct dcb_gpio_entry { | |||
49 | enum dcb_gpio_tag tag; | 49 | enum dcb_gpio_tag tag; |
50 | int line; | 50 | int line; |
51 | bool invert; | 51 | bool invert; |
52 | uint32_t entry; | ||
53 | uint8_t state_default; | ||
54 | uint8_t state[2]; | ||
52 | }; | 55 | }; |
53 | 56 | ||
54 | struct dcb_gpio_table { | 57 | struct dcb_gpio_table { |
@@ -267,7 +270,6 @@ struct nvbios { | |||
267 | bool reset_after_pclk_change; | 270 | bool reset_after_pclk_change; |
268 | bool dual_link; | 271 | bool dual_link; |
269 | bool link_c_increment; | 272 | bool link_c_increment; |
270 | bool BITbit1; | ||
271 | bool if_is_24bit; | 273 | bool if_is_24bit; |
272 | int duallink_transition_clk; | 274 | int duallink_transition_clk; |
273 | uint8_t strapless_is_24bit; | 275 | uint8_t strapless_is_24bit; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 9042dd7fb058..957d17629840 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -72,7 +72,7 @@ nouveau_bo_fixup_align(struct drm_device *dev, | |||
72 | * many small buffers. | 72 | * many small buffers. |
73 | */ | 73 | */ |
74 | if (dev_priv->card_type == NV_50) { | 74 | if (dev_priv->card_type == NV_50) { |
75 | uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15; | 75 | uint32_t block_size = dev_priv->vram_size >> 15; |
76 | int i; | 76 | int i; |
77 | 77 | ||
78 | switch (tile_flags) { | 78 | switch (tile_flags) { |
@@ -154,7 +154,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, | |||
154 | 154 | ||
155 | nvbo->placement.fpfn = 0; | 155 | nvbo->placement.fpfn = 0; |
156 | nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0; | 156 | nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0; |
157 | nouveau_bo_placement_set(nvbo, flags); | 157 | nouveau_bo_placement_set(nvbo, flags, 0); |
158 | 158 | ||
159 | nvbo->channel = chan; | 159 | nvbo->channel = chan; |
160 | ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size, | 160 | ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size, |
@@ -173,26 +173,33 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, | |||
173 | return 0; | 173 | return 0; |
174 | } | 174 | } |
175 | 175 | ||
176 | static void | ||
177 | set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags) | ||
178 | { | ||
179 | *n = 0; | ||
180 | |||
181 | if (type & TTM_PL_FLAG_VRAM) | ||
182 | pl[(*n)++] = TTM_PL_FLAG_VRAM | flags; | ||
183 | if (type & TTM_PL_FLAG_TT) | ||
184 | pl[(*n)++] = TTM_PL_FLAG_TT | flags; | ||
185 | if (type & TTM_PL_FLAG_SYSTEM) | ||
186 | pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags; | ||
187 | } | ||
188 | |||
176 | void | 189 | void |
177 | nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t memtype) | 190 | nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy) |
178 | { | 191 | { |
179 | int n = 0; | 192 | struct ttm_placement *pl = &nvbo->placement; |
180 | 193 | uint32_t flags = TTM_PL_MASK_CACHING | | |
181 | if (memtype & TTM_PL_FLAG_VRAM) | 194 | (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0); |
182 | nvbo->placements[n++] = TTM_PL_FLAG_VRAM | TTM_PL_MASK_CACHING; | 195 | |
183 | if (memtype & TTM_PL_FLAG_TT) | 196 | pl->placement = nvbo->placements; |
184 | nvbo->placements[n++] = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; | 197 | set_placement_list(nvbo->placements, &pl->num_placement, |
185 | if (memtype & TTM_PL_FLAG_SYSTEM) | 198 | type, flags); |
186 | nvbo->placements[n++] = TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING; | 199 | |
187 | nvbo->placement.placement = nvbo->placements; | 200 | pl->busy_placement = nvbo->busy_placements; |
188 | nvbo->placement.busy_placement = nvbo->placements; | 201 | set_placement_list(nvbo->busy_placements, &pl->num_busy_placement, |
189 | nvbo->placement.num_placement = n; | 202 | type | busy, flags); |
190 | nvbo->placement.num_busy_placement = n; | ||
191 | |||
192 | if (nvbo->pin_refcnt) { | ||
193 | while (n--) | ||
194 | nvbo->placements[n] |= TTM_PL_FLAG_NO_EVICT; | ||
195 | } | ||
196 | } | 203 | } |
197 | 204 | ||
198 | int | 205 | int |
@@ -200,7 +207,7 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) | |||
200 | { | 207 | { |
201 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); | 208 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
202 | struct ttm_buffer_object *bo = &nvbo->bo; | 209 | struct ttm_buffer_object *bo = &nvbo->bo; |
203 | int ret, i; | 210 | int ret; |
204 | 211 | ||
205 | if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) { | 212 | if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) { |
206 | NV_ERROR(nouveau_bdev(bo->bdev)->dev, | 213 | NV_ERROR(nouveau_bdev(bo->bdev)->dev, |
@@ -216,9 +223,7 @@ nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype) | |||
216 | if (ret) | 223 | if (ret) |
217 | goto out; | 224 | goto out; |
218 | 225 | ||
219 | nouveau_bo_placement_set(nvbo, memtype); | 226 | nouveau_bo_placement_set(nvbo, memtype, 0); |
220 | for (i = 0; i < nvbo->placement.num_placement; i++) | ||
221 | nvbo->placements[i] |= TTM_PL_FLAG_NO_EVICT; | ||
222 | 227 | ||
223 | ret = ttm_bo_validate(bo, &nvbo->placement, false, false); | 228 | ret = ttm_bo_validate(bo, &nvbo->placement, false, false); |
224 | if (ret == 0) { | 229 | if (ret == 0) { |
@@ -245,7 +250,7 @@ nouveau_bo_unpin(struct nouveau_bo *nvbo) | |||
245 | { | 250 | { |
246 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); | 251 | struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev); |
247 | struct ttm_buffer_object *bo = &nvbo->bo; | 252 | struct ttm_buffer_object *bo = &nvbo->bo; |
248 | int ret, i; | 253 | int ret; |
249 | 254 | ||
250 | if (--nvbo->pin_refcnt) | 255 | if (--nvbo->pin_refcnt) |
251 | return 0; | 256 | return 0; |
@@ -254,8 +259,7 @@ nouveau_bo_unpin(struct nouveau_bo *nvbo) | |||
254 | if (ret) | 259 | if (ret) |
255 | return ret; | 260 | return ret; |
256 | 261 | ||
257 | for (i = 0; i < nvbo->placement.num_placement; i++) | 262 | nouveau_bo_placement_set(nvbo, bo->mem.placement, 0); |
258 | nvbo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; | ||
259 | 263 | ||
260 | ret = ttm_bo_validate(bo, &nvbo->placement, false, false); | 264 | ret = ttm_bo_validate(bo, &nvbo->placement, false, false); |
261 | if (ret == 0) { | 265 | if (ret == 0) { |
@@ -396,8 +400,8 @@ nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |||
396 | man->io_addr = NULL; | 400 | man->io_addr = NULL; |
397 | man->io_offset = drm_get_resource_start(dev, 1); | 401 | man->io_offset = drm_get_resource_start(dev, 1); |
398 | man->io_size = drm_get_resource_len(dev, 1); | 402 | man->io_size = drm_get_resource_len(dev, 1); |
399 | if (man->io_size > nouveau_mem_fb_amount(dev)) | 403 | if (man->io_size > dev_priv->vram_size) |
400 | man->io_size = nouveau_mem_fb_amount(dev); | 404 | man->io_size = dev_priv->vram_size; |
401 | 405 | ||
402 | man->gpu_offset = dev_priv->vm_vram_base; | 406 | man->gpu_offset = dev_priv->vm_vram_base; |
403 | break; | 407 | break; |
@@ -440,10 +444,11 @@ nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl) | |||
440 | 444 | ||
441 | switch (bo->mem.mem_type) { | 445 | switch (bo->mem.mem_type) { |
442 | case TTM_PL_VRAM: | 446 | case TTM_PL_VRAM: |
443 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT); | 447 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT, |
448 | TTM_PL_FLAG_SYSTEM); | ||
444 | break; | 449 | break; |
445 | default: | 450 | default: |
446 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM); | 451 | nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0); |
447 | break; | 452 | break; |
448 | } | 453 | } |
449 | 454 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 6dfb425cbae9..1fc57ef58295 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -142,7 +142,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, | |||
142 | GFP_KERNEL); | 142 | GFP_KERNEL); |
143 | if (!dev_priv->fifos[channel]) | 143 | if (!dev_priv->fifos[channel]) |
144 | return -ENOMEM; | 144 | return -ENOMEM; |
145 | dev_priv->fifo_alloc_count++; | ||
146 | chan = dev_priv->fifos[channel]; | 145 | chan = dev_priv->fifos[channel]; |
147 | INIT_LIST_HEAD(&chan->nvsw.vbl_wait); | 146 | INIT_LIST_HEAD(&chan->nvsw.vbl_wait); |
148 | INIT_LIST_HEAD(&chan->fence.pending); | 147 | INIT_LIST_HEAD(&chan->fence.pending); |
@@ -321,7 +320,6 @@ nouveau_channel_free(struct nouveau_channel *chan) | |||
321 | iounmap(chan->user); | 320 | iounmap(chan->user); |
322 | 321 | ||
323 | dev_priv->fifos[chan->id] = NULL; | 322 | dev_priv->fifos[chan->id] = NULL; |
324 | dev_priv->fifo_alloc_count--; | ||
325 | kfree(chan); | 323 | kfree(chan); |
326 | } | 324 | } |
327 | 325 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c index 8ff9ef5d4b47..a251886a0ce6 100644 --- a/drivers/gpu/drm/nouveau/nouveau_debugfs.c +++ b/drivers/gpu/drm/nouveau/nouveau_debugfs.c | |||
@@ -137,10 +137,9 @@ nouveau_debugfs_memory_info(struct seq_file *m, void *data) | |||
137 | { | 137 | { |
138 | struct drm_info_node *node = (struct drm_info_node *) m->private; | 138 | struct drm_info_node *node = (struct drm_info_node *) m->private; |
139 | struct drm_minor *minor = node->minor; | 139 | struct drm_minor *minor = node->minor; |
140 | struct drm_device *dev = minor->dev; | 140 | struct drm_nouveau_private *dev_priv = minor->dev->dev_private; |
141 | 141 | ||
142 | seq_printf(m, "VRAM total: %dKiB\n", | 142 | seq_printf(m, "VRAM total: %dKiB\n", (int)(dev_priv->vram_size >> 10)); |
143 | (int)(nouveau_mem_fb_amount(dev) >> 10)); | ||
144 | return 0; | 143 | return 0; |
145 | } | 144 | } |
146 | 145 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_dp.c b/drivers/gpu/drm/nouveau/nouveau_dp.c index f954ad93e81f..deeb21c6865c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dp.c +++ b/drivers/gpu/drm/nouveau/nouveau_dp.c | |||
@@ -483,7 +483,7 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr, | |||
483 | ctrl |= (cmd << NV50_AUXCH_CTRL_CMD_SHIFT); | 483 | ctrl |= (cmd << NV50_AUXCH_CTRL_CMD_SHIFT); |
484 | ctrl |= ((data_nr - 1) << NV50_AUXCH_CTRL_LEN_SHIFT); | 484 | ctrl |= ((data_nr - 1) << NV50_AUXCH_CTRL_LEN_SHIFT); |
485 | 485 | ||
486 | for (;;) { | 486 | for (i = 0; i < 16; i++) { |
487 | nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl | 0x80000000); | 487 | nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl | 0x80000000); |
488 | nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl); | 488 | nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl); |
489 | nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl | 0x00010000); | 489 | nv_wr32(dev, NV50_AUXCH_CTRL(index), ctrl | 0x00010000); |
@@ -502,6 +502,12 @@ nouveau_dp_auxch(struct nouveau_i2c_chan *auxch, int cmd, int addr, | |||
502 | break; | 502 | break; |
503 | } | 503 | } |
504 | 504 | ||
505 | if (i == 16) { | ||
506 | NV_ERROR(dev, "auxch DEFER too many times, bailing\n"); | ||
507 | ret = -EREMOTEIO; | ||
508 | goto out; | ||
509 | } | ||
510 | |||
505 | if (cmd & 1) { | 511 | if (cmd & 1) { |
506 | if ((stat & NV50_AUXCH_STAT_COUNT) != data_nr) { | 512 | if ((stat & NV50_AUXCH_STAT_COUNT) != data_nr) { |
507 | ret = -EREMOTEIO; | 513 | ret = -EREMOTEIO; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index d8b559011777..ace630aa89e1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -76,6 +76,7 @@ struct nouveau_bo { | |||
76 | struct ttm_buffer_object bo; | 76 | struct ttm_buffer_object bo; |
77 | struct ttm_placement placement; | 77 | struct ttm_placement placement; |
78 | u32 placements[3]; | 78 | u32 placements[3]; |
79 | u32 busy_placements[3]; | ||
79 | struct ttm_bo_kmap_obj kmap; | 80 | struct ttm_bo_kmap_obj kmap; |
80 | struct list_head head; | 81 | struct list_head head; |
81 | 82 | ||
@@ -519,6 +520,7 @@ struct drm_nouveau_private { | |||
519 | 520 | ||
520 | struct workqueue_struct *wq; | 521 | struct workqueue_struct *wq; |
521 | struct work_struct irq_work; | 522 | struct work_struct irq_work; |
523 | struct work_struct hpd_work; | ||
522 | 524 | ||
523 | struct list_head vbl_waiting; | 525 | struct list_head vbl_waiting; |
524 | 526 | ||
@@ -533,7 +535,6 @@ struct drm_nouveau_private { | |||
533 | 535 | ||
534 | struct fb_info *fbdev_info; | 536 | struct fb_info *fbdev_info; |
535 | 537 | ||
536 | int fifo_alloc_count; | ||
537 | struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; | 538 | struct nouveau_channel *fifos[NOUVEAU_MAX_CHANNEL_NR]; |
538 | 539 | ||
539 | struct nouveau_engine engine; | 540 | struct nouveau_engine engine; |
@@ -553,12 +554,6 @@ struct drm_nouveau_private { | |||
553 | uint32_t ramro_offset; | 554 | uint32_t ramro_offset; |
554 | uint32_t ramro_size; | 555 | uint32_t ramro_size; |
555 | 556 | ||
556 | /* base physical addresses */ | ||
557 | uint64_t fb_phys; | ||
558 | uint64_t fb_available_size; | ||
559 | uint64_t fb_mappable_pages; | ||
560 | uint64_t fb_aper_free; | ||
561 | |||
562 | struct { | 557 | struct { |
563 | enum { | 558 | enum { |
564 | NOUVEAU_GART_NONE = 0, | 559 | NOUVEAU_GART_NONE = 0, |
@@ -572,10 +567,6 @@ struct drm_nouveau_private { | |||
572 | struct nouveau_gpuobj *sg_ctxdma; | 567 | struct nouveau_gpuobj *sg_ctxdma; |
573 | struct page *sg_dummy_page; | 568 | struct page *sg_dummy_page; |
574 | dma_addr_t sg_dummy_bus; | 569 | dma_addr_t sg_dummy_bus; |
575 | |||
576 | /* nottm hack */ | ||
577 | struct drm_ttm_backend *sg_be; | ||
578 | unsigned long sg_handle; | ||
579 | } gart_info; | 570 | } gart_info; |
580 | 571 | ||
581 | /* nv10-nv40 tiling regions */ | 572 | /* nv10-nv40 tiling regions */ |
@@ -584,6 +575,16 @@ struct drm_nouveau_private { | |||
584 | spinlock_t lock; | 575 | spinlock_t lock; |
585 | } tile; | 576 | } tile; |
586 | 577 | ||
578 | /* VRAM/fb configuration */ | ||
579 | uint64_t vram_size; | ||
580 | uint64_t vram_sys_base; | ||
581 | |||
582 | uint64_t fb_phys; | ||
583 | uint64_t fb_available_size; | ||
584 | uint64_t fb_mappable_pages; | ||
585 | uint64_t fb_aper_free; | ||
586 | int fb_mtrr; | ||
587 | |||
587 | /* G8x/G9x virtual address space */ | 588 | /* G8x/G9x virtual address space */ |
588 | uint64_t vm_gart_base; | 589 | uint64_t vm_gart_base; |
589 | uint64_t vm_gart_size; | 590 | uint64_t vm_gart_size; |
@@ -592,10 +593,6 @@ struct drm_nouveau_private { | |||
592 | uint64_t vm_end; | 593 | uint64_t vm_end; |
593 | struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR]; | 594 | struct nouveau_gpuobj *vm_vram_pt[NV50_VM_VRAM_NR]; |
594 | int vm_vram_pt_nr; | 595 | int vm_vram_pt_nr; |
595 | uint64_t vram_sys_base; | ||
596 | |||
597 | /* the mtrr covering the FB */ | ||
598 | int fb_mtrr; | ||
599 | 596 | ||
600 | struct mem_block *ramin_heap; | 597 | struct mem_block *ramin_heap; |
601 | 598 | ||
@@ -614,11 +611,7 @@ struct drm_nouveau_private { | |||
614 | uint32_t dac_users[4]; | 611 | uint32_t dac_users[4]; |
615 | 612 | ||
616 | struct nouveau_suspend_resume { | 613 | struct nouveau_suspend_resume { |
617 | uint32_t fifo_mode; | ||
618 | uint32_t graph_ctx_control; | ||
619 | uint32_t graph_state; | ||
620 | uint32_t *ramin_copy; | 614 | uint32_t *ramin_copy; |
621 | uint64_t ramin_size; | ||
622 | } susres; | 615 | } susres; |
623 | 616 | ||
624 | struct backlight_device *backlight; | 617 | struct backlight_device *backlight; |
@@ -717,7 +710,7 @@ extern struct mem_block *nouveau_mem_alloc_block(struct mem_block *, | |||
717 | struct drm_file *, int tail); | 710 | struct drm_file *, int tail); |
718 | extern void nouveau_mem_takedown(struct mem_block **heap); | 711 | extern void nouveau_mem_takedown(struct mem_block **heap); |
719 | extern void nouveau_mem_free_block(struct mem_block *); | 712 | extern void nouveau_mem_free_block(struct mem_block *); |
720 | extern uint64_t nouveau_mem_fb_amount(struct drm_device *); | 713 | extern int nouveau_mem_detect(struct drm_device *dev); |
721 | extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap); | 714 | extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap); |
722 | extern int nouveau_mem_init(struct drm_device *); | 715 | extern int nouveau_mem_init(struct drm_device *); |
723 | extern int nouveau_mem_init_agp(struct drm_device *); | 716 | extern int nouveau_mem_init_agp(struct drm_device *); |
@@ -1124,7 +1117,8 @@ extern int nouveau_bo_pin(struct nouveau_bo *, uint32_t flags); | |||
1124 | extern int nouveau_bo_unpin(struct nouveau_bo *); | 1117 | extern int nouveau_bo_unpin(struct nouveau_bo *); |
1125 | extern int nouveau_bo_map(struct nouveau_bo *); | 1118 | extern int nouveau_bo_map(struct nouveau_bo *); |
1126 | extern void nouveau_bo_unmap(struct nouveau_bo *); | 1119 | extern void nouveau_bo_unmap(struct nouveau_bo *); |
1127 | extern void nouveau_bo_placement_set(struct nouveau_bo *, uint32_t memtype); | 1120 | extern void nouveau_bo_placement_set(struct nouveau_bo *, uint32_t type, |
1121 | uint32_t busy); | ||
1128 | extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); | 1122 | extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); |
1129 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); | 1123 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); |
1130 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); | 1124 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); |
@@ -1168,6 +1162,10 @@ extern int nouveau_gem_ioctl_info(struct drm_device *, void *, | |||
1168 | int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); | 1162 | int nv17_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); |
1169 | int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); | 1163 | int nv17_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); |
1170 | 1164 | ||
1165 | /* nv50_gpio.c */ | ||
1166 | int nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag); | ||
1167 | int nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state); | ||
1168 | |||
1171 | #ifndef ioread32_native | 1169 | #ifndef ioread32_native |
1172 | #ifdef __BIG_ENDIAN | 1170 | #ifdef __BIG_ENDIAN |
1173 | #define ioread16_native ioread16be | 1171 | #define ioread16_native ioread16be |
diff --git a/drivers/gpu/drm/nouveau/nouveau_encoder.h b/drivers/gpu/drm/nouveau/nouveau_encoder.h index bc4a24029ed1..9f28b94e479b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_encoder.h +++ b/drivers/gpu/drm/nouveau/nouveau_encoder.h | |||
@@ -47,6 +47,7 @@ struct nouveau_encoder { | |||
47 | 47 | ||
48 | union { | 48 | union { |
49 | struct { | 49 | struct { |
50 | int mc_unknown; | ||
50 | int dpcd_version; | 51 | int dpcd_version; |
51 | int link_nr; | 52 | int link_nr; |
52 | int link_bw; | 53 | int link_bw; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c index 0d22f66f1c79..1bc0b38a5167 100644 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c | |||
@@ -180,40 +180,35 @@ nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains, | |||
180 | { | 180 | { |
181 | struct nouveau_bo *nvbo = gem->driver_private; | 181 | struct nouveau_bo *nvbo = gem->driver_private; |
182 | struct ttm_buffer_object *bo = &nvbo->bo; | 182 | struct ttm_buffer_object *bo = &nvbo->bo; |
183 | uint64_t flags; | 183 | uint32_t domains = valid_domains & |
184 | (write_domains ? write_domains : read_domains); | ||
185 | uint32_t pref_flags = 0, valid_flags = 0; | ||
184 | 186 | ||
185 | if (!valid_domains || (!read_domains && !write_domains)) | 187 | if (!domains) |
186 | return -EINVAL; | 188 | return -EINVAL; |
187 | 189 | ||
188 | if (write_domains) { | 190 | if (valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) |
189 | if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) && | 191 | valid_flags |= TTM_PL_FLAG_VRAM; |
190 | (write_domains & NOUVEAU_GEM_DOMAIN_VRAM)) | 192 | |
191 | flags = TTM_PL_FLAG_VRAM; | 193 | if (valid_domains & NOUVEAU_GEM_DOMAIN_GART) |
192 | else | 194 | valid_flags |= TTM_PL_FLAG_TT; |
193 | if ((valid_domains & NOUVEAU_GEM_DOMAIN_GART) && | 195 | |
194 | (write_domains & NOUVEAU_GEM_DOMAIN_GART)) | 196 | if ((domains & NOUVEAU_GEM_DOMAIN_VRAM) && |
195 | flags = TTM_PL_FLAG_TT; | 197 | bo->mem.mem_type == TTM_PL_VRAM) |
196 | else | 198 | pref_flags |= TTM_PL_FLAG_VRAM; |
197 | return -EINVAL; | 199 | |
198 | } else { | 200 | else if ((domains & NOUVEAU_GEM_DOMAIN_GART) && |
199 | if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) && | 201 | bo->mem.mem_type == TTM_PL_TT) |
200 | (read_domains & NOUVEAU_GEM_DOMAIN_VRAM) && | 202 | pref_flags |= TTM_PL_FLAG_TT; |
201 | bo->mem.mem_type == TTM_PL_VRAM) | 203 | |
202 | flags = TTM_PL_FLAG_VRAM; | 204 | else if (domains & NOUVEAU_GEM_DOMAIN_VRAM) |
203 | else | 205 | pref_flags |= TTM_PL_FLAG_VRAM; |
204 | if ((valid_domains & NOUVEAU_GEM_DOMAIN_GART) && | 206 | |
205 | (read_domains & NOUVEAU_GEM_DOMAIN_GART) && | 207 | else |
206 | bo->mem.mem_type == TTM_PL_TT) | 208 | pref_flags |= TTM_PL_FLAG_TT; |
207 | flags = TTM_PL_FLAG_TT; | 209 | |
208 | else | 210 | nouveau_bo_placement_set(nvbo, pref_flags, valid_flags); |
209 | if ((valid_domains & NOUVEAU_GEM_DOMAIN_VRAM) && | ||
210 | (read_domains & NOUVEAU_GEM_DOMAIN_VRAM)) | ||
211 | flags = TTM_PL_FLAG_VRAM; | ||
212 | else | ||
213 | flags = TTM_PL_FLAG_TT; | ||
214 | } | ||
215 | 211 | ||
216 | nouveau_bo_placement_set(nvbo, flags); | ||
217 | return 0; | 212 | return 0; |
218 | } | 213 | } |
219 | 214 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c index 2bd59a92fee5..13e73cee4c44 100644 --- a/drivers/gpu/drm/nouveau/nouveau_irq.c +++ b/drivers/gpu/drm/nouveau/nouveau_irq.c | |||
@@ -51,6 +51,7 @@ nouveau_irq_preinstall(struct drm_device *dev) | |||
51 | 51 | ||
52 | if (dev_priv->card_type == NV_50) { | 52 | if (dev_priv->card_type == NV_50) { |
53 | INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh); | 53 | INIT_WORK(&dev_priv->irq_work, nv50_display_irq_handler_bh); |
54 | INIT_WORK(&dev_priv->hpd_work, nv50_display_irq_hotplug_bh); | ||
54 | INIT_LIST_HEAD(&dev_priv->vbl_waiting); | 55 | INIT_LIST_HEAD(&dev_priv->vbl_waiting); |
55 | } | 56 | } |
56 | } | 57 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 2dc09dbd817d..775a7017af64 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -347,6 +347,20 @@ nv50_mem_vm_bind_linear(struct drm_device *dev, uint64_t virt, uint32_t size, | |||
347 | return -EBUSY; | 347 | return -EBUSY; |
348 | } | 348 | } |
349 | 349 | ||
350 | nv_wr32(dev, 0x100c80, 0x00040001); | ||
351 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | ||
352 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | ||
353 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); | ||
354 | return -EBUSY; | ||
355 | } | ||
356 | |||
357 | nv_wr32(dev, 0x100c80, 0x00060001); | ||
358 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | ||
359 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | ||
360 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); | ||
361 | return -EBUSY; | ||
362 | } | ||
363 | |||
350 | return 0; | 364 | return 0; |
351 | } | 365 | } |
352 | 366 | ||
@@ -387,6 +401,20 @@ nv50_mem_vm_unbind(struct drm_device *dev, uint64_t virt, uint32_t size) | |||
387 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | 401 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { |
388 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | 402 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); |
389 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); | 403 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); |
404 | return; | ||
405 | } | ||
406 | |||
407 | nv_wr32(dev, 0x100c80, 0x00040001); | ||
408 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | ||
409 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | ||
410 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); | ||
411 | return; | ||
412 | } | ||
413 | |||
414 | nv_wr32(dev, 0x100c80, 0x00060001); | ||
415 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | ||
416 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | ||
417 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", nv_rd32(dev, 0x100c80)); | ||
390 | } | 418 | } |
391 | } | 419 | } |
392 | 420 | ||
@@ -449,9 +477,30 @@ void nouveau_mem_close(struct drm_device *dev) | |||
449 | } | 477 | } |
450 | } | 478 | } |
451 | 479 | ||
452 | /*XXX won't work on BSD because of pci_read_config_dword */ | ||
453 | static uint32_t | 480 | static uint32_t |
454 | nouveau_mem_fb_amount_igp(struct drm_device *dev) | 481 | nouveau_mem_detect_nv04(struct drm_device *dev) |
482 | { | ||
483 | uint32_t boot0 = nv_rd32(dev, NV03_BOOT_0); | ||
484 | |||
485 | if (boot0 & 0x00000100) | ||
486 | return (((boot0 >> 12) & 0xf) * 2 + 2) * 1024 * 1024; | ||
487 | |||
488 | switch (boot0 & NV03_BOOT_0_RAM_AMOUNT) { | ||
489 | case NV04_BOOT_0_RAM_AMOUNT_32MB: | ||
490 | return 32 * 1024 * 1024; | ||
491 | case NV04_BOOT_0_RAM_AMOUNT_16MB: | ||
492 | return 16 * 1024 * 1024; | ||
493 | case NV04_BOOT_0_RAM_AMOUNT_8MB: | ||
494 | return 8 * 1024 * 1024; | ||
495 | case NV04_BOOT_0_RAM_AMOUNT_4MB: | ||
496 | return 4 * 1024 * 1024; | ||
497 | } | ||
498 | |||
499 | return 0; | ||
500 | } | ||
501 | |||
502 | static uint32_t | ||
503 | nouveau_mem_detect_nforce(struct drm_device *dev) | ||
455 | { | 504 | { |
456 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 505 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
457 | struct pci_dev *bridge; | 506 | struct pci_dev *bridge; |
@@ -463,11 +512,11 @@ nouveau_mem_fb_amount_igp(struct drm_device *dev) | |||
463 | return 0; | 512 | return 0; |
464 | } | 513 | } |
465 | 514 | ||
466 | if (dev_priv->flags&NV_NFORCE) { | 515 | if (dev_priv->flags & NV_NFORCE) { |
467 | pci_read_config_dword(bridge, 0x7C, &mem); | 516 | pci_read_config_dword(bridge, 0x7C, &mem); |
468 | return (uint64_t)(((mem >> 6) & 31) + 1)*1024*1024; | 517 | return (uint64_t)(((mem >> 6) & 31) + 1)*1024*1024; |
469 | } else | 518 | } else |
470 | if (dev_priv->flags&NV_NFORCE2) { | 519 | if (dev_priv->flags & NV_NFORCE2) { |
471 | pci_read_config_dword(bridge, 0x84, &mem); | 520 | pci_read_config_dword(bridge, 0x84, &mem); |
472 | return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024; | 521 | return (uint64_t)(((mem >> 4) & 127) + 1)*1024*1024; |
473 | } | 522 | } |
@@ -477,50 +526,32 @@ nouveau_mem_fb_amount_igp(struct drm_device *dev) | |||
477 | } | 526 | } |
478 | 527 | ||
479 | /* returns the amount of FB ram in bytes */ | 528 | /* returns the amount of FB ram in bytes */ |
480 | uint64_t nouveau_mem_fb_amount(struct drm_device *dev) | 529 | int |
530 | nouveau_mem_detect(struct drm_device *dev) | ||
481 | { | 531 | { |
482 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 532 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
483 | uint32_t boot0; | 533 | |
484 | 534 | if (dev_priv->card_type == NV_04) { | |
485 | switch (dev_priv->card_type) { | 535 | dev_priv->vram_size = nouveau_mem_detect_nv04(dev); |
486 | case NV_04: | 536 | } else |
487 | boot0 = nv_rd32(dev, NV03_BOOT_0); | 537 | if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) { |
488 | if (boot0 & 0x00000100) | 538 | dev_priv->vram_size = nouveau_mem_detect_nforce(dev); |
489 | return (((boot0 >> 12) & 0xf) * 2 + 2) * 1024 * 1024; | 539 | } else { |
490 | 540 | dev_priv->vram_size = nv_rd32(dev, NV04_FIFO_DATA); | |
491 | switch (boot0 & NV03_BOOT_0_RAM_AMOUNT) { | 541 | dev_priv->vram_size &= NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK; |
492 | case NV04_BOOT_0_RAM_AMOUNT_32MB: | 542 | if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) |
493 | return 32 * 1024 * 1024; | 543 | dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12; |
494 | case NV04_BOOT_0_RAM_AMOUNT_16MB: | ||
495 | return 16 * 1024 * 1024; | ||
496 | case NV04_BOOT_0_RAM_AMOUNT_8MB: | ||
497 | return 8 * 1024 * 1024; | ||
498 | case NV04_BOOT_0_RAM_AMOUNT_4MB: | ||
499 | return 4 * 1024 * 1024; | ||
500 | } | ||
501 | break; | ||
502 | case NV_10: | ||
503 | case NV_20: | ||
504 | case NV_30: | ||
505 | case NV_40: | ||
506 | case NV_50: | ||
507 | default: | ||
508 | if (dev_priv->flags & (NV_NFORCE | NV_NFORCE2)) { | ||
509 | return nouveau_mem_fb_amount_igp(dev); | ||
510 | } else { | ||
511 | uint64_t mem; | ||
512 | mem = (nv_rd32(dev, NV04_FIFO_DATA) & | ||
513 | NV10_FIFO_DATA_RAM_AMOUNT_MB_MASK) >> | ||
514 | NV10_FIFO_DATA_RAM_AMOUNT_MB_SHIFT; | ||
515 | return mem * 1024 * 1024; | ||
516 | } | ||
517 | break; | ||
518 | } | 544 | } |
519 | 545 | ||
520 | NV_ERROR(dev, | 546 | NV_INFO(dev, "Detected %dMiB VRAM\n", (int)(dev_priv->vram_size >> 20)); |
521 | "Unable to detect video ram size. Please report your setup to " | 547 | if (dev_priv->vram_sys_base) { |
522 | DRIVER_EMAIL "\n"); | 548 | NV_INFO(dev, "Stolen system memory at: 0x%010llx\n", |
523 | return 0; | 549 | dev_priv->vram_sys_base); |
550 | } | ||
551 | |||
552 | if (dev_priv->vram_size) | ||
553 | return 0; | ||
554 | return -ENOMEM; | ||
524 | } | 555 | } |
525 | 556 | ||
526 | #if __OS_HAS_AGP | 557 | #if __OS_HAS_AGP |
@@ -631,15 +662,12 @@ nouveau_mem_init(struct drm_device *dev) | |||
631 | spin_lock_init(&dev_priv->ttm.bo_list_lock); | 662 | spin_lock_init(&dev_priv->ttm.bo_list_lock); |
632 | spin_lock_init(&dev_priv->tile.lock); | 663 | spin_lock_init(&dev_priv->tile.lock); |
633 | 664 | ||
634 | dev_priv->fb_available_size = nouveau_mem_fb_amount(dev); | 665 | dev_priv->fb_available_size = dev_priv->vram_size; |
635 | |||
636 | dev_priv->fb_mappable_pages = dev_priv->fb_available_size; | 666 | dev_priv->fb_mappable_pages = dev_priv->fb_available_size; |
637 | if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1)) | 667 | if (dev_priv->fb_mappable_pages > drm_get_resource_len(dev, 1)) |
638 | dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1); | 668 | dev_priv->fb_mappable_pages = drm_get_resource_len(dev, 1); |
639 | dev_priv->fb_mappable_pages >>= PAGE_SHIFT; | 669 | dev_priv->fb_mappable_pages >>= PAGE_SHIFT; |
640 | 670 | ||
641 | NV_INFO(dev, "%d MiB VRAM\n", (int)(dev_priv->fb_available_size >> 20)); | ||
642 | |||
643 | /* remove reserved space at end of vram from available amount */ | 671 | /* remove reserved space at end of vram from available amount */ |
644 | dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram; | 672 | dev_priv->fb_available_size -= dev_priv->ramin_rsvd_vram; |
645 | dev_priv->fb_aper_free = dev_priv->fb_available_size; | 673 | dev_priv->fb_aper_free = dev_priv->fb_available_size; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index 86785b8d42ed..1d6ee8b55154 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c | |||
@@ -172,6 +172,24 @@ nouveau_sgdma_unbind(struct ttm_backend *be) | |||
172 | } | 172 | } |
173 | dev_priv->engine.instmem.finish_access(nvbe->dev); | 173 | dev_priv->engine.instmem.finish_access(nvbe->dev); |
174 | 174 | ||
175 | if (dev_priv->card_type == NV_50) { | ||
176 | nv_wr32(dev, 0x100c80, 0x00050001); | ||
177 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | ||
178 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | ||
179 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", | ||
180 | nv_rd32(dev, 0x100c80)); | ||
181 | return -EBUSY; | ||
182 | } | ||
183 | |||
184 | nv_wr32(dev, 0x100c80, 0x00000001); | ||
185 | if (!nv_wait(0x100c80, 0x00000001, 0x00000000)) { | ||
186 | NV_ERROR(dev, "timeout: (0x100c80 & 1) == 0 (2)\n"); | ||
187 | NV_ERROR(dev, "0x100c80 = 0x%08x\n", | ||
188 | nv_rd32(dev, 0x100c80)); | ||
189 | return -EBUSY; | ||
190 | } | ||
191 | } | ||
192 | |||
175 | nvbe->bound = false; | 193 | nvbe->bound = false; |
176 | return 0; | 194 | return 0; |
177 | } | 195 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 10656a6be8e6..e1710640a278 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -341,7 +341,7 @@ nouveau_card_init_channel(struct drm_device *dev) | |||
341 | 341 | ||
342 | gpuobj = NULL; | 342 | gpuobj = NULL; |
343 | ret = nouveau_gpuobj_dma_new(dev_priv->channel, NV_CLASS_DMA_IN_MEMORY, | 343 | ret = nouveau_gpuobj_dma_new(dev_priv->channel, NV_CLASS_DMA_IN_MEMORY, |
344 | 0, nouveau_mem_fb_amount(dev), | 344 | 0, dev_priv->vram_size, |
345 | NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM, | 345 | NV_DMA_ACCESS_RW, NV_DMA_TARGET_VIDMEM, |
346 | &gpuobj); | 346 | &gpuobj); |
347 | if (ret) | 347 | if (ret) |
@@ -427,6 +427,10 @@ nouveau_card_init(struct drm_device *dev) | |||
427 | goto out; | 427 | goto out; |
428 | } | 428 | } |
429 | 429 | ||
430 | ret = nouveau_mem_detect(dev); | ||
431 | if (ret) | ||
432 | goto out_bios; | ||
433 | |||
430 | ret = nouveau_gpuobj_early_init(dev); | 434 | ret = nouveau_gpuobj_early_init(dev); |
431 | if (ret) | 435 | if (ret) |
432 | goto out_bios; | 436 | goto out_bios; |
@@ -502,7 +506,7 @@ nouveau_card_init(struct drm_device *dev) | |||
502 | else | 506 | else |
503 | ret = nv04_display_create(dev); | 507 | ret = nv04_display_create(dev); |
504 | if (ret) | 508 | if (ret) |
505 | goto out_irq; | 509 | goto out_channel; |
506 | } | 510 | } |
507 | 511 | ||
508 | ret = nouveau_backlight_init(dev); | 512 | ret = nouveau_backlight_init(dev); |
@@ -516,6 +520,11 @@ nouveau_card_init(struct drm_device *dev) | |||
516 | 520 | ||
517 | return 0; | 521 | return 0; |
518 | 522 | ||
523 | out_channel: | ||
524 | if (dev_priv->channel) { | ||
525 | nouveau_channel_free(dev_priv->channel); | ||
526 | dev_priv->channel = NULL; | ||
527 | } | ||
519 | out_irq: | 528 | out_irq: |
520 | drm_irq_uninstall(dev); | 529 | drm_irq_uninstall(dev); |
521 | out_fifo: | 530 | out_fifo: |
@@ -533,6 +542,7 @@ out_mc: | |||
533 | out_gpuobj: | 542 | out_gpuobj: |
534 | nouveau_gpuobj_takedown(dev); | 543 | nouveau_gpuobj_takedown(dev); |
535 | out_mem: | 544 | out_mem: |
545 | nouveau_sgdma_takedown(dev); | ||
536 | nouveau_mem_close(dev); | 546 | nouveau_mem_close(dev); |
537 | out_instmem: | 547 | out_instmem: |
538 | engine->instmem.takedown(dev); | 548 | engine->instmem.takedown(dev); |
diff --git a/drivers/gpu/drm/nouveau/nv40_fifo.c b/drivers/gpu/drm/nouveau/nv40_fifo.c index 6b2ef4a9fce1..500ccfd3a0b8 100644 --- a/drivers/gpu/drm/nouveau/nv40_fifo.c +++ b/drivers/gpu/drm/nouveau/nv40_fifo.c | |||
@@ -278,7 +278,7 @@ nv40_fifo_init_ramxx(struct drm_device *dev) | |||
278 | default: | 278 | default: |
279 | nv_wr32(dev, 0x2230, 0); | 279 | nv_wr32(dev, 0x2230, 0); |
280 | nv_wr32(dev, NV40_PFIFO_RAMFC, | 280 | nv_wr32(dev, NV40_PFIFO_RAMFC, |
281 | ((nouveau_mem_fb_amount(dev) - 512 * 1024 + | 281 | ((dev_priv->vram_size - 512 * 1024 + |
282 | dev_priv->ramfc_offset) >> 16) | (3 << 16)); | 282 | dev_priv->ramfc_offset) >> 16) | (3 << 16)); |
283 | break; | 283 | break; |
284 | } | 284 | } |
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c index 53e8afe1dcd1..0616c96e4b67 100644 --- a/drivers/gpu/drm/nouveau/nv40_graph.c +++ b/drivers/gpu/drm/nouveau/nv40_graph.c | |||
@@ -335,6 +335,27 @@ nv40_graph_init(struct drm_device *dev) | |||
335 | nv_wr32(dev, 0x400b38, 0x2ffff800); | 335 | nv_wr32(dev, 0x400b38, 0x2ffff800); |
336 | nv_wr32(dev, 0x400b3c, 0x00006000); | 336 | nv_wr32(dev, 0x400b3c, 0x00006000); |
337 | 337 | ||
338 | /* Tiling related stuff. */ | ||
339 | switch (dev_priv->chipset) { | ||
340 | case 0x44: | ||
341 | case 0x4a: | ||
342 | nv_wr32(dev, 0x400bc4, 0x1003d888); | ||
343 | nv_wr32(dev, 0x400bbc, 0xb7a7b500); | ||
344 | break; | ||
345 | case 0x46: | ||
346 | nv_wr32(dev, 0x400bc4, 0x0000e024); | ||
347 | nv_wr32(dev, 0x400bbc, 0xb7a7b520); | ||
348 | break; | ||
349 | case 0x4c: | ||
350 | case 0x4e: | ||
351 | case 0x67: | ||
352 | nv_wr32(dev, 0x400bc4, 0x1003d888); | ||
353 | nv_wr32(dev, 0x400bbc, 0xb7a7b540); | ||
354 | break; | ||
355 | default: | ||
356 | break; | ||
357 | } | ||
358 | |||
338 | /* Turn all the tiling regions off. */ | 359 | /* Turn all the tiling regions off. */ |
339 | for (i = 0; i < pfb->num_tiles; i++) | 360 | for (i = 0; i < pfb->num_tiles; i++) |
340 | nv40_graph_set_region_tiling(dev, i, 0, 0, 0); | 361 | nv40_graph_set_region_tiling(dev, i, 0, 0, 0); |
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c index fac6c88a2b1f..649db4c1b690 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.c +++ b/drivers/gpu/drm/nouveau/nv50_display.c | |||
@@ -143,7 +143,7 @@ nv50_evo_channel_new(struct drm_device *dev, struct nouveau_channel **pchan) | |||
143 | } | 143 | } |
144 | 144 | ||
145 | ret = nv50_evo_dmaobj_new(chan, 0x3d, NvEvoVRAM, 0, 0x19, | 145 | ret = nv50_evo_dmaobj_new(chan, 0x3d, NvEvoVRAM, 0, 0x19, |
146 | 0, nouveau_mem_fb_amount(dev)); | 146 | 0, dev_priv->vram_size); |
147 | if (ret) { | 147 | if (ret) { |
148 | nv50_evo_channel_del(pchan); | 148 | nv50_evo_channel_del(pchan); |
149 | return ret; | 149 | return ret; |
@@ -231,7 +231,7 @@ nv50_display_init(struct drm_device *dev) | |||
231 | /* This used to be in crtc unblank, but seems out of place there. */ | 231 | /* This used to be in crtc unblank, but seems out of place there. */ |
232 | nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0); | 232 | nv_wr32(dev, NV50_PDISPLAY_UNK_380, 0); |
233 | /* RAM is clamped to 256 MiB. */ | 233 | /* RAM is clamped to 256 MiB. */ |
234 | ram_amount = nouveau_mem_fb_amount(dev); | 234 | ram_amount = dev_priv->vram_size; |
235 | NV_DEBUG_KMS(dev, "ram_amount %d\n", ram_amount); | 235 | NV_DEBUG_KMS(dev, "ram_amount %d\n", ram_amount); |
236 | if (ram_amount > 256*1024*1024) | 236 | if (ram_amount > 256*1024*1024) |
237 | ram_amount = 256*1024*1024; | 237 | ram_amount = 256*1024*1024; |
@@ -529,8 +529,10 @@ int nv50_display_create(struct drm_device *dev) | |||
529 | } | 529 | } |
530 | 530 | ||
531 | ret = nv50_display_init(dev); | 531 | ret = nv50_display_init(dev); |
532 | if (ret) | 532 | if (ret) { |
533 | nv50_display_destroy(dev); | ||
533 | return ret; | 534 | return ret; |
535 | } | ||
534 | 536 | ||
535 | return 0; | 537 | return 0; |
536 | } | 538 | } |
@@ -885,10 +887,12 @@ nv50_display_error_handler(struct drm_device *dev) | |||
885 | nv_wr32(dev, NV50_PDISPLAY_TRAPPED_ADDR, 0x90000000); | 887 | nv_wr32(dev, NV50_PDISPLAY_TRAPPED_ADDR, 0x90000000); |
886 | } | 888 | } |
887 | 889 | ||
888 | static void | 890 | void |
889 | nv50_display_irq_hotplug(struct drm_device *dev) | 891 | nv50_display_irq_hotplug_bh(struct work_struct *work) |
890 | { | 892 | { |
891 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 893 | struct drm_nouveau_private *dev_priv = |
894 | container_of(work, struct drm_nouveau_private, hpd_work); | ||
895 | struct drm_device *dev = dev_priv->dev; | ||
892 | struct drm_connector *connector; | 896 | struct drm_connector *connector; |
893 | const uint32_t gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 }; | 897 | const uint32_t gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 }; |
894 | uint32_t unplug_mask, plug_mask, change_mask; | 898 | uint32_t unplug_mask, plug_mask, change_mask; |
@@ -949,8 +953,10 @@ nv50_display_irq_handler(struct drm_device *dev) | |||
949 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 953 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
950 | uint32_t delayed = 0; | 954 | uint32_t delayed = 0; |
951 | 955 | ||
952 | while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_HOTPLUG) | 956 | if (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_HOTPLUG) { |
953 | nv50_display_irq_hotplug(dev); | 957 | if (!work_pending(&dev_priv->hpd_work)) |
958 | queue_work(dev_priv->wq, &dev_priv->hpd_work); | ||
959 | } | ||
954 | 960 | ||
955 | while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) { | 961 | while (nv_rd32(dev, NV50_PMC_INTR_0) & NV50_PMC_INTR_0_DISPLAY) { |
956 | uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0); | 962 | uint32_t intr0 = nv_rd32(dev, NV50_PDISPLAY_INTR_0); |
diff --git a/drivers/gpu/drm/nouveau/nv50_display.h b/drivers/gpu/drm/nouveau/nv50_display.h index 3ae8d0725f63..581d405ac014 100644 --- a/drivers/gpu/drm/nouveau/nv50_display.h +++ b/drivers/gpu/drm/nouveau/nv50_display.h | |||
@@ -37,6 +37,7 @@ | |||
37 | 37 | ||
38 | void nv50_display_irq_handler(struct drm_device *dev); | 38 | void nv50_display_irq_handler(struct drm_device *dev); |
39 | void nv50_display_irq_handler_bh(struct work_struct *work); | 39 | void nv50_display_irq_handler_bh(struct work_struct *work); |
40 | void nv50_display_irq_hotplug_bh(struct work_struct *work); | ||
40 | int nv50_display_init(struct drm_device *dev); | 41 | int nv50_display_init(struct drm_device *dev); |
41 | int nv50_display_create(struct drm_device *dev); | 42 | int nv50_display_create(struct drm_device *dev); |
42 | int nv50_display_destroy(struct drm_device *dev); | 43 | int nv50_display_destroy(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c index 25a3cd8794f9..a8c70e7e9184 100644 --- a/drivers/gpu/drm/nouveau/nv50_fbcon.c +++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c | |||
@@ -157,8 +157,11 @@ nv50_fbcon_accel_init(struct fb_info *info) | |||
157 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 157 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
158 | struct nouveau_channel *chan = dev_priv->channel; | 158 | struct nouveau_channel *chan = dev_priv->channel; |
159 | struct nouveau_gpuobj *eng2d = NULL; | 159 | struct nouveau_gpuobj *eng2d = NULL; |
160 | uint64_t fb; | ||
160 | int ret, format; | 161 | int ret, format; |
161 | 162 | ||
163 | fb = info->fix.smem_start - dev_priv->fb_phys + dev_priv->vm_vram_base; | ||
164 | |||
162 | switch (info->var.bits_per_pixel) { | 165 | switch (info->var.bits_per_pixel) { |
163 | case 8: | 166 | case 8: |
164 | format = 0xf3; | 167 | format = 0xf3; |
@@ -248,9 +251,8 @@ nv50_fbcon_accel_init(struct fb_info *info) | |||
248 | OUT_RING(chan, info->fix.line_length); | 251 | OUT_RING(chan, info->fix.line_length); |
249 | OUT_RING(chan, info->var.xres_virtual); | 252 | OUT_RING(chan, info->var.xres_virtual); |
250 | OUT_RING(chan, info->var.yres_virtual); | 253 | OUT_RING(chan, info->var.yres_virtual); |
251 | OUT_RING(chan, 0); | 254 | OUT_RING(chan, upper_32_bits(fb)); |
252 | OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys + | 255 | OUT_RING(chan, lower_32_bits(fb)); |
253 | dev_priv->vm_vram_base); | ||
254 | BEGIN_RING(chan, NvSub2D, 0x0230, 2); | 256 | BEGIN_RING(chan, NvSub2D, 0x0230, 2); |
255 | OUT_RING(chan, format); | 257 | OUT_RING(chan, format); |
256 | OUT_RING(chan, 1); | 258 | OUT_RING(chan, 1); |
@@ -258,9 +260,8 @@ nv50_fbcon_accel_init(struct fb_info *info) | |||
258 | OUT_RING(chan, info->fix.line_length); | 260 | OUT_RING(chan, info->fix.line_length); |
259 | OUT_RING(chan, info->var.xres_virtual); | 261 | OUT_RING(chan, info->var.xres_virtual); |
260 | OUT_RING(chan, info->var.yres_virtual); | 262 | OUT_RING(chan, info->var.yres_virtual); |
261 | OUT_RING(chan, 0); | 263 | OUT_RING(chan, upper_32_bits(fb)); |
262 | OUT_RING(chan, info->fix.smem_start - dev_priv->fb_phys + | 264 | OUT_RING(chan, lower_32_bits(fb)); |
263 | dev_priv->vm_vram_base); | ||
264 | 265 | ||
265 | return 0; | 266 | return 0; |
266 | } | 267 | } |
diff --git a/drivers/gpu/drm/nouveau/nv50_gpio.c b/drivers/gpu/drm/nouveau/nv50_gpio.c new file mode 100644 index 000000000000..c61782b314e7 --- /dev/null +++ b/drivers/gpu/drm/nouveau/nv50_gpio.c | |||
@@ -0,0 +1,76 @@ | |||
1 | /* | ||
2 | * Copyright 2010 Red Hat Inc. | ||
3 | * | ||
4 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
5 | * copy of this software and associated documentation files (the "Software"), | ||
6 | * to deal in the Software without restriction, including without limitation | ||
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
8 | * and/or sell copies of the Software, and to permit persons to whom the | ||
9 | * Software is furnished to do so, subject to the following conditions: | ||
10 | * | ||
11 | * The above copyright notice and this permission notice shall be included in | ||
12 | * all copies or substantial portions of the Software. | ||
13 | * | ||
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
20 | * OTHER DEALINGS IN THE SOFTWARE. | ||
21 | * | ||
22 | * Authors: Ben Skeggs | ||
23 | */ | ||
24 | |||
25 | #include "drmP.h" | ||
26 | #include "nouveau_drv.h" | ||
27 | #include "nouveau_hw.h" | ||
28 | |||
29 | static int | ||
30 | nv50_gpio_location(struct dcb_gpio_entry *gpio, uint32_t *reg, uint32_t *shift) | ||
31 | { | ||
32 | const uint32_t nv50_gpio_reg[4] = { 0xe104, 0xe108, 0xe280, 0xe284 }; | ||
33 | |||
34 | if (gpio->line > 32) | ||
35 | return -EINVAL; | ||
36 | |||
37 | *reg = nv50_gpio_reg[gpio->line >> 3]; | ||
38 | *shift = (gpio->line & 7) << 2; | ||
39 | return 0; | ||
40 | } | ||
41 | |||
42 | int | ||
43 | nv50_gpio_get(struct drm_device *dev, enum dcb_gpio_tag tag) | ||
44 | { | ||
45 | struct dcb_gpio_entry *gpio; | ||
46 | uint32_t r, s, v; | ||
47 | |||
48 | gpio = nouveau_bios_gpio_entry(dev, tag); | ||
49 | if (!gpio) | ||
50 | return -ENOENT; | ||
51 | |||
52 | if (nv50_gpio_location(gpio, &r, &s)) | ||
53 | return -EINVAL; | ||
54 | |||
55 | v = nv_rd32(dev, r) >> (s + 2); | ||
56 | return ((v & 1) == (gpio->state[1] & 1)); | ||
57 | } | ||
58 | |||
59 | int | ||
60 | nv50_gpio_set(struct drm_device *dev, enum dcb_gpio_tag tag, int state) | ||
61 | { | ||
62 | struct dcb_gpio_entry *gpio; | ||
63 | uint32_t r, s, v; | ||
64 | |||
65 | gpio = nouveau_bios_gpio_entry(dev, tag); | ||
66 | if (!gpio) | ||
67 | return -ENOENT; | ||
68 | |||
69 | if (nv50_gpio_location(gpio, &r, &s)) | ||
70 | return -EINVAL; | ||
71 | |||
72 | v = nv_rd32(dev, r) & ~(0x3 << s); | ||
73 | v |= (gpio->state[state] ^ 2) << s; | ||
74 | nv_wr32(dev, r, v); | ||
75 | return 0; | ||
76 | } | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c index c62b33a02f88..b203d06f601f 100644 --- a/drivers/gpu/drm/nouveau/nv50_graph.c +++ b/drivers/gpu/drm/nouveau/nv50_graph.c | |||
@@ -410,9 +410,10 @@ struct nouveau_pgraph_object_class nv50_graph_grclass[] = { | |||
410 | { 0x5039, false, NULL }, /* m2mf */ | 410 | { 0x5039, false, NULL }, /* m2mf */ |
411 | { 0x502d, false, NULL }, /* 2d */ | 411 | { 0x502d, false, NULL }, /* 2d */ |
412 | { 0x50c0, false, NULL }, /* compute */ | 412 | { 0x50c0, false, NULL }, /* compute */ |
413 | { 0x85c0, false, NULL }, /* compute (nva3, nva5, nva8) */ | ||
413 | { 0x5097, false, NULL }, /* tesla (nv50) */ | 414 | { 0x5097, false, NULL }, /* tesla (nv50) */ |
414 | { 0x8297, false, NULL }, /* tesla (nv80/nv90) */ | 415 | { 0x8297, false, NULL }, /* tesla (nv8x/nv9x) */ |
415 | { 0x8397, false, NULL }, /* tesla (nva0) */ | 416 | { 0x8397, false, NULL }, /* tesla (nva0, nvaa, nvac) */ |
416 | { 0x8597, false, NULL }, /* tesla (nva8) */ | 417 | { 0x8597, false, NULL }, /* tesla (nva3, nva5, nva8) */ |
417 | {} | 418 | {} |
418 | }; | 419 | }; |
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c index 546b31949a30..42a8fb20c1e6 100644 --- a/drivers/gpu/drm/nouveau/nv50_grctx.c +++ b/drivers/gpu/drm/nouveau/nv50_grctx.c | |||
@@ -55,12 +55,12 @@ | |||
55 | #define CP_FLAG_AUTO_LOAD ((2 * 32) + 5) | 55 | #define CP_FLAG_AUTO_LOAD ((2 * 32) + 5) |
56 | #define CP_FLAG_AUTO_LOAD_NOT_PENDING 0 | 56 | #define CP_FLAG_AUTO_LOAD_NOT_PENDING 0 |
57 | #define CP_FLAG_AUTO_LOAD_PENDING 1 | 57 | #define CP_FLAG_AUTO_LOAD_PENDING 1 |
58 | #define CP_FLAG_NEWCTX ((2 * 32) + 10) | ||
59 | #define CP_FLAG_NEWCTX_BUSY 0 | ||
60 | #define CP_FLAG_NEWCTX_DONE 1 | ||
58 | #define CP_FLAG_XFER ((2 * 32) + 11) | 61 | #define CP_FLAG_XFER ((2 * 32) + 11) |
59 | #define CP_FLAG_XFER_IDLE 0 | 62 | #define CP_FLAG_XFER_IDLE 0 |
60 | #define CP_FLAG_XFER_BUSY 1 | 63 | #define CP_FLAG_XFER_BUSY 1 |
61 | #define CP_FLAG_NEWCTX ((2 * 32) + 12) | ||
62 | #define CP_FLAG_NEWCTX_BUSY 0 | ||
63 | #define CP_FLAG_NEWCTX_DONE 1 | ||
64 | #define CP_FLAG_ALWAYS ((2 * 32) + 13) | 64 | #define CP_FLAG_ALWAYS ((2 * 32) + 13) |
65 | #define CP_FLAG_ALWAYS_FALSE 0 | 65 | #define CP_FLAG_ALWAYS_FALSE 0 |
66 | #define CP_FLAG_ALWAYS_TRUE 1 | 66 | #define CP_FLAG_ALWAYS_TRUE 1 |
@@ -177,6 +177,7 @@ nv50_grctx_init(struct nouveau_grctx *ctx) | |||
177 | case 0x96: | 177 | case 0x96: |
178 | case 0x98: | 178 | case 0x98: |
179 | case 0xa0: | 179 | case 0xa0: |
180 | case 0xa3: | ||
180 | case 0xa5: | 181 | case 0xa5: |
181 | case 0xa8: | 182 | case 0xa8: |
182 | case 0xaa: | 183 | case 0xaa: |
@@ -364,6 +365,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) | |||
364 | case 0xac: | 365 | case 0xac: |
365 | gr_def(ctx, 0x401c00, 0x042500df); | 366 | gr_def(ctx, 0x401c00, 0x042500df); |
366 | break; | 367 | break; |
368 | case 0xa3: | ||
367 | case 0xa5: | 369 | case 0xa5: |
368 | case 0xa8: | 370 | case 0xa8: |
369 | gr_def(ctx, 0x401c00, 0x142500df); | 371 | gr_def(ctx, 0x401c00, 0x142500df); |
@@ -418,6 +420,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) | |||
418 | break; | 420 | break; |
419 | case 0x84: | 421 | case 0x84: |
420 | case 0xa0: | 422 | case 0xa0: |
423 | case 0xa3: | ||
421 | case 0xa5: | 424 | case 0xa5: |
422 | case 0xa8: | 425 | case 0xa8: |
423 | case 0xaa: | 426 | case 0xaa: |
@@ -792,6 +795,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) | |||
792 | case 0xa5: | 795 | case 0xa5: |
793 | gr_def(ctx, offset + 0x1c, 0x310c0000); | 796 | gr_def(ctx, offset + 0x1c, 0x310c0000); |
794 | break; | 797 | break; |
798 | case 0xa3: | ||
795 | case 0xa8: | 799 | case 0xa8: |
796 | case 0xaa: | 800 | case 0xaa: |
797 | case 0xac: | 801 | case 0xac: |
@@ -859,6 +863,8 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) | |||
859 | else | 863 | else |
860 | gr_def(ctx, offset + 0x8, 0x05010202); | 864 | gr_def(ctx, offset + 0x8, 0x05010202); |
861 | gr_def(ctx, offset + 0xc, 0x00030201); | 865 | gr_def(ctx, offset + 0xc, 0x00030201); |
866 | if (dev_priv->chipset == 0xa3) | ||
867 | cp_ctx(ctx, base + 0x36c, 1); | ||
862 | 868 | ||
863 | cp_ctx(ctx, base + 0x400, 2); | 869 | cp_ctx(ctx, base + 0x400, 2); |
864 | gr_def(ctx, base + 0x404, 0x00000040); | 870 | gr_def(ctx, base + 0x404, 0x00000040); |
@@ -1159,7 +1165,9 @@ nv50_graph_construct_xfer1(struct nouveau_grctx *ctx) | |||
1159 | nv50_graph_construct_gene_unk8(ctx); | 1165 | nv50_graph_construct_gene_unk8(ctx); |
1160 | if (dev_priv->chipset == 0xa0) | 1166 | if (dev_priv->chipset == 0xa0) |
1161 | xf_emit(ctx, 0x189, 0); | 1167 | xf_emit(ctx, 0x189, 0); |
1162 | else if (dev_priv->chipset < 0xa8) | 1168 | else if (dev_priv->chipset == 0xa3) |
1169 | xf_emit(ctx, 0xd5, 0); | ||
1170 | else if (dev_priv->chipset == 0xa5) | ||
1163 | xf_emit(ctx, 0x99, 0); | 1171 | xf_emit(ctx, 0x99, 0); |
1164 | else if (dev_priv->chipset == 0xaa) | 1172 | else if (dev_priv->chipset == 0xaa) |
1165 | xf_emit(ctx, 0x65, 0); | 1173 | xf_emit(ctx, 0x65, 0); |
@@ -1197,6 +1205,8 @@ nv50_graph_construct_xfer1(struct nouveau_grctx *ctx) | |||
1197 | ctx->ctxvals_pos = offset + 4; | 1205 | ctx->ctxvals_pos = offset + 4; |
1198 | if (dev_priv->chipset == 0xa0) | 1206 | if (dev_priv->chipset == 0xa0) |
1199 | xf_emit(ctx, 0xa80, 0); | 1207 | xf_emit(ctx, 0xa80, 0); |
1208 | else if (dev_priv->chipset == 0xa3) | ||
1209 | xf_emit(ctx, 0xa7c, 0); | ||
1200 | else | 1210 | else |
1201 | xf_emit(ctx, 0xa7a, 0); | 1211 | xf_emit(ctx, 0xa7a, 0); |
1202 | xf_emit(ctx, 1, 0x3fffff); | 1212 | xf_emit(ctx, 1, 0x3fffff); |
@@ -1341,6 +1351,7 @@ nv50_graph_construct_gene_unk1(struct nouveau_grctx *ctx) | |||
1341 | xf_emit(ctx, 0x942, 0); | 1351 | xf_emit(ctx, 0x942, 0); |
1342 | break; | 1352 | break; |
1343 | case 0xa0: | 1353 | case 0xa0: |
1354 | case 0xa3: | ||
1344 | xf_emit(ctx, 0x2042, 0); | 1355 | xf_emit(ctx, 0x2042, 0); |
1345 | break; | 1356 | break; |
1346 | case 0xa5: | 1357 | case 0xa5: |
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index de1f5b0062c5..5f21df31f3aa 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c | |||
@@ -63,9 +63,10 @@ nv50_instmem_init(struct drm_device *dev) | |||
63 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 63 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
64 | struct nouveau_channel *chan; | 64 | struct nouveau_channel *chan; |
65 | uint32_t c_offset, c_size, c_ramfc, c_vmpd, c_base, pt_size; | 65 | uint32_t c_offset, c_size, c_ramfc, c_vmpd, c_base, pt_size; |
66 | uint32_t save_nv001700; | ||
67 | uint64_t v; | ||
66 | struct nv50_instmem_priv *priv; | 68 | struct nv50_instmem_priv *priv; |
67 | int ret, i; | 69 | int ret, i; |
68 | uint32_t v, save_nv001700; | ||
69 | 70 | ||
70 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); | 71 | priv = kzalloc(sizeof(*priv), GFP_KERNEL); |
71 | if (!priv) | 72 | if (!priv) |
@@ -76,17 +77,12 @@ nv50_instmem_init(struct drm_device *dev) | |||
76 | for (i = 0x1700; i <= 0x1710; i += 4) | 77 | for (i = 0x1700; i <= 0x1710; i += 4) |
77 | priv->save1700[(i-0x1700)/4] = nv_rd32(dev, i); | 78 | priv->save1700[(i-0x1700)/4] = nv_rd32(dev, i); |
78 | 79 | ||
79 | if (dev_priv->chipset == 0xaa || dev_priv->chipset == 0xac) | ||
80 | dev_priv->vram_sys_base = nv_rd32(dev, 0x100e10) << 12; | ||
81 | else | ||
82 | dev_priv->vram_sys_base = 0; | ||
83 | |||
84 | /* Reserve the last MiB of VRAM, we should probably try to avoid | 80 | /* Reserve the last MiB of VRAM, we should probably try to avoid |
85 | * setting up the below tables over the top of the VBIOS image at | 81 | * setting up the below tables over the top of the VBIOS image at |
86 | * some point. | 82 | * some point. |
87 | */ | 83 | */ |
88 | dev_priv->ramin_rsvd_vram = 1 << 20; | 84 | dev_priv->ramin_rsvd_vram = 1 << 20; |
89 | c_offset = nouveau_mem_fb_amount(dev) - dev_priv->ramin_rsvd_vram; | 85 | c_offset = dev_priv->vram_size - dev_priv->ramin_rsvd_vram; |
90 | c_size = 128 << 10; | 86 | c_size = 128 << 10; |
91 | c_vmpd = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x1400 : 0x200; | 87 | c_vmpd = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x1400 : 0x200; |
92 | c_ramfc = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x0 : 0x20; | 88 | c_ramfc = ((dev_priv->chipset & 0xf0) == 0x50) ? 0x0 : 0x20; |
@@ -106,7 +102,7 @@ nv50_instmem_init(struct drm_device *dev) | |||
106 | dev_priv->vm_gart_size = NV50_VM_BLOCK; | 102 | dev_priv->vm_gart_size = NV50_VM_BLOCK; |
107 | 103 | ||
108 | dev_priv->vm_vram_base = dev_priv->vm_gart_base + dev_priv->vm_gart_size; | 104 | dev_priv->vm_vram_base = dev_priv->vm_gart_base + dev_priv->vm_gart_size; |
109 | dev_priv->vm_vram_size = nouveau_mem_fb_amount(dev); | 105 | dev_priv->vm_vram_size = dev_priv->vram_size; |
110 | if (dev_priv->vm_vram_size > NV50_VM_MAX_VRAM) | 106 | if (dev_priv->vm_vram_size > NV50_VM_MAX_VRAM) |
111 | dev_priv->vm_vram_size = NV50_VM_MAX_VRAM; | 107 | dev_priv->vm_vram_size = NV50_VM_MAX_VRAM; |
112 | dev_priv->vm_vram_size = roundup(dev_priv->vm_vram_size, NV50_VM_BLOCK); | 108 | dev_priv->vm_vram_size = roundup(dev_priv->vm_vram_size, NV50_VM_BLOCK); |
@@ -189,8 +185,8 @@ nv50_instmem_init(struct drm_device *dev) | |||
189 | 185 | ||
190 | i = 0; | 186 | i = 0; |
191 | while (v < dev_priv->vram_sys_base + c_offset + c_size) { | 187 | while (v < dev_priv->vram_sys_base + c_offset + c_size) { |
192 | BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, v); | 188 | BAR0_WI32(priv->pramin_pt->gpuobj, i + 0, lower_32_bits(v)); |
193 | BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, 0x00000000); | 189 | BAR0_WI32(priv->pramin_pt->gpuobj, i + 4, upper_32_bits(v)); |
194 | v += 0x1000; | 190 | v += 0x1000; |
195 | i += 8; | 191 | i += 8; |
196 | } | 192 | } |
diff --git a/drivers/gpu/drm/nouveau/nv50_sor.c b/drivers/gpu/drm/nouveau/nv50_sor.c index c2fff543b06f..0c68698f23df 100644 --- a/drivers/gpu/drm/nouveau/nv50_sor.c +++ b/drivers/gpu/drm/nouveau/nv50_sor.c | |||
@@ -211,7 +211,7 @@ nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, | |||
211 | mode_ctl = 0x0200; | 211 | mode_ctl = 0x0200; |
212 | break; | 212 | break; |
213 | case OUTPUT_DP: | 213 | case OUTPUT_DP: |
214 | mode_ctl |= 0x00050000; | 214 | mode_ctl |= (nv_encoder->dp.mc_unknown << 16); |
215 | if (nv_encoder->dcb->sorconf.link & 1) | 215 | if (nv_encoder->dcb->sorconf.link & 1) |
216 | mode_ctl |= 0x00000800; | 216 | mode_ctl |= 0x00000800; |
217 | else | 217 | else |
@@ -274,6 +274,7 @@ static const struct drm_encoder_funcs nv50_sor_encoder_funcs = { | |||
274 | int | 274 | int |
275 | nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) | 275 | nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) |
276 | { | 276 | { |
277 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
277 | struct nouveau_encoder *nv_encoder = NULL; | 278 | struct nouveau_encoder *nv_encoder = NULL; |
278 | struct drm_encoder *encoder; | 279 | struct drm_encoder *encoder; |
279 | bool dum; | 280 | bool dum; |
@@ -319,5 +320,27 @@ nv50_sor_create(struct drm_device *dev, struct dcb_entry *entry) | |||
319 | encoder->possible_crtcs = entry->heads; | 320 | encoder->possible_crtcs = entry->heads; |
320 | encoder->possible_clones = 0; | 321 | encoder->possible_clones = 0; |
321 | 322 | ||
323 | if (nv_encoder->dcb->type == OUTPUT_DP) { | ||
324 | uint32_t mc, or = nv_encoder->or; | ||
325 | |||
326 | if (dev_priv->chipset < 0x90 || | ||
327 | dev_priv->chipset == 0x92 || dev_priv->chipset == 0xa0) | ||
328 | mc = nv_rd32(dev, NV50_PDISPLAY_SOR_MODE_CTRL_C(or)); | ||
329 | else | ||
330 | mc = nv_rd32(dev, NV90_PDISPLAY_SOR_MODE_CTRL_C(or)); | ||
331 | |||
332 | switch ((mc & 0x00000f00) >> 8) { | ||
333 | case 8: | ||
334 | case 9: | ||
335 | nv_encoder->dp.mc_unknown = (mc & 0x000f0000) >> 16; | ||
336 | break; | ||
337 | default: | ||
338 | break; | ||
339 | } | ||
340 | |||
341 | if (!nv_encoder->dp.mc_unknown) | ||
342 | nv_encoder->dp.mc_unknown = 5; | ||
343 | } | ||
344 | |||
322 | return 0; | 345 | return 0; |
323 | } | 346 | } |
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c index 07b7ebf1f466..1d569830ed99 100644 --- a/drivers/gpu/drm/radeon/atom.c +++ b/drivers/gpu/drm/radeon/atom.c | |||
@@ -908,11 +908,16 @@ static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) | |||
908 | uint8_t attr = U8((*ptr)++), shift; | 908 | uint8_t attr = U8((*ptr)++), shift; |
909 | uint32_t saved, dst; | 909 | uint32_t saved, dst; |
910 | int dptr = *ptr; | 910 | int dptr = *ptr; |
911 | uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; | ||
911 | SDEBUG(" dst: "); | 912 | SDEBUG(" dst: "); |
912 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); | 913 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
914 | /* op needs to full dst value */ | ||
915 | dst = saved; | ||
913 | shift = atom_get_src(ctx, attr, ptr); | 916 | shift = atom_get_src(ctx, attr, ptr); |
914 | SDEBUG(" shift: %d\n", shift); | 917 | SDEBUG(" shift: %d\n", shift); |
915 | dst <<= shift; | 918 | dst <<= shift; |
919 | dst &= atom_arg_mask[dst_align]; | ||
920 | dst >>= atom_arg_shift[dst_align]; | ||
916 | SDEBUG(" dst: "); | 921 | SDEBUG(" dst: "); |
917 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); | 922 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
918 | } | 923 | } |
@@ -922,11 +927,16 @@ static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) | |||
922 | uint8_t attr = U8((*ptr)++), shift; | 927 | uint8_t attr = U8((*ptr)++), shift; |
923 | uint32_t saved, dst; | 928 | uint32_t saved, dst; |
924 | int dptr = *ptr; | 929 | int dptr = *ptr; |
930 | uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; | ||
925 | SDEBUG(" dst: "); | 931 | SDEBUG(" dst: "); |
926 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); | 932 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
933 | /* op needs to full dst value */ | ||
934 | dst = saved; | ||
927 | shift = atom_get_src(ctx, attr, ptr); | 935 | shift = atom_get_src(ctx, attr, ptr); |
928 | SDEBUG(" shift: %d\n", shift); | 936 | SDEBUG(" shift: %d\n", shift); |
929 | dst >>= shift; | 937 | dst >>= shift; |
938 | dst &= atom_arg_mask[dst_align]; | ||
939 | dst >>= atom_arg_shift[dst_align]; | ||
930 | SDEBUG(" dst: "); | 940 | SDEBUG(" dst: "); |
931 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); | 941 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
932 | } | 942 | } |
@@ -1137,6 +1147,7 @@ static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32 | |||
1137 | int len, ws, ps, ptr; | 1147 | int len, ws, ps, ptr; |
1138 | unsigned char op; | 1148 | unsigned char op; |
1139 | atom_exec_context ectx; | 1149 | atom_exec_context ectx; |
1150 | int ret = 0; | ||
1140 | 1151 | ||
1141 | if (!base) | 1152 | if (!base) |
1142 | return -EINVAL; | 1153 | return -EINVAL; |
@@ -1169,7 +1180,8 @@ static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32 | |||
1169 | if (ectx.abort) { | 1180 | if (ectx.abort) { |
1170 | DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", | 1181 | DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", |
1171 | base, len, ws, ps, ptr - 1); | 1182 | base, len, ws, ps, ptr - 1); |
1172 | return -EINVAL; | 1183 | ret = -EINVAL; |
1184 | goto free; | ||
1173 | } | 1185 | } |
1174 | 1186 | ||
1175 | if (op < ATOM_OP_CNT && op > 0) | 1187 | if (op < ATOM_OP_CNT && op > 0) |
@@ -1184,9 +1196,10 @@ static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32 | |||
1184 | debug_depth--; | 1196 | debug_depth--; |
1185 | SDEBUG("<<\n"); | 1197 | SDEBUG("<<\n"); |
1186 | 1198 | ||
1199 | free: | ||
1187 | if (ws) | 1200 | if (ws) |
1188 | kfree(ectx.ws); | 1201 | kfree(ectx.ws); |
1189 | return 0; | 1202 | return ret; |
1190 | } | 1203 | } |
1191 | 1204 | ||
1192 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) | 1205 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index fd4ef6d18849..a87990b3ae84 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -521,6 +521,10 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
521 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ | 521 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ |
522 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) | 522 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) |
523 | adjusted_clock = mode->clock * 2; | 523 | adjusted_clock = mode->clock * 2; |
524 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) { | ||
525 | pll->algo = PLL_ALGO_LEGACY; | ||
526 | pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER; | ||
527 | } | ||
524 | } else { | 528 | } else { |
525 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) | 529 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) |
526 | pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; | 530 | pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index c9580497ede4..d7388fdb6d0b 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -2891,7 +2891,7 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev, | |||
2891 | { | 2891 | { |
2892 | struct radeon_bo *robj; | 2892 | struct radeon_bo *robj; |
2893 | unsigned long size; | 2893 | unsigned long size; |
2894 | unsigned u, i, w, h; | 2894 | unsigned u, i, w, h, d; |
2895 | int ret; | 2895 | int ret; |
2896 | 2896 | ||
2897 | for (u = 0; u < track->num_texture; u++) { | 2897 | for (u = 0; u < track->num_texture; u++) { |
@@ -2923,20 +2923,25 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev, | |||
2923 | h = h / (1 << i); | 2923 | h = h / (1 << i); |
2924 | if (track->textures[u].roundup_h) | 2924 | if (track->textures[u].roundup_h) |
2925 | h = roundup_pow_of_two(h); | 2925 | h = roundup_pow_of_two(h); |
2926 | if (track->textures[u].tex_coord_type == 1) { | ||
2927 | d = (1 << track->textures[u].txdepth) / (1 << i); | ||
2928 | if (!d) | ||
2929 | d = 1; | ||
2930 | } else { | ||
2931 | d = 1; | ||
2932 | } | ||
2926 | if (track->textures[u].compress_format) { | 2933 | if (track->textures[u].compress_format) { |
2927 | 2934 | ||
2928 | size += r100_track_compress_size(track->textures[u].compress_format, w, h); | 2935 | size += r100_track_compress_size(track->textures[u].compress_format, w, h) * d; |
2929 | /* compressed textures are block based */ | 2936 | /* compressed textures are block based */ |
2930 | } else | 2937 | } else |
2931 | size += w * h; | 2938 | size += w * h * d; |
2932 | } | 2939 | } |
2933 | size *= track->textures[u].cpp; | 2940 | size *= track->textures[u].cpp; |
2934 | 2941 | ||
2935 | switch (track->textures[u].tex_coord_type) { | 2942 | switch (track->textures[u].tex_coord_type) { |
2936 | case 0: | 2943 | case 0: |
2937 | break; | ||
2938 | case 1: | 2944 | case 1: |
2939 | size *= (1 << track->textures[u].txdepth); | ||
2940 | break; | 2945 | break; |
2941 | case 2: | 2946 | case 2: |
2942 | if (track->separate_cube) { | 2947 | if (track->separate_cube) { |
@@ -3007,7 +3012,11 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) | |||
3007 | } | 3012 | } |
3008 | } | 3013 | } |
3009 | prim_walk = (track->vap_vf_cntl >> 4) & 0x3; | 3014 | prim_walk = (track->vap_vf_cntl >> 4) & 0x3; |
3010 | nverts = (track->vap_vf_cntl >> 16) & 0xFFFF; | 3015 | if (track->vap_vf_cntl & (1 << 14)) { |
3016 | nverts = track->vap_alt_nverts; | ||
3017 | } else { | ||
3018 | nverts = (track->vap_vf_cntl >> 16) & 0xFFFF; | ||
3019 | } | ||
3011 | switch (prim_walk) { | 3020 | switch (prim_walk) { |
3012 | case 1: | 3021 | case 1: |
3013 | for (i = 0; i < track->num_arrays; i++) { | 3022 | for (i = 0; i < track->num_arrays; i++) { |
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h index b27a6999d219..fadfe68de9cc 100644 --- a/drivers/gpu/drm/radeon/r100_track.h +++ b/drivers/gpu/drm/radeon/r100_track.h | |||
@@ -64,6 +64,7 @@ struct r100_cs_track { | |||
64 | unsigned maxy; | 64 | unsigned maxy; |
65 | unsigned vtx_size; | 65 | unsigned vtx_size; |
66 | unsigned vap_vf_cntl; | 66 | unsigned vap_vf_cntl; |
67 | unsigned vap_alt_nverts; | ||
67 | unsigned immd_dwords; | 68 | unsigned immd_dwords; |
68 | unsigned num_arrays; | 69 | unsigned num_arrays; |
69 | unsigned max_indx; | 70 | unsigned max_indx; |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 561048a7c0a4..bd75f99bd65e 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -325,11 +325,12 @@ void r300_gpu_init(struct radeon_device *rdev) | |||
325 | 325 | ||
326 | r100_hdp_reset(rdev); | 326 | r100_hdp_reset(rdev); |
327 | /* FIXME: rv380 one pipes ? */ | 327 | /* FIXME: rv380 one pipes ? */ |
328 | if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) { | 328 | if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) || |
329 | (rdev->family == CHIP_R350)) { | ||
329 | /* r300,r350 */ | 330 | /* r300,r350 */ |
330 | rdev->num_gb_pipes = 2; | 331 | rdev->num_gb_pipes = 2; |
331 | } else { | 332 | } else { |
332 | /* rv350,rv370,rv380 */ | 333 | /* rv350,rv370,rv380,r300 AD */ |
333 | rdev->num_gb_pipes = 1; | 334 | rdev->num_gb_pipes = 1; |
334 | } | 335 | } |
335 | rdev->num_z_pipes = 1; | 336 | rdev->num_z_pipes = 1; |
@@ -729,6 +730,12 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
729 | /* VAP_VF_MAX_VTX_INDX */ | 730 | /* VAP_VF_MAX_VTX_INDX */ |
730 | track->max_indx = idx_value & 0x00FFFFFFUL; | 731 | track->max_indx = idx_value & 0x00FFFFFFUL; |
731 | break; | 732 | break; |
733 | case 0x2088: | ||
734 | /* VAP_ALT_NUM_VERTICES - only valid on r500 */ | ||
735 | if (p->rdev->family < CHIP_RV515) | ||
736 | goto fail; | ||
737 | track->vap_alt_nverts = idx_value & 0xFFFFFF; | ||
738 | break; | ||
732 | case 0x43E4: | 739 | case 0x43E4: |
733 | /* SC_SCISSOR1 */ | 740 | /* SC_SCISSOR1 */ |
734 | track->maxy = ((idx_value >> 13) & 0x1FFF) + 1; | 741 | track->maxy = ((idx_value >> 13) & 0x1FFF) + 1; |
@@ -766,7 +773,6 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
766 | tmp = idx_value & ~(0x7 << 16); | 773 | tmp = idx_value & ~(0x7 << 16); |
767 | tmp |= tile_flags; | 774 | tmp |= tile_flags; |
768 | ib[idx] = tmp; | 775 | ib[idx] = tmp; |
769 | |||
770 | i = (reg - 0x4E38) >> 2; | 776 | i = (reg - 0x4E38) >> 2; |
771 | track->cb[i].pitch = idx_value & 0x3FFE; | 777 | track->cb[i].pitch = idx_value & 0x3FFE; |
772 | switch (((idx_value >> 21) & 0xF)) { | 778 | switch (((idx_value >> 21) & 0xF)) { |
@@ -1051,11 +1057,13 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
1051 | break; | 1057 | break; |
1052 | /* fallthrough do not move */ | 1058 | /* fallthrough do not move */ |
1053 | default: | 1059 | default: |
1054 | printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", | 1060 | goto fail; |
1055 | reg, idx); | ||
1056 | return -EINVAL; | ||
1057 | } | 1061 | } |
1058 | return 0; | 1062 | return 0; |
1063 | fail: | ||
1064 | printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", | ||
1065 | reg, idx); | ||
1066 | return -EINVAL; | ||
1059 | } | 1067 | } |
1060 | 1068 | ||
1061 | static int r300_packet3_check(struct radeon_cs_parser *p, | 1069 | static int r300_packet3_check(struct radeon_cs_parser *p, |
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c index dac7042b797e..1d898051c631 100644 --- a/drivers/gpu/drm/radeon/r600_audio.c +++ b/drivers/gpu/drm/radeon/r600_audio.c | |||
@@ -35,7 +35,7 @@ | |||
35 | */ | 35 | */ |
36 | static int r600_audio_chipset_supported(struct radeon_device *rdev) | 36 | static int r600_audio_chipset_supported(struct radeon_device *rdev) |
37 | { | 37 | { |
38 | return rdev->family >= CHIP_R600 | 38 | return (rdev->family >= CHIP_R600 && rdev->family < CHIP_CEDAR) |
39 | || rdev->family == CHIP_RS600 | 39 | || rdev->family == CHIP_RS600 |
40 | || rdev->family == CHIP_RS690 | 40 | || rdev->family == CHIP_RS690 |
41 | || rdev->family == CHIP_RS740; | 41 | || rdev->family == CHIP_RS740; |
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 029fa1406d1d..2616b822ba68 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c | |||
@@ -314,6 +314,9 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod | |||
314 | struct radeon_device *rdev = dev->dev_private; | 314 | struct radeon_device *rdev = dev->dev_private; |
315 | uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset; | 315 | uint32_t offset = to_radeon_encoder(encoder)->hdmi_offset; |
316 | 316 | ||
317 | if (ASIC_IS_DCE4(rdev)) | ||
318 | return; | ||
319 | |||
317 | if (!offset) | 320 | if (!offset) |
318 | return; | 321 | return; |
319 | 322 | ||
@@ -484,6 +487,9 @@ void r600_hdmi_enable(struct drm_encoder *encoder) | |||
484 | struct radeon_device *rdev = dev->dev_private; | 487 | struct radeon_device *rdev = dev->dev_private; |
485 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 488 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
486 | 489 | ||
490 | if (ASIC_IS_DCE4(rdev)) | ||
491 | return; | ||
492 | |||
487 | if (!radeon_encoder->hdmi_offset) { | 493 | if (!radeon_encoder->hdmi_offset) { |
488 | r600_hdmi_assign_block(encoder); | 494 | r600_hdmi_assign_block(encoder); |
489 | if (!radeon_encoder->hdmi_offset) { | 495 | if (!radeon_encoder->hdmi_offset) { |
@@ -525,6 +531,9 @@ void r600_hdmi_disable(struct drm_encoder *encoder) | |||
525 | struct radeon_device *rdev = dev->dev_private; | 531 | struct radeon_device *rdev = dev->dev_private; |
526 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 532 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
527 | 533 | ||
534 | if (ASIC_IS_DCE4(rdev)) | ||
535 | return; | ||
536 | |||
528 | if (!radeon_encoder->hdmi_offset) { | 537 | if (!radeon_encoder->hdmi_offset) { |
529 | dev_err(rdev->dev, "Disabling not enabled HDMI\n"); | 538 | dev_err(rdev->dev, "Disabling not enabled HDMI\n"); |
530 | return; | 539 | return; |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 1fff95505cf5..5673665ff216 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -69,16 +69,19 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev | |||
69 | struct radeon_i2c_bus_rec i2c; | 69 | struct radeon_i2c_bus_rec i2c; |
70 | int index = GetIndexIntoMasterTable(DATA, GPIO_I2C_Info); | 70 | int index = GetIndexIntoMasterTable(DATA, GPIO_I2C_Info); |
71 | struct _ATOM_GPIO_I2C_INFO *i2c_info; | 71 | struct _ATOM_GPIO_I2C_INFO *i2c_info; |
72 | uint16_t data_offset; | 72 | uint16_t data_offset, size; |
73 | int i; | 73 | int i, num_indices; |
74 | 74 | ||
75 | memset(&i2c, 0, sizeof(struct radeon_i2c_bus_rec)); | 75 | memset(&i2c, 0, sizeof(struct radeon_i2c_bus_rec)); |
76 | i2c.valid = false; | 76 | i2c.valid = false; |
77 | 77 | ||
78 | if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) { | 78 | if (atom_parse_data_header(ctx, index, &size, NULL, NULL, &data_offset)) { |
79 | i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); | 79 | i2c_info = (struct _ATOM_GPIO_I2C_INFO *)(ctx->bios + data_offset); |
80 | 80 | ||
81 | for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { | 81 | num_indices = (size - sizeof(ATOM_COMMON_TABLE_HEADER)) / |
82 | sizeof(ATOM_GPIO_I2C_ASSIGMENT); | ||
83 | |||
84 | for (i = 0; i < num_indices; i++) { | ||
82 | gpio = &i2c_info->asGPIO_Info[i]; | 85 | gpio = &i2c_info->asGPIO_Info[i]; |
83 | 86 | ||
84 | if (gpio->sucI2cId.ucAccess == id) { | 87 | if (gpio->sucI2cId.ucAccess == id) { |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 2becdeda68a3..37db8adb2748 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -760,7 +760,9 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct | |||
760 | dac = RBIOS8(dac_info + 0x3) & 0xf; | 760 | dac = RBIOS8(dac_info + 0x3) & 0xf; |
761 | p_dac->ps2_pdac_adj = (bg << 8) | (dac); | 761 | p_dac->ps2_pdac_adj = (bg << 8) | (dac); |
762 | } | 762 | } |
763 | found = 1; | 763 | /* if the values are all zeros, use the table */ |
764 | if (p_dac->ps2_pdac_adj) | ||
765 | found = 1; | ||
764 | } | 766 | } |
765 | 767 | ||
766 | if (!found) /* fallback to defaults */ | 768 | if (!found) /* fallback to defaults */ |
@@ -895,7 +897,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct | |||
895 | bg = RBIOS8(dac_info + 0x10) & 0xf; | 897 | bg = RBIOS8(dac_info + 0x10) & 0xf; |
896 | dac = RBIOS8(dac_info + 0x11) & 0xf; | 898 | dac = RBIOS8(dac_info + 0x11) & 0xf; |
897 | tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); | 899 | tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); |
898 | found = 1; | 900 | /* if the values are all zeros, use the table */ |
901 | if (tv_dac->ps2_tvdac_adj) | ||
902 | found = 1; | ||
899 | } else if (rev > 1) { | 903 | } else if (rev > 1) { |
900 | bg = RBIOS8(dac_info + 0xc) & 0xf; | 904 | bg = RBIOS8(dac_info + 0xc) & 0xf; |
901 | dac = (RBIOS8(dac_info + 0xc) >> 4) & 0xf; | 905 | dac = (RBIOS8(dac_info + 0xc) >> 4) & 0xf; |
@@ -908,7 +912,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct | |||
908 | bg = RBIOS8(dac_info + 0xe) & 0xf; | 912 | bg = RBIOS8(dac_info + 0xe) & 0xf; |
909 | dac = (RBIOS8(dac_info + 0xe) >> 4) & 0xf; | 913 | dac = (RBIOS8(dac_info + 0xe) >> 4) & 0xf; |
910 | tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); | 914 | tv_dac->ntsc_tvdac_adj = (bg << 16) | (dac << 20); |
911 | found = 1; | 915 | /* if the values are all zeros, use the table */ |
916 | if (tv_dac->ps2_tvdac_adj) | ||
917 | found = 1; | ||
912 | } | 918 | } |
913 | tv_dac->tv_std = radeon_combios_get_tv_info(rdev); | 919 | tv_dac->tv_std = radeon_combios_get_tv_info(rdev); |
914 | } | 920 | } |
@@ -925,7 +931,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct | |||
925 | (bg << 16) | (dac << 20); | 931 | (bg << 16) | (dac << 20); |
926 | tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; | 932 | tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; |
927 | tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; | 933 | tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; |
928 | found = 1; | 934 | /* if the values are all zeros, use the table */ |
935 | if (tv_dac->ps2_tvdac_adj) | ||
936 | found = 1; | ||
929 | } else { | 937 | } else { |
930 | bg = RBIOS8(dac_info + 0x4) & 0xf; | 938 | bg = RBIOS8(dac_info + 0x4) & 0xf; |
931 | dac = RBIOS8(dac_info + 0x5) & 0xf; | 939 | dac = RBIOS8(dac_info + 0x5) & 0xf; |
@@ -933,7 +941,9 @@ struct radeon_encoder_tv_dac *radeon_combios_get_tv_dac_info(struct | |||
933 | (bg << 16) | (dac << 20); | 941 | (bg << 16) | (dac << 20); |
934 | tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; | 942 | tv_dac->pal_tvdac_adj = tv_dac->ps2_tvdac_adj; |
935 | tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; | 943 | tv_dac->ntsc_tvdac_adj = tv_dac->ps2_tvdac_adj; |
936 | found = 1; | 944 | /* if the values are all zeros, use the table */ |
945 | if (tv_dac->ps2_tvdac_adj) | ||
946 | found = 1; | ||
937 | } | 947 | } |
938 | } else { | 948 | } else { |
939 | DRM_INFO("No TV DAC info found in BIOS\n"); | 949 | DRM_INFO("No TV DAC info found in BIOS\n"); |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 60d59816b94f..1331351c5178 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -162,12 +162,14 @@ radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |||
162 | { | 162 | { |
163 | struct drm_device *dev = connector->dev; | 163 | struct drm_device *dev = connector->dev; |
164 | struct drm_connector *conflict; | 164 | struct drm_connector *conflict; |
165 | struct radeon_connector *radeon_conflict; | ||
165 | int i; | 166 | int i; |
166 | 167 | ||
167 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { | 168 | list_for_each_entry(conflict, &dev->mode_config.connector_list, head) { |
168 | if (conflict == connector) | 169 | if (conflict == connector) |
169 | continue; | 170 | continue; |
170 | 171 | ||
172 | radeon_conflict = to_radeon_connector(conflict); | ||
171 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | 173 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
172 | if (conflict->encoder_ids[i] == 0) | 174 | if (conflict->encoder_ids[i] == 0) |
173 | break; | 175 | break; |
@@ -177,6 +179,9 @@ radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, | |||
177 | if (conflict->status != connector_status_connected) | 179 | if (conflict->status != connector_status_connected) |
178 | continue; | 180 | continue; |
179 | 181 | ||
182 | if (radeon_conflict->use_digital) | ||
183 | continue; | ||
184 | |||
180 | if (priority == true) { | 185 | if (priority == true) { |
181 | DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); | 186 | DRM_INFO("1: conflicting encoders switching off %s\n", drm_get_connector_name(conflict)); |
182 | DRM_INFO("in favor of %s\n", drm_get_connector_name(connector)); | 187 | DRM_INFO("in favor of %s\n", drm_get_connector_name(connector)); |
@@ -287,6 +292,7 @@ int radeon_connector_set_property(struct drm_connector *connector, struct drm_pr | |||
287 | 292 | ||
288 | if (property == rdev->mode_info.coherent_mode_property) { | 293 | if (property == rdev->mode_info.coherent_mode_property) { |
289 | struct radeon_encoder_atom_dig *dig; | 294 | struct radeon_encoder_atom_dig *dig; |
295 | bool new_coherent_mode; | ||
290 | 296 | ||
291 | /* need to find digital encoder on connector */ | 297 | /* need to find digital encoder on connector */ |
292 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); | 298 | encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS); |
@@ -299,8 +305,11 @@ int radeon_connector_set_property(struct drm_connector *connector, struct drm_pr | |||
299 | return 0; | 305 | return 0; |
300 | 306 | ||
301 | dig = radeon_encoder->enc_priv; | 307 | dig = radeon_encoder->enc_priv; |
302 | dig->coherent_mode = val ? true : false; | 308 | new_coherent_mode = val ? true : false; |
303 | radeon_property_change_mode(&radeon_encoder->base); | 309 | if (dig->coherent_mode != new_coherent_mode) { |
310 | dig->coherent_mode = new_coherent_mode; | ||
311 | radeon_property_change_mode(&radeon_encoder->base); | ||
312 | } | ||
304 | } | 313 | } |
305 | 314 | ||
306 | if (property == rdev->mode_info.tv_std_property) { | 315 | if (property == rdev->mode_info.tv_std_property) { |
@@ -315,7 +324,7 @@ int radeon_connector_set_property(struct drm_connector *connector, struct drm_pr | |||
315 | radeon_encoder = to_radeon_encoder(encoder); | 324 | radeon_encoder = to_radeon_encoder(encoder); |
316 | if (!radeon_encoder->enc_priv) | 325 | if (!radeon_encoder->enc_priv) |
317 | return 0; | 326 | return 0; |
318 | if (rdev->is_atom_bios) { | 327 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) { |
319 | struct radeon_encoder_atom_dac *dac_int; | 328 | struct radeon_encoder_atom_dac *dac_int; |
320 | dac_int = radeon_encoder->enc_priv; | 329 | dac_int = radeon_encoder->enc_priv; |
321 | dac_int->tv_std = val; | 330 | dac_int->tv_std = val; |
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index dc6eba6b96dd..419630dd2075 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c | |||
@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv) | |||
417 | return -EBUSY; | 417 | return -EBUSY; |
418 | } | 418 | } |
419 | 419 | ||
420 | static void radeon_init_pipes(drm_radeon_private_t *dev_priv) | 420 | static void radeon_init_pipes(struct drm_device *dev) |
421 | { | 421 | { |
422 | drm_radeon_private_t *dev_priv = dev->dev_private; | ||
422 | uint32_t gb_tile_config, gb_pipe_sel = 0; | 423 | uint32_t gb_tile_config, gb_pipe_sel = 0; |
423 | 424 | ||
424 | if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { | 425 | if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { |
@@ -436,11 +437,12 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv) | |||
436 | dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; | 437 | dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; |
437 | } else { | 438 | } else { |
438 | /* R3xx */ | 439 | /* R3xx */ |
439 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || | 440 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 && |
441 | dev->pdev->device != 0x4144) || | ||
440 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { | 442 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { |
441 | dev_priv->num_gb_pipes = 2; | 443 | dev_priv->num_gb_pipes = 2; |
442 | } else { | 444 | } else { |
443 | /* R3Vxx */ | 445 | /* RV3xx/R300 AD */ |
444 | dev_priv->num_gb_pipes = 1; | 446 | dev_priv->num_gb_pipes = 1; |
445 | } | 447 | } |
446 | } | 448 | } |
@@ -736,7 +738,7 @@ static int radeon_do_engine_reset(struct drm_device * dev) | |||
736 | 738 | ||
737 | /* setup the raster pipes */ | 739 | /* setup the raster pipes */ |
738 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) | 740 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) |
739 | radeon_init_pipes(dev_priv); | 741 | radeon_init_pipes(dev); |
740 | 742 | ||
741 | /* Reset the CP ring */ | 743 | /* Reset the CP ring */ |
742 | radeon_do_cp_reset(dev_priv); | 744 | radeon_do_cp_reset(dev_priv); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index bddf17f97da8..7b629e305560 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -36,6 +36,54 @@ | |||
36 | #include "radeon.h" | 36 | #include "radeon.h" |
37 | #include "atom.h" | 37 | #include "atom.h" |
38 | 38 | ||
39 | static const char radeon_family_name[][16] = { | ||
40 | "R100", | ||
41 | "RV100", | ||
42 | "RS100", | ||
43 | "RV200", | ||
44 | "RS200", | ||
45 | "R200", | ||
46 | "RV250", | ||
47 | "RS300", | ||
48 | "RV280", | ||
49 | "R300", | ||
50 | "R350", | ||
51 | "RV350", | ||
52 | "RV380", | ||
53 | "R420", | ||
54 | "R423", | ||
55 | "RV410", | ||
56 | "RS400", | ||
57 | "RS480", | ||
58 | "RS600", | ||
59 | "RS690", | ||
60 | "RS740", | ||
61 | "RV515", | ||
62 | "R520", | ||
63 | "RV530", | ||
64 | "RV560", | ||
65 | "RV570", | ||
66 | "R580", | ||
67 | "R600", | ||
68 | "RV610", | ||
69 | "RV630", | ||
70 | "RV670", | ||
71 | "RV620", | ||
72 | "RV635", | ||
73 | "RS780", | ||
74 | "RS880", | ||
75 | "RV770", | ||
76 | "RV730", | ||
77 | "RV710", | ||
78 | "RV740", | ||
79 | "CEDAR", | ||
80 | "REDWOOD", | ||
81 | "JUNIPER", | ||
82 | "CYPRESS", | ||
83 | "HEMLOCK", | ||
84 | "LAST", | ||
85 | }; | ||
86 | |||
39 | /* | 87 | /* |
40 | * Clear GPU surface registers. | 88 | * Clear GPU surface registers. |
41 | */ | 89 | */ |
@@ -526,7 +574,6 @@ int radeon_device_init(struct radeon_device *rdev, | |||
526 | int r; | 574 | int r; |
527 | int dma_bits; | 575 | int dma_bits; |
528 | 576 | ||
529 | DRM_INFO("radeon: Initializing kernel modesetting.\n"); | ||
530 | rdev->shutdown = false; | 577 | rdev->shutdown = false; |
531 | rdev->dev = &pdev->dev; | 578 | rdev->dev = &pdev->dev; |
532 | rdev->ddev = ddev; | 579 | rdev->ddev = ddev; |
@@ -538,6 +585,10 @@ int radeon_device_init(struct radeon_device *rdev, | |||
538 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; | 585 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; |
539 | rdev->gpu_lockup = false; | 586 | rdev->gpu_lockup = false; |
540 | rdev->accel_working = false; | 587 | rdev->accel_working = false; |
588 | |||
589 | DRM_INFO("initializing kernel modesetting (%s 0x%04X:0x%04X).\n", | ||
590 | radeon_family_name[rdev->family], pdev->vendor, pdev->device); | ||
591 | |||
541 | /* mutex initialization are all done here so we | 592 | /* mutex initialization are all done here so we |
542 | * can recall function without having locking issues */ | 593 | * can recall function without having locking issues */ |
543 | mutex_init(&rdev->cs_mutex); | 594 | mutex_init(&rdev->cs_mutex); |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 055a51732dcb..4b05563d99e1 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -43,9 +43,10 @@ | |||
43 | * - 2.0.0 - initial interface | 43 | * - 2.0.0 - initial interface |
44 | * - 2.1.0 - add square tiling interface | 44 | * - 2.1.0 - add square tiling interface |
45 | * - 2.2.0 - add r6xx/r7xx const buffer support | 45 | * - 2.2.0 - add r6xx/r7xx const buffer support |
46 | * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs | ||
46 | */ | 47 | */ |
47 | #define KMS_DRIVER_MAJOR 2 | 48 | #define KMS_DRIVER_MAJOR 2 |
48 | #define KMS_DRIVER_MINOR 2 | 49 | #define KMS_DRIVER_MINOR 3 |
49 | #define KMS_DRIVER_PATCHLEVEL 0 | 50 | #define KMS_DRIVER_PATCHLEVEL 0 |
50 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); | 51 | int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); |
51 | int radeon_driver_unload_kms(struct drm_device *dev); | 52 | int radeon_driver_unload_kms(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 52d6f96f274b..30293bec0801 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -317,12 +317,8 @@ atombios_dac_setup(struct drm_encoder *encoder, int action) | |||
317 | struct radeon_device *rdev = dev->dev_private; | 317 | struct radeon_device *rdev = dev->dev_private; |
318 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 318 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
319 | DAC_ENCODER_CONTROL_PS_ALLOCATION args; | 319 | DAC_ENCODER_CONTROL_PS_ALLOCATION args; |
320 | int index = 0, num = 0; | 320 | int index = 0; |
321 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; | 321 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; |
322 | enum radeon_tv_std tv_std = TV_STD_NTSC; | ||
323 | |||
324 | if (dac_info->tv_std) | ||
325 | tv_std = dac_info->tv_std; | ||
326 | 322 | ||
327 | memset(&args, 0, sizeof(args)); | 323 | memset(&args, 0, sizeof(args)); |
328 | 324 | ||
@@ -330,12 +326,10 @@ atombios_dac_setup(struct drm_encoder *encoder, int action) | |||
330 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 326 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
331 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | 327 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
332 | index = GetIndexIntoMasterTable(COMMAND, DAC1EncoderControl); | 328 | index = GetIndexIntoMasterTable(COMMAND, DAC1EncoderControl); |
333 | num = 1; | ||
334 | break; | 329 | break; |
335 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 330 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
336 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: | 331 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: |
337 | index = GetIndexIntoMasterTable(COMMAND, DAC2EncoderControl); | 332 | index = GetIndexIntoMasterTable(COMMAND, DAC2EncoderControl); |
338 | num = 2; | ||
339 | break; | 333 | break; |
340 | } | 334 | } |
341 | 335 | ||
@@ -346,7 +340,7 @@ atombios_dac_setup(struct drm_encoder *encoder, int action) | |||
346 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) | 340 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
347 | args.ucDacStandard = ATOM_DAC1_CV; | 341 | args.ucDacStandard = ATOM_DAC1_CV; |
348 | else { | 342 | else { |
349 | switch (tv_std) { | 343 | switch (dac_info->tv_std) { |
350 | case TV_STD_PAL: | 344 | case TV_STD_PAL: |
351 | case TV_STD_PAL_M: | 345 | case TV_STD_PAL_M: |
352 | case TV_STD_SCART_PAL: | 346 | case TV_STD_SCART_PAL: |
@@ -377,10 +371,6 @@ atombios_tv_setup(struct drm_encoder *encoder, int action) | |||
377 | TV_ENCODER_CONTROL_PS_ALLOCATION args; | 371 | TV_ENCODER_CONTROL_PS_ALLOCATION args; |
378 | int index = 0; | 372 | int index = 0; |
379 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; | 373 | struct radeon_encoder_atom_dac *dac_info = radeon_encoder->enc_priv; |
380 | enum radeon_tv_std tv_std = TV_STD_NTSC; | ||
381 | |||
382 | if (dac_info->tv_std) | ||
383 | tv_std = dac_info->tv_std; | ||
384 | 374 | ||
385 | memset(&args, 0, sizeof(args)); | 375 | memset(&args, 0, sizeof(args)); |
386 | 376 | ||
@@ -391,7 +381,7 @@ atombios_tv_setup(struct drm_encoder *encoder, int action) | |||
391 | if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) | 381 | if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
392 | args.sTVEncoder.ucTvStandard = ATOM_TV_CV; | 382 | args.sTVEncoder.ucTvStandard = ATOM_TV_CV; |
393 | else { | 383 | else { |
394 | switch (tv_std) { | 384 | switch (dac_info->tv_std) { |
395 | case TV_STD_NTSC: | 385 | case TV_STD_NTSC: |
396 | args.sTVEncoder.ucTvStandard = ATOM_TV_NTSC; | 386 | args.sTVEncoder.ucTvStandard = ATOM_TV_NTSC; |
397 | break; | 387 | break; |
@@ -875,6 +865,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
875 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { | 865 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
876 | if (dig->coherent_mode) | 866 | if (dig->coherent_mode) |
877 | args.v3.acConfig.fCoherentMode = 1; | 867 | args.v3.acConfig.fCoherentMode = 1; |
868 | if (radeon_encoder->pixel_clock > 165000) | ||
869 | args.v3.acConfig.fDualLinkConnector = 1; | ||
878 | } | 870 | } |
879 | } else if (ASIC_IS_DCE32(rdev)) { | 871 | } else if (ASIC_IS_DCE32(rdev)) { |
880 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; | 872 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; |
@@ -898,6 +890,8 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
898 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { | 890 | else if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
899 | if (dig->coherent_mode) | 891 | if (dig->coherent_mode) |
900 | args.v2.acConfig.fCoherentMode = 1; | 892 | args.v2.acConfig.fCoherentMode = 1; |
893 | if (radeon_encoder->pixel_clock > 165000) | ||
894 | args.v2.acConfig.fDualLinkConnector = 1; | ||
901 | } | 895 | } |
902 | } else { | 896 | } else { |
903 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; | 897 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; |
@@ -1383,8 +1377,12 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, | |||
1383 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 1377 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
1384 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: | 1378 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: |
1385 | atombios_dac_setup(encoder, ATOM_ENABLE); | 1379 | atombios_dac_setup(encoder, ATOM_ENABLE); |
1386 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) | 1380 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) { |
1387 | atombios_tv_setup(encoder, ATOM_ENABLE); | 1381 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT)) |
1382 | atombios_tv_setup(encoder, ATOM_ENABLE); | ||
1383 | else | ||
1384 | atombios_tv_setup(encoder, ATOM_DISABLE); | ||
1385 | } | ||
1388 | break; | 1386 | break; |
1389 | } | 1387 | } |
1390 | atombios_apply_encoder_quirks(encoder, adjusted_mode); | 1388 | atombios_apply_encoder_quirks(encoder, adjusted_mode); |
@@ -1558,12 +1556,14 @@ static const struct drm_encoder_funcs radeon_atom_enc_funcs = { | |||
1558 | struct radeon_encoder_atom_dac * | 1556 | struct radeon_encoder_atom_dac * |
1559 | radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder) | 1557 | radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder) |
1560 | { | 1558 | { |
1559 | struct drm_device *dev = radeon_encoder->base.dev; | ||
1560 | struct radeon_device *rdev = dev->dev_private; | ||
1561 | struct radeon_encoder_atom_dac *dac = kzalloc(sizeof(struct radeon_encoder_atom_dac), GFP_KERNEL); | 1561 | struct radeon_encoder_atom_dac *dac = kzalloc(sizeof(struct radeon_encoder_atom_dac), GFP_KERNEL); |
1562 | 1562 | ||
1563 | if (!dac) | 1563 | if (!dac) |
1564 | return NULL; | 1564 | return NULL; |
1565 | 1565 | ||
1566 | dac->tv_std = TV_STD_NTSC; | 1566 | dac->tv_std = radeon_atombios_get_tv_info(rdev); |
1567 | return dac; | 1567 | return dac; |
1568 | } | 1568 | } |
1569 | 1569 | ||
@@ -1641,6 +1641,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su | |||
1641 | break; | 1641 | break; |
1642 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 1642 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
1643 | drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); | 1643 | drm_encoder_init(dev, encoder, &radeon_atom_enc_funcs, DRM_MODE_ENCODER_DAC); |
1644 | radeon_encoder->enc_priv = radeon_atombios_set_dac_info(radeon_encoder); | ||
1644 | drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); | 1645 | drm_encoder_helper_add(encoder, &radeon_atom_dac_helper_funcs); |
1645 | break; | 1646 | break; |
1646 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 1647 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
diff --git a/drivers/gpu/drm/radeon/radeon_family.h b/drivers/gpu/drm/radeon/radeon_family.h index 93c7d5d41914..e329066dcabd 100644 --- a/drivers/gpu/drm/radeon/radeon_family.h +++ b/drivers/gpu/drm/radeon/radeon_family.h | |||
@@ -36,7 +36,7 @@ | |||
36 | * Radeon chip families | 36 | * Radeon chip families |
37 | */ | 37 | */ |
38 | enum radeon_family { | 38 | enum radeon_family { |
39 | CHIP_R100, | 39 | CHIP_R100 = 0, |
40 | CHIP_RV100, | 40 | CHIP_RV100, |
41 | CHIP_RS100, | 41 | CHIP_RS100, |
42 | CHIP_RV200, | 42 | CHIP_RV200, |
@@ -99,4 +99,5 @@ enum radeon_chip_flags { | |||
99 | RADEON_IS_PCI = 0x00800000UL, | 99 | RADEON_IS_PCI = 0x00800000UL, |
100 | RADEON_IS_IGPGART = 0x01000000UL, | 100 | RADEON_IS_IGPGART = 0x01000000UL, |
101 | }; | 101 | }; |
102 | |||
102 | #endif | 103 | #endif |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index cf389ce50a8a..2441cca7d775 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -830,8 +830,8 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode) | |||
830 | crtc2_gen_cntl &= ~RADEON_CRTC2_CRT2_ON; | 830 | crtc2_gen_cntl &= ~RADEON_CRTC2_CRT2_ON; |
831 | 831 | ||
832 | if (rdev->family == CHIP_R420 || | 832 | if (rdev->family == CHIP_R420 || |
833 | rdev->family == CHIP_R423 || | 833 | rdev->family == CHIP_R423 || |
834 | rdev->family == CHIP_RV410) | 834 | rdev->family == CHIP_RV410) |
835 | tv_dac_cntl |= (R420_TV_DAC_RDACPD | | 835 | tv_dac_cntl |= (R420_TV_DAC_RDACPD | |
836 | R420_TV_DAC_GDACPD | | 836 | R420_TV_DAC_GDACPD | |
837 | R420_TV_DAC_BDACPD | | 837 | R420_TV_DAC_BDACPD | |
@@ -907,35 +907,43 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder, | |||
907 | if (rdev->family != CHIP_R200) { | 907 | if (rdev->family != CHIP_R200) { |
908 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); | 908 | tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); |
909 | if (rdev->family == CHIP_R420 || | 909 | if (rdev->family == CHIP_R420 || |
910 | rdev->family == CHIP_R423 || | 910 | rdev->family == CHIP_R423 || |
911 | rdev->family == CHIP_RV410) { | 911 | rdev->family == CHIP_RV410) { |
912 | tv_dac_cntl &= ~(RADEON_TV_DAC_STD_MASK | | 912 | tv_dac_cntl &= ~(RADEON_TV_DAC_STD_MASK | |
913 | RADEON_TV_DAC_BGADJ_MASK | | 913 | RADEON_TV_DAC_BGADJ_MASK | |
914 | R420_TV_DAC_DACADJ_MASK | | 914 | R420_TV_DAC_DACADJ_MASK | |
915 | R420_TV_DAC_RDACPD | | 915 | R420_TV_DAC_RDACPD | |
916 | R420_TV_DAC_GDACPD | | 916 | R420_TV_DAC_GDACPD | |
917 | R420_TV_DAC_BDACPD | | 917 | R420_TV_DAC_BDACPD | |
918 | R420_TV_DAC_TVENABLE); | 918 | R420_TV_DAC_TVENABLE); |
919 | } else { | 919 | } else { |
920 | tv_dac_cntl &= ~(RADEON_TV_DAC_STD_MASK | | 920 | tv_dac_cntl &= ~(RADEON_TV_DAC_STD_MASK | |
921 | RADEON_TV_DAC_BGADJ_MASK | | 921 | RADEON_TV_DAC_BGADJ_MASK | |
922 | RADEON_TV_DAC_DACADJ_MASK | | 922 | RADEON_TV_DAC_DACADJ_MASK | |
923 | RADEON_TV_DAC_RDACPD | | 923 | RADEON_TV_DAC_RDACPD | |
924 | RADEON_TV_DAC_GDACPD | | 924 | RADEON_TV_DAC_GDACPD | |
925 | RADEON_TV_DAC_BDACPD); | 925 | RADEON_TV_DAC_BDACPD); |
926 | } | 926 | } |
927 | 927 | ||
928 | /* FIXME TV */ | 928 | tv_dac_cntl |= RADEON_TV_DAC_NBLANK | RADEON_TV_DAC_NHOLD; |
929 | if (tv_dac) { | 929 | |
930 | struct radeon_encoder_tv_dac *tv_dac = radeon_encoder->enc_priv; | 930 | if (is_tv) { |
931 | tv_dac_cntl |= (RADEON_TV_DAC_NBLANK | | 931 | if (tv_dac->tv_std == TV_STD_NTSC || |
932 | RADEON_TV_DAC_NHOLD | | 932 | tv_dac->tv_std == TV_STD_NTSC_J || |
933 | RADEON_TV_DAC_STD_PS2 | | 933 | tv_dac->tv_std == TV_STD_PAL_M || |
934 | tv_dac->ps2_tvdac_adj); | 934 | tv_dac->tv_std == TV_STD_PAL_60) |
935 | tv_dac_cntl |= tv_dac->ntsc_tvdac_adj; | ||
936 | else | ||
937 | tv_dac_cntl |= tv_dac->pal_tvdac_adj; | ||
938 | |||
939 | if (tv_dac->tv_std == TV_STD_NTSC || | ||
940 | tv_dac->tv_std == TV_STD_NTSC_J) | ||
941 | tv_dac_cntl |= RADEON_TV_DAC_STD_NTSC; | ||
942 | else | ||
943 | tv_dac_cntl |= RADEON_TV_DAC_STD_PAL; | ||
935 | } else | 944 | } else |
936 | tv_dac_cntl |= (RADEON_TV_DAC_NBLANK | | 945 | tv_dac_cntl |= (RADEON_TV_DAC_STD_PS2 | |
937 | RADEON_TV_DAC_NHOLD | | 946 | tv_dac->ps2_tvdac_adj); |
938 | RADEON_TV_DAC_STD_PS2); | ||
939 | 947 | ||
940 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 948 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
941 | } | 949 | } |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r300 b/drivers/gpu/drm/radeon/reg_srcs/r300 index 19c4663fa9c6..1e97b2d129fd 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r300 +++ b/drivers/gpu/drm/radeon/reg_srcs/r300 | |||
@@ -125,6 +125,8 @@ r300 0x4f60 | |||
125 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 | 125 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 |
126 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 | 126 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 |
127 | 0x4008 GB_ENABLE | 127 | 0x4008 GB_ENABLE |
128 | 0x4010 GB_MSPOS0 | ||
129 | 0x4014 GB_MSPOS1 | ||
128 | 0x401C GB_SELECT | 130 | 0x401C GB_SELECT |
129 | 0x4020 GB_AA_CONFIG | 131 | 0x4020 GB_AA_CONFIG |
130 | 0x4024 GB_FIFO_SIZE | 132 | 0x4024 GB_FIFO_SIZE |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420 index 989f7a020832..e958980d00f1 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r420 +++ b/drivers/gpu/drm/radeon/reg_srcs/r420 | |||
@@ -125,6 +125,8 @@ r420 0x4f60 | |||
125 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 | 125 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 |
126 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 | 126 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 |
127 | 0x4008 GB_ENABLE | 127 | 0x4008 GB_ENABLE |
128 | 0x4010 GB_MSPOS0 | ||
129 | 0x4014 GB_MSPOS1 | ||
128 | 0x401C GB_SELECT | 130 | 0x401C GB_SELECT |
129 | 0x4020 GB_AA_CONFIG | 131 | 0x4020 GB_AA_CONFIG |
130 | 0x4024 GB_FIFO_SIZE | 132 | 0x4024 GB_FIFO_SIZE |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600 index 6801b865d1c4..83e8bc0c2bb2 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rs600 +++ b/drivers/gpu/drm/radeon/reg_srcs/rs600 | |||
@@ -125,6 +125,8 @@ rs600 0x6d40 | |||
125 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 | 125 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 |
126 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 | 126 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 |
127 | 0x4008 GB_ENABLE | 127 | 0x4008 GB_ENABLE |
128 | 0x4010 GB_MSPOS0 | ||
129 | 0x4014 GB_MSPOS1 | ||
128 | 0x401C GB_SELECT | 130 | 0x401C GB_SELECT |
129 | 0x4020 GB_AA_CONFIG | 131 | 0x4020 GB_AA_CONFIG |
130 | 0x4024 GB_FIFO_SIZE | 132 | 0x4024 GB_FIFO_SIZE |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515 index 38abf63bf2cd..1e46233985eb 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rv515 +++ b/drivers/gpu/drm/radeon/reg_srcs/rv515 | |||
@@ -35,6 +35,7 @@ rv515 0x6d40 | |||
35 | 0x1DA8 VAP_VPORT_ZSCALE | 35 | 0x1DA8 VAP_VPORT_ZSCALE |
36 | 0x1DAC VAP_VPORT_ZOFFSET | 36 | 0x1DAC VAP_VPORT_ZOFFSET |
37 | 0x2080 VAP_CNTL | 37 | 0x2080 VAP_CNTL |
38 | 0x208C VAP_INDEX_OFFSET | ||
38 | 0x2090 VAP_OUT_VTX_FMT_0 | 39 | 0x2090 VAP_OUT_VTX_FMT_0 |
39 | 0x2094 VAP_OUT_VTX_FMT_1 | 40 | 0x2094 VAP_OUT_VTX_FMT_1 |
40 | 0x20B0 VAP_VTE_CNTL | 41 | 0x20B0 VAP_VTE_CNTL |
@@ -158,6 +159,8 @@ rv515 0x6d40 | |||
158 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 | 159 | 0x4000 GB_VAP_RASTER_VTX_FMT_0 |
159 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 | 160 | 0x4004 GB_VAP_RASTER_VTX_FMT_1 |
160 | 0x4008 GB_ENABLE | 161 | 0x4008 GB_ENABLE |
162 | 0x4010 GB_MSPOS0 | ||
163 | 0x4014 GB_MSPOS1 | ||
161 | 0x401C GB_SELECT | 164 | 0x401C GB_SELECT |
162 | 0x4020 GB_AA_CONFIG | 165 | 0x4020 GB_AA_CONFIG |
163 | 0x4024 GB_FIFO_SIZE | 166 | 0x4024 GB_FIFO_SIZE |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index abf824c2123d..a81bc7a21e14 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -159,7 +159,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev) | |||
159 | WREG32_MC(R_000100_MC_PT0_CNTL, tmp); | 159 | WREG32_MC(R_000100_MC_PT0_CNTL, tmp); |
160 | 160 | ||
161 | tmp = RREG32_MC(R_000100_MC_PT0_CNTL); | 161 | tmp = RREG32_MC(R_000100_MC_PT0_CNTL); |
162 | tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) & S_000100_INVALIDATE_L2_CACHE(1); | 162 | tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) | S_000100_INVALIDATE_L2_CACHE(1); |
163 | WREG32_MC(R_000100_MC_PT0_CNTL, tmp); | 163 | WREG32_MC(R_000100_MC_PT0_CNTL, tmp); |
164 | 164 | ||
165 | tmp = RREG32_MC(R_000100_MC_PT0_CNTL); | 165 | tmp = RREG32_MC(R_000100_MC_PT0_CNTL); |
diff --git a/drivers/hwmon/applesmc.c b/drivers/hwmon/applesmc.c index c1605b528e8f..0f28d91f29d8 100644 --- a/drivers/hwmon/applesmc.c +++ b/drivers/hwmon/applesmc.c | |||
@@ -142,6 +142,12 @@ static const char *temperature_sensors_sets[][41] = { | |||
142 | "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", "TM8S", "TM9P", "TM9S", | 142 | "TM1S", "TM2P", "TM2S", "TM3S", "TM8P", "TM8S", "TM9P", "TM9S", |
143 | "TN0C", "TN0D", "TN0H", "TS0C", "Tp0C", "Tp1C", "Tv0S", "Tv1S", | 143 | "TN0C", "TN0D", "TN0H", "TS0C", "Tp0C", "Tp1C", "Tv0S", "Tv1S", |
144 | NULL }, | 144 | NULL }, |
145 | /* Set 17: iMac 9,1 */ | ||
146 | { "TA0P", "TC0D", "TC0H", "TC0P", "TG0D", "TG0H", "TH0P", "TL0P", | ||
147 | "TN0D", "TN0H", "TN0P", "TO0P", "Tm0P", "Tp0P", NULL }, | ||
148 | /* Set 18: MacBook Pro 2,2 */ | ||
149 | { "TB0T", "TC0D", "TC0P", "TG0H", "TG0P", "TG0T", "TM0P", "TTF0", | ||
150 | "Th0H", "Th1H", "Tm0P", "Ts0P", NULL }, | ||
145 | }; | 151 | }; |
146 | 152 | ||
147 | /* List of keys used to read/write fan speeds */ | 153 | /* List of keys used to read/write fan speeds */ |
@@ -1350,6 +1356,10 @@ static __initdata struct dmi_match_data applesmc_dmi_data[] = { | |||
1350 | { .accelerometer = 1, .light = 1, .temperature_set = 15 }, | 1356 | { .accelerometer = 1, .light = 1, .temperature_set = 15 }, |
1351 | /* MacPro3,1: temperature set 16 */ | 1357 | /* MacPro3,1: temperature set 16 */ |
1352 | { .accelerometer = 0, .light = 0, .temperature_set = 16 }, | 1358 | { .accelerometer = 0, .light = 0, .temperature_set = 16 }, |
1359 | /* iMac 9,1: light sensor only, temperature set 17 */ | ||
1360 | { .accelerometer = 0, .light = 0, .temperature_set = 17 }, | ||
1361 | /* MacBook Pro 2,2: accelerometer, backlight and temperature set 18 */ | ||
1362 | { .accelerometer = 1, .light = 1, .temperature_set = 18 }, | ||
1353 | }; | 1363 | }; |
1354 | 1364 | ||
1355 | /* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1". | 1365 | /* Note that DMI_MATCH(...,"MacBook") will match "MacBookPro1,1". |
@@ -1375,6 +1385,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = { | |||
1375 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | 1385 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), |
1376 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro3") }, | 1386 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro3") }, |
1377 | &applesmc_dmi_data[9]}, | 1387 | &applesmc_dmi_data[9]}, |
1388 | { applesmc_dmi_match, "Apple MacBook Pro 2,2", { | ||
1389 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple Computer, Inc."), | ||
1390 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro2,2") }, | ||
1391 | &applesmc_dmi_data[18]}, | ||
1378 | { applesmc_dmi_match, "Apple MacBook Pro", { | 1392 | { applesmc_dmi_match, "Apple MacBook Pro", { |
1379 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), | 1393 | DMI_MATCH(DMI_BOARD_VENDOR,"Apple"), |
1380 | DMI_MATCH(DMI_PRODUCT_NAME,"MacBookPro") }, | 1394 | DMI_MATCH(DMI_PRODUCT_NAME,"MacBookPro") }, |
@@ -1415,6 +1429,10 @@ static __initdata struct dmi_system_id applesmc_whitelist[] = { | |||
1415 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | 1429 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), |
1416 | DMI_MATCH(DMI_PRODUCT_NAME, "MacPro") }, | 1430 | DMI_MATCH(DMI_PRODUCT_NAME, "MacPro") }, |
1417 | &applesmc_dmi_data[4]}, | 1431 | &applesmc_dmi_data[4]}, |
1432 | { applesmc_dmi_match, "Apple iMac 9,1", { | ||
1433 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple Inc."), | ||
1434 | DMI_MATCH(DMI_PRODUCT_NAME, "iMac9,1") }, | ||
1435 | &applesmc_dmi_data[17]}, | ||
1418 | { applesmc_dmi_match, "Apple iMac 8", { | 1436 | { applesmc_dmi_match, "Apple iMac 8", { |
1419 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), | 1437 | DMI_MATCH(DMI_BOARD_VENDOR, "Apple"), |
1420 | DMI_MATCH(DMI_PRODUCT_NAME, "iMac8") }, | 1438 | DMI_MATCH(DMI_PRODUCT_NAME, "iMac8") }, |
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index 1002befd87d5..5be09c048c5f 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c | |||
@@ -539,14 +539,14 @@ static ssize_t set_sensor(struct device *dev, struct device_attribute *attr, | |||
539 | 539 | ||
540 | struct it87_data *data = dev_get_drvdata(dev); | 540 | struct it87_data *data = dev_get_drvdata(dev); |
541 | long val; | 541 | long val; |
542 | u8 reg; | ||
542 | 543 | ||
543 | if (strict_strtol(buf, 10, &val) < 0) | 544 | if (strict_strtol(buf, 10, &val) < 0) |
544 | return -EINVAL; | 545 | return -EINVAL; |
545 | 546 | ||
546 | mutex_lock(&data->update_lock); | 547 | reg = it87_read_value(data, IT87_REG_TEMP_ENABLE); |
547 | 548 | reg &= ~(1 << nr); | |
548 | data->sensor &= ~(1 << nr); | 549 | reg &= ~(8 << nr); |
549 | data->sensor &= ~(8 << nr); | ||
550 | if (val == 2) { /* backwards compatibility */ | 550 | if (val == 2) { /* backwards compatibility */ |
551 | dev_warn(dev, "Sensor type 2 is deprecated, please use 4 " | 551 | dev_warn(dev, "Sensor type 2 is deprecated, please use 4 " |
552 | "instead\n"); | 552 | "instead\n"); |
@@ -554,14 +554,16 @@ static ssize_t set_sensor(struct device *dev, struct device_attribute *attr, | |||
554 | } | 554 | } |
555 | /* 3 = thermal diode; 4 = thermistor; 0 = disabled */ | 555 | /* 3 = thermal diode; 4 = thermistor; 0 = disabled */ |
556 | if (val == 3) | 556 | if (val == 3) |
557 | data->sensor |= 1 << nr; | 557 | reg |= 1 << nr; |
558 | else if (val == 4) | 558 | else if (val == 4) |
559 | data->sensor |= 8 << nr; | 559 | reg |= 8 << nr; |
560 | else if (val != 0) { | 560 | else if (val != 0) |
561 | mutex_unlock(&data->update_lock); | ||
562 | return -EINVAL; | 561 | return -EINVAL; |
563 | } | 562 | |
563 | mutex_lock(&data->update_lock); | ||
564 | data->sensor = reg; | ||
564 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); | 565 | it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor); |
566 | data->valid = 0; /* Force cache refresh */ | ||
565 | mutex_unlock(&data->update_lock); | 567 | mutex_unlock(&data->update_lock); |
566 | return count; | 568 | return count; |
567 | } | 569 | } |
@@ -1841,14 +1843,10 @@ static void __devinit it87_init_device(struct platform_device *pdev) | |||
1841 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); | 1843 | it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127); |
1842 | } | 1844 | } |
1843 | 1845 | ||
1844 | /* Check if temperature channels are reset manually or by some reason */ | 1846 | /* Temperature channels are not forcibly enabled, as they can be |
1845 | tmp = it87_read_value(data, IT87_REG_TEMP_ENABLE); | 1847 | * set to two different sensor types and we can't guess which one |
1846 | if ((tmp & 0x3f) == 0) { | 1848 | * is correct for a given system. These channels can be enabled at |
1847 | /* Temp1,Temp3=thermistor; Temp2=thermal diode */ | 1849 | * run-time through the temp{1-3}_type sysfs accessors if needed. */ |
1848 | tmp = (tmp & 0xc0) | 0x2a; | ||
1849 | it87_write_value(data, IT87_REG_TEMP_ENABLE, tmp); | ||
1850 | } | ||
1851 | data->sensor = tmp; | ||
1852 | 1850 | ||
1853 | /* Check if voltage monitors are reset manually or by some reason */ | 1851 | /* Check if voltage monitors are reset manually or by some reason */ |
1854 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); | 1852 | tmp = it87_read_value(data, IT87_REG_VIN_ENABLE); |
diff --git a/drivers/hwmon/sht15.c b/drivers/hwmon/sht15.c index 6b2d8ae64fe1..a610e7880fb3 100644 --- a/drivers/hwmon/sht15.c +++ b/drivers/hwmon/sht15.c | |||
@@ -303,13 +303,13 @@ error_ret: | |||
303 | **/ | 303 | **/ |
304 | static inline int sht15_calc_temp(struct sht15_data *data) | 304 | static inline int sht15_calc_temp(struct sht15_data *data) |
305 | { | 305 | { |
306 | int d1 = 0; | 306 | int d1 = temppoints[0].d1; |
307 | int i; | 307 | int i; |
308 | 308 | ||
309 | for (i = 1; i < ARRAY_SIZE(temppoints); i++) | 309 | for (i = ARRAY_SIZE(temppoints) - 1; i > 0; i--) |
310 | /* Find pointer to interpolate */ | 310 | /* Find pointer to interpolate */ |
311 | if (data->supply_uV > temppoints[i - 1].vdd) { | 311 | if (data->supply_uV > temppoints[i - 1].vdd) { |
312 | d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd) | 312 | d1 = (data->supply_uV - temppoints[i - 1].vdd) |
313 | * (temppoints[i].d1 - temppoints[i - 1].d1) | 313 | * (temppoints[i].d1 - temppoints[i - 1].d1) |
314 | / (temppoints[i].vdd - temppoints[i - 1].vdd) | 314 | / (temppoints[i].vdd - temppoints[i - 1].vdd) |
315 | + temppoints[i - 1].d1; | 315 | + temppoints[i - 1].d1; |
@@ -542,7 +542,12 @@ static int __devinit sht15_probe(struct platform_device *pdev) | |||
542 | /* If a regulator is available, query what the supply voltage actually is!*/ | 542 | /* If a regulator is available, query what the supply voltage actually is!*/ |
543 | data->reg = regulator_get(data->dev, "vcc"); | 543 | data->reg = regulator_get(data->dev, "vcc"); |
544 | if (!IS_ERR(data->reg)) { | 544 | if (!IS_ERR(data->reg)) { |
545 | data->supply_uV = regulator_get_voltage(data->reg); | 545 | int voltage; |
546 | |||
547 | voltage = regulator_get_voltage(data->reg); | ||
548 | if (voltage) | ||
549 | data->supply_uV = voltage; | ||
550 | |||
546 | regulator_enable(data->reg); | 551 | regulator_enable(data->reg); |
547 | /* setup a notifier block to update this if another device | 552 | /* setup a notifier block to update this if another device |
548 | * causes the voltage to change */ | 553 | * causes the voltage to change */ |
diff --git a/drivers/ide/ide-atapi.c b/drivers/ide/ide-atapi.c index a4046e94158d..f9daffd7d0e3 100644 --- a/drivers/ide/ide-atapi.c +++ b/drivers/ide/ide-atapi.c | |||
@@ -264,8 +264,8 @@ void ide_retry_pc(ide_drive_t *drive) | |||
264 | * of it. The failed command will be retried after sense data | 264 | * of it. The failed command will be retried after sense data |
265 | * is acquired. | 265 | * is acquired. |
266 | */ | 266 | */ |
267 | blk_requeue_request(failed_rq->q, failed_rq); | ||
268 | drive->hwif->rq = NULL; | 267 | drive->hwif->rq = NULL; |
268 | ide_requeue_and_plug(drive, failed_rq); | ||
269 | if (ide_queue_sense_rq(drive, pc)) { | 269 | if (ide_queue_sense_rq(drive, pc)) { |
270 | blk_start_request(failed_rq); | 270 | blk_start_request(failed_rq); |
271 | ide_complete_rq(drive, -EIO, blk_rq_bytes(failed_rq)); | 271 | ide_complete_rq(drive, -EIO, blk_rq_bytes(failed_rq)); |
diff --git a/drivers/ide/ide-dma.c b/drivers/ide/ide-dma.c index 2c17e3fb43e3..06b14bc9a1d4 100644 --- a/drivers/ide/ide-dma.c +++ b/drivers/ide/ide-dma.c | |||
@@ -493,6 +493,7 @@ ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error) | |||
493 | if (rq) { | 493 | if (rq) { |
494 | hwif->rq = NULL; | 494 | hwif->rq = NULL; |
495 | rq->errors = 0; | 495 | rq->errors = 0; |
496 | ide_requeue_and_plug(drive, rq); | ||
496 | } | 497 | } |
497 | return ret; | 498 | return ret; |
498 | } | 499 | } |
diff --git a/drivers/ide/ide-io.c b/drivers/ide/ide-io.c index db96138fefcd..172ac9218154 100644 --- a/drivers/ide/ide-io.c +++ b/drivers/ide/ide-io.c | |||
@@ -566,7 +566,7 @@ plug_device_2: | |||
566 | blk_plug_device(q); | 566 | blk_plug_device(q); |
567 | } | 567 | } |
568 | 568 | ||
569 | static void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq) | 569 | void ide_requeue_and_plug(ide_drive_t *drive, struct request *rq) |
570 | { | 570 | { |
571 | struct request_queue *q = drive->queue; | 571 | struct request_queue *q = drive->queue; |
572 | unsigned long flags; | 572 | unsigned long flags; |
diff --git a/drivers/ide/ide-taskfile.c b/drivers/ide/ide-taskfile.c index cc8633cbe133..67fb73559fd5 100644 --- a/drivers/ide/ide-taskfile.c +++ b/drivers/ide/ide-taskfile.c | |||
@@ -428,13 +428,11 @@ int ide_raw_taskfile(ide_drive_t *drive, struct ide_cmd *cmd, u8 *buf, | |||
428 | { | 428 | { |
429 | struct request *rq; | 429 | struct request *rq; |
430 | int error; | 430 | int error; |
431 | int rw = !(cmd->tf_flags & IDE_TFLAG_WRITE) ? READ : WRITE; | ||
431 | 432 | ||
432 | rq = blk_get_request(drive->queue, READ, __GFP_WAIT); | 433 | rq = blk_get_request(drive->queue, rw, __GFP_WAIT); |
433 | rq->cmd_type = REQ_TYPE_ATA_TASKFILE; | 434 | rq->cmd_type = REQ_TYPE_ATA_TASKFILE; |
434 | 435 | ||
435 | if (cmd->tf_flags & IDE_TFLAG_WRITE) | ||
436 | rq->cmd_flags |= REQ_RW; | ||
437 | |||
438 | /* | 436 | /* |
439 | * (ks) We transfer currently only whole sectors. | 437 | * (ks) We transfer currently only whole sectors. |
440 | * This is suffient for now. But, it would be great, | 438 | * This is suffient for now. But, it would be great, |
diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c index fc73d6ac11b6..ad63b79afac1 100644 --- a/drivers/infiniband/core/cm.c +++ b/drivers/infiniband/core/cm.c | |||
@@ -3694,7 +3694,7 @@ static void cm_add_one(struct ib_device *ib_device) | |||
3694 | cm_dev->device = device_create(&cm_class, &ib_device->dev, | 3694 | cm_dev->device = device_create(&cm_class, &ib_device->dev, |
3695 | MKDEV(0, 0), NULL, | 3695 | MKDEV(0, 0), NULL, |
3696 | "%s", ib_device->name); | 3696 | "%s", ib_device->name); |
3697 | if (!cm_dev->device) { | 3697 | if (IS_ERR(cm_dev->device)) { |
3698 | kfree(cm_dev); | 3698 | kfree(cm_dev); |
3699 | return; | 3699 | return; |
3700 | } | 3700 | } |
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c index 7794249430ca..6d777069d86d 100644 --- a/drivers/infiniband/core/cma.c +++ b/drivers/infiniband/core/cma.c | |||
@@ -1684,6 +1684,7 @@ int rdma_set_ib_paths(struct rdma_cm_id *id, | |||
1684 | } | 1684 | } |
1685 | 1685 | ||
1686 | memcpy(id->route.path_rec, path_rec, sizeof *path_rec * num_paths); | 1686 | memcpy(id->route.path_rec, path_rec, sizeof *path_rec * num_paths); |
1687 | id->route.num_paths = num_paths; | ||
1687 | return 0; | 1688 | return 0; |
1688 | err: | 1689 | err: |
1689 | cma_comp_exch(id_priv, CMA_ROUTE_RESOLVED, CMA_ADDR_RESOLVED); | 1690 | cma_comp_exch(id_priv, CMA_ROUTE_RESOLVED, CMA_ADDR_RESOLVED); |
diff --git a/drivers/infiniband/hw/mlx4/mr.c b/drivers/infiniband/hw/mlx4/mr.c index 56147b28a23a..1d27b9a8e2d6 100644 --- a/drivers/infiniband/hw/mlx4/mr.c +++ b/drivers/infiniband/hw/mlx4/mr.c | |||
@@ -240,7 +240,7 @@ struct ib_fast_reg_page_list *mlx4_ib_alloc_fast_reg_page_list(struct ib_device | |||
240 | mfrpl->mapped_page_list = dma_alloc_coherent(&dev->dev->pdev->dev, | 240 | mfrpl->mapped_page_list = dma_alloc_coherent(&dev->dev->pdev->dev, |
241 | size, &mfrpl->map, | 241 | size, &mfrpl->map, |
242 | GFP_KERNEL); | 242 | GFP_KERNEL); |
243 | if (!mfrpl->ibfrpl.page_list) | 243 | if (!mfrpl->mapped_page_list) |
244 | goto err_free; | 244 | goto err_free; |
245 | 245 | ||
246 | WARN_ON(mfrpl->map & 0x3f); | 246 | WARN_ON(mfrpl->map & 0x3f); |
diff --git a/drivers/infiniband/hw/nes/nes_verbs.c b/drivers/infiniband/hw/nes/nes_verbs.c index 5a076e8f116a..e54f312e4bdc 100644 --- a/drivers/infiniband/hw/nes/nes_verbs.c +++ b/drivers/infiniband/hw/nes/nes_verbs.c | |||
@@ -2821,11 +2821,10 @@ static int nes_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, | |||
2821 | attr->cap.max_send_wr = nesqp->hwqp.sq_size; | 2821 | attr->cap.max_send_wr = nesqp->hwqp.sq_size; |
2822 | attr->cap.max_recv_wr = nesqp->hwqp.rq_size; | 2822 | attr->cap.max_recv_wr = nesqp->hwqp.rq_size; |
2823 | attr->cap.max_recv_sge = 1; | 2823 | attr->cap.max_recv_sge = 1; |
2824 | if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) { | 2824 | if (nes_drv_opt & NES_DRV_OPT_NO_INLINE_DATA) |
2825 | init_attr->cap.max_inline_data = 0; | 2825 | attr->cap.max_inline_data = 0; |
2826 | } else { | 2826 | else |
2827 | init_attr->cap.max_inline_data = 64; | 2827 | attr->cap.max_inline_data = 64; |
2828 | } | ||
2829 | 2828 | ||
2830 | init_attr->event_handler = nesqp->ibqp.event_handler; | 2829 | init_attr->event_handler = nesqp->ibqp.event_handler; |
2831 | init_attr->qp_context = nesqp->ibqp.qp_context; | 2830 | init_attr->qp_context = nesqp->ibqp.qp_context; |
diff --git a/drivers/input/input.c b/drivers/input/input.c index afd4e2b7658c..9c79bd56b51a 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c | |||
@@ -660,7 +660,14 @@ static int input_default_setkeycode(struct input_dev *dev, | |||
660 | int input_get_keycode(struct input_dev *dev, | 660 | int input_get_keycode(struct input_dev *dev, |
661 | unsigned int scancode, unsigned int *keycode) | 661 | unsigned int scancode, unsigned int *keycode) |
662 | { | 662 | { |
663 | return dev->getkeycode(dev, scancode, keycode); | 663 | unsigned long flags; |
664 | int retval; | ||
665 | |||
666 | spin_lock_irqsave(&dev->event_lock, flags); | ||
667 | retval = dev->getkeycode(dev, scancode, keycode); | ||
668 | spin_unlock_irqrestore(&dev->event_lock, flags); | ||
669 | |||
670 | return retval; | ||
664 | } | 671 | } |
665 | EXPORT_SYMBOL(input_get_keycode); | 672 | EXPORT_SYMBOL(input_get_keycode); |
666 | 673 | ||
diff --git a/drivers/input/keyboard/matrix_keypad.c b/drivers/input/keyboard/matrix_keypad.c index ffc25cfcef7a..b443e088fd3c 100644 --- a/drivers/input/keyboard/matrix_keypad.c +++ b/drivers/input/keyboard/matrix_keypad.c | |||
@@ -374,7 +374,9 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev) | |||
374 | input_dev->name = pdev->name; | 374 | input_dev->name = pdev->name; |
375 | input_dev->id.bustype = BUS_HOST; | 375 | input_dev->id.bustype = BUS_HOST; |
376 | input_dev->dev.parent = &pdev->dev; | 376 | input_dev->dev.parent = &pdev->dev; |
377 | input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REP); | 377 | input_dev->evbit[0] = BIT_MASK(EV_KEY); |
378 | if (!pdata->no_autorepeat) | ||
379 | input_dev->evbit[0] |= BIT_MASK(EV_REP); | ||
378 | input_dev->open = matrix_keypad_start; | 380 | input_dev->open = matrix_keypad_start; |
379 | input_dev->close = matrix_keypad_stop; | 381 | input_dev->close = matrix_keypad_stop; |
380 | 382 | ||
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c index 99d58764ef03..0d22cb9ce42e 100644 --- a/drivers/input/mouse/alps.c +++ b/drivers/input/mouse/alps.c | |||
@@ -64,6 +64,7 @@ static const struct alps_model_info alps_model_data[] = { | |||
64 | { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, | 64 | { { 0x62, 0x02, 0x14 }, 0xcf, 0xcf, |
65 | ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, | 65 | ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, |
66 | { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */ | 66 | { { 0x73, 0x02, 0x50 }, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */ |
67 | { { 0x73, 0x02, 0x64 }, 0xf8, 0xf8, 0 }, /* HP Pavilion dm3 */ | ||
67 | { { 0x52, 0x01, 0x14 }, 0xff, 0xff, | 68 | { { 0x52, 0x01, 0x14 }, 0xff, 0xff, |
68 | ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, /* Toshiba Tecra A11-11L */ | 69 | ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, /* Toshiba Tecra A11-11L */ |
69 | }; | 70 | }; |
diff --git a/drivers/input/mouse/bcm5974.c b/drivers/input/mouse/bcm5974.c index 4f8fe0886b2a..b89879bd860f 100644 --- a/drivers/input/mouse/bcm5974.c +++ b/drivers/input/mouse/bcm5974.c | |||
@@ -803,7 +803,6 @@ static struct usb_driver bcm5974_driver = { | |||
803 | .disconnect = bcm5974_disconnect, | 803 | .disconnect = bcm5974_disconnect, |
804 | .suspend = bcm5974_suspend, | 804 | .suspend = bcm5974_suspend, |
805 | .resume = bcm5974_resume, | 805 | .resume = bcm5974_resume, |
806 | .reset_resume = bcm5974_resume, | ||
807 | .id_table = bcm5974_table, | 806 | .id_table = bcm5974_table, |
808 | .supports_autosuspend = 1, | 807 | .supports_autosuspend = 1, |
809 | }; | 808 | }; |
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index 577688b5b951..6440a8f55686 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c | |||
@@ -39,7 +39,7 @@ MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port."); | |||
39 | 39 | ||
40 | static bool i8042_nomux; | 40 | static bool i8042_nomux; |
41 | module_param_named(nomux, i8042_nomux, bool, 0); | 41 | module_param_named(nomux, i8042_nomux, bool, 0); |
42 | MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present."); | 42 | MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing controller is present."); |
43 | 43 | ||
44 | static bool i8042_unlock; | 44 | static bool i8042_unlock; |
45 | module_param_named(unlock, i8042_unlock, bool, 0); | 45 | module_param_named(unlock, i8042_unlock, bool, 0); |
diff --git a/drivers/input/sparse-keymap.c b/drivers/input/sparse-keymap.c index 82ae18d29685..014248344763 100644 --- a/drivers/input/sparse-keymap.c +++ b/drivers/input/sparse-keymap.c | |||
@@ -68,12 +68,14 @@ static int sparse_keymap_getkeycode(struct input_dev *dev, | |||
68 | unsigned int scancode, | 68 | unsigned int scancode, |
69 | unsigned int *keycode) | 69 | unsigned int *keycode) |
70 | { | 70 | { |
71 | const struct key_entry *key = | 71 | const struct key_entry *key; |
72 | sparse_keymap_entry_from_scancode(dev, scancode); | ||
73 | 72 | ||
74 | if (key && key->type == KE_KEY) { | 73 | if (dev->keycode) { |
75 | *keycode = key->keycode; | 74 | key = sparse_keymap_entry_from_scancode(dev, scancode); |
76 | return 0; | 75 | if (key && key->type == KE_KEY) { |
76 | *keycode = key->keycode; | ||
77 | return 0; | ||
78 | } | ||
77 | } | 79 | } |
78 | 80 | ||
79 | return -EINVAL; | 81 | return -EINVAL; |
@@ -86,17 +88,16 @@ static int sparse_keymap_setkeycode(struct input_dev *dev, | |||
86 | struct key_entry *key; | 88 | struct key_entry *key; |
87 | int old_keycode; | 89 | int old_keycode; |
88 | 90 | ||
89 | if (keycode < 0 || keycode > KEY_MAX) | 91 | if (dev->keycode) { |
90 | return -EINVAL; | 92 | key = sparse_keymap_entry_from_scancode(dev, scancode); |
91 | 93 | if (key && key->type == KE_KEY) { | |
92 | key = sparse_keymap_entry_from_scancode(dev, scancode); | 94 | old_keycode = key->keycode; |
93 | if (key && key->type == KE_KEY) { | 95 | key->keycode = keycode; |
94 | old_keycode = key->keycode; | 96 | set_bit(keycode, dev->keybit); |
95 | key->keycode = keycode; | 97 | if (!sparse_keymap_entry_from_keycode(dev, old_keycode)) |
96 | set_bit(keycode, dev->keybit); | 98 | clear_bit(old_keycode, dev->keybit); |
97 | if (!sparse_keymap_entry_from_keycode(dev, old_keycode)) | 99 | return 0; |
98 | clear_bit(old_keycode, dev->keybit); | 100 | } |
99 | return 0; | ||
100 | } | 101 | } |
101 | 102 | ||
102 | return -EINVAL; | 103 | return -EINVAL; |
@@ -164,7 +165,7 @@ int sparse_keymap_setup(struct input_dev *dev, | |||
164 | return 0; | 165 | return 0; |
165 | 166 | ||
166 | err_out: | 167 | err_out: |
167 | kfree(keymap); | 168 | kfree(map); |
168 | return error; | 169 | return error; |
169 | 170 | ||
170 | } | 171 | } |
@@ -176,14 +177,27 @@ EXPORT_SYMBOL(sparse_keymap_setup); | |||
176 | * | 177 | * |
177 | * This function is used to free memory allocated by sparse keymap | 178 | * This function is used to free memory allocated by sparse keymap |
178 | * in an input device that was set up by sparse_keymap_setup(). | 179 | * in an input device that was set up by sparse_keymap_setup(). |
180 | * NOTE: It is safe to cal this function while input device is | ||
181 | * still registered (however the drivers should care not to try to | ||
182 | * use freed keymap and thus have to shut off interrups/polling | ||
183 | * before freeing the keymap). | ||
179 | */ | 184 | */ |
180 | void sparse_keymap_free(struct input_dev *dev) | 185 | void sparse_keymap_free(struct input_dev *dev) |
181 | { | 186 | { |
187 | unsigned long flags; | ||
188 | |||
189 | /* | ||
190 | * Take event lock to prevent racing with input_get_keycode() | ||
191 | * and input_set_keycode() if we are called while input device | ||
192 | * is still registered. | ||
193 | */ | ||
194 | spin_lock_irqsave(&dev->event_lock, flags); | ||
195 | |||
182 | kfree(dev->keycode); | 196 | kfree(dev->keycode); |
183 | dev->keycode = NULL; | 197 | dev->keycode = NULL; |
184 | dev->keycodemax = 0; | 198 | dev->keycodemax = 0; |
185 | dev->getkeycode = NULL; | 199 | |
186 | dev->setkeycode = NULL; | 200 | spin_unlock_irqrestore(&dev->event_lock, flags); |
187 | } | 201 | } |
188 | EXPORT_SYMBOL(sparse_keymap_free); | 202 | EXPORT_SYMBOL(sparse_keymap_free); |
189 | 203 | ||
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index 8b5d2873f0c4..f46502589e4e 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c | |||
@@ -673,13 +673,15 @@ static int wacom_resume(struct usb_interface *intf) | |||
673 | int rv; | 673 | int rv; |
674 | 674 | ||
675 | mutex_lock(&wacom->lock); | 675 | mutex_lock(&wacom->lock); |
676 | if (wacom->open) { | 676 | |
677 | /* switch to wacom mode first */ | ||
678 | wacom_query_tablet_data(intf, features); | ||
679 | |||
680 | if (wacom->open) | ||
677 | rv = usb_submit_urb(wacom->irq, GFP_NOIO); | 681 | rv = usb_submit_urb(wacom->irq, GFP_NOIO); |
678 | /* switch to wacom mode if needed */ | 682 | else |
679 | if (!wacom_retrieve_hid_descriptor(intf, features)) | ||
680 | wacom_query_tablet_data(intf, features); | ||
681 | } else | ||
682 | rv = 0; | 683 | rv = 0; |
684 | |||
683 | mutex_unlock(&wacom->lock); | 685 | mutex_unlock(&wacom->lock); |
684 | 686 | ||
685 | return rv; | 687 | return rv; |
diff --git a/drivers/input/tablet/wacom_wac.c b/drivers/input/tablet/wacom_wac.c index b3ba3437a2eb..4a852d815c68 100644 --- a/drivers/input/tablet/wacom_wac.c +++ b/drivers/input/tablet/wacom_wac.c | |||
@@ -155,19 +155,19 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo) | |||
155 | { | 155 | { |
156 | struct wacom_features *features = &wacom->features; | 156 | struct wacom_features *features = &wacom->features; |
157 | unsigned char *data = wacom->data; | 157 | unsigned char *data = wacom->data; |
158 | int x, y, prox; | 158 | int x, y, rw; |
159 | int rw = 0; | 159 | static int penData = 0; |
160 | int retval = 0; | ||
161 | 160 | ||
162 | if (data[0] != WACOM_REPORT_PENABLED) { | 161 | if (data[0] != WACOM_REPORT_PENABLED) { |
163 | dbg("wacom_graphire_irq: received unknown report #%d", data[0]); | 162 | dbg("wacom_graphire_irq: received unknown report #%d", data[0]); |
164 | goto exit; | 163 | return 0; |
165 | } | 164 | } |
166 | 165 | ||
167 | prox = data[1] & 0x80; | 166 | if (data[1] & 0x80) { |
168 | if (prox || wacom->id[0]) { | 167 | /* in prox and not a pad data */ |
169 | if (prox) { | 168 | penData = 1; |
170 | switch ((data[1] >> 5) & 3) { | 169 | |
170 | switch ((data[1] >> 5) & 3) { | ||
171 | 171 | ||
172 | case 0: /* Pen */ | 172 | case 0: /* Pen */ |
173 | wacom->tool[0] = BTN_TOOL_PEN; | 173 | wacom->tool[0] = BTN_TOOL_PEN; |
@@ -181,13 +181,23 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo) | |||
181 | 181 | ||
182 | case 2: /* Mouse with wheel */ | 182 | case 2: /* Mouse with wheel */ |
183 | wacom_report_key(wcombo, BTN_MIDDLE, data[1] & 0x04); | 183 | wacom_report_key(wcombo, BTN_MIDDLE, data[1] & 0x04); |
184 | if (features->type == WACOM_G4 || features->type == WACOM_MO) { | ||
185 | rw = data[7] & 0x04 ? (data[7] & 0x03)-4 : (data[7] & 0x03); | ||
186 | wacom_report_rel(wcombo, REL_WHEEL, -rw); | ||
187 | } else | ||
188 | wacom_report_rel(wcombo, REL_WHEEL, -(signed char) data[6]); | ||
184 | /* fall through */ | 189 | /* fall through */ |
185 | 190 | ||
186 | case 3: /* Mouse without wheel */ | 191 | case 3: /* Mouse without wheel */ |
187 | wacom->tool[0] = BTN_TOOL_MOUSE; | 192 | wacom->tool[0] = BTN_TOOL_MOUSE; |
188 | wacom->id[0] = CURSOR_DEVICE_ID; | 193 | wacom->id[0] = CURSOR_DEVICE_ID; |
194 | wacom_report_key(wcombo, BTN_LEFT, data[1] & 0x01); | ||
195 | wacom_report_key(wcombo, BTN_RIGHT, data[1] & 0x02); | ||
196 | if (features->type == WACOM_G4 || features->type == WACOM_MO) | ||
197 | wacom_report_abs(wcombo, ABS_DISTANCE, data[6] & 0x3f); | ||
198 | else | ||
199 | wacom_report_abs(wcombo, ABS_DISTANCE, data[7] & 0x3f); | ||
189 | break; | 200 | break; |
190 | } | ||
191 | } | 201 | } |
192 | x = wacom_le16_to_cpu(&data[2]); | 202 | x = wacom_le16_to_cpu(&data[2]); |
193 | y = wacom_le16_to_cpu(&data[4]); | 203 | y = wacom_le16_to_cpu(&data[4]); |
@@ -198,32 +208,36 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo) | |||
198 | wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x01); | 208 | wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x01); |
199 | wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); | 209 | wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); |
200 | wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x04); | 210 | wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x04); |
201 | } else { | ||
202 | wacom_report_key(wcombo, BTN_LEFT, data[1] & 0x01); | ||
203 | wacom_report_key(wcombo, BTN_RIGHT, data[1] & 0x02); | ||
204 | if (features->type == WACOM_G4 || | ||
205 | features->type == WACOM_MO) { | ||
206 | wacom_report_abs(wcombo, ABS_DISTANCE, data[6] & 0x3f); | ||
207 | rw = (signed)(data[7] & 0x04) - (data[7] & 0x03); | ||
208 | } else { | ||
209 | wacom_report_abs(wcombo, ABS_DISTANCE, data[7] & 0x3f); | ||
210 | rw = -(signed)data[6]; | ||
211 | } | ||
212 | wacom_report_rel(wcombo, REL_WHEEL, rw); | ||
213 | } | 211 | } |
214 | |||
215 | if (!prox) | ||
216 | wacom->id[0] = 0; | ||
217 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); /* report tool id */ | 212 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); /* report tool id */ |
218 | wacom_report_key(wcombo, wacom->tool[0], prox); | 213 | wacom_report_key(wcombo, wacom->tool[0], 1); |
219 | wacom_input_sync(wcombo); /* sync last event */ | 214 | } else if (wacom->id[0]) { |
215 | wacom_report_abs(wcombo, ABS_X, 0); | ||
216 | wacom_report_abs(wcombo, ABS_Y, 0); | ||
217 | if (wacom->tool[0] == BTN_TOOL_MOUSE) { | ||
218 | wacom_report_key(wcombo, BTN_LEFT, 0); | ||
219 | wacom_report_key(wcombo, BTN_RIGHT, 0); | ||
220 | wacom_report_abs(wcombo, ABS_DISTANCE, 0); | ||
221 | } else { | ||
222 | wacom_report_abs(wcombo, ABS_PRESSURE, 0); | ||
223 | wacom_report_key(wcombo, BTN_TOUCH, 0); | ||
224 | wacom_report_key(wcombo, BTN_STYLUS, 0); | ||
225 | wacom_report_key(wcombo, BTN_STYLUS2, 0); | ||
226 | } | ||
227 | wacom->id[0] = 0; | ||
228 | wacom_report_abs(wcombo, ABS_MISC, 0); /* reset tool id */ | ||
229 | wacom_report_key(wcombo, wacom->tool[0], 0); | ||
220 | } | 230 | } |
221 | 231 | ||
222 | /* send pad data */ | 232 | /* send pad data */ |
223 | switch (features->type) { | 233 | switch (features->type) { |
224 | case WACOM_G4: | 234 | case WACOM_G4: |
225 | prox = data[7] & 0xf8; | 235 | if (data[7] & 0xf8) { |
226 | if (prox || wacom->id[1]) { | 236 | if (penData) { |
237 | wacom_input_sync(wcombo); /* sync last event */ | ||
238 | if (!wacom->id[0]) | ||
239 | penData = 0; | ||
240 | } | ||
227 | wacom->id[1] = PAD_DEVICE_ID; | 241 | wacom->id[1] = PAD_DEVICE_ID; |
228 | wacom_report_key(wcombo, BTN_0, (data[7] & 0x40)); | 242 | wacom_report_key(wcombo, BTN_0, (data[7] & 0x40)); |
229 | wacom_report_key(wcombo, BTN_4, (data[7] & 0x80)); | 243 | wacom_report_key(wcombo, BTN_4, (data[7] & 0x80)); |
@@ -231,16 +245,29 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo) | |||
231 | wacom_report_rel(wcombo, REL_WHEEL, rw); | 245 | wacom_report_rel(wcombo, REL_WHEEL, rw); |
232 | wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0); | 246 | wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0); |
233 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); | 247 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); |
234 | if (!prox) | 248 | wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); |
235 | wacom->id[1] = 0; | 249 | } else if (wacom->id[1]) { |
236 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); | 250 | if (penData) { |
251 | wacom_input_sync(wcombo); /* sync last event */ | ||
252 | if (!wacom->id[0]) | ||
253 | penData = 0; | ||
254 | } | ||
255 | wacom->id[1] = 0; | ||
256 | wacom_report_key(wcombo, BTN_0, (data[7] & 0x40)); | ||
257 | wacom_report_key(wcombo, BTN_4, (data[7] & 0x80)); | ||
258 | wacom_report_rel(wcombo, REL_WHEEL, 0); | ||
259 | wacom_report_key(wcombo, BTN_TOOL_FINGER, 0); | ||
260 | wacom_report_abs(wcombo, ABS_MISC, 0); | ||
237 | wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); | 261 | wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); |
238 | } | 262 | } |
239 | retval = 1; | ||
240 | break; | 263 | break; |
241 | case WACOM_MO: | 264 | case WACOM_MO: |
242 | prox = (data[7] & 0xf8) || data[8]; | 265 | if ((data[7] & 0xf8) || (data[8] & 0xff)) { |
243 | if (prox || wacom->id[1]) { | 266 | if (penData) { |
267 | wacom_input_sync(wcombo); /* sync last event */ | ||
268 | if (!wacom->id[0]) | ||
269 | penData = 0; | ||
270 | } | ||
244 | wacom->id[1] = PAD_DEVICE_ID; | 271 | wacom->id[1] = PAD_DEVICE_ID; |
245 | wacom_report_key(wcombo, BTN_0, (data[7] & 0x08)); | 272 | wacom_report_key(wcombo, BTN_0, (data[7] & 0x08)); |
246 | wacom_report_key(wcombo, BTN_1, (data[7] & 0x20)); | 273 | wacom_report_key(wcombo, BTN_1, (data[7] & 0x20)); |
@@ -248,16 +275,27 @@ static int wacom_graphire_irq(struct wacom_wac *wacom, void *wcombo) | |||
248 | wacom_report_key(wcombo, BTN_5, (data[7] & 0x40)); | 275 | wacom_report_key(wcombo, BTN_5, (data[7] & 0x40)); |
249 | wacom_report_abs(wcombo, ABS_WHEEL, (data[8] & 0x7f)); | 276 | wacom_report_abs(wcombo, ABS_WHEEL, (data[8] & 0x7f)); |
250 | wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0); | 277 | wacom_report_key(wcombo, BTN_TOOL_FINGER, 0xf0); |
251 | if (!prox) | ||
252 | wacom->id[1] = 0; | ||
253 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); | 278 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[1]); |
254 | wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); | 279 | wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); |
280 | } else if (wacom->id[1]) { | ||
281 | if (penData) { | ||
282 | wacom_input_sync(wcombo); /* sync last event */ | ||
283 | if (!wacom->id[0]) | ||
284 | penData = 0; | ||
285 | } | ||
286 | wacom->id[1] = 0; | ||
287 | wacom_report_key(wcombo, BTN_0, (data[7] & 0x08)); | ||
288 | wacom_report_key(wcombo, BTN_1, (data[7] & 0x20)); | ||
289 | wacom_report_key(wcombo, BTN_4, (data[7] & 0x10)); | ||
290 | wacom_report_key(wcombo, BTN_5, (data[7] & 0x40)); | ||
291 | wacom_report_abs(wcombo, ABS_WHEEL, (data[8] & 0x7f)); | ||
292 | wacom_report_key(wcombo, BTN_TOOL_FINGER, 0); | ||
293 | wacom_report_abs(wcombo, ABS_MISC, 0); | ||
294 | wacom_input_event(wcombo, EV_MSC, MSC_SERIAL, 0xf0); | ||
255 | } | 295 | } |
256 | retval = 1; | ||
257 | break; | 296 | break; |
258 | } | 297 | } |
259 | exit: | 298 | return 1; |
260 | return retval; | ||
261 | } | 299 | } |
262 | 300 | ||
263 | static int wacom_intuos_inout(struct wacom_wac *wacom, void *wcombo) | 301 | static int wacom_intuos_inout(struct wacom_wac *wacom, void *wcombo) |
@@ -598,9 +636,9 @@ static int wacom_intuos_irq(struct wacom_wac *wacom, void *wcombo) | |||
598 | static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx) | 636 | static void wacom_tpc_finger_in(struct wacom_wac *wacom, void *wcombo, char *data, int idx) |
599 | { | 637 | { |
600 | wacom_report_abs(wcombo, ABS_X, | 638 | wacom_report_abs(wcombo, ABS_X, |
601 | data[2 + idx * 2] | ((data[3 + idx * 2] & 0x7f) << 8)); | 639 | (data[2 + idx * 2] & 0xff) | ((data[3 + idx * 2] & 0x7f) << 8)); |
602 | wacom_report_abs(wcombo, ABS_Y, | 640 | wacom_report_abs(wcombo, ABS_Y, |
603 | data[6 + idx * 2] | ((data[7 + idx * 2] & 0x7f) << 8)); | 641 | (data[6 + idx * 2] & 0xff) | ((data[7 + idx * 2] & 0x7f) << 8)); |
604 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); | 642 | wacom_report_abs(wcombo, ABS_MISC, wacom->id[0]); |
605 | wacom_report_key(wcombo, wacom->tool[idx], 1); | 643 | wacom_report_key(wcombo, wacom->tool[idx], 1); |
606 | if (idx) | 644 | if (idx) |
@@ -744,24 +782,31 @@ static int wacom_tpc_irq(struct wacom_wac *wacom, void *wcombo) | |||
744 | 782 | ||
745 | touchInProx = 0; | 783 | touchInProx = 0; |
746 | 784 | ||
747 | if (!wacom->id[0]) { /* first in prox */ | 785 | if (prox) { /* in prox */ |
748 | /* Going into proximity select tool */ | 786 | if (!wacom->id[0]) { |
749 | wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN; | 787 | /* Going into proximity select tool */ |
750 | if (wacom->tool[0] == BTN_TOOL_PEN) | 788 | wacom->tool[0] = (data[1] & 0x0c) ? BTN_TOOL_RUBBER : BTN_TOOL_PEN; |
751 | wacom->id[0] = STYLUS_DEVICE_ID; | 789 | if (wacom->tool[0] == BTN_TOOL_PEN) |
752 | else | 790 | wacom->id[0] = STYLUS_DEVICE_ID; |
753 | wacom->id[0] = ERASER_DEVICE_ID; | 791 | else |
754 | } | 792 | wacom->id[0] = ERASER_DEVICE_ID; |
755 | wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); | 793 | } |
756 | wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10); | 794 | wacom_report_key(wcombo, BTN_STYLUS, data[1] & 0x02); |
757 | wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2])); | 795 | wacom_report_key(wcombo, BTN_STYLUS2, data[1] & 0x10); |
758 | wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4])); | 796 | wacom_report_abs(wcombo, ABS_X, wacom_le16_to_cpu(&data[2])); |
759 | pressure = ((data[7] & 0x01) << 8) | data[6]; | 797 | wacom_report_abs(wcombo, ABS_Y, wacom_le16_to_cpu(&data[4])); |
760 | if (pressure < 0) | 798 | pressure = ((data[7] & 0x01) << 8) | data[6]; |
761 | pressure = features->pressure_max + pressure + 1; | 799 | if (pressure < 0) |
762 | wacom_report_abs(wcombo, ABS_PRESSURE, pressure); | 800 | pressure = features->pressure_max + pressure + 1; |
763 | wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05); | 801 | wacom_report_abs(wcombo, ABS_PRESSURE, pressure); |
764 | if (!prox) { /* out-prox */ | 802 | wacom_report_key(wcombo, BTN_TOUCH, data[1] & 0x05); |
803 | } else { | ||
804 | wacom_report_abs(wcombo, ABS_X, 0); | ||
805 | wacom_report_abs(wcombo, ABS_Y, 0); | ||
806 | wacom_report_abs(wcombo, ABS_PRESSURE, 0); | ||
807 | wacom_report_key(wcombo, BTN_STYLUS, 0); | ||
808 | wacom_report_key(wcombo, BTN_STYLUS2, 0); | ||
809 | wacom_report_key(wcombo, BTN_TOUCH, 0); | ||
765 | wacom->id[0] = 0; | 810 | wacom->id[0] = 0; |
766 | /* pen is out so touch can be enabled now */ | 811 | /* pen is out so touch can be enabled now */ |
767 | touchInProx = 1; | 812 | touchInProx = 1; |
diff --git a/drivers/isdn/gigaset/bas-gigaset.c b/drivers/isdn/gigaset/bas-gigaset.c index 0be15c70c16d..47a5ffec55a3 100644 --- a/drivers/isdn/gigaset/bas-gigaset.c +++ b/drivers/isdn/gigaset/bas-gigaset.c | |||
@@ -14,11 +14,6 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include "gigaset.h" | 16 | #include "gigaset.h" |
17 | |||
18 | #include <linux/errno.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/slab.h> | ||
21 | #include <linux/timer.h> | ||
22 | #include <linux/usb.h> | 17 | #include <linux/usb.h> |
23 | #include <linux/module.h> | 18 | #include <linux/module.h> |
24 | #include <linux/moduleparam.h> | 19 | #include <linux/moduleparam.h> |
diff --git a/drivers/isdn/gigaset/capi.c b/drivers/isdn/gigaset/capi.c index eb7e27105a82..964a55fb1486 100644 --- a/drivers/isdn/gigaset/capi.c +++ b/drivers/isdn/gigaset/capi.c | |||
@@ -12,8 +12,6 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #include "gigaset.h" | 14 | #include "gigaset.h" |
15 | #include <linux/slab.h> | ||
16 | #include <linux/ctype.h> | ||
17 | #include <linux/proc_fs.h> | 15 | #include <linux/proc_fs.h> |
18 | #include <linux/seq_file.h> | 16 | #include <linux/seq_file.h> |
19 | #include <linux/isdn/capilli.h> | 17 | #include <linux/isdn/capilli.h> |
diff --git a/drivers/isdn/gigaset/common.c b/drivers/isdn/gigaset/common.c index 0b39b387c125..f6f45f221920 100644 --- a/drivers/isdn/gigaset/common.c +++ b/drivers/isdn/gigaset/common.c | |||
@@ -14,10 +14,8 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include "gigaset.h" | 16 | #include "gigaset.h" |
17 | #include <linux/ctype.h> | ||
18 | #include <linux/module.h> | 17 | #include <linux/module.h> |
19 | #include <linux/moduleparam.h> | 18 | #include <linux/moduleparam.h> |
20 | #include <linux/slab.h> | ||
21 | 19 | ||
22 | /* Version Information */ | 20 | /* Version Information */ |
23 | #define DRIVER_AUTHOR "Hansjoerg Lipp <hjlipp@web.de>, Tilman Schmidt <tilman@imap.cc>, Stefan Eilers" | 21 | #define DRIVER_AUTHOR "Hansjoerg Lipp <hjlipp@web.de>, Tilman Schmidt <tilman@imap.cc>, Stefan Eilers" |
diff --git a/drivers/isdn/gigaset/gigaset.h b/drivers/isdn/gigaset/gigaset.h index 9ef5b0463fd5..05947f9c1849 100644 --- a/drivers/isdn/gigaset/gigaset.h +++ b/drivers/isdn/gigaset/gigaset.h | |||
@@ -20,11 +20,12 @@ | |||
20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | 20 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
21 | 21 | ||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/sched.h> | ||
23 | #include <linux/compiler.h> | 24 | #include <linux/compiler.h> |
24 | #include <linux/types.h> | 25 | #include <linux/types.h> |
26 | #include <linux/ctype.h> | ||
25 | #include <linux/slab.h> | 27 | #include <linux/slab.h> |
26 | #include <linux/spinlock.h> | 28 | #include <linux/spinlock.h> |
27 | #include <linux/usb.h> | ||
28 | #include <linux/skbuff.h> | 29 | #include <linux/skbuff.h> |
29 | #include <linux/netdevice.h> | 30 | #include <linux/netdevice.h> |
30 | #include <linux/ppp_defs.h> | 31 | #include <linux/ppp_defs.h> |
diff --git a/drivers/isdn/gigaset/i4l.c b/drivers/isdn/gigaset/i4l.c index c99fb9790a13..c22e5ace8276 100644 --- a/drivers/isdn/gigaset/i4l.c +++ b/drivers/isdn/gigaset/i4l.c | |||
@@ -15,7 +15,6 @@ | |||
15 | 15 | ||
16 | #include "gigaset.h" | 16 | #include "gigaset.h" |
17 | #include <linux/isdnif.h> | 17 | #include <linux/isdnif.h> |
18 | #include <linux/slab.h> | ||
19 | 18 | ||
20 | #define HW_HDR_LEN 2 /* Header size used to store ack info */ | 19 | #define HW_HDR_LEN 2 /* Header size used to store ack info */ |
21 | 20 | ||
diff --git a/drivers/isdn/gigaset/interface.c b/drivers/isdn/gigaset/interface.c index f0dc6c9cc283..c9f28dd40d5c 100644 --- a/drivers/isdn/gigaset/interface.c +++ b/drivers/isdn/gigaset/interface.c | |||
@@ -13,7 +13,6 @@ | |||
13 | 13 | ||
14 | #include "gigaset.h" | 14 | #include "gigaset.h" |
15 | #include <linux/gigaset_dev.h> | 15 | #include <linux/gigaset_dev.h> |
16 | #include <linux/tty.h> | ||
17 | #include <linux/tty_flip.h> | 16 | #include <linux/tty_flip.h> |
18 | 17 | ||
19 | /*** our ioctls ***/ | 18 | /*** our ioctls ***/ |
diff --git a/drivers/isdn/gigaset/proc.c b/drivers/isdn/gigaset/proc.c index b69f73a0668f..b943efbff44d 100644 --- a/drivers/isdn/gigaset/proc.c +++ b/drivers/isdn/gigaset/proc.c | |||
@@ -14,7 +14,6 @@ | |||
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include "gigaset.h" | 16 | #include "gigaset.h" |
17 | #include <linux/ctype.h> | ||
18 | 17 | ||
19 | static ssize_t show_cidmode(struct device *dev, | 18 | static ssize_t show_cidmode(struct device *dev, |
20 | struct device_attribute *attr, char *buf) | 19 | struct device_attribute *attr, char *buf) |
diff --git a/drivers/isdn/gigaset/ser-gigaset.c b/drivers/isdn/gigaset/ser-gigaset.c index 8b0afd203a07..e96c0586886c 100644 --- a/drivers/isdn/gigaset/ser-gigaset.c +++ b/drivers/isdn/gigaset/ser-gigaset.c | |||
@@ -11,13 +11,10 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include "gigaset.h" | 13 | #include "gigaset.h" |
14 | |||
15 | #include <linux/module.h> | 14 | #include <linux/module.h> |
16 | #include <linux/moduleparam.h> | 15 | #include <linux/moduleparam.h> |
17 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
18 | #include <linux/tty.h> | ||
19 | #include <linux/completion.h> | 17 | #include <linux/completion.h> |
20 | #include <linux/slab.h> | ||
21 | 18 | ||
22 | /* Version Information */ | 19 | /* Version Information */ |
23 | #define DRIVER_AUTHOR "Tilman Schmidt" | 20 | #define DRIVER_AUTHOR "Tilman Schmidt" |
diff --git a/drivers/isdn/gigaset/usb-gigaset.c b/drivers/isdn/gigaset/usb-gigaset.c index 9430a2bbb523..76dbb20f3065 100644 --- a/drivers/isdn/gigaset/usb-gigaset.c +++ b/drivers/isdn/gigaset/usb-gigaset.c | |||
@@ -16,10 +16,6 @@ | |||
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include "gigaset.h" | 18 | #include "gigaset.h" |
19 | |||
20 | #include <linux/errno.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/slab.h> | ||
23 | #include <linux/usb.h> | 19 | #include <linux/usb.h> |
24 | #include <linux/module.h> | 20 | #include <linux/module.h> |
25 | #include <linux/moduleparam.h> | 21 | #include <linux/moduleparam.h> |
diff --git a/drivers/lguest/lguest_device.c b/drivers/lguest/lguest_device.c index 07090f379c63..69c84a1d88ea 100644 --- a/drivers/lguest/lguest_device.c +++ b/drivers/lguest/lguest_device.c | |||
@@ -178,7 +178,7 @@ static void set_status(struct virtio_device *vdev, u8 status) | |||
178 | 178 | ||
179 | /* We set the status. */ | 179 | /* We set the status. */ |
180 | to_lgdev(vdev)->desc->status = status; | 180 | to_lgdev(vdev)->desc->status = status; |
181 | kvm_hypercall1(LHCALL_NOTIFY, (max_pfn << PAGE_SHIFT) + offset); | 181 | hcall(LHCALL_NOTIFY, (max_pfn << PAGE_SHIFT) + offset, 0, 0, 0); |
182 | } | 182 | } |
183 | 183 | ||
184 | static void lg_set_status(struct virtio_device *vdev, u8 status) | 184 | static void lg_set_status(struct virtio_device *vdev, u8 status) |
@@ -229,7 +229,7 @@ static void lg_notify(struct virtqueue *vq) | |||
229 | */ | 229 | */ |
230 | struct lguest_vq_info *lvq = vq->priv; | 230 | struct lguest_vq_info *lvq = vq->priv; |
231 | 231 | ||
232 | kvm_hypercall1(LHCALL_NOTIFY, lvq->config.pfn << PAGE_SHIFT); | 232 | hcall(LHCALL_NOTIFY, lvq->config.pfn << PAGE_SHIFT, 0, 0, 0); |
233 | } | 233 | } |
234 | 234 | ||
235 | /* An extern declaration inside a C file is bad form. Don't do it. */ | 235 | /* An extern declaration inside a C file is bad form. Don't do it. */ |
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c index fb2b7ef7868e..b4eb675a807e 100644 --- a/drivers/lguest/x86/core.c +++ b/drivers/lguest/x86/core.c | |||
@@ -288,6 +288,18 @@ static int emulate_insn(struct lg_cpu *cpu) | |||
288 | insn = lgread(cpu, physaddr, u8); | 288 | insn = lgread(cpu, physaddr, u8); |
289 | 289 | ||
290 | /* | 290 | /* |
291 | * Around 2.6.33, the kernel started using an emulation for the | ||
292 | * cmpxchg8b instruction in early boot on many configurations. This | ||
293 | * code isn't paravirtualized, and it tries to disable interrupts. | ||
294 | * Ignore it, which will Mostly Work. | ||
295 | */ | ||
296 | if (insn == 0xfa) { | ||
297 | /* "cli", or Clear Interrupt Enable instruction. Skip it. */ | ||
298 | cpu->regs->eip++; | ||
299 | return 1; | ||
300 | } | ||
301 | |||
302 | /* | ||
291 | * 0x66 is an "operand prefix". It means it's using the upper 16 bits | 303 | * 0x66 is an "operand prefix". It means it's using the upper 16 bits |
292 | * of the eax register. | 304 | * of the eax register. |
293 | */ | 305 | */ |
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index 9781942992e9..4b451a7c03e9 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -2334,13 +2334,13 @@ static int cnic_service_bnx2x(void *data, void *status_blk) | |||
2334 | struct cnic_local *cp = dev->cnic_priv; | 2334 | struct cnic_local *cp = dev->cnic_priv; |
2335 | u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX; | 2335 | u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX; |
2336 | 2336 | ||
2337 | prefetch(cp->status_blk.bnx2x); | 2337 | if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) { |
2338 | prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); | 2338 | prefetch(cp->status_blk.bnx2x); |
2339 | prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]); | ||
2339 | 2340 | ||
2340 | if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) | ||
2341 | tasklet_schedule(&cp->cnic_irq_task); | 2341 | tasklet_schedule(&cp->cnic_irq_task); |
2342 | 2342 | cnic_chk_pkt_rings(cp); | |
2343 | cnic_chk_pkt_rings(cp); | 2343 | } |
2344 | 2344 | ||
2345 | return 0; | 2345 | return 0; |
2346 | } | 2346 | } |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index cfd09cea7214..73d43c53015a 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -661,6 +661,8 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter) | |||
661 | i = 0; | 661 | i = 0; |
662 | } | 662 | } |
663 | 663 | ||
664 | if (i == tx_ring->next_to_use) | ||
665 | break; | ||
664 | eop = tx_ring->buffer_info[i].next_to_watch; | 666 | eop = tx_ring->buffer_info[i].next_to_watch; |
665 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | 667 | eop_desc = E1000_TX_DESC(*tx_ring, eop); |
666 | } | 668 | } |
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index 73b260c3c654..5c98f7c22425 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -5899,7 +5899,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5899 | /* Limit the number of tx's outstanding for hw bug */ | 5899 | /* Limit the number of tx's outstanding for hw bug */ |
5900 | if (id->driver_data & DEV_NEED_TX_LIMIT) { | 5900 | if (id->driver_data & DEV_NEED_TX_LIMIT) { |
5901 | np->tx_limit = 1; | 5901 | np->tx_limit = 1; |
5902 | if ((id->driver_data & DEV_NEED_TX_LIMIT2) && | 5902 | if (((id->driver_data & DEV_NEED_TX_LIMIT2) == DEV_NEED_TX_LIMIT2) && |
5903 | pci_dev->revision >= 0xA2) | 5903 | pci_dev->revision >= 0xA2) |
5904 | np->tx_limit = 0; | 5904 | np->tx_limit = 0; |
5905 | } | 5905 | } |
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index d313fae992da..743038490104 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -1814,6 +1814,7 @@ static int igb_wol_exclusion(struct igb_adapter *adapter, | |||
1814 | retval = 0; | 1814 | retval = 0; |
1815 | break; | 1815 | break; |
1816 | case E1000_DEV_ID_82576_QUAD_COPPER: | 1816 | case E1000_DEV_ID_82576_QUAD_COPPER: |
1817 | case E1000_DEV_ID_82576_QUAD_COPPER_ET2: | ||
1817 | /* quad port adapters only support WoL on port A */ | 1818 | /* quad port adapters only support WoL on port A */ |
1818 | if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) { | 1819 | if (!(adapter->flags & IGB_FLAG_QUAD_PORT_A)) { |
1819 | wol->supported = 0; | 1820 | wol->supported = 0; |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index 9b3c51ab1758..c9baa2aa98cd 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -1612,6 +1612,7 @@ static int __devinit igb_probe(struct pci_dev *pdev, | |||
1612 | adapter->eeprom_wol = 0; | 1612 | adapter->eeprom_wol = 0; |
1613 | break; | 1613 | break; |
1614 | case E1000_DEV_ID_82576_QUAD_COPPER: | 1614 | case E1000_DEV_ID_82576_QUAD_COPPER: |
1615 | case E1000_DEV_ID_82576_QUAD_COPPER_ET2: | ||
1615 | /* if quad port adapter, disable WoL on all but port A */ | 1616 | /* if quad port adapter, disable WoL on all but port A */ |
1616 | if (global_quad_port_a != 0) | 1617 | if (global_quad_port_a != 0) |
1617 | adapter->eeprom_wol = 0; | 1618 | adapter->eeprom_wol = 0; |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index 471887742b02..ecde0876a785 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -1690,7 +1690,7 @@ myri10ge_set_pauseparam(struct net_device *netdev, | |||
1690 | if (pause->tx_pause != mgp->pause) | 1690 | if (pause->tx_pause != mgp->pause) |
1691 | return myri10ge_change_pause(mgp, pause->tx_pause); | 1691 | return myri10ge_change_pause(mgp, pause->tx_pause); |
1692 | if (pause->rx_pause != mgp->pause) | 1692 | if (pause->rx_pause != mgp->pause) |
1693 | return myri10ge_change_pause(mgp, pause->tx_pause); | 1693 | return myri10ge_change_pause(mgp, pause->rx_pause); |
1694 | if (pause->autoneg != 0) | 1694 | if (pause->autoneg != 0) |
1695 | return -EINVAL; | 1695 | return -EINVAL; |
1696 | return 0; | 1696 | return 0; |
diff --git a/drivers/net/pcmcia/smc91c92_cs.c b/drivers/net/pcmcia/smc91c92_cs.c index ff7eb9116b6a..fd9d6e34fda4 100644 --- a/drivers/net/pcmcia/smc91c92_cs.c +++ b/drivers/net/pcmcia/smc91c92_cs.c | |||
@@ -1608,9 +1608,12 @@ static void set_rx_mode(struct net_device *dev) | |||
1608 | { | 1608 | { |
1609 | unsigned int ioaddr = dev->base_addr; | 1609 | unsigned int ioaddr = dev->base_addr; |
1610 | struct smc_private *smc = netdev_priv(dev); | 1610 | struct smc_private *smc = netdev_priv(dev); |
1611 | u_int multicast_table[ 2 ] = { 0, }; | 1611 | unsigned char multicast_table[8]; |
1612 | unsigned long flags; | 1612 | unsigned long flags; |
1613 | u_short rx_cfg_setting; | 1613 | u_short rx_cfg_setting; |
1614 | int i; | ||
1615 | |||
1616 | memset(multicast_table, 0, sizeof(multicast_table)); | ||
1614 | 1617 | ||
1615 | if (dev->flags & IFF_PROMISC) { | 1618 | if (dev->flags & IFF_PROMISC) { |
1616 | rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti; | 1619 | rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti; |
@@ -1622,10 +1625,6 @@ static void set_rx_mode(struct net_device *dev) | |||
1622 | 1625 | ||
1623 | netdev_for_each_mc_addr(mc_addr, dev) { | 1626 | netdev_for_each_mc_addr(mc_addr, dev) { |
1624 | u_int position = ether_crc(6, mc_addr->dmi_addr); | 1627 | u_int position = ether_crc(6, mc_addr->dmi_addr); |
1625 | #ifndef final_version /* Verify multicast address. */ | ||
1626 | if ((mc_addr->dmi_addr[0] & 1) == 0) | ||
1627 | continue; | ||
1628 | #endif | ||
1629 | multicast_table[position >> 29] |= 1 << ((position >> 26) & 7); | 1628 | multicast_table[position >> 29] |= 1 << ((position >> 26) & 7); |
1630 | } | 1629 | } |
1631 | } | 1630 | } |
@@ -1635,8 +1634,8 @@ static void set_rx_mode(struct net_device *dev) | |||
1635 | /* Load MC table and Rx setting into the chip without interrupts. */ | 1634 | /* Load MC table and Rx setting into the chip without interrupts. */ |
1636 | spin_lock_irqsave(&smc->lock, flags); | 1635 | spin_lock_irqsave(&smc->lock, flags); |
1637 | SMC_SELECT_BANK(3); | 1636 | SMC_SELECT_BANK(3); |
1638 | outl(multicast_table[0], ioaddr + MULTICAST0); | 1637 | for (i = 0; i < 8; i++) |
1639 | outl(multicast_table[1], ioaddr + MULTICAST4); | 1638 | outb(multicast_table[i], ioaddr + MULTICAST0 + i); |
1640 | SMC_SELECT_BANK(0); | 1639 | SMC_SELECT_BANK(0); |
1641 | outw(rx_cfg_setting, ioaddr + RCR); | 1640 | outw(rx_cfg_setting, ioaddr + RCR); |
1642 | SMC_SELECT_BANK(2); | 1641 | SMC_SELECT_BANK(2); |
diff --git a/drivers/net/qlcnic/qlcnic_hw.c b/drivers/net/qlcnic/qlcnic_hw.c index a6ef266a2fe2..e73ba455aa20 100644 --- a/drivers/net/qlcnic/qlcnic_hw.c +++ b/drivers/net/qlcnic/qlcnic_hw.c | |||
@@ -431,6 +431,9 @@ void qlcnic_set_multi(struct net_device *netdev) | |||
431 | u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; | 431 | u8 bcast_addr[ETH_ALEN] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }; |
432 | u32 mode = VPORT_MISS_MODE_DROP; | 432 | u32 mode = VPORT_MISS_MODE_DROP; |
433 | 433 | ||
434 | if (adapter->is_up != QLCNIC_ADAPTER_UP_MAGIC) | ||
435 | return; | ||
436 | |||
434 | qlcnic_nic_add_mac(adapter, adapter->mac_addr); | 437 | qlcnic_nic_add_mac(adapter, adapter->mac_addr); |
435 | qlcnic_nic_add_mac(adapter, bcast_addr); | 438 | qlcnic_nic_add_mac(adapter, bcast_addr); |
436 | 439 | ||
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c index 43afdb6b25e6..0298d8c1dcb6 100644 --- a/drivers/net/r6040.c +++ b/drivers/net/r6040.c | |||
@@ -134,7 +134,7 @@ | |||
134 | #define RX_DESC_SIZE (RX_DCNT * sizeof(struct r6040_descriptor)) | 134 | #define RX_DESC_SIZE (RX_DCNT * sizeof(struct r6040_descriptor)) |
135 | #define TX_DESC_SIZE (TX_DCNT * sizeof(struct r6040_descriptor)) | 135 | #define TX_DESC_SIZE (TX_DCNT * sizeof(struct r6040_descriptor)) |
136 | #define MBCR_DEFAULT 0x012A /* MAC Bus Control Register */ | 136 | #define MBCR_DEFAULT 0x012A /* MAC Bus Control Register */ |
137 | #define MCAST_MAX 4 /* Max number multicast addresses to filter */ | 137 | #define MCAST_MAX 3 /* Max number multicast addresses to filter */ |
138 | 138 | ||
139 | /* Descriptor status */ | 139 | /* Descriptor status */ |
140 | #define DSC_OWNER_MAC 0x8000 /* MAC is the owner of this descriptor */ | 140 | #define DSC_OWNER_MAC 0x8000 /* MAC is the owner of this descriptor */ |
@@ -982,9 +982,6 @@ static void r6040_multicast_list(struct net_device *dev) | |||
982 | crc >>= 26; | 982 | crc >>= 26; |
983 | hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf)); | 983 | hash_table[crc >> 4] |= 1 << (15 - (crc & 0xf)); |
984 | } | 984 | } |
985 | /* Write the index of the hash table */ | ||
986 | for (i = 0; i < 4; i++) | ||
987 | iowrite16(hash_table[i] << 14, ioaddr + MCR1); | ||
988 | /* Fill the MAC hash tables with their values */ | 985 | /* Fill the MAC hash tables with their values */ |
989 | iowrite16(hash_table[0], ioaddr + MAR0); | 986 | iowrite16(hash_table[0], ioaddr + MAR0); |
990 | iowrite16(hash_table[1], ioaddr + MAR1); | 987 | iowrite16(hash_table[1], ioaddr + MAR1); |
@@ -1000,9 +997,9 @@ static void r6040_multicast_list(struct net_device *dev) | |||
1000 | iowrite16(adrp[1], ioaddr + MID_1M + 8 * i); | 997 | iowrite16(adrp[1], ioaddr + MID_1M + 8 * i); |
1001 | iowrite16(adrp[2], ioaddr + MID_1H + 8 * i); | 998 | iowrite16(adrp[2], ioaddr + MID_1H + 8 * i); |
1002 | } else { | 999 | } else { |
1003 | iowrite16(0xffff, ioaddr + MID_0L + 8 * i); | 1000 | iowrite16(0xffff, ioaddr + MID_1L + 8 * i); |
1004 | iowrite16(0xffff, ioaddr + MID_0M + 8 * i); | 1001 | iowrite16(0xffff, ioaddr + MID_1M + 8 * i); |
1005 | iowrite16(0xffff, ioaddr + MID_0H + 8 * i); | 1002 | iowrite16(0xffff, ioaddr + MID_1H + 8 * i); |
1006 | } | 1003 | } |
1007 | i++; | 1004 | i++; |
1008 | } | 1005 | } |
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c index a214a1627e8b..4111a85ec80e 100644 --- a/drivers/net/stmmac/stmmac_main.c +++ b/drivers/net/stmmac/stmmac_main.c | |||
@@ -1686,7 +1686,7 @@ static int stmmac_dvr_probe(struct platform_device *pdev) | |||
1686 | } | 1686 | } |
1687 | pr_info("done!\n"); | 1687 | pr_info("done!\n"); |
1688 | 1688 | ||
1689 | if (!request_mem_region(res->start, (res->end - res->start), | 1689 | if (!request_mem_region(res->start, resource_size(res), |
1690 | pdev->name)) { | 1690 | pdev->name)) { |
1691 | pr_err("%s: ERROR: memory allocation failed" | 1691 | pr_err("%s: ERROR: memory allocation failed" |
1692 | "cannot get the I/O addr 0x%x\n", | 1692 | "cannot get the I/O addr 0x%x\n", |
@@ -1695,9 +1695,9 @@ static int stmmac_dvr_probe(struct platform_device *pdev) | |||
1695 | goto out; | 1695 | goto out; |
1696 | } | 1696 | } |
1697 | 1697 | ||
1698 | addr = ioremap(res->start, (res->end - res->start)); | 1698 | addr = ioremap(res->start, resource_size(res)); |
1699 | if (!addr) { | 1699 | if (!addr) { |
1700 | pr_err("%s: ERROR: memory mapping failed \n", __func__); | 1700 | pr_err("%s: ERROR: memory mapping failed\n", __func__); |
1701 | ret = -ENOMEM; | 1701 | ret = -ENOMEM; |
1702 | goto out; | 1702 | goto out; |
1703 | } | 1703 | } |
@@ -1775,7 +1775,7 @@ static int stmmac_dvr_probe(struct platform_device *pdev) | |||
1775 | out: | 1775 | out: |
1776 | if (ret < 0) { | 1776 | if (ret < 0) { |
1777 | platform_set_drvdata(pdev, NULL); | 1777 | platform_set_drvdata(pdev, NULL); |
1778 | release_mem_region(res->start, (res->end - res->start)); | 1778 | release_mem_region(res->start, resource_size(res)); |
1779 | if (addr != NULL) | 1779 | if (addr != NULL) |
1780 | iounmap(addr); | 1780 | iounmap(addr); |
1781 | } | 1781 | } |
@@ -1813,7 +1813,7 @@ static int stmmac_dvr_remove(struct platform_device *pdev) | |||
1813 | 1813 | ||
1814 | iounmap((void *)ndev->base_addr); | 1814 | iounmap((void *)ndev->base_addr); |
1815 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1815 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1816 | release_mem_region(res->start, (res->end - res->start)); | 1816 | release_mem_region(res->start, resource_size(res)); |
1817 | 1817 | ||
1818 | free_netdev(ndev); | 1818 | free_netdev(ndev); |
1819 | 1819 | ||
diff --git a/drivers/net/tun.c b/drivers/net/tun.c index 96c39bddc78c..43265207d463 100644 --- a/drivers/net/tun.c +++ b/drivers/net/tun.c | |||
@@ -387,6 +387,10 @@ static netdev_tx_t tun_net_xmit(struct sk_buff *skb, struct net_device *dev) | |||
387 | } | 387 | } |
388 | } | 388 | } |
389 | 389 | ||
390 | /* Orphan the skb - required as we might hang on to it | ||
391 | * for indefinite time. */ | ||
392 | skb_orphan(skb); | ||
393 | |||
390 | /* Enqueue packet */ | 394 | /* Enqueue packet */ |
391 | skb_queue_tail(&tun->socket.sk->sk_receive_queue, skb); | 395 | skb_queue_tail(&tun->socket.sk->sk_receive_queue, skb); |
392 | dev->trans_start = jiffies; | 396 | dev->trans_start = jiffies; |
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index 6fb783ce20b9..b0577dd1a42d 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -327,6 +327,7 @@ static int add_recvbuf_small(struct virtnet_info *vi, gfp_t gfp) | |||
327 | struct scatterlist sg[2]; | 327 | struct scatterlist sg[2]; |
328 | int err; | 328 | int err; |
329 | 329 | ||
330 | sg_init_table(sg, 2); | ||
330 | skb = netdev_alloc_skb_ip_align(vi->dev, MAX_PACKET_LEN); | 331 | skb = netdev_alloc_skb_ip_align(vi->dev, MAX_PACKET_LEN); |
331 | if (unlikely(!skb)) | 332 | if (unlikely(!skb)) |
332 | return -ENOMEM; | 333 | return -ENOMEM; |
@@ -352,6 +353,7 @@ static int add_recvbuf_big(struct virtnet_info *vi, gfp_t gfp) | |||
352 | char *p; | 353 | char *p; |
353 | int i, err, offset; | 354 | int i, err, offset; |
354 | 355 | ||
356 | sg_init_table(sg, MAX_SKB_FRAGS + 2); | ||
355 | /* page in sg[MAX_SKB_FRAGS + 1] is list tail */ | 357 | /* page in sg[MAX_SKB_FRAGS + 1] is list tail */ |
356 | for (i = MAX_SKB_FRAGS + 1; i > 1; --i) { | 358 | for (i = MAX_SKB_FRAGS + 1; i > 1; --i) { |
357 | first = get_a_page(vi, gfp); | 359 | first = get_a_page(vi, gfp); |
diff --git a/drivers/net/wan/hdlc_ppp.c b/drivers/net/wan/hdlc_ppp.c index b9b9d6b01c0b..941f053e650e 100644 --- a/drivers/net/wan/hdlc_ppp.c +++ b/drivers/net/wan/hdlc_ppp.c | |||
@@ -628,9 +628,15 @@ static void ppp_stop(struct net_device *dev) | |||
628 | ppp_cp_event(dev, PID_LCP, STOP, 0, 0, 0, NULL); | 628 | ppp_cp_event(dev, PID_LCP, STOP, 0, 0, 0, NULL); |
629 | } | 629 | } |
630 | 630 | ||
631 | static void ppp_close(struct net_device *dev) | ||
632 | { | ||
633 | ppp_tx_flush(); | ||
634 | } | ||
635 | |||
631 | static struct hdlc_proto proto = { | 636 | static struct hdlc_proto proto = { |
632 | .start = ppp_start, | 637 | .start = ppp_start, |
633 | .stop = ppp_stop, | 638 | .stop = ppp_stop, |
639 | .close = ppp_close, | ||
634 | .type_trans = ppp_type_trans, | 640 | .type_trans = ppp_type_trans, |
635 | .ioctl = ppp_ioctl, | 641 | .ioctl = ppp_ioctl, |
636 | .netif_rx = ppp_rx, | 642 | .netif_rx = ppp_rx, |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 67ca4e5a6017..115e1aeedb59 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -1532,8 +1532,7 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed) | |||
1532 | all_wiphys_idle = ath9k_all_wiphys_idle(sc); | 1532 | all_wiphys_idle = ath9k_all_wiphys_idle(sc); |
1533 | ath9k_set_wiphy_idle(aphy, idle); | 1533 | ath9k_set_wiphy_idle(aphy, idle); |
1534 | 1534 | ||
1535 | if (!idle && all_wiphys_idle) | 1535 | enable_radio = (!idle && all_wiphys_idle); |
1536 | enable_radio = true; | ||
1537 | 1536 | ||
1538 | /* | 1537 | /* |
1539 | * After we unlock here its possible another wiphy | 1538 | * After we unlock here its possible another wiphy |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index 83c52a682622..8972166386cb 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -2015,7 +2015,9 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2015 | IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn " | 2015 | IWL_DEBUG_TX_REPLY(priv, "Retry scheduler reclaim scd_ssn " |
2016 | "%d index %d\n", scd_ssn , index); | 2016 | "%d index %d\n", scd_ssn , index); |
2017 | freed = iwl_tx_queue_reclaim(priv, txq_id, index); | 2017 | freed = iwl_tx_queue_reclaim(priv, txq_id, index); |
2018 | iwl_free_tfds_in_queue(priv, sta_id, tid, freed); | 2018 | if (qc) |
2019 | iwl_free_tfds_in_queue(priv, sta_id, | ||
2020 | tid, freed); | ||
2019 | 2021 | ||
2020 | if (priv->mac80211_registered && | 2022 | if (priv->mac80211_registered && |
2021 | (iwl_queue_space(&txq->q) > txq->q.low_mark) && | 2023 | (iwl_queue_space(&txq->q) > txq->q.low_mark) && |
@@ -2041,14 +2043,17 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
2041 | tx_resp->failure_frame); | 2043 | tx_resp->failure_frame); |
2042 | 2044 | ||
2043 | freed = iwl_tx_queue_reclaim(priv, txq_id, index); | 2045 | freed = iwl_tx_queue_reclaim(priv, txq_id, index); |
2044 | iwl_free_tfds_in_queue(priv, sta_id, tid, freed); | 2046 | if (qc && likely(sta_id != IWL_INVALID_STATION)) |
2047 | iwl_free_tfds_in_queue(priv, sta_id, tid, freed); | ||
2048 | else if (sta_id == IWL_INVALID_STATION) | ||
2049 | IWL_DEBUG_TX_REPLY(priv, "Station not known\n"); | ||
2045 | 2050 | ||
2046 | if (priv->mac80211_registered && | 2051 | if (priv->mac80211_registered && |
2047 | (iwl_queue_space(&txq->q) > txq->q.low_mark)) | 2052 | (iwl_queue_space(&txq->q) > txq->q.low_mark)) |
2048 | iwl_wake_queue(priv, txq_id); | 2053 | iwl_wake_queue(priv, txq_id); |
2049 | } | 2054 | } |
2050 | 2055 | if (qc && likely(sta_id != IWL_INVALID_STATION)) | |
2051 | iwl_txq_check_empty(priv, sta_id, tid, txq_id); | 2056 | iwl_txq_check_empty(priv, sta_id, tid, txq_id); |
2052 | 2057 | ||
2053 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) | 2058 | if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK)) |
2054 | IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); | 2059 | IWL_ERR(priv, "TODO: Implement Tx ABORT REQUIRED!!!\n"); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 35f819ac87a3..1460116d329f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -346,6 +346,17 @@ static inline int get_num_of_ant_from_rate(u32 rate_n_flags) | |||
346 | !!(rate_n_flags & RATE_MCS_ANT_C_MSK); | 346 | !!(rate_n_flags & RATE_MCS_ANT_C_MSK); |
347 | } | 347 | } |
348 | 348 | ||
349 | /* | ||
350 | * Static function to get the expected throughput from an iwl_scale_tbl_info | ||
351 | * that wraps a NULL pointer check | ||
352 | */ | ||
353 | static s32 get_expected_tpt(struct iwl_scale_tbl_info *tbl, int rs_index) | ||
354 | { | ||
355 | if (tbl->expected_tpt) | ||
356 | return tbl->expected_tpt[rs_index]; | ||
357 | return 0; | ||
358 | } | ||
359 | |||
349 | /** | 360 | /** |
350 | * rs_collect_tx_data - Update the success/failure sliding window | 361 | * rs_collect_tx_data - Update the success/failure sliding window |
351 | * | 362 | * |
@@ -353,19 +364,21 @@ static inline int get_num_of_ant_from_rate(u32 rate_n_flags) | |||
353 | * at this rate. window->data contains the bitmask of successful | 364 | * at this rate. window->data contains the bitmask of successful |
354 | * packets. | 365 | * packets. |
355 | */ | 366 | */ |
356 | static int rs_collect_tx_data(struct iwl_rate_scale_data *windows, | 367 | static int rs_collect_tx_data(struct iwl_scale_tbl_info *tbl, |
357 | int scale_index, s32 tpt, int attempts, | 368 | int scale_index, int attempts, int successes) |
358 | int successes) | ||
359 | { | 369 | { |
360 | struct iwl_rate_scale_data *window = NULL; | 370 | struct iwl_rate_scale_data *window = NULL; |
361 | static const u64 mask = (((u64)1) << (IWL_RATE_MAX_WINDOW - 1)); | 371 | static const u64 mask = (((u64)1) << (IWL_RATE_MAX_WINDOW - 1)); |
362 | s32 fail_count; | 372 | s32 fail_count, tpt; |
363 | 373 | ||
364 | if (scale_index < 0 || scale_index >= IWL_RATE_COUNT) | 374 | if (scale_index < 0 || scale_index >= IWL_RATE_COUNT) |
365 | return -EINVAL; | 375 | return -EINVAL; |
366 | 376 | ||
367 | /* Select window for current tx bit rate */ | 377 | /* Select window for current tx bit rate */ |
368 | window = &(windows[scale_index]); | 378 | window = &(tbl->win[scale_index]); |
379 | |||
380 | /* Get expected throughput */ | ||
381 | tpt = get_expected_tpt(tbl, scale_index); | ||
369 | 382 | ||
370 | /* | 383 | /* |
371 | * Keep track of only the latest 62 tx frame attempts in this rate's | 384 | * Keep track of only the latest 62 tx frame attempts in this rate's |
@@ -739,16 +752,6 @@ static bool table_type_matches(struct iwl_scale_tbl_info *a, | |||
739 | return (a->lq_type == b->lq_type) && (a->ant_type == b->ant_type) && | 752 | return (a->lq_type == b->lq_type) && (a->ant_type == b->ant_type) && |
740 | (a->is_SGI == b->is_SGI); | 753 | (a->is_SGI == b->is_SGI); |
741 | } | 754 | } |
742 | /* | ||
743 | * Static function to get the expected throughput from an iwl_scale_tbl_info | ||
744 | * that wraps a NULL pointer check | ||
745 | */ | ||
746 | static s32 get_expected_tpt(struct iwl_scale_tbl_info *tbl, int rs_index) | ||
747 | { | ||
748 | if (tbl->expected_tpt) | ||
749 | return tbl->expected_tpt[rs_index]; | ||
750 | return 0; | ||
751 | } | ||
752 | 755 | ||
753 | /* | 756 | /* |
754 | * mac80211 sends us Tx status | 757 | * mac80211 sends us Tx status |
@@ -765,12 +768,10 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, | |||
765 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | 768 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; |
766 | struct iwl_priv *priv = (struct iwl_priv *)priv_r; | 769 | struct iwl_priv *priv = (struct iwl_priv *)priv_r; |
767 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 770 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
768 | struct iwl_rate_scale_data *window = NULL; | ||
769 | enum mac80211_rate_control_flags mac_flags; | 771 | enum mac80211_rate_control_flags mac_flags; |
770 | u32 tx_rate; | 772 | u32 tx_rate; |
771 | struct iwl_scale_tbl_info tbl_type; | 773 | struct iwl_scale_tbl_info tbl_type; |
772 | struct iwl_scale_tbl_info *curr_tbl, *other_tbl; | 774 | struct iwl_scale_tbl_info *curr_tbl, *other_tbl, *tmp_tbl; |
773 | s32 tpt = 0; | ||
774 | 775 | ||
775 | IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n"); | 776 | IWL_DEBUG_RATE_LIMIT(priv, "get frame ack response, update rate scale window\n"); |
776 | 777 | ||
@@ -853,7 +854,6 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, | |||
853 | IWL_DEBUG_RATE(priv, "Neither active nor search matches tx rate\n"); | 854 | IWL_DEBUG_RATE(priv, "Neither active nor search matches tx rate\n"); |
854 | return; | 855 | return; |
855 | } | 856 | } |
856 | window = (struct iwl_rate_scale_data *)&(curr_tbl->win[0]); | ||
857 | 857 | ||
858 | /* | 858 | /* |
859 | * Updating the frame history depends on whether packets were | 859 | * Updating the frame history depends on whether packets were |
@@ -866,8 +866,7 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, | |||
866 | tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); | 866 | tx_rate = le32_to_cpu(table->rs_table[0].rate_n_flags); |
867 | rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, | 867 | rs_get_tbl_info_from_mcs(tx_rate, priv->band, &tbl_type, |
868 | &rs_index); | 868 | &rs_index); |
869 | tpt = get_expected_tpt(curr_tbl, rs_index); | 869 | rs_collect_tx_data(curr_tbl, rs_index, |
870 | rs_collect_tx_data(window, rs_index, tpt, | ||
871 | info->status.ampdu_ack_len, | 870 | info->status.ampdu_ack_len, |
872 | info->status.ampdu_ack_map); | 871 | info->status.ampdu_ack_map); |
873 | 872 | ||
@@ -897,19 +896,13 @@ static void rs_tx_status(void *priv_r, struct ieee80211_supported_band *sband, | |||
897 | * table as active/search. | 896 | * table as active/search. |
898 | */ | 897 | */ |
899 | if (table_type_matches(&tbl_type, curr_tbl)) | 898 | if (table_type_matches(&tbl_type, curr_tbl)) |
900 | tpt = get_expected_tpt(curr_tbl, rs_index); | 899 | tmp_tbl = curr_tbl; |
901 | else if (table_type_matches(&tbl_type, other_tbl)) | 900 | else if (table_type_matches(&tbl_type, other_tbl)) |
902 | tpt = get_expected_tpt(other_tbl, rs_index); | 901 | tmp_tbl = other_tbl; |
903 | else | 902 | else |
904 | continue; | 903 | continue; |
905 | 904 | rs_collect_tx_data(tmp_tbl, rs_index, 1, | |
906 | /* Constants mean 1 transmission, 0 successes */ | 905 | i < retries ? 0 : legacy_success); |
907 | if (i < retries) | ||
908 | rs_collect_tx_data(window, rs_index, tpt, 1, | ||
909 | 0); | ||
910 | else | ||
911 | rs_collect_tx_data(window, rs_index, tpt, 1, | ||
912 | legacy_success); | ||
913 | } | 906 | } |
914 | 907 | ||
915 | /* Update success/fail counts if not searching for new mode */ | 908 | /* Update success/fail counts if not searching for new mode */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-calib.c b/drivers/net/wireless/iwlwifi/iwl-calib.c index de3b3f403d1f..8b516c5ff0bb 100644 --- a/drivers/net/wireless/iwlwifi/iwl-calib.c +++ b/drivers/net/wireless/iwlwifi/iwl-calib.c | |||
@@ -808,6 +808,18 @@ void iwl_chain_noise_calibration(struct iwl_priv *priv, | |||
808 | } | 808 | } |
809 | } | 809 | } |
810 | 810 | ||
811 | /* | ||
812 | * The above algorithm sometimes fails when the ucode | ||
813 | * reports 0 for all chains. It's not clear why that | ||
814 | * happens to start with, but it is then causing trouble | ||
815 | * because this can make us enable more chains than the | ||
816 | * hardware really has. | ||
817 | * | ||
818 | * To be safe, simply mask out any chains that we know | ||
819 | * are not on the device. | ||
820 | */ | ||
821 | active_chains &= priv->hw_params.valid_rx_ant; | ||
822 | |||
811 | num_tx_chains = 0; | 823 | num_tx_chains = 0; |
812 | for (i = 0; i < NUM_RX_CHAINS; i++) { | 824 | for (i = 0; i < NUM_RX_CHAINS; i++) { |
813 | /* loops on all the bits of | 825 | /* loops on all the bits of |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index db050b811232..3352f7086632 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -308,10 +308,13 @@ int iwl_hw_nic_init(struct iwl_priv *priv) | |||
308 | 308 | ||
309 | spin_unlock_irqrestore(&priv->lock, flags); | 309 | spin_unlock_irqrestore(&priv->lock, flags); |
310 | 310 | ||
311 | /* Allocate and init all Tx and Command queues */ | 311 | /* Allocate or reset and init all Tx and Command queues */ |
312 | ret = iwl_txq_ctx_reset(priv); | 312 | if (!priv->txq) { |
313 | if (ret) | 313 | ret = iwl_txq_ctx_alloc(priv); |
314 | return ret; | 314 | if (ret) |
315 | return ret; | ||
316 | } else | ||
317 | iwl_txq_ctx_reset(priv); | ||
315 | 318 | ||
316 | set_bit(STATUS_INIT, &priv->status); | 319 | set_bit(STATUS_INIT, &priv->status); |
317 | 320 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index 4ef7739f9e8e..732590f5fe30 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -442,7 +442,8 @@ void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb); | |||
442 | /***************************************************** | 442 | /***************************************************** |
443 | * TX | 443 | * TX |
444 | ******************************************************/ | 444 | ******************************************************/ |
445 | int iwl_txq_ctx_reset(struct iwl_priv *priv); | 445 | int iwl_txq_ctx_alloc(struct iwl_priv *priv); |
446 | void iwl_txq_ctx_reset(struct iwl_priv *priv); | ||
446 | void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq); | 447 | void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq); |
447 | int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, | 448 | int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, |
448 | struct iwl_tx_queue *txq, | 449 | struct iwl_tx_queue *txq, |
@@ -456,6 +457,8 @@ void iwl_free_tfds_in_queue(struct iwl_priv *priv, | |||
456 | void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); | 457 | void iwl_txq_update_write_ptr(struct iwl_priv *priv, struct iwl_tx_queue *txq); |
457 | int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, | 458 | int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq, |
458 | int slots_num, u32 txq_id); | 459 | int slots_num, u32 txq_id); |
460 | void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq, | ||
461 | int slots_num, u32 txq_id); | ||
459 | void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id); | 462 | void iwl_tx_queue_free(struct iwl_priv *priv, int txq_id); |
460 | int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn); | 463 | int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn); |
461 | int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid); | 464 | int iwl_tx_agg_stop(struct iwl_priv *priv , const u8 *ra, u16 tid); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c index f0b7e6cfbe4f..8dd0c036d547 100644 --- a/drivers/net/wireless/iwlwifi/iwl-tx.c +++ b/drivers/net/wireless/iwlwifi/iwl-tx.c | |||
@@ -194,10 +194,34 @@ void iwl_cmd_queue_free(struct iwl_priv *priv) | |||
194 | struct iwl_queue *q = &txq->q; | 194 | struct iwl_queue *q = &txq->q; |
195 | struct device *dev = &priv->pci_dev->dev; | 195 | struct device *dev = &priv->pci_dev->dev; |
196 | int i; | 196 | int i; |
197 | bool huge = false; | ||
197 | 198 | ||
198 | if (q->n_bd == 0) | 199 | if (q->n_bd == 0) |
199 | return; | 200 | return; |
200 | 201 | ||
202 | for (; q->read_ptr != q->write_ptr; | ||
203 | q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) { | ||
204 | /* we have no way to tell if it is a huge cmd ATM */ | ||
205 | i = get_cmd_index(q, q->read_ptr, 0); | ||
206 | |||
207 | if (txq->meta[i].flags & CMD_SIZE_HUGE) { | ||
208 | huge = true; | ||
209 | continue; | ||
210 | } | ||
211 | |||
212 | pci_unmap_single(priv->pci_dev, | ||
213 | pci_unmap_addr(&txq->meta[i], mapping), | ||
214 | pci_unmap_len(&txq->meta[i], len), | ||
215 | PCI_DMA_BIDIRECTIONAL); | ||
216 | } | ||
217 | if (huge) { | ||
218 | i = q->n_window; | ||
219 | pci_unmap_single(priv->pci_dev, | ||
220 | pci_unmap_addr(&txq->meta[i], mapping), | ||
221 | pci_unmap_len(&txq->meta[i], len), | ||
222 | PCI_DMA_BIDIRECTIONAL); | ||
223 | } | ||
224 | |||
201 | /* De-alloc array of command/tx buffers */ | 225 | /* De-alloc array of command/tx buffers */ |
202 | for (i = 0; i <= TFD_CMD_SLOTS; i++) | 226 | for (i = 0; i <= TFD_CMD_SLOTS; i++) |
203 | kfree(txq->cmd[i]); | 227 | kfree(txq->cmd[i]); |
@@ -410,6 +434,26 @@ out_free_arrays: | |||
410 | } | 434 | } |
411 | EXPORT_SYMBOL(iwl_tx_queue_init); | 435 | EXPORT_SYMBOL(iwl_tx_queue_init); |
412 | 436 | ||
437 | void iwl_tx_queue_reset(struct iwl_priv *priv, struct iwl_tx_queue *txq, | ||
438 | int slots_num, u32 txq_id) | ||
439 | { | ||
440 | int actual_slots = slots_num; | ||
441 | |||
442 | if (txq_id == IWL_CMD_QUEUE_NUM) | ||
443 | actual_slots++; | ||
444 | |||
445 | memset(txq->meta, 0, sizeof(struct iwl_cmd_meta) * actual_slots); | ||
446 | |||
447 | txq->need_update = 0; | ||
448 | |||
449 | /* Initialize queue's high/low-water marks, and head/tail indexes */ | ||
450 | iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id); | ||
451 | |||
452 | /* Tell device where to find queue */ | ||
453 | priv->cfg->ops->lib->txq_init(priv, txq); | ||
454 | } | ||
455 | EXPORT_SYMBOL(iwl_tx_queue_reset); | ||
456 | |||
413 | /** | 457 | /** |
414 | * iwl_hw_txq_ctx_free - Free TXQ Context | 458 | * iwl_hw_txq_ctx_free - Free TXQ Context |
415 | * | 459 | * |
@@ -421,8 +465,7 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv) | |||
421 | 465 | ||
422 | /* Tx queues */ | 466 | /* Tx queues */ |
423 | if (priv->txq) { | 467 | if (priv->txq) { |
424 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; | 468 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) |
425 | txq_id++) | ||
426 | if (txq_id == IWL_CMD_QUEUE_NUM) | 469 | if (txq_id == IWL_CMD_QUEUE_NUM) |
427 | iwl_cmd_queue_free(priv); | 470 | iwl_cmd_queue_free(priv); |
428 | else | 471 | else |
@@ -438,15 +481,15 @@ void iwl_hw_txq_ctx_free(struct iwl_priv *priv) | |||
438 | EXPORT_SYMBOL(iwl_hw_txq_ctx_free); | 481 | EXPORT_SYMBOL(iwl_hw_txq_ctx_free); |
439 | 482 | ||
440 | /** | 483 | /** |
441 | * iwl_txq_ctx_reset - Reset TX queue context | 484 | * iwl_txq_ctx_alloc - allocate TX queue context |
442 | * Destroys all DMA structures and initialize them again | 485 | * Allocate all Tx DMA structures and initialize them |
443 | * | 486 | * |
444 | * @param priv | 487 | * @param priv |
445 | * @return error code | 488 | * @return error code |
446 | */ | 489 | */ |
447 | int iwl_txq_ctx_reset(struct iwl_priv *priv) | 490 | int iwl_txq_ctx_alloc(struct iwl_priv *priv) |
448 | { | 491 | { |
449 | int ret = 0; | 492 | int ret; |
450 | int txq_id, slots_num; | 493 | int txq_id, slots_num; |
451 | unsigned long flags; | 494 | unsigned long flags; |
452 | 495 | ||
@@ -504,8 +547,31 @@ int iwl_txq_ctx_reset(struct iwl_priv *priv) | |||
504 | return ret; | 547 | return ret; |
505 | } | 548 | } |
506 | 549 | ||
550 | void iwl_txq_ctx_reset(struct iwl_priv *priv) | ||
551 | { | ||
552 | int txq_id, slots_num; | ||
553 | unsigned long flags; | ||
554 | |||
555 | spin_lock_irqsave(&priv->lock, flags); | ||
556 | |||
557 | /* Turn off all Tx DMA fifos */ | ||
558 | priv->cfg->ops->lib->txq_set_sched(priv, 0); | ||
559 | |||
560 | /* Tell NIC where to find the "keep warm" buffer */ | ||
561 | iwl_write_direct32(priv, FH_KW_MEM_ADDR_REG, priv->kw.dma >> 4); | ||
562 | |||
563 | spin_unlock_irqrestore(&priv->lock, flags); | ||
564 | |||
565 | /* Alloc and init all Tx queues, including the command queue (#4) */ | ||
566 | for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) { | ||
567 | slots_num = txq_id == IWL_CMD_QUEUE_NUM ? | ||
568 | TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS; | ||
569 | iwl_tx_queue_reset(priv, &priv->txq[txq_id], slots_num, txq_id); | ||
570 | } | ||
571 | } | ||
572 | |||
507 | /** | 573 | /** |
508 | * iwl_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory | 574 | * iwl_txq_ctx_stop - Stop all Tx DMA channels |
509 | */ | 575 | */ |
510 | void iwl_txq_ctx_stop(struct iwl_priv *priv) | 576 | void iwl_txq_ctx_stop(struct iwl_priv *priv) |
511 | { | 577 | { |
@@ -525,9 +591,6 @@ void iwl_txq_ctx_stop(struct iwl_priv *priv) | |||
525 | 1000); | 591 | 1000); |
526 | } | 592 | } |
527 | spin_unlock_irqrestore(&priv->lock, flags); | 593 | spin_unlock_irqrestore(&priv->lock, flags); |
528 | |||
529 | /* Deallocate memory for all Tx queues */ | ||
530 | iwl_hw_txq_ctx_free(priv); | ||
531 | } | 594 | } |
532 | EXPORT_SYMBOL(iwl_txq_ctx_stop); | 595 | EXPORT_SYMBOL(iwl_txq_ctx_stop); |
533 | 596 | ||
@@ -1050,6 +1113,14 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd) | |||
1050 | 1113 | ||
1051 | spin_lock_irqsave(&priv->hcmd_lock, flags); | 1114 | spin_lock_irqsave(&priv->hcmd_lock, flags); |
1052 | 1115 | ||
1116 | /* If this is a huge cmd, mark the huge flag also on the meta.flags | ||
1117 | * of the _original_ cmd. This is used for DMA mapping clean up. | ||
1118 | */ | ||
1119 | if (cmd->flags & CMD_SIZE_HUGE) { | ||
1120 | idx = get_cmd_index(q, q->write_ptr, 0); | ||
1121 | txq->meta[idx].flags = CMD_SIZE_HUGE; | ||
1122 | } | ||
1123 | |||
1053 | idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE); | 1124 | idx = get_cmd_index(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE); |
1054 | out_cmd = txq->cmd[idx]; | 1125 | out_cmd = txq->cmd[idx]; |
1055 | out_meta = &txq->meta[idx]; | 1126 | out_meta = &txq->meta[idx]; |
@@ -1227,6 +1298,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
1227 | bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME); | 1298 | bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME); |
1228 | struct iwl_device_cmd *cmd; | 1299 | struct iwl_device_cmd *cmd; |
1229 | struct iwl_cmd_meta *meta; | 1300 | struct iwl_cmd_meta *meta; |
1301 | struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM]; | ||
1230 | 1302 | ||
1231 | /* If a Tx command is being handled and it isn't in the actual | 1303 | /* If a Tx command is being handled and it isn't in the actual |
1232 | * command queue then there a command routing bug has been introduced | 1304 | * command queue then there a command routing bug has been introduced |
@@ -1240,9 +1312,17 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
1240 | return; | 1312 | return; |
1241 | } | 1313 | } |
1242 | 1314 | ||
1243 | cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge); | 1315 | /* If this is a huge cmd, clear the huge flag on the meta.flags |
1244 | cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index]; | 1316 | * of the _original_ cmd. So that iwl_cmd_queue_free won't unmap |
1245 | meta = &priv->txq[IWL_CMD_QUEUE_NUM].meta[cmd_index]; | 1317 | * the DMA buffer for the scan (huge) command. |
1318 | */ | ||
1319 | if (huge) { | ||
1320 | cmd_index = get_cmd_index(&txq->q, index, 0); | ||
1321 | txq->meta[cmd_index].flags = 0; | ||
1322 | } | ||
1323 | cmd_index = get_cmd_index(&txq->q, index, huge); | ||
1324 | cmd = txq->cmd[cmd_index]; | ||
1325 | meta = &txq->meta[cmd_index]; | ||
1246 | 1326 | ||
1247 | pci_unmap_single(priv->pci_dev, | 1327 | pci_unmap_single(priv->pci_dev, |
1248 | pci_unmap_addr(meta, mapping), | 1328 | pci_unmap_addr(meta, mapping), |
@@ -1264,6 +1344,7 @@ void iwl_tx_cmd_complete(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb) | |||
1264 | get_cmd_string(cmd->hdr.cmd)); | 1344 | get_cmd_string(cmd->hdr.cmd)); |
1265 | wake_up_interruptible(&priv->wait_command_queue); | 1345 | wake_up_interruptible(&priv->wait_command_queue); |
1266 | } | 1346 | } |
1347 | meta->flags = 0; | ||
1267 | } | 1348 | } |
1268 | EXPORT_SYMBOL(iwl_tx_cmd_complete); | 1349 | EXPORT_SYMBOL(iwl_tx_cmd_complete); |
1269 | 1350 | ||
diff --git a/drivers/pnp/pnpacpi/rsparser.c b/drivers/pnp/pnpacpi/rsparser.c index c6c552f681b7..35bb44af49b3 100644 --- a/drivers/pnp/pnpacpi/rsparser.c +++ b/drivers/pnp/pnpacpi/rsparser.c | |||
@@ -274,12 +274,33 @@ static void pnpacpi_parse_allocated_busresource(struct pnp_dev *dev, | |||
274 | pnp_add_bus_resource(dev, start, end); | 274 | pnp_add_bus_resource(dev, start, end); |
275 | } | 275 | } |
276 | 276 | ||
277 | static u64 addr_space_length(struct pnp_dev *dev, u64 min, u64 max, u64 len) | ||
278 | { | ||
279 | u64 max_len; | ||
280 | |||
281 | max_len = max - min + 1; | ||
282 | if (len <= max_len) | ||
283 | return len; | ||
284 | |||
285 | /* | ||
286 | * Per 6.4.3.5, _LEN cannot exceed _MAX - _MIN + 1, but some BIOSes | ||
287 | * don't do this correctly, e.g., | ||
288 | * https://bugzilla.kernel.org/show_bug.cgi?id=15480 | ||
289 | */ | ||
290 | dev_info(&dev->dev, | ||
291 | "resource length %#llx doesn't fit in %#llx-%#llx, trimming\n", | ||
292 | (unsigned long long) len, (unsigned long long) min, | ||
293 | (unsigned long long) max); | ||
294 | return max_len; | ||
295 | } | ||
296 | |||
277 | static void pnpacpi_parse_allocated_address_space(struct pnp_dev *dev, | 297 | static void pnpacpi_parse_allocated_address_space(struct pnp_dev *dev, |
278 | struct acpi_resource *res) | 298 | struct acpi_resource *res) |
279 | { | 299 | { |
280 | struct acpi_resource_address64 addr, *p = &addr; | 300 | struct acpi_resource_address64 addr, *p = &addr; |
281 | acpi_status status; | 301 | acpi_status status; |
282 | int window; | 302 | int window; |
303 | u64 len; | ||
283 | 304 | ||
284 | status = acpi_resource_to_address64(res, p); | 305 | status = acpi_resource_to_address64(res, p); |
285 | if (!ACPI_SUCCESS(status)) { | 306 | if (!ACPI_SUCCESS(status)) { |
@@ -288,20 +309,18 @@ static void pnpacpi_parse_allocated_address_space(struct pnp_dev *dev, | |||
288 | return; | 309 | return; |
289 | } | 310 | } |
290 | 311 | ||
312 | len = addr_space_length(dev, p->minimum, p->maximum, p->address_length); | ||
291 | window = (p->producer_consumer == ACPI_PRODUCER) ? 1 : 0; | 313 | window = (p->producer_consumer == ACPI_PRODUCER) ? 1 : 0; |
292 | 314 | ||
293 | if (p->resource_type == ACPI_MEMORY_RANGE) | 315 | if (p->resource_type == ACPI_MEMORY_RANGE) |
294 | pnpacpi_parse_allocated_memresource(dev, | 316 | pnpacpi_parse_allocated_memresource(dev, p->minimum, len, |
295 | p->minimum, p->address_length, | ||
296 | p->info.mem.write_protect, window); | 317 | p->info.mem.write_protect, window); |
297 | else if (p->resource_type == ACPI_IO_RANGE) | 318 | else if (p->resource_type == ACPI_IO_RANGE) |
298 | pnpacpi_parse_allocated_ioresource(dev, | 319 | pnpacpi_parse_allocated_ioresource(dev, p->minimum, len, |
299 | p->minimum, p->address_length, | ||
300 | p->granularity == 0xfff ? ACPI_DECODE_10 : | 320 | p->granularity == 0xfff ? ACPI_DECODE_10 : |
301 | ACPI_DECODE_16, window); | 321 | ACPI_DECODE_16, window); |
302 | else if (p->resource_type == ACPI_BUS_NUMBER_RANGE) | 322 | else if (p->resource_type == ACPI_BUS_NUMBER_RANGE) |
303 | pnpacpi_parse_allocated_busresource(dev, p->minimum, | 323 | pnpacpi_parse_allocated_busresource(dev, p->minimum, len); |
304 | p->address_length); | ||
305 | } | 324 | } |
306 | 325 | ||
307 | static void pnpacpi_parse_allocated_ext_address_space(struct pnp_dev *dev, | 326 | static void pnpacpi_parse_allocated_ext_address_space(struct pnp_dev *dev, |
@@ -309,21 +328,20 @@ static void pnpacpi_parse_allocated_ext_address_space(struct pnp_dev *dev, | |||
309 | { | 328 | { |
310 | struct acpi_resource_extended_address64 *p = &res->data.ext_address64; | 329 | struct acpi_resource_extended_address64 *p = &res->data.ext_address64; |
311 | int window; | 330 | int window; |
331 | u64 len; | ||
312 | 332 | ||
333 | len = addr_space_length(dev, p->minimum, p->maximum, p->address_length); | ||
313 | window = (p->producer_consumer == ACPI_PRODUCER) ? 1 : 0; | 334 | window = (p->producer_consumer == ACPI_PRODUCER) ? 1 : 0; |
314 | 335 | ||
315 | if (p->resource_type == ACPI_MEMORY_RANGE) | 336 | if (p->resource_type == ACPI_MEMORY_RANGE) |
316 | pnpacpi_parse_allocated_memresource(dev, | 337 | pnpacpi_parse_allocated_memresource(dev, p->minimum, len, |
317 | p->minimum, p->address_length, | ||
318 | p->info.mem.write_protect, window); | 338 | p->info.mem.write_protect, window); |
319 | else if (p->resource_type == ACPI_IO_RANGE) | 339 | else if (p->resource_type == ACPI_IO_RANGE) |
320 | pnpacpi_parse_allocated_ioresource(dev, | 340 | pnpacpi_parse_allocated_ioresource(dev, p->minimum, len, |
321 | p->minimum, p->address_length, | ||
322 | p->granularity == 0xfff ? ACPI_DECODE_10 : | 341 | p->granularity == 0xfff ? ACPI_DECODE_10 : |
323 | ACPI_DECODE_16, window); | 342 | ACPI_DECODE_16, window); |
324 | else if (p->resource_type == ACPI_BUS_NUMBER_RANGE) | 343 | else if (p->resource_type == ACPI_BUS_NUMBER_RANGE) |
325 | pnpacpi_parse_allocated_busresource(dev, p->minimum, | 344 | pnpacpi_parse_allocated_busresource(dev, p->minimum, len); |
326 | p->address_length); | ||
327 | } | 345 | } |
328 | 346 | ||
329 | static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res, | 347 | static acpi_status pnpacpi_allocated_resource(struct acpi_resource *res, |
diff --git a/drivers/s390/char/sclp_async.c b/drivers/s390/char/sclp_async.c index 2aecf7f21361..7ad30e72f868 100644 --- a/drivers/s390/char/sclp_async.c +++ b/drivers/s390/char/sclp_async.c | |||
@@ -85,7 +85,7 @@ static int proc_handler_callhome(struct ctl_table *ctl, int write, | |||
85 | rc = copy_from_user(buf, buffer, sizeof(buf)); | 85 | rc = copy_from_user(buf, buffer, sizeof(buf)); |
86 | if (rc != 0) | 86 | if (rc != 0) |
87 | return -EFAULT; | 87 | return -EFAULT; |
88 | buf[len - 1] = '\0'; | 88 | buf[sizeof(buf) - 1] = '\0'; |
89 | if (strict_strtoul(buf, 0, &val) != 0) | 89 | if (strict_strtoul(buf, 0, &val) != 0) |
90 | return -EINVAL; | 90 | return -EINVAL; |
91 | if (val != 0 && val != 1) | 91 | if (val != 0 && val != 1) |
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index 58c62ff42ab3..8b827f37b03e 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c | |||
@@ -2186,7 +2186,7 @@ static void sd_probe_async(void *data, async_cookie_t cookie) | |||
2186 | blk_queue_prep_rq(sdp->request_queue, sd_prep_fn); | 2186 | blk_queue_prep_rq(sdp->request_queue, sd_prep_fn); |
2187 | 2187 | ||
2188 | gd->driverfs_dev = &sdp->sdev_gendev; | 2188 | gd->driverfs_dev = &sdp->sdev_gendev; |
2189 | gd->flags = GENHD_FL_EXT_DEVT | GENHD_FL_DRIVERFS; | 2189 | gd->flags = GENHD_FL_EXT_DEVT; |
2190 | if (sdp->removable) | 2190 | if (sdp->removable) |
2191 | gd->flags |= GENHD_FL_REMOVABLE; | 2191 | gd->flags |= GENHD_FL_REMOVABLE; |
2192 | 2192 | ||
diff --git a/drivers/ssb/driver_pcicore.c b/drivers/ssb/driver_pcicore.c index f1dcd7969a5c..0e8d35224614 100644 --- a/drivers/ssb/driver_pcicore.c +++ b/drivers/ssb/driver_pcicore.c | |||
@@ -246,20 +246,12 @@ static struct pci_controller ssb_pcicore_controller = { | |||
246 | .pci_ops = &ssb_pcicore_pciops, | 246 | .pci_ops = &ssb_pcicore_pciops, |
247 | .io_resource = &ssb_pcicore_io_resource, | 247 | .io_resource = &ssb_pcicore_io_resource, |
248 | .mem_resource = &ssb_pcicore_mem_resource, | 248 | .mem_resource = &ssb_pcicore_mem_resource, |
249 | .mem_offset = 0x24000000, | ||
250 | }; | 249 | }; |
251 | 250 | ||
252 | static u32 ssb_pcicore_pcibus_iobase = 0x100; | ||
253 | static u32 ssb_pcicore_pcibus_membase = SSB_PCI_DMA; | ||
254 | |||
255 | /* This function is called when doing a pci_enable_device(). | 251 | /* This function is called when doing a pci_enable_device(). |
256 | * We must first check if the device is a device on the PCI-core bridge. */ | 252 | * We must first check if the device is a device on the PCI-core bridge. */ |
257 | int ssb_pcicore_plat_dev_init(struct pci_dev *d) | 253 | int ssb_pcicore_plat_dev_init(struct pci_dev *d) |
258 | { | 254 | { |
259 | struct resource *res; | ||
260 | int pos, size; | ||
261 | u32 *base; | ||
262 | |||
263 | if (d->bus->ops != &ssb_pcicore_pciops) { | 255 | if (d->bus->ops != &ssb_pcicore_pciops) { |
264 | /* This is not a device on the PCI-core bridge. */ | 256 | /* This is not a device on the PCI-core bridge. */ |
265 | return -ENODEV; | 257 | return -ENODEV; |
@@ -268,27 +260,6 @@ int ssb_pcicore_plat_dev_init(struct pci_dev *d) | |||
268 | ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", | 260 | ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", |
269 | pci_name(d)); | 261 | pci_name(d)); |
270 | 262 | ||
271 | /* Fix up resource bases */ | ||
272 | for (pos = 0; pos < 6; pos++) { | ||
273 | res = &d->resource[pos]; | ||
274 | if (res->flags & IORESOURCE_IO) | ||
275 | base = &ssb_pcicore_pcibus_iobase; | ||
276 | else | ||
277 | base = &ssb_pcicore_pcibus_membase; | ||
278 | res->flags |= IORESOURCE_PCI_FIXED; | ||
279 | if (res->end) { | ||
280 | size = res->end - res->start + 1; | ||
281 | if (*base & (size - 1)) | ||
282 | *base = (*base + size) & ~(size - 1); | ||
283 | res->start = *base; | ||
284 | res->end = res->start + size - 1; | ||
285 | *base += size; | ||
286 | pci_write_config_dword(d, PCI_BASE_ADDRESS_0 + (pos << 2), res->start); | ||
287 | } | ||
288 | /* Fix up PCI bridge BAR0 only */ | ||
289 | if (d->bus->number == 0 && PCI_SLOT(d->devfn) == 0) | ||
290 | break; | ||
291 | } | ||
292 | /* Fix up interrupt lines */ | 263 | /* Fix up interrupt lines */ |
293 | d->irq = ssb_mips_irq(extpci_core->dev) + 2; | 264 | d->irq = ssb_mips_irq(extpci_core->dev) + 2; |
294 | pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); | 265 | pci_write_config_byte(d, PCI_INTERRUPT_LINE, d->irq); |
diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c index 5be11c99e18f..e69d238c5af0 100644 --- a/drivers/vhost/vhost.c +++ b/drivers/vhost/vhost.c | |||
@@ -236,6 +236,10 @@ static int vq_memory_access_ok(void __user *log_base, struct vhost_memory *mem, | |||
236 | int log_all) | 236 | int log_all) |
237 | { | 237 | { |
238 | int i; | 238 | int i; |
239 | |||
240 | if (!mem) | ||
241 | return 0; | ||
242 | |||
239 | for (i = 0; i < mem->nregions; ++i) { | 243 | for (i = 0; i < mem->nregions; ++i) { |
240 | struct vhost_memory_region *m = mem->regions + i; | 244 | struct vhost_memory_region *m = mem->regions + i; |
241 | unsigned long a = m->userspace_addr; | 245 | unsigned long a = m->userspace_addr; |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 0e8468ffd100..0bf5020d0d32 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -194,10 +194,10 @@ config EP93XX_WATCHDOG | |||
194 | 194 | ||
195 | config OMAP_WATCHDOG | 195 | config OMAP_WATCHDOG |
196 | tristate "OMAP Watchdog" | 196 | tristate "OMAP Watchdog" |
197 | depends on ARCH_OMAP16XX || ARCH_OMAP2 || ARCH_OMAP3 | 197 | depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS |
198 | help | 198 | help |
199 | Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog. Say 'Y' | 199 | Support for TI OMAP1610/OMAP1710/OMAP2420/OMAP3430/OMAP4430 watchdog. Say 'Y' |
200 | here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430 watchdog timer. | 200 | here to enable the OMAP1610/OMAP1710/OMAP2420/OMAP3430/OMAP4430 watchdog timer. |
201 | 201 | ||
202 | config PNX4008_WATCHDOG | 202 | config PNX4008_WATCHDOG |
203 | tristate "PNX4008 Watchdog" | 203 | tristate "PNX4008 Watchdog" |
@@ -302,7 +302,7 @@ config TS72XX_WATCHDOG | |||
302 | 302 | ||
303 | config MAX63XX_WATCHDOG | 303 | config MAX63XX_WATCHDOG |
304 | tristate "Max63xx watchdog" | 304 | tristate "Max63xx watchdog" |
305 | depends on ARM | 305 | depends on ARM && HAS_IOMEM |
306 | help | 306 | help |
307 | Support for memory mapped max63{69,70,71,72,73,74} watchdog timer. | 307 | Support for memory mapped max63{69,70,71,72,73,74} watchdog timer. |
308 | 308 | ||
diff --git a/drivers/watchdog/booke_wdt.c b/drivers/watchdog/booke_wdt.c index 8b724aad6825..500d38342e1e 100644 --- a/drivers/watchdog/booke_wdt.c +++ b/drivers/watchdog/booke_wdt.c | |||
@@ -44,7 +44,7 @@ u32 booke_wdt_period = WDT_PERIOD_DEFAULT; | |||
44 | 44 | ||
45 | #ifdef CONFIG_FSL_BOOKE | 45 | #ifdef CONFIG_FSL_BOOKE |
46 | #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) | 46 | #define WDTP(x) ((((x)&0x3)<<30)|(((x)&0x3c)<<15)) |
47 | #define WDTP_MASK (WDTP(0)) | 47 | #define WDTP_MASK (WDTP(0x3f)) |
48 | #else | 48 | #else |
49 | #define WDTP(x) (TCR_WP(x)) | 49 | #define WDTP(x) (TCR_WP(x)) |
50 | #define WDTP_MASK (TCR_WP_MASK) | 50 | #define WDTP_MASK (TCR_WP_MASK) |
diff --git a/drivers/watchdog/max63xx_wdt.c b/drivers/watchdog/max63xx_wdt.c index 75f3a83c0361..3053ff05ca41 100644 --- a/drivers/watchdog/max63xx_wdt.c +++ b/drivers/watchdog/max63xx_wdt.c | |||
@@ -154,9 +154,14 @@ static void max63xx_wdt_enable(struct max63xx_timeout *entry) | |||
154 | 154 | ||
155 | static void max63xx_wdt_disable(void) | 155 | static void max63xx_wdt_disable(void) |
156 | { | 156 | { |
157 | u8 val; | ||
158 | |||
157 | spin_lock(&io_lock); | 159 | spin_lock(&io_lock); |
158 | 160 | ||
159 | __raw_writeb(3, wdt_base); | 161 | val = __raw_readb(wdt_base); |
162 | val &= ~MAX6369_WDSET; | ||
163 | val |= 3; | ||
164 | __raw_writeb(val, wdt_base); | ||
160 | 165 | ||
161 | spin_unlock(&io_lock); | 166 | spin_unlock(&io_lock); |
162 | 167 | ||