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authorGreg Kroah-Hartman <gregkh@suse.de>2009-10-26 19:35:32 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2009-10-30 17:47:44 -0400
commit9ab1b56aa02aa4d578232a8addc785c91e7b2bac (patch)
tree536a25925386849621722e2c45a7d048b0f9e31c /drivers
parenta010a3375227efbd6b8ac11b99c34c807a77c45a (diff)
Staging: remove stlc45xx driver
It's no longer needed as the p54spi driver is the same thing, under a different name and in the correct portion of the kernel tree. Cc: Javier Martinez Canillas <martinez.javier@gmail.com> Cc: Christian Lamparter <chunkeey@googlemail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/staging/Kconfig2
-rw-r--r--drivers/staging/Makefile1
-rw-r--r--drivers/staging/stlc45xx/Kconfig8
-rw-r--r--drivers/staging/stlc45xx/Makefile1
-rw-r--r--drivers/staging/stlc45xx/stlc45xx.c2594
-rw-r--r--drivers/staging/stlc45xx/stlc45xx.h283
-rw-r--r--drivers/staging/stlc45xx/stlc45xx_lmac.h434
7 files changed, 0 insertions, 3323 deletions
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 7df3ba4f1f4d..d21b3469f6d7 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -93,8 +93,6 @@ source "drivers/staging/dst/Kconfig"
93 93
94source "drivers/staging/pohmelfs/Kconfig" 94source "drivers/staging/pohmelfs/Kconfig"
95 95
96source "drivers/staging/stlc45xx/Kconfig"
97
98source "drivers/staging/b3dfg/Kconfig" 96source "drivers/staging/b3dfg/Kconfig"
99 97
100source "drivers/staging/phison/Kconfig" 98source "drivers/staging/phison/Kconfig"
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 747571172269..8cbf1aebea2e 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_ANDROID) += android/
29obj-$(CONFIG_ANDROID) += dream/ 29obj-$(CONFIG_ANDROID) += dream/
30obj-$(CONFIG_DST) += dst/ 30obj-$(CONFIG_DST) += dst/
31obj-$(CONFIG_POHMELFS) += pohmelfs/ 31obj-$(CONFIG_POHMELFS) += pohmelfs/
32obj-$(CONFIG_STLC45XX) += stlc45xx/
33obj-$(CONFIG_B3DFG) += b3dfg/ 32obj-$(CONFIG_B3DFG) += b3dfg/
34obj-$(CONFIG_IDE_PHISON) += phison/ 33obj-$(CONFIG_IDE_PHISON) += phison/
35obj-$(CONFIG_PLAN9AUTH) += p9auth/ 34obj-$(CONFIG_PLAN9AUTH) += p9auth/
diff --git a/drivers/staging/stlc45xx/Kconfig b/drivers/staging/stlc45xx/Kconfig
deleted file mode 100644
index 947fb75a9c68..000000000000
--- a/drivers/staging/stlc45xx/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
1config STLC45XX
2 tristate "stlc4550/4560 support"
3 depends on MAC80211 && WLAN_80211 && SPI_MASTER && GENERIC_HARDIRQS
4 ---help---
5 This is a driver for stlc4550 and stlc4560 chipsets.
6
7 To compile this driver as a module, choose M here: the module will be
8 called stlc45xx. If unsure, say N.
diff --git a/drivers/staging/stlc45xx/Makefile b/drivers/staging/stlc45xx/Makefile
deleted file mode 100644
index 7ee32903055a..000000000000
--- a/drivers/staging/stlc45xx/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-$(CONFIG_STLC45XX) += stlc45xx.o
diff --git a/drivers/staging/stlc45xx/stlc45xx.c b/drivers/staging/stlc45xx/stlc45xx.c
deleted file mode 100644
index be99eb33d817..000000000000
--- a/drivers/staging/stlc45xx/stlc45xx.c
+++ /dev/null
@@ -1,2594 +0,0 @@
1/*
2 * This file is part of stlc45xx
3 *
4 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include "stlc45xx.h"
25
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/interrupt.h>
29#include <linux/firmware.h>
30#include <linux/delay.h>
31#include <linux/irq.h>
32#include <linux/spi/spi.h>
33#include <linux/etherdevice.h>
34#include <linux/gpio.h>
35#include <linux/moduleparam.h>
36
37#include "stlc45xx_lmac.h"
38
39/*
40 * gpios should be handled in board files and provided via platform data,
41 * but because it's currently impossible for stlc45xx to have a header file
42 * in include/linux, let's use module paramaters for now
43 */
44static int stlc45xx_gpio_power = 97;
45module_param(stlc45xx_gpio_power, int, 0444);
46MODULE_PARM_DESC(stlc45xx_gpio_power, "stlc45xx gpio number for power line");
47
48static int stlc45xx_gpio_irq = 87;
49module_param(stlc45xx_gpio_irq, int, 0444);
50MODULE_PARM_DESC(stlc45xx_gpio_irq, "stlc45xx gpio number for irq line");
51
52static const u8 default_cal_channels[] = {
53 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6c, 0x09,
55 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10,
56 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xe0, 0x00, 0xe0, 0x00,
57 0xe0, 0x00, 0xe0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0,
58 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42,
59 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00,
60 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9,
61 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00,
62 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc,
63 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0,
64 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4,
65 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d,
66 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa,
67 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00,
68 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17,
69 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00,
70 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00,
71 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00,
72 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96,
73 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
79 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x71, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8,
82 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01,
83 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0,
84 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6,
85 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00,
86 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb,
87 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0,
88 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc,
89 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca,
90 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4,
91 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00,
92 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21,
93 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00,
94 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00,
95 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00,
96 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0,
97 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0,
98 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96,
99 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00,
100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80,
106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76,
108 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01,
109 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0,
110 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00,
111 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0,
112 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb,
113 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37,
114 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc,
115 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00,
116 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b,
117 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00,
118 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00,
119 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00,
120 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa,
121 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0,
122 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0,
123 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a,
124 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d,
125 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00,
126 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
132 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
134 0x00, 0x00, 0x00, 0x00, 0x00, 0x7b, 0x09, 0x00, 0x00, 0xc9, 0xff,
135 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10,
136 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00,
137 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab,
138 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb,
139 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00,
140 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33,
141 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00,
142 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00,
143 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00,
144 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4,
145 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0,
146 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa,
147 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7,
148 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17,
149 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00,
150 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d,
151 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00,
152 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96,
153 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
154 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
155 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
156 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
157 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
158 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80,
159 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
160 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
161 0x80, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00,
162 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00,
163 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0,
164 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42,
165 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00,
166 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01,
167 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00,
168 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc,
169 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0,
170 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4,
171 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0,
172 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21,
173 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00,
174 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17,
175 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00,
176 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0,
177 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0,
178 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96,
179 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00,
180 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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349 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
350 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
351 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
352 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
353 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
354 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
355 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
356 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
357 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
358 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
359 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
360 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
361 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
362 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
363 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
364 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
365 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
366 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
367 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
368 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
369 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
370 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
371 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
372 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
373 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
374 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
375 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
376 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
377 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
378 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
379 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
380 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
381 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
382 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
383 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
384 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
385 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
387 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
388 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
389 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
390 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
391 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
392 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
393 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
394 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
395 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
396 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
398 0x00 };
399
400static const u8 default_cal_rssi[] = {
401 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72,
402 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00,
403 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a,
404 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe,
405 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00,
406 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01,
407 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a,
408 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00,
409 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
410 0x00, 0x00, 0x00, 0x00, 0x00 };
411
412static void stlc45xx_tx_edcf(struct stlc45xx *stlc);
413static void stlc45xx_tx_setup(struct stlc45xx *stlc);
414static void stlc45xx_tx_scan(struct stlc45xx *stlc);
415static void stlc45xx_tx_psm(struct stlc45xx *stlc, bool enable);
416static int stlc45xx_tx_nullfunc(struct stlc45xx *stlc, bool powersave);
417static int stlc45xx_tx_pspoll(struct stlc45xx *stlc, bool powersave);
418
419static ssize_t stlc45xx_sysfs_show_cal_rssi(struct device *dev,
420 struct device_attribute *attr,
421 char *buf)
422{
423 struct stlc45xx *stlc = dev_get_drvdata(dev);
424 ssize_t len;
425
426 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
427
428 len = PAGE_SIZE;
429
430 mutex_lock(&stlc->mutex);
431
432 if (stlc->cal_rssi)
433 hex_dump_to_buffer(stlc->cal_rssi, RSSI_CAL_ARRAY_LEN, 16,
434 2, buf, len, 0);
435 mutex_unlock(&stlc->mutex);
436
437 len = strlen(buf);
438
439 return len;
440}
441
442static ssize_t stlc45xx_sysfs_store_cal_rssi(struct device *dev,
443 struct device_attribute *attr,
444 const char *buf, size_t count)
445{
446 struct stlc45xx *stlc = dev_get_drvdata(dev);
447
448 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
449
450 mutex_lock(&stlc->mutex);
451
452 if (count != RSSI_CAL_ARRAY_LEN) {
453 stlc45xx_error("invalid cal_rssi length: %zu", count);
454 count = 0;
455 goto out_unlock;
456 }
457
458 kfree(stlc->cal_rssi);
459
460 stlc->cal_rssi = kmemdup(buf, RSSI_CAL_ARRAY_LEN, GFP_KERNEL);
461
462 if (!stlc->cal_rssi) {
463 stlc45xx_error("failed to allocate memory for cal_rssi");
464 count = 0;
465 goto out_unlock;
466 }
467
468 out_unlock:
469 mutex_unlock(&stlc->mutex);
470
471 return count;
472}
473
474static ssize_t stlc45xx_sysfs_show_cal_channels(struct device *dev,
475 struct device_attribute *attr,
476 char *buf)
477{
478 struct stlc45xx *stlc = dev_get_drvdata(dev);
479 ssize_t len;
480
481 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
482
483 len = PAGE_SIZE;
484
485 mutex_lock(&stlc->mutex);
486
487 if (stlc->cal_channels)
488 hex_dump_to_buffer(stlc->cal_channels, CHANNEL_CAL_ARRAY_LEN,
489 16, 2, buf, len, 0);
490
491 mutex_unlock(&stlc->mutex);
492
493 len = strlen(buf);
494
495 return len;
496}
497
498static ssize_t stlc45xx_sysfs_store_cal_channels(struct device *dev,
499 struct device_attribute *attr,
500 const char *buf, size_t count)
501{
502 struct stlc45xx *stlc = dev_get_drvdata(dev);
503
504 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
505
506 mutex_lock(&stlc->mutex);
507
508 if (count != CHANNEL_CAL_ARRAY_LEN) {
509 stlc45xx_error("invalid cal_channels size: %zu ", count);
510 count = 0;
511 goto out_unlock;
512 }
513
514 kfree(stlc->cal_channels);
515
516 stlc->cal_channels = kmemdup(buf, count, GFP_KERNEL);
517
518 if (!stlc->cal_channels) {
519 stlc45xx_error("failed to allocate memory for cal_channels");
520 count = 0;
521 goto out_unlock;
522 }
523
524out_unlock:
525 mutex_unlock(&stlc->mutex);
526
527 return count;
528}
529
530static ssize_t stlc45xx_sysfs_show_tx_buf(struct device *dev,
531 struct device_attribute *attr,
532 char *buf)
533{
534 struct stlc45xx *stlc = dev_get_drvdata(dev);
535 struct txbuffer *entry;
536 ssize_t len = 0;
537
538 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
539
540 mutex_lock(&stlc->mutex);
541
542 list_for_each_entry(entry, &stlc->tx_sent, tx_list) {
543 len += sprintf(buf + len, "0x%x: 0x%x-0x%x\n",
544 entry->handle, entry->start,
545 entry->end);
546 }
547
548 mutex_unlock(&stlc->mutex);
549
550 return len;
551}
552
553static DEVICE_ATTR(cal_rssi, S_IRUGO | S_IWUSR,
554 stlc45xx_sysfs_show_cal_rssi,
555 stlc45xx_sysfs_store_cal_rssi);
556static DEVICE_ATTR(cal_channels, S_IRUGO | S_IWUSR,
557 stlc45xx_sysfs_show_cal_channels,
558 stlc45xx_sysfs_store_cal_channels);
559static DEVICE_ATTR(tx_buf, S_IRUGO, stlc45xx_sysfs_show_tx_buf, NULL);
560
561static void stlc45xx_spi_read(struct stlc45xx *stlc, unsigned long addr,
562 void *buf, size_t len)
563{
564 struct spi_transfer t[2];
565 struct spi_message m;
566
567 /* We first push the address */
568 addr = (addr << 8) | ADDR_READ_BIT_15;
569
570 spi_message_init(&m);
571 memset(t, 0, sizeof(t));
572
573 t[0].tx_buf = &addr;
574 t[0].len = 2;
575 spi_message_add_tail(&t[0], &m);
576
577 t[1].rx_buf = buf;
578 t[1].len = len;
579 spi_message_add_tail(&t[1], &m);
580
581 spi_sync(stlc->spi, &m);
582}
583
584
585static void stlc45xx_spi_write(struct stlc45xx *stlc, unsigned long addr,
586 void *buf, size_t len)
587{
588 struct spi_transfer t[3];
589 struct spi_message m;
590 u16 last_word;
591
592 /* We first push the address */
593 addr = addr << 8;
594
595 spi_message_init(&m);
596 memset(t, 0, sizeof(t));
597
598 t[0].tx_buf = &addr;
599 t[0].len = 2;
600 spi_message_add_tail(&t[0], &m);
601
602 t[1].tx_buf = buf;
603 t[1].len = len;
604 spi_message_add_tail(&t[1], &m);
605
606 if (len % 2) {
607 last_word = ((u8 *)buf)[len - 1];
608
609 t[2].tx_buf = &last_word;
610 t[2].len = 2;
611 spi_message_add_tail(&t[2], &m);
612 }
613
614 spi_sync(stlc->spi, &m);
615}
616
617static u16 stlc45xx_read16(struct stlc45xx *stlc, unsigned long addr)
618{
619 u16 val;
620
621 stlc45xx_spi_read(stlc, addr, &val, sizeof(val));
622
623 return val;
624}
625
626static u32 stlc45xx_read32(struct stlc45xx *stlc, unsigned long addr)
627{
628 u32 val;
629
630 stlc45xx_spi_read(stlc, addr, &val, sizeof(val));
631
632 return val;
633}
634
635static void stlc45xx_write16(struct stlc45xx *stlc, unsigned long addr, u16 val)
636{
637 stlc45xx_spi_write(stlc, addr, &val, sizeof(val));
638}
639
640static void stlc45xx_write32(struct stlc45xx *stlc, unsigned long addr, u32 val)
641{
642 stlc45xx_spi_write(stlc, addr, &val, sizeof(val));
643}
644
645struct stlc45xx_spi_reg {
646 u16 address;
647 u16 length;
648 char *name;
649};
650
651/* caller must hold tx_lock */
652static void stlc45xx_txbuffer_dump(struct stlc45xx *stlc)
653{
654 struct txbuffer *txbuffer;
655 char *buf, *pos;
656 int buf_len, l, count;
657
658 if (!(DEBUG_LEVEL & DEBUG_TXBUFFER))
659 return;
660
661 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
662
663 buf_len = 500;
664 buf = kmalloc(buf_len, GFP_ATOMIC);
665 if (!buf)
666 return;
667
668 pos = buf;
669 count = 0;
670
671 list_for_each_entry(txbuffer, &stlc->txbuffer, buffer_list) {
672 l = snprintf(pos, buf_len, "0x%x-0x%x,",
673 txbuffer->start, txbuffer->end);
674 /* drop the null byte */
675 pos += l;
676 buf_len -= l;
677 count++;
678 }
679
680 if (count == 0)
681 *pos = '\0';
682 else
683 *--pos = '\0';
684
685 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: in buffer %d regions: %s",
686 count, buf);
687
688 kfree(buf);
689}
690
691/* caller must hold tx_lock */
692static int stlc45xx_txbuffer_find(struct stlc45xx *stlc, size_t len)
693{
694 struct txbuffer *txbuffer;
695 int pos;
696
697 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
698
699 pos = FIRMWARE_TXBUFFER_START;
700
701 if (list_empty(&stlc->txbuffer))
702 goto out;
703
704 /*
705 * the entries in txbuffer must be in the same order as they are in
706 * the real buffer
707 */
708 list_for_each_entry(txbuffer, &stlc->txbuffer, buffer_list) {
709 if (pos + len < txbuffer->start)
710 break;
711 pos = ALIGN(txbuffer->end + 1, 4);
712 }
713
714 if (pos + len > FIRMWARE_TXBUFFER_END)
715 /* not enough room */
716 pos = -1;
717
718 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: find %zu B: 0x%x", len, pos);
719
720out:
721 return pos;
722}
723
724static int stlc45xx_txbuffer_add(struct stlc45xx *stlc,
725 struct txbuffer *txbuffer)
726{
727 struct txbuffer *r, *prev = NULL;
728
729 if (list_empty(&stlc->txbuffer)) {
730 list_add(&txbuffer->buffer_list, &stlc->txbuffer);
731 return 0;
732 }
733
734 r = list_first_entry(&stlc->txbuffer, struct txbuffer, buffer_list);
735
736 if (txbuffer->start < r->start) {
737 /* add to the beginning of the list */
738 list_add(&txbuffer->buffer_list, &stlc->txbuffer);
739 return 0;
740 }
741
742 prev = NULL;
743 list_for_each_entry(r, &stlc->txbuffer, buffer_list) {
744 /* skip first entry, we checked for that above */
745 if (!prev) {
746 prev = r;
747 continue;
748 }
749
750 /* double-check overlaps */
751 WARN_ON_ONCE(txbuffer->start >= r->start &&
752 txbuffer->start <= r->end);
753 WARN_ON_ONCE(txbuffer->end >= r->start &&
754 txbuffer->end <= r->end);
755
756 if (prev->end < txbuffer->start &&
757 txbuffer->end < r->start) {
758 /* insert at this spot */
759 list_add_tail(&txbuffer->buffer_list, &r->buffer_list);
760 return 0;
761 }
762
763 prev = r;
764 }
765
766 /* not found */
767 list_add_tail(&txbuffer->buffer_list, &stlc->txbuffer);
768
769 return 0;
770
771}
772
773/* caller must hold tx_lock */
774static struct txbuffer *stlc45xx_txbuffer_alloc(struct stlc45xx *stlc,
775 size_t frame_len)
776{
777 struct txbuffer *entry = NULL;
778 size_t len;
779 int pos;
780
781 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
782
783 len = FIRMWARE_TXBUFFER_HEADER + frame_len + FIRMWARE_TXBUFFER_TRAILER;
784 pos = stlc45xx_txbuffer_find(stlc, len);
785
786 if (pos < 0)
787 return NULL;
788
789 WARN_ON_ONCE(pos + len > FIRMWARE_TXBUFFER_END);
790 WARN_ON_ONCE(pos < FIRMWARE_TXBUFFER_START);
791
792 entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
793 entry->start = pos;
794 entry->frame_start = pos + FIRMWARE_TXBUFFER_HEADER;
795 entry->end = entry->start + len - 1;
796
797 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: allocated 0x%x-0x%x",
798 entry->start, entry->end);
799
800 stlc45xx_txbuffer_add(stlc, entry);
801
802 stlc45xx_txbuffer_dump(stlc);
803
804 return entry;
805}
806
807/* caller must hold tx_lock */
808static void stlc45xx_txbuffer_free(struct stlc45xx *stlc,
809 struct txbuffer *txbuffer)
810{
811 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
812
813 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: freed 0x%x-0x%x",
814 txbuffer->start, txbuffer->end);
815
816 list_del(&txbuffer->buffer_list);
817 kfree(txbuffer);
818}
819
820
821static int stlc45xx_wait_bit(struct stlc45xx *stlc, u16 reg, u32 mask,
822 u32 expected)
823{
824 int i;
825 char buffer[4];
826
827 for (i = 0; i < 2000; i++) {
828 stlc45xx_spi_read(stlc, reg, buffer, sizeof(buffer));
829 if (((*(u32 *)buffer) & mask) == expected)
830 return 1;
831 msleep(1);
832 }
833
834 return 0;
835}
836
837static int stlc45xx_request_firmware(struct stlc45xx *stlc)
838{
839 const struct firmware *fw;
840 int ret;
841
842 /* FIXME: should driver use it's own struct device? */
843 ret = request_firmware(&fw, "3826.arm", &stlc->spi->dev);
844
845 if (ret < 0) {
846 stlc45xx_error("request_firmware() failed: %d", ret);
847 return ret;
848 }
849
850 if (fw->size % 4) {
851 stlc45xx_error("firmware size is not multiple of 32bit: %zu",
852 fw->size);
853 return -EILSEQ; /* Illegal byte sequence */;
854 }
855
856 if (fw->size < 1000) {
857 stlc45xx_error("firmware is too small: %zu", fw->size);
858 return -EILSEQ;
859 }
860
861 stlc->fw = kmemdup(fw->data, fw->size, GFP_KERNEL);
862 if (!stlc->fw) {
863 stlc45xx_error("could not allocate memory for firmware");
864 return -ENOMEM;
865 }
866
867 stlc->fw_len = fw->size;
868
869 release_firmware(fw);
870
871 return 0;
872}
873
874static int stlc45xx_upload_firmware(struct stlc45xx *stlc)
875{
876 struct s_dma_regs dma_regs;
877 unsigned long fw_len, fw_addr;
878 long _fw_len;
879 int ret;
880
881 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
882
883 if (!stlc->fw) {
884 ret = stlc45xx_request_firmware(stlc);
885 if (ret < 0)
886 return ret;
887 }
888
889 /* stop the device */
890 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
891 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET
892 | SPI_CTRL_STAT_START_HALTED);
893
894 msleep(TARGET_BOOT_SLEEP);
895
896 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
897 SPI_CTRL_STAT_HOST_OVERRIDE
898 | SPI_CTRL_STAT_START_HALTED);
899
900 msleep(TARGET_BOOT_SLEEP);
901
902 fw_addr = FIRMWARE_ADDRESS;
903 fw_len = stlc->fw_len;
904
905 while (fw_len > 0) {
906 _fw_len = (fw_len > SPI_MAX_PACKET_SIZE)
907 ? SPI_MAX_PACKET_SIZE : fw_len;
908 dma_regs.cmd = SPI_DMA_WRITE_CTRL_ENABLE;
909 dma_regs.len = cpu_to_le16(_fw_len);
910 dma_regs.addr = cpu_to_le32(fw_addr);
911
912 fw_len -= _fw_len;
913 fw_addr += _fw_len;
914
915 stlc45xx_write16(stlc, SPI_ADRS_DMA_WRITE_CTRL, dma_regs.cmd);
916
917 if (stlc45xx_wait_bit(stlc, SPI_ADRS_DMA_WRITE_CTRL,
918 HOST_ALLOWED, HOST_ALLOWED) == 0) {
919 stlc45xx_error("fw_upload not allowed to DMA write");
920 return -EAGAIN;
921 }
922
923 stlc45xx_write16(stlc, SPI_ADRS_DMA_WRITE_LEN, dma_regs.len);
924 stlc45xx_write32(stlc, SPI_ADRS_DMA_WRITE_BASE, dma_regs.addr);
925
926 stlc45xx_spi_write(stlc, SPI_ADRS_DMA_DATA, stlc->fw, _fw_len);
927
928 /* FIXME: I think this doesn't work if firmware is large,
929 * this loop goes to second round. fw->data is not
930 * increased at all! */
931 }
932
933 BUG_ON(fw_len != 0);
934
935 /* enable host interrupts */
936 stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_EN, SPI_HOST_INTS_DEFAULT);
937
938 /* boot the device */
939 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
940 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET
941 | SPI_CTRL_STAT_RAM_BOOT);
942
943 msleep(TARGET_BOOT_SLEEP);
944
945 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
946 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT);
947 msleep(TARGET_BOOT_SLEEP);
948
949 return 0;
950}
951
952/* caller must hold tx_lock */
953static void stlc45xx_check_txsent(struct stlc45xx *stlc)
954{
955 struct txbuffer *entry, *n;
956
957 list_for_each_entry_safe(entry, n, &stlc->tx_sent, tx_list) {
958 if (time_after(jiffies, entry->lifetime)) {
959 if (net_ratelimit())
960 stlc45xx_warning("frame 0x%x lifetime exceeded",
961 entry->start);
962 list_del(&entry->tx_list);
963 skb_pull(entry->skb, entry->header_len);
964 ieee80211_tx_status(stlc->hw, entry->skb);
965 stlc45xx_txbuffer_free(stlc, entry);
966 }
967 }
968}
969
970static void stlc45xx_power_off(struct stlc45xx *stlc)
971{
972 disable_irq(gpio_to_irq(stlc45xx_gpio_irq));
973 gpio_set_value(stlc45xx_gpio_power, 0);
974}
975
976static void stlc45xx_power_on(struct stlc45xx *stlc)
977{
978 gpio_set_value(stlc45xx_gpio_power, 1);
979 enable_irq(gpio_to_irq(stlc45xx_gpio_irq));
980
981 /*
982 * need to wait a while before device can be accessed, the length
983 * is just a guess
984 */
985 msleep(10);
986}
987
988/* caller must hold tx_lock */
989static void stlc45xx_flush_queues(struct stlc45xx *stlc)
990{
991 struct txbuffer *entry;
992
993 while (!list_empty(&stlc->tx_sent)) {
994 entry = list_first_entry(&stlc->tx_sent,
995 struct txbuffer, tx_list);
996 list_del(&entry->tx_list);
997 dev_kfree_skb(entry->skb);
998 stlc45xx_txbuffer_free(stlc, entry);
999 }
1000
1001 WARN_ON(!list_empty(&stlc->tx_sent));
1002
1003 while (!list_empty(&stlc->tx_pending)) {
1004 entry = list_first_entry(&stlc->tx_pending,
1005 struct txbuffer, tx_list);
1006 list_del(&entry->tx_list);
1007 dev_kfree_skb(entry->skb);
1008 stlc45xx_txbuffer_free(stlc, entry);
1009 }
1010
1011 WARN_ON(!list_empty(&stlc->tx_pending));
1012 WARN_ON(!list_empty(&stlc->txbuffer));
1013}
1014
1015static void stlc45xx_work_reset(struct work_struct *work)
1016{
1017 struct stlc45xx *stlc = container_of(work, struct stlc45xx,
1018 work_reset);
1019
1020 mutex_lock(&stlc->mutex);
1021
1022 if (stlc->fw_state != FW_STATE_RESET)
1023 goto out;
1024
1025 stlc45xx_power_off(stlc);
1026
1027 mutex_unlock(&stlc->mutex);
1028
1029 /* wait that all work_structs have finished, we can't hold
1030 * stlc->mutex to avoid deadlock */
1031 cancel_work_sync(&stlc->work);
1032
1033 /* FIXME: find out good value to wait for chip power down */
1034 msleep(100);
1035
1036 mutex_lock(&stlc->mutex);
1037
1038 /* FIXME: we should gracefully handle if the state has changed
1039 * after re-acquiring mutex */
1040 WARN_ON(stlc->fw_state != FW_STATE_RESET);
1041
1042 spin_lock_bh(&stlc->tx_lock);
1043 stlc45xx_flush_queues(stlc);
1044 spin_unlock_bh(&stlc->tx_lock);
1045
1046 stlc->fw_state = FW_STATE_RESETTING;
1047
1048 stlc45xx_power_on(stlc);
1049 stlc45xx_upload_firmware(stlc);
1050
1051out:
1052 mutex_unlock(&stlc->mutex);
1053}
1054
1055/* caller must hold mutex */
1056static void stlc45xx_reset(struct stlc45xx *stlc)
1057{
1058 stlc45xx_warning("resetting firmware");
1059 stlc->fw_state = FW_STATE_RESET;
1060 ieee80211_stop_queues(stlc->hw);
1061 queue_work(stlc->hw->workqueue, &stlc->work_reset);
1062}
1063
1064static void stlc45xx_work_tx_timeout(struct work_struct *work)
1065{
1066 struct stlc45xx *stlc = container_of(work, struct stlc45xx,
1067 work_tx_timeout.work);
1068
1069 stlc45xx_warning("tx timeout");
1070
1071 mutex_lock(&stlc->mutex);
1072
1073 if (stlc->fw_state != FW_STATE_READY)
1074 goto out;
1075
1076 stlc45xx_reset(stlc);
1077
1078out:
1079 mutex_unlock(&stlc->mutex);
1080}
1081
1082static void stlc45xx_int_ack(struct stlc45xx *stlc, u32 val)
1083{
1084 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1085
1086 stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_ACK, val);
1087}
1088
1089static void stlc45xx_wakeup(struct stlc45xx *stlc)
1090{
1091 unsigned long timeout;
1092 u32 ints;
1093
1094 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1095
1096 /* wake the chip */
1097 stlc45xx_write32(stlc, SPI_ADRS_ARM_INTERRUPTS, SPI_TARGET_INT_WAKEUP);
1098
1099 /* And wait for the READY interrupt */
1100 timeout = jiffies + HZ;
1101
1102 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1103 while (!(ints & SPI_HOST_INT_READY)) {
1104 if (time_after(jiffies, timeout))
1105 goto out;
1106 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1107 }
1108
1109 stlc45xx_int_ack(stlc, SPI_HOST_INT_READY);
1110
1111out:
1112 return;
1113}
1114
1115static void stlc45xx_sleep(struct stlc45xx *stlc)
1116{
1117 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1118
1119 stlc45xx_write32(stlc, SPI_ADRS_ARM_INTERRUPTS, SPI_TARGET_INT_SLEEP);
1120}
1121
1122static void stlc45xx_int_ready(struct stlc45xx *stlc)
1123{
1124 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1125
1126 stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_EN,
1127 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE);
1128
1129 switch (stlc->fw_state) {
1130 case FW_STATE_BOOTING:
1131 stlc->fw_state = FW_STATE_READY;
1132 complete(&stlc->fw_comp);
1133 break;
1134 case FW_STATE_RESETTING:
1135 stlc->fw_state = FW_STATE_READY;
1136
1137 stlc45xx_tx_scan(stlc);
1138 stlc45xx_tx_setup(stlc);
1139 stlc45xx_tx_edcf(stlc);
1140
1141 ieee80211_wake_queues(stlc->hw);
1142 break;
1143 default:
1144 break;
1145 }
1146}
1147
1148static int stlc45xx_rx_txack(struct stlc45xx *stlc, struct sk_buff *skb)
1149{
1150 struct ieee80211_tx_info *info;
1151 struct s_lm_control *control;
1152 struct s_lmo_tx *tx;
1153 struct txbuffer *entry;
1154 int found = 0;
1155
1156 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1157
1158 control = (struct s_lm_control *) skb->data;
1159 tx = (struct s_lmo_tx *) (control + 1);
1160
1161 if (list_empty(&stlc->tx_sent)) {
1162 if (net_ratelimit())
1163 stlc45xx_warning("no frames waiting for "
1164 "acknowledgement");
1165 return -1;
1166 }
1167
1168 list_for_each_entry(entry, &stlc->tx_sent, tx_list) {
1169 if (control->handle == entry->handle) {
1170 found = 1;
1171 break;
1172 }
1173 }
1174
1175 if (!found) {
1176 if (net_ratelimit())
1177 stlc45xx_warning("couldn't find frame for tx ack 0x%x",
1178 control->handle);
1179 return -1;
1180 }
1181
1182 stlc45xx_debug(DEBUG_TX, "TX ACK 0x%x", entry->handle);
1183
1184 if (entry->status_needed) {
1185 info = IEEE80211_SKB_CB(entry->skb);
1186
1187 if (!(tx->flags & LM_TX_FAILED)) {
1188 /* frame was acked */
1189 info->flags |= IEEE80211_TX_STAT_ACK;
1190 info->status.ack_signal = tx->rcpi / 2 - 110;
1191 }
1192
1193 skb_pull(entry->skb, entry->header_len);
1194
1195 ieee80211_tx_status(stlc->hw, entry->skb);
1196 }
1197
1198 list_del(&entry->tx_list);
1199
1200 stlc45xx_check_txsent(stlc);
1201 if (list_empty(&stlc->tx_sent))
1202 /* there are no pending frames, we can stop the tx timeout
1203 * timer */
1204 cancel_delayed_work(&stlc->work_tx_timeout);
1205
1206 spin_lock_bh(&stlc->tx_lock);
1207
1208 stlc45xx_txbuffer_free(stlc, entry);
1209
1210 if (stlc->tx_queue_stopped &&
1211 stlc45xx_txbuffer_find(stlc, MAX_FRAME_LEN) != -1) {
1212 stlc45xx_debug(DEBUG_QUEUE, "room in tx buffer, waking queues");
1213 ieee80211_wake_queues(stlc->hw);
1214 stlc->tx_queue_stopped = 0;
1215 }
1216
1217 spin_unlock_bh(&stlc->tx_lock);
1218
1219 return 0;
1220}
1221
1222static int stlc45xx_rx_control(struct stlc45xx *stlc, struct sk_buff *skb)
1223{
1224 struct s_lm_control *control;
1225 int ret = 0;
1226
1227 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1228
1229 control = (struct s_lm_control *) skb->data;
1230
1231 switch (control->oid) {
1232 case LM_OID_TX:
1233 ret = stlc45xx_rx_txack(stlc, skb);
1234 break;
1235 case LM_OID_SETUP:
1236 case LM_OID_SCAN:
1237 case LM_OID_TRAP:
1238 case LM_OID_EDCF:
1239 case LM_OID_KEYCACHE:
1240 case LM_OID_PSM:
1241 case LM_OID_STATS:
1242 case LM_OID_LED:
1243 default:
1244 stlc45xx_warning("unhandled rx control oid %d\n",
1245 control->oid);
1246 break;
1247 }
1248
1249 dev_kfree_skb(skb);
1250
1251 return ret;
1252}
1253
1254/* copied from mac80211 */
1255static void stlc45xx_parse_elems(u8 *start, size_t len,
1256 struct stlc45xx_ie_tim **tim,
1257 size_t *tim_len)
1258{
1259 size_t left = len;
1260 u8 *pos = start;
1261
1262 while (left >= 2) {
1263 u8 id, elen;
1264
1265 id = *pos++;
1266 elen = *pos++;
1267 left -= 2;
1268
1269 if (elen > left)
1270 return;
1271
1272 switch (id) {
1273 case WLAN_EID_TIM:
1274 *tim = (struct stlc45xx_ie_tim *) pos;
1275 *tim_len = elen;
1276 break;
1277 default:
1278 break;
1279 }
1280
1281 left -= elen;
1282 pos += elen;
1283 }
1284}
1285
1286/*
1287 * mac80211 doesn't have support for asking frames with PS-Poll, so let's
1288 * implement in the driver for now. We have to add support to mac80211
1289 * later.
1290 */
1291static int stlc45xx_check_more_data(struct stlc45xx *stlc, struct sk_buff *skb)
1292{
1293 struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data;
1294 struct ieee80211_hdr *hdr;
1295 size_t len;
1296 u16 fc;
1297
1298 hdr = (void *) skb->data + sizeof(*data);
1299 len = skb->len - sizeof(*data);
1300
1301 /* minimum frame length is the null frame length 24 bytes */
1302 if (len < 24) {
1303 stlc45xx_warning("invalid frame length when checking for "
1304 "more data");
1305 return -EINVAL;
1306 }
1307
1308 fc = le16_to_cpu(hdr->frame_control);
1309 if (!(fc & IEEE80211_FCTL_FROMDS))
1310 /* this is not from DS */
1311 return 0;
1312
1313 if (compare_ether_addr(hdr->addr1, stlc->mac_addr) != 0)
1314 /* the frame was not for us */
1315 return 0;
1316
1317 if (!(fc & IEEE80211_FCTL_MOREDATA)) {
1318 /* AP has no more frames buffered for us */
1319 stlc45xx_debug(DEBUG_PSM, "all buffered frames retrieved");
1320 stlc->pspolling = false;
1321 return 0;
1322 }
1323
1324 /* MOREDATA bit is set, let's ask for a new frame from the AP */
1325 stlc45xx_tx_pspoll(stlc, stlc->psm);
1326
1327 return 0;
1328}
1329
1330/*
1331 * mac80211 cannot read TIM from beacons, so let's add a hack to the
1332 * driver. We have to add support to mac80211 later.
1333 */
1334static int stlc45xx_rx_data_beacon(struct stlc45xx *stlc, struct sk_buff *skb)
1335{
1336 struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data;
1337 size_t len = skb->len, tim_len = 0, baselen, pvbmap_len;
1338 struct ieee80211_mgmt *mgmt;
1339 struct stlc45xx_ie_tim *tim = NULL;
1340 int bmap_offset, index, aid_bit;
1341
1342 mgmt = (void *) skb->data + sizeof(*data);
1343
1344 baselen = (u8 *) mgmt->u.beacon.variable - (u8 *) mgmt;
1345 if (baselen > len) {
1346 stlc45xx_warning("invalid baselen in beacon");
1347 return -EINVAL;
1348 }
1349
1350 stlc45xx_parse_elems(mgmt->u.beacon.variable, len - baselen, &tim,
1351 &tim_len);
1352
1353 if (!tim) {
1354 stlc45xx_warning("didn't find tim from a beacon");
1355 return -EINVAL;
1356 }
1357
1358 bmap_offset = tim->bmap_control & 0xfe;
1359 index = stlc->aid / 8 - bmap_offset;
1360
1361 pvbmap_len = tim_len - 3;
1362 if (index > pvbmap_len)
1363 return -EINVAL;
1364
1365 aid_bit = !!(tim->pvbmap[index] & (1 << stlc->aid % 8));
1366
1367 stlc45xx_debug(DEBUG_PSM, "fc 0x%x duration %d seq %d dtim %u "
1368 "bmap_control 0x%x aid_bit %d",
1369 mgmt->frame_control, mgmt->duration, mgmt->seq_ctrl >> 4,
1370 tim->dtim_count, tim->bmap_control, aid_bit);
1371
1372 if (!aid_bit)
1373 return 0;
1374
1375 stlc->pspolling = true;
1376 stlc45xx_tx_pspoll(stlc, stlc->psm);
1377
1378 return 0;
1379}
1380
1381static int stlc45xx_rx_data(struct stlc45xx *stlc, struct sk_buff *skb)
1382{
1383 struct ieee80211_rx_status status;
1384 struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data;
1385 int align = 0;
1386 u8 *p, align_len;
1387 u16 len;
1388
1389 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1390
1391 if (stlc->psm) {
1392 if (data->flags & LM_IN_BEACON)
1393 stlc45xx_rx_data_beacon(stlc, skb);
1394 else if (stlc->pspolling && (data->flags & LM_IN_DATA))
1395 stlc45xx_check_more_data(stlc, skb);
1396 }
1397
1398 memset(&status, 0, sizeof(status));
1399
1400 status.freq = data->frequency;
1401 status.signal = data->rcpi / 2 - 110;
1402
1403 /* let's assume that maximum rcpi value is 140 (= 35 dBm) */
1404 status.qual = data->rcpi * 100 / 140;
1405
1406 status.band = IEEE80211_BAND_2GHZ;
1407
1408 /*
1409 * FIXME: this gives warning from __ieee80211_rx()
1410 *
1411 * status.rate_idx = data->rate;
1412 */
1413
1414 len = data->length;
1415
1416 if (data->flags & LM_FLAG_ALIGN)
1417 align = 1;
1418
1419 skb_pull(skb, sizeof(*data));
1420
1421 if (align) {
1422 p = skb->data;
1423 align_len = *p;
1424 skb_pull(skb, align_len);
1425 }
1426
1427 skb_trim(skb, len);
1428
1429 stlc45xx_debug(DEBUG_RX, "rx data 0x%p %d B", skb->data, skb->len);
1430 stlc45xx_dump(DEBUG_RX_CONTENT, skb->data, skb->len);
1431
1432 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1433 ieee80211_rx(stlc->hw, skb);
1434
1435 return 0;
1436}
1437
1438
1439
1440static int stlc45xx_rx(struct stlc45xx *stlc)
1441{
1442 struct s_lm_control *control;
1443 struct sk_buff *skb;
1444 int ret;
1445 u16 len;
1446
1447 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1448
1449 stlc45xx_wakeup(stlc);
1450
1451 /* dummy read to flush SPI DMA controller bug */
1452 stlc45xx_read16(stlc, SPI_ADRS_GEN_PURP_1);
1453
1454 len = stlc45xx_read16(stlc, SPI_ADRS_DMA_DATA);
1455
1456 if (len == 0) {
1457 stlc45xx_warning("rx request of zero bytes");
1458 return 0;
1459 }
1460
1461 skb = dev_alloc_skb(len);
1462 if (!skb) {
1463 stlc45xx_warning("could not alloc skb");
1464 return 0;
1465 }
1466
1467 stlc45xx_spi_read(stlc, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
1468
1469 stlc45xx_sleep(stlc);
1470
1471 stlc45xx_debug(DEBUG_RX, "rx frame 0x%p %d B", skb->data, skb->len);
1472 stlc45xx_dump(DEBUG_RX_CONTENT, skb->data, skb->len);
1473
1474 control = (struct s_lm_control *) skb->data;
1475
1476 if (control->flags & LM_FLAG_CONTROL)
1477 ret = stlc45xx_rx_control(stlc, skb);
1478 else
1479 ret = stlc45xx_rx_data(stlc, skb);
1480
1481 return ret;
1482}
1483
1484
1485static irqreturn_t stlc45xx_interrupt(int irq, void *config)
1486{
1487 struct spi_device *spi = config;
1488 struct stlc45xx *stlc = dev_get_drvdata(&spi->dev);
1489
1490 stlc45xx_debug(DEBUG_IRQ, "IRQ");
1491
1492 queue_work(stlc->hw->workqueue, &stlc->work);
1493
1494 return IRQ_HANDLED;
1495}
1496
1497static int stlc45xx_tx_frame(struct stlc45xx *stlc, u32 address,
1498 void *buf, size_t len)
1499{
1500 struct s_dma_regs dma_regs;
1501 unsigned long timeout;
1502 int ret = 0;
1503 u32 ints;
1504
1505 stlc->tx_frames++;
1506
1507 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1508
1509 stlc45xx_debug(DEBUG_TX, "tx frame 0x%p %zu B", buf, len);
1510 stlc45xx_dump(DEBUG_TX_CONTENT, buf, len);
1511
1512 stlc45xx_wakeup(stlc);
1513
1514 dma_regs.cmd = SPI_DMA_WRITE_CTRL_ENABLE;
1515 dma_regs.len = cpu_to_le16(len);
1516 dma_regs.addr = cpu_to_le32(address);
1517
1518 stlc45xx_spi_write(stlc, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs,
1519 sizeof(dma_regs));
1520
1521 stlc45xx_spi_write(stlc, SPI_ADRS_DMA_DATA, buf, len);
1522
1523 timeout = jiffies + 2 * HZ;
1524 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1525 while (!(ints & SPI_HOST_INT_WR_READY)) {
1526 if (time_after(jiffies, timeout)) {
1527 stlc45xx_warning("WR_READY timeout");
1528 ret = -1;
1529 goto out;
1530 }
1531 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1532 }
1533
1534 stlc45xx_int_ack(stlc, SPI_HOST_INT_WR_READY);
1535
1536 stlc45xx_sleep(stlc);
1537
1538out:
1539 return ret;
1540}
1541
1542static int stlc45xx_wq_tx(struct stlc45xx *stlc)
1543{
1544 struct txbuffer *entry;
1545 int ret = 0;
1546
1547 spin_lock_bh(&stlc->tx_lock);
1548
1549 while (!list_empty(&stlc->tx_pending)) {
1550 entry = list_entry(stlc->tx_pending.next,
1551 struct txbuffer, tx_list);
1552
1553 list_del_init(&entry->tx_list);
1554
1555 spin_unlock_bh(&stlc->tx_lock);
1556
1557 ret = stlc45xx_tx_frame(stlc, entry->frame_start,
1558 entry->skb->data, entry->skb->len);
1559
1560 spin_lock_bh(&stlc->tx_lock);
1561
1562 if (ret < 0) {
1563 /* frame transfer to firmware buffer failed */
1564 /* FIXME: report this to mac80211 */
1565 dev_kfree_skb(entry->skb);
1566 stlc45xx_txbuffer_free(stlc, entry);
1567 goto out;
1568 }
1569
1570 list_add(&entry->tx_list, &stlc->tx_sent);
1571 queue_delayed_work(stlc->hw->workqueue,
1572 &stlc->work_tx_timeout,
1573 msecs_to_jiffies(TX_TIMEOUT));
1574 }
1575
1576out:
1577 spin_unlock_bh(&stlc->tx_lock);
1578 return ret;
1579}
1580
1581static void stlc45xx_work(struct work_struct *work)
1582{
1583 struct stlc45xx *stlc = container_of(work, struct stlc45xx, work);
1584 u32 ints;
1585 int ret;
1586
1587 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1588
1589 mutex_lock(&stlc->mutex);
1590
1591 if (stlc->fw_state == FW_STATE_OFF &&
1592 stlc->fw_state == FW_STATE_RESET)
1593 goto out;
1594
1595 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1596 stlc45xx_debug(DEBUG_BH, "begin host_ints 0x%08x", ints);
1597
1598 if (ints & SPI_HOST_INT_READY) {
1599 stlc45xx_int_ready(stlc);
1600 stlc45xx_int_ack(stlc, SPI_HOST_INT_READY);
1601 }
1602
1603 if (stlc->fw_state != FW_STATE_READY)
1604 goto out;
1605
1606 if (ints & SPI_HOST_INT_UPDATE) {
1607 stlc45xx_int_ack(stlc, SPI_HOST_INT_UPDATE);
1608 ret = stlc45xx_rx(stlc);
1609 if (ret < 0) {
1610 stlc45xx_reset(stlc);
1611 goto out;
1612 }
1613 }
1614 if (ints & SPI_HOST_INT_SW_UPDATE) {
1615 stlc45xx_int_ack(stlc, SPI_HOST_INT_SW_UPDATE);
1616 ret = stlc45xx_rx(stlc);
1617 if (ret < 0) {
1618 stlc45xx_reset(stlc);
1619 goto out;
1620 }
1621 }
1622
1623 ret = stlc45xx_wq_tx(stlc);
1624 if (ret < 0) {
1625 stlc45xx_reset(stlc);
1626 goto out;
1627 }
1628
1629 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1630 stlc45xx_debug(DEBUG_BH, "end host_ints 0x%08x", ints);
1631
1632out:
1633 mutex_unlock(&stlc->mutex);
1634}
1635
1636static void stlc45xx_tx_edcf(struct stlc45xx *stlc)
1637{
1638 struct s_lm_control *control;
1639 struct s_lmo_edcf *edcf;
1640 size_t len, edcf_len;
1641
1642 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1643
1644 edcf_len = sizeof(*edcf);
1645 len = sizeof(*control) + edcf_len;
1646 control = kzalloc(len, GFP_KERNEL);
1647 edcf = (struct s_lmo_edcf *) (control + 1);
1648
1649 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
1650 control->length = edcf_len;
1651 control->oid = LM_OID_EDCF;
1652
1653 edcf->slottime = 0x14;
1654 edcf->sifs = 10;
1655 edcf->eofpad = 6;
1656 edcf->maxburst = 1500;
1657
1658 edcf->queues[0].aifs = 2;
1659 edcf->queues[0].pad0 = 1;
1660 edcf->queues[0].cwmin = 3;
1661 edcf->queues[0].cwmax = 7;
1662 edcf->queues[0].txop = 47;
1663 edcf->queues[1].aifs = 2;
1664 edcf->queues[1].pad0 = 0;
1665 edcf->queues[1].cwmin = 7;
1666 edcf->queues[1].cwmax = 15;
1667 edcf->queues[1].txop = 94;
1668 edcf->queues[2].aifs = 3;
1669 edcf->queues[2].pad0 = 0;
1670 edcf->queues[2].cwmin = 15;
1671 edcf->queues[2].cwmax = 1023;
1672 edcf->queues[2].txop = 0;
1673 edcf->queues[3].aifs = 7;
1674 edcf->queues[3].pad0 = 0;
1675 edcf->queues[3].cwmin = 15;
1676 edcf->queues[3].cwmax = 1023;
1677 edcf->queues[3].txop = 0;
1678 edcf->queues[4].aifs = 13;
1679 edcf->queues[4].pad0 = 99;
1680 edcf->queues[4].cwmin = 3437;
1681 edcf->queues[4].cwmax = 512;
1682 edcf->queues[4].txop = 12;
1683 edcf->queues[5].aifs = 142;
1684 edcf->queues[5].pad0 = 109;
1685 edcf->queues[5].cwmin = 8756;
1686 edcf->queues[5].cwmax = 6;
1687 edcf->queues[5].txop = 0;
1688 edcf->queues[6].aifs = 4;
1689 edcf->queues[6].pad0 = 0;
1690 edcf->queues[6].cwmin = 0;
1691 edcf->queues[6].cwmax = 58705;
1692 edcf->queues[6].txop = 25716;
1693 edcf->queues[7].aifs = 0;
1694 edcf->queues[7].pad0 = 0;
1695 edcf->queues[7].cwmin = 0;
1696 edcf->queues[7].cwmax = 0;
1697 edcf->queues[7].txop = 0;
1698
1699 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
1700
1701 kfree(control);
1702}
1703
1704static void stlc45xx_tx_setup(struct stlc45xx *stlc)
1705{
1706 struct s_lm_control *control;
1707 struct s_lmo_setup *setup;
1708 size_t len, setup_len;
1709
1710 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1711
1712 setup_len = sizeof(*setup);
1713 len = sizeof(*control) + setup_len;
1714 control = kzalloc(len, GFP_KERNEL);
1715 setup = (struct s_lmo_setup *) (control + 1);
1716
1717 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
1718 control->length = setup_len;
1719 control->oid = LM_OID_SETUP;
1720
1721 setup->flags = LM_SETUP_INFRA;
1722 setup->antenna = 2;
1723 setup->rx_align = 0;
1724 setup->rx_buffer = FIRMWARE_RXBUFFER_START;
1725 setup->rx_mtu = FIRMWARE_MTU;
1726 setup->frontend = 5;
1727 setup->timeout = 0;
1728 setup->truncate = 48896;
1729 setup->bratemask = 0xffffffff;
1730 setup->ref_clock = 644245094;
1731 setup->lpf_bandwidth = 65535;
1732 setup->osc_start_delay = 65535;
1733
1734 memcpy(setup->macaddr, stlc->mac_addr, ETH_ALEN);
1735 memcpy(setup->bssid, stlc->bssid, ETH_ALEN);
1736
1737 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
1738
1739 kfree(control);
1740}
1741
1742static void stlc45xx_tx_scan(struct stlc45xx *stlc)
1743{
1744 struct s_lm_control *control;
1745 struct s_lmo_scan *scan;
1746 size_t len, scan_len;
1747
1748 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1749
1750 scan_len = sizeof(*scan);
1751 len = sizeof(*control) + scan_len;
1752 control = kzalloc(len, GFP_KERNEL);
1753 scan = (struct s_lmo_scan *) (control + 1);
1754
1755 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
1756 control->length = scan_len;
1757 control->oid = LM_OID_SCAN;
1758
1759 scan->flags = LM_SCAN_EXIT;
1760 scan->bratemask = 0x15f;
1761 scan->aloft[0] = 3;
1762 scan->aloft[1] = 3;
1763 scan->aloft[2] = 1;
1764 scan->aloft[3] = 0;
1765 scan->aloft[4] = 0;
1766 scan->aloft[5] = 0;
1767 scan->aloft[6] = 0;
1768 scan->aloft[7] = 0;
1769
1770 memcpy(&scan->rssical, &stlc->cal_rssi[(stlc->channel - 1) *
1771 RSSI_CAL_LEN],
1772 RSSI_CAL_LEN);
1773 memcpy(&scan->channel, &stlc->cal_channels[(stlc->channel - 1) *
1774 CHANNEL_CAL_LEN],
1775 CHANNEL_CAL_LEN);
1776
1777 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
1778
1779 kfree(control);
1780}
1781
1782/*
1783 * caller must hold mutex
1784 */
1785static int stlc45xx_tx_pspoll(struct stlc45xx *stlc, bool powersave)
1786{
1787 struct ieee80211_hdr *pspoll;
1788 int payload_len, padding, i;
1789 struct s_lm_data_out *data;
1790 struct txbuffer *entry;
1791 struct sk_buff *skb;
1792 char *payload;
1793 u16 fc;
1794
1795 skb = dev_alloc_skb(stlc->hw->extra_tx_headroom + 16);
1796 if (!skb) {
1797 stlc45xx_warning("failed to allocate pspoll frame");
1798 return -ENOMEM;
1799 }
1800 skb_reserve(skb, stlc->hw->extra_tx_headroom);
1801
1802 pspoll = (struct ieee80211_hdr *) skb_put(skb, 16);
1803 memset(pspoll, 0, 16);
1804 fc = IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL;
1805 if (powersave)
1806 fc |= IEEE80211_FCTL_PM;
1807 pspoll->frame_control = cpu_to_le16(fc);
1808 pspoll->duration_id = cpu_to_le16(stlc->aid);
1809
1810 /* aid in PS-Poll has its two MSBs each set to 1 */
1811 pspoll->duration_id |= cpu_to_le16(1 << 15) | cpu_to_le16(1 << 14);
1812
1813 memcpy(pspoll->addr1, stlc->bssid, ETH_ALEN);
1814 memcpy(pspoll->addr2, stlc->mac_addr, ETH_ALEN);
1815
1816 stlc45xx_debug(DEBUG_PSM, "sending PS-Poll frame to %pM (powersave %d, "
1817 "fc 0x%x, aid %d)", pspoll->addr1,
1818 powersave, fc, stlc->aid);
1819
1820 spin_lock_bh(&stlc->tx_lock);
1821
1822 entry = stlc45xx_txbuffer_alloc(stlc, skb->len);
1823
1824 spin_unlock_bh(&stlc->tx_lock);
1825
1826 if (!entry) {
1827 /*
1828 * The queue should be stopped before the firmware buffer
1829 * is full, so firmware buffer should always have enough
1830 * space.
1831 *
1832 * But I'm too lazy and omit it for now.
1833 */
1834 if (net_ratelimit())
1835 stlc45xx_warning("firmware tx buffer full is full "
1836 "for null frame");
1837 return -ENOSPC;
1838 }
1839
1840 payload = skb->data;
1841 payload_len = skb->len;
1842 padding = (int) (skb->data - sizeof(*data)) & 3;
1843 entry->header_len = sizeof(*data) + padding;
1844
1845 entry->skb = skb;
1846 entry->status_needed = false;
1847 entry->handle = (u32) skb;
1848 entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME);
1849
1850 stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B "
1851 "padding %d header_len %d)",
1852 entry->handle, payload, payload_len, padding,
1853 entry->header_len);
1854 stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len);
1855
1856 data = (struct s_lm_data_out *) skb_push(skb, entry->header_len);
1857
1858 memset(data, 0, entry->header_len);
1859
1860 if (padding)
1861 data->flags = LM_FLAG_ALIGN;
1862
1863 data->flags = LM_OUT_BURST;
1864 data->length = payload_len;
1865 data->handle = entry->handle;
1866 data->aid = 1;
1867 data->rts_retries = 7;
1868 data->retries = 7;
1869 data->aloft_ctrl = 0;
1870 data->crypt_offset = 58;
1871 data->keytype = 0;
1872 data->keylen = 0;
1873 data->queue = LM_QUEUE_DATA3;
1874 data->backlog = 32;
1875 data->antenna = 2;
1876 data->cts = 3;
1877 data->power = 127;
1878
1879 for (i = 0; i < 8; i++)
1880 data->aloft[i] = 0;
1881
1882 /*
1883 * check if there's enough space in tx buffer
1884 *
1885 * FIXME: ignored for now
1886 */
1887
1888 stlc45xx_tx_frame(stlc, entry->start, skb->data, skb->len);
1889
1890 list_add(&entry->tx_list, &stlc->tx_sent);
1891
1892 return 0;
1893}
1894
1895/*
1896 * caller must hold mutex
1897 *
1898 * shamelessly stolen from mac80211/ieee80211_send_nullfunc
1899 */
1900static int stlc45xx_tx_nullfunc(struct stlc45xx *stlc, bool powersave)
1901{
1902 struct ieee80211_hdr *nullfunc;
1903 int payload_len, padding, i;
1904 struct s_lm_data_out *data;
1905 struct txbuffer *entry;
1906 struct sk_buff *skb;
1907 char *payload;
1908 u16 fc;
1909
1910 skb = dev_alloc_skb(stlc->hw->extra_tx_headroom + 24);
1911 if (!skb) {
1912 stlc45xx_warning("failed to allocate buffer for null frame\n");
1913 return -ENOMEM;
1914 }
1915 skb_reserve(skb, stlc->hw->extra_tx_headroom);
1916
1917 nullfunc = (struct ieee80211_hdr *) skb_put(skb, 24);
1918 memset(nullfunc, 0, 24);
1919 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC |
1920 IEEE80211_FCTL_TODS;
1921
1922 if (powersave)
1923 fc |= IEEE80211_FCTL_PM;
1924
1925 nullfunc->frame_control = cpu_to_le16(fc);
1926 memcpy(nullfunc->addr1, stlc->bssid, ETH_ALEN);
1927 memcpy(nullfunc->addr2, stlc->mac_addr, ETH_ALEN);
1928 memcpy(nullfunc->addr3, stlc->bssid, ETH_ALEN);
1929
1930 stlc45xx_debug(DEBUG_PSM, "sending Null frame to %pM (powersave %d, "
1931 "fc 0x%x)", nullfunc->addr1, powersave, fc);
1932
1933 spin_lock_bh(&stlc->tx_lock);
1934
1935 entry = stlc45xx_txbuffer_alloc(stlc, skb->len);
1936
1937 spin_unlock_bh(&stlc->tx_lock);
1938
1939 if (!entry) {
1940 /*
1941 * The queue should be stopped before the firmware buffer
1942 * is full, so firmware buffer should always have enough
1943 * space.
1944 *
1945 * But I'm too lazy and omit it for now.
1946 */
1947 if (net_ratelimit())
1948 stlc45xx_warning("firmware tx buffer full is full "
1949 "for null frame");
1950 return -ENOSPC;
1951 }
1952
1953 payload = skb->data;
1954 payload_len = skb->len;
1955 padding = (int) (skb->data - sizeof(*data)) & 3;
1956 entry->header_len = sizeof(*data) + padding;
1957
1958 entry->skb = skb;
1959 entry->status_needed = false;
1960 entry->handle = (u32) skb;
1961 entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME);
1962
1963 stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B "
1964 "padding %d header_len %d)",
1965 entry->handle, payload, payload_len, padding,
1966 entry->header_len);
1967 stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len);
1968
1969 data = (struct s_lm_data_out *) skb_push(skb, entry->header_len);
1970
1971 memset(data, 0, entry->header_len);
1972
1973 if (padding)
1974 data->flags = LM_FLAG_ALIGN;
1975
1976 data->flags = LM_OUT_BURST;
1977 data->length = payload_len;
1978 data->handle = entry->handle;
1979 data->aid = 1;
1980 data->rts_retries = 7;
1981 data->retries = 7;
1982 data->aloft_ctrl = 0;
1983 data->crypt_offset = 58;
1984 data->keytype = 0;
1985 data->keylen = 0;
1986 data->queue = LM_QUEUE_DATA3;
1987 data->backlog = 32;
1988 data->antenna = 2;
1989 data->cts = 3;
1990 data->power = 127;
1991
1992 for (i = 0; i < 8; i++)
1993 data->aloft[i] = 0;
1994
1995 /*
1996 * check if there's enough space in tx buffer
1997 *
1998 * FIXME: ignored for now
1999 */
2000
2001 stlc45xx_tx_frame(stlc, entry->start, skb->data, skb->len);
2002
2003 list_add(&entry->tx_list, &stlc->tx_sent);
2004
2005 return 0;
2006}
2007
2008/* caller must hold mutex */
2009static void stlc45xx_tx_psm(struct stlc45xx *stlc, bool enable)
2010{
2011 struct s_lm_control *control;
2012 struct s_lmo_psm *psm;
2013 size_t len, psm_len;
2014
2015 WARN_ON(!stlc->associated);
2016 WARN_ON(stlc->aid < 1);
2017 WARN_ON(stlc->aid > 2007);
2018
2019 psm_len = sizeof(*psm);
2020 len = sizeof(*control) + psm_len;
2021 control = kzalloc(len, GFP_KERNEL);
2022 psm = (struct s_lmo_psm *) (control + 1);
2023
2024 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
2025 control->length = psm_len;
2026 control->oid = LM_OID_PSM;
2027
2028 if (enable)
2029 psm->flags |= LM_PSM;
2030
2031 psm->aid = stlc->aid;
2032
2033 psm->beacon_rcpi_skip_max = 60;
2034
2035 psm->intervals[0].interval = 1;
2036 psm->intervals[0].periods = 1;
2037 psm->intervals[1].interval = 1;
2038 psm->intervals[1].periods = 1;
2039 psm->intervals[2].interval = 1;
2040 psm->intervals[2].periods = 1;
2041 psm->intervals[3].interval = 1;
2042 psm->intervals[3].periods = 1;
2043
2044 psm->nr = 0;
2045 psm->exclude[0] = 0;
2046
2047 stlc45xx_debug(DEBUG_PSM, "sending LM_OID_PSM (aid %d, interval %d)",
2048 psm->aid, psm->intervals[0].interval);
2049
2050 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
2051
2052 kfree(control);
2053}
2054
2055static int stlc45xx_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2056{
2057 struct stlc45xx *stlc = hw->priv;
2058 struct ieee80211_tx_info *info;
2059 struct ieee80211_rate *rate;
2060 int payload_len, padding, i;
2061 struct s_lm_data_out *data;
2062 struct txbuffer *entry;
2063 char *payload;
2064
2065 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2066
2067 spin_lock_bh(&stlc->tx_lock);
2068
2069 entry = stlc45xx_txbuffer_alloc(stlc, skb->len);
2070 if (!entry) {
2071 /* the queue should be stopped before the firmware buffer
2072 * is full, so firmware buffer should always have enough
2073 * space */
2074 if (net_ratelimit())
2075 stlc45xx_warning("firmware buffer full");
2076 spin_unlock_bh(&stlc->tx_lock);
2077 return NETDEV_TX_BUSY;
2078 }
2079
2080 info = IEEE80211_SKB_CB(skb);
2081
2082 payload = skb->data;
2083 payload_len = skb->len;
2084 padding = (int) (skb->data - sizeof(*data)) & 3;
2085 entry->header_len = sizeof(*data) + padding;
2086
2087 entry->skb = skb;
2088 entry->status_needed = true;
2089 entry->handle = (u32) skb;
2090 entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME);
2091
2092 stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B "
2093 "padding %d header_len %d)",
2094 entry->handle, payload, payload_len, padding,
2095 entry->header_len);
2096 stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len);
2097
2098 data = (struct s_lm_data_out *) skb_push(skb, entry->header_len);
2099
2100 memset(data, 0, entry->header_len);
2101
2102 if (padding)
2103 data->flags = LM_FLAG_ALIGN;
2104
2105 data->flags = LM_OUT_BURST;
2106 data->length = payload_len;
2107 data->handle = entry->handle;
2108 data->aid = 1;
2109 data->rts_retries = 7;
2110 data->retries = 7;
2111 data->aloft_ctrl = 0;
2112 data->crypt_offset = 58;
2113 data->keytype = 0;
2114 data->keylen = 0;
2115 data->queue = 2;
2116 data->backlog = 32;
2117 data->antenna = 2;
2118 data->cts = 3;
2119 data->power = 127;
2120
2121 for (i = 0; i < 8; i++) {
2122 rate = ieee80211_get_tx_rate(stlc->hw, info);
2123 data->aloft[i] = rate->hw_value;
2124 }
2125
2126 list_add_tail(&entry->tx_list, &stlc->tx_pending);
2127
2128 /* check if there's enough space in tx buffer */
2129 if (stlc45xx_txbuffer_find(stlc, MAX_FRAME_LEN) == -1) {
2130 stlc45xx_debug(DEBUG_QUEUE, "tx buffer full, stopping queues");
2131 stlc->tx_queue_stopped = 1;
2132 ieee80211_stop_queues(stlc->hw);
2133 }
2134
2135 queue_work(stlc->hw->workqueue, &stlc->work);
2136
2137 spin_unlock_bh(&stlc->tx_lock);
2138
2139 return NETDEV_TX_OK;
2140}
2141
2142static int stlc45xx_op_start(struct ieee80211_hw *hw)
2143{
2144 struct stlc45xx *stlc = hw->priv;
2145 unsigned long timeout;
2146 int ret = 0;
2147
2148 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2149
2150 mutex_lock(&stlc->mutex);
2151
2152 stlc->fw_state = FW_STATE_BOOTING;
2153 stlc->channel = 1;
2154
2155 stlc45xx_power_on(stlc);
2156
2157 ret = stlc45xx_upload_firmware(stlc);
2158 if (ret < 0) {
2159 stlc45xx_power_off(stlc);
2160 goto out_unlock;
2161 }
2162
2163 stlc->tx_queue_stopped = 0;
2164
2165 mutex_unlock(&stlc->mutex);
2166
2167 timeout = msecs_to_jiffies(2000);
2168 timeout = wait_for_completion_interruptible_timeout(&stlc->fw_comp,
2169 timeout);
2170 if (!timeout) {
2171 stlc45xx_error("firmware boot failed");
2172 stlc45xx_power_off(stlc);
2173 ret = -1;
2174 goto out;
2175 }
2176
2177 stlc45xx_debug(DEBUG_BOOT, "firmware booted");
2178
2179 /* FIXME: should we take mutex just after wait_for_completion()? */
2180 mutex_lock(&stlc->mutex);
2181
2182 WARN_ON(stlc->fw_state != FW_STATE_READY);
2183
2184out_unlock:
2185 mutex_unlock(&stlc->mutex);
2186
2187out:
2188 return ret;
2189}
2190
2191static void stlc45xx_op_stop(struct ieee80211_hw *hw)
2192{
2193 struct stlc45xx *stlc = hw->priv;
2194
2195 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2196
2197 mutex_lock(&stlc->mutex);
2198
2199 WARN_ON(stlc->fw_state != FW_STATE_READY);
2200
2201 stlc45xx_power_off(stlc);
2202
2203 /* FIXME: make sure that all work_structs have completed */
2204
2205 spin_lock_bh(&stlc->tx_lock);
2206 stlc45xx_flush_queues(stlc);
2207 spin_unlock_bh(&stlc->tx_lock);
2208
2209 stlc->fw_state = FW_STATE_OFF;
2210
2211 mutex_unlock(&stlc->mutex);
2212}
2213
2214static int stlc45xx_op_add_interface(struct ieee80211_hw *hw,
2215 struct ieee80211_if_init_conf *conf)
2216{
2217 struct stlc45xx *stlc = hw->priv;
2218
2219 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2220
2221 switch (conf->type) {
2222 case NL80211_IFTYPE_STATION:
2223 break;
2224 default:
2225 return -EOPNOTSUPP;
2226 }
2227
2228 memcpy(stlc->mac_addr, conf->mac_addr, ETH_ALEN);
2229
2230 return 0;
2231}
2232
2233static void stlc45xx_op_remove_interface(struct ieee80211_hw *hw,
2234 struct ieee80211_if_init_conf *conf)
2235{
2236 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2237}
2238
2239static int stlc45xx_op_config(struct ieee80211_hw *hw, u32 changed)
2240{
2241 struct stlc45xx *stlc = hw->priv;
2242
2243 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2244
2245 mutex_lock(&stlc->mutex);
2246
2247 stlc->channel = hw->conf.channel->hw_value;
2248 stlc45xx_tx_scan(stlc);
2249 stlc45xx_tx_setup(stlc);
2250 stlc45xx_tx_edcf(stlc);
2251
2252 if ((hw->conf.flags & IEEE80211_CONF_PS) != stlc->psm) {
2253 stlc->psm = hw->conf.flags & IEEE80211_CONF_PS;
2254 if (stlc->associated) {
2255 stlc45xx_tx_psm(stlc, stlc->psm);
2256 stlc45xx_tx_nullfunc(stlc, stlc->psm);
2257 }
2258 }
2259
2260 mutex_unlock(&stlc->mutex);
2261
2262 return 0;
2263}
2264
2265static void stlc45xx_op_configure_filter(struct ieee80211_hw *hw,
2266 unsigned int changed_flags,
2267 unsigned int *total_flags,
2268 int mc_count,
2269 struct dev_addr_list *mc_list)
2270{
2271 *total_flags = 0;
2272}
2273
2274static void stlc45xx_op_bss_info_changed(struct ieee80211_hw *hw,
2275 struct ieee80211_vif *vif,
2276 struct ieee80211_bss_conf *info,
2277 u32 changed)
2278{
2279 struct stlc45xx *stlc = hw->priv;
2280
2281 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2282 mutex_lock(&stlc->mutex);
2283
2284 memcpy(stlc->bssid, info->bssid, ETH_ALEN);
2285 stlc45xx_tx_setup(stlc);
2286
2287 mutex_unlock(&stlc->mutex);
2288
2289 if (changed & BSS_CHANGED_ASSOC) {
2290 stlc->associated = info->assoc;
2291 if (info->assoc)
2292 stlc->aid = info->aid;
2293 else
2294 stlc->aid = -1;
2295
2296 if (stlc->psm) {
2297 stlc45xx_tx_psm(stlc, stlc->psm);
2298 stlc45xx_tx_nullfunc(stlc, stlc->psm);
2299 }
2300 }
2301}
2302
2303
2304/* can't be const, mac80211 writes to this */
2305static struct ieee80211_rate stlc45xx_rates[] = {
2306 { .bitrate = 10, .hw_value = 0, .hw_value_short = 0, },
2307 { .bitrate = 20, .hw_value = 1, .hw_value_short = 1, },
2308 { .bitrate = 55, .hw_value = 2, .hw_value_short = 2, },
2309 { .bitrate = 110, .hw_value = 3, .hw_value_short = 3, },
2310 { .bitrate = 60, .hw_value = 4, .hw_value_short = 4, },
2311 { .bitrate = 90, .hw_value = 5, .hw_value_short = 5, },
2312 { .bitrate = 120, .hw_value = 6, .hw_value_short = 6, },
2313 { .bitrate = 180, .hw_value = 7, .hw_value_short = 7, },
2314 { .bitrate = 240, .hw_value = 8, .hw_value_short = 8, },
2315 { .bitrate = 360, .hw_value = 9, .hw_value_short = 9, },
2316 { .bitrate = 480, .hw_value = 10, .hw_value_short = 10, },
2317 { .bitrate = 540, .hw_value = 11, .hw_value_short = 11, },
2318};
2319
2320/* can't be const, mac80211 writes to this */
2321static struct ieee80211_channel stlc45xx_channels[] = {
2322 { .hw_value = 1, .center_freq = 2412},
2323 { .hw_value = 2, .center_freq = 2417},
2324 { .hw_value = 3, .center_freq = 2422},
2325 { .hw_value = 4, .center_freq = 2427},
2326 { .hw_value = 5, .center_freq = 2432},
2327 { .hw_value = 6, .center_freq = 2437},
2328 { .hw_value = 7, .center_freq = 2442},
2329 { .hw_value = 8, .center_freq = 2447},
2330 { .hw_value = 9, .center_freq = 2452},
2331 { .hw_value = 10, .center_freq = 2457},
2332 { .hw_value = 11, .center_freq = 2462},
2333 { .hw_value = 12, .center_freq = 2467},
2334 { .hw_value = 13, .center_freq = 2472},
2335};
2336
2337/* can't be const, mac80211 writes to this */
2338static struct ieee80211_supported_band stlc45xx_band_2ghz = {
2339 .channels = stlc45xx_channels,
2340 .n_channels = ARRAY_SIZE(stlc45xx_channels),
2341 .bitrates = stlc45xx_rates,
2342 .n_bitrates = ARRAY_SIZE(stlc45xx_rates),
2343};
2344
2345static const struct ieee80211_ops stlc45xx_ops = {
2346 .start = stlc45xx_op_start,
2347 .stop = stlc45xx_op_stop,
2348 .add_interface = stlc45xx_op_add_interface,
2349 .remove_interface = stlc45xx_op_remove_interface,
2350 .config = stlc45xx_op_config,
2351 .configure_filter = stlc45xx_op_configure_filter,
2352 .tx = stlc45xx_op_tx,
2353 .bss_info_changed = stlc45xx_op_bss_info_changed,
2354};
2355
2356static int stlc45xx_register_mac80211(struct stlc45xx *stlc)
2357{
2358 /* FIXME: SET_IEEE80211_PERM_ADDR() requires default_mac_addr
2359 to be non-const for some strange reason */
2360 static u8 default_mac_addr[ETH_ALEN] = {
2361 0x00, 0x02, 0xee, 0xc0, 0xff, 0xee
2362 };
2363 int ret;
2364
2365 SET_IEEE80211_PERM_ADDR(stlc->hw, default_mac_addr);
2366
2367 ret = ieee80211_register_hw(stlc->hw);
2368 if (ret) {
2369 stlc45xx_error("unable to register mac80211 hw: %d", ret);
2370 return ret;
2371 }
2372
2373 return 0;
2374}
2375
2376static void stlc45xx_device_release(struct device *dev)
2377{
2378
2379}
2380
2381static struct platform_device stlc45xx_device = {
2382 .name = "stlc45xx",
2383 .id = -1,
2384
2385 /* device model insists to have a release function */
2386 .dev = {
2387 .release = stlc45xx_device_release,
2388 },
2389};
2390
2391static int __devinit stlc45xx_probe(struct spi_device *spi)
2392{
2393 struct stlc45xx *stlc;
2394 struct ieee80211_hw *hw;
2395 int ret;
2396
2397 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2398
2399 /* mac80211 alloc */
2400 hw = ieee80211_alloc_hw(sizeof(*stlc), &stlc45xx_ops);
2401 if (!hw) {
2402 stlc45xx_error("could not alloc ieee80211_hw");
2403 ret = -ENOMEM;
2404 goto out;
2405 }
2406
2407 /* mac80211 clears hw->priv */
2408 stlc = hw->priv;
2409
2410 stlc->hw = hw;
2411 dev_set_drvdata(&spi->dev, stlc);
2412 stlc->spi = spi;
2413
2414 spi->bits_per_word = 16;
2415 spi->max_speed_hz = 24000000;
2416
2417 ret = spi_setup(spi);
2418 if (ret < 0)
2419 stlc45xx_error("spi_setup failed");
2420
2421 ret = gpio_request(stlc45xx_gpio_power, "stlc45xx power");
2422 if (ret < 0) {
2423 stlc45xx_error("power GPIO request failed: %d", ret);
2424 return ret;
2425 }
2426
2427 ret = gpio_request(stlc45xx_gpio_irq, "stlc45xx irq");
2428 if (ret < 0) {
2429 stlc45xx_error("irq GPIO request failed: %d", ret);
2430 goto out;
2431 }
2432
2433 gpio_direction_output(stlc45xx_gpio_power, 0);
2434 gpio_direction_input(stlc45xx_gpio_irq);
2435
2436 ret = request_irq(gpio_to_irq(stlc45xx_gpio_irq),
2437 stlc45xx_interrupt, IRQF_DISABLED, "stlc45xx",
2438 stlc->spi);
2439 if (ret < 0)
2440 /* FIXME: handle the error */
2441 stlc45xx_error("request_irq() failed");
2442
2443 set_irq_type(gpio_to_irq(stlc45xx_gpio_irq),
2444 IRQ_TYPE_EDGE_RISING);
2445
2446 disable_irq(gpio_to_irq(stlc45xx_gpio_irq));
2447
2448 ret = platform_device_register(&stlc45xx_device);
2449 if (ret) {
2450 stlc45xx_error("Couldn't register wlan_omap device.");
2451 return ret;
2452 }
2453 dev_set_drvdata(&stlc45xx_device.dev, stlc);
2454
2455 INIT_WORK(&stlc->work, stlc45xx_work);
2456 INIT_WORK(&stlc->work_reset, stlc45xx_work_reset);
2457 INIT_DELAYED_WORK(&stlc->work_tx_timeout, stlc45xx_work_tx_timeout);
2458 mutex_init(&stlc->mutex);
2459 init_completion(&stlc->fw_comp);
2460 spin_lock_init(&stlc->tx_lock);
2461 INIT_LIST_HEAD(&stlc->txbuffer);
2462 INIT_LIST_HEAD(&stlc->tx_pending);
2463 INIT_LIST_HEAD(&stlc->tx_sent);
2464
2465 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2466 IEEE80211_HW_SIGNAL_DBM |
2467 IEEE80211_HW_NOISE_DBM;
2468 /* four bytes for padding */
2469 hw->extra_tx_headroom = sizeof(struct s_lm_data_out) + 4;
2470
2471 /* unit us */
2472 hw->channel_change_time = 1000;
2473
2474 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2475 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &stlc45xx_band_2ghz;
2476
2477 SET_IEEE80211_DEV(hw, &spi->dev);
2478
2479 BUILD_BUG_ON(sizeof(default_cal_rssi) != RSSI_CAL_ARRAY_LEN);
2480 BUILD_BUG_ON(sizeof(default_cal_channels) != CHANNEL_CAL_ARRAY_LEN);
2481
2482 stlc->cal_rssi = kmemdup(default_cal_rssi, RSSI_CAL_ARRAY_LEN,
2483 GFP_KERNEL);
2484 stlc->cal_channels = kmemdup(default_cal_channels,
2485 CHANNEL_CAL_ARRAY_LEN,
2486 GFP_KERNEL);
2487
2488 ret = device_create_file(&stlc45xx_device.dev, &dev_attr_cal_rssi);
2489 if (ret < 0) {
2490 stlc45xx_error("failed to create sysfs file cal_rssi");
2491 goto out;
2492 }
2493
2494 ret = device_create_file(&stlc45xx_device.dev, &dev_attr_cal_channels);
2495 if (ret < 0) {
2496 stlc45xx_error("failed to create sysfs file cal_channels");
2497 goto out;
2498 }
2499
2500 ret = device_create_file(&stlc45xx_device.dev, &dev_attr_tx_buf);
2501 if (ret < 0) {
2502 stlc45xx_error("failed to create sysfs file tx_buf");
2503 goto out;
2504 }
2505
2506 ret = stlc45xx_register_mac80211(stlc);
2507 if (ret < 0)
2508 goto out;
2509
2510 stlc45xx_info("v" DRIVER_VERSION " loaded");
2511
2512 stlc45xx_info("config buffer 0x%x-0x%x",
2513 FIRMWARE_CONFIG_START, FIRMWARE_CONFIG_END);
2514 stlc45xx_info("tx 0x%x-0x%x, rx 0x%x-0x%x",
2515 FIRMWARE_TXBUFFER_START, FIRMWARE_TXBUFFER_END,
2516 FIRMWARE_RXBUFFER_START, FIRMWARE_RXBUFFER_END);
2517
2518out:
2519 return ret;
2520}
2521
2522static int __devexit stlc45xx_remove(struct spi_device *spi)
2523{
2524 struct stlc45xx *stlc = dev_get_drvdata(&spi->dev);
2525
2526 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2527
2528 platform_device_unregister(&stlc45xx_device);
2529
2530 ieee80211_unregister_hw(stlc->hw);
2531
2532 free_irq(gpio_to_irq(stlc45xx_gpio_irq), spi);
2533
2534 gpio_free(stlc45xx_gpio_power);
2535 gpio_free(stlc45xx_gpio_irq);
2536
2537 /* FIXME: free cal_channels and cal_rssi? */
2538
2539 kfree(stlc->fw);
2540
2541 mutex_destroy(&stlc->mutex);
2542
2543 /* frees also stlc */
2544 ieee80211_free_hw(stlc->hw);
2545 stlc = NULL;
2546
2547 return 0;
2548}
2549
2550
2551static struct spi_driver stlc45xx_spi_driver = {
2552 .driver = {
2553 /* use cx3110x name because board-n800.c uses that for the
2554 * SPI port */
2555 .name = "cx3110x",
2556 .bus = &spi_bus_type,
2557 .owner = THIS_MODULE,
2558 },
2559
2560 .probe = stlc45xx_probe,
2561 .remove = __devexit_p(stlc45xx_remove),
2562};
2563
2564static int __init stlc45xx_init(void)
2565{
2566 int ret;
2567
2568 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2569
2570 ret = spi_register_driver(&stlc45xx_spi_driver);
2571 if (ret < 0) {
2572 stlc45xx_error("failed to register SPI driver: %d", ret);
2573 goto out;
2574 }
2575
2576out:
2577 return ret;
2578}
2579
2580static void __exit stlc45xx_exit(void)
2581{
2582 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2583
2584 spi_unregister_driver(&stlc45xx_spi_driver);
2585
2586 stlc45xx_info("unloaded");
2587}
2588
2589module_init(stlc45xx_init);
2590module_exit(stlc45xx_exit);
2591
2592MODULE_LICENSE("GPL");
2593MODULE_AUTHOR("Kalle Valo <kalle.valo@nokia.com>");
2594MODULE_ALIAS("spi:cx3110x");
diff --git a/drivers/staging/stlc45xx/stlc45xx.h b/drivers/staging/stlc45xx/stlc45xx.h
deleted file mode 100644
index ac96bbbde79f..000000000000
--- a/drivers/staging/stlc45xx/stlc45xx.h
+++ /dev/null
@@ -1,283 +0,0 @@
1/*
2 * This file is part of stlc45xx
3 *
4 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/mutex.h>
25#include <linux/list.h>
26#include <net/mac80211.h>
27
28#include "stlc45xx_lmac.h"
29
30#define DRIVER_NAME "stlc45xx"
31#define DRIVER_VERSION "0.1.3"
32
33#define DRIVER_PREFIX DRIVER_NAME ": "
34
35enum {
36 DEBUG_NONE = 0,
37 DEBUG_FUNC = 1 << 0,
38 DEBUG_IRQ = 1 << 1,
39 DEBUG_BH = 1 << 2,
40 DEBUG_RX = 1 << 3,
41 DEBUG_RX_CONTENT = 1 << 5,
42 DEBUG_TX = 1 << 6,
43 DEBUG_TX_CONTENT = 1 << 8,
44 DEBUG_TXBUFFER = 1 << 9,
45 DEBUG_QUEUE = 1 << 10,
46 DEBUG_BOOT = 1 << 11,
47 DEBUG_PSM = 1 << 12,
48 DEBUG_ALL = ~0,
49};
50
51#define DEBUG_LEVEL DEBUG_NONE
52/* #define DEBUG_LEVEL DEBUG_ALL */
53/* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_RX | DEBUG_IRQ) */
54/* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_MEMREGION | DEBUG_QUEUE) */
55/* #define DEBUG_LEVEL (DEBUG_MEMREGION | DEBUG_QUEUE) */
56
57#define stlc45xx_error(fmt, arg...) \
58 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
59
60#define stlc45xx_warning(fmt, arg...) \
61 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
62
63#define stlc45xx_info(fmt, arg...) \
64 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
65
66#define stlc45xx_debug(level, fmt, arg...) \
67 do { \
68 if (level & DEBUG_LEVEL) \
69 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
70 } while (0)
71
72#define stlc45xx_dump(level, buf, len) \
73 do { \
74 if (level & DEBUG_LEVEL) \
75 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, \
76 16, 1, buf, len, 1); \
77 } while (0)
78
79#define MAC2STR(a) ((a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5])
80#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
81
82/* Bit 15 is read/write bit; ON = READ, OFF = WRITE */
83#define ADDR_READ_BIT_15 0x8000
84
85#define SPI_ADRS_ARM_INTERRUPTS 0x00
86#define SPI_ADRS_ARM_INT_EN 0x04
87
88#define SPI_ADRS_HOST_INTERRUPTS 0x08
89#define SPI_ADRS_HOST_INT_EN 0x0c
90#define SPI_ADRS_HOST_INT_ACK 0x10
91
92#define SPI_ADRS_GEN_PURP_1 0x14
93#define SPI_ADRS_GEN_PURP_2 0x18
94
95/* high word */
96#define SPI_ADRS_DEV_CTRL_STAT 0x26
97
98#define SPI_ADRS_DMA_DATA 0x28
99
100#define SPI_ADRS_DMA_WRITE_CTRL 0x2c
101#define SPI_ADRS_DMA_WRITE_LEN 0x2e
102#define SPI_ADRS_DMA_WRITE_BASE 0x30
103
104#define SPI_ADRS_DMA_READ_CTRL 0x34
105#define SPI_ADRS_DMA_READ_LEN 0x36
106#define SPI_ADRS_DMA_READ_BASE 0x38
107
108#define SPI_CTRL_STAT_HOST_OVERRIDE 0x8000
109#define SPI_CTRL_STAT_START_HALTED 0x4000
110#define SPI_CTRL_STAT_RAM_BOOT 0x2000
111#define SPI_CTRL_STAT_HOST_RESET 0x1000
112#define SPI_CTRL_STAT_HOST_CPU_EN 0x0800
113
114#define SPI_DMA_WRITE_CTRL_ENABLE 0x0001
115#define SPI_DMA_READ_CTRL_ENABLE 0x0001
116#define HOST_ALLOWED (1 << 7)
117
118#define FIRMWARE_ADDRESS 0x20000
119
120#define SPI_TIMEOUT 100 /* msec */
121
122#define SPI_MAX_TX_PACKETS 32
123
124#define SPI_MAX_PACKET_SIZE 32767
125
126#define SPI_TARGET_INT_WAKEUP 0x00000001
127#define SPI_TARGET_INT_SLEEP 0x00000002
128#define SPI_TARGET_INT_RDDONE 0x00000004
129
130#define SPI_TARGET_INT_CTS 0x00004000
131#define SPI_TARGET_INT_DR 0x00008000
132
133#define SPI_HOST_INT_READY 0x00000001
134#define SPI_HOST_INT_WR_READY 0x00000002
135#define SPI_HOST_INT_SW_UPDATE 0x00000004
136#define SPI_HOST_INT_UPDATE 0x10000000
137
138/* clear to send */
139#define SPI_HOST_INT_CTS 0x00004000
140
141/* data ready */
142#define SPI_HOST_INT_DR 0x00008000
143
144#define SPI_HOST_INTS_DEFAULT \
145 (SPI_HOST_INT_READY | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE)
146
147#define TARGET_BOOT_SLEEP 50
148
149/* The firmware buffer is divided into three areas:
150 *
151 * o config area (for control commands)
152 * o tx buffer
153 * o rx buffer
154 */
155#define FIRMWARE_BUFFER_START 0x20200
156#define FIRMWARE_BUFFER_END 0x27c60
157#define FIRMWARE_BUFFER_LEN (FIRMWARE_BUFFER_END - FIRMWARE_BUFFER_START)
158#define FIRMWARE_MTU 3240
159#define FIRMWARE_CONFIG_PAYLOAD_LEN 1024
160#define FIRMWARE_CONFIG_START FIRMWARE_BUFFER_START
161#define FIRMWARE_CONFIG_LEN (sizeof(struct s_lm_control) + \
162 FIRMWARE_CONFIG_PAYLOAD_LEN)
163#define FIRMWARE_CONFIG_END (FIRMWARE_CONFIG_START + FIRMWARE_CONFIG_LEN - 1)
164#define FIRMWARE_RXBUFFER_LEN (5 * FIRMWARE_MTU + 1024)
165#define FIRMWARE_RXBUFFER_START (FIRMWARE_BUFFER_END - FIRMWARE_RXBUFFER_LEN)
166#define FIRMWARE_RXBUFFER_END (FIRMWARE_RXBUFFER_START + \
167 FIRMWARE_RXBUFFER_LEN - 1)
168#define FIRMWARE_TXBUFFER_START (FIRMWARE_BUFFER_START + FIRMWARE_CONFIG_LEN)
169#define FIRMWARE_TXBUFFER_LEN (FIRMWARE_BUFFER_LEN - FIRMWARE_CONFIG_LEN - \
170 FIRMWARE_RXBUFFER_LEN)
171#define FIRMWARE_TXBUFFER_END (FIRMWARE_TXBUFFER_START + \
172 FIRMWARE_TXBUFFER_LEN - 1)
173
174#define FIRMWARE_TXBUFFER_HEADER 100
175#define FIRMWARE_TXBUFFER_TRAILER 4
176
177/* FIXME: come up with a proper value */
178#define MAX_FRAME_LEN 2500
179
180/* unit is ms */
181#define TX_FRAME_LIFETIME 2000
182#define TX_TIMEOUT 4000
183
184#define SUPPORTED_CHANNELS 13
185
186/* FIXME */
187/* #define CHANNEL_CAL_LEN offsetof(struct s_lmo_scan, bratemask) - \ */
188/* offsetof(struct s_lmo_scan, channel) */
189#define CHANNEL_CAL_LEN 292
190#define CHANNEL_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * CHANNEL_CAL_LEN)
191/* FIXME */
192/* #define RSSI_CAL_LEN sizeof(struct s_lmo_scan) - \ */
193/* offsetof(struct s_lmo_scan, rssical) */
194#define RSSI_CAL_LEN 8
195#define RSSI_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * RSSI_CAL_LEN)
196
197struct s_dma_regs {
198 unsigned short cmd;
199 unsigned short len;
200 unsigned long addr;
201};
202
203struct stlc45xx_ie_tim {
204 u8 dtim_count;
205 u8 dtim_period;
206 u8 bmap_control;
207 u8 pvbmap[251];
208};
209
210struct txbuffer {
211 /* can be removed when switched to skb queue */
212 struct list_head tx_list;
213
214 struct list_head buffer_list;
215
216 int start;
217 int frame_start;
218 int end;
219
220 struct sk_buff *skb;
221 u32 handle;
222
223 bool status_needed;
224
225 int header_len;
226
227 /* unit jiffies */
228 unsigned long lifetime;
229};
230
231enum fw_state {
232 FW_STATE_OFF,
233 FW_STATE_BOOTING,
234 FW_STATE_READY,
235 FW_STATE_RESET,
236 FW_STATE_RESETTING,
237};
238
239struct stlc45xx {
240 struct ieee80211_hw *hw;
241 struct spi_device *spi;
242 struct work_struct work;
243 struct work_struct work_reset;
244 struct delayed_work work_tx_timeout;
245 struct mutex mutex;
246 struct completion fw_comp;
247
248
249 u8 bssid[ETH_ALEN];
250 u8 mac_addr[ETH_ALEN];
251 int channel;
252
253 u8 *cal_rssi;
254 u8 *cal_channels;
255
256 enum fw_state fw_state;
257
258 spinlock_t tx_lock;
259
260 /* protected by tx_lock */
261 struct list_head txbuffer;
262
263 /* protected by tx_lock */
264 struct list_head tx_pending;
265
266 /* protected by tx_lock */
267 int tx_queue_stopped;
268
269 /* protected by mutex */
270 struct list_head tx_sent;
271
272 int tx_frames;
273
274 u8 *fw;
275 int fw_len;
276
277 bool psm;
278 bool associated;
279 int aid;
280 bool pspolling;
281};
282
283
diff --git a/drivers/staging/stlc45xx/stlc45xx_lmac.h b/drivers/staging/stlc45xx/stlc45xx_lmac.h
deleted file mode 100644
index af5db801347f..000000000000
--- a/drivers/staging/stlc45xx/stlc45xx_lmac.h
+++ /dev/null
@@ -1,434 +0,0 @@
1/************************************************************************
2* This is the LMAC API interface header file for STLC4560. *
3* Copyright (C) 2007 Conexant Systems, Inc. *
4* This program is free software; you can redistribute it and/or *
5* modify it under the terms of the GNU General Public License *
6* as published by the Free Software Foundation; either version 2 *
7* of the License, or (at your option) any later version. *
8* *
9* This program is distributed in the hope that it will be useful, *
10* but WITHOUT ANY WARRANTY; without even the implied warranty of *
11* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12* GNU General Public License for more details. *
13* *
14* You should have received a copy of the GNU General Public License *
15* along with this program. If not, see <http://www.gnu.org/licenses/>.*
16*************************************************************************/
17
18#ifndef __lmac_h__
19#define __lmac_h__
20
21#define LM_TOP_VARIANT 0x0506
22#define LM_BOTTOM_VARIANT 0x0506
23
24/*
25 * LMAC - UMAC interface definition:
26 */
27
28#define LM_FLAG_CONTROL 0x8000
29#define LM_FLAG_ALIGN 0x4000
30
31#define LM_CTRL_OPSET 0x0001
32
33#define LM_OUT_PROMISC 0x0001
34#define LM_OUT_TIMESTAMP 0x0002
35#define LM_OUT_SEQNR 0x0004
36#define LM_OUT_BURST 0x0010
37#define LM_OUT_NOCANCEL 0x0020
38#define LM_OUT_CLEARTIM 0x0040
39#define LM_OUT_HITCHHIKE 0x0080
40#define LM_OUT_COMPRESS 0x0100
41#define LM_OUT_CONCAT 0x0200
42#define LM_OUT_PCS_ACCEPT 0x0400
43#define LM_OUT_WAITEOSP 0x0800
44
45
46#define LM_ALOFT_SP 0x10
47#define LM_ALOFT_CTS 0x20
48#define LM_ALOFT_RTS 0x40
49#define LM_ALOFT_MASK 0x1f
50#define LM_ALOFT_RATE 0x0f
51
52#define LM_IN_FCS_GOOD 0x0001
53#define LM_IN_MATCH_MAC 0x0002
54#define LM_IN_MCBC 0x0004
55#define LM_IN_BEACON 0x0008
56#define LM_IN_MATCH_BSS 0x0010
57#define LM_IN_BCAST_BSS 0x0020
58#define LM_IN_DATA 0x0040
59#define LM_IN_TRUNCATED 0x0080
60
61#define LM_IN_TRANSPARENT 0x0200
62
63#define LM_QUEUE_BEACON 0
64#define LM_QUEUE_SCAN 1
65#define LM_QUEUE_MGT 2
66#define LM_QUEUE_MCBC 3
67#define LM_QUEUE_DATA 4
68#define LM_QUEUE_DATA0 4
69#define LM_QUEUE_DATA1 5
70#define LM_QUEUE_DATA2 6
71#define LM_QUEUE_DATA3 7
72
73#define LM_SETUP_INFRA 0x0001
74#define LM_SETUP_IBSS 0x0002
75#define LM_SETUP_TRANSPARENT 0x0008
76#define LM_SETUP_PROMISCUOUS 0x0010
77#define LM_SETUP_HIBERNATE 0x0020
78#define LM_SETUP_NOACK 0x0040
79#define LM_SETUP_RX_DISABLED 0x0080
80
81#define LM_ANTENNA_0 0
82#define LM_ANTENNA_1 1
83#define LM_ANTENNA_DIVERSITY 2
84
85#define LM_TX_FAILED 0x0001
86#define LM_TX_PSM 0x0002
87#define LM_TX_PSM_CANCELLED 0x0004
88
89#define LM_SCAN_EXIT 0x0001
90#define LM_SCAN_TRAP 0x0002
91#define LM_SCAN_ACTIVE 0x0004
92#define LM_SCAN_FILTER 0x0008
93
94#define LM_PSM 0x0001
95#define LM_PSM_DTIM 0x0002
96#define LM_PSM_MCBC 0x0004
97#define LM_PSM_CHECKSUM 0x0008
98#define LM_PSM_SKIP_MORE_DATA 0x0010
99#define LM_PSM_BEACON_TIMEOUT 0x0020
100#define LM_PSM_HFOSLEEP 0x0040
101#define LM_PSM_AUTOSWITCH_SLEEP 0x0080
102#define LM_PSM_LPIT 0x0100
103#define LM_PSM_BF_UCAST_SKIP 0x0200
104#define LM_PSM_BF_MCAST_SKIP 0x0400
105
106/* hfosleep */
107#define LM_PSM_SLEEP_OPTION_MASK (LM_PSM_AUTOSWITCH_SLEEP | LM_PSM_HFOSLEEP)
108#define LM_PSM_SLEEP_OPTION_SHIFT 6
109/* hfosleepend */
110#define LM_PSM_BF_OPTION_MASK (LM_PSM_BF_MCAST_SKIP | LM_PSM_BF_UCAST_SKIP)
111#define LM_PSM_BF_OPTION_SHIFT 9
112
113
114#define LM_PRIVACC_WEP 0x01
115#define LM_PRIVACC_TKIP 0x02
116#define LM_PRIVACC_MICHAEL 0x04
117#define LM_PRIVACC_CCX_KP 0x08
118#define LM_PRIVACC_CCX_MIC 0x10
119#define LM_PRIVACC_AES_CCMP 0x20
120
121/* size of s_lm_descr in words */
122#define LM_DESCR_SIZE_WORDS 11
123
124#ifndef __ASSEMBLER__
125
126enum {
127 LM_MODE_CLIENT = 0,
128 LM_MODE_AP
129};
130
131struct s_lm_descr {
132 uint16_t modes;
133 uint16_t flags;
134 uint32_t buffer_start;
135 uint32_t buffer_end;
136 uint8_t header;
137 uint8_t trailer;
138 uint8_t tx_queues;
139 uint8_t tx_depth;
140 uint8_t privacy;
141 uint8_t rx_keycache;
142 uint8_t tim_size;
143 uint8_t pad1;
144 uint8_t rates[16];
145 uint32_t link;
146 uint16_t mtu;
147};
148
149
150struct s_lm_control {
151 uint16_t flags;
152 uint16_t length;
153 uint32_t handle;
154 uint16_t oid;
155 uint16_t pad;
156 /* uint8_t data[]; */
157};
158
159enum {
160 LM_PRIV_NONE = 0,
161 LM_PRIV_WEP,
162 LM_PRIV_TKIP,
163 LM_PRIV_TKIPMICHAEL,
164 LM_PRIV_CCX_WEPMIC,
165 LM_PRIV_CCX_KPMIC,
166 LM_PRIV_CCX_KP,
167 LM_PRIV_AES_CCMP
168};
169
170enum {
171 LM_DECRYPT_NONE,
172 LM_DECRYPT_OK,
173 LM_DECRYPT_NOKEY,
174 LM_DECRYPT_NOMICHAEL,
175 LM_DECRYPT_NOCKIPMIC,
176 LM_DECRYPT_FAIL_WEP,
177 LM_DECRYPT_FAIL_TKIP,
178 LM_DECRYPT_FAIL_MICHAEL,
179 LM_DECRYPT_FAIL_CKIPKP,
180 LM_DECRYPT_FAIL_CKIPMIC,
181 LM_DECRYPT_FAIL_AESCCMP
182};
183
184struct s_lm_data_out {
185 uint16_t flags;
186 uint16_t length;
187 uint32_t handle;
188 uint16_t aid;
189 uint8_t rts_retries;
190 uint8_t retries;
191 uint8_t aloft[8];
192 uint8_t aloft_ctrl;
193 uint8_t crypt_offset;
194 uint8_t keytype;
195 uint8_t keylen;
196 uint8_t key[16];
197 uint8_t queue;
198 uint8_t backlog;
199 uint16_t durations[4];
200 uint8_t antenna;
201 uint8_t cts;
202 int16_t power;
203 uint8_t pad[2];
204 /*uint8_t data[];*/
205};
206
207#define LM_RCPI_INVALID (0xff)
208
209struct s_lm_data_in {
210 uint16_t flags;
211 uint16_t length;
212 uint16_t frequency;
213 uint8_t antenna;
214 uint8_t rate;
215 uint8_t rcpi;
216 uint8_t sq;
217 uint8_t decrypt;
218 uint8_t rssi_raw;
219 uint32_t clock[2];
220 /*uint8_t data[];*/
221};
222
223union u_lm_data {
224 struct s_lm_data_out out;
225 struct s_lm_data_in in;
226};
227
228enum {
229 LM_OID_SETUP = 0,
230 LM_OID_SCAN = 1,
231 LM_OID_TRAP = 2,
232 LM_OID_EDCF = 3,
233 LM_OID_KEYCACHE = 4,
234 LM_OID_PSM = 6,
235 LM_OID_TXCANCEL = 7,
236 LM_OID_TX = 8,
237 LM_OID_BURST = 9,
238 LM_OID_STATS = 10,
239 LM_OID_LED = 13,
240 LM_OID_TIMER = 15,
241 LM_OID_NAV = 20,
242 LM_OID_PCS = 22,
243 LM_OID_BT_BALANCER = 28,
244 LM_OID_GROUP_ADDRESS_TABLE = 30,
245 LM_OID_ARPTABLE = 31,
246 LM_OID_BT_OPTIONS = 35
247};
248
249enum {
250 LM_FRONTEND_UNKNOWN = 0,
251 LM_FRONTEND_DUETTE3,
252 LM_FRONTEND_DUETTE2,
253 LM_FRONTEND_FRISBEE,
254 LM_FRONTEND_CROSSBOW,
255 LM_FRONTEND_LONGBOW
256};
257
258
259#define INVALID_LPF_BANDWIDTH 0xffff
260#define INVALID_OSC_START_DELAY 0xffff
261
262struct s_lmo_setup {
263 uint16_t flags;
264 uint8_t macaddr[6];
265 uint8_t bssid[6];
266 uint8_t antenna;
267 uint8_t rx_align;
268 uint32_t rx_buffer;
269 uint16_t rx_mtu;
270 uint16_t frontend;
271 uint16_t timeout;
272 uint16_t truncate;
273 uint32_t bratemask;
274 uint8_t sbss_offset;
275 uint8_t mcast_window;
276 uint8_t rx_rssi_threshold;
277 uint8_t rx_ed_threshold;
278 uint32_t ref_clock;
279 uint16_t lpf_bandwidth;
280 uint16_t osc_start_delay;
281};
282
283
284struct s_lmo_scan {
285 uint16_t flags;
286 uint16_t dwell;
287 uint8_t channel[292];
288 uint32_t bratemask;
289 uint8_t aloft[8];
290 uint8_t rssical[8];
291};
292
293
294enum {
295 LM_TRAP_SCAN = 0,
296 LM_TRAP_TIMER,
297 LM_TRAP_BEACON_TX,
298 LM_TRAP_FAA_RADIO_ON,
299 LM_TRAP_FAA_RADIO_OFF,
300 LM_TRAP_RADAR,
301 LM_TRAP_NO_BEACON,
302 LM_TRAP_TBTT,
303 LM_TRAP_SCO_ENTER,
304 LM_TRAP_SCO_EXIT
305};
306
307struct s_lmo_trap {
308 uint16_t event;
309 uint16_t frequency;
310};
311
312struct s_lmo_timer {
313 uint32_t interval;
314};
315
316struct s_lmo_nav {
317 uint32_t period;
318};
319
320
321struct s_lmo_edcf_queue;
322
323struct s_lmo_edcf {
324 uint8_t flags;
325 uint8_t slottime;
326 uint8_t sifs;
327 uint8_t eofpad;
328 struct s_lmo_edcf_queue {
329 uint8_t aifs;
330 uint8_t pad0;
331 uint16_t cwmin;
332 uint16_t cwmax;
333 uint16_t txop;
334 } queues[8];
335 uint8_t mapping[4];
336 uint16_t maxburst;
337 uint16_t round_trip_delay;
338};
339
340struct s_lmo_keycache {
341 uint8_t entry;
342 uint8_t keyid;
343 uint8_t address[6];
344 uint8_t pad[2];
345 uint8_t keytype;
346 uint8_t keylen;
347 uint8_t key[24];
348};
349
350
351struct s_lm_interval;
352
353struct s_lmo_psm {
354 uint16_t flags;
355 uint16_t aid;
356 struct s_lm_interval {
357 uint16_t interval;
358 uint16_t periods;
359 } intervals[4];
360 /* uint16_t pad; */
361 uint8_t beacon_rcpi_skip_max;
362 uint8_t rcpi_delta_threshold;
363 uint8_t nr;
364 uint8_t exclude[1];
365};
366
367#define MC_FILTER_ADDRESS_NUM 4
368
369struct s_lmo_group_address_table {
370 uint16_t filter_enable;
371 uint16_t num_address;
372 uint8_t macaddr_list[MC_FILTER_ADDRESS_NUM][6];
373};
374
375struct s_lmo_txcancel {
376 uint32_t address[1];
377};
378
379
380struct s_lmo_tx {
381 uint8_t flags;
382 uint8_t retries;
383 uint8_t rcpi;
384 uint8_t sq;
385 uint16_t seqctrl;
386 uint8_t antenna;
387 uint8_t pad;
388};
389
390struct s_lmo_burst {
391 uint8_t flags;
392 uint8_t queue;
393 uint8_t backlog;
394 uint8_t pad;
395 uint16_t durations[32];
396};
397
398struct s_lmo_stats {
399 uint32_t valid;
400 uint32_t fcs;
401 uint32_t abort;
402 uint32_t phyabort;
403 uint32_t rts_success;
404 uint32_t rts_fail;
405 uint32_t timestamp;
406 uint32_t time_tx;
407 uint32_t noisefloor;
408 uint32_t sample_noise[8];
409 uint32_t sample_cca;
410 uint32_t sample_tx;
411};
412
413
414struct s_lmo_led {
415 uint16_t flags;
416 uint16_t mask[2];
417 uint16_t delay/*[2]*/;
418};
419
420
421struct s_lmo_bt_balancer {
422 uint16_t prio_thresh;
423 uint16_t acl_thresh;
424};
425
426
427struct s_lmo_arp_table {
428 uint16_t filter_enable;
429 uint32_t ipaddr;
430};
431
432#endif /* __ASSEMBLER__ */
433
434#endif /* __lmac_h__ */
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