aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
authorRandy Dunlap <randy.dunlap@oracle.com>2009-02-04 18:12:20 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2009-02-05 15:56:48 -0500
commitfe86175bce50bc3d65ff09c287fed955c4da1eb3 (patch)
tree00cdc9fffe9b539dfbf901d2338c0f337d2faf2f /drivers
parentcd29cf7d112aa022cfcfb257ffe3d89ffbd1d820 (diff)
atyfb: fix CONFIG_ namespace violations
Fix namespace violations by changing non-kconfig CONFIG_ names to CNFG_*. Fixes breakage in staging/, which adds a real CONFIG_PANEL. Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/video/aty/aty128fb.c8
-rw-r--r--drivers/video/aty/atyfb_base.c22
-rw-r--r--drivers/video/aty/radeon_base.c10
-rw-r--r--drivers/video/aty/radeon_pm.c18
4 files changed, 29 insertions, 29 deletions
diff --git a/drivers/video/aty/aty128fb.c b/drivers/video/aty/aty128fb.c
index db16112cf197..fb2b0f5b23bd 100644
--- a/drivers/video/aty/aty128fb.c
+++ b/drivers/video/aty/aty128fb.c
@@ -1475,7 +1475,7 @@ static int aty128fb_set_par(struct fb_info *info)
1475 aty128_set_pll(&par->pll, par); 1475 aty128_set_pll(&par->pll, par);
1476 aty128_set_fifo(&par->fifo_reg, par); 1476 aty128_set_fifo(&par->fifo_reg, par);
1477 1477
1478 config = aty_ld_le32(CONFIG_CNTL) & ~3; 1478 config = aty_ld_le32(CNFG_CNTL) & ~3;
1479 1479
1480#if defined(__BIG_ENDIAN) 1480#if defined(__BIG_ENDIAN)
1481 if (par->crtc.bpp == 32) 1481 if (par->crtc.bpp == 32)
@@ -1484,7 +1484,7 @@ static int aty128fb_set_par(struct fb_info *info)
1484 config |= 1; /* make aperture do 16 bit swapping */ 1484 config |= 1; /* make aperture do 16 bit swapping */
1485#endif 1485#endif
1486 1486
1487 aty_st_le32(CONFIG_CNTL, config); 1487 aty_st_le32(CNFG_CNTL, config);
1488 aty_st_8(CRTC_EXT_CNTL + 1, 0); /* turn the video back on */ 1488 aty_st_8(CRTC_EXT_CNTL + 1, 0); /* turn the video back on */
1489 1489
1490 info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3; 1490 info->fix.line_length = (par->crtc.vxres * par->crtc.bpp) >> 3;
@@ -1875,7 +1875,7 @@ static int __devinit aty128_init(struct pci_dev *pdev, const struct pci_device_i
1875 u32 dac; 1875 u32 dac;
1876 1876
1877 /* Get the chip revision */ 1877 /* Get the chip revision */
1878 chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F; 1878 chip_rev = (aty_ld_le32(CNFG_CNTL) >> 16) & 0x1F;
1879 1879
1880 strcpy(video_card, "Rage128 XX "); 1880 strcpy(video_card, "Rage128 XX ");
1881 video_card[8] = ent->device >> 8; 1881 video_card[8] = ent->device >> 8;
@@ -2057,7 +2057,7 @@ static int __devinit aty128_probe(struct pci_dev *pdev, const struct pci_device_
2057 2057
2058 /* Grab memory size from the card */ 2058 /* Grab memory size from the card */
2059 // How does this relate to the resource length from the PCI hardware? 2059 // How does this relate to the resource length from the PCI hardware?
2060 par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF; 2060 par->vram_size = aty_ld_le32(CNFG_MEMSIZE) & 0x03FFFFFF;
2061 2061
2062 /* Virtualize the framebuffer */ 2062 /* Virtualize the framebuffer */
2063 info->screen_base = ioremap(fb_addr, par->vram_size); 2063 info->screen_base = ioremap(fb_addr, par->vram_size);
diff --git a/drivers/video/aty/atyfb_base.c b/drivers/video/aty/atyfb_base.c
index cc6b470073da..1d6e16d346a5 100644
--- a/drivers/video/aty/atyfb_base.c
+++ b/drivers/video/aty/atyfb_base.c
@@ -135,7 +135,7 @@
135#if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \ 135#if defined(CONFIG_PM) || defined(CONFIG_PMAC_BACKLIGHT) || \
136defined (CONFIG_FB_ATY_GENERIC_LCD) || defined(CONFIG_FB_ATY_BACKLIGHT) 136defined (CONFIG_FB_ATY_GENERIC_LCD) || defined(CONFIG_FB_ATY_BACKLIGHT)
137static const u32 lt_lcd_regs[] = { 137static const u32 lt_lcd_regs[] = {
138 CONFIG_PANEL_LG, 138 CNFG_PANEL_LG,
139 LCD_GEN_CNTL_LG, 139 LCD_GEN_CNTL_LG,
140 DSTN_CONTROL_LG, 140 DSTN_CONTROL_LG,
141 HFB_PITCH_ADDR_LG, 141 HFB_PITCH_ADDR_LG,
@@ -446,7 +446,7 @@ static int __devinit correct_chipset(struct atyfb_par *par)
446 par->pll_limits.ecp_max = aty_chips[i].ecp_max; 446 par->pll_limits.ecp_max = aty_chips[i].ecp_max;
447 par->features = aty_chips[i].features; 447 par->features = aty_chips[i].features;
448 448
449 chip_id = aty_ld_le32(CONFIG_CHIP_ID, par); 449 chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
450 type = chip_id & CFG_CHIP_TYPE; 450 type = chip_id & CFG_CHIP_TYPE;
451 rev = (chip_id & CFG_CHIP_REV) >> 24; 451 rev = (chip_id & CFG_CHIP_REV) >> 24;
452 452
@@ -629,7 +629,7 @@ static void aty_get_crtc(const struct atyfb_par *par, struct crtc *crtc)
629 crtc->lcd_index = aty_ld_le32(LCD_INDEX, par); 629 crtc->lcd_index = aty_ld_le32(LCD_INDEX, par);
630 aty_st_le32(LCD_INDEX, crtc->lcd_index, par); 630 aty_st_le32(LCD_INDEX, crtc->lcd_index, par);
631 } 631 }
632 crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par); 632 crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par);
633 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par); 633 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par);
634 634
635 635
@@ -676,7 +676,7 @@ static void aty_set_crtc(const struct atyfb_par *par, const struct crtc *crtc)
676 aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN), par); 676 aty_st_le32(CRTC_GEN_CNTL, crtc->gen_cntl & ~(CRTC_EXT_DISP_EN | CRTC_EN), par);
677 677
678 /* update non-shadow registers first */ 678 /* update non-shadow registers first */
679 aty_st_lcd(CONFIG_PANEL, crtc->lcd_config_panel, par); 679 aty_st_lcd(CNFG_PANEL, crtc->lcd_config_panel, par);
680 aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl & 680 aty_st_lcd(LCD_GEN_CNTL, crtc->lcd_gen_cntl &
681 ~(CRTC_RW_SELECT | SHADOW_EN | SHADOW_RW_EN), par); 681 ~(CRTC_RW_SELECT | SHADOW_EN | SHADOW_RW_EN), par);
682 682
@@ -858,7 +858,7 @@ static int aty_var_to_crtc(const struct fb_info *info,
858 if (!M64_HAS(MOBIL_BUS)) 858 if (!M64_HAS(MOBIL_BUS))
859 crtc->lcd_index |= CRTC2_DISPLAY_DIS; 859 crtc->lcd_index |= CRTC2_DISPLAY_DIS;
860 860
861 crtc->lcd_config_panel = aty_ld_lcd(CONFIG_PANEL, par) | 0x4000; 861 crtc->lcd_config_panel = aty_ld_lcd(CNFG_PANEL, par) | 0x4000;
862 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT; 862 crtc->lcd_gen_cntl = aty_ld_lcd(LCD_GEN_CNTL, par) & ~CRTC_RW_SELECT;
863 863
864 crtc->lcd_gen_cntl &= 864 crtc->lcd_gen_cntl &=
@@ -2254,7 +2254,7 @@ static int __devinit aty_init(struct fb_info *info)
2254 if (!M64_HAS(INTEGRATED)) { 2254 if (!M64_HAS(INTEGRATED)) {
2255 u32 stat0; 2255 u32 stat0;
2256 u8 dac_type, dac_subtype, clk_type; 2256 u8 dac_type, dac_subtype, clk_type;
2257 stat0 = aty_ld_le32(CONFIG_STAT0, par); 2257 stat0 = aty_ld_le32(CNFG_STAT0, par);
2258 par->bus_type = (stat0 >> 0) & 0x07; 2258 par->bus_type = (stat0 >> 0) & 0x07;
2259 par->ram_type = (stat0 >> 3) & 0x07; 2259 par->ram_type = (stat0 >> 3) & 0x07;
2260 ramname = aty_gx_ram[par->ram_type]; 2260 ramname = aty_gx_ram[par->ram_type];
@@ -2324,7 +2324,7 @@ static int __devinit aty_init(struct fb_info *info)
2324 par->dac_ops = &aty_dac_ct; 2324 par->dac_ops = &aty_dac_ct;
2325 par->pll_ops = &aty_pll_ct; 2325 par->pll_ops = &aty_pll_ct;
2326 par->bus_type = PCI; 2326 par->bus_type = PCI;
2327 par->ram_type = (aty_ld_le32(CONFIG_STAT0, par) & 0x07); 2327 par->ram_type = (aty_ld_le32(CNFG_STAT0, par) & 0x07);
2328 ramname = aty_ct_ram[par->ram_type]; 2328 ramname = aty_ct_ram[par->ram_type];
2329 /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */ 2329 /* for many chips, the mclk is 67 MHz for SDRAM, 63 MHz otherwise */
2330 if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM) 2330 if (par->pll_limits.mclk == 67 && par->ram_type < SDRAM)
@@ -2433,7 +2433,7 @@ static int __devinit aty_init(struct fb_info *info)
2433 } 2433 }
2434 2434
2435 if (M64_HAS(MAGIC_VRAM_SIZE)) { 2435 if (M64_HAS(MAGIC_VRAM_SIZE)) {
2436 if (aty_ld_le32(CONFIG_STAT1, par) & 0x40000000) 2436 if (aty_ld_le32(CNFG_STAT1, par) & 0x40000000)
2437 info->fix.smem_len += 0x400000; 2437 info->fix.smem_len += 0x400000;
2438 } 2438 }
2439 2439
@@ -2946,7 +2946,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
2946 * Fix PROMs idea of MEM_CNTL settings... 2946 * Fix PROMs idea of MEM_CNTL settings...
2947 */ 2947 */
2948 mem = aty_ld_le32(MEM_CNTL, par); 2948 mem = aty_ld_le32(MEM_CNTL, par);
2949 chip_id = aty_ld_le32(CONFIG_CHIP_ID, par); 2949 chip_id = aty_ld_le32(CNFG_CHIP_ID, par);
2950 if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) && !((chip_id >> 24) & 1)) { 2950 if (((chip_id & CFG_CHIP_TYPE) == VT_CHIP_ID) && !((chip_id >> 24) & 1)) {
2951 switch (mem & 0x0f) { 2951 switch (mem & 0x0f) {
2952 case 3: 2952 case 3:
@@ -2964,7 +2964,7 @@ static int __devinit atyfb_setup_sparc(struct pci_dev *pdev,
2964 default: 2964 default:
2965 break; 2965 break;
2966 } 2966 }
2967 if ((aty_ld_le32(CONFIG_STAT0, par) & 7) >= SDRAM) 2967 if ((aty_ld_le32(CNFG_STAT0, par) & 7) >= SDRAM)
2968 mem &= ~(0x00700000); 2968 mem &= ~(0x00700000);
2969 } 2969 }
2970 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */ 2970 mem &= ~(0xcf80e000); /* Turn off all undocumented bits. */
@@ -3572,7 +3572,7 @@ static int __init atyfb_atari_probe(void)
3572 } 3572 }
3573 3573
3574 /* Fake pci_id for correct_chipset() */ 3574 /* Fake pci_id for correct_chipset() */
3575 switch (aty_ld_le32(CONFIG_CHIP_ID, par) & CFG_CHIP_TYPE) { 3575 switch (aty_ld_le32(CNFG_CHIP_ID, par) & CFG_CHIP_TYPE) {
3576 case 0x00d7: 3576 case 0x00d7:
3577 par->pci_id = PCI_CHIP_MACH64GX; 3577 par->pci_id = PCI_CHIP_MACH64GX;
3578 break; 3578 break;
diff --git a/drivers/video/aty/radeon_base.c b/drivers/video/aty/radeon_base.c
index d0f1a7fc2c9d..16bb7e3c0310 100644
--- a/drivers/video/aty/radeon_base.c
+++ b/drivers/video/aty/radeon_base.c
@@ -1936,8 +1936,8 @@ static void fixup_memory_mappings(struct radeonfb_info *rinfo)
1936 OUTREG(CRTC_GEN_CNTL, save_crtc_gen_cntl | CRTC_DISP_REQ_EN_B); 1936 OUTREG(CRTC_GEN_CNTL, save_crtc_gen_cntl | CRTC_DISP_REQ_EN_B);
1937 mdelay(100); 1937 mdelay(100);
1938 1938
1939 aper_base = INREG(CONFIG_APER_0_BASE); 1939 aper_base = INREG(CNFG_APER_0_BASE);
1940 aper_size = INREG(CONFIG_APER_SIZE); 1940 aper_size = INREG(CNFG_APER_SIZE);
1941 1941
1942#ifdef SET_MC_FB_FROM_APERTURE 1942#ifdef SET_MC_FB_FROM_APERTURE
1943 /* Set framebuffer to be at the same address as set in PCI BAR */ 1943 /* Set framebuffer to be at the same address as set in PCI BAR */
@@ -2024,11 +2024,11 @@ static void radeon_identify_vram(struct radeonfb_info *rinfo)
2024 ~CRTC_H_CUTOFF_ACTIVE_EN); 2024 ~CRTC_H_CUTOFF_ACTIVE_EN);
2025 } 2025 }
2026 } else { 2026 } else {
2027 tmp = INREG(CONFIG_MEMSIZE); 2027 tmp = INREG(CNFG_MEMSIZE);
2028 } 2028 }
2029 2029
2030 /* mem size is bits [28:0], mask off the rest */ 2030 /* mem size is bits [28:0], mask off the rest */
2031 rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK; 2031 rinfo->video_ram = tmp & CNFG_MEMSIZE_MASK;
2032 2032
2033 /* 2033 /*
2034 * Hack to get around some busted production M6's 2034 * Hack to get around some busted production M6's
@@ -2228,7 +2228,7 @@ static int __devinit radeonfb_pci_register (struct pci_dev *pdev,
2228 */ 2228 */
2229 rinfo->errata = 0; 2229 rinfo->errata = 0;
2230 if (rinfo->family == CHIP_FAMILY_R300 && 2230 if (rinfo->family == CHIP_FAMILY_R300 &&
2231 (INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) 2231 (INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK)
2232 == CFG_ATI_REV_A11) 2232 == CFG_ATI_REV_A11)
2233 rinfo->errata |= CHIP_ERRATA_R300_CG; 2233 rinfo->errata |= CHIP_ERRATA_R300_CG;
2234 2234
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 675abdafc2d8..c4ac2a032fcb 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -333,7 +333,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
333 if (!rinfo->has_CRTC2) { 333 if (!rinfo->has_CRTC2) {
334 tmp = INPLL(pllSCLK_CNTL); 334 tmp = INPLL(pllSCLK_CNTL);
335 335
336 if ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13) 336 if ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) > CFG_ATI_REV_A13)
337 tmp &= ~(SCLK_CNTL__FORCE_CP | SCLK_CNTL__FORCE_RB); 337 tmp &= ~(SCLK_CNTL__FORCE_CP | SCLK_CNTL__FORCE_RB);
338 tmp &= ~(SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 | 338 tmp &= ~(SCLK_CNTL__FORCE_HDP | SCLK_CNTL__FORCE_DISP1 |
339 SCLK_CNTL__FORCE_TOP | SCLK_CNTL__FORCE_SE | 339 SCLK_CNTL__FORCE_TOP | SCLK_CNTL__FORCE_SE |
@@ -468,9 +468,9 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
468 468
469 /*RAGE_6::A11 A12 A12N1 A13, RV250::A11 A12, R300*/ 469 /*RAGE_6::A11 A12 A12N1 A13, RV250::A11 A12, R300*/
470 if ((rinfo->family == CHIP_FAMILY_RV250 && 470 if ((rinfo->family == CHIP_FAMILY_RV250 &&
471 ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) || 471 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) ||
472 ((rinfo->family == CHIP_FAMILY_RV100) && 472 ((rinfo->family == CHIP_FAMILY_RV100) &&
473 ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) { 473 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) <= CFG_ATI_REV_A13))) {
474 tmp |= SCLK_CNTL__FORCE_CP; 474 tmp |= SCLK_CNTL__FORCE_CP;
475 tmp |= SCLK_CNTL__FORCE_VIP; 475 tmp |= SCLK_CNTL__FORCE_VIP;
476 } 476 }
@@ -486,7 +486,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
486 /* RV200::A11 A12 RV250::A11 A12 */ 486 /* RV200::A11 A12 RV250::A11 A12 */
487 if (((rinfo->family == CHIP_FAMILY_RV200) || 487 if (((rinfo->family == CHIP_FAMILY_RV200) ||
488 (rinfo->family == CHIP_FAMILY_RV250)) && 488 (rinfo->family == CHIP_FAMILY_RV250)) &&
489 ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) 489 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13))
490 tmp |= SCLK_MORE_CNTL__FORCEON; 490 tmp |= SCLK_MORE_CNTL__FORCEON;
491 491
492 OUTPLL(pllSCLK_MORE_CNTL, tmp); 492 OUTPLL(pllSCLK_MORE_CNTL, tmp);
@@ -497,7 +497,7 @@ static void radeon_pm_enable_dynamic_mode(struct radeonfb_info *rinfo)
497 /* RV200::A11 A12, RV250::A11 A12 */ 497 /* RV200::A11 A12, RV250::A11 A12 */
498 if (((rinfo->family == CHIP_FAMILY_RV200) || 498 if (((rinfo->family == CHIP_FAMILY_RV200) ||
499 (rinfo->family == CHIP_FAMILY_RV250)) && 499 (rinfo->family == CHIP_FAMILY_RV250)) &&
500 ((INREG(CONFIG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) { 500 ((INREG(CNFG_CNTL) & CFG_ATI_REV_ID_MASK) < CFG_ATI_REV_A13)) {
501 tmp = INPLL(pllPLL_PWRMGT_CNTL); 501 tmp = INPLL(pllPLL_PWRMGT_CNTL);
502 tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE; 502 tmp |= PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE;
503 OUTPLL(pllPLL_PWRMGT_CNTL, tmp); 503 OUTPLL(pllPLL_PWRMGT_CNTL, tmp);
@@ -702,7 +702,7 @@ static void radeon_pm_restore_regs(struct radeonfb_info *rinfo)
702 OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]); 702 OUTREG(DISPLAY_BASE_ADDR, rinfo->save_regs[31]);
703 OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]); 703 OUTREG(MC_AGP_LOCATION, rinfo->save_regs[32]);
704 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); 704 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]);
705 OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); 705 OUTREG(CNFG_MEMSIZE, rinfo->video_ram);
706 706
707 OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]); 707 OUTREG(DISP_MISC_CNTL, rinfo->save_regs[9]);
708 OUTREG(DISP_PWR_MAN, rinfo->save_regs[10]); 708 OUTREG(DISP_PWR_MAN, rinfo->save_regs[10]);
@@ -1723,7 +1723,7 @@ static void radeon_reinitialize_M10(struct radeonfb_info *rinfo)
1723 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]); 1723 OUTREG(CRTC2_DISPLAY_BASE_ADDR, rinfo->save_regs[33]);
1724 OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]); 1724 OUTREG(MC_FB_LOCATION, rinfo->save_regs[30]);
1725 OUTREG(OV0_BASE_ADDR, rinfo->save_regs[80]); 1725 OUTREG(OV0_BASE_ADDR, rinfo->save_regs[80]);
1726 OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); 1726 OUTREG(CNFG_MEMSIZE, rinfo->video_ram);
1727 OUTREG(BUS_CNTL, rinfo->save_regs[36]); 1727 OUTREG(BUS_CNTL, rinfo->save_regs[36]);
1728 OUTREG(BUS_CNTL1, rinfo->save_regs[14]); 1728 OUTREG(BUS_CNTL1, rinfo->save_regs[14]);
1729 OUTREG(MPP_TB_CONFIG, rinfo->save_regs[37]); 1729 OUTREG(MPP_TB_CONFIG, rinfo->save_regs[37]);
@@ -1961,7 +1961,7 @@ static void radeon_pm_m9p_reconfigure_mc(struct radeonfb_info *rinfo)
1961 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, rinfo->save_regs[68] /*0x141555ff*/); 1961 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, rinfo->save_regs[68] /*0x141555ff*/);
1962 OUTMC(rinfo, ixMC_IMP_CNTL_0, rinfo->save_regs[71] /*0x00009249*/); 1962 OUTMC(rinfo, ixMC_IMP_CNTL_0, rinfo->save_regs[71] /*0x00009249*/);
1963 OUTREG(MC_IND_INDEX, 0); 1963 OUTREG(MC_IND_INDEX, 0);
1964 OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); 1964 OUTREG(CNFG_MEMSIZE, rinfo->video_ram);
1965 1965
1966 mdelay(20); 1966 mdelay(20);
1967} 1967}
@@ -2361,7 +2361,7 @@ static void radeon_reinitialize_QW(struct radeonfb_info *rinfo)
2361 OUTMC(rinfo, ixMC_IMP_CNTL_0, 0x00009249); 2361 OUTMC(rinfo, ixMC_IMP_CNTL_0, 0x00009249);
2362 OUTREG(MC_IND_INDEX, 0); 2362 OUTREG(MC_IND_INDEX, 0);
2363 2363
2364 OUTREG(CONFIG_MEMSIZE, rinfo->video_ram); 2364 OUTREG(CNFG_MEMSIZE, rinfo->video_ram);
2365 2365
2366 radeon_pm_full_reset_sdram(rinfo); 2366 radeon_pm_full_reset_sdram(rinfo);
2367 2367