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authorPaul Mundt <lethal@linux-sh.org>2009-08-12 22:48:01 -0400
committerPaul Mundt <lethal@linux-sh.org>2009-08-12 22:48:01 -0400
commite290861f99131fc42d98012a9ea2dc185f08f8f9 (patch)
tree5c8b92d095d74d03b281711c81bac54bd59989cd /drivers
parentb4a757367d36cebddcd332a4024d92f1e87af370 (diff)
parentdbefd606a3b3634799b625f4900336e61c89e868 (diff)
Merge branch 'sh/stable-updates'
Diffstat (limited to 'drivers')
-rw-r--r--drivers/acpi/acpi_memhotplug.c34
-rw-r--r--drivers/acpi/acpica/acobject.h1
-rw-r--r--drivers/acpi/acpica/dsopcode.c24
-rw-r--r--drivers/acpi/acpica/exfldio.c6
-rw-r--r--drivers/acpi/osl.c25
-rw-r--r--drivers/acpi/sleep.c8
-rw-r--r--drivers/acpi/system.c2
-rw-r--r--drivers/ata/ahci.c83
-rw-r--r--drivers/ata/ata_piix.c3
-rw-r--r--drivers/ata/libata-core.c33
-rw-r--r--drivers/ata/libata-eh.c2
-rw-r--r--drivers/ata/pata_at91.c84
-rw-r--r--drivers/ata/pata_atiixp.c19
-rw-r--r--drivers/ata/pata_octeon_cf.c3
-rw-r--r--drivers/ata/pata_pcmcia.c1
-rw-r--r--drivers/ata/sata_mv.c2
-rw-r--r--drivers/ata/sata_nv.c8
-rw-r--r--drivers/ata/sata_sil.c2
-rw-r--r--drivers/base/firmware_class.c1
-rw-r--r--drivers/base/platform.c3
-rw-r--r--drivers/base/sys.c2
-rw-r--r--drivers/block/mg_disk.c101
-rw-r--r--drivers/char/agp/parisc-agp.c2
-rw-r--r--drivers/char/n_tty.c1
-rw-r--r--drivers/char/pty.c2
-rw-r--r--drivers/char/sysrq.c8
-rw-r--r--drivers/char/tty_buffer.c13
-rw-r--r--drivers/char/tty_ldisc.c152
-rw-r--r--drivers/char/vr41xx_giu.c0
-rw-r--r--drivers/cpufreq/cpufreq.c27
-rw-r--r--drivers/cpufreq/cpufreq_conservative.c6
-rw-r--r--drivers/dma/Kconfig12
-rw-r--r--drivers/dma/Makefile1
-rw-r--r--drivers/dma/at_hdmac.c1213
-rw-r--r--drivers/dma/at_hdmac_regs.h353
-rw-r--r--drivers/dma/dmatest.c21
-rw-r--r--drivers/dma/fsldma.c17
-rw-r--r--drivers/dma/fsldma.h1
-rw-r--r--drivers/dma/mv_xor.c2
-rw-r--r--drivers/edac/amd64_edac.c9
-rw-r--r--drivers/edac/x38_edac.c2
-rw-r--r--drivers/gpu/drm/drm_crtc.c2
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c6
-rw-r--r--drivers/gpu/drm/drm_irq.c2
-rw-r--r--drivers/gpu/drm/drm_modes.c2
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c15
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h4
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c4
-rw-r--r--drivers/gpu/drm/i915/i915_gem_debugfs.c2
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c239
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h45
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c2
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c40
-rw-r--r--drivers/gpu/drm/i915/intel_bios.h45
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c12
-rw-r--r--drivers/gpu/drm/i915/intel_display.c759
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c216
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h3
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c64
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c12
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c254
-rw-r--r--drivers/gpu/drm/i915/intel_tv.c22
-rw-r--r--drivers/gpu/drm/radeon/Makefile3
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c293
-rw-r--r--drivers/gpu/drm/radeon/r100.c773
-rw-r--r--drivers/gpu/drm/radeon/r300.c78
-rw-r--r--drivers/gpu/drm/radeon/r300_reg.h4
-rw-r--r--drivers/gpu/drm/radeon/r500_reg.h2
-rw-r--r--drivers/gpu/drm/radeon/r520.c22
-rw-r--r--drivers/gpu/drm/radeon/r600.c5
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c22
-rw-r--r--drivers/gpu/drm/radeon/radeon.h87
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h32
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_benchmark.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_cursor.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c61
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c74
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c21
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c359
-rw-r--r--drivers/gpu/drm/radeon/radeon_fb.c70
-rw-r--r--drivers/gpu/drm/radeon/radeon_fence.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_gart.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_gem.c45
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c687
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c188
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h51
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c158
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c15
-rw-r--r--drivers/gpu/drm/radeon/radeon_share.h39
-rw-r--r--drivers/gpu/drm/radeon/radeon_test.c209
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c24
-rw-r--r--drivers/gpu/drm/radeon/rs400.c30
-rw-r--r--drivers/gpu/drm/radeon/rs600.c7
-rw-r--r--drivers/gpu/drm/radeon/rs690.c479
-rw-r--r--drivers/gpu/drm/radeon/rs690r.h99
-rw-r--r--drivers/gpu/drm/radeon/rv515.c799
-rw-r--r--drivers/gpu/drm/radeon/rv515r.h170
-rw-r--r--drivers/gpu/drm/radeon/rv770.c2
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo.c70
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_util.c69
-rw-r--r--drivers/gpu/drm/ttm/ttm_bo_vm.c3
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c25
-rw-r--r--drivers/hwmon/asus_atk0110.c6
-rw-r--r--drivers/hwmon/smsc47m1.c11
-rw-r--r--drivers/i2c/busses/i2c-omap.c42
-rw-r--r--drivers/i2c/busses/i2c-s3c2410.c5
-rw-r--r--drivers/i2c/chips/tsl2550.c17
-rw-r--r--drivers/input/keyboard/matrix_keypad.c18
-rw-r--r--drivers/input/misc/wistron_btns.c16
-rw-r--r--drivers/input/serio/hp_sdc_mlc.c2
-rw-r--r--drivers/input/serio/i8042-x86ia64io.h8
-rw-r--r--drivers/isdn/mISDN/l1oip_core.c6
-rw-r--r--drivers/lguest/core.c119
-rw-r--r--drivers/lguest/hypercalls.c145
-rw-r--r--drivers/lguest/interrupts_and_traps.c288
-rw-r--r--drivers/lguest/lg.h32
-rw-r--r--drivers/lguest/lguest_device.c160
-rw-r--r--drivers/lguest/lguest_user.c232
-rw-r--r--drivers/lguest/page_tables.c489
-rw-r--r--drivers/lguest/segments.c106
-rw-r--r--drivers/lguest/x86/core.c374
-rw-r--r--drivers/lguest/x86/switcher_32.S22
-rw-r--r--drivers/md/dm-crypt.c2
-rw-r--r--drivers/md/dm-delay.c4
-rw-r--r--drivers/md/dm-linear.c2
-rw-r--r--drivers/md/dm-mpath.c2
-rw-r--r--drivers/md/dm-raid1.c3
-rw-r--r--drivers/md/dm-stripe.c7
-rw-r--r--drivers/md/dm-table.c15
-rw-r--r--drivers/md/dm.c10
-rw-r--r--drivers/md/dm.h1
-rw-r--r--drivers/md/linear.c2
-rw-r--r--drivers/md/md.c144
-rw-r--r--drivers/md/md.h2
-rw-r--r--drivers/md/multipath.c5
-rw-r--r--drivers/md/raid0.c1
-rw-r--r--drivers/md/raid1.c7
-rw-r--r--drivers/md/raid10.c4
-rw-r--r--drivers/md/raid5.c51
-rw-r--r--drivers/media/dvb/b2c2/flexcop-fe-tuner.c67
-rw-r--r--drivers/media/dvb/frontends/af9013.c25
-rw-r--r--drivers/media/video/bt8xx/bttv-cards.c92
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c1
-rw-r--r--drivers/media/video/bt8xx/bttv.h1
-rw-r--r--drivers/media/video/cx23885/cx23885-417.c4
-rw-r--r--drivers/media/video/em28xx/em28xx-cards.c134
-rw-r--r--drivers/media/video/em28xx/em28xx-core.c22
-rw-r--r--drivers/media/video/em28xx/em28xx-dvb.c62
-rw-r--r--drivers/media/video/em28xx/em28xx-video.c16
-rw-r--r--drivers/media/video/em28xx/em28xx.h31
-rw-r--r--drivers/media/video/gspca/Kconfig16
-rw-r--r--drivers/media/video/gspca/Makefile2
-rw-r--r--drivers/media/video/gspca/conex.c2
-rw-r--r--drivers/media/video/gspca/gspca.c73
-rw-r--r--drivers/media/video/gspca/gspca.h9
-rw-r--r--drivers/media/video/gspca/m5602/m5602_s5k4aa.c6
-rw-r--r--drivers/media/video/gspca/mars.c2
-rw-r--r--drivers/media/video/gspca/sn9c20x.c2434
-rw-r--r--drivers/media/video/gspca/sonixj.c4
-rw-r--r--drivers/media/video/gspca/spca500.c2
-rw-r--r--drivers/media/video/gspca/stk014.c2
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c16
-rw-r--r--drivers/media/video/gspca/sunplus.c2
-rw-r--r--drivers/media/video/gspca/zc3xx.c2
-rw-r--r--drivers/media/video/mt9v011.c69
-rw-r--r--drivers/mfd/twl4030-irq.c55
-rw-r--r--drivers/misc/cb710/sgbuf2.c4
-rw-r--r--drivers/misc/eeprom/at25.c4
-rw-r--r--drivers/mmc/host/cb710-mmc.c6
-rw-r--r--drivers/mmc/host/imxmmc.c2
-rw-r--r--drivers/mmc/host/sdhci-of.c10
-rw-r--r--drivers/mmc/host/sdhci.c15
-rw-r--r--drivers/mmc/host/sdhci.h1
-rw-r--r--drivers/mtd/maps/Kconfig7
-rw-r--r--drivers/mtd/maps/Makefile1
-rw-r--r--drivers/mtd/maps/sbc8240.c250
-rw-r--r--drivers/mtd/mtd_blkdevs.c6
-rw-r--r--drivers/mtd/mtdblock.c16
-rw-r--r--drivers/mtd/mtdcore.c7
-rw-r--r--drivers/mtd/onenand/omap2.c3
-rw-r--r--drivers/mtd/ubi/eba.c1
-rw-r--r--drivers/mtd/ubi/scan.c13
-rw-r--r--drivers/net/3c515.c4
-rw-r--r--drivers/net/3c59x.c10
-rw-r--r--drivers/net/Kconfig1
-rw-r--r--drivers/net/arm/at91_ether.c3
-rw-r--r--drivers/net/at1700.c2
-rw-r--r--drivers/net/benet/be_main.c8
-rw-r--r--drivers/net/cnic.c23
-rw-r--r--drivers/net/eepro.c2
-rw-r--r--drivers/net/eexpress.c6
-rw-r--r--drivers/net/ehea/ehea.h2
-rw-r--r--drivers/net/ehea/ehea_main.c3
-rw-r--r--drivers/net/fealnx.c3
-rw-r--r--drivers/net/fs_enet/fs_enet-main.c20
-rw-r--r--drivers/net/gianfar.c24
-rw-r--r--drivers/net/gianfar_ethtool.c10
-rw-r--r--drivers/net/igbvf/vf.c4
-rw-r--r--drivers/net/ixgbe/ixgbe.h3
-rw-r--r--drivers/net/ixgbe/ixgbe_82598.c67
-rw-r--r--drivers/net/ixgbe/ixgbe_dcb_nl.c24
-rw-r--r--drivers/net/ixgbe/ixgbe_ethtool.c11
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c77
-rw-r--r--drivers/net/ixgbe/ixgbe_type.h8
-rw-r--r--drivers/net/mlx4/en_tx.c1
-rw-r--r--drivers/net/netxen/netxen_nic_init.c7
-rw-r--r--drivers/net/netxen/netxen_nic_main.c37
-rw-r--r--drivers/net/pcnet32.c30
-rw-r--r--drivers/net/phy/mdio-gpio.c77
-rw-r--r--drivers/net/ppp_generic.c34
-rw-r--r--drivers/net/pppoe.c1
-rw-r--r--drivers/net/pppol2tp.c1
-rw-r--r--drivers/net/r8169.c13
-rw-r--r--drivers/net/s6gmac.c2
-rw-r--r--drivers/net/skge.c4
-rw-r--r--drivers/net/sky2.c14
-rw-r--r--drivers/net/sky2.h1
-rw-r--r--drivers/net/smc91x.h3
-rw-r--r--drivers/net/tokenring/ibmtr.c2
-rw-r--r--drivers/net/tulip/de4x5.c6
-rw-r--r--drivers/net/ucc_geth.c23
-rw-r--r--drivers/net/wireless/airo.c13
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c3
-rw-r--r--drivers/net/wireless/ath/ath9k/ani.c12
-rw-r--r--drivers/net/wireless/ath/ath9k/eeprom.c4
-rw-r--r--drivers/net/wireless/ath/regd.c17
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c4
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c3
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-debugfs.c12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-dev.h6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.c12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-tx.c17
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c11
-rw-r--r--drivers/net/wireless/iwmc3200wifi/commands.c1
-rw-r--r--drivers/net/wireless/iwmc3200wifi/netdev.c8
-rw-r--r--drivers/net/wireless/libertas/11d.c2
-rw-r--r--drivers/net/wireless/libertas/assoc.c18
-rw-r--r--drivers/net/wireless/libertas/cmd.c8
-rw-r--r--drivers/net/wireless/libertas/defs.h2
-rw-r--r--drivers/net/wireless/libertas/scan.c3
-rw-r--r--drivers/net/wireless/mac80211_hwsim.c6
-rw-r--r--drivers/net/wireless/p54/p54spi.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2500usb.c4
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.c3
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c2
-rw-r--r--drivers/of/of_mdio.c42
-rw-r--r--drivers/parisc/ccio-dma.c1
-rw-r--r--drivers/parisc/dino.c2
-rw-r--r--drivers/parisc/eisa_eeprom.c2
-rw-r--r--drivers/parisc/hppb.c9
-rw-r--r--drivers/parisc/lba_pci.c2
-rw-r--r--drivers/parisc/pdc_stable.c2
-rw-r--r--drivers/pci/hotplug/sgi_hotplug.c7
-rw-r--r--drivers/pci/intel-iommu.c25
-rw-r--r--drivers/pci/setup-res.c4
-rw-r--r--drivers/platform/x86/Kconfig25
-rw-r--r--drivers/platform/x86/acer-wmi.c2
-rw-r--r--drivers/platform/x86/eeepc-laptop.c9
-rw-r--r--drivers/platform/x86/hp-wmi.c12
-rw-r--r--drivers/platform/x86/thinkpad_acpi.c390
-rw-r--r--drivers/power/Kconfig7
-rw-r--r--drivers/power/Makefile1
-rw-r--r--drivers/power/ds2782_battery.c330
-rw-r--r--drivers/power/olpc_battery.c26
-rw-r--r--drivers/rtc/rtc-cmos.c23
-rw-r--r--drivers/s390/crypto/ap_bus.c9
-rw-r--r--drivers/s390/scsi/zfcp_erp.c68
-rw-r--r--drivers/s390/scsi/zfcp_fc.c8
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-rw-r--r--drivers/scsi/qla4xxx/ql4_mbx.c10
-rw-r--r--drivers/scsi/qla4xxx/ql4_os.c40
-rw-r--r--drivers/scsi/qla4xxx/ql4_version.h2
-rw-r--r--drivers/scsi/scsi_transport_iscsi.c4
-rw-r--r--drivers/scsi/sd.c20
-rw-r--r--drivers/serial/atmel_serial.c2
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c2
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-rw-r--r--drivers/staging/Makefile1
-rw-r--r--drivers/staging/android/lowmemorykiller.c8
-rw-r--r--drivers/staging/b3dfg/Kconfig1
-rw-r--r--drivers/staging/heci/Kconfig1
-rw-r--r--drivers/staging/rspiusb/rspiusb.c2
-rw-r--r--drivers/staging/rt2860/rt_linux.h13
-rw-r--r--drivers/staging/rt2870/2870_main_dev.c67
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-rw-r--r--drivers/staging/rt2870/common/rtusb_io.c3
-rw-r--r--drivers/staging/rt2870/rt2870.h9
-rw-r--r--drivers/staging/rtl8192su/ieee80211.h2
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211.h2
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c3
-rw-r--r--drivers/staging/rtl8192su/r8192U_core.c2
-rw-r--r--drivers/staging/serqt_usb2/serqt_usb2.c20
-rw-r--r--drivers/staging/uc2322/Kconfig10
-rw-r--r--drivers/staging/uc2322/Makefile1
-rw-r--r--drivers/staging/uc2322/TODO7
-rw-r--r--drivers/staging/uc2322/aten2011.c2430
-rw-r--r--drivers/staging/udlfb/udlfb.c1
-rw-r--r--drivers/usb/class/cdc-acm.c10
-rw-r--r--drivers/usb/class/cdc-acm.h2
-rw-r--r--drivers/usb/core/config.c48
-rw-r--r--drivers/usb/core/devio.c10
-rw-r--r--drivers/usb/host/ehci-hcd.c3
-rw-r--r--drivers/usb/host/ehci-orion.c2
-rw-r--r--drivers/usb/host/ehci-q.c15
-rw-r--r--drivers/usb/host/ehci-sched.c1
-rw-r--r--drivers/usb/host/ohci-omap.c1
-rw-r--r--drivers/usb/host/xhci-dbg.c199
-rw-r--r--drivers/usb/host/xhci-hcd.c290
-rw-r--r--drivers/usb/host/xhci-mem.c300
-rw-r--r--drivers/usb/host/xhci-pci.c1
-rw-r--r--drivers/usb/host/xhci-ring.c305
-rw-r--r--drivers/usb/host/xhci.h148
-rw-r--r--drivers/usb/misc/Kconfig2
-rw-r--r--drivers/usb/musb/Kconfig1
-rw-r--r--drivers/usb/musb/musb_core.c3
-rw-r--r--drivers/usb/musb/musb_gadget_ep0.c2
-rw-r--r--drivers/usb/musb/musb_regs.h1
-rw-r--r--drivers/usb/serial/cp210x.c3
-rw-r--r--drivers/usb/serial/ftdi_sio.c4
-rw-r--r--drivers/usb/serial/ftdi_sio.h21
-rw-r--r--drivers/usb/serial/mos7840.c9
-rw-r--r--drivers/usb/serial/option.c133
-rw-r--r--drivers/usb/serial/pl2303.c1
-rw-r--r--drivers/usb/serial/pl2303.h4
-rw-r--r--drivers/usb/serial/usb-serial.c36
-rw-r--r--drivers/usb/storage/transport.c2
-rw-r--r--drivers/usb/storage/unusual_devs.h7
-rw-r--r--drivers/video/backlight/jornada720_bl.c2
-rw-r--r--drivers/video/console/fbcon.c6
-rw-r--r--drivers/video/console/fbcon_rotate.h2
-rw-r--r--drivers/video/console/sticore.c9
-rw-r--r--drivers/video/mx3fb.c86
-rw-r--r--drivers/video/s3c-fb.c4
-rw-r--r--drivers/video/via/hw.c4
-rw-r--r--drivers/video/via/lcd.c15
-rw-r--r--drivers/video/via/viafbdev.c101
-rw-r--r--drivers/video/via/viafbdev.h3
-rw-r--r--drivers/virtio/virtio_pci.c240
-rw-r--r--drivers/w1/masters/omap_hdq.c1
-rw-r--r--drivers/watchdog/coh901327_wdt.c11
-rw-r--r--drivers/watchdog/ks8695_wdt.c4
365 files changed, 14428 insertions, 7756 deletions
diff --git a/drivers/acpi/acpi_memhotplug.c b/drivers/acpi/acpi_memhotplug.c
index 7a0f4aa4fa1e..9a62224cc278 100644
--- a/drivers/acpi/acpi_memhotplug.c
+++ b/drivers/acpi/acpi_memhotplug.c
@@ -38,6 +38,9 @@
38 38
39#define _COMPONENT ACPI_MEMORY_DEVICE_COMPONENT 39#define _COMPONENT ACPI_MEMORY_DEVICE_COMPONENT
40 40
41#undef PREFIX
42#define PREFIX "ACPI:memory_hp:"
43
41ACPI_MODULE_NAME("acpi_memhotplug"); 44ACPI_MODULE_NAME("acpi_memhotplug");
42MODULE_AUTHOR("Naveen B S <naveen.b.s@intel.com>"); 45MODULE_AUTHOR("Naveen B S <naveen.b.s@intel.com>");
43MODULE_DESCRIPTION("Hotplug Mem Driver"); 46MODULE_DESCRIPTION("Hotplug Mem Driver");
@@ -153,6 +156,7 @@ acpi_memory_get_device(acpi_handle handle,
153 acpi_handle phandle; 156 acpi_handle phandle;
154 struct acpi_device *device = NULL; 157 struct acpi_device *device = NULL;
155 struct acpi_device *pdevice = NULL; 158 struct acpi_device *pdevice = NULL;
159 int result;
156 160
157 161
158 if (!acpi_bus_get_device(handle, &device) && device) 162 if (!acpi_bus_get_device(handle, &device) && device)
@@ -165,9 +169,9 @@ acpi_memory_get_device(acpi_handle handle,
165 } 169 }
166 170
167 /* Get the parent device */ 171 /* Get the parent device */
168 status = acpi_bus_get_device(phandle, &pdevice); 172 result = acpi_bus_get_device(phandle, &pdevice);
169 if (ACPI_FAILURE(status)) { 173 if (result) {
170 ACPI_EXCEPTION((AE_INFO, status, "Cannot get acpi bus device")); 174 printk(KERN_WARNING PREFIX "Cannot get acpi bus device");
171 return -EINVAL; 175 return -EINVAL;
172 } 176 }
173 177
@@ -175,9 +179,9 @@ acpi_memory_get_device(acpi_handle handle,
175 * Now add the notified device. This creates the acpi_device 179 * Now add the notified device. This creates the acpi_device
176 * and invokes .add function 180 * and invokes .add function
177 */ 181 */
178 status = acpi_bus_add(&device, pdevice, handle, ACPI_BUS_TYPE_DEVICE); 182 result = acpi_bus_add(&device, pdevice, handle, ACPI_BUS_TYPE_DEVICE);
179 if (ACPI_FAILURE(status)) { 183 if (result) {
180 ACPI_EXCEPTION((AE_INFO, status, "Cannot add acpi bus")); 184 printk(KERN_WARNING PREFIX "Cannot add acpi bus");
181 return -EINVAL; 185 return -EINVAL;
182 } 186 }
183 187
@@ -238,7 +242,12 @@ static int acpi_memory_enable_device(struct acpi_memory_device *mem_device)
238 num_enabled++; 242 num_enabled++;
239 continue; 243 continue;
240 } 244 }
241 245 /*
246 * If the memory block size is zero, please ignore it.
247 * Don't try to do the following memory hotplug flowchart.
248 */
249 if (!info->length)
250 continue;
242 if (node < 0) 251 if (node < 0)
243 node = memory_add_physaddr_to_nid(info->start_addr); 252 node = memory_add_physaddr_to_nid(info->start_addr);
244 253
@@ -253,8 +262,15 @@ static int acpi_memory_enable_device(struct acpi_memory_device *mem_device)
253 mem_device->state = MEMORY_INVALID_STATE; 262 mem_device->state = MEMORY_INVALID_STATE;
254 return -EINVAL; 263 return -EINVAL;
255 } 264 }
256 265 /*
257 return result; 266 * Sometimes the memory device will contain several memory blocks.
267 * When one memory block is hot-added to the system memory, it will
268 * be regarded as a success.
269 * Otherwise if the last memory block can't be hot-added to the system
270 * memory, it will be failure and the memory device can't be bound with
271 * driver.
272 */
273 return 0;
258} 274}
259 275
260static int acpi_memory_powerdown_device(struct acpi_memory_device *mem_device) 276static int acpi_memory_powerdown_device(struct acpi_memory_device *mem_device)
diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h
index 544dcf834922..eb6f038b03d9 100644
--- a/drivers/acpi/acpica/acobject.h
+++ b/drivers/acpi/acpica/acobject.h
@@ -97,6 +97,7 @@
97#define AOPOBJ_OBJECT_INITIALIZED 0x08 97#define AOPOBJ_OBJECT_INITIALIZED 0x08
98#define AOPOBJ_SETUP_COMPLETE 0x10 98#define AOPOBJ_SETUP_COMPLETE 0x10
99#define AOPOBJ_SINGLE_DATUM 0x20 99#define AOPOBJ_SINGLE_DATUM 0x20
100#define AOPOBJ_INVALID 0x40 /* Used if host OS won't allow an op_region address */
100 101
101/****************************************************************************** 102/******************************************************************************
102 * 103 *
diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
index 584d766e6f12..b79978f7bc71 100644
--- a/drivers/acpi/acpica/dsopcode.c
+++ b/drivers/acpi/acpica/dsopcode.c
@@ -397,6 +397,30 @@ acpi_status acpi_ds_get_region_arguments(union acpi_operand_object *obj_desc)
397 status = acpi_ds_execute_arguments(node, acpi_ns_get_parent_node(node), 397 status = acpi_ds_execute_arguments(node, acpi_ns_get_parent_node(node),
398 extra_desc->extra.aml_length, 398 extra_desc->extra.aml_length,
399 extra_desc->extra.aml_start); 399 extra_desc->extra.aml_start);
400 if (ACPI_FAILURE(status)) {
401 return_ACPI_STATUS(status);
402 }
403
404 /* Validate the region address/length via the host OS */
405
406 status = acpi_os_validate_address(obj_desc->region.space_id,
407 obj_desc->region.address,
408 (acpi_size) obj_desc->region.length,
409 acpi_ut_get_node_name(node));
410
411 if (ACPI_FAILURE(status)) {
412 /*
413 * Invalid address/length. We will emit an error message and mark
414 * the region as invalid, so that it will cause an additional error if
415 * it is ever used. Then return AE_OK.
416 */
417 ACPI_EXCEPTION((AE_INFO, status,
418 "During address validation of OpRegion [%4.4s]",
419 node->name.ascii));
420 obj_desc->common.flags |= AOPOBJ_INVALID;
421 status = AE_OK;
422 }
423
400 return_ACPI_STATUS(status); 424 return_ACPI_STATUS(status);
401} 425}
402 426
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index d4075b821021..6687be167f5f 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -113,6 +113,12 @@ acpi_ex_setup_region(union acpi_operand_object *obj_desc,
113 } 113 }
114 } 114 }
115 115
116 /* Exit if Address/Length have been disallowed by the host OS */
117
118 if (rgn_desc->common.flags & AOPOBJ_INVALID) {
119 return_ACPI_STATUS(AE_AML_ILLEGAL_ADDRESS);
120 }
121
116 /* 122 /*
117 * Exit now for SMBus address space, it has a non-linear address space 123 * Exit now for SMBus address space, it has a non-linear address space
118 * and the request cannot be directly validated 124 * and the request cannot be directly validated
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index 71670719d61a..5691f165a952 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -189,11 +189,36 @@ acpi_status __init acpi_os_initialize(void)
189 return AE_OK; 189 return AE_OK;
190} 190}
191 191
192static void bind_to_cpu0(struct work_struct *work)
193{
194 set_cpus_allowed(current, cpumask_of_cpu(0));
195 kfree(work);
196}
197
198static void bind_workqueue(struct workqueue_struct *wq)
199{
200 struct work_struct *work;
201
202 work = kzalloc(sizeof(struct work_struct), GFP_KERNEL);
203 INIT_WORK(work, bind_to_cpu0);
204 queue_work(wq, work);
205}
206
192acpi_status acpi_os_initialize1(void) 207acpi_status acpi_os_initialize1(void)
193{ 208{
209 /*
210 * On some machines, a software-initiated SMI causes corruption unless
211 * the SMI runs on CPU 0. An SMI can be initiated by any AML, but
212 * typically it's done in GPE-related methods that are run via
213 * workqueues, so we can avoid the known corruption cases by binding
214 * the workqueues to CPU 0.
215 */
194 kacpid_wq = create_singlethread_workqueue("kacpid"); 216 kacpid_wq = create_singlethread_workqueue("kacpid");
217 bind_workqueue(kacpid_wq);
195 kacpi_notify_wq = create_singlethread_workqueue("kacpi_notify"); 218 kacpi_notify_wq = create_singlethread_workqueue("kacpi_notify");
219 bind_workqueue(kacpi_notify_wq);
196 kacpi_hotplug_wq = create_singlethread_workqueue("kacpi_hotplug"); 220 kacpi_hotplug_wq = create_singlethread_workqueue("kacpi_hotplug");
221 bind_workqueue(kacpi_hotplug_wq);
197 BUG_ON(!kacpid_wq); 222 BUG_ON(!kacpid_wq);
198 BUG_ON(!kacpi_notify_wq); 223 BUG_ON(!kacpi_notify_wq);
199 BUG_ON(!kacpi_hotplug_wq); 224 BUG_ON(!kacpi_hotplug_wq);
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index 01574a066534..42159a28f433 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -397,6 +397,14 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
397 }, 397 },
398 }, 398 },
399 { 399 {
400 .callback = init_set_sci_en_on_resume,
401 .ident = "Hewlett-Packard HP G7000 Notebook PC",
402 .matches = {
403 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
404 DMI_MATCH(DMI_PRODUCT_NAME, "HP G7000 Notebook PC"),
405 },
406 },
407 {
400 .callback = init_old_suspend_ordering, 408 .callback = init_old_suspend_ordering,
401 .ident = "Panasonic CF51-2L", 409 .ident = "Panasonic CF51-2L",
402 .matches = { 410 .matches = {
diff --git a/drivers/acpi/system.c b/drivers/acpi/system.c
index 0944daec064f..9c61ab2177cf 100644
--- a/drivers/acpi/system.c
+++ b/drivers/acpi/system.c
@@ -121,7 +121,7 @@ static void acpi_table_attr_init(struct acpi_table_attr *table_attr,
121 table_attr->attr.size = 0; 121 table_attr->attr.size = 0;
122 table_attr->attr.read = acpi_table_show; 122 table_attr->attr.read = acpi_table_show;
123 table_attr->attr.attr.name = table_attr->name; 123 table_attr->attr.attr.name = table_attr->name;
124 table_attr->attr.attr.mode = 0444; 124 table_attr->attr.attr.mode = 0400;
125 125
126 return; 126 return;
127} 127}
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index 336eb1ed73cc..fe3eba5d6b3e 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -219,6 +219,8 @@ enum {
219 AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */ 219 AHCI_HFLAG_SECT255 = (1 << 8), /* max 255 sectors */
220 AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */ 220 AHCI_HFLAG_YES_NCQ = (1 << 9), /* force NCQ cap on */
221 AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */ 221 AHCI_HFLAG_NO_SUSPEND = (1 << 10), /* don't suspend */
222 AHCI_HFLAG_SRST_TOUT_IS_OFFLINE = (1 << 11), /* treat SRST timeout as
223 link offline */
222 224
223 /* ap->flags bits */ 225 /* ap->flags bits */
224 226
@@ -515,10 +517,14 @@ static const struct pci_device_id ahci_pci_tbl[] = {
515 { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */ 517 { PCI_VDEVICE(INTEL, 0x3a05), board_ahci }, /* ICH10 */
516 { PCI_VDEVICE(INTEL, 0x3a22), board_ahci }, /* ICH10 */ 518 { PCI_VDEVICE(INTEL, 0x3a22), board_ahci }, /* ICH10 */
517 { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */ 519 { PCI_VDEVICE(INTEL, 0x3a25), board_ahci }, /* ICH10 */
520 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */
521 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
518 { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */ 522 { PCI_VDEVICE(INTEL, 0x3b24), board_ahci }, /* PCH RAID */
519 { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */ 523 { PCI_VDEVICE(INTEL, 0x3b25), board_ahci }, /* PCH RAID */
524 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci }, /* PCH AHCI */
520 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */ 525 { PCI_VDEVICE(INTEL, 0x3b2b), board_ahci }, /* PCH RAID */
521 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */ 526 { PCI_VDEVICE(INTEL, 0x3b2c), board_ahci }, /* PCH RAID */
527 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
522 528
523 /* JMicron 360/1/3/5/6, match class to avoid IDE function */ 529 /* JMicron 360/1/3/5/6, match class to avoid IDE function */
524 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 530 { PCI_VENDOR_ID_JMICRON, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
@@ -1659,6 +1665,7 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
1659 int (*check_ready)(struct ata_link *link)) 1665 int (*check_ready)(struct ata_link *link))
1660{ 1666{
1661 struct ata_port *ap = link->ap; 1667 struct ata_port *ap = link->ap;
1668 struct ahci_host_priv *hpriv = ap->host->private_data;
1662 const char *reason = NULL; 1669 const char *reason = NULL;
1663 unsigned long now, msecs; 1670 unsigned long now, msecs;
1664 struct ata_taskfile tf; 1671 struct ata_taskfile tf;
@@ -1697,12 +1704,21 @@ static int ahci_do_softreset(struct ata_link *link, unsigned int *class,
1697 1704
1698 /* wait for link to become ready */ 1705 /* wait for link to become ready */
1699 rc = ata_wait_after_reset(link, deadline, check_ready); 1706 rc = ata_wait_after_reset(link, deadline, check_ready);
1700 /* link occupied, -ENODEV too is an error */ 1707 if (rc == -EBUSY && hpriv->flags & AHCI_HFLAG_SRST_TOUT_IS_OFFLINE) {
1701 if (rc) { 1708 /*
1709 * Workaround for cases where link online status can't
1710 * be trusted. Treat device readiness timeout as link
1711 * offline.
1712 */
1713 ata_link_printk(link, KERN_INFO,
1714 "device not ready, treating as offline\n");
1715 *class = ATA_DEV_NONE;
1716 } else if (rc) {
1717 /* link occupied, -ENODEV too is an error */
1702 reason = "device not ready"; 1718 reason = "device not ready";
1703 goto fail; 1719 goto fail;
1704 } 1720 } else
1705 *class = ahci_dev_classify(ap); 1721 *class = ahci_dev_classify(ap);
1706 1722
1707 DPRINTK("EXIT, class=%u\n", *class); 1723 DPRINTK("EXIT, class=%u\n", *class);
1708 return 0; 1724 return 0;
@@ -1769,7 +1785,8 @@ static int ahci_sb600_softreset(struct ata_link *link, unsigned int *class,
1769 irq_sts = readl(port_mmio + PORT_IRQ_STAT); 1785 irq_sts = readl(port_mmio + PORT_IRQ_STAT);
1770 if (irq_sts & PORT_IRQ_BAD_PMP) { 1786 if (irq_sts & PORT_IRQ_BAD_PMP) {
1771 ata_link_printk(link, KERN_WARNING, 1787 ata_link_printk(link, KERN_WARNING,
1772 "failed due to HW bug, retry pmp=0\n"); 1788 "applying SB600 PMP SRST workaround "
1789 "and retrying\n");
1773 rc = ahci_do_softreset(link, class, 0, deadline, 1790 rc = ahci_do_softreset(link, class, 0, deadline,
1774 ahci_check_ready); 1791 ahci_check_ready);
1775 } 1792 }
@@ -2722,6 +2739,56 @@ static bool ahci_broken_suspend(struct pci_dev *pdev)
2722 return !ver || strcmp(ver, dmi->driver_data) < 0; 2739 return !ver || strcmp(ver, dmi->driver_data) < 0;
2723} 2740}
2724 2741
2742static bool ahci_broken_online(struct pci_dev *pdev)
2743{
2744#define ENCODE_BUSDEVFN(bus, slot, func) \
2745 (void *)(unsigned long)(((bus) << 8) | PCI_DEVFN((slot), (func)))
2746 static const struct dmi_system_id sysids[] = {
2747 /*
2748 * There are several gigabyte boards which use
2749 * SIMG5723s configured as hardware RAID. Certain
2750 * 5723 firmware revisions shipped there keep the link
2751 * online but fail to answer properly to SRST or
2752 * IDENTIFY when no device is attached downstream
2753 * causing libata to retry quite a few times leading
2754 * to excessive detection delay.
2755 *
2756 * As these firmwares respond to the second reset try
2757 * with invalid device signature, considering unknown
2758 * sig as offline works around the problem acceptably.
2759 */
2760 {
2761 .ident = "EP45-DQ6",
2762 .matches = {
2763 DMI_MATCH(DMI_BOARD_VENDOR,
2764 "Gigabyte Technology Co., Ltd."),
2765 DMI_MATCH(DMI_BOARD_NAME, "EP45-DQ6"),
2766 },
2767 .driver_data = ENCODE_BUSDEVFN(0x0a, 0x00, 0),
2768 },
2769 {
2770 .ident = "EP45-DS5",
2771 .matches = {
2772 DMI_MATCH(DMI_BOARD_VENDOR,
2773 "Gigabyte Technology Co., Ltd."),
2774 DMI_MATCH(DMI_BOARD_NAME, "EP45-DS5"),
2775 },
2776 .driver_data = ENCODE_BUSDEVFN(0x03, 0x00, 0),
2777 },
2778 { } /* terminate list */
2779 };
2780#undef ENCODE_BUSDEVFN
2781 const struct dmi_system_id *dmi = dmi_first_match(sysids);
2782 unsigned int val;
2783
2784 if (!dmi)
2785 return false;
2786
2787 val = (unsigned long)dmi->driver_data;
2788
2789 return pdev->bus->number == (val >> 8) && pdev->devfn == (val & 0xff);
2790}
2791
2725static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 2792static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2726{ 2793{
2727 static int printed_version; 2794 static int printed_version;
@@ -2837,6 +2904,12 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2837 "BIOS update required for suspend/resume\n"); 2904 "BIOS update required for suspend/resume\n");
2838 } 2905 }
2839 2906
2907 if (ahci_broken_online(pdev)) {
2908 hpriv->flags |= AHCI_HFLAG_SRST_TOUT_IS_OFFLINE;
2909 dev_info(&pdev->dev,
2910 "online status unreliable, applying workaround\n");
2911 }
2912
2840 /* CAP.NP sometimes indicate the index of the last enabled 2913 /* CAP.NP sometimes indicate the index of the last enabled
2841 * port, at other times, that of the last possible port, so 2914 * port, at other times, that of the last possible port, so
2842 * determining the maximum port number requires looking at 2915 * determining the maximum port number requires looking at
diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index d0a14cf2bd74..56b8a3ff1286 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -596,9 +596,12 @@ static const struct ich_laptop ich_laptop[] = {
596 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */ 596 { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
597 { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */ 597 { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
598 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */ 598 { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
599 { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
599 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */ 600 { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
600 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */ 601 { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
602 { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unkown HP */
601 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */ 603 { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
604 { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
602 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */ 605 { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */
603 { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */ 606 { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
604 { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */ 607 { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 2c6aedaef718..072ba5ea138f 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -1515,6 +1515,7 @@ static int ata_hpa_resize(struct ata_device *dev)
1515 1515
1516 return rc; 1516 return rc;
1517 } 1517 }
1518 dev->n_native_sectors = native_sectors;
1518 1519
1519 /* nothing to do? */ 1520 /* nothing to do? */
1520 if (native_sectors <= sectors || !ata_ignore_hpa) { 1521 if (native_sectors <= sectors || !ata_ignore_hpa) {
@@ -4099,6 +4100,7 @@ int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4099 unsigned int readid_flags) 4100 unsigned int readid_flags)
4100{ 4101{
4101 u64 n_sectors = dev->n_sectors; 4102 u64 n_sectors = dev->n_sectors;
4103 u64 n_native_sectors = dev->n_native_sectors;
4102 int rc; 4104 int rc;
4103 4105
4104 if (!ata_dev_enabled(dev)) 4106 if (!ata_dev_enabled(dev))
@@ -4128,16 +4130,30 @@ int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4128 /* verify n_sectors hasn't changed */ 4130 /* verify n_sectors hasn't changed */
4129 if (dev->class == ATA_DEV_ATA && n_sectors && 4131 if (dev->class == ATA_DEV_ATA && n_sectors &&
4130 dev->n_sectors != n_sectors) { 4132 dev->n_sectors != n_sectors) {
4131 ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch " 4133 ata_dev_printk(dev, KERN_WARNING, "n_sectors mismatch "
4132 "%llu != %llu\n", 4134 "%llu != %llu\n",
4133 (unsigned long long)n_sectors, 4135 (unsigned long long)n_sectors,
4134 (unsigned long long)dev->n_sectors); 4136 (unsigned long long)dev->n_sectors);
4135 4137 /*
4136 /* restore original n_sectors */ 4138 * Something could have caused HPA to be unlocked
4137 dev->n_sectors = n_sectors; 4139 * involuntarily. If n_native_sectors hasn't changed
4138 4140 * and the new size matches it, keep the device.
4139 rc = -ENODEV; 4141 */
4140 goto fail; 4142 if (dev->n_native_sectors == n_native_sectors &&
4143 dev->n_sectors > n_sectors &&
4144 dev->n_sectors == n_native_sectors) {
4145 ata_dev_printk(dev, KERN_WARNING,
4146 "new n_sectors matches native, probably "
4147 "late HPA unlock, continuing\n");
4148 /* keep using the old n_sectors */
4149 dev->n_sectors = n_sectors;
4150 } else {
4151 /* restore original n_[native]_sectors and fail */
4152 dev->n_native_sectors = n_native_sectors;
4153 dev->n_sectors = n_sectors;
4154 rc = -ENODEV;
4155 goto fail;
4156 }
4141 } 4157 }
4142 4158
4143 return 0; 4159 return 0;
@@ -4286,6 +4302,9 @@ static const struct ata_blacklist_entry ata_device_blacklist [] = {
4286 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA }, 4302 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4287 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA }, 4303 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
4288 4304
4305 /* this one allows HPA unlocking but fails IOs on the area */
4306 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4307
4289 /* Devices which report 1 sector over size HPA */ 4308 /* Devices which report 1 sector over size HPA */
4290 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4309 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4291 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, }, 4310 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 1a07c061f644..79711b64054b 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2327,7 +2327,7 @@ int ata_eh_reset(struct ata_link *link, int classify,
2327 struct ata_port *ap = link->ap; 2327 struct ata_port *ap = link->ap;
2328 struct ata_link *slave = ap->slave_link; 2328 struct ata_link *slave = ap->slave_link;
2329 struct ata_eh_context *ehc = &link->eh_context; 2329 struct ata_eh_context *ehc = &link->eh_context;
2330 struct ata_eh_context *sehc = &slave->eh_context; 2330 struct ata_eh_context *sehc = slave ? &slave->eh_context : NULL;
2331 unsigned int *classes = ehc->classes; 2331 unsigned int *classes = ehc->classes;
2332 unsigned int lflags = link->flags; 2332 unsigned int lflags = link->flags;
2333 int verbose = !(ehc->i.flags & ATA_EHI_QUIET); 2333 int verbose = !(ehc->i.flags & ATA_EHI_QUIET);
diff --git a/drivers/ata/pata_at91.c b/drivers/ata/pata_at91.c
index 8561a9f195c1..41c94b1ae493 100644
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -26,9 +26,7 @@
26#include <linux/platform_device.h> 26#include <linux/platform_device.h>
27#include <linux/ata_platform.h> 27#include <linux/ata_platform.h>
28 28
29#include <mach/at91sam9260_matrix.h>
30#include <mach/at91sam9_smc.h> 29#include <mach/at91sam9_smc.h>
31#include <mach/at91sam9260.h>
32#include <mach/board.h> 30#include <mach/board.h>
33#include <mach/gpio.h> 31#include <mach/gpio.h>
34 32
@@ -44,65 +42,62 @@ struct at91_ide_info {
44 unsigned long mode; 42 unsigned long mode;
45 unsigned int cs; 43 unsigned int cs;
46 44
45 struct clk *mck;
46
47 void __iomem *ide_addr; 47 void __iomem *ide_addr;
48 void __iomem *alt_addr; 48 void __iomem *alt_addr;
49}; 49};
50 50
51const struct ata_timing initial_timing = 51static const struct ata_timing initial_timing =
52 {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0}; 52 {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
53 53
54static unsigned int calc_mck_cycles(unsigned int ns, unsigned int mck_hz) 54static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
55{ 55{
56 unsigned long mul; 56 unsigned long mul;
57 57
58 /* 58 /*
59 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] = 59 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
60 * x * (f / 1_000_000_000) = 60 * x * (f / 1_000_000_000) =
61 * x * ((f * 65536) / 1_000_000_000) / 65536 = 61 * x * ((f * 65536) / 1_000_000_000) / 65536 =
62 * x * (((f / 10_000) * 65536) / 100_000) / 65536 = 62 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
63 */ 63 */
64 64
65 mul = (mck_hz / 10000) << 16; 65 mul = (mck_hz / 10000) << 16;
66 mul /= 100000; 66 mul /= 100000;
67 67
68 return (ns * mul + 65536) >> 16; /* rounding */ 68 return (ns * mul + 65536) >> 16; /* rounding */
69} 69}
70 70
71static void set_smc_mode(struct at91_ide_info *info) 71static void set_smc_mode(struct at91_ide_info *info)
72{ 72{
73 at91_sys_write(AT91_SMC_MODE(info->cs), info->mode); 73 at91_sys_write(AT91_SMC_MODE(info->cs), info->mode);
74 return; 74 return;
75} 75}
76 76
77static void set_smc_timing(struct device *dev, 77static void set_smc_timing(struct device *dev,
78 struct at91_ide_info *info, const struct ata_timing *ata) 78 struct at91_ide_info *info, const struct ata_timing *ata)
79{ 79{
80 int read_cycle, write_cycle, active, recover; 80 unsigned long read_cycle, write_cycle, active, recover;
81 int nrd_setup, nrd_pulse, nrd_recover; 81 unsigned long nrd_setup, nrd_pulse, nrd_recover;
82 int nwe_setup, nwe_pulse; 82 unsigned long nwe_setup, nwe_pulse;
83 83
84 int ncs_write_setup, ncs_write_pulse; 84 unsigned long ncs_write_setup, ncs_write_pulse;
85 int ncs_read_setup, ncs_read_pulse; 85 unsigned long ncs_read_setup, ncs_read_pulse;
86 86
87 unsigned int mck_hz; 87 unsigned long mck_hz;
88 struct clk *mck;
89 88
90 read_cycle = ata->cyc8b; 89 read_cycle = ata->cyc8b;
91 nrd_setup = ata->setup; 90 nrd_setup = ata->setup;
92 nrd_pulse = ata->act8b; 91 nrd_pulse = ata->act8b;
93 nrd_recover = ata->rec8b; 92 nrd_recover = ata->rec8b;
94 93
95 mck = clk_get(NULL, "mck"); 94 mck_hz = clk_get_rate(info->mck);
96 BUG_ON(IS_ERR(mck));
97 mck_hz = clk_get_rate(mck);
98 95
99 read_cycle = calc_mck_cycles(read_cycle, mck_hz); 96 read_cycle = calc_mck_cycles(read_cycle, mck_hz);
100 nrd_setup = calc_mck_cycles(nrd_setup, mck_hz); 97 nrd_setup = calc_mck_cycles(nrd_setup, mck_hz);
101 nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz); 98 nrd_pulse = calc_mck_cycles(nrd_pulse, mck_hz);
102 nrd_recover = calc_mck_cycles(nrd_recover, mck_hz); 99 nrd_recover = calc_mck_cycles(nrd_recover, mck_hz);
103 100
104 clk_put(mck);
105
106 active = nrd_setup + nrd_pulse; 101 active = nrd_setup + nrd_pulse;
107 recover = read_cycle - active; 102 recover = read_cycle - active;
108 103
@@ -121,13 +116,13 @@ static void set_smc_timing(struct device *dev,
121 ncs_write_setup = ncs_read_setup; 116 ncs_write_setup = ncs_read_setup;
122 ncs_write_pulse = ncs_read_pulse; 117 ncs_write_pulse = ncs_read_pulse;
123 118
124 dev_dbg(dev, "ATA timings: nrd_setup = %d nrd_pulse = %d nrd_cycle = %d\n", 119 dev_dbg(dev, "ATA timings: nrd_setup = %lu nrd_pulse = %lu nrd_cycle = %lu\n",
125 nrd_setup, nrd_pulse, read_cycle); 120 nrd_setup, nrd_pulse, read_cycle);
126 dev_dbg(dev, "ATA timings: nwe_setup = %d nwe_pulse = %d nwe_cycle = %d\n", 121 dev_dbg(dev, "ATA timings: nwe_setup = %lu nwe_pulse = %lu nwe_cycle = %lu\n",
127 nwe_setup, nwe_pulse, write_cycle); 122 nwe_setup, nwe_pulse, write_cycle);
128 dev_dbg(dev, "ATA timings: ncs_read_setup = %d ncs_read_pulse = %d\n", 123 dev_dbg(dev, "ATA timings: ncs_read_setup = %lu ncs_read_pulse = %lu\n",
129 ncs_read_setup, ncs_read_pulse); 124 ncs_read_setup, ncs_read_pulse);
130 dev_dbg(dev, "ATA timings: ncs_write_setup = %d ncs_write_pulse = %d\n", 125 dev_dbg(dev, "ATA timings: ncs_write_setup = %lu ncs_write_pulse = %lu\n",
131 ncs_write_setup, ncs_write_pulse); 126 ncs_write_setup, ncs_write_pulse);
132 127
133 at91_sys_write(AT91_SMC_SETUP(info->cs), 128 at91_sys_write(AT91_SMC_SETUP(info->cs),
@@ -217,6 +212,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
217 struct resource *mem_res; 212 struct resource *mem_res;
218 struct ata_host *host; 213 struct ata_host *host;
219 struct ata_port *ap; 214 struct ata_port *ap;
215
220 int irq_flags = 0; 216 int irq_flags = 0;
221 int irq = 0; 217 int irq = 0;
222 int ret; 218 int ret;
@@ -254,13 +250,20 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
254 ata_port_desc(ap, "no IRQ, using PIO polling"); 250 ata_port_desc(ap, "no IRQ, using PIO polling");
255 } 251 }
256 252
257 info = kzalloc(sizeof(*info), GFP_KERNEL); 253 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
258 254
259 if (!info) { 255 if (!info) {
260 dev_err(dev, "failed to allocate memory for private data\n"); 256 dev_err(dev, "failed to allocate memory for private data\n");
261 return -ENOMEM; 257 return -ENOMEM;
262 } 258 }
263 259
260 info->mck = clk_get(NULL, "mck");
261
262 if (IS_ERR(info->mck)) {
263 dev_err(dev, "failed to get access to mck clock\n");
264 return -ENODEV;
265 }
266
264 info->cs = board->chipselect; 267 info->cs = board->chipselect;
265 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | 268 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
266 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT | 269 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
@@ -272,7 +275,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
272 if (!info->ide_addr) { 275 if (!info->ide_addr) {
273 dev_err(dev, "failed to map IO base\n"); 276 dev_err(dev, "failed to map IO base\n");
274 ret = -ENOMEM; 277 ret = -ENOMEM;
275 goto err_ide_ioremap; 278 goto err_put;
276 } 279 }
277 280
278 info->alt_addr = devm_ioremap(dev, 281 info->alt_addr = devm_ioremap(dev,
@@ -281,7 +284,7 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
281 if (!info->alt_addr) { 284 if (!info->alt_addr) {
282 dev_err(dev, "failed to map CTL base\n"); 285 dev_err(dev, "failed to map CTL base\n");
283 ret = -ENOMEM; 286 ret = -ENOMEM;
284 goto err_alt_ioremap; 287 goto err_put;
285 } 288 }
286 289
287 ap->ioaddr.cmd_addr = info->ide_addr; 290 ap->ioaddr.cmd_addr = info->ide_addr;
@@ -300,12 +303,8 @@ static int __devinit pata_at91_probe(struct platform_device *pdev)
300 irq ? ata_sff_interrupt : NULL, 303 irq ? ata_sff_interrupt : NULL,
301 irq_flags, &pata_at91_sht); 304 irq_flags, &pata_at91_sht);
302 305
303err_alt_ioremap: 306err_put:
304 devm_iounmap(dev, info->ide_addr); 307 clk_put(info->mck);
305
306err_ide_ioremap:
307 kfree(info);
308
309 return ret; 308 return ret;
310} 309}
311 310
@@ -313,7 +312,6 @@ static int __devexit pata_at91_remove(struct platform_device *pdev)
313{ 312{
314 struct ata_host *host = dev_get_drvdata(&pdev->dev); 313 struct ata_host *host = dev_get_drvdata(&pdev->dev);
315 struct at91_ide_info *info; 314 struct at91_ide_info *info;
316 struct device *dev = &pdev->dev;
317 315
318 if (!host) 316 if (!host)
319 return 0; 317 return 0;
@@ -324,10 +322,8 @@ static int __devexit pata_at91_remove(struct platform_device *pdev)
324 if (!info) 322 if (!info)
325 return 0; 323 return 0;
326 324
327 devm_iounmap(dev, info->ide_addr); 325 clk_put(info->mck);
328 devm_iounmap(dev, info->alt_addr);
329 326
330 kfree(info);
331 return 0; 327 return 0;
332} 328}
333 329
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index bec0b8ade66d..45915566e4e9 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -1,6 +1,7 @@
1/* 1/*
2 * pata_atiixp.c - ATI PATA for new ATA layer 2 * pata_atiixp.c - ATI PATA for new ATA layer
3 * (C) 2005 Red Hat Inc 3 * (C) 2005 Red Hat Inc
4 * (C) 2009 Bartlomiej Zolnierkiewicz
4 * 5 *
5 * Based on 6 * Based on
6 * 7 *
@@ -61,20 +62,19 @@ static void atiixp_set_pio_timing(struct ata_port *ap, struct ata_device *adev,
61 62
62 struct pci_dev *pdev = to_pci_dev(ap->host->dev); 63 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
63 int dn = 2 * ap->port_no + adev->devno; 64 int dn = 2 * ap->port_no + adev->devno;
64
65 /* Check this is correct - the order is odd in both drivers */
66 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1); 65 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
67 u16 pio_mode_data, pio_timing_data; 66 u32 pio_timing_data;
67 u16 pio_mode_data;
68 68
69 pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data); 69 pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
70 pio_mode_data &= ~(0x7 << (4 * dn)); 70 pio_mode_data &= ~(0x7 << (4 * dn));
71 pio_mode_data |= pio << (4 * dn); 71 pio_mode_data |= pio << (4 * dn);
72 pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data); 72 pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
73 73
74 pci_read_config_word(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data); 74 pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
75 pio_timing_data &= ~(0xFF << timing_shift); 75 pio_timing_data &= ~(0xFF << timing_shift);
76 pio_timing_data |= (pio_timings[pio] << timing_shift); 76 pio_timing_data |= (pio_timings[pio] << timing_shift);
77 pci_write_config_word(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data); 77 pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
78} 78}
79 79
80/** 80/**
@@ -119,16 +119,17 @@ static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
119 udma_mode_data |= dma << (4 * dn); 119 udma_mode_data |= dma << (4 * dn);
120 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data); 120 pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
121 } else { 121 } else {
122 u16 mwdma_timing_data;
123 /* Check this is correct - the order is odd in both drivers */
124 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1); 122 int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
123 u32 mwdma_timing_data;
125 124
126 dma -= XFER_MW_DMA_0; 125 dma -= XFER_MW_DMA_0;
127 126
128 pci_read_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, &mwdma_timing_data); 127 pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
128 &mwdma_timing_data);
129 mwdma_timing_data &= ~(0xFF << timing_shift); 129 mwdma_timing_data &= ~(0xFF << timing_shift);
130 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift); 130 mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
131 pci_write_config_word(pdev, ATIIXP_IDE_MWDMA_TIMING, mwdma_timing_data); 131 pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
132 mwdma_timing_data);
132 } 133 }
133 /* 134 /*
134 * We must now look at the PIO mode situation. We may need to 135 * We must now look at the PIO mode situation. We may need to
diff --git a/drivers/ata/pata_octeon_cf.c b/drivers/ata/pata_octeon_cf.c
index 8d9343accf3c..abdd19fe990a 100644
--- a/drivers/ata/pata_octeon_cf.c
+++ b/drivers/ata/pata_octeon_cf.c
@@ -653,7 +653,8 @@ static irqreturn_t octeon_cf_interrupt(int irq, void *dev_instance)
653 653
654 ap = host->ports[i]; 654 ap = host->ports[i];
655 ocd = ap->dev->platform_data; 655 ocd = ap->dev->platform_data;
656 if (!ap || (ap->flags & ATA_FLAG_DISABLED)) 656
657 if (ap->flags & ATA_FLAG_DISABLED)
657 continue; 658 continue;
658 659
659 ocd = ap->dev->platform_data; 660 ocd = ap->dev->platform_data;
diff --git a/drivers/ata/pata_pcmcia.c b/drivers/ata/pata_pcmcia.c
index f4d009ed50ac..dc99e26f8e5b 100644
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -411,6 +411,7 @@ static struct pcmcia_device_id pcmcia_devices[] = {
411 PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9), 411 PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9),
412 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591), 412 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591),
413 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728), 413 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728),
414 PCMCIA_DEVICE_PROD_ID12("CNF ", "CD-ROM", 0x46d7db81, 0x66536591),
414 PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591), 415 PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591),
415 PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4), 416 PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4),
416 PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde), 417 PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde),
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 23714aefb825..c19417e02208 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -2514,7 +2514,7 @@ static void mv_unexpected_intr(struct ata_port *ap, int edma_was_enabled)
2514 char *when = "idle"; 2514 char *when = "idle";
2515 2515
2516 ata_ehi_clear_desc(ehi); 2516 ata_ehi_clear_desc(ehi);
2517 if (!ap || (ap->flags & ATA_FLAG_DISABLED)) { 2517 if (ap->flags & ATA_FLAG_DISABLED) {
2518 when = "disabled"; 2518 when = "disabled";
2519 } else if (edma_was_enabled) { 2519 } else if (edma_was_enabled) {
2520 when = "EDMA enabled"; 2520 when = "EDMA enabled";
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index b2d11f300c39..86a40582999c 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -602,6 +602,7 @@ MODULE_VERSION(DRV_VERSION);
602 602
603static int adma_enabled; 603static int adma_enabled;
604static int swncq_enabled = 1; 604static int swncq_enabled = 1;
605static int msi_enabled;
605 606
606static void nv_adma_register_mode(struct ata_port *ap) 607static void nv_adma_register_mode(struct ata_port *ap)
607{ 608{
@@ -2459,6 +2460,11 @@ static int nv_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2459 } else if (type == SWNCQ) 2460 } else if (type == SWNCQ)
2460 nv_swncq_host_init(host); 2461 nv_swncq_host_init(host);
2461 2462
2463 if (msi_enabled) {
2464 dev_printk(KERN_NOTICE, &pdev->dev, "Using MSI\n");
2465 pci_enable_msi(pdev);
2466 }
2467
2462 pci_set_master(pdev); 2468 pci_set_master(pdev);
2463 return ata_host_activate(host, pdev->irq, ipriv->irq_handler, 2469 return ata_host_activate(host, pdev->irq, ipriv->irq_handler,
2464 IRQF_SHARED, ipriv->sht); 2470 IRQF_SHARED, ipriv->sht);
@@ -2558,4 +2564,6 @@ module_param_named(adma, adma_enabled, bool, 0444);
2558MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: false)"); 2564MODULE_PARM_DESC(adma, "Enable use of ADMA (Default: false)");
2559module_param_named(swncq, swncq_enabled, bool, 0444); 2565module_param_named(swncq, swncq_enabled, bool, 0444);
2560MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)"); 2566MODULE_PARM_DESC(swncq, "Enable use of SWNCQ (Default: true)");
2567module_param_named(msi, msi_enabled, bool, 0444);
2568MODULE_PARM_DESC(msi, "Enable use of MSI (Default: false)");
2561 2569
diff --git a/drivers/ata/sata_sil.c b/drivers/ata/sata_sil.c
index 030ec079b184..35bd5cc7f285 100644
--- a/drivers/ata/sata_sil.c
+++ b/drivers/ata/sata_sil.c
@@ -532,7 +532,7 @@ static irqreturn_t sil_interrupt(int irq, void *dev_instance)
532 struct ata_port *ap = host->ports[i]; 532 struct ata_port *ap = host->ports[i];
533 u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2); 533 u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2);
534 534
535 if (unlikely(!ap || ap->flags & ATA_FLAG_DISABLED)) 535 if (unlikely(ap->flags & ATA_FLAG_DISABLED))
536 continue; 536 continue;
537 537
538 /* turn off SATA_IRQ if not supported */ 538 /* turn off SATA_IRQ if not supported */
diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c
index f285f441fab9..7376367bcb80 100644
--- a/drivers/base/firmware_class.c
+++ b/drivers/base/firmware_class.c
@@ -180,7 +180,6 @@ static ssize_t firmware_loading_store(struct device *dev,
180 goto err; 180 goto err;
181 } 181 }
182 /* Pages will be freed by vfree() */ 182 /* Pages will be freed by vfree() */
183 fw_priv->pages = NULL;
184 fw_priv->page_array_size = 0; 183 fw_priv->page_array_size = 0;
185 fw_priv->nr_pages = 0; 184 fw_priv->nr_pages = 0;
186 complete(&fw_priv->completion); 185 complete(&fw_priv->completion);
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index 81cb01bfc356..456594bd97bc 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -483,9 +483,6 @@ int platform_driver_register(struct platform_driver *drv)
483 drv->driver.remove = platform_drv_remove; 483 drv->driver.remove = platform_drv_remove;
484 if (drv->shutdown) 484 if (drv->shutdown)
485 drv->driver.shutdown = platform_drv_shutdown; 485 drv->driver.shutdown = platform_drv_shutdown;
486 if (drv->suspend || drv->resume)
487 pr_warning("Platform driver '%s' needs updating - please use "
488 "dev_pm_ops\n", drv->driver.name);
489 486
490 return driver_register(&drv->driver); 487 return driver_register(&drv->driver);
491} 488}
diff --git a/drivers/base/sys.c b/drivers/base/sys.c
index 79a9ae5238ac..0d903909af7e 100644
--- a/drivers/base/sys.c
+++ b/drivers/base/sys.c
@@ -275,9 +275,9 @@ int sysdev_register(struct sys_device *sysdev)
275 drv->add(sysdev); 275 drv->add(sysdev);
276 } 276 }
277 mutex_unlock(&sysdev_drivers_lock); 277 mutex_unlock(&sysdev_drivers_lock);
278 kobject_uevent(&sysdev->kobj, KOBJ_ADD);
278 } 279 }
279 280
280 kobject_uevent(&sysdev->kobj, KOBJ_ADD);
281 return error; 281 return error;
282} 282}
283 283
diff --git a/drivers/block/mg_disk.c b/drivers/block/mg_disk.c
index f703f5478246..6d7fbaa92248 100644
--- a/drivers/block/mg_disk.c
+++ b/drivers/block/mg_disk.c
@@ -36,7 +36,6 @@
36 36
37/* Register offsets */ 37/* Register offsets */
38#define MG_BUFF_OFFSET 0x8000 38#define MG_BUFF_OFFSET 0x8000
39#define MG_STORAGE_BUFFER_SIZE 0x200
40#define MG_REG_OFFSET 0xC000 39#define MG_REG_OFFSET 0xC000
41#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */ 40#define MG_REG_FEATURE (MG_REG_OFFSET + 2) /* write case */
42#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */ 41#define MG_REG_ERROR (MG_REG_OFFSET + 2) /* read case */
@@ -219,6 +218,16 @@ static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
219 host->error = MG_ERR_NONE; 218 host->error = MG_ERR_NONE;
220 expire = jiffies + msecs_to_jiffies(msec); 219 expire = jiffies + msecs_to_jiffies(msec);
221 220
221 /* These 2 times dummy status read prevents reading invalid
222 * status. A very little time (3 times of mflash operating clk)
223 * is required for busy bit is set. Use dummy read instead of
224 * busy wait, because mflash's PLL is machine dependent.
225 */
226 if (prv_data->use_polling) {
227 status = inb((unsigned long)host->dev_base + MG_REG_STATUS);
228 status = inb((unsigned long)host->dev_base + MG_REG_STATUS);
229 }
230
222 status = inb((unsigned long)host->dev_base + MG_REG_STATUS); 231 status = inb((unsigned long)host->dev_base + MG_REG_STATUS);
223 232
224 do { 233 do {
@@ -245,8 +254,6 @@ static unsigned int mg_wait(struct mg_host *host, u32 expect, u32 msec)
245 mg_dump_status("not ready", status, host); 254 mg_dump_status("not ready", status, host);
246 return MG_ERR_INV_STAT; 255 return MG_ERR_INV_STAT;
247 } 256 }
248 if (prv_data->use_polling)
249 msleep(1);
250 257
251 status = inb((unsigned long)host->dev_base + MG_REG_STATUS); 258 status = inb((unsigned long)host->dev_base + MG_REG_STATUS);
252 } while (time_before(cur_jiffies, expire)); 259 } while (time_before(cur_jiffies, expire));
@@ -469,9 +476,18 @@ static unsigned int mg_out(struct mg_host *host,
469 return MG_ERR_NONE; 476 return MG_ERR_NONE;
470} 477}
471 478
479static void mg_read_one(struct mg_host *host, struct request *req)
480{
481 u16 *buff = (u16 *)req->buffer;
482 u32 i;
483
484 for (i = 0; i < MG_SECTOR_SIZE >> 1; i++)
485 *buff++ = inw((unsigned long)host->dev_base + MG_BUFF_OFFSET +
486 (i << 1));
487}
488
472static void mg_read(struct request *req) 489static void mg_read(struct request *req)
473{ 490{
474 u32 j;
475 struct mg_host *host = req->rq_disk->private_data; 491 struct mg_host *host = req->rq_disk->private_data;
476 492
477 if (mg_out(host, blk_rq_pos(req), blk_rq_sectors(req), 493 if (mg_out(host, blk_rq_pos(req), blk_rq_sectors(req),
@@ -482,49 +498,65 @@ static void mg_read(struct request *req)
482 blk_rq_sectors(req), blk_rq_pos(req), req->buffer); 498 blk_rq_sectors(req), blk_rq_pos(req), req->buffer);
483 499
484 do { 500 do {
485 u16 *buff = (u16 *)req->buffer;
486
487 if (mg_wait(host, ATA_DRQ, 501 if (mg_wait(host, ATA_DRQ,
488 MG_TMAX_WAIT_RD_DRQ) != MG_ERR_NONE) { 502 MG_TMAX_WAIT_RD_DRQ) != MG_ERR_NONE) {
489 mg_bad_rw_intr(host); 503 mg_bad_rw_intr(host);
490 return; 504 return;
491 } 505 }
492 for (j = 0; j < MG_SECTOR_SIZE >> 1; j++) 506
493 *buff++ = inw((unsigned long)host->dev_base + 507 mg_read_one(host, req);
494 MG_BUFF_OFFSET + (j << 1));
495 508
496 outb(MG_CMD_RD_CONF, (unsigned long)host->dev_base + 509 outb(MG_CMD_RD_CONF, (unsigned long)host->dev_base +
497 MG_REG_COMMAND); 510 MG_REG_COMMAND);
498 } while (mg_end_request(host, 0, MG_SECTOR_SIZE)); 511 } while (mg_end_request(host, 0, MG_SECTOR_SIZE));
499} 512}
500 513
514static void mg_write_one(struct mg_host *host, struct request *req)
515{
516 u16 *buff = (u16 *)req->buffer;
517 u32 i;
518
519 for (i = 0; i < MG_SECTOR_SIZE >> 1; i++)
520 outw(*buff++, (unsigned long)host->dev_base + MG_BUFF_OFFSET +
521 (i << 1));
522}
523
501static void mg_write(struct request *req) 524static void mg_write(struct request *req)
502{ 525{
503 u32 j;
504 struct mg_host *host = req->rq_disk->private_data; 526 struct mg_host *host = req->rq_disk->private_data;
527 unsigned int rem = blk_rq_sectors(req);
505 528
506 if (mg_out(host, blk_rq_pos(req), blk_rq_sectors(req), 529 if (mg_out(host, blk_rq_pos(req), rem,
507 MG_CMD_WR, NULL) != MG_ERR_NONE) { 530 MG_CMD_WR, NULL) != MG_ERR_NONE) {
508 mg_bad_rw_intr(host); 531 mg_bad_rw_intr(host);
509 return; 532 return;
510 } 533 }
511 534
512 MG_DBG("requested %d sects (from %ld), buffer=0x%p\n", 535 MG_DBG("requested %d sects (from %ld), buffer=0x%p\n",
513 blk_rq_sectors(req), blk_rq_pos(req), req->buffer); 536 rem, blk_rq_pos(req), req->buffer);
537
538 if (mg_wait(host, ATA_DRQ,
539 MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) {
540 mg_bad_rw_intr(host);
541 return;
542 }
514 543
515 do { 544 do {
516 u16 *buff = (u16 *)req->buffer; 545 mg_write_one(host, req);
517 546
518 if (mg_wait(host, ATA_DRQ, MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) { 547 outb(MG_CMD_WR_CONF, (unsigned long)host->dev_base +
548 MG_REG_COMMAND);
549
550 rem--;
551 if (rem > 1 && mg_wait(host, ATA_DRQ,
552 MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) {
553 mg_bad_rw_intr(host);
554 return;
555 } else if (mg_wait(host, MG_STAT_READY,
556 MG_TMAX_WAIT_WR_DRQ) != MG_ERR_NONE) {
519 mg_bad_rw_intr(host); 557 mg_bad_rw_intr(host);
520 return; 558 return;
521 } 559 }
522 for (j = 0; j < MG_SECTOR_SIZE >> 1; j++)
523 outw(*buff++, (unsigned long)host->dev_base +
524 MG_BUFF_OFFSET + (j << 1));
525
526 outb(MG_CMD_WR_CONF, (unsigned long)host->dev_base +
527 MG_REG_COMMAND);
528 } while (mg_end_request(host, 0, MG_SECTOR_SIZE)); 560 } while (mg_end_request(host, 0, MG_SECTOR_SIZE));
529} 561}
530 562
@@ -532,7 +564,6 @@ static void mg_read_intr(struct mg_host *host)
532{ 564{
533 struct request *req = host->req; 565 struct request *req = host->req;
534 u32 i; 566 u32 i;
535 u16 *buff;
536 567
537 /* check status */ 568 /* check status */
538 do { 569 do {
@@ -550,13 +581,7 @@ static void mg_read_intr(struct mg_host *host)
550 return; 581 return;
551 582
552ok_to_read: 583ok_to_read:
553 /* get current segment of request */ 584 mg_read_one(host, req);
554 buff = (u16 *)req->buffer;
555
556 /* read 1 sector */
557 for (i = 0; i < MG_SECTOR_SIZE >> 1; i++)
558 *buff++ = inw((unsigned long)host->dev_base + MG_BUFF_OFFSET +
559 (i << 1));
560 585
561 MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n", 586 MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n",
562 blk_rq_pos(req), blk_rq_sectors(req) - 1, req->buffer); 587 blk_rq_pos(req), blk_rq_sectors(req) - 1, req->buffer);
@@ -575,8 +600,7 @@ ok_to_read:
575static void mg_write_intr(struct mg_host *host) 600static void mg_write_intr(struct mg_host *host)
576{ 601{
577 struct request *req = host->req; 602 struct request *req = host->req;
578 u32 i, j; 603 u32 i;
579 u16 *buff;
580 bool rem; 604 bool rem;
581 605
582 /* check status */ 606 /* check status */
@@ -597,12 +621,7 @@ static void mg_write_intr(struct mg_host *host)
597ok_to_write: 621ok_to_write:
598 if ((rem = mg_end_request(host, 0, MG_SECTOR_SIZE))) { 622 if ((rem = mg_end_request(host, 0, MG_SECTOR_SIZE))) {
599 /* write 1 sector and set handler if remains */ 623 /* write 1 sector and set handler if remains */
600 buff = (u16 *)req->buffer; 624 mg_write_one(host, req);
601 for (j = 0; j < MG_STORAGE_BUFFER_SIZE >> 1; j++) {
602 outw(*buff, (unsigned long)host->dev_base +
603 MG_BUFF_OFFSET + (j << 1));
604 buff++;
605 }
606 MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n", 625 MG_DBG("sector %ld, remaining=%ld, buffer=0x%p\n",
607 blk_rq_pos(req), blk_rq_sectors(req), req->buffer); 626 blk_rq_pos(req), blk_rq_sectors(req), req->buffer);
608 host->mg_do_intr = mg_write_intr; 627 host->mg_do_intr = mg_write_intr;
@@ -667,9 +686,6 @@ static unsigned int mg_issue_req(struct request *req,
667 unsigned int sect_num, 686 unsigned int sect_num,
668 unsigned int sect_cnt) 687 unsigned int sect_cnt)
669{ 688{
670 u16 *buff;
671 u32 i;
672
673 switch (rq_data_dir(req)) { 689 switch (rq_data_dir(req)) {
674 case READ: 690 case READ:
675 if (mg_out(host, sect_num, sect_cnt, MG_CMD_RD, &mg_read_intr) 691 if (mg_out(host, sect_num, sect_cnt, MG_CMD_RD, &mg_read_intr)
@@ -693,12 +709,7 @@ static unsigned int mg_issue_req(struct request *req,
693 mg_bad_rw_intr(host); 709 mg_bad_rw_intr(host);
694 return host->error; 710 return host->error;
695 } 711 }
696 buff = (u16 *)req->buffer; 712 mg_write_one(host, req);
697 for (i = 0; i < MG_SECTOR_SIZE >> 1; i++) {
698 outw(*buff, (unsigned long)host->dev_base +
699 MG_BUFF_OFFSET + (i << 1));
700 buff++;
701 }
702 mod_timer(&host->timer, jiffies + 3 * HZ); 713 mod_timer(&host->timer, jiffies + 3 * HZ);
703 outb(MG_CMD_WR_CONF, (unsigned long)host->dev_base + 714 outb(MG_CMD_WR_CONF, (unsigned long)host->dev_base +
704 MG_REG_COMMAND); 715 MG_REG_COMMAND);
diff --git a/drivers/char/agp/parisc-agp.c b/drivers/char/agp/parisc-agp.c
index f4bb43fb8016..e077701ae3d9 100644
--- a/drivers/char/agp/parisc-agp.c
+++ b/drivers/char/agp/parisc-agp.c
@@ -225,7 +225,7 @@ static const struct agp_bridge_driver parisc_agp_driver = {
225 .configure = parisc_agp_configure, 225 .configure = parisc_agp_configure,
226 .fetch_size = parisc_agp_fetch_size, 226 .fetch_size = parisc_agp_fetch_size,
227 .tlb_flush = parisc_agp_tlbflush, 227 .tlb_flush = parisc_agp_tlbflush,
228 .mask_memory = parisc_agp_mask_memory, 228 .mask_memory = parisc_agp_page_mask_memory,
229 .masks = parisc_agp_masks, 229 .masks = parisc_agp_masks,
230 .agp_enable = parisc_agp_enable, 230 .agp_enable = parisc_agp_enable,
231 .cache_flush = global_cache_flush, 231 .cache_flush = global_cache_flush,
diff --git a/drivers/char/n_tty.c b/drivers/char/n_tty.c
index ff47907ff1bf..973be2f44195 100644
--- a/drivers/char/n_tty.c
+++ b/drivers/char/n_tty.c
@@ -1583,6 +1583,7 @@ static int n_tty_open(struct tty_struct *tty)
1583 1583
1584static inline int input_available_p(struct tty_struct *tty, int amt) 1584static inline int input_available_p(struct tty_struct *tty, int amt)
1585{ 1585{
1586 tty_flush_to_ldisc(tty);
1586 if (tty->icanon) { 1587 if (tty->icanon) {
1587 if (tty->canon_data) 1588 if (tty->canon_data)
1588 return 1; 1589 return 1;
diff --git a/drivers/char/pty.c b/drivers/char/pty.c
index 6e6942c45f5b..d083c73d784a 100644
--- a/drivers/char/pty.c
+++ b/drivers/char/pty.c
@@ -144,6 +144,8 @@ static int pty_write(struct tty_struct *tty, const unsigned char *buf,
144 144
145static int pty_write_room(struct tty_struct *tty) 145static int pty_write_room(struct tty_struct *tty)
146{ 146{
147 if (tty->stopped)
148 return 0;
147 return pty_space(tty->link); 149 return pty_space(tty->link);
148} 150}
149 151
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index 0db35857e4d8..5d7a02f63e1c 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -35,7 +35,6 @@
35#include <linux/spinlock.h> 35#include <linux/spinlock.h>
36#include <linux/vt_kern.h> 36#include <linux/vt_kern.h>
37#include <linux/workqueue.h> 37#include <linux/workqueue.h>
38#include <linux/kexec.h>
39#include <linux/hrtimer.h> 38#include <linux/hrtimer.h>
40#include <linux/oom.h> 39#include <linux/oom.h>
41 40
@@ -124,9 +123,12 @@ static struct sysrq_key_op sysrq_unraw_op = {
124static void sysrq_handle_crash(int key, struct tty_struct *tty) 123static void sysrq_handle_crash(int key, struct tty_struct *tty)
125{ 124{
126 char *killer = NULL; 125 char *killer = NULL;
126
127 panic_on_oops = 1; /* force panic */
128 wmb();
127 *killer = 1; 129 *killer = 1;
128} 130}
129static struct sysrq_key_op sysrq_crashdump_op = { 131static struct sysrq_key_op sysrq_crash_op = {
130 .handler = sysrq_handle_crash, 132 .handler = sysrq_handle_crash,
131 .help_msg = "Crash", 133 .help_msg = "Crash",
132 .action_msg = "Trigger a crash", 134 .action_msg = "Trigger a crash",
@@ -401,7 +403,7 @@ static struct sysrq_key_op *sysrq_key_table[36] = {
401 */ 403 */
402 NULL, /* a */ 404 NULL, /* a */
403 &sysrq_reboot_op, /* b */ 405 &sysrq_reboot_op, /* b */
404 &sysrq_crashdump_op, /* c & ibm_emac driver debug */ 406 &sysrq_crash_op, /* c & ibm_emac driver debug */
405 &sysrq_showlocks_op, /* d */ 407 &sysrq_showlocks_op, /* d */
406 &sysrq_term_op, /* e */ 408 &sysrq_term_op, /* e */
407 &sysrq_moom_op, /* f */ 409 &sysrq_moom_op, /* f */
diff --git a/drivers/char/tty_buffer.c b/drivers/char/tty_buffer.c
index 810ee25d66a4..3108991c5c8b 100644
--- a/drivers/char/tty_buffer.c
+++ b/drivers/char/tty_buffer.c
@@ -462,6 +462,19 @@ static void flush_to_ldisc(struct work_struct *work)
462} 462}
463 463
464/** 464/**
465 * tty_flush_to_ldisc
466 * @tty: tty to push
467 *
468 * Push the terminal flip buffers to the line discipline.
469 *
470 * Must not be called from IRQ context.
471 */
472void tty_flush_to_ldisc(struct tty_struct *tty)
473{
474 flush_to_ldisc(&tty->buf.work.work);
475}
476
477/**
465 * tty_flip_buffer_push - terminal 478 * tty_flip_buffer_push - terminal
466 * @tty: tty to push 479 * @tty: tty to push
467 * 480 *
diff --git a/drivers/char/tty_ldisc.c b/drivers/char/tty_ldisc.c
index acd76b767d4c..1733d3439ad2 100644
--- a/drivers/char/tty_ldisc.c
+++ b/drivers/char/tty_ldisc.c
@@ -48,6 +48,41 @@ static DECLARE_WAIT_QUEUE_HEAD(tty_ldisc_wait);
48/* Line disc dispatch table */ 48/* Line disc dispatch table */
49static struct tty_ldisc_ops *tty_ldiscs[NR_LDISCS]; 49static struct tty_ldisc_ops *tty_ldiscs[NR_LDISCS];
50 50
51static inline struct tty_ldisc *get_ldisc(struct tty_ldisc *ld)
52{
53 if (ld)
54 atomic_inc(&ld->users);
55 return ld;
56}
57
58static void put_ldisc(struct tty_ldisc *ld)
59{
60 unsigned long flags;
61
62 if (WARN_ON_ONCE(!ld))
63 return;
64
65 /*
66 * If this is the last user, free the ldisc, and
67 * release the ldisc ops.
68 *
69 * We really want an "atomic_dec_and_lock_irqsave()",
70 * but we don't have it, so this does it by hand.
71 */
72 local_irq_save(flags);
73 if (atomic_dec_and_lock(&ld->users, &tty_ldisc_lock)) {
74 struct tty_ldisc_ops *ldo = ld->ops;
75
76 ldo->refcount--;
77 module_put(ldo->owner);
78 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
79
80 kfree(ld);
81 return;
82 }
83 local_irq_restore(flags);
84}
85
51/** 86/**
52 * tty_register_ldisc - install a line discipline 87 * tty_register_ldisc - install a line discipline
53 * @disc: ldisc number 88 * @disc: ldisc number
@@ -142,7 +177,7 @@ static struct tty_ldisc *tty_ldisc_try_get(int disc)
142 /* lock it */ 177 /* lock it */
143 ldops->refcount++; 178 ldops->refcount++;
144 ld->ops = ldops; 179 ld->ops = ldops;
145 ld->refcount = 0; 180 atomic_set(&ld->users, 1);
146 err = 0; 181 err = 0;
147 } 182 }
148 } 183 }
@@ -181,35 +216,6 @@ static struct tty_ldisc *tty_ldisc_get(int disc)
181 return ld; 216 return ld;
182} 217}
183 218
184/**
185 * tty_ldisc_put - drop ldisc reference
186 * @ld: ldisc
187 *
188 * Drop a reference to a line discipline. Manage refcounts and
189 * module usage counts. Free the ldisc once the recount hits zero.
190 *
191 * Locking:
192 * takes tty_ldisc_lock to guard against ldisc races
193 */
194
195static void tty_ldisc_put(struct tty_ldisc *ld)
196{
197 unsigned long flags;
198 int disc = ld->ops->num;
199 struct tty_ldisc_ops *ldo;
200
201 BUG_ON(disc < N_TTY || disc >= NR_LDISCS);
202
203 spin_lock_irqsave(&tty_ldisc_lock, flags);
204 ldo = tty_ldiscs[disc];
205 BUG_ON(ldo->refcount == 0);
206 ldo->refcount--;
207 module_put(ldo->owner);
208 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
209 WARN_ON(ld->refcount);
210 kfree(ld);
211}
212
213static void *tty_ldiscs_seq_start(struct seq_file *m, loff_t *pos) 219static void *tty_ldiscs_seq_start(struct seq_file *m, loff_t *pos)
214{ 220{
215 return (*pos < NR_LDISCS) ? pos : NULL; 221 return (*pos < NR_LDISCS) ? pos : NULL;
@@ -234,7 +240,7 @@ static int tty_ldiscs_seq_show(struct seq_file *m, void *v)
234 if (IS_ERR(ld)) 240 if (IS_ERR(ld))
235 return 0; 241 return 0;
236 seq_printf(m, "%-10s %2d\n", ld->ops->name ? ld->ops->name : "???", i); 242 seq_printf(m, "%-10s %2d\n", ld->ops->name ? ld->ops->name : "???", i);
237 tty_ldisc_put(ld); 243 put_ldisc(ld);
238 return 0; 244 return 0;
239} 245}
240 246
@@ -288,20 +294,17 @@ static void tty_ldisc_assign(struct tty_struct *tty, struct tty_ldisc *ld)
288 * Locking: takes tty_ldisc_lock 294 * Locking: takes tty_ldisc_lock
289 */ 295 */
290 296
291static int tty_ldisc_try(struct tty_struct *tty) 297static struct tty_ldisc *tty_ldisc_try(struct tty_struct *tty)
292{ 298{
293 unsigned long flags; 299 unsigned long flags;
294 struct tty_ldisc *ld; 300 struct tty_ldisc *ld;
295 int ret = 0;
296 301
297 spin_lock_irqsave(&tty_ldisc_lock, flags); 302 spin_lock_irqsave(&tty_ldisc_lock, flags);
298 ld = tty->ldisc; 303 ld = NULL;
299 if (test_bit(TTY_LDISC, &tty->flags)) { 304 if (test_bit(TTY_LDISC, &tty->flags))
300 ld->refcount++; 305 ld = get_ldisc(tty->ldisc);
301 ret = 1;
302 }
303 spin_unlock_irqrestore(&tty_ldisc_lock, flags); 306 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
304 return ret; 307 return ld;
305} 308}
306 309
307/** 310/**
@@ -322,10 +325,11 @@ static int tty_ldisc_try(struct tty_struct *tty)
322 325
323struct tty_ldisc *tty_ldisc_ref_wait(struct tty_struct *tty) 326struct tty_ldisc *tty_ldisc_ref_wait(struct tty_struct *tty)
324{ 327{
328 struct tty_ldisc *ld;
329
325 /* wait_event is a macro */ 330 /* wait_event is a macro */
326 wait_event(tty_ldisc_wait, tty_ldisc_try(tty)); 331 wait_event(tty_ldisc_wait, (ld = tty_ldisc_try(tty)) != NULL);
327 WARN_ON(tty->ldisc->refcount == 0); 332 return ld;
328 return tty->ldisc;
329} 333}
330EXPORT_SYMBOL_GPL(tty_ldisc_ref_wait); 334EXPORT_SYMBOL_GPL(tty_ldisc_ref_wait);
331 335
@@ -342,9 +346,7 @@ EXPORT_SYMBOL_GPL(tty_ldisc_ref_wait);
342 346
343struct tty_ldisc *tty_ldisc_ref(struct tty_struct *tty) 347struct tty_ldisc *tty_ldisc_ref(struct tty_struct *tty)
344{ 348{
345 if (tty_ldisc_try(tty)) 349 return tty_ldisc_try(tty);
346 return tty->ldisc;
347 return NULL;
348} 350}
349EXPORT_SYMBOL_GPL(tty_ldisc_ref); 351EXPORT_SYMBOL_GPL(tty_ldisc_ref);
350 352
@@ -360,21 +362,15 @@ EXPORT_SYMBOL_GPL(tty_ldisc_ref);
360 362
361void tty_ldisc_deref(struct tty_ldisc *ld) 363void tty_ldisc_deref(struct tty_ldisc *ld)
362{ 364{
363 unsigned long flags; 365 put_ldisc(ld);
364
365 BUG_ON(ld == NULL);
366
367 spin_lock_irqsave(&tty_ldisc_lock, flags);
368 if (ld->refcount == 0)
369 printk(KERN_ERR "tty_ldisc_deref: no references.\n");
370 else
371 ld->refcount--;
372 if (ld->refcount == 0)
373 wake_up(&tty_ldisc_wait);
374 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
375} 366}
376EXPORT_SYMBOL_GPL(tty_ldisc_deref); 367EXPORT_SYMBOL_GPL(tty_ldisc_deref);
377 368
369static inline void tty_ldisc_put(struct tty_ldisc *ld)
370{
371 put_ldisc(ld);
372}
373
378/** 374/**
379 * tty_ldisc_enable - allow ldisc use 375 * tty_ldisc_enable - allow ldisc use
380 * @tty: terminal to activate ldisc on 376 * @tty: terminal to activate ldisc on
@@ -523,31 +519,6 @@ static int tty_ldisc_halt(struct tty_struct *tty)
523} 519}
524 520
525/** 521/**
526 * tty_ldisc_wait_idle - wait for the ldisc to become idle
527 * @tty: tty to wait for
528 *
529 * Wait for the line discipline to become idle. The discipline must
530 * have been halted for this to guarantee it remains idle.
531 *
532 * tty_ldisc_lock protects the ref counts currently.
533 */
534
535static int tty_ldisc_wait_idle(struct tty_struct *tty)
536{
537 unsigned long flags;
538 spin_lock_irqsave(&tty_ldisc_lock, flags);
539 while (tty->ldisc->refcount) {
540 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
541 if (wait_event_timeout(tty_ldisc_wait,
542 tty->ldisc->refcount == 0, 5 * HZ) == 0)
543 return -EBUSY;
544 spin_lock_irqsave(&tty_ldisc_lock, flags);
545 }
546 spin_unlock_irqrestore(&tty_ldisc_lock, flags);
547 return 0;
548}
549
550/**
551 * tty_set_ldisc - set line discipline 522 * tty_set_ldisc - set line discipline
552 * @tty: the terminal to set 523 * @tty: the terminal to set
553 * @ldisc: the line discipline 524 * @ldisc: the line discipline
@@ -642,14 +613,6 @@ int tty_set_ldisc(struct tty_struct *tty, int ldisc)
642 613
643 flush_scheduled_work(); 614 flush_scheduled_work();
644 615
645 /* Let any existing reference holders finish */
646 retval = tty_ldisc_wait_idle(tty);
647 if (retval < 0) {
648 clear_bit(TTY_LDISC_CHANGING, &tty->flags);
649 tty_ldisc_put(new_ldisc);
650 return retval;
651 }
652
653 mutex_lock(&tty->ldisc_mutex); 616 mutex_lock(&tty->ldisc_mutex);
654 if (test_bit(TTY_HUPPED, &tty->flags)) { 617 if (test_bit(TTY_HUPPED, &tty->flags)) {
655 /* We were raced by the hangup method. It will have stomped 618 /* We were raced by the hangup method. It will have stomped
@@ -795,7 +758,6 @@ void tty_ldisc_hangup(struct tty_struct *tty)
795 if (tty->ldisc) { /* Not yet closed */ 758 if (tty->ldisc) { /* Not yet closed */
796 /* Switch back to N_TTY */ 759 /* Switch back to N_TTY */
797 tty_ldisc_halt(tty); 760 tty_ldisc_halt(tty);
798 tty_ldisc_wait_idle(tty);
799 tty_ldisc_reinit(tty); 761 tty_ldisc_reinit(tty);
800 /* At this point we have a closed ldisc and we want to 762 /* At this point we have a closed ldisc and we want to
801 reopen it. We could defer this to the next open but 763 reopen it. We could defer this to the next open but
@@ -860,14 +822,6 @@ void tty_ldisc_release(struct tty_struct *tty, struct tty_struct *o_tty)
860 tty_ldisc_halt(tty); 822 tty_ldisc_halt(tty);
861 flush_scheduled_work(); 823 flush_scheduled_work();
862 824
863 /*
864 * Wait for any short term users (we know they are just driver
865 * side waiters as the file is closing so user count on the file
866 * side is zero.
867 */
868
869 tty_ldisc_wait_idle(tty);
870
871 mutex_lock(&tty->ldisc_mutex); 825 mutex_lock(&tty->ldisc_mutex);
872 /* 826 /*
873 * Now kill off the ldisc 827 * Now kill off the ldisc
diff --git a/drivers/char/vr41xx_giu.c b/drivers/char/vr41xx_giu.c
deleted file mode 100644
index e69de29bb2d1..000000000000
--- a/drivers/char/vr41xx_giu.c
+++ /dev/null
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index b90eda8b3440..fd69086d08d5 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -858,6 +858,8 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
858 858
859 /* Check for existing affected CPUs. 859 /* Check for existing affected CPUs.
860 * They may not be aware of it due to CPU Hotplug. 860 * They may not be aware of it due to CPU Hotplug.
861 * cpufreq_cpu_put is called when the device is removed
862 * in __cpufreq_remove_dev()
861 */ 863 */
862 managed_policy = cpufreq_cpu_get(j); 864 managed_policy = cpufreq_cpu_get(j);
863 if (unlikely(managed_policy)) { 865 if (unlikely(managed_policy)) {
@@ -884,7 +886,7 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
884 ret = sysfs_create_link(&sys_dev->kobj, 886 ret = sysfs_create_link(&sys_dev->kobj,
885 &managed_policy->kobj, 887 &managed_policy->kobj,
886 "cpufreq"); 888 "cpufreq");
887 if (!ret) 889 if (ret)
888 cpufreq_cpu_put(managed_policy); 890 cpufreq_cpu_put(managed_policy);
889 /* 891 /*
890 * Success. We only needed to be added to the mask. 892 * Success. We only needed to be added to the mask.
@@ -924,6 +926,8 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
924 926
925 spin_lock_irqsave(&cpufreq_driver_lock, flags); 927 spin_lock_irqsave(&cpufreq_driver_lock, flags);
926 for_each_cpu(j, policy->cpus) { 928 for_each_cpu(j, policy->cpus) {
929 if (!cpu_online(j))
930 continue;
927 per_cpu(cpufreq_cpu_data, j) = policy; 931 per_cpu(cpufreq_cpu_data, j) = policy;
928 per_cpu(policy_cpu, j) = policy->cpu; 932 per_cpu(policy_cpu, j) = policy->cpu;
929 } 933 }
@@ -1244,13 +1248,22 @@ EXPORT_SYMBOL(cpufreq_get);
1244 1248
1245static int cpufreq_suspend(struct sys_device *sysdev, pm_message_t pmsg) 1249static int cpufreq_suspend(struct sys_device *sysdev, pm_message_t pmsg)
1246{ 1250{
1247 int cpu = sysdev->id;
1248 int ret = 0; 1251 int ret = 0;
1252
1253#ifdef __powerpc__
1254 int cpu = sysdev->id;
1249 unsigned int cur_freq = 0; 1255 unsigned int cur_freq = 0;
1250 struct cpufreq_policy *cpu_policy; 1256 struct cpufreq_policy *cpu_policy;
1251 1257
1252 dprintk("suspending cpu %u\n", cpu); 1258 dprintk("suspending cpu %u\n", cpu);
1253 1259
1260 /*
1261 * This whole bogosity is here because Powerbooks are made of fail.
1262 * No sane platform should need any of the code below to be run.
1263 * (it's entirely the wrong thing to do, as driver->get may
1264 * reenable interrupts on some architectures).
1265 */
1266
1254 if (!cpu_online(cpu)) 1267 if (!cpu_online(cpu))
1255 return 0; 1268 return 0;
1256 1269
@@ -1309,6 +1322,7 @@ static int cpufreq_suspend(struct sys_device *sysdev, pm_message_t pmsg)
1309 1322
1310out: 1323out:
1311 cpufreq_cpu_put(cpu_policy); 1324 cpufreq_cpu_put(cpu_policy);
1325#endif /* __powerpc__ */
1312 return ret; 1326 return ret;
1313} 1327}
1314 1328
@@ -1322,12 +1336,18 @@ out:
1322 */ 1336 */
1323static int cpufreq_resume(struct sys_device *sysdev) 1337static int cpufreq_resume(struct sys_device *sysdev)
1324{ 1338{
1325 int cpu = sysdev->id;
1326 int ret = 0; 1339 int ret = 0;
1340
1341#ifdef __powerpc__
1342 int cpu = sysdev->id;
1327 struct cpufreq_policy *cpu_policy; 1343 struct cpufreq_policy *cpu_policy;
1328 1344
1329 dprintk("resuming cpu %u\n", cpu); 1345 dprintk("resuming cpu %u\n", cpu);
1330 1346
1347 /* As with the ->suspend method, all the code below is
1348 * only necessary because Powerbooks suck.
1349 * See commit 42d4dc3f4e1e for jokes. */
1350
1331 if (!cpu_online(cpu)) 1351 if (!cpu_online(cpu))
1332 return 0; 1352 return 0;
1333 1353
@@ -1391,6 +1411,7 @@ out:
1391 schedule_work(&cpu_policy->update); 1411 schedule_work(&cpu_policy->update);
1392fail: 1412fail:
1393 cpufreq_cpu_put(cpu_policy); 1413 cpufreq_cpu_put(cpu_policy);
1414#endif /* __powerpc__ */
1394 return ret; 1415 return ret;
1395} 1416}
1396 1417
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index 57490502b21c..bdea7e2f94ba 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -63,6 +63,7 @@ struct cpu_dbs_info_s {
63 unsigned int down_skip; 63 unsigned int down_skip;
64 unsigned int requested_freq; 64 unsigned int requested_freq;
65 int cpu; 65 int cpu;
66 unsigned int enable:1;
66 /* 67 /*
67 * percpu mutex that serializes governor limit change with 68 * percpu mutex that serializes governor limit change with
68 * do_dbs_timer invocation. We do not want do_dbs_timer to run 69 * do_dbs_timer invocation. We do not want do_dbs_timer to run
@@ -141,6 +142,9 @@ dbs_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
141 142
142 struct cpufreq_policy *policy; 143 struct cpufreq_policy *policy;
143 144
145 if (!this_dbs_info->enable)
146 return 0;
147
144 policy = this_dbs_info->cur_policy; 148 policy = this_dbs_info->cur_policy;
145 149
146 /* 150 /*
@@ -497,6 +501,7 @@ static inline void dbs_timer_init(struct cpu_dbs_info_s *dbs_info)
497 int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate); 501 int delay = usecs_to_jiffies(dbs_tuners_ins.sampling_rate);
498 delay -= jiffies % delay; 502 delay -= jiffies % delay;
499 503
504 dbs_info->enable = 1;
500 INIT_DELAYED_WORK_DEFERRABLE(&dbs_info->work, do_dbs_timer); 505 INIT_DELAYED_WORK_DEFERRABLE(&dbs_info->work, do_dbs_timer);
501 queue_delayed_work_on(dbs_info->cpu, kconservative_wq, &dbs_info->work, 506 queue_delayed_work_on(dbs_info->cpu, kconservative_wq, &dbs_info->work,
502 delay); 507 delay);
@@ -504,6 +509,7 @@ static inline void dbs_timer_init(struct cpu_dbs_info_s *dbs_info)
504 509
505static inline void dbs_timer_exit(struct cpu_dbs_info_s *dbs_info) 510static inline void dbs_timer_exit(struct cpu_dbs_info_s *dbs_info)
506{ 511{
512 dbs_info->enable = 0;
507 cancel_delayed_work_sync(&dbs_info->work); 513 cancel_delayed_work_sync(&dbs_info->work);
508} 514}
509 515
diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig
index 070357aaedbc..81e1020fb514 100644
--- a/drivers/dma/Kconfig
+++ b/drivers/dma/Kconfig
@@ -4,7 +4,7 @@
4 4
5menuconfig DMADEVICES 5menuconfig DMADEVICES
6 bool "DMA Engine support" 6 bool "DMA Engine support"
7 depends on !HIGHMEM64G && HAS_DMA 7 depends on HAS_DMA
8 help 8 help
9 DMA engines can do asynchronous data transfers without 9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be 10 involving the host CPU. Currently, this framework can be
@@ -46,6 +46,14 @@ config DW_DMAC
46 Support the Synopsys DesignWare AHB DMA controller. This 46 Support the Synopsys DesignWare AHB DMA controller. This
47 can be integrated in chips such as the Atmel AT32ap7000. 47 can be integrated in chips such as the Atmel AT32ap7000.
48 48
49config AT_HDMAC
50 tristate "Atmel AHB DMA support"
51 depends on ARCH_AT91SAM9RL
52 select DMA_ENGINE
53 help
54 Support the Atmel AHB DMA controller. This can be integrated in
55 chips such as the Atmel AT91SAM9RL.
56
49config FSL_DMA 57config FSL_DMA
50 tristate "Freescale Elo and Elo Plus DMA support" 58 tristate "Freescale Elo and Elo Plus DMA support"
51 depends on FSL_SOC 59 depends on FSL_SOC
@@ -108,7 +116,7 @@ config NET_DMA
108 116
109config ASYNC_TX_DMA 117config ASYNC_TX_DMA
110 bool "Async_tx: Offload support for the async_tx api" 118 bool "Async_tx: Offload support for the async_tx api"
111 depends on DMA_ENGINE 119 depends on DMA_ENGINE && !HIGHMEM64G
112 help 120 help
113 This allows the async_tx api to take advantage of offload engines for 121 This allows the async_tx api to take advantage of offload engines for
114 memcpy, memset, xor, and raid6 p+q operations. If your platform has 122 memcpy, memset, xor, and raid6 p+q operations. If your platform has
diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile
index a0b6564800c4..40e1e0083571 100644
--- a/drivers/dma/Makefile
+++ b/drivers/dma/Makefile
@@ -7,5 +7,6 @@ obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o
7obj-$(CONFIG_FSL_DMA) += fsldma.o 7obj-$(CONFIG_FSL_DMA) += fsldma.o
8obj-$(CONFIG_MV_XOR) += mv_xor.o 8obj-$(CONFIG_MV_XOR) += mv_xor.o
9obj-$(CONFIG_DW_DMAC) += dw_dmac.o 9obj-$(CONFIG_DW_DMAC) += dw_dmac.o
10obj-$(CONFIG_AT_HDMAC) += at_hdmac.o
10obj-$(CONFIG_MX3_IPU) += ipu/ 11obj-$(CONFIG_MX3_IPU) += ipu/
11obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o 12obj-$(CONFIG_TXX9_DMAC) += txx9dmac.o
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
new file mode 100644
index 000000000000..9a1e5fb412ed
--- /dev/null
+++ b/drivers/dma/at_hdmac.c
@@ -0,0 +1,1213 @@
1/*
2 * Driver for the Atmel AHB DMA Controller (aka HDMA or DMAC on AT91 systems)
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 *
12 * This supports the Atmel AHB DMA Controller,
13 *
14 * The driver has currently been tested with the Atmel AT91SAM9RL
15 * and AT91SAM9G45 series.
16 */
17
18#include <linux/clk.h>
19#include <linux/dmaengine.h>
20#include <linux/dma-mapping.h>
21#include <linux/dmapool.h>
22#include <linux/interrupt.h>
23#include <linux/module.h>
24#include <linux/platform_device.h>
25
26#include "at_hdmac_regs.h"
27
28/*
29 * Glossary
30 * --------
31 *
32 * at_hdmac : Name of the ATmel AHB DMA Controller
33 * at_dma_ / atdma : ATmel DMA controller entity related
34 * atc_ / atchan : ATmel DMA Channel entity related
35 */
36
37#define ATC_DEFAULT_CFG (ATC_FIFOCFG_HALFFIFO)
38#define ATC_DEFAULT_CTRLA (0)
39#define ATC_DEFAULT_CTRLB (ATC_SIF(0) \
40 |ATC_DIF(1))
41
42/*
43 * Initial number of descriptors to allocate for each channel. This could
44 * be increased during dma usage.
45 */
46static unsigned int init_nr_desc_per_channel = 64;
47module_param(init_nr_desc_per_channel, uint, 0644);
48MODULE_PARM_DESC(init_nr_desc_per_channel,
49 "initial descriptors per channel (default: 64)");
50
51
52/* prototypes */
53static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx);
54
55
56/*----------------------------------------------------------------------*/
57
58static struct at_desc *atc_first_active(struct at_dma_chan *atchan)
59{
60 return list_first_entry(&atchan->active_list,
61 struct at_desc, desc_node);
62}
63
64static struct at_desc *atc_first_queued(struct at_dma_chan *atchan)
65{
66 return list_first_entry(&atchan->queue,
67 struct at_desc, desc_node);
68}
69
70/**
71 * atc_alloc_descriptor - allocate and return an initilized descriptor
72 * @chan: the channel to allocate descriptors for
73 * @gfp_flags: GFP allocation flags
74 *
75 * Note: The ack-bit is positioned in the descriptor flag at creation time
76 * to make initial allocation more convenient. This bit will be cleared
77 * and control will be given to client at usage time (during
78 * preparation functions).
79 */
80static struct at_desc *atc_alloc_descriptor(struct dma_chan *chan,
81 gfp_t gfp_flags)
82{
83 struct at_desc *desc = NULL;
84 struct at_dma *atdma = to_at_dma(chan->device);
85 dma_addr_t phys;
86
87 desc = dma_pool_alloc(atdma->dma_desc_pool, gfp_flags, &phys);
88 if (desc) {
89 memset(desc, 0, sizeof(struct at_desc));
90 dma_async_tx_descriptor_init(&desc->txd, chan);
91 /* txd.flags will be overwritten in prep functions */
92 desc->txd.flags = DMA_CTRL_ACK;
93 desc->txd.tx_submit = atc_tx_submit;
94 desc->txd.phys = phys;
95 }
96
97 return desc;
98}
99
100/**
101 * atc_desc_get - get a unsused descriptor from free_list
102 * @atchan: channel we want a new descriptor for
103 */
104static struct at_desc *atc_desc_get(struct at_dma_chan *atchan)
105{
106 struct at_desc *desc, *_desc;
107 struct at_desc *ret = NULL;
108 unsigned int i = 0;
109 LIST_HEAD(tmp_list);
110
111 spin_lock_bh(&atchan->lock);
112 list_for_each_entry_safe(desc, _desc, &atchan->free_list, desc_node) {
113 i++;
114 if (async_tx_test_ack(&desc->txd)) {
115 list_del(&desc->desc_node);
116 ret = desc;
117 break;
118 }
119 dev_dbg(chan2dev(&atchan->chan_common),
120 "desc %p not ACKed\n", desc);
121 }
122 spin_unlock_bh(&atchan->lock);
123 dev_vdbg(chan2dev(&atchan->chan_common),
124 "scanned %u descriptors on freelist\n", i);
125
126 /* no more descriptor available in initial pool: create one more */
127 if (!ret) {
128 ret = atc_alloc_descriptor(&atchan->chan_common, GFP_ATOMIC);
129 if (ret) {
130 spin_lock_bh(&atchan->lock);
131 atchan->descs_allocated++;
132 spin_unlock_bh(&atchan->lock);
133 } else {
134 dev_err(chan2dev(&atchan->chan_common),
135 "not enough descriptors available\n");
136 }
137 }
138
139 return ret;
140}
141
142/**
143 * atc_desc_put - move a descriptor, including any children, to the free list
144 * @atchan: channel we work on
145 * @desc: descriptor, at the head of a chain, to move to free list
146 */
147static void atc_desc_put(struct at_dma_chan *atchan, struct at_desc *desc)
148{
149 if (desc) {
150 struct at_desc *child;
151
152 spin_lock_bh(&atchan->lock);
153 list_for_each_entry(child, &desc->txd.tx_list, desc_node)
154 dev_vdbg(chan2dev(&atchan->chan_common),
155 "moving child desc %p to freelist\n",
156 child);
157 list_splice_init(&desc->txd.tx_list, &atchan->free_list);
158 dev_vdbg(chan2dev(&atchan->chan_common),
159 "moving desc %p to freelist\n", desc);
160 list_add(&desc->desc_node, &atchan->free_list);
161 spin_unlock_bh(&atchan->lock);
162 }
163}
164
165/**
166 * atc_assign_cookie - compute and assign new cookie
167 * @atchan: channel we work on
168 * @desc: descriptor to asign cookie for
169 *
170 * Called with atchan->lock held and bh disabled
171 */
172static dma_cookie_t
173atc_assign_cookie(struct at_dma_chan *atchan, struct at_desc *desc)
174{
175 dma_cookie_t cookie = atchan->chan_common.cookie;
176
177 if (++cookie < 0)
178 cookie = 1;
179
180 atchan->chan_common.cookie = cookie;
181 desc->txd.cookie = cookie;
182
183 return cookie;
184}
185
186/**
187 * atc_dostart - starts the DMA engine for real
188 * @atchan: the channel we want to start
189 * @first: first descriptor in the list we want to begin with
190 *
191 * Called with atchan->lock held and bh disabled
192 */
193static void atc_dostart(struct at_dma_chan *atchan, struct at_desc *first)
194{
195 struct at_dma *atdma = to_at_dma(atchan->chan_common.device);
196
197 /* ASSERT: channel is idle */
198 if (atc_chan_is_enabled(atchan)) {
199 dev_err(chan2dev(&atchan->chan_common),
200 "BUG: Attempted to start non-idle channel\n");
201 dev_err(chan2dev(&atchan->chan_common),
202 " channel: s0x%x d0x%x ctrl0x%x:0x%x l0x%x\n",
203 channel_readl(atchan, SADDR),
204 channel_readl(atchan, DADDR),
205 channel_readl(atchan, CTRLA),
206 channel_readl(atchan, CTRLB),
207 channel_readl(atchan, DSCR));
208
209 /* The tasklet will hopefully advance the queue... */
210 return;
211 }
212
213 vdbg_dump_regs(atchan);
214
215 /* clear any pending interrupt */
216 while (dma_readl(atdma, EBCISR))
217 cpu_relax();
218
219 channel_writel(atchan, SADDR, 0);
220 channel_writel(atchan, DADDR, 0);
221 channel_writel(atchan, CTRLA, 0);
222 channel_writel(atchan, CTRLB, 0);
223 channel_writel(atchan, DSCR, first->txd.phys);
224 dma_writel(atdma, CHER, atchan->mask);
225
226 vdbg_dump_regs(atchan);
227}
228
229/**
230 * atc_chain_complete - finish work for one transaction chain
231 * @atchan: channel we work on
232 * @desc: descriptor at the head of the chain we want do complete
233 *
234 * Called with atchan->lock held and bh disabled */
235static void
236atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
237{
238 dma_async_tx_callback callback;
239 void *param;
240 struct dma_async_tx_descriptor *txd = &desc->txd;
241
242 dev_vdbg(chan2dev(&atchan->chan_common),
243 "descriptor %u complete\n", txd->cookie);
244
245 atchan->completed_cookie = txd->cookie;
246 callback = txd->callback;
247 param = txd->callback_param;
248
249 /* move children to free_list */
250 list_splice_init(&txd->tx_list, &atchan->free_list);
251 /* move myself to free_list */
252 list_move(&desc->desc_node, &atchan->free_list);
253
254 /* unmap dma addresses */
255 if (!(txd->flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
256 if (txd->flags & DMA_COMPL_DEST_UNMAP_SINGLE)
257 dma_unmap_single(chan2parent(&atchan->chan_common),
258 desc->lli.daddr,
259 desc->len, DMA_FROM_DEVICE);
260 else
261 dma_unmap_page(chan2parent(&atchan->chan_common),
262 desc->lli.daddr,
263 desc->len, DMA_FROM_DEVICE);
264 }
265 if (!(txd->flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
266 if (txd->flags & DMA_COMPL_SRC_UNMAP_SINGLE)
267 dma_unmap_single(chan2parent(&atchan->chan_common),
268 desc->lli.saddr,
269 desc->len, DMA_TO_DEVICE);
270 else
271 dma_unmap_page(chan2parent(&atchan->chan_common),
272 desc->lli.saddr,
273 desc->len, DMA_TO_DEVICE);
274 }
275
276 /*
277 * The API requires that no submissions are done from a
278 * callback, so we don't need to drop the lock here
279 */
280 if (callback)
281 callback(param);
282
283 dma_run_dependencies(txd);
284}
285
286/**
287 * atc_complete_all - finish work for all transactions
288 * @atchan: channel to complete transactions for
289 *
290 * Eventually submit queued descriptors if any
291 *
292 * Assume channel is idle while calling this function
293 * Called with atchan->lock held and bh disabled
294 */
295static void atc_complete_all(struct at_dma_chan *atchan)
296{
297 struct at_desc *desc, *_desc;
298 LIST_HEAD(list);
299
300 dev_vdbg(chan2dev(&atchan->chan_common), "complete all\n");
301
302 BUG_ON(atc_chan_is_enabled(atchan));
303
304 /*
305 * Submit queued descriptors ASAP, i.e. before we go through
306 * the completed ones.
307 */
308 if (!list_empty(&atchan->queue))
309 atc_dostart(atchan, atc_first_queued(atchan));
310 /* empty active_list now it is completed */
311 list_splice_init(&atchan->active_list, &list);
312 /* empty queue list by moving descriptors (if any) to active_list */
313 list_splice_init(&atchan->queue, &atchan->active_list);
314
315 list_for_each_entry_safe(desc, _desc, &list, desc_node)
316 atc_chain_complete(atchan, desc);
317}
318
319/**
320 * atc_cleanup_descriptors - cleanup up finished descriptors in active_list
321 * @atchan: channel to be cleaned up
322 *
323 * Called with atchan->lock held and bh disabled
324 */
325static void atc_cleanup_descriptors(struct at_dma_chan *atchan)
326{
327 struct at_desc *desc, *_desc;
328 struct at_desc *child;
329
330 dev_vdbg(chan2dev(&atchan->chan_common), "cleanup descriptors\n");
331
332 list_for_each_entry_safe(desc, _desc, &atchan->active_list, desc_node) {
333 if (!(desc->lli.ctrla & ATC_DONE))
334 /* This one is currently in progress */
335 return;
336
337 list_for_each_entry(child, &desc->txd.tx_list, desc_node)
338 if (!(child->lli.ctrla & ATC_DONE))
339 /* Currently in progress */
340 return;
341
342 /*
343 * No descriptors so far seem to be in progress, i.e.
344 * this chain must be done.
345 */
346 atc_chain_complete(atchan, desc);
347 }
348}
349
350/**
351 * atc_advance_work - at the end of a transaction, move forward
352 * @atchan: channel where the transaction ended
353 *
354 * Called with atchan->lock held and bh disabled
355 */
356static void atc_advance_work(struct at_dma_chan *atchan)
357{
358 dev_vdbg(chan2dev(&atchan->chan_common), "advance_work\n");
359
360 if (list_empty(&atchan->active_list) ||
361 list_is_singular(&atchan->active_list)) {
362 atc_complete_all(atchan);
363 } else {
364 atc_chain_complete(atchan, atc_first_active(atchan));
365 /* advance work */
366 atc_dostart(atchan, atc_first_active(atchan));
367 }
368}
369
370
371/**
372 * atc_handle_error - handle errors reported by DMA controller
373 * @atchan: channel where error occurs
374 *
375 * Called with atchan->lock held and bh disabled
376 */
377static void atc_handle_error(struct at_dma_chan *atchan)
378{
379 struct at_desc *bad_desc;
380 struct at_desc *child;
381
382 /*
383 * The descriptor currently at the head of the active list is
384 * broked. Since we don't have any way to report errors, we'll
385 * just have to scream loudly and try to carry on.
386 */
387 bad_desc = atc_first_active(atchan);
388 list_del_init(&bad_desc->desc_node);
389
390 /* As we are stopped, take advantage to push queued descriptors
391 * in active_list */
392 list_splice_init(&atchan->queue, atchan->active_list.prev);
393
394 /* Try to restart the controller */
395 if (!list_empty(&atchan->active_list))
396 atc_dostart(atchan, atc_first_active(atchan));
397
398 /*
399 * KERN_CRITICAL may seem harsh, but since this only happens
400 * when someone submits a bad physical address in a
401 * descriptor, we should consider ourselves lucky that the
402 * controller flagged an error instead of scribbling over
403 * random memory locations.
404 */
405 dev_crit(chan2dev(&atchan->chan_common),
406 "Bad descriptor submitted for DMA!\n");
407 dev_crit(chan2dev(&atchan->chan_common),
408 " cookie: %d\n", bad_desc->txd.cookie);
409 atc_dump_lli(atchan, &bad_desc->lli);
410 list_for_each_entry(child, &bad_desc->txd.tx_list, desc_node)
411 atc_dump_lli(atchan, &child->lli);
412
413 /* Pretend the descriptor completed successfully */
414 atc_chain_complete(atchan, bad_desc);
415}
416
417
418/*-- IRQ & Tasklet ---------------------------------------------------*/
419
420static void atc_tasklet(unsigned long data)
421{
422 struct at_dma_chan *atchan = (struct at_dma_chan *)data;
423
424 /* Channel cannot be enabled here */
425 if (atc_chan_is_enabled(atchan)) {
426 dev_err(chan2dev(&atchan->chan_common),
427 "BUG: channel enabled in tasklet\n");
428 return;
429 }
430
431 spin_lock(&atchan->lock);
432 if (test_and_clear_bit(0, &atchan->error_status))
433 atc_handle_error(atchan);
434 else
435 atc_advance_work(atchan);
436
437 spin_unlock(&atchan->lock);
438}
439
440static irqreturn_t at_dma_interrupt(int irq, void *dev_id)
441{
442 struct at_dma *atdma = (struct at_dma *)dev_id;
443 struct at_dma_chan *atchan;
444 int i;
445 u32 status, pending, imr;
446 int ret = IRQ_NONE;
447
448 do {
449 imr = dma_readl(atdma, EBCIMR);
450 status = dma_readl(atdma, EBCISR);
451 pending = status & imr;
452
453 if (!pending)
454 break;
455
456 dev_vdbg(atdma->dma_common.dev,
457 "interrupt: status = 0x%08x, 0x%08x, 0x%08x\n",
458 status, imr, pending);
459
460 for (i = 0; i < atdma->dma_common.chancnt; i++) {
461 atchan = &atdma->chan[i];
462 if (pending & (AT_DMA_CBTC(i) | AT_DMA_ERR(i))) {
463 if (pending & AT_DMA_ERR(i)) {
464 /* Disable channel on AHB error */
465 dma_writel(atdma, CHDR, atchan->mask);
466 /* Give information to tasklet */
467 set_bit(0, &atchan->error_status);
468 }
469 tasklet_schedule(&atchan->tasklet);
470 ret = IRQ_HANDLED;
471 }
472 }
473
474 } while (pending);
475
476 return ret;
477}
478
479
480/*-- DMA Engine API --------------------------------------------------*/
481
482/**
483 * atc_tx_submit - set the prepared descriptor(s) to be executed by the engine
484 * @desc: descriptor at the head of the transaction chain
485 *
486 * Queue chain if DMA engine is working already
487 *
488 * Cookie increment and adding to active_list or queue must be atomic
489 */
490static dma_cookie_t atc_tx_submit(struct dma_async_tx_descriptor *tx)
491{
492 struct at_desc *desc = txd_to_at_desc(tx);
493 struct at_dma_chan *atchan = to_at_dma_chan(tx->chan);
494 dma_cookie_t cookie;
495
496 spin_lock_bh(&atchan->lock);
497 cookie = atc_assign_cookie(atchan, desc);
498
499 if (list_empty(&atchan->active_list)) {
500 dev_vdbg(chan2dev(tx->chan), "tx_submit: started %u\n",
501 desc->txd.cookie);
502 atc_dostart(atchan, desc);
503 list_add_tail(&desc->desc_node, &atchan->active_list);
504 } else {
505 dev_vdbg(chan2dev(tx->chan), "tx_submit: queued %u\n",
506 desc->txd.cookie);
507 list_add_tail(&desc->desc_node, &atchan->queue);
508 }
509
510 spin_unlock_bh(&atchan->lock);
511
512 return cookie;
513}
514
515/**
516 * atc_prep_dma_memcpy - prepare a memcpy operation
517 * @chan: the channel to prepare operation on
518 * @dest: operation virtual destination address
519 * @src: operation virtual source address
520 * @len: operation length
521 * @flags: tx descriptor status flags
522 */
523static struct dma_async_tx_descriptor *
524atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
525 size_t len, unsigned long flags)
526{
527 struct at_dma_chan *atchan = to_at_dma_chan(chan);
528 struct at_desc *desc = NULL;
529 struct at_desc *first = NULL;
530 struct at_desc *prev = NULL;
531 size_t xfer_count;
532 size_t offset;
533 unsigned int src_width;
534 unsigned int dst_width;
535 u32 ctrla;
536 u32 ctrlb;
537
538 dev_vdbg(chan2dev(chan), "prep_dma_memcpy: d0x%x s0x%x l0x%zx f0x%lx\n",
539 dest, src, len, flags);
540
541 if (unlikely(!len)) {
542 dev_dbg(chan2dev(chan), "prep_dma_memcpy: length is zero!\n");
543 return NULL;
544 }
545
546 ctrla = ATC_DEFAULT_CTRLA;
547 ctrlb = ATC_DEFAULT_CTRLB
548 | ATC_SRC_ADDR_MODE_INCR
549 | ATC_DST_ADDR_MODE_INCR
550 | ATC_FC_MEM2MEM;
551
552 /*
553 * We can be a lot more clever here, but this should take care
554 * of the most common optimization.
555 */
556 if (!((src | dest | len) & 3)) {
557 ctrla |= ATC_SRC_WIDTH_WORD | ATC_DST_WIDTH_WORD;
558 src_width = dst_width = 2;
559 } else if (!((src | dest | len) & 1)) {
560 ctrla |= ATC_SRC_WIDTH_HALFWORD | ATC_DST_WIDTH_HALFWORD;
561 src_width = dst_width = 1;
562 } else {
563 ctrla |= ATC_SRC_WIDTH_BYTE | ATC_DST_WIDTH_BYTE;
564 src_width = dst_width = 0;
565 }
566
567 for (offset = 0; offset < len; offset += xfer_count << src_width) {
568 xfer_count = min_t(size_t, (len - offset) >> src_width,
569 ATC_BTSIZE_MAX);
570
571 desc = atc_desc_get(atchan);
572 if (!desc)
573 goto err_desc_get;
574
575 desc->lli.saddr = src + offset;
576 desc->lli.daddr = dest + offset;
577 desc->lli.ctrla = ctrla | xfer_count;
578 desc->lli.ctrlb = ctrlb;
579
580 desc->txd.cookie = 0;
581 async_tx_ack(&desc->txd);
582
583 if (!first) {
584 first = desc;
585 } else {
586 /* inform the HW lli about chaining */
587 prev->lli.dscr = desc->txd.phys;
588 /* insert the link descriptor to the LD ring */
589 list_add_tail(&desc->desc_node,
590 &first->txd.tx_list);
591 }
592 prev = desc;
593 }
594
595 /* First descriptor of the chain embedds additional information */
596 first->txd.cookie = -EBUSY;
597 first->len = len;
598
599 /* set end-of-link to the last link descriptor of list*/
600 set_desc_eol(desc);
601
602 desc->txd.flags = flags; /* client is in control of this ack */
603
604 return &first->txd;
605
606err_desc_get:
607 atc_desc_put(atchan, first);
608 return NULL;
609}
610
611
612/**
613 * atc_prep_slave_sg - prepare descriptors for a DMA_SLAVE transaction
614 * @chan: DMA channel
615 * @sgl: scatterlist to transfer to/from
616 * @sg_len: number of entries in @scatterlist
617 * @direction: DMA direction
618 * @flags: tx descriptor status flags
619 */
620static struct dma_async_tx_descriptor *
621atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
622 unsigned int sg_len, enum dma_data_direction direction,
623 unsigned long flags)
624{
625 struct at_dma_chan *atchan = to_at_dma_chan(chan);
626 struct at_dma_slave *atslave = chan->private;
627 struct at_desc *first = NULL;
628 struct at_desc *prev = NULL;
629 u32 ctrla;
630 u32 ctrlb;
631 dma_addr_t reg;
632 unsigned int reg_width;
633 unsigned int mem_width;
634 unsigned int i;
635 struct scatterlist *sg;
636 size_t total_len = 0;
637
638 dev_vdbg(chan2dev(chan), "prep_slave_sg: %s f0x%lx\n",
639 direction == DMA_TO_DEVICE ? "TO DEVICE" : "FROM DEVICE",
640 flags);
641
642 if (unlikely(!atslave || !sg_len)) {
643 dev_dbg(chan2dev(chan), "prep_dma_memcpy: length is zero!\n");
644 return NULL;
645 }
646
647 reg_width = atslave->reg_width;
648
649 sg_len = dma_map_sg(chan2parent(chan), sgl, sg_len, direction);
650
651 ctrla = ATC_DEFAULT_CTRLA | atslave->ctrla;
652 ctrlb = ATC_DEFAULT_CTRLB | ATC_IEN;
653
654 switch (direction) {
655 case DMA_TO_DEVICE:
656 ctrla |= ATC_DST_WIDTH(reg_width);
657 ctrlb |= ATC_DST_ADDR_MODE_FIXED
658 | ATC_SRC_ADDR_MODE_INCR
659 | ATC_FC_MEM2PER;
660 reg = atslave->tx_reg;
661 for_each_sg(sgl, sg, sg_len, i) {
662 struct at_desc *desc;
663 u32 len;
664 u32 mem;
665
666 desc = atc_desc_get(atchan);
667 if (!desc)
668 goto err_desc_get;
669
670 mem = sg_phys(sg);
671 len = sg_dma_len(sg);
672 mem_width = 2;
673 if (unlikely(mem & 3 || len & 3))
674 mem_width = 0;
675
676 desc->lli.saddr = mem;
677 desc->lli.daddr = reg;
678 desc->lli.ctrla = ctrla
679 | ATC_SRC_WIDTH(mem_width)
680 | len >> mem_width;
681 desc->lli.ctrlb = ctrlb;
682
683 if (!first) {
684 first = desc;
685 } else {
686 /* inform the HW lli about chaining */
687 prev->lli.dscr = desc->txd.phys;
688 /* insert the link descriptor to the LD ring */
689 list_add_tail(&desc->desc_node,
690 &first->txd.tx_list);
691 }
692 prev = desc;
693 total_len += len;
694 }
695 break;
696 case DMA_FROM_DEVICE:
697 ctrla |= ATC_SRC_WIDTH(reg_width);
698 ctrlb |= ATC_DST_ADDR_MODE_INCR
699 | ATC_SRC_ADDR_MODE_FIXED
700 | ATC_FC_PER2MEM;
701
702 reg = atslave->rx_reg;
703 for_each_sg(sgl, sg, sg_len, i) {
704 struct at_desc *desc;
705 u32 len;
706 u32 mem;
707
708 desc = atc_desc_get(atchan);
709 if (!desc)
710 goto err_desc_get;
711
712 mem = sg_phys(sg);
713 len = sg_dma_len(sg);
714 mem_width = 2;
715 if (unlikely(mem & 3 || len & 3))
716 mem_width = 0;
717
718 desc->lli.saddr = reg;
719 desc->lli.daddr = mem;
720 desc->lli.ctrla = ctrla
721 | ATC_DST_WIDTH(mem_width)
722 | len >> mem_width;
723 desc->lli.ctrlb = ctrlb;
724
725 if (!first) {
726 first = desc;
727 } else {
728 /* inform the HW lli about chaining */
729 prev->lli.dscr = desc->txd.phys;
730 /* insert the link descriptor to the LD ring */
731 list_add_tail(&desc->desc_node,
732 &first->txd.tx_list);
733 }
734 prev = desc;
735 total_len += len;
736 }
737 break;
738 default:
739 return NULL;
740 }
741
742 /* set end-of-link to the last link descriptor of list*/
743 set_desc_eol(prev);
744
745 /* First descriptor of the chain embedds additional information */
746 first->txd.cookie = -EBUSY;
747 first->len = total_len;
748
749 /* last link descriptor of list is responsible of flags */
750 prev->txd.flags = flags; /* client is in control of this ack */
751
752 return &first->txd;
753
754err_desc_get:
755 dev_err(chan2dev(chan), "not enough descriptors available\n");
756 atc_desc_put(atchan, first);
757 return NULL;
758}
759
760static void atc_terminate_all(struct dma_chan *chan)
761{
762 struct at_dma_chan *atchan = to_at_dma_chan(chan);
763 struct at_dma *atdma = to_at_dma(chan->device);
764 struct at_desc *desc, *_desc;
765 LIST_HEAD(list);
766
767 /*
768 * This is only called when something went wrong elsewhere, so
769 * we don't really care about the data. Just disable the
770 * channel. We still have to poll the channel enable bit due
771 * to AHB/HSB limitations.
772 */
773 spin_lock_bh(&atchan->lock);
774
775 dma_writel(atdma, CHDR, atchan->mask);
776
777 /* confirm that this channel is disabled */
778 while (dma_readl(atdma, CHSR) & atchan->mask)
779 cpu_relax();
780
781 /* active_list entries will end up before queued entries */
782 list_splice_init(&atchan->queue, &list);
783 list_splice_init(&atchan->active_list, &list);
784
785 spin_unlock_bh(&atchan->lock);
786
787 /* Flush all pending and queued descriptors */
788 list_for_each_entry_safe(desc, _desc, &list, desc_node)
789 atc_chain_complete(atchan, desc);
790}
791
792/**
793 * atc_is_tx_complete - poll for transaction completion
794 * @chan: DMA channel
795 * @cookie: transaction identifier to check status of
796 * @done: if not %NULL, updated with last completed transaction
797 * @used: if not %NULL, updated with last used transaction
798 *
799 * If @done and @used are passed in, upon return they reflect the driver
800 * internal state and can be used with dma_async_is_complete() to check
801 * the status of multiple cookies without re-checking hardware state.
802 */
803static enum dma_status
804atc_is_tx_complete(struct dma_chan *chan,
805 dma_cookie_t cookie,
806 dma_cookie_t *done, dma_cookie_t *used)
807{
808 struct at_dma_chan *atchan = to_at_dma_chan(chan);
809 dma_cookie_t last_used;
810 dma_cookie_t last_complete;
811 enum dma_status ret;
812
813 dev_vdbg(chan2dev(chan), "is_tx_complete: %d (d%d, u%d)\n",
814 cookie, done ? *done : 0, used ? *used : 0);
815
816 spin_lock_bh(atchan->lock);
817
818 last_complete = atchan->completed_cookie;
819 last_used = chan->cookie;
820
821 ret = dma_async_is_complete(cookie, last_complete, last_used);
822 if (ret != DMA_SUCCESS) {
823 atc_cleanup_descriptors(atchan);
824
825 last_complete = atchan->completed_cookie;
826 last_used = chan->cookie;
827
828 ret = dma_async_is_complete(cookie, last_complete, last_used);
829 }
830
831 spin_unlock_bh(atchan->lock);
832
833 if (done)
834 *done = last_complete;
835 if (used)
836 *used = last_used;
837
838 return ret;
839}
840
841/**
842 * atc_issue_pending - try to finish work
843 * @chan: target DMA channel
844 */
845static void atc_issue_pending(struct dma_chan *chan)
846{
847 struct at_dma_chan *atchan = to_at_dma_chan(chan);
848
849 dev_vdbg(chan2dev(chan), "issue_pending\n");
850
851 if (!atc_chan_is_enabled(atchan)) {
852 spin_lock_bh(&atchan->lock);
853 atc_advance_work(atchan);
854 spin_unlock_bh(&atchan->lock);
855 }
856}
857
858/**
859 * atc_alloc_chan_resources - allocate resources for DMA channel
860 * @chan: allocate descriptor resources for this channel
861 * @client: current client requesting the channel be ready for requests
862 *
863 * return - the number of allocated descriptors
864 */
865static int atc_alloc_chan_resources(struct dma_chan *chan)
866{
867 struct at_dma_chan *atchan = to_at_dma_chan(chan);
868 struct at_dma *atdma = to_at_dma(chan->device);
869 struct at_desc *desc;
870 struct at_dma_slave *atslave;
871 int i;
872 u32 cfg;
873 LIST_HEAD(tmp_list);
874
875 dev_vdbg(chan2dev(chan), "alloc_chan_resources\n");
876
877 /* ASSERT: channel is idle */
878 if (atc_chan_is_enabled(atchan)) {
879 dev_dbg(chan2dev(chan), "DMA channel not idle ?\n");
880 return -EIO;
881 }
882
883 cfg = ATC_DEFAULT_CFG;
884
885 atslave = chan->private;
886 if (atslave) {
887 /*
888 * We need controller-specific data to set up slave
889 * transfers.
890 */
891 BUG_ON(!atslave->dma_dev || atslave->dma_dev != atdma->dma_common.dev);
892
893 /* if cfg configuration specified take it instad of default */
894 if (atslave->cfg)
895 cfg = atslave->cfg;
896 }
897
898 /* have we already been set up?
899 * reconfigure channel but no need to reallocate descriptors */
900 if (!list_empty(&atchan->free_list))
901 return atchan->descs_allocated;
902
903 /* Allocate initial pool of descriptors */
904 for (i = 0; i < init_nr_desc_per_channel; i++) {
905 desc = atc_alloc_descriptor(chan, GFP_KERNEL);
906 if (!desc) {
907 dev_err(atdma->dma_common.dev,
908 "Only %d initial descriptors\n", i);
909 break;
910 }
911 list_add_tail(&desc->desc_node, &tmp_list);
912 }
913
914 spin_lock_bh(&atchan->lock);
915 atchan->descs_allocated = i;
916 list_splice(&tmp_list, &atchan->free_list);
917 atchan->completed_cookie = chan->cookie = 1;
918 spin_unlock_bh(&atchan->lock);
919
920 /* channel parameters */
921 channel_writel(atchan, CFG, cfg);
922
923 dev_dbg(chan2dev(chan),
924 "alloc_chan_resources: allocated %d descriptors\n",
925 atchan->descs_allocated);
926
927 return atchan->descs_allocated;
928}
929
930/**
931 * atc_free_chan_resources - free all channel resources
932 * @chan: DMA channel
933 */
934static void atc_free_chan_resources(struct dma_chan *chan)
935{
936 struct at_dma_chan *atchan = to_at_dma_chan(chan);
937 struct at_dma *atdma = to_at_dma(chan->device);
938 struct at_desc *desc, *_desc;
939 LIST_HEAD(list);
940
941 dev_dbg(chan2dev(chan), "free_chan_resources: (descs allocated=%u)\n",
942 atchan->descs_allocated);
943
944 /* ASSERT: channel is idle */
945 BUG_ON(!list_empty(&atchan->active_list));
946 BUG_ON(!list_empty(&atchan->queue));
947 BUG_ON(atc_chan_is_enabled(atchan));
948
949 list_for_each_entry_safe(desc, _desc, &atchan->free_list, desc_node) {
950 dev_vdbg(chan2dev(chan), " freeing descriptor %p\n", desc);
951 list_del(&desc->desc_node);
952 /* free link descriptor */
953 dma_pool_free(atdma->dma_desc_pool, desc, desc->txd.phys);
954 }
955 list_splice_init(&atchan->free_list, &list);
956 atchan->descs_allocated = 0;
957
958 dev_vdbg(chan2dev(chan), "free_chan_resources: done\n");
959}
960
961
962/*-- Module Management -----------------------------------------------*/
963
964/**
965 * at_dma_off - disable DMA controller
966 * @atdma: the Atmel HDAMC device
967 */
968static void at_dma_off(struct at_dma *atdma)
969{
970 dma_writel(atdma, EN, 0);
971
972 /* disable all interrupts */
973 dma_writel(atdma, EBCIDR, -1L);
974
975 /* confirm that all channels are disabled */
976 while (dma_readl(atdma, CHSR) & atdma->all_chan_mask)
977 cpu_relax();
978}
979
980static int __init at_dma_probe(struct platform_device *pdev)
981{
982 struct at_dma_platform_data *pdata;
983 struct resource *io;
984 struct at_dma *atdma;
985 size_t size;
986 int irq;
987 int err;
988 int i;
989
990 /* get DMA Controller parameters from platform */
991 pdata = pdev->dev.platform_data;
992 if (!pdata || pdata->nr_channels > AT_DMA_MAX_NR_CHANNELS)
993 return -EINVAL;
994
995 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
996 if (!io)
997 return -EINVAL;
998
999 irq = platform_get_irq(pdev, 0);
1000 if (irq < 0)
1001 return irq;
1002
1003 size = sizeof(struct at_dma);
1004 size += pdata->nr_channels * sizeof(struct at_dma_chan);
1005 atdma = kzalloc(size, GFP_KERNEL);
1006 if (!atdma)
1007 return -ENOMEM;
1008
1009 /* discover transaction capabilites from the platform data */
1010 atdma->dma_common.cap_mask = pdata->cap_mask;
1011 atdma->all_chan_mask = (1 << pdata->nr_channels) - 1;
1012
1013 size = io->end - io->start + 1;
1014 if (!request_mem_region(io->start, size, pdev->dev.driver->name)) {
1015 err = -EBUSY;
1016 goto err_kfree;
1017 }
1018
1019 atdma->regs = ioremap(io->start, size);
1020 if (!atdma->regs) {
1021 err = -ENOMEM;
1022 goto err_release_r;
1023 }
1024
1025 atdma->clk = clk_get(&pdev->dev, "dma_clk");
1026 if (IS_ERR(atdma->clk)) {
1027 err = PTR_ERR(atdma->clk);
1028 goto err_clk;
1029 }
1030 clk_enable(atdma->clk);
1031
1032 /* force dma off, just in case */
1033 at_dma_off(atdma);
1034
1035 err = request_irq(irq, at_dma_interrupt, 0, "at_hdmac", atdma);
1036 if (err)
1037 goto err_irq;
1038
1039 platform_set_drvdata(pdev, atdma);
1040
1041 /* create a pool of consistent memory blocks for hardware descriptors */
1042 atdma->dma_desc_pool = dma_pool_create("at_hdmac_desc_pool",
1043 &pdev->dev, sizeof(struct at_desc),
1044 4 /* word alignment */, 0);
1045 if (!atdma->dma_desc_pool) {
1046 dev_err(&pdev->dev, "No memory for descriptors dma pool\n");
1047 err = -ENOMEM;
1048 goto err_pool_create;
1049 }
1050
1051 /* clear any pending interrupt */
1052 while (dma_readl(atdma, EBCISR))
1053 cpu_relax();
1054
1055 /* initialize channels related values */
1056 INIT_LIST_HEAD(&atdma->dma_common.channels);
1057 for (i = 0; i < pdata->nr_channels; i++, atdma->dma_common.chancnt++) {
1058 struct at_dma_chan *atchan = &atdma->chan[i];
1059
1060 atchan->chan_common.device = &atdma->dma_common;
1061 atchan->chan_common.cookie = atchan->completed_cookie = 1;
1062 atchan->chan_common.chan_id = i;
1063 list_add_tail(&atchan->chan_common.device_node,
1064 &atdma->dma_common.channels);
1065
1066 atchan->ch_regs = atdma->regs + ch_regs(i);
1067 spin_lock_init(&atchan->lock);
1068 atchan->mask = 1 << i;
1069
1070 INIT_LIST_HEAD(&atchan->active_list);
1071 INIT_LIST_HEAD(&atchan->queue);
1072 INIT_LIST_HEAD(&atchan->free_list);
1073
1074 tasklet_init(&atchan->tasklet, atc_tasklet,
1075 (unsigned long)atchan);
1076 atc_enable_irq(atchan);
1077 }
1078
1079 /* set base routines */
1080 atdma->dma_common.device_alloc_chan_resources = atc_alloc_chan_resources;
1081 atdma->dma_common.device_free_chan_resources = atc_free_chan_resources;
1082 atdma->dma_common.device_is_tx_complete = atc_is_tx_complete;
1083 atdma->dma_common.device_issue_pending = atc_issue_pending;
1084 atdma->dma_common.dev = &pdev->dev;
1085
1086 /* set prep routines based on capability */
1087 if (dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask))
1088 atdma->dma_common.device_prep_dma_memcpy = atc_prep_dma_memcpy;
1089
1090 if (dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask)) {
1091 atdma->dma_common.device_prep_slave_sg = atc_prep_slave_sg;
1092 atdma->dma_common.device_terminate_all = atc_terminate_all;
1093 }
1094
1095 dma_writel(atdma, EN, AT_DMA_ENABLE);
1096
1097 dev_info(&pdev->dev, "Atmel AHB DMA Controller ( %s%s), %d channels\n",
1098 dma_has_cap(DMA_MEMCPY, atdma->dma_common.cap_mask) ? "cpy " : "",
1099 dma_has_cap(DMA_SLAVE, atdma->dma_common.cap_mask) ? "slave " : "",
1100 atdma->dma_common.chancnt);
1101
1102 dma_async_device_register(&atdma->dma_common);
1103
1104 return 0;
1105
1106err_pool_create:
1107 platform_set_drvdata(pdev, NULL);
1108 free_irq(platform_get_irq(pdev, 0), atdma);
1109err_irq:
1110 clk_disable(atdma->clk);
1111 clk_put(atdma->clk);
1112err_clk:
1113 iounmap(atdma->regs);
1114 atdma->regs = NULL;
1115err_release_r:
1116 release_mem_region(io->start, size);
1117err_kfree:
1118 kfree(atdma);
1119 return err;
1120}
1121
1122static int __exit at_dma_remove(struct platform_device *pdev)
1123{
1124 struct at_dma *atdma = platform_get_drvdata(pdev);
1125 struct dma_chan *chan, *_chan;
1126 struct resource *io;
1127
1128 at_dma_off(atdma);
1129 dma_async_device_unregister(&atdma->dma_common);
1130
1131 dma_pool_destroy(atdma->dma_desc_pool);
1132 platform_set_drvdata(pdev, NULL);
1133 free_irq(platform_get_irq(pdev, 0), atdma);
1134
1135 list_for_each_entry_safe(chan, _chan, &atdma->dma_common.channels,
1136 device_node) {
1137 struct at_dma_chan *atchan = to_at_dma_chan(chan);
1138
1139 /* Disable interrupts */
1140 atc_disable_irq(atchan);
1141 tasklet_disable(&atchan->tasklet);
1142
1143 tasklet_kill(&atchan->tasklet);
1144 list_del(&chan->device_node);
1145 }
1146
1147 clk_disable(atdma->clk);
1148 clk_put(atdma->clk);
1149
1150 iounmap(atdma->regs);
1151 atdma->regs = NULL;
1152
1153 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1154 release_mem_region(io->start, io->end - io->start + 1);
1155
1156 kfree(atdma);
1157
1158 return 0;
1159}
1160
1161static void at_dma_shutdown(struct platform_device *pdev)
1162{
1163 struct at_dma *atdma = platform_get_drvdata(pdev);
1164
1165 at_dma_off(platform_get_drvdata(pdev));
1166 clk_disable(atdma->clk);
1167}
1168
1169static int at_dma_suspend_late(struct platform_device *pdev, pm_message_t mesg)
1170{
1171 struct at_dma *atdma = platform_get_drvdata(pdev);
1172
1173 at_dma_off(platform_get_drvdata(pdev));
1174 clk_disable(atdma->clk);
1175 return 0;
1176}
1177
1178static int at_dma_resume_early(struct platform_device *pdev)
1179{
1180 struct at_dma *atdma = platform_get_drvdata(pdev);
1181
1182 clk_enable(atdma->clk);
1183 dma_writel(atdma, EN, AT_DMA_ENABLE);
1184 return 0;
1185
1186}
1187
1188static struct platform_driver at_dma_driver = {
1189 .remove = __exit_p(at_dma_remove),
1190 .shutdown = at_dma_shutdown,
1191 .suspend_late = at_dma_suspend_late,
1192 .resume_early = at_dma_resume_early,
1193 .driver = {
1194 .name = "at_hdmac",
1195 },
1196};
1197
1198static int __init at_dma_init(void)
1199{
1200 return platform_driver_probe(&at_dma_driver, at_dma_probe);
1201}
1202module_init(at_dma_init);
1203
1204static void __exit at_dma_exit(void)
1205{
1206 platform_driver_unregister(&at_dma_driver);
1207}
1208module_exit(at_dma_exit);
1209
1210MODULE_DESCRIPTION("Atmel AHB DMA Controller driver");
1211MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>");
1212MODULE_LICENSE("GPL");
1213MODULE_ALIAS("platform:at_hdmac");
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
new file mode 100644
index 000000000000..4c972afc49ec
--- /dev/null
+++ b/drivers/dma/at_hdmac_regs.h
@@ -0,0 +1,353 @@
1/*
2 * Header file for the Atmel AHB DMA Controller driver
3 *
4 * Copyright (C) 2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11#ifndef AT_HDMAC_REGS_H
12#define AT_HDMAC_REGS_H
13
14#include <mach/at_hdmac.h>
15
16#define AT_DMA_MAX_NR_CHANNELS 8
17
18
19#define AT_DMA_GCFG 0x00 /* Global Configuration Register */
20#define AT_DMA_IF_BIGEND(i) (0x1 << (i)) /* AHB-Lite Interface i in Big-endian mode */
21#define AT_DMA_ARB_CFG (0x1 << 4) /* Arbiter mode. */
22#define AT_DMA_ARB_CFG_FIXED (0x0 << 4)
23#define AT_DMA_ARB_CFG_ROUND_ROBIN (0x1 << 4)
24
25#define AT_DMA_EN 0x04 /* Controller Enable Register */
26#define AT_DMA_ENABLE (0x1 << 0)
27
28#define AT_DMA_SREQ 0x08 /* Software Single Request Register */
29#define AT_DMA_SSREQ(x) (0x1 << ((x) << 1)) /* Request a source single transfer on channel x */
30#define AT_DMA_DSREQ(x) (0x1 << (1 + ((x) << 1))) /* Request a destination single transfer on channel x */
31
32#define AT_DMA_CREQ 0x0C /* Software Chunk Transfer Request Register */
33#define AT_DMA_SCREQ(x) (0x1 << ((x) << 1)) /* Request a source chunk transfer on channel x */
34#define AT_DMA_DCREQ(x) (0x1 << (1 + ((x) << 1))) /* Request a destination chunk transfer on channel x */
35
36#define AT_DMA_LAST 0x10 /* Software Last Transfer Flag Register */
37#define AT_DMA_SLAST(x) (0x1 << ((x) << 1)) /* This src rq is last tx of buffer on channel x */
38#define AT_DMA_DLAST(x) (0x1 << (1 + ((x) << 1))) /* This dst rq is last tx of buffer on channel x */
39
40#define AT_DMA_SYNC 0x14 /* Request Synchronization Register */
41#define AT_DMA_SYR(h) (0x1 << (h)) /* Synchronize handshake line h */
42
43/* Error, Chained Buffer transfer completed and Buffer transfer completed Interrupt registers */
44#define AT_DMA_EBCIER 0x18 /* Enable register */
45#define AT_DMA_EBCIDR 0x1C /* Disable register */
46#define AT_DMA_EBCIMR 0x20 /* Mask Register */
47#define AT_DMA_EBCISR 0x24 /* Status Register */
48#define AT_DMA_CBTC_OFFSET 8
49#define AT_DMA_ERR_OFFSET 16
50#define AT_DMA_BTC(x) (0x1 << (x))
51#define AT_DMA_CBTC(x) (0x1 << (AT_DMA_CBTC_OFFSET + (x)))
52#define AT_DMA_ERR(x) (0x1 << (AT_DMA_ERR_OFFSET + (x)))
53
54#define AT_DMA_CHER 0x28 /* Channel Handler Enable Register */
55#define AT_DMA_ENA(x) (0x1 << (x))
56#define AT_DMA_SUSP(x) (0x1 << ( 8 + (x)))
57#define AT_DMA_KEEP(x) (0x1 << (24 + (x)))
58
59#define AT_DMA_CHDR 0x2C /* Channel Handler Disable Register */
60#define AT_DMA_DIS(x) (0x1 << (x))
61#define AT_DMA_RES(x) (0x1 << ( 8 + (x)))
62
63#define AT_DMA_CHSR 0x30 /* Channel Handler Status Register */
64#define AT_DMA_EMPT(x) (0x1 << (16 + (x)))
65#define AT_DMA_STAL(x) (0x1 << (24 + (x)))
66
67
68#define AT_DMA_CH_REGS_BASE 0x3C /* Channel registers base address */
69#define ch_regs(x) (AT_DMA_CH_REGS_BASE + (x) * 0x28) /* Channel x base addr */
70
71/* Hardware register offset for each channel */
72#define ATC_SADDR_OFFSET 0x00 /* Source Address Register */
73#define ATC_DADDR_OFFSET 0x04 /* Destination Address Register */
74#define ATC_DSCR_OFFSET 0x08 /* Descriptor Address Register */
75#define ATC_CTRLA_OFFSET 0x0C /* Control A Register */
76#define ATC_CTRLB_OFFSET 0x10 /* Control B Register */
77#define ATC_CFG_OFFSET 0x14 /* Configuration Register */
78#define ATC_SPIP_OFFSET 0x18 /* Src PIP Configuration Register */
79#define ATC_DPIP_OFFSET 0x1C /* Dst PIP Configuration Register */
80
81
82/* Bitfield definitions */
83
84/* Bitfields in DSCR */
85#define ATC_DSCR_IF(i) (0x3 & (i)) /* Dsc feched via AHB-Lite Interface i */
86
87/* Bitfields in CTRLA */
88#define ATC_BTSIZE_MAX 0xFFFFUL /* Maximum Buffer Transfer Size */
89#define ATC_BTSIZE(x) (ATC_BTSIZE_MAX & (x)) /* Buffer Transfer Size */
90/* Chunck Tranfer size definitions are in at_hdmac.h */
91#define ATC_SRC_WIDTH_MASK (0x3 << 24) /* Source Single Transfer Size */
92#define ATC_SRC_WIDTH(x) ((x) << 24)
93#define ATC_SRC_WIDTH_BYTE (0x0 << 24)
94#define ATC_SRC_WIDTH_HALFWORD (0x1 << 24)
95#define ATC_SRC_WIDTH_WORD (0x2 << 24)
96#define ATC_DST_WIDTH_MASK (0x3 << 28) /* Destination Single Transfer Size */
97#define ATC_DST_WIDTH(x) ((x) << 28)
98#define ATC_DST_WIDTH_BYTE (0x0 << 28)
99#define ATC_DST_WIDTH_HALFWORD (0x1 << 28)
100#define ATC_DST_WIDTH_WORD (0x2 << 28)
101#define ATC_DONE (0x1 << 31) /* Tx Done (only written back in descriptor) */
102
103/* Bitfields in CTRLB */
104#define ATC_SIF(i) (0x3 & (i)) /* Src tx done via AHB-Lite Interface i */
105#define ATC_DIF(i) ((0x3 & (i)) << 4) /* Dst tx done via AHB-Lite Interface i */
106#define ATC_SRC_PIP (0x1 << 8) /* Source Picture-in-Picture enabled */
107#define ATC_DST_PIP (0x1 << 12) /* Destination Picture-in-Picture enabled */
108#define ATC_SRC_DSCR_DIS (0x1 << 16) /* Src Descriptor fetch disable */
109#define ATC_DST_DSCR_DIS (0x1 << 20) /* Dst Descriptor fetch disable */
110#define ATC_FC_MASK (0x7 << 21) /* Choose Flow Controller */
111#define ATC_FC_MEM2MEM (0x0 << 21) /* Mem-to-Mem (DMA) */
112#define ATC_FC_MEM2PER (0x1 << 21) /* Mem-to-Periph (DMA) */
113#define ATC_FC_PER2MEM (0x2 << 21) /* Periph-to-Mem (DMA) */
114#define ATC_FC_PER2PER (0x3 << 21) /* Periph-to-Periph (DMA) */
115#define ATC_FC_PER2MEM_PER (0x4 << 21) /* Periph-to-Mem (Peripheral) */
116#define ATC_FC_MEM2PER_PER (0x5 << 21) /* Mem-to-Periph (Peripheral) */
117#define ATC_FC_PER2PER_SRCPER (0x6 << 21) /* Periph-to-Periph (Src Peripheral) */
118#define ATC_FC_PER2PER_DSTPER (0x7 << 21) /* Periph-to-Periph (Dst Peripheral) */
119#define ATC_SRC_ADDR_MODE_MASK (0x3 << 24)
120#define ATC_SRC_ADDR_MODE_INCR (0x0 << 24) /* Incrementing Mode */
121#define ATC_SRC_ADDR_MODE_DECR (0x1 << 24) /* Decrementing Mode */
122#define ATC_SRC_ADDR_MODE_FIXED (0x2 << 24) /* Fixed Mode */
123#define ATC_DST_ADDR_MODE_MASK (0x3 << 28)
124#define ATC_DST_ADDR_MODE_INCR (0x0 << 28) /* Incrementing Mode */
125#define ATC_DST_ADDR_MODE_DECR (0x1 << 28) /* Decrementing Mode */
126#define ATC_DST_ADDR_MODE_FIXED (0x2 << 28) /* Fixed Mode */
127#define ATC_IEN (0x1 << 30) /* BTC interrupt enable (active low) */
128#define ATC_AUTO (0x1 << 31) /* Auto multiple buffer tx enable */
129
130/* Bitfields in CFG */
131/* are in at_hdmac.h */
132
133/* Bitfields in SPIP */
134#define ATC_SPIP_HOLE(x) (0xFFFFU & (x))
135#define ATC_SPIP_BOUNDARY(x) ((0x3FF & (x)) << 16)
136
137/* Bitfields in DPIP */
138#define ATC_DPIP_HOLE(x) (0xFFFFU & (x))
139#define ATC_DPIP_BOUNDARY(x) ((0x3FF & (x)) << 16)
140
141
142/*-- descriptors -----------------------------------------------------*/
143
144/* LLI == Linked List Item; aka DMA buffer descriptor */
145struct at_lli {
146 /* values that are not changed by hardware */
147 dma_addr_t saddr;
148 dma_addr_t daddr;
149 /* value that may get written back: */
150 u32 ctrla;
151 /* more values that are not changed by hardware */
152 u32 ctrlb;
153 dma_addr_t dscr; /* chain to next lli */
154};
155
156/**
157 * struct at_desc - software descriptor
158 * @at_lli: hardware lli structure
159 * @txd: support for the async_tx api
160 * @desc_node: node on the channed descriptors list
161 * @len: total transaction bytecount
162 */
163struct at_desc {
164 /* FIRST values the hardware uses */
165 struct at_lli lli;
166
167 /* THEN values for driver housekeeping */
168 struct dma_async_tx_descriptor txd;
169 struct list_head desc_node;
170 size_t len;
171};
172
173static inline struct at_desc *
174txd_to_at_desc(struct dma_async_tx_descriptor *txd)
175{
176 return container_of(txd, struct at_desc, txd);
177}
178
179
180/*-- Channels --------------------------------------------------------*/
181
182/**
183 * struct at_dma_chan - internal representation of an Atmel HDMAC channel
184 * @chan_common: common dmaengine channel object members
185 * @device: parent device
186 * @ch_regs: memory mapped register base
187 * @mask: channel index in a mask
188 * @error_status: transmit error status information from irq handler
189 * to tasklet (use atomic operations)
190 * @tasklet: bottom half to finish transaction work
191 * @lock: serializes enqueue/dequeue operations to descriptors lists
192 * @completed_cookie: identifier for the most recently completed operation
193 * @active_list: list of descriptors dmaengine is being running on
194 * @queue: list of descriptors ready to be submitted to engine
195 * @free_list: list of descriptors usable by the channel
196 * @descs_allocated: records the actual size of the descriptor pool
197 */
198struct at_dma_chan {
199 struct dma_chan chan_common;
200 struct at_dma *device;
201 void __iomem *ch_regs;
202 u8 mask;
203 unsigned long error_status;
204 struct tasklet_struct tasklet;
205
206 spinlock_t lock;
207
208 /* these other elements are all protected by lock */
209 dma_cookie_t completed_cookie;
210 struct list_head active_list;
211 struct list_head queue;
212 struct list_head free_list;
213 unsigned int descs_allocated;
214};
215
216#define channel_readl(atchan, name) \
217 __raw_readl((atchan)->ch_regs + ATC_##name##_OFFSET)
218
219#define channel_writel(atchan, name, val) \
220 __raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET)
221
222static inline struct at_dma_chan *to_at_dma_chan(struct dma_chan *dchan)
223{
224 return container_of(dchan, struct at_dma_chan, chan_common);
225}
226
227
228/*-- Controller ------------------------------------------------------*/
229
230/**
231 * struct at_dma - internal representation of an Atmel HDMA Controller
232 * @chan_common: common dmaengine dma_device object members
233 * @ch_regs: memory mapped register base
234 * @clk: dma controller clock
235 * @all_chan_mask: all channels availlable in a mask
236 * @dma_desc_pool: base of DMA descriptor region (DMA address)
237 * @chan: channels table to store at_dma_chan structures
238 */
239struct at_dma {
240 struct dma_device dma_common;
241 void __iomem *regs;
242 struct clk *clk;
243
244 u8 all_chan_mask;
245
246 struct dma_pool *dma_desc_pool;
247 /* AT THE END channels table */
248 struct at_dma_chan chan[0];
249};
250
251#define dma_readl(atdma, name) \
252 __raw_readl((atdma)->regs + AT_DMA_##name)
253#define dma_writel(atdma, name, val) \
254 __raw_writel((val), (atdma)->regs + AT_DMA_##name)
255
256static inline struct at_dma *to_at_dma(struct dma_device *ddev)
257{
258 return container_of(ddev, struct at_dma, dma_common);
259}
260
261
262/*-- Helper functions ------------------------------------------------*/
263
264static struct device *chan2dev(struct dma_chan *chan)
265{
266 return &chan->dev->device;
267}
268static struct device *chan2parent(struct dma_chan *chan)
269{
270 return chan->dev->device.parent;
271}
272
273#if defined(VERBOSE_DEBUG)
274static void vdbg_dump_regs(struct at_dma_chan *atchan)
275{
276 struct at_dma *atdma = to_at_dma(atchan->chan_common.device);
277
278 dev_err(chan2dev(&atchan->chan_common),
279 " channel %d : imr = 0x%x, chsr = 0x%x\n",
280 atchan->chan_common.chan_id,
281 dma_readl(atdma, EBCIMR),
282 dma_readl(atdma, CHSR));
283
284 dev_err(chan2dev(&atchan->chan_common),
285 " channel: s0x%x d0x%x ctrl0x%x:0x%x cfg0x%x l0x%x\n",
286 channel_readl(atchan, SADDR),
287 channel_readl(atchan, DADDR),
288 channel_readl(atchan, CTRLA),
289 channel_readl(atchan, CTRLB),
290 channel_readl(atchan, CFG),
291 channel_readl(atchan, DSCR));
292}
293#else
294static void vdbg_dump_regs(struct at_dma_chan *atchan) {}
295#endif
296
297static void atc_dump_lli(struct at_dma_chan *atchan, struct at_lli *lli)
298{
299 dev_printk(KERN_CRIT, chan2dev(&atchan->chan_common),
300 " desc: s0x%x d0x%x ctrl0x%x:0x%x l0x%x\n",
301 lli->saddr, lli->daddr,
302 lli->ctrla, lli->ctrlb, lli->dscr);
303}
304
305
306static void atc_setup_irq(struct at_dma_chan *atchan, int on)
307{
308 struct at_dma *atdma = to_at_dma(atchan->chan_common.device);
309 u32 ebci;
310
311 /* enable interrupts on buffer chain completion & error */
312 ebci = AT_DMA_CBTC(atchan->chan_common.chan_id)
313 | AT_DMA_ERR(atchan->chan_common.chan_id);
314 if (on)
315 dma_writel(atdma, EBCIER, ebci);
316 else
317 dma_writel(atdma, EBCIDR, ebci);
318}
319
320static inline void atc_enable_irq(struct at_dma_chan *atchan)
321{
322 atc_setup_irq(atchan, 1);
323}
324
325static inline void atc_disable_irq(struct at_dma_chan *atchan)
326{
327 atc_setup_irq(atchan, 0);
328}
329
330
331/**
332 * atc_chan_is_enabled - test if given channel is enabled
333 * @atchan: channel we want to test status
334 */
335static inline int atc_chan_is_enabled(struct at_dma_chan *atchan)
336{
337 struct at_dma *atdma = to_at_dma(atchan->chan_common.device);
338
339 return !!(dma_readl(atdma, CHSR) & atchan->mask);
340}
341
342
343/**
344 * set_desc_eol - set end-of-link to descriptor so it will end transfer
345 * @desc: descriptor, signle or at the end of a chain, to end chain on
346 */
347static void set_desc_eol(struct at_desc *desc)
348{
349 desc->lli.ctrlb |= ATC_SRC_DSCR_DIS | ATC_DST_DSCR_DIS;
350 desc->lli.dscr = 0;
351}
352
353#endif /* AT_HDMAC_REGS_H */
diff --git a/drivers/dma/dmatest.c b/drivers/dma/dmatest.c
index fb7da5141e96..d93017fc7872 100644
--- a/drivers/dma/dmatest.c
+++ b/drivers/dma/dmatest.c
@@ -38,6 +38,11 @@ module_param(max_channels, uint, S_IRUGO);
38MODULE_PARM_DESC(max_channels, 38MODULE_PARM_DESC(max_channels,
39 "Maximum number of channels to use (default: all)"); 39 "Maximum number of channels to use (default: all)");
40 40
41static unsigned int iterations;
42module_param(iterations, uint, S_IRUGO);
43MODULE_PARM_DESC(iterations,
44 "Iterations before stopping test (default: infinite)");
45
41static unsigned int xor_sources = 3; 46static unsigned int xor_sources = 3;
42module_param(xor_sources, uint, S_IRUGO); 47module_param(xor_sources, uint, S_IRUGO);
43MODULE_PARM_DESC(xor_sources, 48MODULE_PARM_DESC(xor_sources,
@@ -114,7 +119,7 @@ static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len)
114 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); 119 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
115 for ( ; i < start + len; i++) 120 for ( ; i < start + len; i++)
116 buf[i] = PATTERN_SRC | PATTERN_COPY 121 buf[i] = PATTERN_SRC | PATTERN_COPY
117 | (~i & PATTERN_COUNT_MASK);; 122 | (~i & PATTERN_COUNT_MASK);
118 for ( ; i < test_buf_size; i++) 123 for ( ; i < test_buf_size; i++)
119 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK); 124 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
120 buf++; 125 buf++;
@@ -270,7 +275,8 @@ static int dmatest_func(void *data)
270 275
271 flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT; 276 flags = DMA_CTRL_ACK | DMA_COMPL_SKIP_DEST_UNMAP | DMA_PREP_INTERRUPT;
272 277
273 while (!kthread_should_stop()) { 278 while (!kthread_should_stop()
279 && !(iterations && total_tests >= iterations)) {
274 struct dma_device *dev = chan->device; 280 struct dma_device *dev = chan->device;
275 struct dma_async_tx_descriptor *tx = NULL; 281 struct dma_async_tx_descriptor *tx = NULL;
276 dma_addr_t dma_srcs[src_cnt]; 282 dma_addr_t dma_srcs[src_cnt];
@@ -416,6 +422,13 @@ err_srcbuf:
416err_srcs: 422err_srcs:
417 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n", 423 pr_notice("%s: terminating after %u tests, %u failures (status %d)\n",
418 thread_name, total_tests, failed_tests, ret); 424 thread_name, total_tests, failed_tests, ret);
425
426 if (iterations > 0)
427 while (!kthread_should_stop()) {
428 DECLARE_WAIT_QUEUE_HEAD(wait_dmatest_exit);
429 interruptible_sleep_on(&wait_dmatest_exit);
430 }
431
419 return ret; 432 return ret;
420} 433}
421 434
@@ -495,11 +508,11 @@ static int dmatest_add_channel(struct dma_chan *chan)
495 508
496 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) { 509 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
497 cnt = dmatest_add_threads(dtc, DMA_MEMCPY); 510 cnt = dmatest_add_threads(dtc, DMA_MEMCPY);
498 thread_count += cnt > 0 ?: 0; 511 thread_count += cnt > 0 ? cnt : 0;
499 } 512 }
500 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { 513 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
501 cnt = dmatest_add_threads(dtc, DMA_XOR); 514 cnt = dmatest_add_threads(dtc, DMA_XOR);
502 thread_count += cnt > 0 ?: 0; 515 thread_count += cnt > 0 ? cnt : 0;
503 } 516 }
504 517
505 pr_info("dmatest: Started %u threads using %s\n", 518 pr_info("dmatest: Started %u threads using %s\n",
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index f18d1bde0439..ef87a8984145 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -12,6 +12,11 @@
12 * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc. 12 * also fit for MPC8560, MPC8555, MPC8548, MPC8641, and etc.
13 * The support for MPC8349 DMA contorller is also added. 13 * The support for MPC8349 DMA contorller is also added.
14 * 14 *
15 * This driver instructs the DMA controller to issue the PCI Read Multiple
16 * command for PCI read operations, instead of using the default PCI Read Line
17 * command. Please be aware that this setting may result in read pre-fetching
18 * on some platforms.
19 *
15 * This is free software; you can redistribute it and/or modify 20 * This is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by 21 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or 22 * the Free Software Foundation; either version 2 of the License, or
@@ -49,9 +54,10 @@ static void dma_init(struct fsl_dma_chan *fsl_chan)
49 case FSL_DMA_IP_83XX: 54 case FSL_DMA_IP_83XX:
50 /* Set the channel to below modes: 55 /* Set the channel to below modes:
51 * EOTIE - End-of-transfer interrupt enable 56 * EOTIE - End-of-transfer interrupt enable
57 * PRC_RM - PCI read multiple
52 */ 58 */
53 DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, FSL_DMA_MR_EOTIE, 59 DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, FSL_DMA_MR_EOTIE
54 32); 60 | FSL_DMA_MR_PRC_RM, 32);
55 break; 61 break;
56 } 62 }
57 63
@@ -136,15 +142,16 @@ static int dma_is_idle(struct fsl_dma_chan *fsl_chan)
136 142
137static void dma_start(struct fsl_dma_chan *fsl_chan) 143static void dma_start(struct fsl_dma_chan *fsl_chan)
138{ 144{
139 u32 mr_set = 0;; 145 u32 mr_set = 0;
140 146
141 if (fsl_chan->feature & FSL_DMA_CHAN_PAUSE_EXT) { 147 if (fsl_chan->feature & FSL_DMA_CHAN_PAUSE_EXT) {
142 DMA_OUT(fsl_chan, &fsl_chan->reg_base->bcr, 0, 32); 148 DMA_OUT(fsl_chan, &fsl_chan->reg_base->bcr, 0, 32);
143 mr_set |= FSL_DMA_MR_EMP_EN; 149 mr_set |= FSL_DMA_MR_EMP_EN;
144 } else 150 } else if ((fsl_chan->feature & FSL_DMA_IP_MASK) == FSL_DMA_IP_85XX) {
145 DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr, 151 DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
146 DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32) 152 DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32)
147 & ~FSL_DMA_MR_EMP_EN, 32); 153 & ~FSL_DMA_MR_EMP_EN, 32);
154 }
148 155
149 if (fsl_chan->feature & FSL_DMA_CHAN_START_EXT) 156 if (fsl_chan->feature & FSL_DMA_CHAN_START_EXT)
150 mr_set |= FSL_DMA_MR_EMS_EN; 157 mr_set |= FSL_DMA_MR_EMS_EN;
@@ -871,9 +878,9 @@ static int __devinit fsl_dma_chan_probe(struct fsl_dma_device *fdev,
871 878
872 switch (new_fsl_chan->feature & FSL_DMA_IP_MASK) { 879 switch (new_fsl_chan->feature & FSL_DMA_IP_MASK) {
873 case FSL_DMA_IP_85XX: 880 case FSL_DMA_IP_85XX:
874 new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start;
875 new_fsl_chan->toggle_ext_pause = fsl_chan_toggle_ext_pause; 881 new_fsl_chan->toggle_ext_pause = fsl_chan_toggle_ext_pause;
876 case FSL_DMA_IP_83XX: 882 case FSL_DMA_IP_83XX:
883 new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start;
877 new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size; 884 new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size;
878 new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size; 885 new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size;
879 } 886 }
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index 4f21a512d848..dc7f26865797 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -38,6 +38,7 @@
38 38
39/* Special MR definition for MPC8349 */ 39/* Special MR definition for MPC8349 */
40#define FSL_DMA_MR_EOTIE 0x00000080 40#define FSL_DMA_MR_EOTIE 0x00000080
41#define FSL_DMA_MR_PRC_RM 0x00000800
41 42
42#define FSL_DMA_SR_CH 0x00000020 43#define FSL_DMA_SR_CH 0x00000020
43#define FSL_DMA_SR_PE 0x00000010 44#define FSL_DMA_SR_PE 0x00000010
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index ddab94f51224..3f23eabe09f2 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -1176,7 +1176,7 @@ static int __devinit mv_xor_probe(struct platform_device *pdev)
1176 if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask)) 1176 if (dma_has_cap(DMA_MEMSET, dma_dev->cap_mask))
1177 dma_dev->device_prep_dma_memset = mv_xor_prep_dma_memset; 1177 dma_dev->device_prep_dma_memset = mv_xor_prep_dma_memset;
1178 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) { 1178 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
1179 dma_dev->max_xor = 8; ; 1179 dma_dev->max_xor = 8;
1180 dma_dev->device_prep_dma_xor = mv_xor_prep_dma_xor; 1180 dma_dev->device_prep_dma_xor = mv_xor_prep_dma_xor;
1181 } 1181 }
1182 1182
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 858fe6037223..e2a10bcba7a1 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -868,6 +868,8 @@ static void amd64_read_dbam_reg(struct amd64_pvt *pvt)
868 goto err_reg; 868 goto err_reg;
869 } 869 }
870 870
871 return;
872
871err_reg: 873err_reg:
872 debugf0("Error reading F2x%03x.\n", reg); 874 debugf0("Error reading F2x%03x.\n", reg);
873} 875}
@@ -970,7 +972,7 @@ static void amd64_read_dct_base_mask(struct amd64_pvt *pvt)
970 } 972 }
971 973
972 for (cs = 0; cs < pvt->num_dcsm; cs++) { 974 for (cs = 0; cs < pvt->num_dcsm; cs++) {
973 reg = K8_DCSB0 + (cs * 4); 975 reg = K8_DCSM0 + (cs * 4);
974 err = pci_read_config_dword(pvt->dram_f2_ctl, reg, 976 err = pci_read_config_dword(pvt->dram_f2_ctl, reg,
975 &pvt->dcsm0[cs]); 977 &pvt->dcsm0[cs]);
976 if (unlikely(err)) 978 if (unlikely(err))
@@ -2634,6 +2636,8 @@ static void amd64_read_mc_registers(struct amd64_pvt *pvt)
2634 2636
2635 amd64_dump_misc_regs(pvt); 2637 amd64_dump_misc_regs(pvt);
2636 2638
2639 return;
2640
2637err_reg: 2641err_reg:
2638 debugf0("Reading an MC register failed\n"); 2642 debugf0("Reading an MC register failed\n");
2639 2643
@@ -2977,6 +2981,9 @@ static int amd64_check_ecc_enabled(struct amd64_pvt *pvt)
2977 "ECC is enabled by BIOS, Proceeding " 2981 "ECC is enabled by BIOS, Proceeding "
2978 "with EDAC module initialization\n"); 2982 "with EDAC module initialization\n");
2979 2983
2984 /* Signal good ECC status */
2985 ret = 0;
2986
2980 /* CLEAR the override, since BIOS controlled it */ 2987 /* CLEAR the override, since BIOS controlled it */
2981 ecc_enable_override = 0; 2988 ecc_enable_override = 0;
2982 } 2989 }
diff --git a/drivers/edac/x38_edac.c b/drivers/edac/x38_edac.c
index 2406c2ce2844..d4ec60593176 100644
--- a/drivers/edac/x38_edac.c
+++ b/drivers/edac/x38_edac.c
@@ -30,7 +30,7 @@
30/* Intel X38 register addresses - device 0 function 0 - DRAM Controller */ 30/* Intel X38 register addresses - device 0 function 0 - DRAM Controller */
31 31
32#define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */ 32#define X38_MCHBAR_LOW 0x48 /* MCH Memory Mapped Register BAR */
33#define X38_MCHBAR_HIGH 0x4b 33#define X38_MCHBAR_HIGH 0x4c
34#define X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */ 34#define X38_MCHBAR_MASK 0xfffffc000ULL /* bits 35:14 */
35#define X38_MMR_WINDOW_SIZE 16384 35#define X38_MMR_WINDOW_SIZE 16384
36 36
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 8fab7890a363..33be210d6723 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -1461,7 +1461,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
1461 goto out; 1461 goto out;
1462 } 1462 }
1463 1463
1464 if (crtc_req->count_connectors > 0 && !mode && !fb) { 1464 if (crtc_req->count_connectors > 0 && (!mode || !fb)) {
1465 DRM_DEBUG("Count connectors is %d but no mode or fb set\n", 1465 DRM_DEBUG("Count connectors is %d but no mode or fb set\n",
1466 crtc_req->count_connectors); 1466 crtc_req->count_connectors);
1467 ret = -EINVAL; 1467 ret = -EINVAL;
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 3da9cfa31848..6aaa2cb23365 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -706,8 +706,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
706 struct drm_encoder **save_encoders, *new_encoder; 706 struct drm_encoder **save_encoders, *new_encoder;
707 struct drm_framebuffer *old_fb = NULL; 707 struct drm_framebuffer *old_fb = NULL;
708 bool save_enabled; 708 bool save_enabled;
709 bool mode_changed = false; 709 bool mode_changed = false; /* if true do a full mode set */
710 bool fb_changed = false; 710 bool fb_changed = false; /* if true and !mode_changed just do a flip */
711 struct drm_connector *connector; 711 struct drm_connector *connector;
712 int count = 0, ro, fail = 0; 712 int count = 0, ro, fail = 0;
713 struct drm_crtc_helper_funcs *crtc_funcs; 713 struct drm_crtc_helper_funcs *crtc_funcs;
@@ -758,6 +758,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
758 if (set->crtc->fb == NULL) { 758 if (set->crtc->fb == NULL) {
759 DRM_DEBUG("crtc has no fb, full mode set\n"); 759 DRM_DEBUG("crtc has no fb, full mode set\n");
760 mode_changed = true; 760 mode_changed = true;
761 } else if (set->fb == NULL) {
762 mode_changed = true;
761 } else if ((set->fb->bits_per_pixel != 763 } else if ((set->fb->bits_per_pixel !=
762 set->crtc->fb->bits_per_pixel) || 764 set->crtc->fb->bits_per_pixel) ||
763 set->fb->depth != set->crtc->fb->depth) 765 set->fb->depth != set->crtc->fb->depth)
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index b4a3dbcebe9b..f85aaf21e783 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -566,7 +566,7 @@ int drm_wait_vblank(struct drm_device *dev, void *data,
566 566
567 ret = drm_vblank_get(dev, crtc); 567 ret = drm_vblank_get(dev, crtc);
568 if (ret) { 568 if (ret) {
569 DRM_ERROR("failed to acquire vblank counter, %d\n", ret); 569 DRM_DEBUG("failed to acquire vblank counter, %d\n", ret);
570 return ret; 570 return ret;
571 } 571 }
572 seq = drm_vblank_count(dev, crtc); 572 seq = drm_vblank_count(dev, crtc);
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 54f492a488a9..7914097b09c6 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -566,6 +566,8 @@ void drm_mode_connector_list_update(struct drm_connector *connector)
566 found_it = 1; 566 found_it = 1;
567 /* if equal delete the probed mode */ 567 /* if equal delete the probed mode */
568 mode->status = pmode->status; 568 mode->status = pmode->status;
569 /* Merge type bits together */
570 mode->type |= pmode->type;
569 list_del(&pmode->head); 571 list_del(&pmode->head);
570 drm_mode_destroy(connector->dev, pmode); 572 drm_mode_destroy(connector->dev, pmode);
571 break; 573 break;
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 8c4783180bf6..50d1f782768c 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1186,6 +1186,13 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1186 if (ret) 1186 if (ret)
1187 goto out_iomapfree; 1187 goto out_iomapfree;
1188 1188
1189 dev_priv->wq = create_workqueue("i915");
1190 if (dev_priv->wq == NULL) {
1191 DRM_ERROR("Failed to create our workqueue.\n");
1192 ret = -ENOMEM;
1193 goto out_iomapfree;
1194 }
1195
1189 /* enable GEM by default */ 1196 /* enable GEM by default */
1190 dev_priv->has_gem = 1; 1197 dev_priv->has_gem = 1;
1191 1198
@@ -1211,7 +1218,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1211 if (!I915_NEED_GFX_HWS(dev)) { 1218 if (!I915_NEED_GFX_HWS(dev)) {
1212 ret = i915_init_phys_hws(dev); 1219 ret = i915_init_phys_hws(dev);
1213 if (ret != 0) 1220 if (ret != 0)
1214 goto out_iomapfree; 1221 goto out_workqueue_free;
1215 } 1222 }
1216 1223
1217 i915_get_mem_freq(dev); 1224 i915_get_mem_freq(dev);
@@ -1245,7 +1252,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1245 ret = i915_load_modeset_init(dev, prealloc_size, agp_size); 1252 ret = i915_load_modeset_init(dev, prealloc_size, agp_size);
1246 if (ret < 0) { 1253 if (ret < 0) {
1247 DRM_ERROR("failed to init modeset\n"); 1254 DRM_ERROR("failed to init modeset\n");
1248 goto out_rmmap; 1255 goto out_workqueue_free;
1249 } 1256 }
1250 } 1257 }
1251 1258
@@ -1256,6 +1263,8 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
1256 1263
1257 return 0; 1264 return 0;
1258 1265
1266out_workqueue_free:
1267 destroy_workqueue(dev_priv->wq);
1259out_iomapfree: 1268out_iomapfree:
1260 io_mapping_free(dev_priv->mm.gtt_mapping); 1269 io_mapping_free(dev_priv->mm.gtt_mapping);
1261out_rmmap: 1270out_rmmap:
@@ -1269,6 +1278,8 @@ int i915_driver_unload(struct drm_device *dev)
1269{ 1278{
1270 struct drm_i915_private *dev_priv = dev->dev_private; 1279 struct drm_i915_private *dev_priv = dev->dev_private;
1271 1280
1281 destroy_workqueue(dev_priv->wq);
1282
1272 io_mapping_free(dev_priv->mm.gtt_mapping); 1283 io_mapping_free(dev_priv->mm.gtt_mapping);
1273 if (dev_priv->mm.gtt_mtrr >= 0) { 1284 if (dev_priv->mm.gtt_mtrr >= 0) {
1274 mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base, 1285 mtrr_del(dev_priv->mm.gtt_mtrr, dev->agp->base,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d08752875885..7537f57d8a87 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -219,6 +219,7 @@ typedef struct drm_i915_private {
219 unsigned int lvds_vbt:1; 219 unsigned int lvds_vbt:1;
220 unsigned int int_crt_support:1; 220 unsigned int int_crt_support:1;
221 unsigned int lvds_use_ssc:1; 221 unsigned int lvds_use_ssc:1;
222 unsigned int edp_support:1;
222 int lvds_ssc_freq; 223 int lvds_ssc_freq;
223 224
224 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */ 225 struct drm_i915_fence_reg fence_regs[16]; /* assume 965 */
@@ -229,6 +230,8 @@ typedef struct drm_i915_private {
229 230
230 spinlock_t error_lock; 231 spinlock_t error_lock;
231 struct drm_i915_error_state *first_error; 232 struct drm_i915_error_state *first_error;
233 struct work_struct error_work;
234 struct workqueue_struct *wq;
232 235
233 /* Register state */ 236 /* Register state */
234 u8 saveLBB; 237 u8 saveLBB;
@@ -888,6 +891,7 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
888 IS_I915GM(dev))) 891 IS_I915GM(dev)))
889#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 892#define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_IGDNG(dev))
890#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 893#define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_IGDNG(dev))
894#define SUPPORTS_EDP(dev) (IS_IGDNG_M(dev))
891#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev)) 895#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_I965G(dev))
892/* dsparb controlled by hw only */ 896/* dsparb controlled by hw only */
893#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 897#define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IGDNG(dev))
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 5bf420378b6d..140bee142fc2 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1570,7 +1570,7 @@ i915_add_request(struct drm_device *dev, struct drm_file *file_priv,
1570 } 1570 }
1571 1571
1572 if (was_empty && !dev_priv->mm.suspended) 1572 if (was_empty && !dev_priv->mm.suspended)
1573 schedule_delayed_work(&dev_priv->mm.retire_work, HZ); 1573 queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
1574 return seqno; 1574 return seqno;
1575} 1575}
1576 1576
@@ -1719,7 +1719,7 @@ i915_gem_retire_work_handler(struct work_struct *work)
1719 i915_gem_retire_requests(dev); 1719 i915_gem_retire_requests(dev);
1720 if (!dev_priv->mm.suspended && 1720 if (!dev_priv->mm.suspended &&
1721 !list_empty(&dev_priv->mm.request_list)) 1721 !list_empty(&dev_priv->mm.request_list))
1722 schedule_delayed_work(&dev_priv->mm.retire_work, HZ); 1722 queue_delayed_work(dev_priv->wq, &dev_priv->mm.retire_work, HZ);
1723 mutex_unlock(&dev->struct_mutex); 1723 mutex_unlock(&dev->struct_mutex);
1724} 1724}
1725 1725
diff --git a/drivers/gpu/drm/i915/i915_gem_debugfs.c b/drivers/gpu/drm/i915/i915_gem_debugfs.c
index 9a44bfcb8139..cb3b97405fbf 100644
--- a/drivers/gpu/drm/i915/i915_gem_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_gem_debugfs.c
@@ -343,6 +343,8 @@ static int i915_error_state(struct seq_file *m, void *unused)
343 343
344 error = dev_priv->first_error; 344 error = dev_priv->first_error;
345 345
346 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
347 error->time.tv_usec);
346 seq_printf(m, "EIR: 0x%08x\n", error->eir); 348 seq_printf(m, "EIR: 0x%08x\n", error->eir);
347 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er); 349 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er);
348 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); 350 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7ba23a69a0c0..7ebc84c2881e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -190,7 +190,7 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
190 low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL; 190 low_frame = pipe ? PIPEBFRAMEPIXEL : PIPEAFRAMEPIXEL;
191 191
192 if (!i915_pipe_enabled(dev, pipe)) { 192 if (!i915_pipe_enabled(dev, pipe)) {
193 DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); 193 DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
194 return 0; 194 return 0;
195 } 195 }
196 196
@@ -219,7 +219,7 @@ u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
219 int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45; 219 int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45;
220 220
221 if (!i915_pipe_enabled(dev, pipe)) { 221 if (!i915_pipe_enabled(dev, pipe)) {
222 DRM_ERROR("trying to get vblank count for disabled pipe %d\n", pipe); 222 DRM_DEBUG("trying to get vblank count for disabled pipe %d\n", pipe);
223 return 0; 223 return 0;
224 } 224 }
225 225
@@ -290,6 +290,35 @@ irqreturn_t igdng_irq_handler(struct drm_device *dev)
290 return ret; 290 return ret;
291} 291}
292 292
293/**
294 * i915_error_work_func - do process context error handling work
295 * @work: work struct
296 *
297 * Fire an error uevent so userspace can see that a hang or error
298 * was detected.
299 */
300static void i915_error_work_func(struct work_struct *work)
301{
302 drm_i915_private_t *dev_priv = container_of(work, drm_i915_private_t,
303 error_work);
304 struct drm_device *dev = dev_priv->dev;
305 char *event_string = "ERROR=1";
306 char *envp[] = { event_string, NULL };
307
308 DRM_DEBUG("generating error event\n");
309
310 kobject_uevent_env(&dev->primary->kdev.kobj, KOBJ_CHANGE, envp);
311}
312
313/**
314 * i915_capture_error_state - capture an error record for later analysis
315 * @dev: drm device
316 *
317 * Should be called when an error is detected (either a hang or an error
318 * interrupt) to capture error state from the time of the error. Fills
319 * out a structure which becomes available in debugfs for user level tools
320 * to pick up.
321 */
293static void i915_capture_error_state(struct drm_device *dev) 322static void i915_capture_error_state(struct drm_device *dev)
294{ 323{
295 struct drm_i915_private *dev_priv = dev->dev_private; 324 struct drm_i915_private *dev_priv = dev->dev_private;
@@ -325,12 +354,137 @@ static void i915_capture_error_state(struct drm_device *dev)
325 error->acthd = I915_READ(ACTHD_I965); 354 error->acthd = I915_READ(ACTHD_I965);
326 } 355 }
327 356
357 do_gettimeofday(&error->time);
358
328 dev_priv->first_error = error; 359 dev_priv->first_error = error;
329 360
330out: 361out:
331 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 362 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
332} 363}
333 364
365/**
366 * i915_handle_error - handle an error interrupt
367 * @dev: drm device
368 *
369 * Do some basic checking of regsiter state at error interrupt time and
370 * dump it to the syslog. Also call i915_capture_error_state() to make
371 * sure we get a record and make it available in debugfs. Fire a uevent
372 * so userspace knows something bad happened (should trigger collection
373 * of a ring dump etc.).
374 */
375static void i915_handle_error(struct drm_device *dev)
376{
377 struct drm_i915_private *dev_priv = dev->dev_private;
378 u32 eir = I915_READ(EIR);
379 u32 pipea_stats = I915_READ(PIPEASTAT);
380 u32 pipeb_stats = I915_READ(PIPEBSTAT);
381
382 i915_capture_error_state(dev);
383
384 printk(KERN_ERR "render error detected, EIR: 0x%08x\n",
385 eir);
386
387 if (IS_G4X(dev)) {
388 if (eir & (GM45_ERROR_MEM_PRIV | GM45_ERROR_CP_PRIV)) {
389 u32 ipeir = I915_READ(IPEIR_I965);
390
391 printk(KERN_ERR " IPEIR: 0x%08x\n",
392 I915_READ(IPEIR_I965));
393 printk(KERN_ERR " IPEHR: 0x%08x\n",
394 I915_READ(IPEHR_I965));
395 printk(KERN_ERR " INSTDONE: 0x%08x\n",
396 I915_READ(INSTDONE_I965));
397 printk(KERN_ERR " INSTPS: 0x%08x\n",
398 I915_READ(INSTPS));
399 printk(KERN_ERR " INSTDONE1: 0x%08x\n",
400 I915_READ(INSTDONE1));
401 printk(KERN_ERR " ACTHD: 0x%08x\n",
402 I915_READ(ACTHD_I965));
403 I915_WRITE(IPEIR_I965, ipeir);
404 (void)I915_READ(IPEIR_I965);
405 }
406 if (eir & GM45_ERROR_PAGE_TABLE) {
407 u32 pgtbl_err = I915_READ(PGTBL_ER);
408 printk(KERN_ERR "page table error\n");
409 printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
410 pgtbl_err);
411 I915_WRITE(PGTBL_ER, pgtbl_err);
412 (void)I915_READ(PGTBL_ER);
413 }
414 }
415
416 if (IS_I9XX(dev)) {
417 if (eir & I915_ERROR_PAGE_TABLE) {
418 u32 pgtbl_err = I915_READ(PGTBL_ER);
419 printk(KERN_ERR "page table error\n");
420 printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
421 pgtbl_err);
422 I915_WRITE(PGTBL_ER, pgtbl_err);
423 (void)I915_READ(PGTBL_ER);
424 }
425 }
426
427 if (eir & I915_ERROR_MEMORY_REFRESH) {
428 printk(KERN_ERR "memory refresh error\n");
429 printk(KERN_ERR "PIPEASTAT: 0x%08x\n",
430 pipea_stats);
431 printk(KERN_ERR "PIPEBSTAT: 0x%08x\n",
432 pipeb_stats);
433 /* pipestat has already been acked */
434 }
435 if (eir & I915_ERROR_INSTRUCTION) {
436 printk(KERN_ERR "instruction error\n");
437 printk(KERN_ERR " INSTPM: 0x%08x\n",
438 I915_READ(INSTPM));
439 if (!IS_I965G(dev)) {
440 u32 ipeir = I915_READ(IPEIR);
441
442 printk(KERN_ERR " IPEIR: 0x%08x\n",
443 I915_READ(IPEIR));
444 printk(KERN_ERR " IPEHR: 0x%08x\n",
445 I915_READ(IPEHR));
446 printk(KERN_ERR " INSTDONE: 0x%08x\n",
447 I915_READ(INSTDONE));
448 printk(KERN_ERR " ACTHD: 0x%08x\n",
449 I915_READ(ACTHD));
450 I915_WRITE(IPEIR, ipeir);
451 (void)I915_READ(IPEIR);
452 } else {
453 u32 ipeir = I915_READ(IPEIR_I965);
454
455 printk(KERN_ERR " IPEIR: 0x%08x\n",
456 I915_READ(IPEIR_I965));
457 printk(KERN_ERR " IPEHR: 0x%08x\n",
458 I915_READ(IPEHR_I965));
459 printk(KERN_ERR " INSTDONE: 0x%08x\n",
460 I915_READ(INSTDONE_I965));
461 printk(KERN_ERR " INSTPS: 0x%08x\n",
462 I915_READ(INSTPS));
463 printk(KERN_ERR " INSTDONE1: 0x%08x\n",
464 I915_READ(INSTDONE1));
465 printk(KERN_ERR " ACTHD: 0x%08x\n",
466 I915_READ(ACTHD_I965));
467 I915_WRITE(IPEIR_I965, ipeir);
468 (void)I915_READ(IPEIR_I965);
469 }
470 }
471
472 I915_WRITE(EIR, eir);
473 (void)I915_READ(EIR);
474 eir = I915_READ(EIR);
475 if (eir) {
476 /*
477 * some errors might have become stuck,
478 * mask them.
479 */
480 DRM_ERROR("EIR stuck: 0x%08x, masking\n", eir);
481 I915_WRITE(EMR, I915_READ(EMR) | eir);
482 I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
483 }
484
485 queue_work(dev_priv->wq, &dev_priv->error_work);
486}
487
334irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) 488irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
335{ 489{
336 struct drm_device *dev = (struct drm_device *) arg; 490 struct drm_device *dev = (struct drm_device *) arg;
@@ -372,6 +526,9 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
372 pipea_stats = I915_READ(PIPEASTAT); 526 pipea_stats = I915_READ(PIPEASTAT);
373 pipeb_stats = I915_READ(PIPEBSTAT); 527 pipeb_stats = I915_READ(PIPEBSTAT);
374 528
529 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT)
530 i915_handle_error(dev);
531
375 /* 532 /*
376 * Clear the PIPE(A|B)STAT regs before the IIR 533 * Clear the PIPE(A|B)STAT regs before the IIR
377 */ 534 */
@@ -403,86 +560,13 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
403 DRM_DEBUG("hotplug event received, stat 0x%08x\n", 560 DRM_DEBUG("hotplug event received, stat 0x%08x\n",
404 hotplug_status); 561 hotplug_status);
405 if (hotplug_status & dev_priv->hotplug_supported_mask) 562 if (hotplug_status & dev_priv->hotplug_supported_mask)
406 schedule_work(&dev_priv->hotplug_work); 563 queue_work(dev_priv->wq,
564 &dev_priv->hotplug_work);
407 565
408 I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status); 566 I915_WRITE(PORT_HOTPLUG_STAT, hotplug_status);
409 I915_READ(PORT_HOTPLUG_STAT); 567 I915_READ(PORT_HOTPLUG_STAT);
410 } 568 }
411 569
412 if (iir & I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT) {
413 u32 eir = I915_READ(EIR);
414
415 i915_capture_error_state(dev);
416
417 printk(KERN_ERR "render error detected, EIR: 0x%08x\n",
418 eir);
419 if (eir & I915_ERROR_PAGE_TABLE) {
420 u32 pgtbl_err = I915_READ(PGTBL_ER);
421 printk(KERN_ERR "page table error\n");
422 printk(KERN_ERR " PGTBL_ER: 0x%08x\n",
423 pgtbl_err);
424 I915_WRITE(PGTBL_ER, pgtbl_err);
425 (void)I915_READ(PGTBL_ER);
426 }
427 if (eir & I915_ERROR_MEMORY_REFRESH) {
428 printk(KERN_ERR "memory refresh error\n");
429 printk(KERN_ERR "PIPEASTAT: 0x%08x\n",
430 pipea_stats);
431 printk(KERN_ERR "PIPEBSTAT: 0x%08x\n",
432 pipeb_stats);
433 /* pipestat has already been acked */
434 }
435 if (eir & I915_ERROR_INSTRUCTION) {
436 printk(KERN_ERR "instruction error\n");
437 printk(KERN_ERR " INSTPM: 0x%08x\n",
438 I915_READ(INSTPM));
439 if (!IS_I965G(dev)) {
440 u32 ipeir = I915_READ(IPEIR);
441
442 printk(KERN_ERR " IPEIR: 0x%08x\n",
443 I915_READ(IPEIR));
444 printk(KERN_ERR " IPEHR: 0x%08x\n",
445 I915_READ(IPEHR));
446 printk(KERN_ERR " INSTDONE: 0x%08x\n",
447 I915_READ(INSTDONE));
448 printk(KERN_ERR " ACTHD: 0x%08x\n",
449 I915_READ(ACTHD));
450 I915_WRITE(IPEIR, ipeir);
451 (void)I915_READ(IPEIR);
452 } else {
453 u32 ipeir = I915_READ(IPEIR_I965);
454
455 printk(KERN_ERR " IPEIR: 0x%08x\n",
456 I915_READ(IPEIR_I965));
457 printk(KERN_ERR " IPEHR: 0x%08x\n",
458 I915_READ(IPEHR_I965));
459 printk(KERN_ERR " INSTDONE: 0x%08x\n",
460 I915_READ(INSTDONE_I965));
461 printk(KERN_ERR " INSTPS: 0x%08x\n",
462 I915_READ(INSTPS));
463 printk(KERN_ERR " INSTDONE1: 0x%08x\n",
464 I915_READ(INSTDONE1));
465 printk(KERN_ERR " ACTHD: 0x%08x\n",
466 I915_READ(ACTHD_I965));
467 I915_WRITE(IPEIR_I965, ipeir);
468 (void)I915_READ(IPEIR_I965);
469 }
470 }
471
472 I915_WRITE(EIR, eir);
473 (void)I915_READ(EIR);
474 eir = I915_READ(EIR);
475 if (eir) {
476 /*
477 * some errors might have become stuck,
478 * mask them.
479 */
480 DRM_ERROR("EIR stuck: 0x%08x, masking\n", eir);
481 I915_WRITE(EMR, I915_READ(EMR) | eir);
482 I915_WRITE(IIR, I915_RENDER_COMMAND_PARSER_ERROR_INTERRUPT);
483 }
484 }
485
486 I915_WRITE(IIR, iir); 570 I915_WRITE(IIR, iir);
487 new_iir = I915_READ(IIR); /* Flush posted writes */ 571 new_iir = I915_READ(IIR); /* Flush posted writes */
488 572
@@ -830,6 +914,7 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
830 atomic_set(&dev_priv->irq_received, 0); 914 atomic_set(&dev_priv->irq_received, 0);
831 915
832 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func); 916 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
917 INIT_WORK(&dev_priv->error_work, i915_error_work_func);
833 918
834 if (IS_IGDNG(dev)) { 919 if (IS_IGDNG(dev)) {
835 igdng_irq_preinstall(dev); 920 igdng_irq_preinstall(dev);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 6c0858484094..2955083aa471 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1395,6 +1395,7 @@
1395#define TV_V_CHROMA_42 0x684a8 1395#define TV_V_CHROMA_42 0x684a8
1396 1396
1397/* Display Port */ 1397/* Display Port */
1398#define DP_A 0x64000 /* eDP */
1398#define DP_B 0x64100 1399#define DP_B 0x64100
1399#define DP_C 0x64200 1400#define DP_C 0x64200
1400#define DP_D 0x64300 1401#define DP_D 0x64300
@@ -1437,13 +1438,22 @@
1437/* Mystic DPCD version 1.1 special mode */ 1438/* Mystic DPCD version 1.1 special mode */
1438#define DP_ENHANCED_FRAMING (1 << 18) 1439#define DP_ENHANCED_FRAMING (1 << 18)
1439 1440
1441/* eDP */
1442#define DP_PLL_FREQ_270MHZ (0 << 16)
1443#define DP_PLL_FREQ_160MHZ (1 << 16)
1444#define DP_PLL_FREQ_MASK (3 << 16)
1445
1440/** locked once port is enabled */ 1446/** locked once port is enabled */
1441#define DP_PORT_REVERSAL (1 << 15) 1447#define DP_PORT_REVERSAL (1 << 15)
1442 1448
1449/* eDP */
1450#define DP_PLL_ENABLE (1 << 14)
1451
1443/** sends the clock on lane 15 of the PEG for debug */ 1452/** sends the clock on lane 15 of the PEG for debug */
1444#define DP_CLOCK_OUTPUT_ENABLE (1 << 13) 1453#define DP_CLOCK_OUTPUT_ENABLE (1 << 13)
1445 1454
1446#define DP_SCRAMBLING_DISABLE (1 << 12) 1455#define DP_SCRAMBLING_DISABLE (1 << 12)
1456#define DP_SCRAMBLING_DISABLE_IGDNG (1 << 7)
1447 1457
1448/** limit RGB values to avoid confusing TVs */ 1458/** limit RGB values to avoid confusing TVs */
1449#define DP_COLOR_RANGE_16_235 (1 << 8) 1459#define DP_COLOR_RANGE_16_235 (1 << 8)
@@ -1463,6 +1473,13 @@
1463 * is 20 bytes in each direction, hence the 5 fixed 1473 * is 20 bytes in each direction, hence the 5 fixed
1464 * data registers 1474 * data registers
1465 */ 1475 */
1476#define DPA_AUX_CH_CTL 0x64010
1477#define DPA_AUX_CH_DATA1 0x64014
1478#define DPA_AUX_CH_DATA2 0x64018
1479#define DPA_AUX_CH_DATA3 0x6401c
1480#define DPA_AUX_CH_DATA4 0x64020
1481#define DPA_AUX_CH_DATA5 0x64024
1482
1466#define DPB_AUX_CH_CTL 0x64110 1483#define DPB_AUX_CH_CTL 0x64110
1467#define DPB_AUX_CH_DATA1 0x64114 1484#define DPB_AUX_CH_DATA1 0x64114
1468#define DPB_AUX_CH_DATA2 0x64118 1485#define DPB_AUX_CH_DATA2 0x64118
@@ -1618,7 +1635,7 @@
1618#define I830_FIFO_LINE_SIZE 32 1635#define I830_FIFO_LINE_SIZE 32
1619#define I945_FIFO_SIZE 127 /* 945 & 965 */ 1636#define I945_FIFO_SIZE 127 /* 945 & 965 */
1620#define I915_FIFO_SIZE 95 1637#define I915_FIFO_SIZE 95
1621#define I855GM_FIFO_SIZE 255 1638#define I855GM_FIFO_SIZE 127 /* In cachelines */
1622#define I830_FIFO_SIZE 95 1639#define I830_FIFO_SIZE 95
1623#define I915_MAX_WM 0x3f 1640#define I915_MAX_WM 0x3f
1624 1641
@@ -1848,6 +1865,8 @@
1848#define PFA_CTL_1 0x68080 1865#define PFA_CTL_1 0x68080
1849#define PFB_CTL_1 0x68880 1866#define PFB_CTL_1 0x68880
1850#define PF_ENABLE (1<<31) 1867#define PF_ENABLE (1<<31)
1868#define PFA_WIN_SZ 0x68074
1869#define PFB_WIN_SZ 0x68874
1851 1870
1852/* legacy palette */ 1871/* legacy palette */
1853#define LGC_PALETTE_A 0x4a000 1872#define LGC_PALETTE_A 0x4a000
@@ -2208,4 +2227,28 @@
2208#define PCH_PP_OFF_DELAYS 0xc720c 2227#define PCH_PP_OFF_DELAYS 0xc720c
2209#define PCH_PP_DIVISOR 0xc7210 2228#define PCH_PP_DIVISOR 0xc7210
2210 2229
2230#define PCH_DP_B 0xe4100
2231#define PCH_DPB_AUX_CH_CTL 0xe4110
2232#define PCH_DPB_AUX_CH_DATA1 0xe4114
2233#define PCH_DPB_AUX_CH_DATA2 0xe4118
2234#define PCH_DPB_AUX_CH_DATA3 0xe411c
2235#define PCH_DPB_AUX_CH_DATA4 0xe4120
2236#define PCH_DPB_AUX_CH_DATA5 0xe4124
2237
2238#define PCH_DP_C 0xe4200
2239#define PCH_DPC_AUX_CH_CTL 0xe4210
2240#define PCH_DPC_AUX_CH_DATA1 0xe4214
2241#define PCH_DPC_AUX_CH_DATA2 0xe4218
2242#define PCH_DPC_AUX_CH_DATA3 0xe421c
2243#define PCH_DPC_AUX_CH_DATA4 0xe4220
2244#define PCH_DPC_AUX_CH_DATA5 0xe4224
2245
2246#define PCH_DP_D 0xe4300
2247#define PCH_DPD_AUX_CH_CTL 0xe4310
2248#define PCH_DPD_AUX_CH_DATA1 0xe4314
2249#define PCH_DPD_AUX_CH_DATA2 0xe4318
2250#define PCH_DPD_AUX_CH_DATA3 0xe431c
2251#define PCH_DPD_AUX_CH_DATA4 0xe4320
2252#define PCH_DPD_AUX_CH_DATA5 0xe4324
2253
2211#endif /* _I915_REG_H_ */ 2254#endif /* _I915_REG_H_ */
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 9e1d16e5c3ea..1d04e1904ac6 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -598,7 +598,7 @@ int i915_restore_state(struct drm_device *dev)
598 598
599 for (i = 0; i < 16; i++) { 599 for (i = 0; i < 16; i++) {
600 I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF0[i]); 600 I915_WRITE(SWF00 + (i << 2), dev_priv->saveSWF0[i]);
601 I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i+7]); 601 I915_WRITE(SWF10 + (i << 2), dev_priv->saveSWF1[i]);
602 } 602 }
603 for (i = 0; i < 3; i++) 603 for (i = 0; i < 3; i++)
604 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]); 604 I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 7cc447191028..300aee3296c2 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -97,14 +97,13 @@ static void
97parse_lfp_panel_data(struct drm_i915_private *dev_priv, 97parse_lfp_panel_data(struct drm_i915_private *dev_priv,
98 struct bdb_header *bdb) 98 struct bdb_header *bdb)
99{ 99{
100 struct drm_device *dev = dev_priv->dev;
101 struct bdb_lvds_options *lvds_options; 100 struct bdb_lvds_options *lvds_options;
102 struct bdb_lvds_lfp_data *lvds_lfp_data; 101 struct bdb_lvds_lfp_data *lvds_lfp_data;
103 struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs; 102 struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
104 struct bdb_lvds_lfp_data_entry *entry; 103 struct bdb_lvds_lfp_data_entry *entry;
105 struct lvds_dvo_timing *dvo_timing; 104 struct lvds_dvo_timing *dvo_timing;
106 struct drm_display_mode *panel_fixed_mode; 105 struct drm_display_mode *panel_fixed_mode;
107 int lfp_data_size; 106 int lfp_data_size, dvo_timing_offset;
108 107
109 /* Defaults if we can't find VBT info */ 108 /* Defaults if we can't find VBT info */
110 dev_priv->lvds_dither = 0; 109 dev_priv->lvds_dither = 0;
@@ -133,14 +132,16 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
133 entry = (struct bdb_lvds_lfp_data_entry *) 132 entry = (struct bdb_lvds_lfp_data_entry *)
134 ((uint8_t *)lvds_lfp_data->data + (lfp_data_size * 133 ((uint8_t *)lvds_lfp_data->data + (lfp_data_size *
135 lvds_options->panel_type)); 134 lvds_options->panel_type));
135 dvo_timing_offset = lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
136 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
136 137
137 /* On IGDNG mobile, LVDS data block removes panel fitting registers. 138 /*
138 So dec 2 dword from dvo_timing offset */ 139 * the size of fp_timing varies on the different platform.
139 if (IS_IGDNG(dev)) 140 * So calculate the DVO timing relative offset in LVDS data
140 dvo_timing = (struct lvds_dvo_timing *) 141 * entry to get the DVO timing entry
141 ((u8 *)&entry->dvo_timing - 8); 142 */
142 else 143 dvo_timing = (struct lvds_dvo_timing *)
143 dvo_timing = &entry->dvo_timing; 144 ((unsigned char *)entry + dvo_timing_offset);
144 145
145 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL); 146 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
146 147
@@ -295,6 +296,25 @@ parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
295 } 296 }
296 return; 297 return;
297} 298}
299
300static void
301parse_driver_features(struct drm_i915_private *dev_priv,
302 struct bdb_header *bdb)
303{
304 struct drm_device *dev = dev_priv->dev;
305 struct bdb_driver_features *driver;
306
307 /* set default for chips without eDP */
308 if (!SUPPORTS_EDP(dev)) {
309 dev_priv->edp_support = 0;
310 return;
311 }
312
313 driver = find_section(bdb, BDB_DRIVER_FEATURES);
314 if (driver && driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
315 dev_priv->edp_support = 1;
316}
317
298/** 318/**
299 * intel_init_bios - initialize VBIOS settings & find VBT 319 * intel_init_bios - initialize VBIOS settings & find VBT
300 * @dev: DRM device 320 * @dev: DRM device
@@ -345,6 +365,8 @@ intel_init_bios(struct drm_device *dev)
345 parse_lfp_panel_data(dev_priv, bdb); 365 parse_lfp_panel_data(dev_priv, bdb);
346 parse_sdvo_panel_data(dev_priv, bdb); 366 parse_sdvo_panel_data(dev_priv, bdb);
347 parse_sdvo_device_mapping(dev_priv, bdb); 367 parse_sdvo_device_mapping(dev_priv, bdb);
368 parse_driver_features(dev_priv, bdb);
369
348 pci_unmap_rom(pdev, bios); 370 pci_unmap_rom(pdev, bios);
349 371
350 return 0; 372 return 0;
diff --git a/drivers/gpu/drm/i915/intel_bios.h b/drivers/gpu/drm/i915/intel_bios.h
index fe72e1c225d8..0f8e5f69ac7a 100644
--- a/drivers/gpu/drm/i915/intel_bios.h
+++ b/drivers/gpu/drm/i915/intel_bios.h
@@ -381,6 +381,51 @@ struct bdb_sdvo_lvds_options {
381} __attribute__((packed)); 381} __attribute__((packed));
382 382
383 383
384#define BDB_DRIVER_FEATURE_NO_LVDS 0
385#define BDB_DRIVER_FEATURE_INT_LVDS 1
386#define BDB_DRIVER_FEATURE_SDVO_LVDS 2
387#define BDB_DRIVER_FEATURE_EDP 3
388
389struct bdb_driver_features {
390 u8 boot_dev_algorithm:1;
391 u8 block_display_switch:1;
392 u8 allow_display_switch:1;
393 u8 hotplug_dvo:1;
394 u8 dual_view_zoom:1;
395 u8 int15h_hook:1;
396 u8 sprite_in_clone:1;
397 u8 primary_lfp_id:1;
398
399 u16 boot_mode_x;
400 u16 boot_mode_y;
401 u8 boot_mode_bpp;
402 u8 boot_mode_refresh;
403
404 u16 enable_lfp_primary:1;
405 u16 selective_mode_pruning:1;
406 u16 dual_frequency:1;
407 u16 render_clock_freq:1; /* 0: high freq; 1: low freq */
408 u16 nt_clone_support:1;
409 u16 power_scheme_ui:1; /* 0: CUI; 1: 3rd party */
410 u16 sprite_display_assign:1; /* 0: secondary; 1: primary */
411 u16 cui_aspect_scaling:1;
412 u16 preserve_aspect_ratio:1;
413 u16 sdvo_device_power_down:1;
414 u16 crt_hotplug:1;
415 u16 lvds_config:2;
416 u16 tv_hotplug:1;
417 u16 hdmi_config:2;
418
419 u8 static_display:1;
420 u8 reserved2:7;
421 u16 legacy_crt_max_x;
422 u16 legacy_crt_max_y;
423 u8 legacy_crt_max_refresh;
424
425 u8 hdmi_termination;
426 u8 custom_vbt_version;
427} __attribute__((packed));
428
384bool intel_init_bios(struct drm_device *dev); 429bool intel_init_bios(struct drm_device *dev);
385 430
386/* 431/*
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index d6a1a6e5539a..4cf8e2e88a40 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -156,6 +156,9 @@ static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
156 156
157 temp = adpa = I915_READ(PCH_ADPA); 157 temp = adpa = I915_READ(PCH_ADPA);
158 158
159 adpa &= ~ADPA_DAC_ENABLE;
160 I915_WRITE(PCH_ADPA, adpa);
161
159 adpa &= ~ADPA_CRT_HOTPLUG_MASK; 162 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
160 163
161 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 | 164 adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
@@ -169,13 +172,14 @@ static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
169 DRM_DEBUG("pch crt adpa 0x%x", adpa); 172 DRM_DEBUG("pch crt adpa 0x%x", adpa);
170 I915_WRITE(PCH_ADPA, adpa); 173 I915_WRITE(PCH_ADPA, adpa);
171 174
172 /* This might not be needed as not specified in spec...*/ 175 while ((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) != 0)
173 udelay(1000); 176 ;
174 177
175 /* Check the status to see if both blue and green are on now */ 178 /* Check the status to see if both blue and green are on now */
176 adpa = I915_READ(PCH_ADPA); 179 adpa = I915_READ(PCH_ADPA);
177 if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) == 180 adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK;
178 ADPA_CRT_HOTPLUG_MONITOR_COLOR) 181 if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) ||
182 (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO))
179 ret = true; 183 ret = true;
180 else 184 else
181 ret = false; 185 ret = false;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 508838ee31e0..d6fce2133413 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -34,6 +34,8 @@
34 34
35#include "drm_crtc_helper.h" 35#include "drm_crtc_helper.h"
36 36
37#define HAS_eDP (intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))
38
37bool intel_pipe_has_type (struct drm_crtc *crtc, int type); 39bool intel_pipe_has_type (struct drm_crtc *crtc, int type);
38static void intel_update_watermarks(struct drm_device *dev); 40static void intel_update_watermarks(struct drm_device *dev);
39 41
@@ -88,7 +90,7 @@ struct intel_limit {
88#define I8XX_P2_SLOW 4 90#define I8XX_P2_SLOW 4
89#define I8XX_P2_FAST 2 91#define I8XX_P2_FAST 2
90#define I8XX_P2_LVDS_SLOW 14 92#define I8XX_P2_LVDS_SLOW 14
91#define I8XX_P2_LVDS_FAST 14 /* No fast option */ 93#define I8XX_P2_LVDS_FAST 7
92#define I8XX_P2_SLOW_LIMIT 165000 94#define I8XX_P2_SLOW_LIMIT 165000
93 95
94#define I9XX_DOT_MIN 20000 96#define I9XX_DOT_MIN 20000
@@ -268,6 +270,9 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
268static bool 270static bool
269intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc, 271intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
270 int target, int refclk, intel_clock_t *best_clock); 272 int target, int refclk, intel_clock_t *best_clock);
273static bool
274intel_find_pll_igdng_dp(const intel_limit_t *, struct drm_crtc *crtc,
275 int target, int refclk, intel_clock_t *best_clock);
271 276
272static const intel_limit_t intel_limits_i8xx_dvo = { 277static const intel_limit_t intel_limits_i8xx_dvo = {
273 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX }, 278 .dot = { .min = I8XX_DOT_MIN, .max = I8XX_DOT_MAX },
@@ -598,6 +603,23 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type)
598 return false; 603 return false;
599} 604}
600 605
606struct drm_connector *
607intel_pipe_get_output (struct drm_crtc *crtc)
608{
609 struct drm_device *dev = crtc->dev;
610 struct drm_mode_config *mode_config = &dev->mode_config;
611 struct drm_connector *l_entry, *ret = NULL;
612
613 list_for_each_entry(l_entry, &mode_config->connector_list, head) {
614 if (l_entry->encoder &&
615 l_entry->encoder->crtc == crtc) {
616 ret = l_entry;
617 break;
618 }
619 }
620 return ret;
621}
622
601#define INTELPllInvalid(s) do { /* DRM_DEBUG(s); */ return false; } while (0) 623#define INTELPllInvalid(s) do { /* DRM_DEBUG(s); */ return false; } while (0)
602/** 624/**
603 * Returns whether the given set of divisors are valid for a given refclk with 625 * Returns whether the given set of divisors are valid for a given refclk with
@@ -645,7 +667,7 @@ intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
645 int err = target; 667 int err = target;
646 668
647 if (IS_I9XX(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) && 669 if (IS_I9XX(dev) && intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
648 (I915_READ(LVDS) & LVDS_PORT_EN) != 0) { 670 (I915_READ(LVDS)) != 0) {
649 /* 671 /*
650 * For LVDS, if the panel is on, just rely on its current 672 * For LVDS, if the panel is on, just rely on its current
651 * settings for dual-channel. We haven't figured out how to 673 * settings for dual-channel. We haven't figured out how to
@@ -752,6 +774,30 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
752} 774}
753 775
754static bool 776static bool
777intel_find_pll_igdng_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
778 int target, int refclk, intel_clock_t *best_clock)
779{
780 struct drm_device *dev = crtc->dev;
781 intel_clock_t clock;
782 if (target < 200000) {
783 clock.n = 1;
784 clock.p1 = 2;
785 clock.p2 = 10;
786 clock.m1 = 12;
787 clock.m2 = 9;
788 } else {
789 clock.n = 2;
790 clock.p1 = 1;
791 clock.p2 = 10;
792 clock.m1 = 14;
793 clock.m2 = 8;
794 }
795 intel_clock(dev, refclk, &clock);
796 memcpy(best_clock, &clock, sizeof(intel_clock_t));
797 return true;
798}
799
800static bool
755intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc, 801intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
756 int target, int refclk, intel_clock_t *best_clock) 802 int target, int refclk, intel_clock_t *best_clock)
757{ 803{
@@ -763,6 +809,14 @@ intel_igdng_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
763 int err_most = 47; 809 int err_most = 47;
764 found = false; 810 found = false;
765 811
812 /* eDP has only 2 clock choice, no n/m/p setting */
813 if (HAS_eDP)
814 return true;
815
816 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))
817 return intel_find_pll_igdng_dp(limit, crtc, target,
818 refclk, best_clock);
819
766 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 820 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
767 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) == 821 if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
768 LVDS_CLKB_POWER_UP) 822 LVDS_CLKB_POWER_UP)
@@ -998,6 +1052,90 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
998 return 0; 1052 return 0;
999} 1053}
1000 1054
1055/* Disable the VGA plane that we never use */
1056static void i915_disable_vga (struct drm_device *dev)
1057{
1058 struct drm_i915_private *dev_priv = dev->dev_private;
1059 u8 sr1;
1060 u32 vga_reg;
1061
1062 if (IS_IGDNG(dev))
1063 vga_reg = CPU_VGACNTRL;
1064 else
1065 vga_reg = VGACNTRL;
1066
1067 if (I915_READ(vga_reg) & VGA_DISP_DISABLE)
1068 return;
1069
1070 I915_WRITE8(VGA_SR_INDEX, 1);
1071 sr1 = I915_READ8(VGA_SR_DATA);
1072 I915_WRITE8(VGA_SR_DATA, sr1 | (1 << 5));
1073 udelay(100);
1074
1075 I915_WRITE(vga_reg, VGA_DISP_DISABLE);
1076}
1077
1078static void igdng_disable_pll_edp (struct drm_crtc *crtc)
1079{
1080 struct drm_device *dev = crtc->dev;
1081 struct drm_i915_private *dev_priv = dev->dev_private;
1082 u32 dpa_ctl;
1083
1084 DRM_DEBUG("\n");
1085 dpa_ctl = I915_READ(DP_A);
1086 dpa_ctl &= ~DP_PLL_ENABLE;
1087 I915_WRITE(DP_A, dpa_ctl);
1088}
1089
1090static void igdng_enable_pll_edp (struct drm_crtc *crtc)
1091{
1092 struct drm_device *dev = crtc->dev;
1093 struct drm_i915_private *dev_priv = dev->dev_private;
1094 u32 dpa_ctl;
1095
1096 dpa_ctl = I915_READ(DP_A);
1097 dpa_ctl |= DP_PLL_ENABLE;
1098 I915_WRITE(DP_A, dpa_ctl);
1099 udelay(200);
1100}
1101
1102
1103static void igdng_set_pll_edp (struct drm_crtc *crtc, int clock)
1104{
1105 struct drm_device *dev = crtc->dev;
1106 struct drm_i915_private *dev_priv = dev->dev_private;
1107 u32 dpa_ctl;
1108
1109 DRM_DEBUG("eDP PLL enable for clock %d\n", clock);
1110 dpa_ctl = I915_READ(DP_A);
1111 dpa_ctl &= ~DP_PLL_FREQ_MASK;
1112
1113 if (clock < 200000) {
1114 u32 temp;
1115 dpa_ctl |= DP_PLL_FREQ_160MHZ;
1116 /* workaround for 160Mhz:
1117 1) program 0x4600c bits 15:0 = 0x8124
1118 2) program 0x46010 bit 0 = 1
1119 3) program 0x46034 bit 24 = 1
1120 4) program 0x64000 bit 14 = 1
1121 */
1122 temp = I915_READ(0x4600c);
1123 temp &= 0xffff0000;
1124 I915_WRITE(0x4600c, temp | 0x8124);
1125
1126 temp = I915_READ(0x46010);
1127 I915_WRITE(0x46010, temp | 1);
1128
1129 temp = I915_READ(0x46034);
1130 I915_WRITE(0x46034, temp | (1 << 24));
1131 } else {
1132 dpa_ctl |= DP_PLL_FREQ_270MHZ;
1133 }
1134 I915_WRITE(DP_A, dpa_ctl);
1135
1136 udelay(500);
1137}
1138
1001static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode) 1139static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1002{ 1140{
1003 struct drm_device *dev = crtc->dev; 1141 struct drm_device *dev = crtc->dev;
@@ -1015,6 +1153,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1015 int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR; 1153 int fdi_rx_imr_reg = (pipe == 0) ? FDI_RXA_IMR : FDI_RXB_IMR;
1016 int transconf_reg = (pipe == 0) ? TRANSACONF : TRANSBCONF; 1154 int transconf_reg = (pipe == 0) ? TRANSACONF : TRANSBCONF;
1017 int pf_ctl_reg = (pipe == 0) ? PFA_CTL_1 : PFB_CTL_1; 1155 int pf_ctl_reg = (pipe == 0) ? PFA_CTL_1 : PFB_CTL_1;
1156 int pf_win_size = (pipe == 0) ? PFA_WIN_SZ : PFB_WIN_SZ;
1018 int cpu_htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B; 1157 int cpu_htot_reg = (pipe == 0) ? HTOTAL_A : HTOTAL_B;
1019 int cpu_hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B; 1158 int cpu_hblank_reg = (pipe == 0) ? HBLANK_A : HBLANK_B;
1020 int cpu_hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B; 1159 int cpu_hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B;
@@ -1028,7 +1167,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1028 int trans_vblank_reg = (pipe == 0) ? TRANS_VBLANK_A : TRANS_VBLANK_B; 1167 int trans_vblank_reg = (pipe == 0) ? TRANS_VBLANK_A : TRANS_VBLANK_B;
1029 int trans_vsync_reg = (pipe == 0) ? TRANS_VSYNC_A : TRANS_VSYNC_B; 1168 int trans_vsync_reg = (pipe == 0) ? TRANS_VSYNC_A : TRANS_VSYNC_B;
1030 u32 temp; 1169 u32 temp;
1031 int tries = 5, j; 1170 int tries = 5, j, n;
1032 1171
1033 /* XXX: When our outputs are all unaware of DPMS modes other than off 1172 /* XXX: When our outputs are all unaware of DPMS modes other than off
1034 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC. 1173 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
@@ -1038,27 +1177,32 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1038 case DRM_MODE_DPMS_STANDBY: 1177 case DRM_MODE_DPMS_STANDBY:
1039 case DRM_MODE_DPMS_SUSPEND: 1178 case DRM_MODE_DPMS_SUSPEND:
1040 DRM_DEBUG("crtc %d dpms on\n", pipe); 1179 DRM_DEBUG("crtc %d dpms on\n", pipe);
1041 /* enable PCH DPLL */ 1180 if (HAS_eDP) {
1042 temp = I915_READ(pch_dpll_reg); 1181 /* enable eDP PLL */
1043 if ((temp & DPLL_VCO_ENABLE) == 0) { 1182 igdng_enable_pll_edp(crtc);
1044 I915_WRITE(pch_dpll_reg, temp | DPLL_VCO_ENABLE); 1183 } else {
1045 I915_READ(pch_dpll_reg); 1184 /* enable PCH DPLL */
1046 } 1185 temp = I915_READ(pch_dpll_reg);
1047 1186 if ((temp & DPLL_VCO_ENABLE) == 0) {
1048 /* enable PCH FDI RX PLL, wait warmup plus DMI latency */ 1187 I915_WRITE(pch_dpll_reg, temp | DPLL_VCO_ENABLE);
1049 temp = I915_READ(fdi_rx_reg); 1188 I915_READ(pch_dpll_reg);
1050 I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE | 1189 }
1051 FDI_SEL_PCDCLK |
1052 FDI_DP_PORT_WIDTH_X4); /* default 4 lanes */
1053 I915_READ(fdi_rx_reg);
1054 udelay(200);
1055 1190
1056 /* Enable CPU FDI TX PLL, always on for IGDNG */ 1191 /* enable PCH FDI RX PLL, wait warmup plus DMI latency */
1057 temp = I915_READ(fdi_tx_reg); 1192 temp = I915_READ(fdi_rx_reg);
1058 if ((temp & FDI_TX_PLL_ENABLE) == 0) { 1193 I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE |
1059 I915_WRITE(fdi_tx_reg, temp | FDI_TX_PLL_ENABLE); 1194 FDI_SEL_PCDCLK |
1060 I915_READ(fdi_tx_reg); 1195 FDI_DP_PORT_WIDTH_X4); /* default 4 lanes */
1061 udelay(100); 1196 I915_READ(fdi_rx_reg);
1197 udelay(200);
1198
1199 /* Enable CPU FDI TX PLL, always on for IGDNG */
1200 temp = I915_READ(fdi_tx_reg);
1201 if ((temp & FDI_TX_PLL_ENABLE) == 0) {
1202 I915_WRITE(fdi_tx_reg, temp | FDI_TX_PLL_ENABLE);
1203 I915_READ(fdi_tx_reg);
1204 udelay(100);
1205 }
1062 } 1206 }
1063 1207
1064 /* Enable CPU pipe */ 1208 /* Enable CPU pipe */
@@ -1077,122 +1221,126 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1077 I915_WRITE(dspbase_reg, I915_READ(dspbase_reg)); 1221 I915_WRITE(dspbase_reg, I915_READ(dspbase_reg));
1078 } 1222 }
1079 1223
1080 /* enable CPU FDI TX and PCH FDI RX */ 1224 if (!HAS_eDP) {
1081 temp = I915_READ(fdi_tx_reg); 1225 /* enable CPU FDI TX and PCH FDI RX */
1082 temp |= FDI_TX_ENABLE; 1226 temp = I915_READ(fdi_tx_reg);
1083 temp |= FDI_DP_PORT_WIDTH_X4; /* default */ 1227 temp |= FDI_TX_ENABLE;
1084 temp &= ~FDI_LINK_TRAIN_NONE; 1228 temp |= FDI_DP_PORT_WIDTH_X4; /* default */
1085 temp |= FDI_LINK_TRAIN_PATTERN_1; 1229 temp &= ~FDI_LINK_TRAIN_NONE;
1086 I915_WRITE(fdi_tx_reg, temp); 1230 temp |= FDI_LINK_TRAIN_PATTERN_1;
1087 I915_READ(fdi_tx_reg); 1231 I915_WRITE(fdi_tx_reg, temp);
1232 I915_READ(fdi_tx_reg);
1088 1233
1089 temp = I915_READ(fdi_rx_reg); 1234 temp = I915_READ(fdi_rx_reg);
1090 temp &= ~FDI_LINK_TRAIN_NONE; 1235 temp &= ~FDI_LINK_TRAIN_NONE;
1091 temp |= FDI_LINK_TRAIN_PATTERN_1; 1236 temp |= FDI_LINK_TRAIN_PATTERN_1;
1092 I915_WRITE(fdi_rx_reg, temp | FDI_RX_ENABLE); 1237 I915_WRITE(fdi_rx_reg, temp | FDI_RX_ENABLE);
1093 I915_READ(fdi_rx_reg); 1238 I915_READ(fdi_rx_reg);
1094 1239
1095 udelay(150); 1240 udelay(150);
1096 1241
1097 /* Train FDI. */ 1242 /* Train FDI. */
1098 /* umask FDI RX Interrupt symbol_lock and bit_lock bit 1243 /* umask FDI RX Interrupt symbol_lock and bit_lock bit
1099 for train result */ 1244 for train result */
1100 temp = I915_READ(fdi_rx_imr_reg); 1245 temp = I915_READ(fdi_rx_imr_reg);
1101 temp &= ~FDI_RX_SYMBOL_LOCK; 1246 temp &= ~FDI_RX_SYMBOL_LOCK;
1102 temp &= ~FDI_RX_BIT_LOCK; 1247 temp &= ~FDI_RX_BIT_LOCK;
1103 I915_WRITE(fdi_rx_imr_reg, temp); 1248 I915_WRITE(fdi_rx_imr_reg, temp);
1104 I915_READ(fdi_rx_imr_reg); 1249 I915_READ(fdi_rx_imr_reg);
1105 udelay(150); 1250 udelay(150);
1106 1251
1107 temp = I915_READ(fdi_rx_iir_reg); 1252 temp = I915_READ(fdi_rx_iir_reg);
1108 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp); 1253 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
1109 1254
1110 if ((temp & FDI_RX_BIT_LOCK) == 0) { 1255 if ((temp & FDI_RX_BIT_LOCK) == 0) {
1111 for (j = 0; j < tries; j++) { 1256 for (j = 0; j < tries; j++) {
1112 temp = I915_READ(fdi_rx_iir_reg); 1257 temp = I915_READ(fdi_rx_iir_reg);
1113 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp); 1258 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
1114 if (temp & FDI_RX_BIT_LOCK) 1259 if (temp & FDI_RX_BIT_LOCK)
1115 break; 1260 break;
1116 udelay(200); 1261 udelay(200);
1117 } 1262 }
1118 if (j != tries) 1263 if (j != tries)
1264 I915_WRITE(fdi_rx_iir_reg,
1265 temp | FDI_RX_BIT_LOCK);
1266 else
1267 DRM_DEBUG("train 1 fail\n");
1268 } else {
1119 I915_WRITE(fdi_rx_iir_reg, 1269 I915_WRITE(fdi_rx_iir_reg,
1120 temp | FDI_RX_BIT_LOCK); 1270 temp | FDI_RX_BIT_LOCK);
1121 else 1271 DRM_DEBUG("train 1 ok 2!\n");
1122 DRM_DEBUG("train 1 fail\n"); 1272 }
1123 } else { 1273 temp = I915_READ(fdi_tx_reg);
1124 I915_WRITE(fdi_rx_iir_reg, 1274 temp &= ~FDI_LINK_TRAIN_NONE;
1125 temp | FDI_RX_BIT_LOCK); 1275 temp |= FDI_LINK_TRAIN_PATTERN_2;
1126 DRM_DEBUG("train 1 ok 2!\n"); 1276 I915_WRITE(fdi_tx_reg, temp);
1127 } 1277
1128 temp = I915_READ(fdi_tx_reg); 1278 temp = I915_READ(fdi_rx_reg);
1129 temp &= ~FDI_LINK_TRAIN_NONE; 1279 temp &= ~FDI_LINK_TRAIN_NONE;
1130 temp |= FDI_LINK_TRAIN_PATTERN_2; 1280 temp |= FDI_LINK_TRAIN_PATTERN_2;
1131 I915_WRITE(fdi_tx_reg, temp); 1281 I915_WRITE(fdi_rx_reg, temp);
1132
1133 temp = I915_READ(fdi_rx_reg);
1134 temp &= ~FDI_LINK_TRAIN_NONE;
1135 temp |= FDI_LINK_TRAIN_PATTERN_2;
1136 I915_WRITE(fdi_rx_reg, temp);
1137 1282
1138 udelay(150); 1283 udelay(150);
1139 1284
1140 temp = I915_READ(fdi_rx_iir_reg); 1285 temp = I915_READ(fdi_rx_iir_reg);
1141 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp); 1286 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
1142 1287
1143 if ((temp & FDI_RX_SYMBOL_LOCK) == 0) { 1288 if ((temp & FDI_RX_SYMBOL_LOCK) == 0) {
1144 for (j = 0; j < tries; j++) { 1289 for (j = 0; j < tries; j++) {
1145 temp = I915_READ(fdi_rx_iir_reg); 1290 temp = I915_READ(fdi_rx_iir_reg);
1146 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp); 1291 DRM_DEBUG("FDI_RX_IIR 0x%x\n", temp);
1147 if (temp & FDI_RX_SYMBOL_LOCK) 1292 if (temp & FDI_RX_SYMBOL_LOCK)
1148 break; 1293 break;
1149 udelay(200); 1294 udelay(200);
1150 } 1295 }
1151 if (j != tries) { 1296 if (j != tries) {
1297 I915_WRITE(fdi_rx_iir_reg,
1298 temp | FDI_RX_SYMBOL_LOCK);
1299 DRM_DEBUG("train 2 ok 1!\n");
1300 } else
1301 DRM_DEBUG("train 2 fail\n");
1302 } else {
1152 I915_WRITE(fdi_rx_iir_reg, 1303 I915_WRITE(fdi_rx_iir_reg,
1153 temp | FDI_RX_SYMBOL_LOCK); 1304 temp | FDI_RX_SYMBOL_LOCK);
1154 DRM_DEBUG("train 2 ok 1!\n"); 1305 DRM_DEBUG("train 2 ok 2!\n");
1155 } else 1306 }
1156 DRM_DEBUG("train 2 fail\n"); 1307 DRM_DEBUG("train done\n");
1157 } else {
1158 I915_WRITE(fdi_rx_iir_reg, temp | FDI_RX_SYMBOL_LOCK);
1159 DRM_DEBUG("train 2 ok 2!\n");
1160 }
1161 DRM_DEBUG("train done\n");
1162 1308
1163 /* set transcoder timing */ 1309 /* set transcoder timing */
1164 I915_WRITE(trans_htot_reg, I915_READ(cpu_htot_reg)); 1310 I915_WRITE(trans_htot_reg, I915_READ(cpu_htot_reg));
1165 I915_WRITE(trans_hblank_reg, I915_READ(cpu_hblank_reg)); 1311 I915_WRITE(trans_hblank_reg, I915_READ(cpu_hblank_reg));
1166 I915_WRITE(trans_hsync_reg, I915_READ(cpu_hsync_reg)); 1312 I915_WRITE(trans_hsync_reg, I915_READ(cpu_hsync_reg));
1167 1313
1168 I915_WRITE(trans_vtot_reg, I915_READ(cpu_vtot_reg)); 1314 I915_WRITE(trans_vtot_reg, I915_READ(cpu_vtot_reg));
1169 I915_WRITE(trans_vblank_reg, I915_READ(cpu_vblank_reg)); 1315 I915_WRITE(trans_vblank_reg, I915_READ(cpu_vblank_reg));
1170 I915_WRITE(trans_vsync_reg, I915_READ(cpu_vsync_reg)); 1316 I915_WRITE(trans_vsync_reg, I915_READ(cpu_vsync_reg));
1171 1317
1172 /* enable PCH transcoder */ 1318 /* enable PCH transcoder */
1173 temp = I915_READ(transconf_reg); 1319 temp = I915_READ(transconf_reg);
1174 I915_WRITE(transconf_reg, temp | TRANS_ENABLE); 1320 I915_WRITE(transconf_reg, temp | TRANS_ENABLE);
1175 I915_READ(transconf_reg); 1321 I915_READ(transconf_reg);
1176 1322
1177 while ((I915_READ(transconf_reg) & TRANS_STATE_ENABLE) == 0) 1323 while ((I915_READ(transconf_reg) & TRANS_STATE_ENABLE) == 0)
1178 ; 1324 ;
1179 1325
1180 /* enable normal */ 1326 /* enable normal */
1181 1327
1182 temp = I915_READ(fdi_tx_reg); 1328 temp = I915_READ(fdi_tx_reg);
1183 temp &= ~FDI_LINK_TRAIN_NONE; 1329 temp &= ~FDI_LINK_TRAIN_NONE;
1184 I915_WRITE(fdi_tx_reg, temp | FDI_LINK_TRAIN_NONE | 1330 I915_WRITE(fdi_tx_reg, temp | FDI_LINK_TRAIN_NONE |
1185 FDI_TX_ENHANCE_FRAME_ENABLE); 1331 FDI_TX_ENHANCE_FRAME_ENABLE);
1186 I915_READ(fdi_tx_reg); 1332 I915_READ(fdi_tx_reg);
1187 1333
1188 temp = I915_READ(fdi_rx_reg); 1334 temp = I915_READ(fdi_rx_reg);
1189 temp &= ~FDI_LINK_TRAIN_NONE; 1335 temp &= ~FDI_LINK_TRAIN_NONE;
1190 I915_WRITE(fdi_rx_reg, temp | FDI_LINK_TRAIN_NONE | 1336 I915_WRITE(fdi_rx_reg, temp | FDI_LINK_TRAIN_NONE |
1191 FDI_RX_ENHANCE_FRAME_ENABLE); 1337 FDI_RX_ENHANCE_FRAME_ENABLE);
1192 I915_READ(fdi_rx_reg); 1338 I915_READ(fdi_rx_reg);
1193 1339
1194 /* wait one idle pattern time */ 1340 /* wait one idle pattern time */
1195 udelay(100); 1341 udelay(100);
1342
1343 }
1196 1344
1197 intel_crtc_load_lut(crtc); 1345 intel_crtc_load_lut(crtc);
1198 1346
@@ -1200,8 +1348,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1200 case DRM_MODE_DPMS_OFF: 1348 case DRM_MODE_DPMS_OFF:
1201 DRM_DEBUG("crtc %d dpms off\n", pipe); 1349 DRM_DEBUG("crtc %d dpms off\n", pipe);
1202 1350
1203 /* Disable the VGA plane that we never use */ 1351 i915_disable_vga(dev);
1204 I915_WRITE(CPU_VGACNTRL, VGA_DISP_DISABLE);
1205 1352
1206 /* Disable display plane */ 1353 /* Disable display plane */
1207 temp = I915_READ(dspcntr_reg); 1354 temp = I915_READ(dspcntr_reg);
@@ -1217,17 +1364,23 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1217 if ((temp & PIPEACONF_ENABLE) != 0) { 1364 if ((temp & PIPEACONF_ENABLE) != 0) {
1218 I915_WRITE(pipeconf_reg, temp & ~PIPEACONF_ENABLE); 1365 I915_WRITE(pipeconf_reg, temp & ~PIPEACONF_ENABLE);
1219 I915_READ(pipeconf_reg); 1366 I915_READ(pipeconf_reg);
1367 n = 0;
1220 /* wait for cpu pipe off, pipe state */ 1368 /* wait for cpu pipe off, pipe state */
1221 while ((I915_READ(pipeconf_reg) & I965_PIPECONF_ACTIVE) != 0) 1369 while ((I915_READ(pipeconf_reg) & I965_PIPECONF_ACTIVE) != 0) {
1222 ; 1370 n++;
1371 if (n < 60) {
1372 udelay(500);
1373 continue;
1374 } else {
1375 DRM_DEBUG("pipe %d off delay\n", pipe);
1376 break;
1377 }
1378 }
1223 } else 1379 } else
1224 DRM_DEBUG("crtc %d is disabled\n", pipe); 1380 DRM_DEBUG("crtc %d is disabled\n", pipe);
1225 1381
1226 /* IGDNG-A : disable cpu panel fitter ? */ 1382 if (HAS_eDP) {
1227 temp = I915_READ(pf_ctl_reg); 1383 igdng_disable_pll_edp(crtc);
1228 if ((temp & PF_ENABLE) != 0) {
1229 I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE);
1230 I915_READ(pf_ctl_reg);
1231 } 1384 }
1232 1385
1233 /* disable CPU FDI tx and PCH FDI rx */ 1386 /* disable CPU FDI tx and PCH FDI rx */
@@ -1239,6 +1392,8 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1239 I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE); 1392 I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE);
1240 I915_READ(fdi_rx_reg); 1393 I915_READ(fdi_rx_reg);
1241 1394
1395 udelay(100);
1396
1242 /* still set train pattern 1 */ 1397 /* still set train pattern 1 */
1243 temp = I915_READ(fdi_tx_reg); 1398 temp = I915_READ(fdi_tx_reg);
1244 temp &= ~FDI_LINK_TRAIN_NONE; 1399 temp &= ~FDI_LINK_TRAIN_NONE;
@@ -1250,14 +1405,25 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1250 temp |= FDI_LINK_TRAIN_PATTERN_1; 1405 temp |= FDI_LINK_TRAIN_PATTERN_1;
1251 I915_WRITE(fdi_rx_reg, temp); 1406 I915_WRITE(fdi_rx_reg, temp);
1252 1407
1408 udelay(100);
1409
1253 /* disable PCH transcoder */ 1410 /* disable PCH transcoder */
1254 temp = I915_READ(transconf_reg); 1411 temp = I915_READ(transconf_reg);
1255 if ((temp & TRANS_ENABLE) != 0) { 1412 if ((temp & TRANS_ENABLE) != 0) {
1256 I915_WRITE(transconf_reg, temp & ~TRANS_ENABLE); 1413 I915_WRITE(transconf_reg, temp & ~TRANS_ENABLE);
1257 I915_READ(transconf_reg); 1414 I915_READ(transconf_reg);
1415 n = 0;
1258 /* wait for PCH transcoder off, transcoder state */ 1416 /* wait for PCH transcoder off, transcoder state */
1259 while ((I915_READ(transconf_reg) & TRANS_STATE_ENABLE) != 0) 1417 while ((I915_READ(transconf_reg) & TRANS_STATE_ENABLE) != 0) {
1260 ; 1418 n++;
1419 if (n < 60) {
1420 udelay(500);
1421 continue;
1422 } else {
1423 DRM_DEBUG("transcoder %d off delay\n", pipe);
1424 break;
1425 }
1426 }
1261 } 1427 }
1262 1428
1263 /* disable PCH DPLL */ 1429 /* disable PCH DPLL */
@@ -1275,6 +1441,22 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1275 I915_READ(fdi_rx_reg); 1441 I915_READ(fdi_rx_reg);
1276 } 1442 }
1277 1443
1444 /* Disable CPU FDI TX PLL */
1445 temp = I915_READ(fdi_tx_reg);
1446 if ((temp & FDI_TX_PLL_ENABLE) != 0) {
1447 I915_WRITE(fdi_tx_reg, temp & ~FDI_TX_PLL_ENABLE);
1448 I915_READ(fdi_tx_reg);
1449 udelay(100);
1450 }
1451
1452 /* Disable PF */
1453 temp = I915_READ(pf_ctl_reg);
1454 if ((temp & PF_ENABLE) != 0) {
1455 I915_WRITE(pf_ctl_reg, temp & ~PF_ENABLE);
1456 I915_READ(pf_ctl_reg);
1457 }
1458 I915_WRITE(pf_win_size, 0);
1459
1278 /* Wait for the clocks to turn off. */ 1460 /* Wait for the clocks to turn off. */
1279 udelay(150); 1461 udelay(150);
1280 break; 1462 break;
@@ -1342,7 +1524,7 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1342 //intel_crtc_dpms_video(crtc, FALSE); TODO 1524 //intel_crtc_dpms_video(crtc, FALSE); TODO
1343 1525
1344 /* Disable the VGA plane that we never use */ 1526 /* Disable the VGA plane that we never use */
1345 I915_WRITE(VGACNTRL, VGA_DISP_DISABLE); 1527 i915_disable_vga(dev);
1346 1528
1347 /* Disable display plane */ 1529 /* Disable display plane */
1348 temp = I915_READ(dspcntr_reg); 1530 temp = I915_READ(dspcntr_reg);
@@ -1623,48 +1805,72 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
1623 IGD_FIFO_LINE_SIZE 1805 IGD_FIFO_LINE_SIZE
1624}; 1806};
1625static struct intel_watermark_params i945_wm_info = { 1807static struct intel_watermark_params i945_wm_info = {
1626 I915_FIFO_LINE_SIZE, 1808 I945_FIFO_SIZE,
1627 I915_MAX_WM, 1809 I915_MAX_WM,
1628 1, 1810 1,
1629 0, 1811 2,
1630 IGD_FIFO_LINE_SIZE 1812 I915_FIFO_LINE_SIZE
1631}; 1813};
1632static struct intel_watermark_params i915_wm_info = { 1814static struct intel_watermark_params i915_wm_info = {
1633 I945_FIFO_SIZE, 1815 I915_FIFO_SIZE,
1634 I915_MAX_WM, 1816 I915_MAX_WM,
1635 1, 1817 1,
1636 0, 1818 2,
1637 I915_FIFO_LINE_SIZE 1819 I915_FIFO_LINE_SIZE
1638}; 1820};
1639static struct intel_watermark_params i855_wm_info = { 1821static struct intel_watermark_params i855_wm_info = {
1640 I855GM_FIFO_SIZE, 1822 I855GM_FIFO_SIZE,
1641 I915_MAX_WM, 1823 I915_MAX_WM,
1642 1, 1824 1,
1643 0, 1825 2,
1644 I830_FIFO_LINE_SIZE 1826 I830_FIFO_LINE_SIZE
1645}; 1827};
1646static struct intel_watermark_params i830_wm_info = { 1828static struct intel_watermark_params i830_wm_info = {
1647 I830_FIFO_SIZE, 1829 I830_FIFO_SIZE,
1648 I915_MAX_WM, 1830 I915_MAX_WM,
1649 1, 1831 1,
1650 0, 1832 2,
1651 I830_FIFO_LINE_SIZE 1833 I830_FIFO_LINE_SIZE
1652}; 1834};
1653 1835
1836/**
1837 * intel_calculate_wm - calculate watermark level
1838 * @clock_in_khz: pixel clock
1839 * @wm: chip FIFO params
1840 * @pixel_size: display pixel size
1841 * @latency_ns: memory latency for the platform
1842 *
1843 * Calculate the watermark level (the level at which the display plane will
1844 * start fetching from memory again). Each chip has a different display
1845 * FIFO size and allocation, so the caller needs to figure that out and pass
1846 * in the correct intel_watermark_params structure.
1847 *
1848 * As the pixel clock runs, the FIFO will be drained at a rate that depends
1849 * on the pixel size. When it reaches the watermark level, it'll start
1850 * fetching FIFO line sized based chunks from memory until the FIFO fills
1851 * past the watermark point. If the FIFO drains completely, a FIFO underrun
1852 * will occur, and a display engine hang could result.
1853 */
1654static unsigned long intel_calculate_wm(unsigned long clock_in_khz, 1854static unsigned long intel_calculate_wm(unsigned long clock_in_khz,
1655 struct intel_watermark_params *wm, 1855 struct intel_watermark_params *wm,
1656 int pixel_size, 1856 int pixel_size,
1657 unsigned long latency_ns) 1857 unsigned long latency_ns)
1658{ 1858{
1659 unsigned long bytes_required, wm_size; 1859 long entries_required, wm_size;
1860
1861 entries_required = (clock_in_khz * pixel_size * latency_ns) / 1000000;
1862 entries_required /= wm->cacheline_size;
1660 1863
1661 bytes_required = (clock_in_khz * pixel_size * latency_ns) / 1000000; 1864 DRM_DEBUG("FIFO entries required for mode: %d\n", entries_required);
1662 bytes_required /= wm->cacheline_size;
1663 wm_size = wm->fifo_size - bytes_required - wm->guard_size;
1664 1865
1665 if (wm_size > wm->max_wm) 1866 wm_size = wm->fifo_size - (entries_required + wm->guard_size);
1867
1868 DRM_DEBUG("FIFO watermark level: %d\n", wm_size);
1869
1870 /* Don't promote wm_size to unsigned... */
1871 if (wm_size > (long)wm->max_wm)
1666 wm_size = wm->max_wm; 1872 wm_size = wm->max_wm;
1667 if (wm_size == 0) 1873 if (wm_size <= 0)
1668 wm_size = wm->default_wm; 1874 wm_size = wm->default_wm;
1669 return wm_size; 1875 return wm_size;
1670} 1876}
@@ -1799,8 +2005,40 @@ static void igd_enable_cxsr(struct drm_device *dev, unsigned long clock,
1799 return; 2005 return;
1800} 2006}
1801 2007
1802const static int latency_ns = 5000; /* default for non-igd platforms */ 2008const static int latency_ns = 3000; /* default for non-igd platforms */
1803 2009
2010static int intel_get_fifo_size(struct drm_device *dev, int plane)
2011{
2012 struct drm_i915_private *dev_priv = dev->dev_private;
2013 uint32_t dsparb = I915_READ(DSPARB);
2014 int size;
2015
2016 if (IS_I9XX(dev)) {
2017 if (plane == 0)
2018 size = dsparb & 0x7f;
2019 else
2020 size = ((dsparb >> DSPARB_CSTART_SHIFT) & 0x7f) -
2021 (dsparb & 0x7f);
2022 } else if (IS_I85X(dev)) {
2023 if (plane == 0)
2024 size = dsparb & 0x1ff;
2025 else
2026 size = ((dsparb >> DSPARB_BEND_SHIFT) & 0x1ff) -
2027 (dsparb & 0x1ff);
2028 size >>= 1; /* Convert to cachelines */
2029 } else if (IS_845G(dev)) {
2030 size = dsparb & 0x7f;
2031 size >>= 2; /* Convert to cachelines */
2032 } else {
2033 size = dsparb & 0x7f;
2034 size >>= 1; /* Convert to cachelines */
2035 }
2036
2037 DRM_DEBUG("FIFO size - (0x%08x) %s: %d\n", dsparb, plane ? "B" : "A",
2038 size);
2039
2040 return size;
2041}
1804 2042
1805static void i965_update_wm(struct drm_device *dev) 2043static void i965_update_wm(struct drm_device *dev)
1806{ 2044{
@@ -1817,101 +2055,89 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
1817 int planeb_clock, int sr_hdisplay, int pixel_size) 2055 int planeb_clock, int sr_hdisplay, int pixel_size)
1818{ 2056{
1819 struct drm_i915_private *dev_priv = dev->dev_private; 2057 struct drm_i915_private *dev_priv = dev->dev_private;
1820 uint32_t fwater_lo = I915_READ(FW_BLC) & MM_FIFO_WATERMARK; 2058 uint32_t fwater_lo;
1821 uint32_t fwater_hi = I915_READ(FW_BLC2) & LM_FIFO_WATERMARK; 2059 uint32_t fwater_hi;
1822 int bsize, asize, cwm, bwm = 1, awm = 1, srwm = 1; 2060 int total_size, cacheline_size, cwm, srwm = 1;
1823 uint32_t dsparb = I915_READ(DSPARB); 2061 int planea_wm, planeb_wm;
1824 int planea_entries, planeb_entries; 2062 struct intel_watermark_params planea_params, planeb_params;
1825 struct intel_watermark_params *wm_params;
1826 unsigned long line_time_us; 2063 unsigned long line_time_us;
1827 int sr_clock, sr_entries = 0; 2064 int sr_clock, sr_entries = 0;
1828 2065
2066 /* Create copies of the base settings for each pipe */
1829 if (IS_I965GM(dev) || IS_I945GM(dev)) 2067 if (IS_I965GM(dev) || IS_I945GM(dev))
1830 wm_params = &i945_wm_info; 2068 planea_params = planeb_params = i945_wm_info;
1831 else if (IS_I9XX(dev)) 2069 else if (IS_I9XX(dev))
1832 wm_params = &i915_wm_info; 2070 planea_params = planeb_params = i915_wm_info;
1833 else 2071 else
1834 wm_params = &i855_wm_info; 2072 planea_params = planeb_params = i855_wm_info;
1835
1836 planea_entries = intel_calculate_wm(planea_clock, wm_params,
1837 pixel_size, latency_ns);
1838 planeb_entries = intel_calculate_wm(planeb_clock, wm_params,
1839 pixel_size, latency_ns);
1840
1841 DRM_DEBUG("FIFO entries - A: %d, B: %d\n", planea_entries,
1842 planeb_entries);
1843 2073
1844 if (IS_I9XX(dev)) { 2074 /* Grab a couple of global values before we overwrite them */
1845 asize = dsparb & 0x7f; 2075 total_size = planea_params.fifo_size;
1846 bsize = (dsparb >> DSPARB_CSTART_SHIFT) & 0x7f; 2076 cacheline_size = planea_params.cacheline_size;
1847 } else {
1848 asize = dsparb & 0x1ff;
1849 bsize = (dsparb >> DSPARB_BEND_SHIFT) & 0x1ff;
1850 }
1851 DRM_DEBUG("FIFO size - A: %d, B: %d\n", asize, bsize);
1852 2077
1853 /* Two extra entries for padding */ 2078 /* Update per-plane FIFO sizes */
1854 awm = asize - (planea_entries + 2); 2079 planea_params.fifo_size = intel_get_fifo_size(dev, 0);
1855 bwm = bsize - (planeb_entries + 2); 2080 planeb_params.fifo_size = intel_get_fifo_size(dev, 1);
1856 2081
1857 /* Sanity check against potentially bad FIFO allocations */ 2082 planea_wm = intel_calculate_wm(planea_clock, &planea_params,
1858 if (awm <= 0) { 2083 pixel_size, latency_ns);
1859 /* pipe is on but has too few FIFO entries */ 2084 planeb_wm = intel_calculate_wm(planeb_clock, &planeb_params,
1860 if (planea_entries != 0) 2085 pixel_size, latency_ns);
1861 DRM_DEBUG("plane A needs more FIFO entries\n"); 2086 DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
1862 awm = 1;
1863 }
1864 if (bwm <= 0) {
1865 if (planeb_entries != 0)
1866 DRM_DEBUG("plane B needs more FIFO entries\n");
1867 bwm = 1;
1868 }
1869 2087
1870 /* 2088 /*
1871 * Overlay gets an aggressive default since video jitter is bad. 2089 * Overlay gets an aggressive default since video jitter is bad.
1872 */ 2090 */
1873 cwm = 2; 2091 cwm = 2;
1874 2092
1875 /* Calc sr entries for one pipe configs */ 2093 /* Calc sr entries for one plane configs */
1876 if (!planea_clock || !planeb_clock) { 2094 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2095 /* self-refresh has much higher latency */
2096 const static int sr_latency_ns = 6000;
2097
1877 sr_clock = planea_clock ? planea_clock : planeb_clock; 2098 sr_clock = planea_clock ? planea_clock : planeb_clock;
1878 line_time_us = (sr_hdisplay * 1000) / sr_clock; 2099 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
1879 sr_entries = (((latency_ns / line_time_us) + 1) * pixel_size * 2100
1880 sr_hdisplay) / 1000; 2101 /* Use ns/us then divide to preserve precision */
1881 sr_entries = roundup(sr_entries / wm_params->cacheline_size, 1); 2102 sr_entries = (((sr_latency_ns / line_time_us) + 1) *
1882 if (sr_entries < wm_params->fifo_size) 2103 pixel_size * sr_hdisplay) / 1000;
1883 srwm = wm_params->fifo_size - sr_entries; 2104 sr_entries = roundup(sr_entries / cacheline_size, 1);
2105 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2106 srwm = total_size - sr_entries;
2107 if (srwm < 0)
2108 srwm = 1;
2109 if (IS_I9XX(dev))
2110 I915_WRITE(FW_BLC_SELF, (srwm & 0x3f));
1884 } 2111 }
1885 2112
1886 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n", 2113 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, C: %d, SR %d\n",
1887 awm, bwm, cwm, srwm); 2114 planea_wm, planeb_wm, cwm, srwm);
1888 2115
1889 fwater_lo = fwater_lo | ((bwm & 0x3f) << 16) | (awm & 0x3f); 2116 fwater_lo = ((planeb_wm & 0x3f) << 16) | (planea_wm & 0x3f);
1890 fwater_hi = fwater_hi | (cwm & 0x1f); 2117 fwater_hi = (cwm & 0x1f);
2118
2119 /* Set request length to 8 cachelines per fetch */
2120 fwater_lo = fwater_lo | (1 << 24) | (1 << 8);
2121 fwater_hi = fwater_hi | (1 << 8);
1891 2122
1892 I915_WRITE(FW_BLC, fwater_lo); 2123 I915_WRITE(FW_BLC, fwater_lo);
1893 I915_WRITE(FW_BLC2, fwater_hi); 2124 I915_WRITE(FW_BLC2, fwater_hi);
1894 if (IS_I9XX(dev))
1895 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN | (srwm & 0x3f));
1896} 2125}
1897 2126
1898static void i830_update_wm(struct drm_device *dev, int planea_clock, 2127static void i830_update_wm(struct drm_device *dev, int planea_clock,
1899 int pixel_size) 2128 int pixel_size)
1900{ 2129{
1901 struct drm_i915_private *dev_priv = dev->dev_private; 2130 struct drm_i915_private *dev_priv = dev->dev_private;
1902 uint32_t dsparb = I915_READ(DSPARB); 2131 uint32_t fwater_lo = I915_READ(FW_BLC) & ~0xfff;
1903 uint32_t fwater_lo = I915_READ(FW_BLC) & MM_FIFO_WATERMARK; 2132 int planea_wm;
1904 unsigned int asize, awm;
1905 int planea_entries;
1906
1907 planea_entries = intel_calculate_wm(planea_clock, &i830_wm_info,
1908 pixel_size, latency_ns);
1909 2133
1910 asize = dsparb & 0x7f; 2134 i830_wm_info.fifo_size = intel_get_fifo_size(dev, 0);
1911 2135
1912 awm = asize - planea_entries; 2136 planea_wm = intel_calculate_wm(planea_clock, &i830_wm_info,
2137 pixel_size, latency_ns);
2138 fwater_lo |= (3<<8) | planea_wm;
1913 2139
1914 fwater_lo = fwater_lo | awm; 2140 DRM_DEBUG("Setting FIFO watermarks - A: %d\n", planea_wm);
1915 2141
1916 I915_WRITE(FW_BLC, fwater_lo); 2142 I915_WRITE(FW_BLC, fwater_lo);
1917} 2143}
@@ -1984,7 +2210,7 @@ static void intel_update_watermarks(struct drm_device *dev)
1984 if (enabled <= 0) 2210 if (enabled <= 0)
1985 return; 2211 return;
1986 2212
1987 /* Single pipe configs can enable self refresh */ 2213 /* Single plane configs can enable self refresh */
1988 if (enabled == 1 && IS_IGD(dev)) 2214 if (enabled == 1 && IS_IGD(dev))
1989 igd_enable_cxsr(dev, sr_clock, pixel_size); 2215 igd_enable_cxsr(dev, sr_clock, pixel_size);
1990 else if (IS_IGD(dev)) 2216 else if (IS_IGD(dev))
@@ -2028,6 +2254,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2028 u32 dpll = 0, fp = 0, dspcntr, pipeconf; 2254 u32 dpll = 0, fp = 0, dspcntr, pipeconf;
2029 bool ok, is_sdvo = false, is_dvo = false; 2255 bool ok, is_sdvo = false, is_dvo = false;
2030 bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false; 2256 bool is_crt = false, is_lvds = false, is_tv = false, is_dp = false;
2257 bool is_edp = false;
2031 struct drm_mode_config *mode_config = &dev->mode_config; 2258 struct drm_mode_config *mode_config = &dev->mode_config;
2032 struct drm_connector *connector; 2259 struct drm_connector *connector;
2033 const intel_limit_t *limit; 2260 const intel_limit_t *limit;
@@ -2043,6 +2270,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2043 int lvds_reg = LVDS; 2270 int lvds_reg = LVDS;
2044 u32 temp; 2271 u32 temp;
2045 int sdvo_pixel_multiply; 2272 int sdvo_pixel_multiply;
2273 int target_clock;
2046 2274
2047 drm_vblank_pre_modeset(dev, pipe); 2275 drm_vblank_pre_modeset(dev, pipe);
2048 2276
@@ -2074,6 +2302,9 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2074 case INTEL_OUTPUT_DISPLAYPORT: 2302 case INTEL_OUTPUT_DISPLAYPORT:
2075 is_dp = true; 2303 is_dp = true;
2076 break; 2304 break;
2305 case INTEL_OUTPUT_EDP:
2306 is_edp = true;
2307 break;
2077 } 2308 }
2078 2309
2079 num_outputs++; 2310 num_outputs++;
@@ -2125,11 +2356,29 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2125 } 2356 }
2126 2357
2127 /* FDI link */ 2358 /* FDI link */
2128 if (IS_IGDNG(dev)) 2359 if (IS_IGDNG(dev)) {
2129 igdng_compute_m_n(3, 4, /* lane num 4 */ 2360 int lane, link_bw;
2130 adjusted_mode->clock, 2361 /* eDP doesn't require FDI link, so just set DP M/N
2131 270000, /* lane clock */ 2362 according to current link config */
2132 &m_n); 2363 if (is_edp) {
2364 struct drm_connector *edp;
2365 target_clock = mode->clock;
2366 edp = intel_pipe_get_output(crtc);
2367 intel_edp_link_config(to_intel_output(edp),
2368 &lane, &link_bw);
2369 } else {
2370 /* DP over FDI requires target mode clock
2371 instead of link clock */
2372 if (is_dp)
2373 target_clock = mode->clock;
2374 else
2375 target_clock = adjusted_mode->clock;
2376 lane = 4;
2377 link_bw = 270000;
2378 }
2379 igdng_compute_m_n(3, lane, target_clock,
2380 link_bw, &m_n);
2381 }
2133 2382
2134 if (IS_IGD(dev)) 2383 if (IS_IGD(dev))
2135 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; 2384 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
@@ -2250,29 +2499,15 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2250 dpll_reg = pch_dpll_reg; 2499 dpll_reg = pch_dpll_reg;
2251 } 2500 }
2252 2501
2253 if (dpll & DPLL_VCO_ENABLE) { 2502 if (is_edp) {
2503 igdng_disable_pll_edp(crtc);
2504 } else if ((dpll & DPLL_VCO_ENABLE)) {
2254 I915_WRITE(fp_reg, fp); 2505 I915_WRITE(fp_reg, fp);
2255 I915_WRITE(dpll_reg, dpll & ~DPLL_VCO_ENABLE); 2506 I915_WRITE(dpll_reg, dpll & ~DPLL_VCO_ENABLE);
2256 I915_READ(dpll_reg); 2507 I915_READ(dpll_reg);
2257 udelay(150); 2508 udelay(150);
2258 } 2509 }
2259 2510
2260 if (IS_IGDNG(dev)) {
2261 /* enable PCH clock reference source */
2262 /* XXX need to change the setting for other outputs */
2263 u32 temp;
2264 temp = I915_READ(PCH_DREF_CONTROL);
2265 temp &= ~DREF_NONSPREAD_SOURCE_MASK;
2266 temp |= DREF_NONSPREAD_CK505_ENABLE;
2267 temp &= ~DREF_SSC_SOURCE_MASK;
2268 temp |= DREF_SSC_SOURCE_ENABLE;
2269 temp &= ~DREF_SSC1_ENABLE;
2270 /* if no eDP, disable source output to CPU */
2271 temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
2272 temp |= DREF_CPU_SOURCE_OUTPUT_DISABLE;
2273 I915_WRITE(PCH_DREF_CONTROL, temp);
2274 }
2275
2276 /* The LVDS pin pair needs to be on before the DPLLs are enabled. 2511 /* The LVDS pin pair needs to be on before the DPLLs are enabled.
2277 * This is an exception to the general rule that mode_set doesn't turn 2512 * This is an exception to the general rule that mode_set doesn't turn
2278 * things on. 2513 * things on.
@@ -2304,23 +2539,25 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2304 if (is_dp) 2539 if (is_dp)
2305 intel_dp_set_m_n(crtc, mode, adjusted_mode); 2540 intel_dp_set_m_n(crtc, mode, adjusted_mode);
2306 2541
2307 I915_WRITE(fp_reg, fp); 2542 if (!is_edp) {
2308 I915_WRITE(dpll_reg, dpll); 2543 I915_WRITE(fp_reg, fp);
2309 I915_READ(dpll_reg);
2310 /* Wait for the clocks to stabilize. */
2311 udelay(150);
2312
2313 if (IS_I965G(dev) && !IS_IGDNG(dev)) {
2314 sdvo_pixel_multiply = adjusted_mode->clock / mode->clock;
2315 I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) |
2316 ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT));
2317 } else {
2318 /* write it again -- the BIOS does, after all */
2319 I915_WRITE(dpll_reg, dpll); 2544 I915_WRITE(dpll_reg, dpll);
2545 I915_READ(dpll_reg);
2546 /* Wait for the clocks to stabilize. */
2547 udelay(150);
2548
2549 if (IS_I965G(dev) && !IS_IGDNG(dev)) {
2550 sdvo_pixel_multiply = adjusted_mode->clock / mode->clock;
2551 I915_WRITE(dpll_md_reg, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) |
2552 ((sdvo_pixel_multiply - 1) << DPLL_MD_UDI_MULTIPLIER_SHIFT));
2553 } else {
2554 /* write it again -- the BIOS does, after all */
2555 I915_WRITE(dpll_reg, dpll);
2556 }
2557 I915_READ(dpll_reg);
2558 /* Wait for the clocks to stabilize. */
2559 udelay(150);
2320 } 2560 }
2321 I915_READ(dpll_reg);
2322 /* Wait for the clocks to stabilize. */
2323 udelay(150);
2324 2561
2325 I915_WRITE(htot_reg, (adjusted_mode->crtc_hdisplay - 1) | 2562 I915_WRITE(htot_reg, (adjusted_mode->crtc_hdisplay - 1) |
2326 ((adjusted_mode->crtc_htotal - 1) << 16)); 2563 ((adjusted_mode->crtc_htotal - 1) << 16));
@@ -2350,10 +2587,14 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2350 I915_WRITE(link_m1_reg, m_n.link_m); 2587 I915_WRITE(link_m1_reg, m_n.link_m);
2351 I915_WRITE(link_n1_reg, m_n.link_n); 2588 I915_WRITE(link_n1_reg, m_n.link_n);
2352 2589
2353 /* enable FDI RX PLL too */ 2590 if (is_edp) {
2354 temp = I915_READ(fdi_rx_reg); 2591 igdng_set_pll_edp(crtc, adjusted_mode->clock);
2355 I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE); 2592 } else {
2356 udelay(200); 2593 /* enable FDI RX PLL too */
2594 temp = I915_READ(fdi_rx_reg);
2595 I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE);
2596 udelay(200);
2597 }
2357 } 2598 }
2358 2599
2359 I915_WRITE(pipeconf_reg, pipeconf); 2600 I915_WRITE(pipeconf_reg, pipeconf);
@@ -2951,12 +3192,17 @@ static void intel_setup_outputs(struct drm_device *dev)
2951 if (IS_IGDNG(dev)) { 3192 if (IS_IGDNG(dev)) {
2952 int found; 3193 int found;
2953 3194
3195 if (IS_MOBILE(dev) && (I915_READ(DP_A) & DP_DETECTED))
3196 intel_dp_init(dev, DP_A);
3197
2954 if (I915_READ(HDMIB) & PORT_DETECTED) { 3198 if (I915_READ(HDMIB) & PORT_DETECTED) {
2955 /* check SDVOB */ 3199 /* check SDVOB */
2956 /* found = intel_sdvo_init(dev, HDMIB); */ 3200 /* found = intel_sdvo_init(dev, HDMIB); */
2957 found = 0; 3201 found = 0;
2958 if (!found) 3202 if (!found)
2959 intel_hdmi_init(dev, HDMIB); 3203 intel_hdmi_init(dev, HDMIB);
3204 if (!found && (I915_READ(PCH_DP_B) & DP_DETECTED))
3205 intel_dp_init(dev, PCH_DP_B);
2960 } 3206 }
2961 3207
2962 if (I915_READ(HDMIC) & PORT_DETECTED) 3208 if (I915_READ(HDMIC) & PORT_DETECTED)
@@ -2965,6 +3211,12 @@ static void intel_setup_outputs(struct drm_device *dev)
2965 if (I915_READ(HDMID) & PORT_DETECTED) 3211 if (I915_READ(HDMID) & PORT_DETECTED)
2966 intel_hdmi_init(dev, HDMID); 3212 intel_hdmi_init(dev, HDMID);
2967 3213
3214 if (I915_READ(PCH_DP_C) & DP_DETECTED)
3215 intel_dp_init(dev, PCH_DP_C);
3216
3217 if (I915_READ(PCH_DP_D) & DP_DETECTED)
3218 intel_dp_init(dev, PCH_DP_D);
3219
2968 } else if (IS_I9XX(dev)) { 3220 } else if (IS_I9XX(dev)) {
2969 int found; 3221 int found;
2970 u32 reg; 3222 u32 reg;
@@ -3039,6 +3291,10 @@ static void intel_setup_outputs(struct drm_device *dev)
3039 (1 << 1)); 3291 (1 << 1));
3040 clone_mask = (1 << INTEL_OUTPUT_DISPLAYPORT); 3292 clone_mask = (1 << INTEL_OUTPUT_DISPLAYPORT);
3041 break; 3293 break;
3294 case INTEL_OUTPUT_EDP:
3295 crtc_mask = (1 << 1);
3296 clone_mask = (1 << INTEL_OUTPUT_EDP);
3297 break;
3042 } 3298 }
3043 encoder->possible_crtcs = crtc_mask; 3299 encoder->possible_crtcs = crtc_mask;
3044 encoder->possible_clones = intel_connector_clones(dev, clone_mask); 3300 encoder->possible_clones = intel_connector_clones(dev, clone_mask);
@@ -3148,6 +3404,9 @@ void intel_modeset_init(struct drm_device *dev)
3148 if (IS_I965G(dev)) { 3404 if (IS_I965G(dev)) {
3149 dev->mode_config.max_width = 8192; 3405 dev->mode_config.max_width = 8192;
3150 dev->mode_config.max_height = 8192; 3406 dev->mode_config.max_height = 8192;
3407 } else if (IS_I9XX(dev)) {
3408 dev->mode_config.max_width = 4096;
3409 dev->mode_config.max_height = 4096;
3151 } else { 3410 } else {
3152 dev->mode_config.max_width = 2048; 3411 dev->mode_config.max_width = 2048;
3153 dev->mode_config.max_height = 2048; 3412 dev->mode_config.max_height = 2048;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6770ae88370d..a6ff15ac548a 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -40,6 +40,8 @@
40 40
41#define DP_LINK_CONFIGURATION_SIZE 9 41#define DP_LINK_CONFIGURATION_SIZE 9
42 42
43#define IS_eDP(i) ((i)->type == INTEL_OUTPUT_EDP)
44
43struct intel_dp_priv { 45struct intel_dp_priv {
44 uint32_t output_reg; 46 uint32_t output_reg;
45 uint32_t DP; 47 uint32_t DP;
@@ -63,6 +65,19 @@ intel_dp_link_train(struct intel_output *intel_output, uint32_t DP,
63static void 65static void
64intel_dp_link_down(struct intel_output *intel_output, uint32_t DP); 66intel_dp_link_down(struct intel_output *intel_output, uint32_t DP);
65 67
68void
69intel_edp_link_config (struct intel_output *intel_output,
70 int *lane_num, int *link_bw)
71{
72 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
73
74 *lane_num = dp_priv->lane_count;
75 if (dp_priv->link_bw == DP_LINK_BW_1_62)
76 *link_bw = 162000;
77 else if (dp_priv->link_bw == DP_LINK_BW_2_7)
78 *link_bw = 270000;
79}
80
66static int 81static int
67intel_dp_max_lane_count(struct intel_output *intel_output) 82intel_dp_max_lane_count(struct intel_output *intel_output)
68{ 83{
@@ -206,7 +221,13 @@ intel_dp_aux_ch(struct intel_output *intel_output,
206 * and would like to run at 2MHz. So, take the 221 * and would like to run at 2MHz. So, take the
207 * hrawclk value and divide by 2 and use that 222 * hrawclk value and divide by 2 and use that
208 */ 223 */
209 aux_clock_divider = intel_hrawclk(dev) / 2; 224 if (IS_eDP(intel_output))
225 aux_clock_divider = 225; /* eDP input clock at 450Mhz */
226 else if (IS_IGDNG(dev))
227 aux_clock_divider = 62; /* IGDNG: input clock fixed at 125Mhz */
228 else
229 aux_clock_divider = intel_hrawclk(dev) / 2;
230
210 /* Must try at least 3 times according to DP spec */ 231 /* Must try at least 3 times according to DP spec */
211 for (try = 0; try < 5; try++) { 232 for (try = 0; try < 5; try++) {
212 /* Load the send data into the aux channel data registers */ 233 /* Load the send data into the aux channel data registers */
@@ -236,7 +257,7 @@ intel_dp_aux_ch(struct intel_output *intel_output,
236 } 257 }
237 258
238 /* Clear done status and any errors */ 259 /* Clear done status and any errors */
239 I915_WRITE(ch_ctl, (ctl | 260 I915_WRITE(ch_ctl, (status |
240 DP_AUX_CH_CTL_DONE | 261 DP_AUX_CH_CTL_DONE |
241 DP_AUX_CH_CTL_TIME_OUT_ERROR | 262 DP_AUX_CH_CTL_TIME_OUT_ERROR |
242 DP_AUX_CH_CTL_RECEIVE_ERROR)); 263 DP_AUX_CH_CTL_RECEIVE_ERROR));
@@ -295,7 +316,7 @@ intel_dp_aux_native_write(struct intel_output *intel_output,
295 return -1; 316 return -1;
296 msg[0] = AUX_NATIVE_WRITE << 4; 317 msg[0] = AUX_NATIVE_WRITE << 4;
297 msg[1] = address >> 8; 318 msg[1] = address >> 8;
298 msg[2] = address; 319 msg[2] = address & 0xff;
299 msg[3] = send_bytes - 1; 320 msg[3] = send_bytes - 1;
300 memcpy(&msg[4], send, send_bytes); 321 memcpy(&msg[4], send, send_bytes);
301 msg_bytes = send_bytes + 4; 322 msg_bytes = send_bytes + 4;
@@ -387,8 +408,8 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
387 memset(&dp_priv->adapter, '\0', sizeof (dp_priv->adapter)); 408 memset(&dp_priv->adapter, '\0', sizeof (dp_priv->adapter));
388 dp_priv->adapter.owner = THIS_MODULE; 409 dp_priv->adapter.owner = THIS_MODULE;
389 dp_priv->adapter.class = I2C_CLASS_DDC; 410 dp_priv->adapter.class = I2C_CLASS_DDC;
390 strncpy (dp_priv->adapter.name, name, sizeof dp_priv->adapter.name - 1); 411 strncpy (dp_priv->adapter.name, name, sizeof(dp_priv->adapter.name) - 1);
391 dp_priv->adapter.name[sizeof dp_priv->adapter.name - 1] = '\0'; 412 dp_priv->adapter.name[sizeof(dp_priv->adapter.name) - 1] = '\0';
392 dp_priv->adapter.algo_data = &dp_priv->algo; 413 dp_priv->adapter.algo_data = &dp_priv->algo;
393 dp_priv->adapter.dev.parent = &intel_output->base.kdev; 414 dp_priv->adapter.dev.parent = &intel_output->base.kdev;
394 415
@@ -493,22 +514,40 @@ intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
493 intel_dp_compute_m_n(3, lane_count, 514 intel_dp_compute_m_n(3, lane_count,
494 mode->clock, adjusted_mode->clock, &m_n); 515 mode->clock, adjusted_mode->clock, &m_n);
495 516
496 if (intel_crtc->pipe == 0) { 517 if (IS_IGDNG(dev)) {
497 I915_WRITE(PIPEA_GMCH_DATA_M, 518 if (intel_crtc->pipe == 0) {
498 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | 519 I915_WRITE(TRANSA_DATA_M1,
499 m_n.gmch_m); 520 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
500 I915_WRITE(PIPEA_GMCH_DATA_N, 521 m_n.gmch_m);
501 m_n.gmch_n); 522 I915_WRITE(TRANSA_DATA_N1, m_n.gmch_n);
502 I915_WRITE(PIPEA_DP_LINK_M, m_n.link_m); 523 I915_WRITE(TRANSA_DP_LINK_M1, m_n.link_m);
503 I915_WRITE(PIPEA_DP_LINK_N, m_n.link_n); 524 I915_WRITE(TRANSA_DP_LINK_N1, m_n.link_n);
525 } else {
526 I915_WRITE(TRANSB_DATA_M1,
527 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
528 m_n.gmch_m);
529 I915_WRITE(TRANSB_DATA_N1, m_n.gmch_n);
530 I915_WRITE(TRANSB_DP_LINK_M1, m_n.link_m);
531 I915_WRITE(TRANSB_DP_LINK_N1, m_n.link_n);
532 }
504 } else { 533 } else {
505 I915_WRITE(PIPEB_GMCH_DATA_M, 534 if (intel_crtc->pipe == 0) {
506 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) | 535 I915_WRITE(PIPEA_GMCH_DATA_M,
507 m_n.gmch_m); 536 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
508 I915_WRITE(PIPEB_GMCH_DATA_N, 537 m_n.gmch_m);
509 m_n.gmch_n); 538 I915_WRITE(PIPEA_GMCH_DATA_N,
510 I915_WRITE(PIPEB_DP_LINK_M, m_n.link_m); 539 m_n.gmch_n);
511 I915_WRITE(PIPEB_DP_LINK_N, m_n.link_n); 540 I915_WRITE(PIPEA_DP_LINK_M, m_n.link_m);
541 I915_WRITE(PIPEA_DP_LINK_N, m_n.link_n);
542 } else {
543 I915_WRITE(PIPEB_GMCH_DATA_M,
544 ((m_n.tu - 1) << PIPE_GMCH_DATA_M_TU_SIZE_SHIFT) |
545 m_n.gmch_m);
546 I915_WRITE(PIPEB_GMCH_DATA_N,
547 m_n.gmch_n);
548 I915_WRITE(PIPEB_DP_LINK_M, m_n.link_m);
549 I915_WRITE(PIPEB_DP_LINK_N, m_n.link_n);
550 }
512 } 551 }
513} 552}
514 553
@@ -556,8 +595,38 @@ intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
556 595
557 if (intel_crtc->pipe == 1) 596 if (intel_crtc->pipe == 1)
558 dp_priv->DP |= DP_PIPEB_SELECT; 597 dp_priv->DP |= DP_PIPEB_SELECT;
598
599 if (IS_eDP(intel_output)) {
600 /* don't miss out required setting for eDP */
601 dp_priv->DP |= DP_PLL_ENABLE;
602 if (adjusted_mode->clock < 200000)
603 dp_priv->DP |= DP_PLL_FREQ_160MHZ;
604 else
605 dp_priv->DP |= DP_PLL_FREQ_270MHZ;
606 }
559} 607}
560 608
609static void igdng_edp_backlight_on (struct drm_device *dev)
610{
611 struct drm_i915_private *dev_priv = dev->dev_private;
612 u32 pp;
613
614 DRM_DEBUG("\n");
615 pp = I915_READ(PCH_PP_CONTROL);
616 pp |= EDP_BLC_ENABLE;
617 I915_WRITE(PCH_PP_CONTROL, pp);
618}
619
620static void igdng_edp_backlight_off (struct drm_device *dev)
621{
622 struct drm_i915_private *dev_priv = dev->dev_private;
623 u32 pp;
624
625 DRM_DEBUG("\n");
626 pp = I915_READ(PCH_PP_CONTROL);
627 pp &= ~EDP_BLC_ENABLE;
628 I915_WRITE(PCH_PP_CONTROL, pp);
629}
561 630
562static void 631static void
563intel_dp_dpms(struct drm_encoder *encoder, int mode) 632intel_dp_dpms(struct drm_encoder *encoder, int mode)
@@ -569,11 +638,17 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode)
569 uint32_t dp_reg = I915_READ(dp_priv->output_reg); 638 uint32_t dp_reg = I915_READ(dp_priv->output_reg);
570 639
571 if (mode != DRM_MODE_DPMS_ON) { 640 if (mode != DRM_MODE_DPMS_ON) {
572 if (dp_reg & DP_PORT_EN) 641 if (dp_reg & DP_PORT_EN) {
573 intel_dp_link_down(intel_output, dp_priv->DP); 642 intel_dp_link_down(intel_output, dp_priv->DP);
643 if (IS_eDP(intel_output))
644 igdng_edp_backlight_off(dev);
645 }
574 } else { 646 } else {
575 if (!(dp_reg & DP_PORT_EN)) 647 if (!(dp_reg & DP_PORT_EN)) {
576 intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); 648 intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
649 if (IS_eDP(intel_output))
650 igdng_edp_backlight_on(dev);
651 }
577 } 652 }
578 dp_priv->dpms_mode = mode; 653 dp_priv->dpms_mode = mode;
579} 654}
@@ -935,6 +1010,23 @@ intel_dp_link_down(struct intel_output *intel_output, uint32_t DP)
935 struct drm_i915_private *dev_priv = dev->dev_private; 1010 struct drm_i915_private *dev_priv = dev->dev_private;
936 struct intel_dp_priv *dp_priv = intel_output->dev_priv; 1011 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
937 1012
1013 DRM_DEBUG("\n");
1014
1015 if (IS_eDP(intel_output)) {
1016 DP &= ~DP_PLL_ENABLE;
1017 I915_WRITE(dp_priv->output_reg, DP);
1018 POSTING_READ(dp_priv->output_reg);
1019 udelay(100);
1020 }
1021
1022 DP &= ~DP_LINK_TRAIN_MASK;
1023 I915_WRITE(dp_priv->output_reg, DP | DP_LINK_TRAIN_PAT_IDLE);
1024 POSTING_READ(dp_priv->output_reg);
1025
1026 udelay(17000);
1027
1028 if (IS_eDP(intel_output))
1029 DP |= DP_LINK_TRAIN_OFF;
938 I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN); 1030 I915_WRITE(dp_priv->output_reg, DP & ~DP_PORT_EN);
939 POSTING_READ(dp_priv->output_reg); 1031 POSTING_READ(dp_priv->output_reg);
940} 1032}
@@ -978,6 +1070,24 @@ intel_dp_check_link_status(struct intel_output *intel_output)
978 intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration); 1070 intel_dp_link_train(intel_output, dp_priv->DP, dp_priv->link_configuration);
979} 1071}
980 1072
1073static enum drm_connector_status
1074igdng_dp_detect(struct drm_connector *connector)
1075{
1076 struct intel_output *intel_output = to_intel_output(connector);
1077 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
1078 enum drm_connector_status status;
1079
1080 status = connector_status_disconnected;
1081 if (intel_dp_aux_native_read(intel_output,
1082 0x000, dp_priv->dpcd,
1083 sizeof (dp_priv->dpcd)) == sizeof (dp_priv->dpcd))
1084 {
1085 if (dp_priv->dpcd[0] != 0)
1086 status = connector_status_connected;
1087 }
1088 return status;
1089}
1090
981/** 1091/**
982 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection. 1092 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection.
983 * 1093 *
@@ -996,6 +1106,9 @@ intel_dp_detect(struct drm_connector *connector)
996 1106
997 dp_priv->has_audio = false; 1107 dp_priv->has_audio = false;
998 1108
1109 if (IS_IGDNG(dev))
1110 return igdng_dp_detect(connector);
1111
999 temp = I915_READ(PORT_HOTPLUG_EN); 1112 temp = I915_READ(PORT_HOTPLUG_EN);
1000 1113
1001 I915_WRITE(PORT_HOTPLUG_EN, 1114 I915_WRITE(PORT_HOTPLUG_EN,
@@ -1039,11 +1152,27 @@ intel_dp_detect(struct drm_connector *connector)
1039static int intel_dp_get_modes(struct drm_connector *connector) 1152static int intel_dp_get_modes(struct drm_connector *connector)
1040{ 1153{
1041 struct intel_output *intel_output = to_intel_output(connector); 1154 struct intel_output *intel_output = to_intel_output(connector);
1155 struct drm_device *dev = intel_output->base.dev;
1156 struct drm_i915_private *dev_priv = dev->dev_private;
1157 int ret;
1042 1158
1043 /* We should parse the EDID data and find out if it has an audio sink 1159 /* We should parse the EDID data and find out if it has an audio sink
1044 */ 1160 */
1045 1161
1046 return intel_ddc_get_modes(intel_output); 1162 ret = intel_ddc_get_modes(intel_output);
1163 if (ret)
1164 return ret;
1165
1166 /* if eDP has no EDID, try to use fixed panel mode from VBT */
1167 if (IS_eDP(intel_output)) {
1168 if (dev_priv->panel_fixed_mode != NULL) {
1169 struct drm_display_mode *mode;
1170 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
1171 drm_mode_probed_add(connector, mode);
1172 return 1;
1173 }
1174 }
1175 return 0;
1047} 1176}
1048 1177
1049static void 1178static void
@@ -1106,6 +1235,7 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1106 struct drm_connector *connector; 1235 struct drm_connector *connector;
1107 struct intel_output *intel_output; 1236 struct intel_output *intel_output;
1108 struct intel_dp_priv *dp_priv; 1237 struct intel_dp_priv *dp_priv;
1238 const char *name = NULL;
1109 1239
1110 intel_output = kcalloc(sizeof(struct intel_output) + 1240 intel_output = kcalloc(sizeof(struct intel_output) +
1111 sizeof(struct intel_dp_priv), 1, GFP_KERNEL); 1241 sizeof(struct intel_dp_priv), 1, GFP_KERNEL);
@@ -1119,7 +1249,10 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1119 DRM_MODE_CONNECTOR_DisplayPort); 1249 DRM_MODE_CONNECTOR_DisplayPort);
1120 drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); 1250 drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
1121 1251
1122 intel_output->type = INTEL_OUTPUT_DISPLAYPORT; 1252 if (output_reg == DP_A)
1253 intel_output->type = INTEL_OUTPUT_EDP;
1254 else
1255 intel_output->type = INTEL_OUTPUT_DISPLAYPORT;
1123 1256
1124 connector->interlace_allowed = true; 1257 connector->interlace_allowed = true;
1125 connector->doublescan_allowed = 0; 1258 connector->doublescan_allowed = 0;
@@ -1139,12 +1272,41 @@ intel_dp_init(struct drm_device *dev, int output_reg)
1139 drm_sysfs_connector_add(connector); 1272 drm_sysfs_connector_add(connector);
1140 1273
1141 /* Set up the DDC bus. */ 1274 /* Set up the DDC bus. */
1142 intel_dp_i2c_init(intel_output, 1275 switch (output_reg) {
1143 (output_reg == DP_B) ? "DPDDC-B" : 1276 case DP_A:
1144 (output_reg == DP_C) ? "DPDDC-C" : "DPDDC-D"); 1277 name = "DPDDC-A";
1278 break;
1279 case DP_B:
1280 case PCH_DP_B:
1281 name = "DPDDC-B";
1282 break;
1283 case DP_C:
1284 case PCH_DP_C:
1285 name = "DPDDC-C";
1286 break;
1287 case DP_D:
1288 case PCH_DP_D:
1289 name = "DPDDC-D";
1290 break;
1291 }
1292
1293 intel_dp_i2c_init(intel_output, name);
1294
1145 intel_output->ddc_bus = &dp_priv->adapter; 1295 intel_output->ddc_bus = &dp_priv->adapter;
1146 intel_output->hot_plug = intel_dp_hot_plug; 1296 intel_output->hot_plug = intel_dp_hot_plug;
1147 1297
1298 if (output_reg == DP_A) {
1299 /* initialize panel mode from VBT if available for eDP */
1300 if (dev_priv->lfp_lvds_vbt_mode) {
1301 dev_priv->panel_fixed_mode =
1302 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1303 if (dev_priv->panel_fixed_mode) {
1304 dev_priv->panel_fixed_mode->type |=
1305 DRM_MODE_TYPE_PREFERRED;
1306 }
1307 }
1308 }
1309
1148 /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written 1310 /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
1149 * 0xd. Failure to do so will result in spurious interrupts being 1311 * 0xd. Failure to do so will result in spurious interrupts being
1150 * generated on the port when a cable is not attached. 1312 * generated on the port when a cable is not attached.
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 004541c935a8..d6f92ea1b553 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -55,6 +55,7 @@
55#define INTEL_OUTPUT_TVOUT 5 55#define INTEL_OUTPUT_TVOUT 5
56#define INTEL_OUTPUT_HDMI 6 56#define INTEL_OUTPUT_HDMI 6
57#define INTEL_OUTPUT_DISPLAYPORT 7 57#define INTEL_OUTPUT_DISPLAYPORT 7
58#define INTEL_OUTPUT_EDP 8
58 59
59#define INTEL_DVO_CHIP_NONE 0 60#define INTEL_DVO_CHIP_NONE 0
60#define INTEL_DVO_CHIP_LVDS 1 61#define INTEL_DVO_CHIP_LVDS 1
@@ -121,6 +122,8 @@ extern void intel_dp_init(struct drm_device *dev, int dp_reg);
121void 122void
122intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, 123intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
123 struct drm_display_mode *adjusted_mode); 124 struct drm_display_mode *adjusted_mode);
125extern void intel_edp_link_config (struct intel_output *, int *, int *);
126
124 127
125extern void intel_crtc_load_lut(struct drm_crtc *crtc); 128extern void intel_crtc_load_lut(struct drm_crtc *crtc);
126extern void intel_encoder_prepare (struct drm_encoder *encoder); 129extern void intel_encoder_prepare (struct drm_encoder *encoder);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 9e30daae37dc..1842290cded3 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -130,16 +130,17 @@ static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
130} 130}
131 131
132static enum drm_connector_status 132static enum drm_connector_status
133intel_hdmi_edid_detect(struct drm_connector *connector) 133intel_hdmi_detect(struct drm_connector *connector)
134{ 134{
135 struct intel_output *intel_output = to_intel_output(connector); 135 struct intel_output *intel_output = to_intel_output(connector);
136 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv; 136 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
137 struct edid *edid = NULL; 137 struct edid *edid = NULL;
138 enum drm_connector_status status = connector_status_disconnected; 138 enum drm_connector_status status = connector_status_disconnected;
139 139
140 hdmi_priv->has_hdmi_sink = false;
140 edid = drm_get_edid(&intel_output->base, 141 edid = drm_get_edid(&intel_output->base,
141 intel_output->ddc_bus); 142 intel_output->ddc_bus);
142 hdmi_priv->has_hdmi_sink = false; 143
143 if (edid) { 144 if (edid) {
144 if (edid->input & DRM_EDID_INPUT_DIGITAL) { 145 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
145 status = connector_status_connected; 146 status = connector_status_connected;
@@ -148,65 +149,8 @@ intel_hdmi_edid_detect(struct drm_connector *connector)
148 intel_output->base.display_info.raw_edid = NULL; 149 intel_output->base.display_info.raw_edid = NULL;
149 kfree(edid); 150 kfree(edid);
150 } 151 }
151 return status;
152}
153
154static enum drm_connector_status
155igdng_hdmi_detect(struct drm_connector *connector)
156{
157 struct intel_output *intel_output = to_intel_output(connector);
158 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
159
160 /* FIXME hotplug detect */
161
162 hdmi_priv->has_hdmi_sink = false;
163 return intel_hdmi_edid_detect(connector);
164}
165 152
166static enum drm_connector_status 153 return status;
167intel_hdmi_detect(struct drm_connector *connector)
168{
169 struct drm_device *dev = connector->dev;
170 struct drm_i915_private *dev_priv = dev->dev_private;
171 struct intel_output *intel_output = to_intel_output(connector);
172 struct intel_hdmi_priv *hdmi_priv = intel_output->dev_priv;
173 u32 temp, bit;
174
175 if (IS_IGDNG(dev))
176 return igdng_hdmi_detect(connector);
177
178 temp = I915_READ(PORT_HOTPLUG_EN);
179
180 switch (hdmi_priv->sdvox_reg) {
181 case SDVOB:
182 temp |= HDMIB_HOTPLUG_INT_EN;
183 break;
184 case SDVOC:
185 temp |= HDMIC_HOTPLUG_INT_EN;
186 break;
187 default:
188 return connector_status_unknown;
189 }
190
191 I915_WRITE(PORT_HOTPLUG_EN, temp);
192
193 POSTING_READ(PORT_HOTPLUG_EN);
194
195 switch (hdmi_priv->sdvox_reg) {
196 case SDVOB:
197 bit = HDMIB_HOTPLUG_INT_STATUS;
198 break;
199 case SDVOC:
200 bit = HDMIC_HOTPLUG_INT_STATUS;
201 break;
202 default:
203 return connector_status_unknown;
204 }
205
206 if ((I915_READ(PORT_HOTPLUG_STAT) & bit) != 0)
207 return intel_hdmi_edid_detect(connector);
208 else
209 return connector_status_disconnected;
210} 154}
211 155
212static int intel_hdmi_get_modes(struct drm_connector *connector) 156static int intel_hdmi_get_modes(struct drm_connector *connector)
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 9ab38efffecf..3f445a80c552 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -780,6 +780,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
780 }, 780 },
781 { 781 {
782 .callback = intel_no_lvds_dmi_callback, 782 .callback = intel_no_lvds_dmi_callback,
783 .ident = "AOpen Mini PC MP915",
784 .matches = {
785 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
786 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
787 },
788 },
789 {
790 .callback = intel_no_lvds_dmi_callback,
783 .ident = "Aopen i945GTt-VFA", 791 .ident = "Aopen i945GTt-VFA",
784 .matches = { 792 .matches = {
785 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 793 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
@@ -884,6 +892,10 @@ void intel_lvds_init(struct drm_device *dev)
884 if (IS_IGDNG(dev)) { 892 if (IS_IGDNG(dev)) {
885 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) 893 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
886 return; 894 return;
895 if (dev_priv->edp_support) {
896 DRM_DEBUG("disable LVDS for eDP support\n");
897 return;
898 }
887 gpio = PCH_GPIOC; 899 gpio = PCH_GPIOC;
888 } 900 }
889 901
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 4f0c30948bc4..5371d9332554 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -31,6 +31,7 @@
31#include "drm.h" 31#include "drm.h"
32#include "drm_crtc.h" 32#include "drm_crtc.h"
33#include "intel_drv.h" 33#include "intel_drv.h"
34#include "drm_edid.h"
34#include "i915_drm.h" 35#include "i915_drm.h"
35#include "i915_drv.h" 36#include "i915_drv.h"
36#include "intel_sdvo_regs.h" 37#include "intel_sdvo_regs.h"
@@ -55,6 +56,12 @@ struct intel_sdvo_priv {
55 /* Pixel clock limitations reported by the SDVO device, in kHz */ 56 /* Pixel clock limitations reported by the SDVO device, in kHz */
56 int pixel_clock_min, pixel_clock_max; 57 int pixel_clock_min, pixel_clock_max;
57 58
59 /*
60 * For multiple function SDVO device,
61 * this is for current attached outputs.
62 */
63 uint16_t attached_output;
64
58 /** 65 /**
59 * This is set if we're going to treat the device as TV-out. 66 * This is set if we're going to treat the device as TV-out.
60 * 67 *
@@ -114,6 +121,9 @@ struct intel_sdvo_priv {
114 u32 save_SDVOX; 121 u32 save_SDVOX;
115}; 122};
116 123
124static bool
125intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags);
126
117/** 127/**
118 * Writes the SDVOB or SDVOC with the given value, but always writes both 128 * Writes the SDVOB or SDVOC with the given value, but always writes both
119 * SDVOB and SDVOC to work around apparent hardware issues (according to 129 * SDVOB and SDVOC to work around apparent hardware issues (according to
@@ -1435,41 +1445,96 @@ void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1435 intel_sdvo_read_response(intel_output, &response, 2); 1445 intel_sdvo_read_response(intel_output, &response, 2);
1436} 1446}
1437 1447
1438static void 1448static bool
1439intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) 1449intel_sdvo_multifunc_encoder(struct intel_output *intel_output)
1450{
1451 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1452 int caps = 0;
1453
1454 if (sdvo_priv->caps.output_flags &
1455 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1456 caps++;
1457 if (sdvo_priv->caps.output_flags &
1458 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1459 caps++;
1460 if (sdvo_priv->caps.output_flags &
1461 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID0))
1462 caps++;
1463 if (sdvo_priv->caps.output_flags &
1464 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1465 caps++;
1466 if (sdvo_priv->caps.output_flags &
1467 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1468 caps++;
1469
1470 if (sdvo_priv->caps.output_flags &
1471 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1472 caps++;
1473
1474 if (sdvo_priv->caps.output_flags &
1475 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1476 caps++;
1477
1478 return (caps > 1);
1479}
1480
1481enum drm_connector_status
1482intel_sdvo_hdmi_sink_detect(struct drm_connector *connector, u16 response)
1440{ 1483{
1441 struct intel_output *intel_output = to_intel_output(connector); 1484 struct intel_output *intel_output = to_intel_output(connector);
1442 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv; 1485 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1486 enum drm_connector_status status = connector_status_connected;
1443 struct edid *edid = NULL; 1487 struct edid *edid = NULL;
1444 1488
1445 edid = drm_get_edid(&intel_output->base, 1489 edid = drm_get_edid(&intel_output->base,
1446 intel_output->ddc_bus); 1490 intel_output->ddc_bus);
1447 if (edid != NULL) { 1491 if (edid != NULL) {
1448 sdvo_priv->is_hdmi = drm_detect_hdmi_monitor(edid); 1492 /* Don't report the output as connected if it's a DVI-I
1493 * connector with a non-digital EDID coming out.
1494 */
1495 if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) {
1496 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1497 sdvo_priv->is_hdmi =
1498 drm_detect_hdmi_monitor(edid);
1499 else
1500 status = connector_status_disconnected;
1501 }
1502
1449 kfree(edid); 1503 kfree(edid);
1450 intel_output->base.display_info.raw_edid = NULL; 1504 intel_output->base.display_info.raw_edid = NULL;
1451 } 1505
1506 } else if (response & (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1507 status = connector_status_disconnected;
1508
1509 return status;
1452} 1510}
1453 1511
1454static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector) 1512static enum drm_connector_status intel_sdvo_detect(struct drm_connector *connector)
1455{ 1513{
1456 u8 response[2]; 1514 uint16_t response;
1457 u8 status; 1515 u8 status;
1458 struct intel_output *intel_output = to_intel_output(connector); 1516 struct intel_output *intel_output = to_intel_output(connector);
1517 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1459 1518
1460 intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0); 1519 intel_sdvo_write_cmd(intel_output, SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0);
1461 status = intel_sdvo_read_response(intel_output, &response, 2); 1520 status = intel_sdvo_read_response(intel_output, &response, 2);
1462 1521
1463 DRM_DEBUG("SDVO response %d %d\n", response[0], response[1]); 1522 DRM_DEBUG("SDVO response %d %d\n", response & 0xff, response >> 8);
1464 1523
1465 if (status != SDVO_CMD_STATUS_SUCCESS) 1524 if (status != SDVO_CMD_STATUS_SUCCESS)
1466 return connector_status_unknown; 1525 return connector_status_unknown;
1467 1526
1468 if ((response[0] != 0) || (response[1] != 0)) { 1527 if (response == 0)
1469 intel_sdvo_hdmi_sink_detect(connector);
1470 return connector_status_connected;
1471 } else
1472 return connector_status_disconnected; 1528 return connector_status_disconnected;
1529
1530 if (intel_sdvo_multifunc_encoder(intel_output) &&
1531 sdvo_priv->attached_output != response) {
1532 if (sdvo_priv->controlled_output != response &&
1533 intel_sdvo_output_setup(intel_output, response) != true)
1534 return connector_status_unknown;
1535 sdvo_priv->attached_output = response;
1536 }
1537 return intel_sdvo_hdmi_sink_detect(connector, response);
1473} 1538}
1474 1539
1475static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) 1540static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
@@ -1866,16 +1931,101 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device)
1866 return 0x72; 1931 return 0x72;
1867} 1932}
1868 1933
1934static bool
1935intel_sdvo_output_setup(struct intel_output *intel_output, uint16_t flags)
1936{
1937 struct drm_connector *connector = &intel_output->base;
1938 struct drm_encoder *encoder = &intel_output->enc;
1939 struct intel_sdvo_priv *sdvo_priv = intel_output->dev_priv;
1940 bool ret = true, registered = false;
1941
1942 sdvo_priv->is_tv = false;
1943 intel_output->needs_tv_clock = false;
1944 sdvo_priv->is_lvds = false;
1945
1946 if (device_is_registered(&connector->kdev)) {
1947 drm_sysfs_connector_remove(connector);
1948 registered = true;
1949 }
1950
1951 if (flags &
1952 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) {
1953 if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0)
1954 sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS0;
1955 else
1956 sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1;
1957
1958 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
1959 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
1960
1961 if (intel_sdvo_get_supp_encode(intel_output,
1962 &sdvo_priv->encode) &&
1963 intel_sdvo_get_digital_encoding_mode(intel_output) &&
1964 sdvo_priv->is_hdmi) {
1965 /* enable hdmi encoding mode if supported */
1966 intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI);
1967 intel_sdvo_set_colorimetry(intel_output,
1968 SDVO_COLORIMETRY_RGB256);
1969 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
1970 }
1971 } else if (flags & SDVO_OUTPUT_SVID0) {
1972
1973 sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
1974 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
1975 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
1976 sdvo_priv->is_tv = true;
1977 intel_output->needs_tv_clock = true;
1978 } else if (flags & SDVO_OUTPUT_RGB0) {
1979
1980 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
1981 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
1982 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
1983 } else if (flags & SDVO_OUTPUT_RGB1) {
1984
1985 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
1986 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
1987 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
1988 } else if (flags & SDVO_OUTPUT_LVDS0) {
1989
1990 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
1991 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
1992 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
1993 sdvo_priv->is_lvds = true;
1994 } else if (flags & SDVO_OUTPUT_LVDS1) {
1995
1996 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
1997 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
1998 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
1999 sdvo_priv->is_lvds = true;
2000 } else {
2001
2002 unsigned char bytes[2];
2003
2004 sdvo_priv->controlled_output = 0;
2005 memcpy(bytes, &sdvo_priv->caps.output_flags, 2);
2006 DRM_DEBUG_KMS(I915_SDVO,
2007 "%s: Unknown SDVO output type (0x%02x%02x)\n",
2008 SDVO_NAME(sdvo_priv),
2009 bytes[0], bytes[1]);
2010 ret = false;
2011 }
2012
2013 if (ret && registered)
2014 ret = drm_sysfs_connector_add(connector) == 0 ? true : false;
2015
2016
2017 return ret;
2018
2019}
2020
1869bool intel_sdvo_init(struct drm_device *dev, int output_device) 2021bool intel_sdvo_init(struct drm_device *dev, int output_device)
1870{ 2022{
1871 struct drm_connector *connector; 2023 struct drm_connector *connector;
1872 struct intel_output *intel_output; 2024 struct intel_output *intel_output;
1873 struct intel_sdvo_priv *sdvo_priv; 2025 struct intel_sdvo_priv *sdvo_priv;
1874 2026
1875 int connector_type;
1876 u8 ch[0x40]; 2027 u8 ch[0x40];
1877 int i; 2028 int i;
1878 int encoder_type;
1879 2029
1880 intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL); 2030 intel_output = kcalloc(sizeof(struct intel_output)+sizeof(struct intel_sdvo_priv), 1, GFP_KERNEL);
1881 if (!intel_output) { 2031 if (!intel_output) {
@@ -1925,88 +2075,28 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
1925 intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo; 2075 intel_output->ddc_bus->algo = &intel_sdvo_i2c_bit_algo;
1926 2076
1927 /* In defaut case sdvo lvds is false */ 2077 /* In defaut case sdvo lvds is false */
1928 sdvo_priv->is_lvds = false;
1929 intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps); 2078 intel_sdvo_get_capabilities(intel_output, &sdvo_priv->caps);
1930 2079
1931 if (sdvo_priv->caps.output_flags & 2080 if (intel_sdvo_output_setup(intel_output,
1932 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)) { 2081 sdvo_priv->caps.output_flags) != true) {
1933 if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_TMDS0) 2082 DRM_DEBUG("SDVO output failed to setup on SDVO%c\n",
1934 sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS0; 2083 output_device == SDVOB ? 'B' : 'C');
1935 else
1936 sdvo_priv->controlled_output = SDVO_OUTPUT_TMDS1;
1937
1938 encoder_type = DRM_MODE_ENCODER_TMDS;
1939 connector_type = DRM_MODE_CONNECTOR_DVID;
1940
1941 if (intel_sdvo_get_supp_encode(intel_output,
1942 &sdvo_priv->encode) &&
1943 intel_sdvo_get_digital_encoding_mode(intel_output) &&
1944 sdvo_priv->is_hdmi) {
1945 /* enable hdmi encoding mode if supported */
1946 intel_sdvo_set_encode(intel_output, SDVO_ENCODE_HDMI);
1947 intel_sdvo_set_colorimetry(intel_output,
1948 SDVO_COLORIMETRY_RGB256);
1949 connector_type = DRM_MODE_CONNECTOR_HDMIA;
1950 }
1951 }
1952 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_SVID0)
1953 {
1954 sdvo_priv->controlled_output = SDVO_OUTPUT_SVID0;
1955 encoder_type = DRM_MODE_ENCODER_TVDAC;
1956 connector_type = DRM_MODE_CONNECTOR_SVIDEO;
1957 sdvo_priv->is_tv = true;
1958 intel_output->needs_tv_clock = true;
1959 }
1960 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB0)
1961 {
1962 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB0;
1963 encoder_type = DRM_MODE_ENCODER_DAC;
1964 connector_type = DRM_MODE_CONNECTOR_VGA;
1965 }
1966 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_RGB1)
1967 {
1968 sdvo_priv->controlled_output = SDVO_OUTPUT_RGB1;
1969 encoder_type = DRM_MODE_ENCODER_DAC;
1970 connector_type = DRM_MODE_CONNECTOR_VGA;
1971 }
1972 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS0)
1973 {
1974 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS0;
1975 encoder_type = DRM_MODE_ENCODER_LVDS;
1976 connector_type = DRM_MODE_CONNECTOR_LVDS;
1977 sdvo_priv->is_lvds = true;
1978 }
1979 else if (sdvo_priv->caps.output_flags & SDVO_OUTPUT_LVDS1)
1980 {
1981 sdvo_priv->controlled_output = SDVO_OUTPUT_LVDS1;
1982 encoder_type = DRM_MODE_ENCODER_LVDS;
1983 connector_type = DRM_MODE_CONNECTOR_LVDS;
1984 sdvo_priv->is_lvds = true;
1985 }
1986 else
1987 {
1988 unsigned char bytes[2];
1989
1990 sdvo_priv->controlled_output = 0;
1991 memcpy (bytes, &sdvo_priv->caps.output_flags, 2);
1992 DRM_DEBUG_KMS(I915_SDVO,
1993 "%s: Unknown SDVO output type (0x%02x%02x)\n",
1994 SDVO_NAME(sdvo_priv),
1995 bytes[0], bytes[1]);
1996 encoder_type = DRM_MODE_ENCODER_NONE;
1997 connector_type = DRM_MODE_CONNECTOR_Unknown;
1998 goto err_i2c; 2084 goto err_i2c;
1999 } 2085 }
2000 2086
2087
2001 connector = &intel_output->base; 2088 connector = &intel_output->base;
2002 drm_connector_init(dev, connector, &intel_sdvo_connector_funcs, 2089 drm_connector_init(dev, connector, &intel_sdvo_connector_funcs,
2003 connector_type); 2090 connector->connector_type);
2091
2004 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs); 2092 drm_connector_helper_add(connector, &intel_sdvo_connector_helper_funcs);
2005 connector->interlace_allowed = 0; 2093 connector->interlace_allowed = 0;
2006 connector->doublescan_allowed = 0; 2094 connector->doublescan_allowed = 0;
2007 connector->display_info.subpixel_order = SubPixelHorizontalRGB; 2095 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
2008 2096
2009 drm_encoder_init(dev, &intel_output->enc, &intel_sdvo_enc_funcs, encoder_type); 2097 drm_encoder_init(dev, &intel_output->enc,
2098 &intel_sdvo_enc_funcs, intel_output->enc.encoder_type);
2099
2010 drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs); 2100 drm_encoder_helper_add(&intel_output->enc, &intel_sdvo_helper_funcs);
2011 2101
2012 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); 2102 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index a43c98e3f077..da4ab4dc1630 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1490,6 +1490,27 @@ static struct input_res {
1490 {"1920x1080", 1920, 1080}, 1490 {"1920x1080", 1920, 1080},
1491}; 1491};
1492 1492
1493/*
1494 * Chose preferred mode according to line number of TV format
1495 */
1496static void
1497intel_tv_chose_preferred_modes(struct drm_connector *connector,
1498 struct drm_display_mode *mode_ptr)
1499{
1500 struct intel_output *intel_output = to_intel_output(connector);
1501 const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
1502
1503 if (tv_mode->nbr_end < 480 && mode_ptr->vdisplay == 480)
1504 mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
1505 else if (tv_mode->nbr_end > 480) {
1506 if (tv_mode->progressive == true && tv_mode->nbr_end < 720) {
1507 if (mode_ptr->vdisplay == 720)
1508 mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
1509 } else if (mode_ptr->vdisplay == 1080)
1510 mode_ptr->type |= DRM_MODE_TYPE_PREFERRED;
1511 }
1512}
1513
1493/** 1514/**
1494 * Stub get_modes function. 1515 * Stub get_modes function.
1495 * 1516 *
@@ -1544,6 +1565,7 @@ intel_tv_get_modes(struct drm_connector *connector)
1544 mode_ptr->clock = (int) tmp; 1565 mode_ptr->clock = (int) tmp;
1545 1566
1546 mode_ptr->type = DRM_MODE_TYPE_DRIVER; 1567 mode_ptr->type = DRM_MODE_TYPE_DRIVER;
1568 intel_tv_chose_preferred_modes(connector, mode_ptr);
1547 drm_mode_probed_add(connector, mode_ptr); 1569 drm_mode_probed_add(connector, mode_ptr);
1548 count++; 1570 count++;
1549 } 1571 }
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 5fae1e074b4b..013d38059943 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -13,7 +13,8 @@ radeon-$(CONFIG_DRM_RADEON_KMS) += radeon_device.o radeon_kms.o \
13 radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \ 13 radeon_encoders.o radeon_display.o radeon_cursor.o radeon_i2c.o \
14 radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \ 14 radeon_clocks.o radeon_fb.o radeon_gem.o radeon_ring.o radeon_irq_kms.o \
15 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ 15 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
16 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rs780.o rv770.o 16 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rs780.o rv770.o \
17 radeon_test.o
17 18
18radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 19radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
19 20
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index c0080cc9bf8d..74d034f77c6b 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -31,6 +31,132 @@
31#include "atom.h" 31#include "atom.h"
32#include "atom-bits.h" 32#include "atom-bits.h"
33 33
34static void atombios_overscan_setup(struct drm_crtc *crtc,
35 struct drm_display_mode *mode,
36 struct drm_display_mode *adjusted_mode)
37{
38 struct drm_device *dev = crtc->dev;
39 struct radeon_device *rdev = dev->dev_private;
40 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
41 SET_CRTC_OVERSCAN_PS_ALLOCATION args;
42 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_OverScan);
43 int a1, a2;
44
45 memset(&args, 0, sizeof(args));
46
47 args.usOverscanRight = 0;
48 args.usOverscanLeft = 0;
49 args.usOverscanBottom = 0;
50 args.usOverscanTop = 0;
51 args.ucCRTC = radeon_crtc->crtc_id;
52
53 switch (radeon_crtc->rmx_type) {
54 case RMX_CENTER:
55 args.usOverscanTop = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2;
56 args.usOverscanBottom = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2;
57 args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2;
58 args.usOverscanRight = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2;
59 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
60 break;
61 case RMX_ASPECT:
62 a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay;
63 a2 = adjusted_mode->crtc_vdisplay * mode->crtc_hdisplay;
64
65 if (a1 > a2) {
66 args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2;
67 args.usOverscanRight = (adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2;
68 } else if (a2 > a1) {
69 args.usOverscanLeft = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2;
70 args.usOverscanRight = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2;
71 }
72 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
73 break;
74 case RMX_FULL:
75 default:
76 args.usOverscanRight = 0;
77 args.usOverscanLeft = 0;
78 args.usOverscanBottom = 0;
79 args.usOverscanTop = 0;
80 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
81 break;
82 }
83}
84
85static void atombios_scaler_setup(struct drm_crtc *crtc)
86{
87 struct drm_device *dev = crtc->dev;
88 struct radeon_device *rdev = dev->dev_private;
89 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
90 ENABLE_SCALER_PS_ALLOCATION args;
91 int index = GetIndexIntoMasterTable(COMMAND, EnableScaler);
92 /* fixme - fill in enc_priv for atom dac */
93 enum radeon_tv_std tv_std = TV_STD_NTSC;
94
95 if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id)
96 return;
97
98 memset(&args, 0, sizeof(args));
99
100 args.ucScaler = radeon_crtc->crtc_id;
101
102 if (radeon_crtc->devices & (ATOM_DEVICE_TV_SUPPORT)) {
103 switch (tv_std) {
104 case TV_STD_NTSC:
105 default:
106 args.ucTVStandard = ATOM_TV_NTSC;
107 break;
108 case TV_STD_PAL:
109 args.ucTVStandard = ATOM_TV_PAL;
110 break;
111 case TV_STD_PAL_M:
112 args.ucTVStandard = ATOM_TV_PALM;
113 break;
114 case TV_STD_PAL_60:
115 args.ucTVStandard = ATOM_TV_PAL60;
116 break;
117 case TV_STD_NTSC_J:
118 args.ucTVStandard = ATOM_TV_NTSCJ;
119 break;
120 case TV_STD_SCART_PAL:
121 args.ucTVStandard = ATOM_TV_PAL; /* ??? */
122 break;
123 case TV_STD_SECAM:
124 args.ucTVStandard = ATOM_TV_SECAM;
125 break;
126 case TV_STD_PAL_CN:
127 args.ucTVStandard = ATOM_TV_PALCN;
128 break;
129 }
130 args.ucEnable = SCALER_ENABLE_MULTITAP_MODE;
131 } else if (radeon_crtc->devices & (ATOM_DEVICE_CV_SUPPORT)) {
132 args.ucTVStandard = ATOM_TV_CV;
133 args.ucEnable = SCALER_ENABLE_MULTITAP_MODE;
134 } else {
135 switch (radeon_crtc->rmx_type) {
136 case RMX_FULL:
137 args.ucEnable = ATOM_SCALER_EXPANSION;
138 break;
139 case RMX_CENTER:
140 args.ucEnable = ATOM_SCALER_CENTER;
141 break;
142 case RMX_ASPECT:
143 args.ucEnable = ATOM_SCALER_EXPANSION;
144 break;
145 default:
146 if (ASIC_IS_AVIVO(rdev))
147 args.ucEnable = ATOM_SCALER_DISABLE;
148 else
149 args.ucEnable = ATOM_SCALER_CENTER;
150 break;
151 }
152 }
153 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
154 if (radeon_crtc->devices & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)
155 && rdev->family >= CHIP_RV515 && rdev->family <= CHIP_RV570) {
156 atom_rv515_force_tv_scaler(rdev);
157 }
158}
159
34static void atombios_lock_crtc(struct drm_crtc *crtc, int lock) 160static void atombios_lock_crtc(struct drm_crtc *crtc, int lock)
35{ 161{
36 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 162 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
@@ -203,6 +329,12 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
203 if (ASIC_IS_AVIVO(rdev)) { 329 if (ASIC_IS_AVIVO(rdev)) {
204 uint32_t ss_cntl; 330 uint32_t ss_cntl;
205 331
332 if ((rdev->family == CHIP_RS600) ||
333 (rdev->family == CHIP_RS690) ||
334 (rdev->family == CHIP_RS740))
335 pll_flags |= (RADEON_PLL_USE_FRAC_FB_DIV |
336 RADEON_PLL_PREFER_CLOSEST_LOWER);
337
206 if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */ 338 if (ASIC_IS_DCE32(rdev) && mode->clock > 200000) /* range limits??? */
207 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; 339 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
208 else 340 else
@@ -321,7 +453,7 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
321 struct drm_gem_object *obj; 453 struct drm_gem_object *obj;
322 struct drm_radeon_gem_object *obj_priv; 454 struct drm_radeon_gem_object *obj_priv;
323 uint64_t fb_location; 455 uint64_t fb_location;
324 uint32_t fb_format, fb_pitch_pixels; 456 uint32_t fb_format, fb_pitch_pixels, tiling_flags;
325 457
326 if (!crtc->fb) 458 if (!crtc->fb)
327 return -EINVAL; 459 return -EINVAL;
@@ -358,7 +490,14 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
358 return -EINVAL; 490 return -EINVAL;
359 } 491 }
360 492
361 /* TODO tiling */ 493 radeon_object_get_tiling_flags(obj->driver_private,
494 &tiling_flags, NULL);
495 if (tiling_flags & RADEON_TILING_MACRO)
496 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
497
498 if (tiling_flags & RADEON_TILING_MICRO)
499 fb_format |= AVIVO_D1GRPH_TILED;
500
362 if (radeon_crtc->crtc_id == 0) 501 if (radeon_crtc->crtc_id == 0)
363 WREG32(AVIVO_D1VGA_CONTROL, 0); 502 WREG32(AVIVO_D1VGA_CONTROL, 0);
364 else 503 else
@@ -509,6 +648,9 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
509 radeon_crtc_set_base(crtc, x, y, old_fb); 648 radeon_crtc_set_base(crtc, x, y, old_fb);
510 radeon_legacy_atom_set_surface(crtc); 649 radeon_legacy_atom_set_surface(crtc);
511 } 650 }
651 atombios_overscan_setup(crtc, mode, adjusted_mode);
652 atombios_scaler_setup(crtc);
653 radeon_bandwidth_update(rdev);
512 return 0; 654 return 0;
513} 655}
514 656
@@ -516,6 +658,8 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,
516 struct drm_display_mode *mode, 658 struct drm_display_mode *mode,
517 struct drm_display_mode *adjusted_mode) 659 struct drm_display_mode *adjusted_mode)
518{ 660{
661 if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
662 return false;
519 return true; 663 return true;
520} 664}
521 665
@@ -548,148 +692,3 @@ void radeon_atombios_init_crtc(struct drm_device *dev,
548 AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL; 692 AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL;
549 drm_crtc_helper_add(&radeon_crtc->base, &atombios_helper_funcs); 693 drm_crtc_helper_add(&radeon_crtc->base, &atombios_helper_funcs);
550} 694}
551
552void radeon_init_disp_bw_avivo(struct drm_device *dev,
553 struct drm_display_mode *mode1,
554 uint32_t pixel_bytes1,
555 struct drm_display_mode *mode2,
556 uint32_t pixel_bytes2)
557{
558 struct radeon_device *rdev = dev->dev_private;
559 fixed20_12 min_mem_eff;
560 fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff;
561 fixed20_12 sclk_ff, mclk_ff;
562 uint32_t dc_lb_memory_split, temp;
563
564 min_mem_eff.full = rfixed_const_8(0);
565 if (rdev->disp_priority == 2) {
566 uint32_t mc_init_misc_lat_timer = 0;
567 if (rdev->family == CHIP_RV515)
568 mc_init_misc_lat_timer =
569 RREG32_MC(RV515_MC_INIT_MISC_LAT_TIMER);
570 else if (rdev->family == CHIP_RS690)
571 mc_init_misc_lat_timer =
572 RREG32_MC(RS690_MC_INIT_MISC_LAT_TIMER);
573
574 mc_init_misc_lat_timer &=
575 ~(R300_MC_DISP1R_INIT_LAT_MASK <<
576 R300_MC_DISP1R_INIT_LAT_SHIFT);
577 mc_init_misc_lat_timer &=
578 ~(R300_MC_DISP0R_INIT_LAT_MASK <<
579 R300_MC_DISP0R_INIT_LAT_SHIFT);
580
581 if (mode2)
582 mc_init_misc_lat_timer |=
583 (1 << R300_MC_DISP1R_INIT_LAT_SHIFT);
584 if (mode1)
585 mc_init_misc_lat_timer |=
586 (1 << R300_MC_DISP0R_INIT_LAT_SHIFT);
587
588 if (rdev->family == CHIP_RV515)
589 WREG32_MC(RV515_MC_INIT_MISC_LAT_TIMER,
590 mc_init_misc_lat_timer);
591 else if (rdev->family == CHIP_RS690)
592 WREG32_MC(RS690_MC_INIT_MISC_LAT_TIMER,
593 mc_init_misc_lat_timer);
594 }
595
596 /*
597 * determine is there is enough bw for current mode
598 */
599 temp_ff.full = rfixed_const(100);
600 mclk_ff.full = rfixed_const(rdev->clock.default_mclk);
601 mclk_ff.full = rfixed_div(mclk_ff, temp_ff);
602 sclk_ff.full = rfixed_const(rdev->clock.default_sclk);
603 sclk_ff.full = rfixed_div(sclk_ff, temp_ff);
604
605 temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1);
606 temp_ff.full = rfixed_const(temp);
607 mem_bw.full = rfixed_mul(mclk_ff, temp_ff);
608 mem_bw.full = rfixed_mul(mem_bw, min_mem_eff);
609
610 pix_clk.full = 0;
611 pix_clk2.full = 0;
612 peak_disp_bw.full = 0;
613 if (mode1) {
614 temp_ff.full = rfixed_const(1000);
615 pix_clk.full = rfixed_const(mode1->clock); /* convert to fixed point */
616 pix_clk.full = rfixed_div(pix_clk, temp_ff);
617 temp_ff.full = rfixed_const(pixel_bytes1);
618 peak_disp_bw.full += rfixed_mul(pix_clk, temp_ff);
619 }
620 if (mode2) {
621 temp_ff.full = rfixed_const(1000);
622 pix_clk2.full = rfixed_const(mode2->clock); /* convert to fixed point */
623 pix_clk2.full = rfixed_div(pix_clk2, temp_ff);
624 temp_ff.full = rfixed_const(pixel_bytes2);
625 peak_disp_bw.full += rfixed_mul(pix_clk2, temp_ff);
626 }
627
628 if (peak_disp_bw.full >= mem_bw.full) {
629 DRM_ERROR
630 ("You may not have enough display bandwidth for current mode\n"
631 "If you have flickering problem, try to lower resolution, refresh rate, or color depth\n");
632 printk("peak disp bw %d, mem_bw %d\n",
633 rfixed_trunc(peak_disp_bw), rfixed_trunc(mem_bw));
634 }
635
636 /*
637 * Line Buffer Setup
638 * There is a single line buffer shared by both display controllers.
639 * DC_LB_MEMORY_SPLIT controls how that line buffer is shared between the display
640 * controllers. The paritioning can either be done manually or via one of four
641 * preset allocations specified in bits 1:0:
642 * 0 - line buffer is divided in half and shared between each display controller
643 * 1 - D1 gets 3/4 of the line buffer, D2 gets 1/4
644 * 2 - D1 gets the whole buffer
645 * 3 - D1 gets 1/4 of the line buffer, D2 gets 3/4
646 * Setting bit 2 of DC_LB_MEMORY_SPLIT controls switches to manual allocation mode.
647 * In manual allocation mode, D1 always starts at 0, D1 end/2 is specified in bits
648 * 14:4; D2 allocation follows D1.
649 */
650
651 /* is auto or manual better ? */
652 dc_lb_memory_split =
653 RREG32(AVIVO_DC_LB_MEMORY_SPLIT) & ~AVIVO_DC_LB_MEMORY_SPLIT_MASK;
654 dc_lb_memory_split &= ~AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE;
655#if 1
656 /* auto */
657 if (mode1 && mode2) {
658 if (mode1->hdisplay > mode2->hdisplay) {
659 if (mode1->hdisplay > 2560)
660 dc_lb_memory_split |=
661 AVIVO_DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q;
662 else
663 dc_lb_memory_split |=
664 AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF;
665 } else if (mode2->hdisplay > mode1->hdisplay) {
666 if (mode2->hdisplay > 2560)
667 dc_lb_memory_split |=
668 AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q;
669 else
670 dc_lb_memory_split |=
671 AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF;
672 } else
673 dc_lb_memory_split |=
674 AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF;
675 } else if (mode1) {
676 dc_lb_memory_split |= AVIVO_DC_LB_MEMORY_SPLIT_D1_ONLY;
677 } else if (mode2) {
678 dc_lb_memory_split |= AVIVO_DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q;
679 }
680#else
681 /* manual */
682 dc_lb_memory_split |= AVIVO_DC_LB_MEMORY_SPLIT_SHIFT_MODE;
683 dc_lb_memory_split &=
684 ~(AVIVO_DC_LB_DISP1_END_ADR_MASK <<
685 AVIVO_DC_LB_DISP1_END_ADR_SHIFT);
686 if (mode1) {
687 dc_lb_memory_split |=
688 ((((mode1->hdisplay / 2) + 64) & AVIVO_DC_LB_DISP1_END_ADR_MASK)
689 << AVIVO_DC_LB_DISP1_END_ADR_SHIFT);
690 } else if (mode2) {
691 dc_lb_memory_split |= (0 << AVIVO_DC_LB_DISP1_END_ADR_SHIFT);
692 }
693#endif
694 WREG32(AVIVO_DC_LB_MEMORY_SPLIT, dc_lb_memory_split);
695}
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index c550932a108f..f1ba8ff41130 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -110,7 +110,7 @@ int r100_pci_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
110 if (i < 0 || i > rdev->gart.num_gpu_pages) { 110 if (i < 0 || i > rdev->gart.num_gpu_pages) {
111 return -EINVAL; 111 return -EINVAL;
112 } 112 }
113 rdev->gart.table.ram.ptr[i] = cpu_to_le32((uint32_t)addr); 113 rdev->gart.table.ram.ptr[i] = cpu_to_le32(lower_32_bits(addr));
114 return 0; 114 return 0;
115} 115}
116 116
@@ -173,8 +173,12 @@ void r100_mc_setup(struct radeon_device *rdev)
173 DRM_ERROR("Failed to register debugfs file for R100 MC !\n"); 173 DRM_ERROR("Failed to register debugfs file for R100 MC !\n");
174 } 174 }
175 /* Write VRAM size in case we are limiting it */ 175 /* Write VRAM size in case we are limiting it */
176 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 176 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
177 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 177 /* Novell bug 204882 for RN50/M6/M7 with 8/16/32MB VRAM,
178 * if the aperture is 64MB but we have 32MB VRAM
179 * we report only 32MB VRAM but we have to set MC_FB_LOCATION
180 * to 64MB, otherwise the gpu accidentially dies */
181 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
178 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16); 182 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16);
179 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16); 183 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16);
180 WREG32(RADEON_MC_FB_LOCATION, tmp); 184 WREG32(RADEON_MC_FB_LOCATION, tmp);
@@ -215,7 +219,6 @@ int r100_mc_init(struct radeon_device *rdev)
215 r100_pci_gart_disable(rdev); 219 r100_pci_gart_disable(rdev);
216 220
217 /* Setup GPU memory space */ 221 /* Setup GPU memory space */
218 rdev->mc.vram_location = 0xFFFFFFFFUL;
219 rdev->mc.gtt_location = 0xFFFFFFFFUL; 222 rdev->mc.gtt_location = 0xFFFFFFFFUL;
220 if (rdev->flags & RADEON_IS_AGP) { 223 if (rdev->flags & RADEON_IS_AGP) {
221 r = radeon_agp_init(rdev); 224 r = radeon_agp_init(rdev);
@@ -719,13 +722,14 @@ int r100_cs_packet_parse(struct radeon_cs_parser *p,
719 unsigned idx) 722 unsigned idx)
720{ 723{
721 struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx]; 724 struct radeon_cs_chunk *ib_chunk = &p->chunks[p->chunk_ib_idx];
722 uint32_t header = ib_chunk->kdata[idx]; 725 uint32_t header;
723 726
724 if (idx >= ib_chunk->length_dw) { 727 if (idx >= ib_chunk->length_dw) {
725 DRM_ERROR("Can not parse packet at %d after CS end %d !\n", 728 DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
726 idx, ib_chunk->length_dw); 729 idx, ib_chunk->length_dw);
727 return -EINVAL; 730 return -EINVAL;
728 } 731 }
732 header = ib_chunk->kdata[idx];
729 pkt->idx = idx; 733 pkt->idx = idx;
730 pkt->type = CP_PACKET_GET_TYPE(header); 734 pkt->type = CP_PACKET_GET_TYPE(header);
731 pkt->count = CP_PACKET_GET_COUNT(header); 735 pkt->count = CP_PACKET_GET_COUNT(header);
@@ -753,6 +757,102 @@ int r100_cs_packet_parse(struct radeon_cs_parser *p,
753} 757}
754 758
755/** 759/**
760 * r100_cs_packet_next_vline() - parse userspace VLINE packet
761 * @parser: parser structure holding parsing context.
762 *
763 * Userspace sends a special sequence for VLINE waits.
764 * PACKET0 - VLINE_START_END + value
765 * PACKET0 - WAIT_UNTIL +_value
766 * RELOC (P3) - crtc_id in reloc.
767 *
768 * This function parses this and relocates the VLINE START END
769 * and WAIT UNTIL packets to the correct crtc.
770 * It also detects a switched off crtc and nulls out the
771 * wait in that case.
772 */
773int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
774{
775 struct radeon_cs_chunk *ib_chunk;
776 struct drm_mode_object *obj;
777 struct drm_crtc *crtc;
778 struct radeon_crtc *radeon_crtc;
779 struct radeon_cs_packet p3reloc, waitreloc;
780 int crtc_id;
781 int r;
782 uint32_t header, h_idx, reg;
783
784 ib_chunk = &p->chunks[p->chunk_ib_idx];
785
786 /* parse the wait until */
787 r = r100_cs_packet_parse(p, &waitreloc, p->idx);
788 if (r)
789 return r;
790
791 /* check its a wait until and only 1 count */
792 if (waitreloc.reg != RADEON_WAIT_UNTIL ||
793 waitreloc.count != 0) {
794 DRM_ERROR("vline wait had illegal wait until segment\n");
795 r = -EINVAL;
796 return r;
797 }
798
799 if (ib_chunk->kdata[waitreloc.idx + 1] != RADEON_WAIT_CRTC_VLINE) {
800 DRM_ERROR("vline wait had illegal wait until\n");
801 r = -EINVAL;
802 return r;
803 }
804
805 /* jump over the NOP */
806 r = r100_cs_packet_parse(p, &p3reloc, p->idx);
807 if (r)
808 return r;
809
810 h_idx = p->idx - 2;
811 p->idx += waitreloc.count;
812 p->idx += p3reloc.count;
813
814 header = ib_chunk->kdata[h_idx];
815 crtc_id = ib_chunk->kdata[h_idx + 5];
816 reg = ib_chunk->kdata[h_idx] >> 2;
817 mutex_lock(&p->rdev->ddev->mode_config.mutex);
818 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
819 if (!obj) {
820 DRM_ERROR("cannot find crtc %d\n", crtc_id);
821 r = -EINVAL;
822 goto out;
823 }
824 crtc = obj_to_crtc(obj);
825 radeon_crtc = to_radeon_crtc(crtc);
826 crtc_id = radeon_crtc->crtc_id;
827
828 if (!crtc->enabled) {
829 /* if the CRTC isn't enabled - we need to nop out the wait until */
830 ib_chunk->kdata[h_idx + 2] = PACKET2(0);
831 ib_chunk->kdata[h_idx + 3] = PACKET2(0);
832 } else if (crtc_id == 1) {
833 switch (reg) {
834 case AVIVO_D1MODE_VLINE_START_END:
835 header &= R300_CP_PACKET0_REG_MASK;
836 header |= AVIVO_D2MODE_VLINE_START_END >> 2;
837 break;
838 case RADEON_CRTC_GUI_TRIG_VLINE:
839 header &= R300_CP_PACKET0_REG_MASK;
840 header |= RADEON_CRTC2_GUI_TRIG_VLINE >> 2;
841 break;
842 default:
843 DRM_ERROR("unknown crtc reloc\n");
844 r = -EINVAL;
845 goto out;
846 }
847 ib_chunk->kdata[h_idx] = header;
848 ib_chunk->kdata[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1;
849 }
850out:
851 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
852 return r;
853}
854
855/**
756 * r100_cs_packet_next_reloc() - parse next packet which should be reloc packet3 856 * r100_cs_packet_next_reloc() - parse next packet which should be reloc packet3
757 * @parser: parser structure holding parsing context. 857 * @parser: parser structure holding parsing context.
758 * @data: pointer to relocation data 858 * @data: pointer to relocation data
@@ -814,6 +914,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
814 unsigned idx; 914 unsigned idx;
815 bool onereg; 915 bool onereg;
816 int r; 916 int r;
917 u32 tile_flags = 0;
817 918
818 ib = p->ib->ptr; 919 ib = p->ib->ptr;
819 ib_chunk = &p->chunks[p->chunk_ib_idx]; 920 ib_chunk = &p->chunks[p->chunk_ib_idx];
@@ -825,6 +926,15 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
825 } 926 }
826 for (i = 0; i <= pkt->count; i++, idx++, reg += 4) { 927 for (i = 0; i <= pkt->count; i++, idx++, reg += 4) {
827 switch (reg) { 928 switch (reg) {
929 case RADEON_CRTC_GUI_TRIG_VLINE:
930 r = r100_cs_packet_parse_vline(p);
931 if (r) {
932 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
933 idx, reg);
934 r100_cs_dump_packet(p, pkt);
935 return r;
936 }
937 break;
828 /* FIXME: only allow PACKET3 blit? easier to check for out of 938 /* FIXME: only allow PACKET3 blit? easier to check for out of
829 * range access */ 939 * range access */
830 case RADEON_DST_PITCH_OFFSET: 940 case RADEON_DST_PITCH_OFFSET:
@@ -838,7 +948,20 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
838 } 948 }
839 tmp = ib_chunk->kdata[idx] & 0x003fffff; 949 tmp = ib_chunk->kdata[idx] & 0x003fffff;
840 tmp += (((u32)reloc->lobj.gpu_offset) >> 10); 950 tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
841 ib[idx] = (ib_chunk->kdata[idx] & 0xffc00000) | tmp; 951
952 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
953 tile_flags |= RADEON_DST_TILE_MACRO;
954 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
955 if (reg == RADEON_SRC_PITCH_OFFSET) {
956 DRM_ERROR("Cannot src blit from microtiled surface\n");
957 r100_cs_dump_packet(p, pkt);
958 return -EINVAL;
959 }
960 tile_flags |= RADEON_DST_TILE_MICRO;
961 }
962
963 tmp |= tile_flags;
964 ib[idx] = (ib_chunk->kdata[idx] & 0x3fc00000) | tmp;
842 break; 965 break;
843 case RADEON_RB3D_DEPTHOFFSET: 966 case RADEON_RB3D_DEPTHOFFSET:
844 case RADEON_RB3D_COLOROFFSET: 967 case RADEON_RB3D_COLOROFFSET:
@@ -869,6 +992,11 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
869 case R300_TX_OFFSET_0+52: 992 case R300_TX_OFFSET_0+52:
870 case R300_TX_OFFSET_0+56: 993 case R300_TX_OFFSET_0+56:
871 case R300_TX_OFFSET_0+60: 994 case R300_TX_OFFSET_0+60:
995 /* rn50 has no 3D engine so fail on any 3d setup */
996 if (ASIC_IS_RN50(p->rdev)) {
997 DRM_ERROR("attempt to use RN50 3D engine failed\n");
998 return -EINVAL;
999 }
872 r = r100_cs_packet_next_reloc(p, &reloc); 1000 r = r100_cs_packet_next_reloc(p, &reloc);
873 if (r) { 1001 if (r) {
874 DRM_ERROR("No reloc for ib[%d]=0x%04X\n", 1002 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
@@ -878,6 +1006,25 @@ static int r100_packet0_check(struct radeon_cs_parser *p,
878 } 1006 }
879 ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset); 1007 ib[idx] = ib_chunk->kdata[idx] + ((u32)reloc->lobj.gpu_offset);
880 break; 1008 break;
1009 case R300_RB3D_COLORPITCH0:
1010 case RADEON_RB3D_COLORPITCH:
1011 r = r100_cs_packet_next_reloc(p, &reloc);
1012 if (r) {
1013 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1014 idx, reg);
1015 r100_cs_dump_packet(p, pkt);
1016 return r;
1017 }
1018
1019 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1020 tile_flags |= RADEON_COLOR_TILE_ENABLE;
1021 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1022 tile_flags |= RADEON_COLOR_MICROTILE_ENABLE;
1023
1024 tmp = ib_chunk->kdata[idx] & ~(0x7 << 16);
1025 tmp |= tile_flags;
1026 ib[idx] = tmp;
1027 break;
881 default: 1028 default:
882 /* FIXME: we don't want to allow anyothers packet */ 1029 /* FIXME: we don't want to allow anyothers packet */
883 break; 1030 break;
@@ -1256,29 +1403,100 @@ static void r100_vram_get_type(struct radeon_device *rdev)
1256 } 1403 }
1257} 1404}
1258 1405
1259void r100_vram_info(struct radeon_device *rdev) 1406static u32 r100_get_accessible_vram(struct radeon_device *rdev)
1260{ 1407{
1261 r100_vram_get_type(rdev); 1408 u32 aper_size;
1409 u8 byte;
1410
1411 aper_size = RREG32(RADEON_CONFIG_APER_SIZE);
1412
1413 /* Set HDP_APER_CNTL only on cards that are known not to be broken,
1414 * that is has the 2nd generation multifunction PCI interface
1415 */
1416 if (rdev->family == CHIP_RV280 ||
1417 rdev->family >= CHIP_RV350) {
1418 WREG32_P(RADEON_HOST_PATH_CNTL, RADEON_HDP_APER_CNTL,
1419 ~RADEON_HDP_APER_CNTL);
1420 DRM_INFO("Generation 2 PCI interface, using max accessible memory\n");
1421 return aper_size * 2;
1422 }
1423
1424 /* Older cards have all sorts of funny issues to deal with. First
1425 * check if it's a multifunction card by reading the PCI config
1426 * header type... Limit those to one aperture size
1427 */
1428 pci_read_config_byte(rdev->pdev, 0xe, &byte);
1429 if (byte & 0x80) {
1430 DRM_INFO("Generation 1 PCI interface in multifunction mode\n");
1431 DRM_INFO("Limiting VRAM to one aperture\n");
1432 return aper_size;
1433 }
1434
1435 /* Single function older card. We read HDP_APER_CNTL to see how the BIOS
1436 * have set it up. We don't write this as it's broken on some ASICs but
1437 * we expect the BIOS to have done the right thing (might be too optimistic...)
1438 */
1439 if (RREG32(RADEON_HOST_PATH_CNTL) & RADEON_HDP_APER_CNTL)
1440 return aper_size * 2;
1441 return aper_size;
1442}
1443
1444void r100_vram_init_sizes(struct radeon_device *rdev)
1445{
1446 u64 config_aper_size;
1447 u32 accessible;
1448
1449 config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);
1262 1450
1263 if (rdev->flags & RADEON_IS_IGP) { 1451 if (rdev->flags & RADEON_IS_IGP) {
1264 uint32_t tom; 1452 uint32_t tom;
1265 /* read NB_TOM to get the amount of ram stolen for the GPU */ 1453 /* read NB_TOM to get the amount of ram stolen for the GPU */
1266 tom = RREG32(RADEON_NB_TOM); 1454 tom = RREG32(RADEON_NB_TOM);
1267 rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); 1455 rdev->mc.real_vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
1268 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 1456 /* for IGPs we need to keep VRAM where it was put by the BIOS */
1457 rdev->mc.vram_location = (tom & 0xffff) << 16;
1458 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
1459 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
1269 } else { 1460 } else {
1270 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 1461 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
1271 /* Some production boards of m6 will report 0 1462 /* Some production boards of m6 will report 0
1272 * if it's 8 MB 1463 * if it's 8 MB
1273 */ 1464 */
1274 if (rdev->mc.vram_size == 0) { 1465 if (rdev->mc.real_vram_size == 0) {
1275 rdev->mc.vram_size = 8192 * 1024; 1466 rdev->mc.real_vram_size = 8192 * 1024;
1276 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 1467 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
1277 } 1468 }
1469 /* let driver place VRAM */
1470 rdev->mc.vram_location = 0xFFFFFFFFUL;
1471 /* Fix for RN50, M6, M7 with 8/16/32(??) MBs of VRAM -
1472 * Novell bug 204882 + along with lots of ubuntu ones */
1473 if (config_aper_size > rdev->mc.real_vram_size)
1474 rdev->mc.mc_vram_size = config_aper_size;
1475 else
1476 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
1278 } 1477 }
1279 1478
1479 /* work out accessible VRAM */
1480 accessible = r100_get_accessible_vram(rdev);
1481
1280 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 1482 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
1281 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 1483 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
1484
1485 if (accessible > rdev->mc.aper_size)
1486 accessible = rdev->mc.aper_size;
1487
1488 if (rdev->mc.mc_vram_size > rdev->mc.aper_size)
1489 rdev->mc.mc_vram_size = rdev->mc.aper_size;
1490
1491 if (rdev->mc.real_vram_size > rdev->mc.aper_size)
1492 rdev->mc.real_vram_size = rdev->mc.aper_size;
1493}
1494
1495void r100_vram_info(struct radeon_device *rdev)
1496{
1497 r100_vram_get_type(rdev);
1498
1499 r100_vram_init_sizes(rdev);
1282} 1500}
1283 1501
1284 1502
@@ -1533,3 +1751,530 @@ int r100_debugfs_mc_info_init(struct radeon_device *rdev)
1533 return 0; 1751 return 0;
1534#endif 1752#endif
1535} 1753}
1754
1755int r100_set_surface_reg(struct radeon_device *rdev, int reg,
1756 uint32_t tiling_flags, uint32_t pitch,
1757 uint32_t offset, uint32_t obj_size)
1758{
1759 int surf_index = reg * 16;
1760 int flags = 0;
1761
1762 /* r100/r200 divide by 16 */
1763 if (rdev->family < CHIP_R300)
1764 flags = pitch / 16;
1765 else
1766 flags = pitch / 8;
1767
1768 if (rdev->family <= CHIP_RS200) {
1769 if ((tiling_flags & (RADEON_TILING_MACRO|RADEON_TILING_MICRO))
1770 == (RADEON_TILING_MACRO|RADEON_TILING_MICRO))
1771 flags |= RADEON_SURF_TILE_COLOR_BOTH;
1772 if (tiling_flags & RADEON_TILING_MACRO)
1773 flags |= RADEON_SURF_TILE_COLOR_MACRO;
1774 } else if (rdev->family <= CHIP_RV280) {
1775 if (tiling_flags & (RADEON_TILING_MACRO))
1776 flags |= R200_SURF_TILE_COLOR_MACRO;
1777 if (tiling_flags & RADEON_TILING_MICRO)
1778 flags |= R200_SURF_TILE_COLOR_MICRO;
1779 } else {
1780 if (tiling_flags & RADEON_TILING_MACRO)
1781 flags |= R300_SURF_TILE_MACRO;
1782 if (tiling_flags & RADEON_TILING_MICRO)
1783 flags |= R300_SURF_TILE_MICRO;
1784 }
1785
1786 DRM_DEBUG("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1);
1787 WREG32(RADEON_SURFACE0_INFO + surf_index, flags);
1788 WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset);
1789 WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1);
1790 return 0;
1791}
1792
1793void r100_clear_surface_reg(struct radeon_device *rdev, int reg)
1794{
1795 int surf_index = reg * 16;
1796 WREG32(RADEON_SURFACE0_INFO + surf_index, 0);
1797}
1798
1799void r100_bandwidth_update(struct radeon_device *rdev)
1800{
1801 fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff;
1802 fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff;
1803 fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff, crit_point_ff;
1804 uint32_t temp, data, mem_trcd, mem_trp, mem_tras;
1805 fixed20_12 memtcas_ff[8] = {
1806 fixed_init(1),
1807 fixed_init(2),
1808 fixed_init(3),
1809 fixed_init(0),
1810 fixed_init_half(1),
1811 fixed_init_half(2),
1812 fixed_init(0),
1813 };
1814 fixed20_12 memtcas_rs480_ff[8] = {
1815 fixed_init(0),
1816 fixed_init(1),
1817 fixed_init(2),
1818 fixed_init(3),
1819 fixed_init(0),
1820 fixed_init_half(1),
1821 fixed_init_half(2),
1822 fixed_init_half(3),
1823 };
1824 fixed20_12 memtcas2_ff[8] = {
1825 fixed_init(0),
1826 fixed_init(1),
1827 fixed_init(2),
1828 fixed_init(3),
1829 fixed_init(4),
1830 fixed_init(5),
1831 fixed_init(6),
1832 fixed_init(7),
1833 };
1834 fixed20_12 memtrbs[8] = {
1835 fixed_init(1),
1836 fixed_init_half(1),
1837 fixed_init(2),
1838 fixed_init_half(2),
1839 fixed_init(3),
1840 fixed_init_half(3),
1841 fixed_init(4),
1842 fixed_init_half(4)
1843 };
1844 fixed20_12 memtrbs_r4xx[8] = {
1845 fixed_init(4),
1846 fixed_init(5),
1847 fixed_init(6),
1848 fixed_init(7),
1849 fixed_init(8),
1850 fixed_init(9),
1851 fixed_init(10),
1852 fixed_init(11)
1853 };
1854 fixed20_12 min_mem_eff;
1855 fixed20_12 mc_latency_sclk, mc_latency_mclk, k1;
1856 fixed20_12 cur_latency_mclk, cur_latency_sclk;
1857 fixed20_12 disp_latency, disp_latency_overhead, disp_drain_rate,
1858 disp_drain_rate2, read_return_rate;
1859 fixed20_12 time_disp1_drop_priority;
1860 int c;
1861 int cur_size = 16; /* in octawords */
1862 int critical_point = 0, critical_point2;
1863/* uint32_t read_return_rate, time_disp1_drop_priority; */
1864 int stop_req, max_stop_req;
1865 struct drm_display_mode *mode1 = NULL;
1866 struct drm_display_mode *mode2 = NULL;
1867 uint32_t pixel_bytes1 = 0;
1868 uint32_t pixel_bytes2 = 0;
1869
1870 if (rdev->mode_info.crtcs[0]->base.enabled) {
1871 mode1 = &rdev->mode_info.crtcs[0]->base.mode;
1872 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.fb->bits_per_pixel / 8;
1873 }
1874 if (rdev->mode_info.crtcs[1]->base.enabled) {
1875 mode2 = &rdev->mode_info.crtcs[1]->base.mode;
1876 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.fb->bits_per_pixel / 8;
1877 }
1878
1879 min_mem_eff.full = rfixed_const_8(0);
1880 /* get modes */
1881 if ((rdev->disp_priority == 2) && ASIC_IS_R300(rdev)) {
1882 uint32_t mc_init_misc_lat_timer = RREG32(R300_MC_INIT_MISC_LAT_TIMER);
1883 mc_init_misc_lat_timer &= ~(R300_MC_DISP1R_INIT_LAT_MASK << R300_MC_DISP1R_INIT_LAT_SHIFT);
1884 mc_init_misc_lat_timer &= ~(R300_MC_DISP0R_INIT_LAT_MASK << R300_MC_DISP0R_INIT_LAT_SHIFT);
1885 /* check crtc enables */
1886 if (mode2)
1887 mc_init_misc_lat_timer |= (1 << R300_MC_DISP1R_INIT_LAT_SHIFT);
1888 if (mode1)
1889 mc_init_misc_lat_timer |= (1 << R300_MC_DISP0R_INIT_LAT_SHIFT);
1890 WREG32(R300_MC_INIT_MISC_LAT_TIMER, mc_init_misc_lat_timer);
1891 }
1892
1893 /*
1894 * determine is there is enough bw for current mode
1895 */
1896 mclk_ff.full = rfixed_const(rdev->clock.default_mclk);
1897 temp_ff.full = rfixed_const(100);
1898 mclk_ff.full = rfixed_div(mclk_ff, temp_ff);
1899 sclk_ff.full = rfixed_const(rdev->clock.default_sclk);
1900 sclk_ff.full = rfixed_div(sclk_ff, temp_ff);
1901
1902 temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1);
1903 temp_ff.full = rfixed_const(temp);
1904 mem_bw.full = rfixed_mul(mclk_ff, temp_ff);
1905
1906 pix_clk.full = 0;
1907 pix_clk2.full = 0;
1908 peak_disp_bw.full = 0;
1909 if (mode1) {
1910 temp_ff.full = rfixed_const(1000);
1911 pix_clk.full = rfixed_const(mode1->clock); /* convert to fixed point */
1912 pix_clk.full = rfixed_div(pix_clk, temp_ff);
1913 temp_ff.full = rfixed_const(pixel_bytes1);
1914 peak_disp_bw.full += rfixed_mul(pix_clk, temp_ff);
1915 }
1916 if (mode2) {
1917 temp_ff.full = rfixed_const(1000);
1918 pix_clk2.full = rfixed_const(mode2->clock); /* convert to fixed point */
1919 pix_clk2.full = rfixed_div(pix_clk2, temp_ff);
1920 temp_ff.full = rfixed_const(pixel_bytes2);
1921 peak_disp_bw.full += rfixed_mul(pix_clk2, temp_ff);
1922 }
1923
1924 mem_bw.full = rfixed_mul(mem_bw, min_mem_eff);
1925 if (peak_disp_bw.full >= mem_bw.full) {
1926 DRM_ERROR("You may not have enough display bandwidth for current mode\n"
1927 "If you have flickering problem, try to lower resolution, refresh rate, or color depth\n");
1928 }
1929
1930 /* Get values from the EXT_MEM_CNTL register...converting its contents. */
1931 temp = RREG32(RADEON_MEM_TIMING_CNTL);
1932 if ((rdev->family == CHIP_RV100) || (rdev->flags & RADEON_IS_IGP)) { /* RV100, M6, IGPs */
1933 mem_trcd = ((temp >> 2) & 0x3) + 1;
1934 mem_trp = ((temp & 0x3)) + 1;
1935 mem_tras = ((temp & 0x70) >> 4) + 1;
1936 } else if (rdev->family == CHIP_R300 ||
1937 rdev->family == CHIP_R350) { /* r300, r350 */
1938 mem_trcd = (temp & 0x7) + 1;
1939 mem_trp = ((temp >> 8) & 0x7) + 1;
1940 mem_tras = ((temp >> 11) & 0xf) + 4;
1941 } else if (rdev->family == CHIP_RV350 ||
1942 rdev->family <= CHIP_RV380) {
1943 /* rv3x0 */
1944 mem_trcd = (temp & 0x7) + 3;
1945 mem_trp = ((temp >> 8) & 0x7) + 3;
1946 mem_tras = ((temp >> 11) & 0xf) + 6;
1947 } else if (rdev->family == CHIP_R420 ||
1948 rdev->family == CHIP_R423 ||
1949 rdev->family == CHIP_RV410) {
1950 /* r4xx */
1951 mem_trcd = (temp & 0xf) + 3;
1952 if (mem_trcd > 15)
1953 mem_trcd = 15;
1954 mem_trp = ((temp >> 8) & 0xf) + 3;
1955 if (mem_trp > 15)
1956 mem_trp = 15;
1957 mem_tras = ((temp >> 12) & 0x1f) + 6;
1958 if (mem_tras > 31)
1959 mem_tras = 31;
1960 } else { /* RV200, R200 */
1961 mem_trcd = (temp & 0x7) + 1;
1962 mem_trp = ((temp >> 8) & 0x7) + 1;
1963 mem_tras = ((temp >> 12) & 0xf) + 4;
1964 }
1965 /* convert to FF */
1966 trcd_ff.full = rfixed_const(mem_trcd);
1967 trp_ff.full = rfixed_const(mem_trp);
1968 tras_ff.full = rfixed_const(mem_tras);
1969
1970 /* Get values from the MEM_SDRAM_MODE_REG register...converting its */
1971 temp = RREG32(RADEON_MEM_SDRAM_MODE_REG);
1972 data = (temp & (7 << 20)) >> 20;
1973 if ((rdev->family == CHIP_RV100) || rdev->flags & RADEON_IS_IGP) {
1974 if (rdev->family == CHIP_RS480) /* don't think rs400 */
1975 tcas_ff = memtcas_rs480_ff[data];
1976 else
1977 tcas_ff = memtcas_ff[data];
1978 } else
1979 tcas_ff = memtcas2_ff[data];
1980
1981 if (rdev->family == CHIP_RS400 ||
1982 rdev->family == CHIP_RS480) {
1983 /* extra cas latency stored in bits 23-25 0-4 clocks */
1984 data = (temp >> 23) & 0x7;
1985 if (data < 5)
1986 tcas_ff.full += rfixed_const(data);
1987 }
1988
1989 if (ASIC_IS_R300(rdev) && !(rdev->flags & RADEON_IS_IGP)) {
1990 /* on the R300, Tcas is included in Trbs.
1991 */
1992 temp = RREG32(RADEON_MEM_CNTL);
1993 data = (R300_MEM_NUM_CHANNELS_MASK & temp);
1994 if (data == 1) {
1995 if (R300_MEM_USE_CD_CH_ONLY & temp) {
1996 temp = RREG32(R300_MC_IND_INDEX);
1997 temp &= ~R300_MC_IND_ADDR_MASK;
1998 temp |= R300_MC_READ_CNTL_CD_mcind;
1999 WREG32(R300_MC_IND_INDEX, temp);
2000 temp = RREG32(R300_MC_IND_DATA);
2001 data = (R300_MEM_RBS_POSITION_C_MASK & temp);
2002 } else {
2003 temp = RREG32(R300_MC_READ_CNTL_AB);
2004 data = (R300_MEM_RBS_POSITION_A_MASK & temp);
2005 }
2006 } else {
2007 temp = RREG32(R300_MC_READ_CNTL_AB);
2008 data = (R300_MEM_RBS_POSITION_A_MASK & temp);
2009 }
2010 if (rdev->family == CHIP_RV410 ||
2011 rdev->family == CHIP_R420 ||
2012 rdev->family == CHIP_R423)
2013 trbs_ff = memtrbs_r4xx[data];
2014 else
2015 trbs_ff = memtrbs[data];
2016 tcas_ff.full += trbs_ff.full;
2017 }
2018
2019 sclk_eff_ff.full = sclk_ff.full;
2020
2021 if (rdev->flags & RADEON_IS_AGP) {
2022 fixed20_12 agpmode_ff;
2023 agpmode_ff.full = rfixed_const(radeon_agpmode);
2024 temp_ff.full = rfixed_const_666(16);
2025 sclk_eff_ff.full -= rfixed_mul(agpmode_ff, temp_ff);
2026 }
2027 /* TODO PCIE lanes may affect this - agpmode == 16?? */
2028
2029 if (ASIC_IS_R300(rdev)) {
2030 sclk_delay_ff.full = rfixed_const(250);
2031 } else {
2032 if ((rdev->family == CHIP_RV100) ||
2033 rdev->flags & RADEON_IS_IGP) {
2034 if (rdev->mc.vram_is_ddr)
2035 sclk_delay_ff.full = rfixed_const(41);
2036 else
2037 sclk_delay_ff.full = rfixed_const(33);
2038 } else {
2039 if (rdev->mc.vram_width == 128)
2040 sclk_delay_ff.full = rfixed_const(57);
2041 else
2042 sclk_delay_ff.full = rfixed_const(41);
2043 }
2044 }
2045
2046 mc_latency_sclk.full = rfixed_div(sclk_delay_ff, sclk_eff_ff);
2047
2048 if (rdev->mc.vram_is_ddr) {
2049 if (rdev->mc.vram_width == 32) {
2050 k1.full = rfixed_const(40);
2051 c = 3;
2052 } else {
2053 k1.full = rfixed_const(20);
2054 c = 1;
2055 }
2056 } else {
2057 k1.full = rfixed_const(40);
2058 c = 3;
2059 }
2060
2061 temp_ff.full = rfixed_const(2);
2062 mc_latency_mclk.full = rfixed_mul(trcd_ff, temp_ff);
2063 temp_ff.full = rfixed_const(c);
2064 mc_latency_mclk.full += rfixed_mul(tcas_ff, temp_ff);
2065 temp_ff.full = rfixed_const(4);
2066 mc_latency_mclk.full += rfixed_mul(tras_ff, temp_ff);
2067 mc_latency_mclk.full += rfixed_mul(trp_ff, temp_ff);
2068 mc_latency_mclk.full += k1.full;
2069
2070 mc_latency_mclk.full = rfixed_div(mc_latency_mclk, mclk_ff);
2071 mc_latency_mclk.full += rfixed_div(temp_ff, sclk_eff_ff);
2072
2073 /*
2074 HW cursor time assuming worst case of full size colour cursor.
2075 */
2076 temp_ff.full = rfixed_const((2 * (cur_size - (rdev->mc.vram_is_ddr + 1))));
2077 temp_ff.full += trcd_ff.full;
2078 if (temp_ff.full < tras_ff.full)
2079 temp_ff.full = tras_ff.full;
2080 cur_latency_mclk.full = rfixed_div(temp_ff, mclk_ff);
2081
2082 temp_ff.full = rfixed_const(cur_size);
2083 cur_latency_sclk.full = rfixed_div(temp_ff, sclk_eff_ff);
2084 /*
2085 Find the total latency for the display data.
2086 */
2087 disp_latency_overhead.full = rfixed_const(80);
2088 disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff);
2089 mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full;
2090 mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full;
2091
2092 if (mc_latency_mclk.full > mc_latency_sclk.full)
2093 disp_latency.full = mc_latency_mclk.full;
2094 else
2095 disp_latency.full = mc_latency_sclk.full;
2096
2097 /* setup Max GRPH_STOP_REQ default value */
2098 if (ASIC_IS_RV100(rdev))
2099 max_stop_req = 0x5c;
2100 else
2101 max_stop_req = 0x7c;
2102
2103 if (mode1) {
2104 /* CRTC1
2105 Set GRPH_BUFFER_CNTL register using h/w defined optimal values.
2106 GRPH_STOP_REQ <= MIN[ 0x7C, (CRTC_H_DISP + 1) * (bit depth) / 0x10 ]
2107 */
2108 stop_req = mode1->hdisplay * pixel_bytes1 / 16;
2109
2110 if (stop_req > max_stop_req)
2111 stop_req = max_stop_req;
2112
2113 /*
2114 Find the drain rate of the display buffer.
2115 */
2116 temp_ff.full = rfixed_const((16/pixel_bytes1));
2117 disp_drain_rate.full = rfixed_div(pix_clk, temp_ff);
2118
2119 /*
2120 Find the critical point of the display buffer.
2121 */
2122 crit_point_ff.full = rfixed_mul(disp_drain_rate, disp_latency);
2123 crit_point_ff.full += rfixed_const_half(0);
2124
2125 critical_point = rfixed_trunc(crit_point_ff);
2126
2127 if (rdev->disp_priority == 2) {
2128 critical_point = 0;
2129 }
2130
2131 /*
2132 The critical point should never be above max_stop_req-4. Setting
2133 GRPH_CRITICAL_CNTL = 0 will thus force high priority all the time.
2134 */
2135 if (max_stop_req - critical_point < 4)
2136 critical_point = 0;
2137
2138 if (critical_point == 0 && mode2 && rdev->family == CHIP_R300) {
2139 /* some R300 cards have problem with this set to 0, when CRTC2 is enabled.*/
2140 critical_point = 0x10;
2141 }
2142
2143 temp = RREG32(RADEON_GRPH_BUFFER_CNTL);
2144 temp &= ~(RADEON_GRPH_STOP_REQ_MASK);
2145 temp |= (stop_req << RADEON_GRPH_STOP_REQ_SHIFT);
2146 temp &= ~(RADEON_GRPH_START_REQ_MASK);
2147 if ((rdev->family == CHIP_R350) &&
2148 (stop_req > 0x15)) {
2149 stop_req -= 0x10;
2150 }
2151 temp |= (stop_req << RADEON_GRPH_START_REQ_SHIFT);
2152 temp |= RADEON_GRPH_BUFFER_SIZE;
2153 temp &= ~(RADEON_GRPH_CRITICAL_CNTL |
2154 RADEON_GRPH_CRITICAL_AT_SOF |
2155 RADEON_GRPH_STOP_CNTL);
2156 /*
2157 Write the result into the register.
2158 */
2159 WREG32(RADEON_GRPH_BUFFER_CNTL, ((temp & ~RADEON_GRPH_CRITICAL_POINT_MASK) |
2160 (critical_point << RADEON_GRPH_CRITICAL_POINT_SHIFT)));
2161
2162#if 0
2163 if ((rdev->family == CHIP_RS400) ||
2164 (rdev->family == CHIP_RS480)) {
2165 /* attempt to program RS400 disp regs correctly ??? */
2166 temp = RREG32(RS400_DISP1_REG_CNTL);
2167 temp &= ~(RS400_DISP1_START_REQ_LEVEL_MASK |
2168 RS400_DISP1_STOP_REQ_LEVEL_MASK);
2169 WREG32(RS400_DISP1_REQ_CNTL1, (temp |
2170 (critical_point << RS400_DISP1_START_REQ_LEVEL_SHIFT) |
2171 (critical_point << RS400_DISP1_STOP_REQ_LEVEL_SHIFT)));
2172 temp = RREG32(RS400_DMIF_MEM_CNTL1);
2173 temp &= ~(RS400_DISP1_CRITICAL_POINT_START_MASK |
2174 RS400_DISP1_CRITICAL_POINT_STOP_MASK);
2175 WREG32(RS400_DMIF_MEM_CNTL1, (temp |
2176 (critical_point << RS400_DISP1_CRITICAL_POINT_START_SHIFT) |
2177 (critical_point << RS400_DISP1_CRITICAL_POINT_STOP_SHIFT)));
2178 }
2179#endif
2180
2181 DRM_DEBUG("GRPH_BUFFER_CNTL from to %x\n",
2182 /* (unsigned int)info->SavedReg->grph_buffer_cntl, */
2183 (unsigned int)RREG32(RADEON_GRPH_BUFFER_CNTL));
2184 }
2185
2186 if (mode2) {
2187 u32 grph2_cntl;
2188 stop_req = mode2->hdisplay * pixel_bytes2 / 16;
2189
2190 if (stop_req > max_stop_req)
2191 stop_req = max_stop_req;
2192
2193 /*
2194 Find the drain rate of the display buffer.
2195 */
2196 temp_ff.full = rfixed_const((16/pixel_bytes2));
2197 disp_drain_rate2.full = rfixed_div(pix_clk2, temp_ff);
2198
2199 grph2_cntl = RREG32(RADEON_GRPH2_BUFFER_CNTL);
2200 grph2_cntl &= ~(RADEON_GRPH_STOP_REQ_MASK);
2201 grph2_cntl |= (stop_req << RADEON_GRPH_STOP_REQ_SHIFT);
2202 grph2_cntl &= ~(RADEON_GRPH_START_REQ_MASK);
2203 if ((rdev->family == CHIP_R350) &&
2204 (stop_req > 0x15)) {
2205 stop_req -= 0x10;
2206 }
2207 grph2_cntl |= (stop_req << RADEON_GRPH_START_REQ_SHIFT);
2208 grph2_cntl |= RADEON_GRPH_BUFFER_SIZE;
2209 grph2_cntl &= ~(RADEON_GRPH_CRITICAL_CNTL |
2210 RADEON_GRPH_CRITICAL_AT_SOF |
2211 RADEON_GRPH_STOP_CNTL);
2212
2213 if ((rdev->family == CHIP_RS100) ||
2214 (rdev->family == CHIP_RS200))
2215 critical_point2 = 0;
2216 else {
2217 temp = (rdev->mc.vram_width * rdev->mc.vram_is_ddr + 1)/128;
2218 temp_ff.full = rfixed_const(temp);
2219 temp_ff.full = rfixed_mul(mclk_ff, temp_ff);
2220 if (sclk_ff.full < temp_ff.full)
2221 temp_ff.full = sclk_ff.full;
2222
2223 read_return_rate.full = temp_ff.full;
2224
2225 if (mode1) {
2226 temp_ff.full = read_return_rate.full - disp_drain_rate.full;
2227 time_disp1_drop_priority.full = rfixed_div(crit_point_ff, temp_ff);
2228 } else {
2229 time_disp1_drop_priority.full = 0;
2230 }
2231 crit_point_ff.full = disp_latency.full + time_disp1_drop_priority.full + disp_latency.full;
2232 crit_point_ff.full = rfixed_mul(crit_point_ff, disp_drain_rate2);
2233 crit_point_ff.full += rfixed_const_half(0);
2234
2235 critical_point2 = rfixed_trunc(crit_point_ff);
2236
2237 if (rdev->disp_priority == 2) {
2238 critical_point2 = 0;
2239 }
2240
2241 if (max_stop_req - critical_point2 < 4)
2242 critical_point2 = 0;
2243
2244 }
2245
2246 if (critical_point2 == 0 && rdev->family == CHIP_R300) {
2247 /* some R300 cards have problem with this set to 0 */
2248 critical_point2 = 0x10;
2249 }
2250
2251 WREG32(RADEON_GRPH2_BUFFER_CNTL, ((grph2_cntl & ~RADEON_GRPH_CRITICAL_POINT_MASK) |
2252 (critical_point2 << RADEON_GRPH_CRITICAL_POINT_SHIFT)));
2253
2254 if ((rdev->family == CHIP_RS400) ||
2255 (rdev->family == CHIP_RS480)) {
2256#if 0
2257 /* attempt to program RS400 disp2 regs correctly ??? */
2258 temp = RREG32(RS400_DISP2_REQ_CNTL1);
2259 temp &= ~(RS400_DISP2_START_REQ_LEVEL_MASK |
2260 RS400_DISP2_STOP_REQ_LEVEL_MASK);
2261 WREG32(RS400_DISP2_REQ_CNTL1, (temp |
2262 (critical_point2 << RS400_DISP1_START_REQ_LEVEL_SHIFT) |
2263 (critical_point2 << RS400_DISP1_STOP_REQ_LEVEL_SHIFT)));
2264 temp = RREG32(RS400_DISP2_REQ_CNTL2);
2265 temp &= ~(RS400_DISP2_CRITICAL_POINT_START_MASK |
2266 RS400_DISP2_CRITICAL_POINT_STOP_MASK);
2267 WREG32(RS400_DISP2_REQ_CNTL2, (temp |
2268 (critical_point2 << RS400_DISP2_CRITICAL_POINT_START_SHIFT) |
2269 (critical_point2 << RS400_DISP2_CRITICAL_POINT_STOP_SHIFT)));
2270#endif
2271 WREG32(RS400_DISP2_REQ_CNTL1, 0x105DC1CC);
2272 WREG32(RS400_DISP2_REQ_CNTL2, 0x2749D000);
2273 WREG32(RS400_DMIF_MEM_CNTL1, 0x29CA71DC);
2274 WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC);
2275 }
2276
2277 DRM_DEBUG("GRPH2_BUFFER_CNTL from to %x\n",
2278 (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL));
2279 }
2280}
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index e2ed5bc08170..9c8d41534a5d 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -30,6 +30,8 @@
30#include "drm.h" 30#include "drm.h"
31#include "radeon_reg.h" 31#include "radeon_reg.h"
32#include "radeon.h" 32#include "radeon.h"
33#include "radeon_drm.h"
34#include "radeon_share.h"
33 35
34/* r300,r350,rv350,rv370,rv380 depends on : */ 36/* r300,r350,rv350,rv370,rv380 depends on : */
35void r100_hdp_reset(struct radeon_device *rdev); 37void r100_hdp_reset(struct radeon_device *rdev);
@@ -44,6 +46,7 @@ int r100_gui_wait_for_idle(struct radeon_device *rdev);
44int r100_cs_packet_parse(struct radeon_cs_parser *p, 46int r100_cs_packet_parse(struct radeon_cs_parser *p,
45 struct radeon_cs_packet *pkt, 47 struct radeon_cs_packet *pkt,
46 unsigned idx); 48 unsigned idx);
49int r100_cs_packet_parse_vline(struct radeon_cs_parser *p);
47int r100_cs_packet_next_reloc(struct radeon_cs_parser *p, 50int r100_cs_packet_next_reloc(struct radeon_cs_parser *p,
48 struct radeon_cs_reloc **cs_reloc); 51 struct radeon_cs_reloc **cs_reloc);
49int r100_cs_parse_packet0(struct radeon_cs_parser *p, 52int r100_cs_parse_packet0(struct radeon_cs_parser *p,
@@ -150,8 +153,13 @@ int rv370_pcie_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
150 if (i < 0 || i > rdev->gart.num_gpu_pages) { 153 if (i < 0 || i > rdev->gart.num_gpu_pages) {
151 return -EINVAL; 154 return -EINVAL;
152 } 155 }
153 addr = (((u32)addr) >> 8) | ((upper_32_bits(addr) & 0xff) << 4) | 0xC; 156 addr = (lower_32_bits(addr) >> 8) |
154 writel(cpu_to_le32(addr), ((void __iomem *)ptr) + (i * 4)); 157 ((upper_32_bits(addr) & 0xff) << 24) |
158 0xc;
159 /* on x86 we want this to be CPU endian, on powerpc
160 * on powerpc without HW swappers, it'll get swapped on way
161 * into VRAM - so no need for cpu_to_le32 on VRAM tables */
162 writel(addr, ((void __iomem *)ptr) + (i * 4));
155 return 0; 163 return 0;
156} 164}
157 165
@@ -579,10 +587,8 @@ void r300_vram_info(struct radeon_device *rdev)
579 } else { 587 } else {
580 rdev->mc.vram_width = 64; 588 rdev->mc.vram_width = 64;
581 } 589 }
582 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
583 590
584 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 591 r100_vram_init_sizes(rdev);
585 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
586} 592}
587 593
588 594
@@ -970,7 +976,7 @@ static inline void r300_cs_track_clear(struct r300_cs_track *track)
970 976
971static const unsigned r300_reg_safe_bm[159] = { 977static const unsigned r300_reg_safe_bm[159] = {
972 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 978 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
973 0xFFFFFFBF, 0xFFFFFFFF, 0xFFFFFFBF, 0xFFFFFFFF, 979 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
974 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 980 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
975 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 981 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
976 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 982 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
@@ -1019,7 +1025,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1019 struct radeon_cs_reloc *reloc; 1025 struct radeon_cs_reloc *reloc;
1020 struct r300_cs_track *track; 1026 struct r300_cs_track *track;
1021 volatile uint32_t *ib; 1027 volatile uint32_t *ib;
1022 uint32_t tmp; 1028 uint32_t tmp, tile_flags = 0;
1023 unsigned i; 1029 unsigned i;
1024 int r; 1030 int r;
1025 1031
@@ -1027,6 +1033,16 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1027 ib_chunk = &p->chunks[p->chunk_ib_idx]; 1033 ib_chunk = &p->chunks[p->chunk_ib_idx];
1028 track = (struct r300_cs_track*)p->track; 1034 track = (struct r300_cs_track*)p->track;
1029 switch(reg) { 1035 switch(reg) {
1036 case AVIVO_D1MODE_VLINE_START_END:
1037 case RADEON_CRTC_GUI_TRIG_VLINE:
1038 r = r100_cs_packet_parse_vline(p);
1039 if (r) {
1040 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1041 idx, reg);
1042 r100_cs_dump_packet(p, pkt);
1043 return r;
1044 }
1045 break;
1030 case RADEON_DST_PITCH_OFFSET: 1046 case RADEON_DST_PITCH_OFFSET:
1031 case RADEON_SRC_PITCH_OFFSET: 1047 case RADEON_SRC_PITCH_OFFSET:
1032 r = r100_cs_packet_next_reloc(p, &reloc); 1048 r = r100_cs_packet_next_reloc(p, &reloc);
@@ -1038,7 +1054,19 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1038 } 1054 }
1039 tmp = ib_chunk->kdata[idx] & 0x003fffff; 1055 tmp = ib_chunk->kdata[idx] & 0x003fffff;
1040 tmp += (((u32)reloc->lobj.gpu_offset) >> 10); 1056 tmp += (((u32)reloc->lobj.gpu_offset) >> 10);
1041 ib[idx] = (ib_chunk->kdata[idx] & 0xffc00000) | tmp; 1057
1058 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1059 tile_flags |= RADEON_DST_TILE_MACRO;
1060 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
1061 if (reg == RADEON_SRC_PITCH_OFFSET) {
1062 DRM_ERROR("Cannot src blit from microtiled surface\n");
1063 r100_cs_dump_packet(p, pkt);
1064 return -EINVAL;
1065 }
1066 tile_flags |= RADEON_DST_TILE_MICRO;
1067 }
1068 tmp |= tile_flags;
1069 ib[idx] = (ib_chunk->kdata[idx] & 0x3fc00000) | tmp;
1042 break; 1070 break;
1043 case R300_RB3D_COLOROFFSET0: 1071 case R300_RB3D_COLOROFFSET0:
1044 case R300_RB3D_COLOROFFSET1: 1072 case R300_RB3D_COLOROFFSET1:
@@ -1127,6 +1155,23 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1127 /* RB3D_COLORPITCH1 */ 1155 /* RB3D_COLORPITCH1 */
1128 /* RB3D_COLORPITCH2 */ 1156 /* RB3D_COLORPITCH2 */
1129 /* RB3D_COLORPITCH3 */ 1157 /* RB3D_COLORPITCH3 */
1158 r = r100_cs_packet_next_reloc(p, &reloc);
1159 if (r) {
1160 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1161 idx, reg);
1162 r100_cs_dump_packet(p, pkt);
1163 return r;
1164 }
1165
1166 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1167 tile_flags |= R300_COLOR_TILE_ENABLE;
1168 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1169 tile_flags |= R300_COLOR_MICROTILE_ENABLE;
1170
1171 tmp = ib_chunk->kdata[idx] & ~(0x7 << 16);
1172 tmp |= tile_flags;
1173 ib[idx] = tmp;
1174
1130 i = (reg - 0x4E38) >> 2; 1175 i = (reg - 0x4E38) >> 2;
1131 track->cb[i].pitch = ib_chunk->kdata[idx] & 0x3FFE; 1176 track->cb[i].pitch = ib_chunk->kdata[idx] & 0x3FFE;
1132 switch (((ib_chunk->kdata[idx] >> 21) & 0xF)) { 1177 switch (((ib_chunk->kdata[idx] >> 21) & 0xF)) {
@@ -1182,6 +1227,23 @@ static int r300_packet0_check(struct radeon_cs_parser *p,
1182 break; 1227 break;
1183 case 0x4F24: 1228 case 0x4F24:
1184 /* ZB_DEPTHPITCH */ 1229 /* ZB_DEPTHPITCH */
1230 r = r100_cs_packet_next_reloc(p, &reloc);
1231 if (r) {
1232 DRM_ERROR("No reloc for ib[%d]=0x%04X\n",
1233 idx, reg);
1234 r100_cs_dump_packet(p, pkt);
1235 return r;
1236 }
1237
1238 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1239 tile_flags |= R300_DEPTHMACROTILE_ENABLE;
1240 if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1241 tile_flags |= R300_DEPTHMICROTILE_TILED;;
1242
1243 tmp = ib_chunk->kdata[idx] & ~(0x7 << 16);
1244 tmp |= tile_flags;
1245 ib[idx] = tmp;
1246
1185 track->zb.pitch = ib_chunk->kdata[idx] & 0x3FFC; 1247 track->zb.pitch = ib_chunk->kdata[idx] & 0x3FFC;
1186 break; 1248 break;
1187 case 0x4104: 1249 case 0x4104:
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h
index 70f48609515e..4b7afef35a65 100644
--- a/drivers/gpu/drm/radeon/r300_reg.h
+++ b/drivers/gpu/drm/radeon/r300_reg.h
@@ -27,7 +27,9 @@
27#ifndef _R300_REG_H_ 27#ifndef _R300_REG_H_
28#define _R300_REG_H_ 28#define _R300_REG_H_
29 29
30 30#define R300_SURF_TILE_MACRO (1<<16)
31#define R300_SURF_TILE_MICRO (2<<16)
32#define R300_SURF_TILE_BOTH (3<<16)
31 33
32 34
33#define R300_MC_INIT_MISC_LAT_TIMER 0x180 35#define R300_MC_INIT_MISC_LAT_TIMER 0x180
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 9070a1c2ce23..036691b38cb7 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -445,6 +445,7 @@
445#define AVIVO_D1MODE_DATA_FORMAT 0x6528 445#define AVIVO_D1MODE_DATA_FORMAT 0x6528
446# define AVIVO_D1MODE_INTERLEAVE_EN (1 << 0) 446# define AVIVO_D1MODE_INTERLEAVE_EN (1 << 0)
447#define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652C 447#define AVIVO_D1MODE_DESKTOP_HEIGHT 0x652C
448#define AVIVO_D1MODE_VLINE_START_END 0x6538
448#define AVIVO_D1MODE_VIEWPORT_START 0x6580 449#define AVIVO_D1MODE_VIEWPORT_START 0x6580
449#define AVIVO_D1MODE_VIEWPORT_SIZE 0x6584 450#define AVIVO_D1MODE_VIEWPORT_SIZE 0x6584
450#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6588 451#define AVIVO_D1MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6588
@@ -496,6 +497,7 @@
496#define AVIVO_D2CUR_SIZE 0x6c10 497#define AVIVO_D2CUR_SIZE 0x6c10
497#define AVIVO_D2CUR_POSITION 0x6c14 498#define AVIVO_D2CUR_POSITION 0x6c14
498 499
500#define AVIVO_D2MODE_VLINE_START_END 0x6d38
499#define AVIVO_D2MODE_VIEWPORT_START 0x6d80 501#define AVIVO_D2MODE_VIEWPORT_START 0x6d80
500#define AVIVO_D2MODE_VIEWPORT_SIZE 0x6d84 502#define AVIVO_D2MODE_VIEWPORT_SIZE 0x6d84
501#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6d88 503#define AVIVO_D2MODE_EXT_OVERSCAN_LEFT_RIGHT 0x6d88
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 570a244bd88b..09fb0b6ec7dd 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -28,6 +28,7 @@
28#include "drmP.h" 28#include "drmP.h"
29#include "radeon_reg.h" 29#include "radeon_reg.h"
30#include "radeon.h" 30#include "radeon.h"
31#include "radeon_share.h"
31 32
32/* r520,rv530,rv560,rv570,r580 depends on : */ 33/* r520,rv530,rv560,rv570,r580 depends on : */
33void r100_hdp_reset(struct radeon_device *rdev); 34void r100_hdp_reset(struct radeon_device *rdev);
@@ -94,8 +95,8 @@ int r520_mc_init(struct radeon_device *rdev)
94 "programming pipes. Bad things might happen.\n"); 95 "programming pipes. Bad things might happen.\n");
95 } 96 }
96 /* Write VRAM size in case we are limiting it */ 97 /* Write VRAM size in case we are limiting it */
97 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 98 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
98 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 99 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
99 tmp = REG_SET(R520_MC_FB_TOP, tmp >> 16); 100 tmp = REG_SET(R520_MC_FB_TOP, tmp >> 16);
100 tmp |= REG_SET(R520_MC_FB_START, rdev->mc.vram_location >> 16); 101 tmp |= REG_SET(R520_MC_FB_START, rdev->mc.vram_location >> 16);
101 WREG32_MC(R520_MC_FB_LOCATION, tmp); 102 WREG32_MC(R520_MC_FB_LOCATION, tmp);
@@ -226,9 +227,20 @@ static void r520_vram_get_type(struct radeon_device *rdev)
226 227
227void r520_vram_info(struct radeon_device *rdev) 228void r520_vram_info(struct radeon_device *rdev)
228{ 229{
230 fixed20_12 a;
231
229 r520_vram_get_type(rdev); 232 r520_vram_get_type(rdev);
230 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
231 233
232 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 234 r100_vram_init_sizes(rdev);
233 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 235 /* FIXME: we should enforce default clock in case GPU is not in
236 * default setup
237 */
238 a.full = rfixed_const(100);
239 rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
240 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
241}
242
243void r520_bandwidth_update(struct radeon_device *rdev)
244{
245 rv515_bandwidth_avivo_update(rdev);
234} 246}
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index c45559fc97fd..538cd907df69 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -67,7 +67,7 @@ int r600_mc_init(struct radeon_device *rdev)
67 "programming pipes. Bad things might happen.\n"); 67 "programming pipes. Bad things might happen.\n");
68 } 68 }
69 69
70 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 70 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
71 tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24); 71 tmp = REG_SET(R600_MC_FB_TOP, tmp >> 24);
72 tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24); 72 tmp |= REG_SET(R600_MC_FB_BASE, rdev->mc.vram_location >> 24);
73 WREG32(R600_MC_VM_FB_LOCATION, tmp); 73 WREG32(R600_MC_VM_FB_LOCATION, tmp);
@@ -140,7 +140,8 @@ void r600_vram_get_type(struct radeon_device *rdev)
140void r600_vram_info(struct radeon_device *rdev) 140void r600_vram_info(struct radeon_device *rdev)
141{ 141{
142 r600_vram_get_type(rdev); 142 r600_vram_get_type(rdev);
143 rdev->mc.vram_size = RREG32(R600_CONFIG_MEMSIZE); 143 rdev->mc.real_vram_size = RREG32(R600_CONFIG_MEMSIZE);
144 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
144 145
145 /* Could aper size report 0 ? */ 146 /* Could aper size report 0 ? */
146 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 147 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 146f3570af8e..20f17908b036 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -384,8 +384,9 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
384 DRM_INFO("Loading RV670 PFP Microcode\n"); 384 DRM_INFO("Loading RV670 PFP Microcode\n");
385 for (i = 0; i < PFP_UCODE_SIZE; i++) 385 for (i = 0; i < PFP_UCODE_SIZE; i++)
386 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]); 386 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RV670_pfp_microcode[i]);
387 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) { 387 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
388 DRM_INFO("Loading RS780 CP Microcode\n"); 388 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
389 DRM_INFO("Loading RS780/RS880 CP Microcode\n");
389 for (i = 0; i < PM4_UCODE_SIZE; i++) { 390 for (i = 0; i < PM4_UCODE_SIZE; i++) {
390 RADEON_WRITE(R600_CP_ME_RAM_DATA, 391 RADEON_WRITE(R600_CP_ME_RAM_DATA,
391 RS780_cp_microcode[i][0]); 392 RS780_cp_microcode[i][0]);
@@ -396,7 +397,7 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
396 } 397 }
397 398
398 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0); 399 RADEON_WRITE(R600_CP_PFP_UCODE_ADDR, 0);
399 DRM_INFO("Loading RS780 PFP Microcode\n"); 400 DRM_INFO("Loading RS780/RS880 PFP Microcode\n");
400 for (i = 0; i < PFP_UCODE_SIZE; i++) 401 for (i = 0; i < PFP_UCODE_SIZE; i++)
401 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]); 402 RADEON_WRITE(R600_CP_PFP_UCODE_DATA, RS780_pfp_microcode[i]);
402 } 403 }
@@ -783,6 +784,7 @@ static void r600_gfx_init(struct drm_device *dev,
783 break; 784 break;
784 case CHIP_RV610: 785 case CHIP_RV610:
785 case CHIP_RS780: 786 case CHIP_RS780:
787 case CHIP_RS880:
786 case CHIP_RV620: 788 case CHIP_RV620:
787 dev_priv->r600_max_pipes = 1; 789 dev_priv->r600_max_pipes = 1;
788 dev_priv->r600_max_tile_pipes = 1; 790 dev_priv->r600_max_tile_pipes = 1;
@@ -917,7 +919,8 @@ static void r600_gfx_init(struct drm_device *dev,
917 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) || 919 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV630) ||
918 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || 920 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
919 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || 921 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
920 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) 922 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
923 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880))
921 RADEON_WRITE(R600_DB_DEBUG, R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE); 924 RADEON_WRITE(R600_DB_DEBUG, R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE);
922 else 925 else
923 RADEON_WRITE(R600_DB_DEBUG, 0); 926 RADEON_WRITE(R600_DB_DEBUG, 0);
@@ -935,7 +938,8 @@ static void r600_gfx_init(struct drm_device *dev,
935 sq_ms_fifo_sizes = RADEON_READ(R600_SQ_MS_FIFO_SIZES); 938 sq_ms_fifo_sizes = RADEON_READ(R600_SQ_MS_FIFO_SIZES);
936 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || 939 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
937 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || 940 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
938 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) { 941 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
942 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
939 sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(0xa) | 943 sq_ms_fifo_sizes = (R600_CACHE_FIFO_SIZE(0xa) |
940 R600_FETCH_FIFO_HIWATER(0xa) | 944 R600_FETCH_FIFO_HIWATER(0xa) |
941 R600_DONE_FIFO_HIWATER(0xe0) | 945 R600_DONE_FIFO_HIWATER(0xe0) |
@@ -978,7 +982,8 @@ static void r600_gfx_init(struct drm_device *dev,
978 R600_NUM_ES_STACK_ENTRIES(0)); 982 R600_NUM_ES_STACK_ENTRIES(0));
979 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || 983 } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
980 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || 984 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
981 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) { 985 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
986 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880)) {
982 /* no vertex cache */ 987 /* no vertex cache */
983 sq_config &= ~R600_VC_ENABLE; 988 sq_config &= ~R600_VC_ENABLE;
984 989
@@ -1035,7 +1040,8 @@ static void r600_gfx_init(struct drm_device *dev,
1035 1040
1036 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) || 1041 if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV610) ||
1037 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) || 1042 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV620) ||
1038 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780)) 1043 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS780) ||
1044 ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS880))
1039 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_TC_ONLY)); 1045 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_TC_ONLY));
1040 else 1046 else
1041 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_VC_AND_TC)); 1047 RADEON_WRITE(R600_VGT_CACHE_INVALIDATION, R600_CACHE_INVALIDATION(R600_VC_AND_TC));
@@ -1078,6 +1084,7 @@ static void r600_gfx_init(struct drm_device *dev,
1078 break; 1084 break;
1079 case CHIP_RV610: 1085 case CHIP_RV610:
1080 case CHIP_RS780: 1086 case CHIP_RS780:
1087 case CHIP_RS880:
1081 case CHIP_RV620: 1088 case CHIP_RV620:
1082 gs_prim_buffer_depth = 32; 1089 gs_prim_buffer_depth = 32;
1083 break; 1090 break;
@@ -1123,6 +1130,7 @@ static void r600_gfx_init(struct drm_device *dev,
1123 switch (dev_priv->flags & RADEON_FAMILY_MASK) { 1130 switch (dev_priv->flags & RADEON_FAMILY_MASK) {
1124 case CHIP_RV610: 1131 case CHIP_RV610:
1125 case CHIP_RS780: 1132 case CHIP_RS780:
1133 case CHIP_RS880:
1126 case CHIP_RV620: 1134 case CHIP_RV620:
1127 tc_cntl = R600_TC_L2_SIZE(8); 1135 tc_cntl = R600_TC_L2_SIZE(8);
1128 break; 1136 break;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index d61f2fc61df5..b1d945b8ed6c 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -64,6 +64,7 @@ extern int radeon_agpmode;
64extern int radeon_vram_limit; 64extern int radeon_vram_limit;
65extern int radeon_gart_size; 65extern int radeon_gart_size;
66extern int radeon_benchmarking; 66extern int radeon_benchmarking;
67extern int radeon_testing;
67extern int radeon_connector_table; 68extern int radeon_connector_table;
68 69
69/* 70/*
@@ -113,6 +114,7 @@ enum radeon_family {
113 CHIP_RV770, 114 CHIP_RV770,
114 CHIP_RV730, 115 CHIP_RV730,
115 CHIP_RV710, 116 CHIP_RV710,
117 CHIP_RS880,
116 CHIP_LAST, 118 CHIP_LAST,
117}; 119};
118 120
@@ -201,6 +203,14 @@ int radeon_fence_wait_last(struct radeon_device *rdev);
201struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence); 203struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence);
202void radeon_fence_unref(struct radeon_fence **fence); 204void radeon_fence_unref(struct radeon_fence **fence);
203 205
206/*
207 * Tiling registers
208 */
209struct radeon_surface_reg {
210 struct radeon_object *robj;
211};
212
213#define RADEON_GEM_MAX_SURFACES 8
204 214
205/* 215/*
206 * Radeon buffer. 216 * Radeon buffer.
@@ -213,6 +223,7 @@ struct radeon_object_list {
213 uint64_t gpu_offset; 223 uint64_t gpu_offset;
214 unsigned rdomain; 224 unsigned rdomain;
215 unsigned wdomain; 225 unsigned wdomain;
226 uint32_t tiling_flags;
216}; 227};
217 228
218int radeon_object_init(struct radeon_device *rdev); 229int radeon_object_init(struct radeon_device *rdev);
@@ -242,8 +253,15 @@ void radeon_object_list_clean(struct list_head *head);
242int radeon_object_fbdev_mmap(struct radeon_object *robj, 253int radeon_object_fbdev_mmap(struct radeon_object *robj,
243 struct vm_area_struct *vma); 254 struct vm_area_struct *vma);
244unsigned long radeon_object_size(struct radeon_object *robj); 255unsigned long radeon_object_size(struct radeon_object *robj);
245 256void radeon_object_clear_surface_reg(struct radeon_object *robj);
246 257int radeon_object_check_tiling(struct radeon_object *robj, bool has_moved,
258 bool force_drop);
259void radeon_object_set_tiling_flags(struct radeon_object *robj,
260 uint32_t tiling_flags, uint32_t pitch);
261void radeon_object_get_tiling_flags(struct radeon_object *robj, uint32_t *tiling_flags, uint32_t *pitch);
262void radeon_bo_move_notify(struct ttm_buffer_object *bo,
263 struct ttm_mem_reg *mem);
264void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
247/* 265/*
248 * GEM objects. 266 * GEM objects.
249 */ 267 */
@@ -315,8 +333,11 @@ struct radeon_mc {
315 unsigned gtt_location; 333 unsigned gtt_location;
316 unsigned gtt_size; 334 unsigned gtt_size;
317 unsigned vram_location; 335 unsigned vram_location;
318 unsigned vram_size; 336 /* for some chips with <= 32MB we need to lie
337 * about vram size near mc fb location */
338 unsigned mc_vram_size;
319 unsigned vram_width; 339 unsigned vram_width;
340 unsigned real_vram_size;
320 int vram_mtrr; 341 int vram_mtrr;
321 bool vram_is_ddr; 342 bool vram_is_ddr;
322}; 343};
@@ -474,6 +495,39 @@ struct radeon_wb {
474 uint64_t gpu_addr; 495 uint64_t gpu_addr;
475}; 496};
476 497
498/**
499 * struct radeon_pm - power management datas
500 * @max_bandwidth: maximum bandwidth the gpu has (MByte/s)
501 * @igp_sideport_mclk: sideport memory clock Mhz (rs690,rs740,rs780,rs880)
502 * @igp_system_mclk: system clock Mhz (rs690,rs740,rs780,rs880)
503 * @igp_ht_link_clk: ht link clock Mhz (rs690,rs740,rs780,rs880)
504 * @igp_ht_link_width: ht link width in bits (rs690,rs740,rs780,rs880)
505 * @k8_bandwidth: k8 bandwidth the gpu has (MByte/s) (IGP)
506 * @sideport_bandwidth: sideport bandwidth the gpu has (MByte/s) (IGP)
507 * @ht_bandwidth: ht bandwidth the gpu has (MByte/s) (IGP)
508 * @core_bandwidth: core GPU bandwidth the gpu has (MByte/s) (IGP)
509 * @sclk: GPU clock Mhz (core bandwith depends of this clock)
510 * @needed_bandwidth: current bandwidth needs
511 *
512 * It keeps track of various data needed to take powermanagement decision.
513 * Bandwith need is used to determine minimun clock of the GPU and memory.
514 * Equation between gpu/memory clock and available bandwidth is hw dependent
515 * (type of memory, bus size, efficiency, ...)
516 */
517struct radeon_pm {
518 fixed20_12 max_bandwidth;
519 fixed20_12 igp_sideport_mclk;
520 fixed20_12 igp_system_mclk;
521 fixed20_12 igp_ht_link_clk;
522 fixed20_12 igp_ht_link_width;
523 fixed20_12 k8_bandwidth;
524 fixed20_12 sideport_bandwidth;
525 fixed20_12 ht_bandwidth;
526 fixed20_12 core_bandwidth;
527 fixed20_12 sclk;
528 fixed20_12 needed_bandwidth;
529};
530
477 531
478/* 532/*
479 * Benchmarking 533 * Benchmarking
@@ -482,6 +536,12 @@ void radeon_benchmark(struct radeon_device *rdev);
482 536
483 537
484/* 538/*
539 * Testing
540 */
541void radeon_test_moves(struct radeon_device *rdev);
542
543
544/*
485 * Debugfs 545 * Debugfs
486 */ 546 */
487int radeon_debugfs_add_files(struct radeon_device *rdev, 547int radeon_debugfs_add_files(struct radeon_device *rdev,
@@ -535,6 +595,11 @@ struct radeon_asic {
535 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); 595 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
536 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); 596 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes);
537 void (*set_clock_gating)(struct radeon_device *rdev, int enable); 597 void (*set_clock_gating)(struct radeon_device *rdev, int enable);
598 int (*set_surface_reg)(struct radeon_device *rdev, int reg,
599 uint32_t tiling_flags, uint32_t pitch,
600 uint32_t offset, uint32_t obj_size);
601 int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
602 void (*bandwidth_update)(struct radeon_device *rdev);
538}; 603};
539 604
540union radeon_asic_config { 605union radeon_asic_config {
@@ -566,6 +631,10 @@ int radeon_gem_busy_ioctl(struct drm_device *dev, void *data,
566int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data, 631int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
567 struct drm_file *filp); 632 struct drm_file *filp);
568int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp); 633int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp);
634int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
635 struct drm_file *filp);
636int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
637 struct drm_file *filp);
569 638
570 639
571/* 640/*
@@ -594,8 +663,8 @@ struct radeon_device {
594 struct radeon_object *fbdev_robj; 663 struct radeon_object *fbdev_robj;
595 struct radeon_framebuffer *fbdev_rfb; 664 struct radeon_framebuffer *fbdev_rfb;
596 /* Register mmio */ 665 /* Register mmio */
597 unsigned long rmmio_base; 666 resource_size_t rmmio_base;
598 unsigned long rmmio_size; 667 resource_size_t rmmio_size;
599 void *rmmio; 668 void *rmmio;
600 radeon_rreg_t mm_rreg; 669 radeon_rreg_t mm_rreg;
601 radeon_wreg_t mm_wreg; 670 radeon_wreg_t mm_wreg;
@@ -619,11 +688,14 @@ struct radeon_device {
619 struct radeon_irq irq; 688 struct radeon_irq irq;
620 struct radeon_asic *asic; 689 struct radeon_asic *asic;
621 struct radeon_gem gem; 690 struct radeon_gem gem;
691 struct radeon_pm pm;
622 struct mutex cs_mutex; 692 struct mutex cs_mutex;
623 struct radeon_wb wb; 693 struct radeon_wb wb;
624 bool gpu_lockup; 694 bool gpu_lockup;
625 bool shutdown; 695 bool shutdown;
626 bool suspend; 696 bool suspend;
697 bool need_dma32;
698 struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
627}; 699};
628 700
629int radeon_device_init(struct radeon_device *rdev, 701int radeon_device_init(struct radeon_device *rdev,
@@ -670,6 +742,8 @@ void r100_pll_errata_after_index(struct radeon_device *rdev);
670/* 742/*
671 * ASICs helpers. 743 * ASICs helpers.
672 */ 744 */
745#define ASIC_IS_RN50(rdev) ((rdev->pdev->device == 0x515e) || \
746 (rdev->pdev->device == 0x5969))
673#define ASIC_IS_RV100(rdev) ((rdev->family == CHIP_RV100) || \ 747#define ASIC_IS_RV100(rdev) ((rdev->family == CHIP_RV100) || \
674 (rdev->family == CHIP_RV200) || \ 748 (rdev->family == CHIP_RV200) || \
675 (rdev->family == CHIP_RS100) || \ 749 (rdev->family == CHIP_RS100) || \
@@ -796,5 +870,8 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
796#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 870#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
797#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) 871#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l))
798#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) 872#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))
873#define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
874#define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
875#define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
799 876
800#endif 877#endif
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index e2e567395df8..9a75876e0c3b 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -71,6 +71,11 @@ int r100_copy_blit(struct radeon_device *rdev,
71 uint64_t dst_offset, 71 uint64_t dst_offset,
72 unsigned num_pages, 72 unsigned num_pages,
73 struct radeon_fence *fence); 73 struct radeon_fence *fence);
74int r100_set_surface_reg(struct radeon_device *rdev, int reg,
75 uint32_t tiling_flags, uint32_t pitch,
76 uint32_t offset, uint32_t obj_size);
77int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
78void r100_bandwidth_update(struct radeon_device *rdev);
74 79
75static struct radeon_asic r100_asic = { 80static struct radeon_asic r100_asic = {
76 .init = &r100_init, 81 .init = &r100_init,
@@ -100,6 +105,9 @@ static struct radeon_asic r100_asic = {
100 .set_memory_clock = NULL, 105 .set_memory_clock = NULL,
101 .set_pcie_lanes = NULL, 106 .set_pcie_lanes = NULL,
102 .set_clock_gating = &radeon_legacy_set_clock_gating, 107 .set_clock_gating = &radeon_legacy_set_clock_gating,
108 .set_surface_reg = r100_set_surface_reg,
109 .clear_surface_reg = r100_clear_surface_reg,
110 .bandwidth_update = &r100_bandwidth_update,
103}; 111};
104 112
105 113
@@ -128,6 +136,7 @@ int r300_copy_dma(struct radeon_device *rdev,
128 uint64_t dst_offset, 136 uint64_t dst_offset,
129 unsigned num_pages, 137 unsigned num_pages,
130 struct radeon_fence *fence); 138 struct radeon_fence *fence);
139
131static struct radeon_asic r300_asic = { 140static struct radeon_asic r300_asic = {
132 .init = &r300_init, 141 .init = &r300_init,
133 .errata = &r300_errata, 142 .errata = &r300_errata,
@@ -156,6 +165,9 @@ static struct radeon_asic r300_asic = {
156 .set_memory_clock = NULL, 165 .set_memory_clock = NULL,
157 .set_pcie_lanes = &rv370_set_pcie_lanes, 166 .set_pcie_lanes = &rv370_set_pcie_lanes,
158 .set_clock_gating = &radeon_legacy_set_clock_gating, 167 .set_clock_gating = &radeon_legacy_set_clock_gating,
168 .set_surface_reg = r100_set_surface_reg,
169 .clear_surface_reg = r100_clear_surface_reg,
170 .bandwidth_update = &r100_bandwidth_update,
159}; 171};
160 172
161/* 173/*
@@ -193,6 +205,9 @@ static struct radeon_asic r420_asic = {
193 .set_memory_clock = &radeon_atom_set_memory_clock, 205 .set_memory_clock = &radeon_atom_set_memory_clock,
194 .set_pcie_lanes = &rv370_set_pcie_lanes, 206 .set_pcie_lanes = &rv370_set_pcie_lanes,
195 .set_clock_gating = &radeon_atom_set_clock_gating, 207 .set_clock_gating = &radeon_atom_set_clock_gating,
208 .set_surface_reg = r100_set_surface_reg,
209 .clear_surface_reg = r100_clear_surface_reg,
210 .bandwidth_update = &r100_bandwidth_update,
196}; 211};
197 212
198 213
@@ -237,6 +252,9 @@ static struct radeon_asic rs400_asic = {
237 .set_memory_clock = NULL, 252 .set_memory_clock = NULL,
238 .set_pcie_lanes = NULL, 253 .set_pcie_lanes = NULL,
239 .set_clock_gating = &radeon_legacy_set_clock_gating, 254 .set_clock_gating = &radeon_legacy_set_clock_gating,
255 .set_surface_reg = r100_set_surface_reg,
256 .clear_surface_reg = r100_clear_surface_reg,
257 .bandwidth_update = &r100_bandwidth_update,
240}; 258};
241 259
242 260
@@ -254,6 +272,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev);
254int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr); 272int rs600_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr);
255uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); 273uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
256void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 274void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
275void rs600_bandwidth_update(struct radeon_device *rdev);
257static struct radeon_asic rs600_asic = { 276static struct radeon_asic rs600_asic = {
258 .init = &r300_init, 277 .init = &r300_init,
259 .errata = &rs600_errata, 278 .errata = &rs600_errata,
@@ -282,6 +301,7 @@ static struct radeon_asic rs600_asic = {
282 .set_memory_clock = &radeon_atom_set_memory_clock, 301 .set_memory_clock = &radeon_atom_set_memory_clock,
283 .set_pcie_lanes = NULL, 302 .set_pcie_lanes = NULL,
284 .set_clock_gating = &radeon_atom_set_clock_gating, 303 .set_clock_gating = &radeon_atom_set_clock_gating,
304 .bandwidth_update = &rs600_bandwidth_update,
285}; 305};
286 306
287 307
@@ -294,6 +314,7 @@ int rs690_mc_init(struct radeon_device *rdev);
294void rs690_mc_fini(struct radeon_device *rdev); 314void rs690_mc_fini(struct radeon_device *rdev);
295uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg); 315uint32_t rs690_mc_rreg(struct radeon_device *rdev, uint32_t reg);
296void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 316void rs690_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
317void rs690_bandwidth_update(struct radeon_device *rdev);
297static struct radeon_asic rs690_asic = { 318static struct radeon_asic rs690_asic = {
298 .init = &r300_init, 319 .init = &r300_init,
299 .errata = &rs690_errata, 320 .errata = &rs690_errata,
@@ -322,6 +343,9 @@ static struct radeon_asic rs690_asic = {
322 .set_memory_clock = &radeon_atom_set_memory_clock, 343 .set_memory_clock = &radeon_atom_set_memory_clock,
323 .set_pcie_lanes = NULL, 344 .set_pcie_lanes = NULL,
324 .set_clock_gating = &radeon_atom_set_clock_gating, 345 .set_clock_gating = &radeon_atom_set_clock_gating,
346 .set_surface_reg = r100_set_surface_reg,
347 .clear_surface_reg = r100_clear_surface_reg,
348 .bandwidth_update = &rs690_bandwidth_update,
325}; 349};
326 350
327 351
@@ -339,6 +363,7 @@ void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
339void rv515_ring_start(struct radeon_device *rdev); 363void rv515_ring_start(struct radeon_device *rdev);
340uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg); 364uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg);
341void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 365void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
366void rv515_bandwidth_update(struct radeon_device *rdev);
342static struct radeon_asic rv515_asic = { 367static struct radeon_asic rv515_asic = {
343 .init = &rv515_init, 368 .init = &rv515_init,
344 .errata = &rv515_errata, 369 .errata = &rv515_errata,
@@ -367,6 +392,9 @@ static struct radeon_asic rv515_asic = {
367 .set_memory_clock = &radeon_atom_set_memory_clock, 392 .set_memory_clock = &radeon_atom_set_memory_clock,
368 .set_pcie_lanes = &rv370_set_pcie_lanes, 393 .set_pcie_lanes = &rv370_set_pcie_lanes,
369 .set_clock_gating = &radeon_atom_set_clock_gating, 394 .set_clock_gating = &radeon_atom_set_clock_gating,
395 .set_surface_reg = r100_set_surface_reg,
396 .clear_surface_reg = r100_clear_surface_reg,
397 .bandwidth_update = &rv515_bandwidth_update,
370}; 398};
371 399
372 400
@@ -377,6 +405,7 @@ void r520_errata(struct radeon_device *rdev);
377void r520_vram_info(struct radeon_device *rdev); 405void r520_vram_info(struct radeon_device *rdev);
378int r520_mc_init(struct radeon_device *rdev); 406int r520_mc_init(struct radeon_device *rdev);
379void r520_mc_fini(struct radeon_device *rdev); 407void r520_mc_fini(struct radeon_device *rdev);
408void r520_bandwidth_update(struct radeon_device *rdev);
380static struct radeon_asic r520_asic = { 409static struct radeon_asic r520_asic = {
381 .init = &rv515_init, 410 .init = &rv515_init,
382 .errata = &r520_errata, 411 .errata = &r520_errata,
@@ -405,6 +434,9 @@ static struct radeon_asic r520_asic = {
405 .set_memory_clock = &radeon_atom_set_memory_clock, 434 .set_memory_clock = &radeon_atom_set_memory_clock,
406 .set_pcie_lanes = &rv370_set_pcie_lanes, 435 .set_pcie_lanes = &rv370_set_pcie_lanes,
407 .set_clock_gating = &radeon_atom_set_clock_gating, 436 .set_clock_gating = &radeon_atom_set_clock_gating,
437 .set_surface_reg = r100_set_surface_reg,
438 .clear_surface_reg = r100_clear_surface_reg,
439 .bandwidth_update = &r520_bandwidth_update,
408}; 440};
409 441
410/* 442/*
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 1f5a1a490984..fcfe5c02d744 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -103,7 +103,8 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_gpio(struct drm_device
103static bool radeon_atom_apply_quirks(struct drm_device *dev, 103static bool radeon_atom_apply_quirks(struct drm_device *dev,
104 uint32_t supported_device, 104 uint32_t supported_device,
105 int *connector_type, 105 int *connector_type,
106 struct radeon_i2c_bus_rec *i2c_bus) 106 struct radeon_i2c_bus_rec *i2c_bus,
107 uint8_t *line_mux)
107{ 108{
108 109
109 /* Asus M2A-VM HDMI board lists the DVI port as HDMI */ 110 /* Asus M2A-VM HDMI board lists the DVI port as HDMI */
@@ -127,8 +128,10 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
127 if ((dev->pdev->device == 0x5653) && 128 if ((dev->pdev->device == 0x5653) &&
128 (dev->pdev->subsystem_vendor == 0x1462) && 129 (dev->pdev->subsystem_vendor == 0x1462) &&
129 (dev->pdev->subsystem_device == 0x0291)) { 130 (dev->pdev->subsystem_device == 0x0291)) {
130 if (*connector_type == DRM_MODE_CONNECTOR_LVDS) 131 if (*connector_type == DRM_MODE_CONNECTOR_LVDS) {
131 i2c_bus->valid = false; 132 i2c_bus->valid = false;
133 *line_mux = 53;
134 }
132 } 135 }
133 136
134 /* Funky macbooks */ 137 /* Funky macbooks */
@@ -526,7 +529,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
526 529
527 if (!radeon_atom_apply_quirks 530 if (!radeon_atom_apply_quirks
528 (dev, (1 << i), &bios_connectors[i].connector_type, 531 (dev, (1 << i), &bios_connectors[i].connector_type,
529 &bios_connectors[i].ddc_bus)) 532 &bios_connectors[i].ddc_bus, &bios_connectors[i].line_mux))
530 continue; 533 continue;
531 534
532 bios_connectors[i].valid = true; 535 bios_connectors[i].valid = true;
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c
index c44403a2ca76..2e938f7496fb 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -63,7 +63,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
63 if (r) { 63 if (r) {
64 goto out_cleanup; 64 goto out_cleanup;
65 } 65 }
66 r = radeon_copy_dma(rdev, saddr, daddr, size >> 14, fence); 66 r = radeon_copy_dma(rdev, saddr, daddr, size / 4096, fence);
67 if (r) { 67 if (r) {
68 goto out_cleanup; 68 goto out_cleanup;
69 } 69 }
@@ -88,7 +88,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
88 if (r) { 88 if (r) {
89 goto out_cleanup; 89 goto out_cleanup;
90 } 90 }
91 r = radeon_copy_blit(rdev, saddr, daddr, size >> 14, fence); 91 r = radeon_copy_blit(rdev, saddr, daddr, size / 4096, fence);
92 if (r) { 92 if (r) {
93 goto out_cleanup; 93 goto out_cleanup;
94 } 94 }
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index b843f9bdfb14..a169067efc4e 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -127,17 +127,23 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
127 sizeof(struct drm_radeon_cs_chunk))) { 127 sizeof(struct drm_radeon_cs_chunk))) {
128 return -EFAULT; 128 return -EFAULT;
129 } 129 }
130 p->chunks[i].length_dw = user_chunk.length_dw;
131 p->chunks[i].kdata = NULL;
130 p->chunks[i].chunk_id = user_chunk.chunk_id; 132 p->chunks[i].chunk_id = user_chunk.chunk_id;
133
131 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) { 134 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_RELOCS) {
132 p->chunk_relocs_idx = i; 135 p->chunk_relocs_idx = i;
133 } 136 }
134 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) { 137 if (p->chunks[i].chunk_id == RADEON_CHUNK_ID_IB) {
135 p->chunk_ib_idx = i; 138 p->chunk_ib_idx = i;
139 /* zero length IB isn't useful */
140 if (p->chunks[i].length_dw == 0)
141 return -EINVAL;
136 } 142 }
143
137 p->chunks[i].length_dw = user_chunk.length_dw; 144 p->chunks[i].length_dw = user_chunk.length_dw;
138 cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data; 145 cdata = (uint32_t *)(unsigned long)user_chunk.chunk_data;
139 146
140 p->chunks[i].kdata = NULL;
141 size = p->chunks[i].length_dw * sizeof(uint32_t); 147 size = p->chunks[i].length_dw * sizeof(uint32_t);
142 p->chunks[i].kdata = kzalloc(size, GFP_KERNEL); 148 p->chunks[i].kdata = kzalloc(size, GFP_KERNEL);
143 if (p->chunks[i].kdata == NULL) { 149 if (p->chunks[i].kdata == NULL) {
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
index 5232441f119b..b13c79e38bc0 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -111,9 +111,11 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj,
111 111
112 if (ASIC_IS_AVIVO(rdev)) 112 if (ASIC_IS_AVIVO(rdev))
113 WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); 113 WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
114 else 114 else {
115 radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr;
115 /* offset is from DISP(2)_BASE_ADDRESS */ 116 /* offset is from DISP(2)_BASE_ADDRESS */
116 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, gpu_addr); 117 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset);
118 }
117} 119}
118 120
119int radeon_crtc_cursor_set(struct drm_crtc *crtc, 121int radeon_crtc_cursor_set(struct drm_crtc *crtc,
@@ -245,6 +247,9 @@ int radeon_crtc_cursor_move(struct drm_crtc *crtc,
245 (RADEON_CUR_LOCK 247 (RADEON_CUR_LOCK
246 | ((xorigin ? 0 : x) << 16) 248 | ((xorigin ? 0 : x) << 16)
247 | (yorigin ? 0 : y))); 249 | (yorigin ? 0 : y)));
250 /* offset is from DISP(2)_BASE_ADDRESS */
251 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, (radeon_crtc->legacy_cursor_offset +
252 (yorigin * 256)));
248 } 253 }
249 radeon_lock_cursor(crtc, false); 254 radeon_lock_cursor(crtc, false);
250 255
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index f97563db4e59..9ff6dcb97f9d 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -48,6 +48,8 @@ static void radeon_surface_init(struct radeon_device *rdev)
48 i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO), 48 i * (RADEON_SURFACE1_INFO - RADEON_SURFACE0_INFO),
49 0); 49 0);
50 } 50 }
51 /* enable surfaces */
52 WREG32(RADEON_SURFACE_CNTL, 0);
51 } 53 }
52} 54}
53 55
@@ -119,7 +121,7 @@ int radeon_mc_setup(struct radeon_device *rdev)
119 if (rdev->mc.vram_location != 0xFFFFFFFFUL) { 121 if (rdev->mc.vram_location != 0xFFFFFFFFUL) {
120 /* vram location was already setup try to put gtt after 122 /* vram location was already setup try to put gtt after
121 * if it fits */ 123 * if it fits */
122 tmp = rdev->mc.vram_location + rdev->mc.vram_size; 124 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size;
123 tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1); 125 tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1);
124 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { 126 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) {
125 rdev->mc.gtt_location = tmp; 127 rdev->mc.gtt_location = tmp;
@@ -134,13 +136,13 @@ int radeon_mc_setup(struct radeon_device *rdev)
134 } else if (rdev->mc.gtt_location != 0xFFFFFFFFUL) { 136 } else if (rdev->mc.gtt_location != 0xFFFFFFFFUL) {
135 /* gtt location was already setup try to put vram before 137 /* gtt location was already setup try to put vram before
136 * if it fits */ 138 * if it fits */
137 if (rdev->mc.vram_size < rdev->mc.gtt_location) { 139 if (rdev->mc.mc_vram_size < rdev->mc.gtt_location) {
138 rdev->mc.vram_location = 0; 140 rdev->mc.vram_location = 0;
139 } else { 141 } else {
140 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size; 142 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size;
141 tmp += (rdev->mc.vram_size - 1); 143 tmp += (rdev->mc.mc_vram_size - 1);
142 tmp &= ~(rdev->mc.vram_size - 1); 144 tmp &= ~(rdev->mc.mc_vram_size - 1);
143 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.vram_size) { 145 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.mc_vram_size) {
144 rdev->mc.vram_location = tmp; 146 rdev->mc.vram_location = tmp;
145 } else { 147 } else {
146 printk(KERN_ERR "[drm] vram too big to fit " 148 printk(KERN_ERR "[drm] vram too big to fit "
@@ -150,12 +152,16 @@ int radeon_mc_setup(struct radeon_device *rdev)
150 } 152 }
151 } else { 153 } else {
152 rdev->mc.vram_location = 0; 154 rdev->mc.vram_location = 0;
153 rdev->mc.gtt_location = rdev->mc.vram_size; 155 tmp = rdev->mc.mc_vram_size;
156 tmp = (tmp + rdev->mc.gtt_size - 1) & ~(rdev->mc.gtt_size - 1);
157 rdev->mc.gtt_location = tmp;
154 } 158 }
155 DRM_INFO("radeon: VRAM %uM\n", rdev->mc.vram_size >> 20); 159 DRM_INFO("radeon: VRAM %uM\n", rdev->mc.real_vram_size >> 20);
156 DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n", 160 DRM_INFO("radeon: VRAM from 0x%08X to 0x%08X\n",
157 rdev->mc.vram_location, 161 rdev->mc.vram_location,
158 rdev->mc.vram_location + rdev->mc.vram_size - 1); 162 rdev->mc.vram_location + rdev->mc.mc_vram_size - 1);
163 if (rdev->mc.real_vram_size != rdev->mc.mc_vram_size)
164 DRM_INFO("radeon: VRAM less than aperture workaround enabled\n");
159 DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20); 165 DRM_INFO("radeon: GTT %uM\n", rdev->mc.gtt_size >> 20);
160 DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n", 166 DRM_INFO("radeon: GTT from 0x%08X to 0x%08X\n",
161 rdev->mc.gtt_location, 167 rdev->mc.gtt_location,
@@ -450,6 +456,7 @@ int radeon_device_init(struct radeon_device *rdev,
450 uint32_t flags) 456 uint32_t flags)
451{ 457{
452 int r, ret; 458 int r, ret;
459 int dma_bits;
453 460
454 DRM_INFO("radeon: Initializing kernel modesetting.\n"); 461 DRM_INFO("radeon: Initializing kernel modesetting.\n");
455 rdev->shutdown = false; 462 rdev->shutdown = false;
@@ -492,8 +499,20 @@ int radeon_device_init(struct radeon_device *rdev,
492 return r; 499 return r;
493 } 500 }
494 501
495 /* Report DMA addressing limitation */ 502 /* set DMA mask + need_dma32 flags.
496 r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(32)); 503 * PCIE - can handle 40-bits.
504 * IGP - can handle 40-bits (in theory)
505 * AGP - generally dma32 is safest
506 * PCI - only dma32
507 */
508 rdev->need_dma32 = false;
509 if (rdev->flags & RADEON_IS_AGP)
510 rdev->need_dma32 = true;
511 if (rdev->flags & RADEON_IS_PCI)
512 rdev->need_dma32 = true;
513
514 dma_bits = rdev->need_dma32 ? 32 : 40;
515 r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits));
497 if (r) { 516 if (r) {
498 printk(KERN_WARNING "radeon: No suitable DMA available.\n"); 517 printk(KERN_WARNING "radeon: No suitable DMA available.\n");
499 } 518 }
@@ -546,27 +565,22 @@ int radeon_device_init(struct radeon_device *rdev,
546 radeon_combios_asic_init(rdev->ddev); 565 radeon_combios_asic_init(rdev->ddev);
547 } 566 }
548 } 567 }
568 /* Initialize clocks */
569 r = radeon_clocks_init(rdev);
570 if (r) {
571 return r;
572 }
549 /* Get vram informations */ 573 /* Get vram informations */
550 radeon_vram_info(rdev); 574 radeon_vram_info(rdev);
551 /* Device is severly broken if aper size > vram size. 575
552 * for RN50/M6/M7 - Novell bug 204882 ?
553 */
554 if (rdev->mc.vram_size < rdev->mc.aper_size) {
555 rdev->mc.aper_size = rdev->mc.vram_size;
556 }
557 /* Add an MTRR for the VRAM */ 576 /* Add an MTRR for the VRAM */
558 rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size, 577 rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
559 MTRR_TYPE_WRCOMB, 1); 578 MTRR_TYPE_WRCOMB, 1);
560 DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n", 579 DRM_INFO("Detected VRAM RAM=%uM, BAR=%uM\n",
561 rdev->mc.vram_size >> 20, 580 rdev->mc.real_vram_size >> 20,
562 (unsigned)rdev->mc.aper_size >> 20); 581 (unsigned)rdev->mc.aper_size >> 20);
563 DRM_INFO("RAM width %dbits %cDR\n", 582 DRM_INFO("RAM width %dbits %cDR\n",
564 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S'); 583 rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
565 /* Initialize clocks */
566 r = radeon_clocks_init(rdev);
567 if (r) {
568 return r;
569 }
570 /* Initialize memory controller (also test AGP) */ 584 /* Initialize memory controller (also test AGP) */
571 r = radeon_mc_init(rdev); 585 r = radeon_mc_init(rdev);
572 if (r) { 586 if (r) {
@@ -626,6 +640,9 @@ int radeon_device_init(struct radeon_device *rdev,
626 if (!ret) { 640 if (!ret) {
627 DRM_INFO("radeon: kernel modesetting successfully initialized.\n"); 641 DRM_INFO("radeon: kernel modesetting successfully initialized.\n");
628 } 642 }
643 if (radeon_testing) {
644 radeon_test_moves(rdev);
645 }
629 if (radeon_benchmarking) { 646 if (radeon_benchmarking) {
630 radeon_benchmark(rdev); 647 radeon_benchmark(rdev);
631 } 648 }
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 3efcf1a526be..a8fa1bb84cf7 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -187,6 +187,7 @@ static void radeon_crtc_init(struct drm_device *dev, int index)
187 187
188 drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256); 188 drm_mode_crtc_set_gamma_size(&radeon_crtc->base, 256);
189 radeon_crtc->crtc_id = index; 189 radeon_crtc->crtc_id = index;
190 rdev->mode_info.crtcs[index] = radeon_crtc;
190 191
191 radeon_crtc->mode_set.crtc = &radeon_crtc->base; 192 radeon_crtc->mode_set.crtc = &radeon_crtc->base;
192 radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1); 193 radeon_crtc->mode_set.connectors = (struct drm_connector **)(radeon_crtc + 1);
@@ -491,7 +492,11 @@ void radeon_compute_pll(struct radeon_pll *pll,
491 tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div; 492 tmp += (uint64_t)pll->reference_freq * 1000 * frac_feedback_div;
492 current_freq = radeon_div(tmp, ref_div * post_div); 493 current_freq = radeon_div(tmp, ref_div * post_div);
493 494
494 error = abs(current_freq - freq); 495 if (flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
496 error = freq - current_freq;
497 error = error < 0 ? 0xffffffff : error;
498 } else
499 error = abs(current_freq - freq);
495 vco_diff = abs(vco - best_vco); 500 vco_diff = abs(vco - best_vco);
496 501
497 if ((best_vco == 0 && error < best_error) || 502 if ((best_vco == 0 && error < best_error) ||
@@ -657,36 +662,51 @@ void radeon_modeset_fini(struct radeon_device *rdev)
657 } 662 }
658} 663}
659 664
660void radeon_init_disp_bandwidth(struct drm_device *dev) 665bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
666 struct drm_display_mode *mode,
667 struct drm_display_mode *adjusted_mode)
661{ 668{
662 struct radeon_device *rdev = dev->dev_private; 669 struct drm_device *dev = crtc->dev;
663 struct drm_display_mode *modes[2]; 670 struct drm_encoder *encoder;
664 int pixel_bytes[2]; 671 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
665 struct drm_crtc *crtc; 672 struct radeon_encoder *radeon_encoder;
666 673 bool first = true;
667 pixel_bytes[0] = pixel_bytes[1] = 0;
668 modes[0] = modes[1] = NULL;
669
670 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
671 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
672 674
673 if (crtc->enabled && crtc->fb) { 675 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
674 modes[radeon_crtc->crtc_id] = &crtc->mode; 676 radeon_encoder = to_radeon_encoder(encoder);
675 pixel_bytes[radeon_crtc->crtc_id] = crtc->fb->bits_per_pixel / 8; 677 if (encoder->crtc != crtc)
678 continue;
679 if (first) {
680 radeon_crtc->rmx_type = radeon_encoder->rmx_type;
681 radeon_crtc->devices = radeon_encoder->devices;
682 memcpy(&radeon_crtc->native_mode,
683 &radeon_encoder->native_mode,
684 sizeof(struct radeon_native_mode));
685 first = false;
686 } else {
687 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) {
688 /* WARNING: Right now this can't happen but
689 * in the future we need to check that scaling
690 * are consistent accross different encoder
691 * (ie all encoder can work with the same
692 * scaling).
693 */
694 DRM_ERROR("Scaling not consistent accross encoder.\n");
695 return false;
696 }
676 } 697 }
677 } 698 }
678 699 if (radeon_crtc->rmx_type != RMX_OFF) {
679 if (ASIC_IS_AVIVO(rdev)) { 700 fixed20_12 a, b;
680 radeon_init_disp_bw_avivo(dev, 701 a.full = rfixed_const(crtc->mode.vdisplay);
681 modes[0], 702 b.full = rfixed_const(radeon_crtc->native_mode.panel_xres);
682 pixel_bytes[0], 703 radeon_crtc->vsc.full = rfixed_div(a, b);
683 modes[1], 704 a.full = rfixed_const(crtc->mode.hdisplay);
684 pixel_bytes[1]); 705 b.full = rfixed_const(radeon_crtc->native_mode.panel_yres);
706 radeon_crtc->hsc.full = rfixed_div(a, b);
685 } else { 707 } else {
686 radeon_init_disp_bw_legacy(dev, 708 radeon_crtc->vsc.full = rfixed_const(1);
687 modes[0], 709 radeon_crtc->hsc.full = rfixed_const(1);
688 pixel_bytes[0],
689 modes[1],
690 pixel_bytes[1]);
691 } 710 }
711 return true;
692} 712}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index 84ba69f48784..0bd5879a4957 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -89,6 +89,7 @@ int radeon_agpmode = 0;
89int radeon_vram_limit = 0; 89int radeon_vram_limit = 0;
90int radeon_gart_size = 512; /* default gart size */ 90int radeon_gart_size = 512; /* default gart size */
91int radeon_benchmarking = 0; 91int radeon_benchmarking = 0;
92int radeon_testing = 0;
92int radeon_connector_table = 0; 93int radeon_connector_table = 0;
93#endif 94#endif
94 95
@@ -117,6 +118,9 @@ module_param_named(gartsize, radeon_gart_size, int, 0600);
117MODULE_PARM_DESC(benchmark, "Run benchmark"); 118MODULE_PARM_DESC(benchmark, "Run benchmark");
118module_param_named(benchmark, radeon_benchmarking, int, 0444); 119module_param_named(benchmark, radeon_benchmarking, int, 0444);
119 120
121MODULE_PARM_DESC(test, "Run tests");
122module_param_named(test, radeon_testing, int, 0444);
123
120MODULE_PARM_DESC(connector_table, "Force connector table"); 124MODULE_PARM_DESC(connector_table, "Force connector table");
121module_param_named(connector_table, radeon_connector_table, int, 0444); 125module_param_named(connector_table, radeon_connector_table, int, 0444);
122#endif 126#endif
@@ -314,6 +318,14 @@ static int __init radeon_init(void)
314 driver = &driver_old; 318 driver = &driver_old;
315 driver->num_ioctls = radeon_max_ioctl; 319 driver->num_ioctls = radeon_max_ioctl;
316#if defined(CONFIG_DRM_RADEON_KMS) 320#if defined(CONFIG_DRM_RADEON_KMS)
321#ifdef CONFIG_VGA_CONSOLE
322 if (vgacon_text_force() && radeon_modeset == -1) {
323 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
324 driver = &driver_old;
325 driver->driver_features &= ~DRIVER_MODESET;
326 radeon_modeset = 0;
327 }
328#endif
317 /* if enabled by default */ 329 /* if enabled by default */
318 if (radeon_modeset == -1) { 330 if (radeon_modeset == -1) {
319 DRM_INFO("radeon default to kernel modesetting.\n"); 331 DRM_INFO("radeon default to kernel modesetting.\n");
@@ -325,17 +337,8 @@ static int __init radeon_init(void)
325 driver->driver_features |= DRIVER_MODESET; 337 driver->driver_features |= DRIVER_MODESET;
326 driver->num_ioctls = radeon_max_kms_ioctl; 338 driver->num_ioctls = radeon_max_kms_ioctl;
327 } 339 }
328
329 /* if the vga console setting is enabled still 340 /* if the vga console setting is enabled still
330 * let modprobe override it */ 341 * let modprobe override it */
331#ifdef CONFIG_VGA_CONSOLE
332 if (vgacon_text_force() && radeon_modeset == -1) {
333 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
334 driver = &driver_old;
335 driver->driver_features &= ~DRIVER_MODESET;
336 radeon_modeset = 0;
337 }
338#endif
339#endif 342#endif
340 return drm_init(driver); 343 return drm_init(driver);
341} 344}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h
index 127d0456f628..3933f8216a34 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.h
+++ b/drivers/gpu/drm/radeon/radeon_drv.h
@@ -143,6 +143,7 @@ enum radeon_family {
143 CHIP_RV635, 143 CHIP_RV635,
144 CHIP_RV670, 144 CHIP_RV670,
145 CHIP_RS780, 145 CHIP_RS780,
146 CHIP_RS880,
146 CHIP_RV770, 147 CHIP_RV770,
147 CHIP_RV730, 148 CHIP_RV730,
148 CHIP_RV710, 149 CHIP_RV710,
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index c8ef0d14ffab..0a92706eac19 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -154,7 +154,6 @@ void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
154 154
155 if (mode->hdisplay < native_mode->panel_xres || 155 if (mode->hdisplay < native_mode->panel_xres ||
156 mode->vdisplay < native_mode->panel_yres) { 156 mode->vdisplay < native_mode->panel_yres) {
157 radeon_encoder->flags |= RADEON_USE_RMX;
158 if (ASIC_IS_AVIVO(rdev)) { 157 if (ASIC_IS_AVIVO(rdev)) {
159 adjusted_mode->hdisplay = native_mode->panel_xres; 158 adjusted_mode->hdisplay = native_mode->panel_xres;
160 adjusted_mode->vdisplay = native_mode->panel_yres; 159 adjusted_mode->vdisplay = native_mode->panel_yres;
@@ -197,15 +196,13 @@ void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
197 } 196 }
198} 197}
199 198
199
200static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, 200static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
201 struct drm_display_mode *mode, 201 struct drm_display_mode *mode,
202 struct drm_display_mode *adjusted_mode) 202 struct drm_display_mode *adjusted_mode)
203{ 203{
204
205 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 204 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
206 205
207 radeon_encoder->flags &= ~RADEON_USE_RMX;
208
209 drm_mode_set_crtcinfo(adjusted_mode, 0); 206 drm_mode_set_crtcinfo(adjusted_mode, 0);
210 207
211 if (radeon_encoder->rmx_type != RMX_OFF) 208 if (radeon_encoder->rmx_type != RMX_OFF)
@@ -808,234 +805,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
808 805
809} 806}
810 807
811static void atom_rv515_force_tv_scaler(struct radeon_device *rdev)
812{
813
814 WREG32(0x659C, 0x0);
815 WREG32(0x6594, 0x705);
816 WREG32(0x65A4, 0x10001);
817 WREG32(0x65D8, 0x0);
818 WREG32(0x65B0, 0x0);
819 WREG32(0x65C0, 0x0);
820 WREG32(0x65D4, 0x0);
821 WREG32(0x6578, 0x0);
822 WREG32(0x657C, 0x841880A8);
823 WREG32(0x6578, 0x1);
824 WREG32(0x657C, 0x84208680);
825 WREG32(0x6578, 0x2);
826 WREG32(0x657C, 0xBFF880B0);
827 WREG32(0x6578, 0x100);
828 WREG32(0x657C, 0x83D88088);
829 WREG32(0x6578, 0x101);
830 WREG32(0x657C, 0x84608680);
831 WREG32(0x6578, 0x102);
832 WREG32(0x657C, 0xBFF080D0);
833 WREG32(0x6578, 0x200);
834 WREG32(0x657C, 0x83988068);
835 WREG32(0x6578, 0x201);
836 WREG32(0x657C, 0x84A08680);
837 WREG32(0x6578, 0x202);
838 WREG32(0x657C, 0xBFF080F8);
839 WREG32(0x6578, 0x300);
840 WREG32(0x657C, 0x83588058);
841 WREG32(0x6578, 0x301);
842 WREG32(0x657C, 0x84E08660);
843 WREG32(0x6578, 0x302);
844 WREG32(0x657C, 0xBFF88120);
845 WREG32(0x6578, 0x400);
846 WREG32(0x657C, 0x83188040);
847 WREG32(0x6578, 0x401);
848 WREG32(0x657C, 0x85008660);
849 WREG32(0x6578, 0x402);
850 WREG32(0x657C, 0xBFF88150);
851 WREG32(0x6578, 0x500);
852 WREG32(0x657C, 0x82D88030);
853 WREG32(0x6578, 0x501);
854 WREG32(0x657C, 0x85408640);
855 WREG32(0x6578, 0x502);
856 WREG32(0x657C, 0xBFF88180);
857 WREG32(0x6578, 0x600);
858 WREG32(0x657C, 0x82A08018);
859 WREG32(0x6578, 0x601);
860 WREG32(0x657C, 0x85808620);
861 WREG32(0x6578, 0x602);
862 WREG32(0x657C, 0xBFF081B8);
863 WREG32(0x6578, 0x700);
864 WREG32(0x657C, 0x82608010);
865 WREG32(0x6578, 0x701);
866 WREG32(0x657C, 0x85A08600);
867 WREG32(0x6578, 0x702);
868 WREG32(0x657C, 0x800081F0);
869 WREG32(0x6578, 0x800);
870 WREG32(0x657C, 0x8228BFF8);
871 WREG32(0x6578, 0x801);
872 WREG32(0x657C, 0x85E085E0);
873 WREG32(0x6578, 0x802);
874 WREG32(0x657C, 0xBFF88228);
875 WREG32(0x6578, 0x10000);
876 WREG32(0x657C, 0x82A8BF00);
877 WREG32(0x6578, 0x10001);
878 WREG32(0x657C, 0x82A08CC0);
879 WREG32(0x6578, 0x10002);
880 WREG32(0x657C, 0x8008BEF8);
881 WREG32(0x6578, 0x10100);
882 WREG32(0x657C, 0x81F0BF28);
883 WREG32(0x6578, 0x10101);
884 WREG32(0x657C, 0x83608CA0);
885 WREG32(0x6578, 0x10102);
886 WREG32(0x657C, 0x8018BED0);
887 WREG32(0x6578, 0x10200);
888 WREG32(0x657C, 0x8148BF38);
889 WREG32(0x6578, 0x10201);
890 WREG32(0x657C, 0x84408C80);
891 WREG32(0x6578, 0x10202);
892 WREG32(0x657C, 0x8008BEB8);
893 WREG32(0x6578, 0x10300);
894 WREG32(0x657C, 0x80B0BF78);
895 WREG32(0x6578, 0x10301);
896 WREG32(0x657C, 0x85008C20);
897 WREG32(0x6578, 0x10302);
898 WREG32(0x657C, 0x8020BEA0);
899 WREG32(0x6578, 0x10400);
900 WREG32(0x657C, 0x8028BF90);
901 WREG32(0x6578, 0x10401);
902 WREG32(0x657C, 0x85E08BC0);
903 WREG32(0x6578, 0x10402);
904 WREG32(0x657C, 0x8018BE90);
905 WREG32(0x6578, 0x10500);
906 WREG32(0x657C, 0xBFB8BFB0);
907 WREG32(0x6578, 0x10501);
908 WREG32(0x657C, 0x86C08B40);
909 WREG32(0x6578, 0x10502);
910 WREG32(0x657C, 0x8010BE90);
911 WREG32(0x6578, 0x10600);
912 WREG32(0x657C, 0xBF58BFC8);
913 WREG32(0x6578, 0x10601);
914 WREG32(0x657C, 0x87A08AA0);
915 WREG32(0x6578, 0x10602);
916 WREG32(0x657C, 0x8010BE98);
917 WREG32(0x6578, 0x10700);
918 WREG32(0x657C, 0xBF10BFF0);
919 WREG32(0x6578, 0x10701);
920 WREG32(0x657C, 0x886089E0);
921 WREG32(0x6578, 0x10702);
922 WREG32(0x657C, 0x8018BEB0);
923 WREG32(0x6578, 0x10800);
924 WREG32(0x657C, 0xBED8BFE8);
925 WREG32(0x6578, 0x10801);
926 WREG32(0x657C, 0x89408940);
927 WREG32(0x6578, 0x10802);
928 WREG32(0x657C, 0xBFE8BED8);
929 WREG32(0x6578, 0x20000);
930 WREG32(0x657C, 0x80008000);
931 WREG32(0x6578, 0x20001);
932 WREG32(0x657C, 0x90008000);
933 WREG32(0x6578, 0x20002);
934 WREG32(0x657C, 0x80008000);
935 WREG32(0x6578, 0x20003);
936 WREG32(0x657C, 0x80008000);
937 WREG32(0x6578, 0x20100);
938 WREG32(0x657C, 0x80108000);
939 WREG32(0x6578, 0x20101);
940 WREG32(0x657C, 0x8FE0BF70);
941 WREG32(0x6578, 0x20102);
942 WREG32(0x657C, 0xBFE880C0);
943 WREG32(0x6578, 0x20103);
944 WREG32(0x657C, 0x80008000);
945 WREG32(0x6578, 0x20200);
946 WREG32(0x657C, 0x8018BFF8);
947 WREG32(0x6578, 0x20201);
948 WREG32(0x657C, 0x8F80BF08);
949 WREG32(0x6578, 0x20202);
950 WREG32(0x657C, 0xBFD081A0);
951 WREG32(0x6578, 0x20203);
952 WREG32(0x657C, 0xBFF88000);
953 WREG32(0x6578, 0x20300);
954 WREG32(0x657C, 0x80188000);
955 WREG32(0x6578, 0x20301);
956 WREG32(0x657C, 0x8EE0BEC0);
957 WREG32(0x6578, 0x20302);
958 WREG32(0x657C, 0xBFB082A0);
959 WREG32(0x6578, 0x20303);
960 WREG32(0x657C, 0x80008000);
961 WREG32(0x6578, 0x20400);
962 WREG32(0x657C, 0x80188000);
963 WREG32(0x6578, 0x20401);
964 WREG32(0x657C, 0x8E00BEA0);
965 WREG32(0x6578, 0x20402);
966 WREG32(0x657C, 0xBF8883C0);
967 WREG32(0x6578, 0x20403);
968 WREG32(0x657C, 0x80008000);
969 WREG32(0x6578, 0x20500);
970 WREG32(0x657C, 0x80188000);
971 WREG32(0x6578, 0x20501);
972 WREG32(0x657C, 0x8D00BE90);
973 WREG32(0x6578, 0x20502);
974 WREG32(0x657C, 0xBF588500);
975 WREG32(0x6578, 0x20503);
976 WREG32(0x657C, 0x80008008);
977 WREG32(0x6578, 0x20600);
978 WREG32(0x657C, 0x80188000);
979 WREG32(0x6578, 0x20601);
980 WREG32(0x657C, 0x8BC0BE98);
981 WREG32(0x6578, 0x20602);
982 WREG32(0x657C, 0xBF308660);
983 WREG32(0x6578, 0x20603);
984 WREG32(0x657C, 0x80008008);
985 WREG32(0x6578, 0x20700);
986 WREG32(0x657C, 0x80108000);
987 WREG32(0x6578, 0x20701);
988 WREG32(0x657C, 0x8A80BEB0);
989 WREG32(0x6578, 0x20702);
990 WREG32(0x657C, 0xBF0087C0);
991 WREG32(0x6578, 0x20703);
992 WREG32(0x657C, 0x80008008);
993 WREG32(0x6578, 0x20800);
994 WREG32(0x657C, 0x80108000);
995 WREG32(0x6578, 0x20801);
996 WREG32(0x657C, 0x8920BED0);
997 WREG32(0x6578, 0x20802);
998 WREG32(0x657C, 0xBED08920);
999 WREG32(0x6578, 0x20803);
1000 WREG32(0x657C, 0x80008010);
1001 WREG32(0x6578, 0x30000);
1002 WREG32(0x657C, 0x90008000);
1003 WREG32(0x6578, 0x30001);
1004 WREG32(0x657C, 0x80008000);
1005 WREG32(0x6578, 0x30100);
1006 WREG32(0x657C, 0x8FE0BF90);
1007 WREG32(0x6578, 0x30101);
1008 WREG32(0x657C, 0xBFF880A0);
1009 WREG32(0x6578, 0x30200);
1010 WREG32(0x657C, 0x8F60BF40);
1011 WREG32(0x6578, 0x30201);
1012 WREG32(0x657C, 0xBFE88180);
1013 WREG32(0x6578, 0x30300);
1014 WREG32(0x657C, 0x8EC0BF00);
1015 WREG32(0x6578, 0x30301);
1016 WREG32(0x657C, 0xBFC88280);
1017 WREG32(0x6578, 0x30400);
1018 WREG32(0x657C, 0x8DE0BEE0);
1019 WREG32(0x6578, 0x30401);
1020 WREG32(0x657C, 0xBFA083A0);
1021 WREG32(0x6578, 0x30500);
1022 WREG32(0x657C, 0x8CE0BED0);
1023 WREG32(0x6578, 0x30501);
1024 WREG32(0x657C, 0xBF7884E0);
1025 WREG32(0x6578, 0x30600);
1026 WREG32(0x657C, 0x8BA0BED8);
1027 WREG32(0x6578, 0x30601);
1028 WREG32(0x657C, 0xBF508640);
1029 WREG32(0x6578, 0x30700);
1030 WREG32(0x657C, 0x8A60BEE8);
1031 WREG32(0x6578, 0x30701);
1032 WREG32(0x657C, 0xBF2087A0);
1033 WREG32(0x6578, 0x30800);
1034 WREG32(0x657C, 0x8900BF00);
1035 WREG32(0x6578, 0x30801);
1036 WREG32(0x657C, 0xBF008900);
1037}
1038
1039static void 808static void
1040atombios_yuv_setup(struct drm_encoder *encoder, bool enable) 809atombios_yuv_setup(struct drm_encoder *encoder, bool enable)
1041{ 810{
@@ -1074,129 +843,6 @@ atombios_yuv_setup(struct drm_encoder *encoder, bool enable)
1074} 843}
1075 844
1076static void 845static void
1077atombios_overscan_setup(struct drm_encoder *encoder,
1078 struct drm_display_mode *mode,
1079 struct drm_display_mode *adjusted_mode)
1080{
1081 struct drm_device *dev = encoder->dev;
1082 struct radeon_device *rdev = dev->dev_private;
1083 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1084 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1085 SET_CRTC_OVERSCAN_PS_ALLOCATION args;
1086 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_OverScan);
1087
1088 memset(&args, 0, sizeof(args));
1089
1090 args.usOverscanRight = 0;
1091 args.usOverscanLeft = 0;
1092 args.usOverscanBottom = 0;
1093 args.usOverscanTop = 0;
1094 args.ucCRTC = radeon_crtc->crtc_id;
1095
1096 if (radeon_encoder->flags & RADEON_USE_RMX) {
1097 if (radeon_encoder->rmx_type == RMX_FULL) {
1098 args.usOverscanRight = 0;
1099 args.usOverscanLeft = 0;
1100 args.usOverscanBottom = 0;
1101 args.usOverscanTop = 0;
1102 } else if (radeon_encoder->rmx_type == RMX_CENTER) {
1103 args.usOverscanTop = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2;
1104 args.usOverscanBottom = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2;
1105 args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2;
1106 args.usOverscanRight = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2;
1107 } else if (radeon_encoder->rmx_type == RMX_ASPECT) {
1108 int a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay;
1109 int a2 = adjusted_mode->crtc_vdisplay * mode->crtc_hdisplay;
1110
1111 if (a1 > a2) {
1112 args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2;
1113 args.usOverscanRight = (adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2;
1114 } else if (a2 > a1) {
1115 args.usOverscanLeft = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2;
1116 args.usOverscanRight = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2;
1117 }
1118 }
1119 }
1120
1121 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1122
1123}
1124
1125static void
1126atombios_scaler_setup(struct drm_encoder *encoder)
1127{
1128 struct drm_device *dev = encoder->dev;
1129 struct radeon_device *rdev = dev->dev_private;
1130 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1131 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
1132 ENABLE_SCALER_PS_ALLOCATION args;
1133 int index = GetIndexIntoMasterTable(COMMAND, EnableScaler);
1134 /* fixme - fill in enc_priv for atom dac */
1135 enum radeon_tv_std tv_std = TV_STD_NTSC;
1136
1137 if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id)
1138 return;
1139
1140 memset(&args, 0, sizeof(args));
1141
1142 args.ucScaler = radeon_crtc->crtc_id;
1143
1144 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
1145 switch (tv_std) {
1146 case TV_STD_NTSC:
1147 default:
1148 args.ucTVStandard = ATOM_TV_NTSC;
1149 break;
1150 case TV_STD_PAL:
1151 args.ucTVStandard = ATOM_TV_PAL;
1152 break;
1153 case TV_STD_PAL_M:
1154 args.ucTVStandard = ATOM_TV_PALM;
1155 break;
1156 case TV_STD_PAL_60:
1157 args.ucTVStandard = ATOM_TV_PAL60;
1158 break;
1159 case TV_STD_NTSC_J:
1160 args.ucTVStandard = ATOM_TV_NTSCJ;
1161 break;
1162 case TV_STD_SCART_PAL:
1163 args.ucTVStandard = ATOM_TV_PAL; /* ??? */
1164 break;
1165 case TV_STD_SECAM:
1166 args.ucTVStandard = ATOM_TV_SECAM;
1167 break;
1168 case TV_STD_PAL_CN:
1169 args.ucTVStandard = ATOM_TV_PALCN;
1170 break;
1171 }
1172 args.ucEnable = SCALER_ENABLE_MULTITAP_MODE;
1173 } else if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT)) {
1174 args.ucTVStandard = ATOM_TV_CV;
1175 args.ucEnable = SCALER_ENABLE_MULTITAP_MODE;
1176 } else if (radeon_encoder->flags & RADEON_USE_RMX) {
1177 if (radeon_encoder->rmx_type == RMX_FULL)
1178 args.ucEnable = ATOM_SCALER_EXPANSION;
1179 else if (radeon_encoder->rmx_type == RMX_CENTER)
1180 args.ucEnable = ATOM_SCALER_CENTER;
1181 else if (radeon_encoder->rmx_type == RMX_ASPECT)
1182 args.ucEnable = ATOM_SCALER_EXPANSION;
1183 } else {
1184 if (ASIC_IS_AVIVO(rdev))
1185 args.ucEnable = ATOM_SCALER_DISABLE;
1186 else
1187 args.ucEnable = ATOM_SCALER_CENTER;
1188 }
1189
1190 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1191
1192 if (radeon_encoder->devices & (ATOM_DEVICE_CV_SUPPORT | ATOM_DEVICE_TV_SUPPORT)
1193 && rdev->family >= CHIP_RV515 && rdev->family <= CHIP_RV570) {
1194 atom_rv515_force_tv_scaler(rdev);
1195 }
1196
1197}
1198
1199static void
1200radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) 846radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1201{ 847{
1202 struct drm_device *dev = encoder->dev; 848 struct drm_device *dev = encoder->dev;
@@ -1448,8 +1094,6 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1448 radeon_encoder->pixel_clock = adjusted_mode->clock; 1094 radeon_encoder->pixel_clock = adjusted_mode->clock;
1449 1095
1450 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); 1096 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
1451 atombios_overscan_setup(encoder, mode, adjusted_mode);
1452 atombios_scaler_setup(encoder);
1453 atombios_set_encoder_crtc_source(encoder); 1097 atombios_set_encoder_crtc_source(encoder);
1454 1098
1455 if (ASIC_IS_AVIVO(rdev)) { 1099 if (ASIC_IS_AVIVO(rdev)) {
@@ -1667,6 +1311,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su
1667 1311
1668 radeon_encoder->encoder_id = encoder_id; 1312 radeon_encoder->encoder_id = encoder_id;
1669 radeon_encoder->devices = supported_device; 1313 radeon_encoder->devices = supported_device;
1314 radeon_encoder->rmx_type = RMX_OFF;
1670 1315
1671 switch (radeon_encoder->encoder_id) { 1316 switch (radeon_encoder->encoder_id) {
1672 case ENCODER_OBJECT_ID_INTERNAL_LVDS: 1317 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c
index 9e8f191eb64a..3206c0ad7b6c 100644
--- a/drivers/gpu/drm/radeon/radeon_fb.c
+++ b/drivers/gpu/drm/radeon/radeon_fb.c
@@ -101,9 +101,10 @@ static int radeonfb_setcolreg(unsigned regno,
101 break; 101 break;
102 case 24: 102 case 24:
103 case 32: 103 case 32:
104 fb->pseudo_palette[regno] = ((red & 0xff00) << 8) | 104 fb->pseudo_palette[regno] =
105 (green & 0xff00) | 105 (((red >> 8) & 0xff) << info->var.red.offset) |
106 ((blue & 0xff00) >> 8); 106 (((green >> 8) & 0xff) << info->var.green.offset) |
107 (((blue >> 8) & 0xff) << info->var.blue.offset);
107 break; 108 break;
108 } 109 }
109 } 110 }
@@ -154,6 +155,7 @@ static int radeonfb_check_var(struct fb_var_screeninfo *var,
154 var->transp.length = 0; 155 var->transp.length = 0;
155 var->transp.offset = 0; 156 var->transp.offset = 0;
156 break; 157 break;
158#ifdef __LITTLE_ENDIAN
157 case 15: 159 case 15:
158 var->red.offset = 10; 160 var->red.offset = 10;
159 var->green.offset = 5; 161 var->green.offset = 5;
@@ -194,6 +196,28 @@ static int radeonfb_check_var(struct fb_var_screeninfo *var,
194 var->transp.length = 8; 196 var->transp.length = 8;
195 var->transp.offset = 24; 197 var->transp.offset = 24;
196 break; 198 break;
199#else
200 case 24:
201 var->red.offset = 8;
202 var->green.offset = 16;
203 var->blue.offset = 24;
204 var->red.length = 8;
205 var->green.length = 8;
206 var->blue.length = 8;
207 var->transp.length = 0;
208 var->transp.offset = 0;
209 break;
210 case 32:
211 var->red.offset = 8;
212 var->green.offset = 16;
213 var->blue.offset = 24;
214 var->red.length = 8;
215 var->green.length = 8;
216 var->blue.length = 8;
217 var->transp.length = 8;
218 var->transp.offset = 0;
219 break;
220#endif
197 default: 221 default:
198 return -EINVAL; 222 return -EINVAL;
199 } 223 }
@@ -447,10 +471,10 @@ static struct notifier_block paniced = {
447 .notifier_call = radeonfb_panic, 471 .notifier_call = radeonfb_panic,
448}; 472};
449 473
450static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp) 474static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
451{ 475{
452 int aligned = width; 476 int aligned = width;
453 int align_large = (ASIC_IS_AVIVO(rdev)); 477 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
454 int pitch_mask = 0; 478 int pitch_mask = 0;
455 479
456 switch (bpp / 8) { 480 switch (bpp / 8) {
@@ -488,12 +512,13 @@ int radeonfb_create(struct radeon_device *rdev,
488 u64 fb_gpuaddr; 512 u64 fb_gpuaddr;
489 void *fbptr = NULL; 513 void *fbptr = NULL;
490 unsigned long tmp; 514 unsigned long tmp;
515 bool fb_tiled = false; /* useful for testing */
491 516
492 mode_cmd.width = surface_width; 517 mode_cmd.width = surface_width;
493 mode_cmd.height = surface_height; 518 mode_cmd.height = surface_height;
494 mode_cmd.bpp = 32; 519 mode_cmd.bpp = 32;
495 /* need to align pitch with crtc limits */ 520 /* need to align pitch with crtc limits */
496 mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp) * ((mode_cmd.bpp + 1) / 8); 521 mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
497 mode_cmd.depth = 24; 522 mode_cmd.depth = 24;
498 523
499 size = mode_cmd.pitch * mode_cmd.height; 524 size = mode_cmd.pitch * mode_cmd.height;
@@ -511,6 +536,8 @@ int radeonfb_create(struct radeon_device *rdev,
511 } 536 }
512 robj = gobj->driver_private; 537 robj = gobj->driver_private;
513 538
539 if (fb_tiled)
540 radeon_object_set_tiling_flags(robj, RADEON_TILING_MACRO|RADEON_TILING_SURFACE, mode_cmd.pitch);
514 mutex_lock(&rdev->ddev->struct_mutex); 541 mutex_lock(&rdev->ddev->struct_mutex);
515 fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj); 542 fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
516 if (fb == NULL) { 543 if (fb == NULL) {
@@ -539,6 +566,9 @@ int radeonfb_create(struct radeon_device *rdev,
539 } 566 }
540 rfbdev = info->par; 567 rfbdev = info->par;
541 568
569 if (fb_tiled)
570 radeon_object_check_tiling(robj, 0, 0);
571
542 ret = radeon_object_kmap(robj, &fbptr); 572 ret = radeon_object_kmap(robj, &fbptr);
543 if (ret) { 573 if (ret) {
544 goto out_unref; 574 goto out_unref;
@@ -572,6 +602,11 @@ int radeonfb_create(struct radeon_device *rdev,
572 info->var.width = -1; 602 info->var.width = -1;
573 info->var.xres = fb_width; 603 info->var.xres = fb_width;
574 info->var.yres = fb_height; 604 info->var.yres = fb_height;
605
606 /* setup aperture base/size for vesafb takeover */
607 info->aperture_base = rdev->ddev->mode_config.fb_base;
608 info->aperture_size = rdev->mc.real_vram_size;
609
575 info->fix.mmio_start = 0; 610 info->fix.mmio_start = 0;
576 info->fix.mmio_len = 0; 611 info->fix.mmio_len = 0;
577 info->pixmap.size = 64*1024; 612 info->pixmap.size = 64*1024;
@@ -600,6 +635,7 @@ int radeonfb_create(struct radeon_device *rdev,
600 info->var.transp.offset = 0; 635 info->var.transp.offset = 0;
601 info->var.transp.length = 0; 636 info->var.transp.length = 0;
602 break; 637 break;
638#ifdef __LITTLE_ENDIAN
603 case 15: 639 case 15:
604 info->var.red.offset = 10; 640 info->var.red.offset = 10;
605 info->var.green.offset = 5; 641 info->var.green.offset = 5;
@@ -639,7 +675,29 @@ int radeonfb_create(struct radeon_device *rdev,
639 info->var.transp.offset = 24; 675 info->var.transp.offset = 24;
640 info->var.transp.length = 8; 676 info->var.transp.length = 8;
641 break; 677 break;
678#else
679 case 24:
680 info->var.red.offset = 8;
681 info->var.green.offset = 16;
682 info->var.blue.offset = 24;
683 info->var.red.length = 8;
684 info->var.green.length = 8;
685 info->var.blue.length = 8;
686 info->var.transp.offset = 0;
687 info->var.transp.length = 0;
688 break;
689 case 32:
690 info->var.red.offset = 8;
691 info->var.green.offset = 16;
692 info->var.blue.offset = 24;
693 info->var.red.length = 8;
694 info->var.green.length = 8;
695 info->var.blue.length = 8;
696 info->var.transp.offset = 0;
697 info->var.transp.length = 8;
698 break;
642 default: 699 default:
700#endif
643 break; 701 break;
644 } 702 }
645 703
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 96afbf5ae2ad..b4e48dd2e859 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -195,7 +195,7 @@ retry:
195 r = wait_event_interruptible_timeout(rdev->fence_drv.queue, 195 r = wait_event_interruptible_timeout(rdev->fence_drv.queue,
196 radeon_fence_signaled(fence), timeout); 196 radeon_fence_signaled(fence), timeout);
197 if (unlikely(r == -ERESTARTSYS)) { 197 if (unlikely(r == -ERESTARTSYS)) {
198 return -ERESTART; 198 return -EBUSY;
199 } 199 }
200 } else { 200 } else {
201 r = wait_event_timeout(rdev->fence_drv.queue, 201 r = wait_event_timeout(rdev->fence_drv.queue,
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index d343a15316ec..2977539880fb 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -177,7 +177,7 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
177 return -ENOMEM; 177 return -ENOMEM;
178 } 178 }
179 rdev->gart.pages[p] = pagelist[i]; 179 rdev->gart.pages[p] = pagelist[i];
180 page_base = (uint32_t)rdev->gart.pages_addr[p]; 180 page_base = rdev->gart.pages_addr[p];
181 for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { 181 for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) {
182 radeon_gart_set_page(rdev, t, page_base); 182 radeon_gart_set_page(rdev, t, page_base);
183 page_base += 4096; 183 page_base += 4096;
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index eb516034235d..cded5180c752 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -157,9 +157,9 @@ int radeon_gem_info_ioctl(struct drm_device *dev, void *data,
157 struct radeon_device *rdev = dev->dev_private; 157 struct radeon_device *rdev = dev->dev_private;
158 struct drm_radeon_gem_info *args = data; 158 struct drm_radeon_gem_info *args = data;
159 159
160 args->vram_size = rdev->mc.vram_size; 160 args->vram_size = rdev->mc.real_vram_size;
161 /* FIXME: report somethings that makes sense */ 161 /* FIXME: report somethings that makes sense */
162 args->vram_visible = rdev->mc.vram_size - (4 * 1024 * 1024); 162 args->vram_visible = rdev->mc.real_vram_size - (4 * 1024 * 1024);
163 args->gart_size = rdev->mc.gtt_size; 163 args->gart_size = rdev->mc.gtt_size;
164 return 0; 164 return 0;
165} 165}
@@ -285,3 +285,44 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
285 mutex_unlock(&dev->struct_mutex); 285 mutex_unlock(&dev->struct_mutex);
286 return r; 286 return r;
287} 287}
288
289int radeon_gem_set_tiling_ioctl(struct drm_device *dev, void *data,
290 struct drm_file *filp)
291{
292 struct drm_radeon_gem_set_tiling *args = data;
293 struct drm_gem_object *gobj;
294 struct radeon_object *robj;
295 int r = 0;
296
297 DRM_DEBUG("%d \n", args->handle);
298 gobj = drm_gem_object_lookup(dev, filp, args->handle);
299 if (gobj == NULL)
300 return -EINVAL;
301 robj = gobj->driver_private;
302 radeon_object_set_tiling_flags(robj, args->tiling_flags, args->pitch);
303 mutex_lock(&dev->struct_mutex);
304 drm_gem_object_unreference(gobj);
305 mutex_unlock(&dev->struct_mutex);
306 return r;
307}
308
309int radeon_gem_get_tiling_ioctl(struct drm_device *dev, void *data,
310 struct drm_file *filp)
311{
312 struct drm_radeon_gem_get_tiling *args = data;
313 struct drm_gem_object *gobj;
314 struct radeon_object *robj;
315 int r = 0;
316
317 DRM_DEBUG("\n");
318 gobj = drm_gem_object_lookup(dev, filp, args->handle);
319 if (gobj == NULL)
320 return -EINVAL;
321 robj = gobj->driver_private;
322 radeon_object_get_tiling_flags(robj, &args->tiling_flags,
323 &args->pitch);
324 mutex_lock(&dev->struct_mutex);
325 drm_gem_object_unreference(gobj);
326 mutex_unlock(&dev->struct_mutex);
327 return r;
328}
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 4612a7c146d1..3357110e30ce 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -58,6 +58,8 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
58 if (r) { 58 if (r) {
59 DRM_ERROR("Failed to initialize radeon, disabling IOCTL\n"); 59 DRM_ERROR("Failed to initialize radeon, disabling IOCTL\n");
60 radeon_device_fini(rdev); 60 radeon_device_fini(rdev);
61 kfree(rdev);
62 dev->dev_private = NULL;
61 return r; 63 return r;
62 } 64 }
63 return 0; 65 return 0;
@@ -291,5 +293,7 @@ struct drm_ioctl_desc radeon_ioctls_kms[] = {
291 DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH), 293 DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH),
292 DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH), 294 DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH),
293 DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH), 295 DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH),
296 DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH),
297 DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH),
294}; 298};
295int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); 299int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms);
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 8086ecf7f03d..7d06dc98a42a 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -29,6 +29,171 @@
29#include "radeon_fixed.h" 29#include "radeon_fixed.h"
30#include "radeon.h" 30#include "radeon.h"
31 31
32static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
33 struct drm_display_mode *mode,
34 struct drm_display_mode *adjusted_mode)
35{
36 struct drm_device *dev = crtc->dev;
37 struct radeon_device *rdev = dev->dev_private;
38 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
39 int xres = mode->hdisplay;
40 int yres = mode->vdisplay;
41 bool hscale = true, vscale = true;
42 int hsync_wid;
43 int vsync_wid;
44 int hsync_start;
45 int blank_width;
46 u32 scale, inc, crtc_more_cntl;
47 u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active;
48 u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp;
49 u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp;
50 struct radeon_native_mode *native_mode = &radeon_crtc->native_mode;
51
52 fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) &
53 (RADEON_VERT_STRETCH_RESERVED |
54 RADEON_VERT_AUTO_RATIO_INC);
55 fp_horz_stretch = RREG32(RADEON_FP_HORZ_STRETCH) &
56 (RADEON_HORZ_FP_LOOP_STRETCH |
57 RADEON_HORZ_AUTO_RATIO_INC);
58
59 crtc_more_cntl = 0;
60 if ((rdev->family == CHIP_RS100) ||
61 (rdev->family == CHIP_RS200)) {
62 /* This is to workaround the asic bug for RMX, some versions
63 of BIOS dosen't have this register initialized correctly. */
64 crtc_more_cntl |= RADEON_CRTC_H_CUTOFF_ACTIVE_EN;
65 }
66
67
68 fp_crtc_h_total_disp = ((((mode->crtc_htotal / 8) - 1) & 0x3ff)
69 | ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16));
70
71 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
72 if (!hsync_wid)
73 hsync_wid = 1;
74 hsync_start = mode->crtc_hsync_start - 8;
75
76 fp_h_sync_strt_wid = ((hsync_start & 0x1fff)
77 | ((hsync_wid & 0x3f) << 16)
78 | ((mode->flags & DRM_MODE_FLAG_NHSYNC)
79 ? RADEON_CRTC_H_SYNC_POL
80 : 0));
81
82 fp_crtc_v_total_disp = (((mode->crtc_vtotal - 1) & 0xffff)
83 | ((mode->crtc_vdisplay - 1) << 16));
84
85 vsync_wid = mode->crtc_vsync_end - mode->crtc_vsync_start;
86 if (!vsync_wid)
87 vsync_wid = 1;
88
89 fp_v_sync_strt_wid = (((mode->crtc_vsync_start - 1) & 0xfff)
90 | ((vsync_wid & 0x1f) << 16)
91 | ((mode->flags & DRM_MODE_FLAG_NVSYNC)
92 ? RADEON_CRTC_V_SYNC_POL
93 : 0));
94
95 fp_horz_vert_active = 0;
96
97 if (native_mode->panel_xres == 0 ||
98 native_mode->panel_yres == 0) {
99 hscale = false;
100 vscale = false;
101 } else {
102 if (xres > native_mode->panel_xres)
103 xres = native_mode->panel_xres;
104 if (yres > native_mode->panel_yres)
105 yres = native_mode->panel_yres;
106
107 if (xres == native_mode->panel_xres)
108 hscale = false;
109 if (yres == native_mode->panel_yres)
110 vscale = false;
111 }
112
113 switch (radeon_crtc->rmx_type) {
114 case RMX_FULL:
115 case RMX_ASPECT:
116 if (!hscale)
117 fp_horz_stretch |= ((xres/8-1) << 16);
118 else {
119 inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0;
120 scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX)
121 / native_mode->panel_xres + 1;
122 fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) |
123 RADEON_HORZ_STRETCH_BLEND |
124 RADEON_HORZ_STRETCH_ENABLE |
125 ((native_mode->panel_xres/8-1) << 16));
126 }
127
128 if (!vscale)
129 fp_vert_stretch |= ((yres-1) << 12);
130 else {
131 inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0;
132 scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX)
133 / native_mode->panel_yres + 1;
134 fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) |
135 RADEON_VERT_STRETCH_ENABLE |
136 RADEON_VERT_STRETCH_BLEND |
137 ((native_mode->panel_yres-1) << 12));
138 }
139 break;
140 case RMX_CENTER:
141 fp_horz_stretch |= ((xres/8-1) << 16);
142 fp_vert_stretch |= ((yres-1) << 12);
143
144 crtc_more_cntl |= (RADEON_CRTC_AUTO_HORZ_CENTER_EN |
145 RADEON_CRTC_AUTO_VERT_CENTER_EN);
146
147 blank_width = (mode->crtc_hblank_end - mode->crtc_hblank_start) / 8;
148 if (blank_width > 110)
149 blank_width = 110;
150
151 fp_crtc_h_total_disp = (((blank_width) & 0x3ff)
152 | ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16));
153
154 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
155 if (!hsync_wid)
156 hsync_wid = 1;
157
158 fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff)
159 | ((hsync_wid & 0x3f) << 16)
160 | ((mode->flags & DRM_MODE_FLAG_NHSYNC)
161 ? RADEON_CRTC_H_SYNC_POL
162 : 0));
163
164 fp_crtc_v_total_disp = (((mode->crtc_vblank_end - mode->crtc_vblank_start) & 0xffff)
165 | ((mode->crtc_vdisplay - 1) << 16));
166
167 vsync_wid = mode->crtc_vsync_end - mode->crtc_vsync_start;
168 if (!vsync_wid)
169 vsync_wid = 1;
170
171 fp_v_sync_strt_wid = ((((mode->crtc_vsync_start - mode->crtc_vblank_start) & 0xfff)
172 | ((vsync_wid & 0x1f) << 16)
173 | ((mode->flags & DRM_MODE_FLAG_NVSYNC)
174 ? RADEON_CRTC_V_SYNC_POL
175 : 0)));
176
177 fp_horz_vert_active = (((native_mode->panel_yres) & 0xfff) |
178 (((native_mode->panel_xres / 8) & 0x1ff) << 16));
179 break;
180 case RMX_OFF:
181 default:
182 fp_horz_stretch |= ((xres/8-1) << 16);
183 fp_vert_stretch |= ((yres-1) << 12);
184 break;
185 }
186
187 WREG32(RADEON_FP_HORZ_STRETCH, fp_horz_stretch);
188 WREG32(RADEON_FP_VERT_STRETCH, fp_vert_stretch);
189 WREG32(RADEON_CRTC_MORE_CNTL, crtc_more_cntl);
190 WREG32(RADEON_FP_HORZ_VERT_ACTIVE, fp_horz_vert_active);
191 WREG32(RADEON_FP_H_SYNC_STRT_WID, fp_h_sync_strt_wid);
192 WREG32(RADEON_FP_V_SYNC_STRT_WID, fp_v_sync_strt_wid);
193 WREG32(RADEON_FP_CRTC_H_TOTAL_DISP, fp_crtc_h_total_disp);
194 WREG32(RADEON_FP_CRTC_V_TOTAL_DISP, fp_crtc_v_total_disp);
195}
196
32void radeon_restore_common_regs(struct drm_device *dev) 197void radeon_restore_common_regs(struct drm_device *dev)
33{ 198{
34 /* don't need this yet */ 199 /* don't need this yet */
@@ -235,6 +400,7 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
235 uint64_t base; 400 uint64_t base;
236 uint32_t crtc_offset, crtc_offset_cntl, crtc_tile_x0_y0 = 0; 401 uint32_t crtc_offset, crtc_offset_cntl, crtc_tile_x0_y0 = 0;
237 uint32_t crtc_pitch, pitch_pixels; 402 uint32_t crtc_pitch, pitch_pixels;
403 uint32_t tiling_flags;
238 404
239 DRM_DEBUG("\n"); 405 DRM_DEBUG("\n");
240 406
@@ -244,7 +410,12 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
244 if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) { 410 if (radeon_gem_object_pin(obj, RADEON_GEM_DOMAIN_VRAM, &base)) {
245 return -EINVAL; 411 return -EINVAL;
246 } 412 }
247 crtc_offset = (u32)base; 413 /* if scanout was in GTT this really wouldn't work */
414 /* crtc offset is from display base addr not FB location */
415 radeon_crtc->legacy_display_base_addr = rdev->mc.vram_location;
416
417 base -= radeon_crtc->legacy_display_base_addr;
418
248 crtc_offset_cntl = 0; 419 crtc_offset_cntl = 0;
249 420
250 pitch_pixels = crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8); 421 pitch_pixels = crtc->fb->pitch / (crtc->fb->bits_per_pixel / 8);
@@ -253,8 +424,12 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
253 (crtc->fb->bits_per_pixel * 8)); 424 (crtc->fb->bits_per_pixel * 8));
254 crtc_pitch |= crtc_pitch << 16; 425 crtc_pitch |= crtc_pitch << 16;
255 426
256 /* TODO tiling */ 427 radeon_object_get_tiling_flags(obj->driver_private,
257 if (0) { 428 &tiling_flags, NULL);
429 if (tiling_flags & RADEON_TILING_MICRO)
430 DRM_ERROR("trying to scanout microtiled buffer\n");
431
432 if (tiling_flags & RADEON_TILING_MACRO) {
258 if (ASIC_IS_R300(rdev)) 433 if (ASIC_IS_R300(rdev))
259 crtc_offset_cntl |= (R300_CRTC_X_Y_MODE_EN | 434 crtc_offset_cntl |= (R300_CRTC_X_Y_MODE_EN |
260 R300_CRTC_MICRO_TILE_BUFFER_DIS | 435 R300_CRTC_MICRO_TILE_BUFFER_DIS |
@@ -270,15 +445,13 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
270 crtc_offset_cntl &= ~RADEON_CRTC_TILE_EN; 445 crtc_offset_cntl &= ~RADEON_CRTC_TILE_EN;
271 } 446 }
272 447
273 448 if (tiling_flags & RADEON_TILING_MACRO) {
274 /* TODO more tiling */
275 if (0) {
276 if (ASIC_IS_R300(rdev)) { 449 if (ASIC_IS_R300(rdev)) {
277 crtc_tile_x0_y0 = x | (y << 16); 450 crtc_tile_x0_y0 = x | (y << 16);
278 base &= ~0x7ff; 451 base &= ~0x7ff;
279 } else { 452 } else {
280 int byteshift = crtc->fb->bits_per_pixel >> 4; 453 int byteshift = crtc->fb->bits_per_pixel >> 4;
281 int tile_addr = (((y >> 3) * crtc->fb->width + x) >> (8 - byteshift)) << 11; 454 int tile_addr = (((y >> 3) * pitch_pixels + x) >> (8 - byteshift)) << 11;
282 base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8); 455 base += tile_addr + ((x << byteshift) % 256) + ((y % 8) << 8);
283 crtc_offset_cntl |= (y % 16); 456 crtc_offset_cntl |= (y % 16);
284 } 457 }
@@ -303,11 +476,9 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
303 476
304 base &= ~7; 477 base &= ~7;
305 478
306 /* update sarea TODO */
307
308 crtc_offset = (u32)base; 479 crtc_offset = (u32)base;
309 480
310 WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, rdev->mc.vram_location); 481 WREG32(RADEON_DISPLAY_BASE_ADDR + radeon_crtc->crtc_offset, radeon_crtc->legacy_display_base_addr);
311 482
312 if (ASIC_IS_R300(rdev)) { 483 if (ASIC_IS_R300(rdev)) {
313 if (radeon_crtc->crtc_id) 484 if (radeon_crtc->crtc_id)
@@ -751,6 +922,8 @@ static bool radeon_crtc_mode_fixup(struct drm_crtc *crtc,
751 struct drm_display_mode *mode, 922 struct drm_display_mode *mode,
752 struct drm_display_mode *adjusted_mode) 923 struct drm_display_mode *adjusted_mode)
753{ 924{
925 if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
926 return false;
754 return true; 927 return true;
755} 928}
756 929
@@ -759,16 +932,25 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc,
759 struct drm_display_mode *adjusted_mode, 932 struct drm_display_mode *adjusted_mode,
760 int x, int y, struct drm_framebuffer *old_fb) 933 int x, int y, struct drm_framebuffer *old_fb)
761{ 934{
762 935 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
763 DRM_DEBUG("\n"); 936 struct drm_device *dev = crtc->dev;
937 struct radeon_device *rdev = dev->dev_private;
764 938
765 /* TODO TV */ 939 /* TODO TV */
766
767 radeon_crtc_set_base(crtc, x, y, old_fb); 940 radeon_crtc_set_base(crtc, x, y, old_fb);
768 radeon_set_crtc_timing(crtc, adjusted_mode); 941 radeon_set_crtc_timing(crtc, adjusted_mode);
769 radeon_set_pll(crtc, adjusted_mode); 942 radeon_set_pll(crtc, adjusted_mode);
770 radeon_init_disp_bandwidth(crtc->dev); 943 radeon_bandwidth_update(rdev);
771 944 if (radeon_crtc->crtc_id == 0) {
945 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode);
946 } else {
947 if (radeon_crtc->rmx_type != RMX_OFF) {
948 /* FIXME: only first crtc has rmx what should we
949 * do ?
950 */
951 DRM_ERROR("Mode need scaling but only first crtc can do that.\n");
952 }
953 }
772 return 0; 954 return 0;
773} 955}
774 956
@@ -799,478 +981,3 @@ void radeon_legacy_init_crtc(struct drm_device *dev,
799 radeon_crtc->crtc_offset = RADEON_CRTC2_H_TOTAL_DISP - RADEON_CRTC_H_TOTAL_DISP; 981 radeon_crtc->crtc_offset = RADEON_CRTC2_H_TOTAL_DISP - RADEON_CRTC_H_TOTAL_DISP;
800 drm_crtc_helper_add(&radeon_crtc->base, &legacy_helper_funcs); 982 drm_crtc_helper_add(&radeon_crtc->base, &legacy_helper_funcs);
801} 983}
802
803void radeon_init_disp_bw_legacy(struct drm_device *dev,
804 struct drm_display_mode *mode1,
805 uint32_t pixel_bytes1,
806 struct drm_display_mode *mode2,
807 uint32_t pixel_bytes2)
808{
809 struct radeon_device *rdev = dev->dev_private;
810 fixed20_12 trcd_ff, trp_ff, tras_ff, trbs_ff, tcas_ff;
811 fixed20_12 sclk_ff, mclk_ff, sclk_eff_ff, sclk_delay_ff;
812 fixed20_12 peak_disp_bw, mem_bw, pix_clk, pix_clk2, temp_ff, crit_point_ff;
813 uint32_t temp, data, mem_trcd, mem_trp, mem_tras;
814 fixed20_12 memtcas_ff[8] = {
815 fixed_init(1),
816 fixed_init(2),
817 fixed_init(3),
818 fixed_init(0),
819 fixed_init_half(1),
820 fixed_init_half(2),
821 fixed_init(0),
822 };
823 fixed20_12 memtcas_rs480_ff[8] = {
824 fixed_init(0),
825 fixed_init(1),
826 fixed_init(2),
827 fixed_init(3),
828 fixed_init(0),
829 fixed_init_half(1),
830 fixed_init_half(2),
831 fixed_init_half(3),
832 };
833 fixed20_12 memtcas2_ff[8] = {
834 fixed_init(0),
835 fixed_init(1),
836 fixed_init(2),
837 fixed_init(3),
838 fixed_init(4),
839 fixed_init(5),
840 fixed_init(6),
841 fixed_init(7),
842 };
843 fixed20_12 memtrbs[8] = {
844 fixed_init(1),
845 fixed_init_half(1),
846 fixed_init(2),
847 fixed_init_half(2),
848 fixed_init(3),
849 fixed_init_half(3),
850 fixed_init(4),
851 fixed_init_half(4)
852 };
853 fixed20_12 memtrbs_r4xx[8] = {
854 fixed_init(4),
855 fixed_init(5),
856 fixed_init(6),
857 fixed_init(7),
858 fixed_init(8),
859 fixed_init(9),
860 fixed_init(10),
861 fixed_init(11)
862 };
863 fixed20_12 min_mem_eff;
864 fixed20_12 mc_latency_sclk, mc_latency_mclk, k1;
865 fixed20_12 cur_latency_mclk, cur_latency_sclk;
866 fixed20_12 disp_latency, disp_latency_overhead, disp_drain_rate,
867 disp_drain_rate2, read_return_rate;
868 fixed20_12 time_disp1_drop_priority;
869 int c;
870 int cur_size = 16; /* in octawords */
871 int critical_point = 0, critical_point2;
872/* uint32_t read_return_rate, time_disp1_drop_priority; */
873 int stop_req, max_stop_req;
874
875 min_mem_eff.full = rfixed_const_8(0);
876 /* get modes */
877 if ((rdev->disp_priority == 2) && ASIC_IS_R300(rdev)) {
878 uint32_t mc_init_misc_lat_timer = RREG32(R300_MC_INIT_MISC_LAT_TIMER);
879 mc_init_misc_lat_timer &= ~(R300_MC_DISP1R_INIT_LAT_MASK << R300_MC_DISP1R_INIT_LAT_SHIFT);
880 mc_init_misc_lat_timer &= ~(R300_MC_DISP0R_INIT_LAT_MASK << R300_MC_DISP0R_INIT_LAT_SHIFT);
881 /* check crtc enables */
882 if (mode2)
883 mc_init_misc_lat_timer |= (1 << R300_MC_DISP1R_INIT_LAT_SHIFT);
884 if (mode1)
885 mc_init_misc_lat_timer |= (1 << R300_MC_DISP0R_INIT_LAT_SHIFT);
886 WREG32(R300_MC_INIT_MISC_LAT_TIMER, mc_init_misc_lat_timer);
887 }
888
889 /*
890 * determine is there is enough bw for current mode
891 */
892 mclk_ff.full = rfixed_const(rdev->clock.default_mclk);
893 temp_ff.full = rfixed_const(100);
894 mclk_ff.full = rfixed_div(mclk_ff, temp_ff);
895 sclk_ff.full = rfixed_const(rdev->clock.default_sclk);
896 sclk_ff.full = rfixed_div(sclk_ff, temp_ff);
897
898 temp = (rdev->mc.vram_width / 8) * (rdev->mc.vram_is_ddr ? 2 : 1);
899 temp_ff.full = rfixed_const(temp);
900 mem_bw.full = rfixed_mul(mclk_ff, temp_ff);
901
902 pix_clk.full = 0;
903 pix_clk2.full = 0;
904 peak_disp_bw.full = 0;
905 if (mode1) {
906 temp_ff.full = rfixed_const(1000);
907 pix_clk.full = rfixed_const(mode1->clock); /* convert to fixed point */
908 pix_clk.full = rfixed_div(pix_clk, temp_ff);
909 temp_ff.full = rfixed_const(pixel_bytes1);
910 peak_disp_bw.full += rfixed_mul(pix_clk, temp_ff);
911 }
912 if (mode2) {
913 temp_ff.full = rfixed_const(1000);
914 pix_clk2.full = rfixed_const(mode2->clock); /* convert to fixed point */
915 pix_clk2.full = rfixed_div(pix_clk2, temp_ff);
916 temp_ff.full = rfixed_const(pixel_bytes2);
917 peak_disp_bw.full += rfixed_mul(pix_clk2, temp_ff);
918 }
919
920 mem_bw.full = rfixed_mul(mem_bw, min_mem_eff);
921 if (peak_disp_bw.full >= mem_bw.full) {
922 DRM_ERROR("You may not have enough display bandwidth for current mode\n"
923 "If you have flickering problem, try to lower resolution, refresh rate, or color depth\n");
924 }
925
926 /* Get values from the EXT_MEM_CNTL register...converting its contents. */
927 temp = RREG32(RADEON_MEM_TIMING_CNTL);
928 if ((rdev->family == CHIP_RV100) || (rdev->flags & RADEON_IS_IGP)) { /* RV100, M6, IGPs */
929 mem_trcd = ((temp >> 2) & 0x3) + 1;
930 mem_trp = ((temp & 0x3)) + 1;
931 mem_tras = ((temp & 0x70) >> 4) + 1;
932 } else if (rdev->family == CHIP_R300 ||
933 rdev->family == CHIP_R350) { /* r300, r350 */
934 mem_trcd = (temp & 0x7) + 1;
935 mem_trp = ((temp >> 8) & 0x7) + 1;
936 mem_tras = ((temp >> 11) & 0xf) + 4;
937 } else if (rdev->family == CHIP_RV350 ||
938 rdev->family <= CHIP_RV380) {
939 /* rv3x0 */
940 mem_trcd = (temp & 0x7) + 3;
941 mem_trp = ((temp >> 8) & 0x7) + 3;
942 mem_tras = ((temp >> 11) & 0xf) + 6;
943 } else if (rdev->family == CHIP_R420 ||
944 rdev->family == CHIP_R423 ||
945 rdev->family == CHIP_RV410) {
946 /* r4xx */
947 mem_trcd = (temp & 0xf) + 3;
948 if (mem_trcd > 15)
949 mem_trcd = 15;
950 mem_trp = ((temp >> 8) & 0xf) + 3;
951 if (mem_trp > 15)
952 mem_trp = 15;
953 mem_tras = ((temp >> 12) & 0x1f) + 6;
954 if (mem_tras > 31)
955 mem_tras = 31;
956 } else { /* RV200, R200 */
957 mem_trcd = (temp & 0x7) + 1;
958 mem_trp = ((temp >> 8) & 0x7) + 1;
959 mem_tras = ((temp >> 12) & 0xf) + 4;
960 }
961 /* convert to FF */
962 trcd_ff.full = rfixed_const(mem_trcd);
963 trp_ff.full = rfixed_const(mem_trp);
964 tras_ff.full = rfixed_const(mem_tras);
965
966 /* Get values from the MEM_SDRAM_MODE_REG register...converting its */
967 temp = RREG32(RADEON_MEM_SDRAM_MODE_REG);
968 data = (temp & (7 << 20)) >> 20;
969 if ((rdev->family == CHIP_RV100) || rdev->flags & RADEON_IS_IGP) {
970 if (rdev->family == CHIP_RS480) /* don't think rs400 */
971 tcas_ff = memtcas_rs480_ff[data];
972 else
973 tcas_ff = memtcas_ff[data];
974 } else
975 tcas_ff = memtcas2_ff[data];
976
977 if (rdev->family == CHIP_RS400 ||
978 rdev->family == CHIP_RS480) {
979 /* extra cas latency stored in bits 23-25 0-4 clocks */
980 data = (temp >> 23) & 0x7;
981 if (data < 5)
982 tcas_ff.full += rfixed_const(data);
983 }
984
985 if (ASIC_IS_R300(rdev) && !(rdev->flags & RADEON_IS_IGP)) {
986 /* on the R300, Tcas is included in Trbs.
987 */
988 temp = RREG32(RADEON_MEM_CNTL);
989 data = (R300_MEM_NUM_CHANNELS_MASK & temp);
990 if (data == 1) {
991 if (R300_MEM_USE_CD_CH_ONLY & temp) {
992 temp = RREG32(R300_MC_IND_INDEX);
993 temp &= ~R300_MC_IND_ADDR_MASK;
994 temp |= R300_MC_READ_CNTL_CD_mcind;
995 WREG32(R300_MC_IND_INDEX, temp);
996 temp = RREG32(R300_MC_IND_DATA);
997 data = (R300_MEM_RBS_POSITION_C_MASK & temp);
998 } else {
999 temp = RREG32(R300_MC_READ_CNTL_AB);
1000 data = (R300_MEM_RBS_POSITION_A_MASK & temp);
1001 }
1002 } else {
1003 temp = RREG32(R300_MC_READ_CNTL_AB);
1004 data = (R300_MEM_RBS_POSITION_A_MASK & temp);
1005 }
1006 if (rdev->family == CHIP_RV410 ||
1007 rdev->family == CHIP_R420 ||
1008 rdev->family == CHIP_R423)
1009 trbs_ff = memtrbs_r4xx[data];
1010 else
1011 trbs_ff = memtrbs[data];
1012 tcas_ff.full += trbs_ff.full;
1013 }
1014
1015 sclk_eff_ff.full = sclk_ff.full;
1016
1017 if (rdev->flags & RADEON_IS_AGP) {
1018 fixed20_12 agpmode_ff;
1019 agpmode_ff.full = rfixed_const(radeon_agpmode);
1020 temp_ff.full = rfixed_const_666(16);
1021 sclk_eff_ff.full -= rfixed_mul(agpmode_ff, temp_ff);
1022 }
1023 /* TODO PCIE lanes may affect this - agpmode == 16?? */
1024
1025 if (ASIC_IS_R300(rdev)) {
1026 sclk_delay_ff.full = rfixed_const(250);
1027 } else {
1028 if ((rdev->family == CHIP_RV100) ||
1029 rdev->flags & RADEON_IS_IGP) {
1030 if (rdev->mc.vram_is_ddr)
1031 sclk_delay_ff.full = rfixed_const(41);
1032 else
1033 sclk_delay_ff.full = rfixed_const(33);
1034 } else {
1035 if (rdev->mc.vram_width == 128)
1036 sclk_delay_ff.full = rfixed_const(57);
1037 else
1038 sclk_delay_ff.full = rfixed_const(41);
1039 }
1040 }
1041
1042 mc_latency_sclk.full = rfixed_div(sclk_delay_ff, sclk_eff_ff);
1043
1044 if (rdev->mc.vram_is_ddr) {
1045 if (rdev->mc.vram_width == 32) {
1046 k1.full = rfixed_const(40);
1047 c = 3;
1048 } else {
1049 k1.full = rfixed_const(20);
1050 c = 1;
1051 }
1052 } else {
1053 k1.full = rfixed_const(40);
1054 c = 3;
1055 }
1056
1057 temp_ff.full = rfixed_const(2);
1058 mc_latency_mclk.full = rfixed_mul(trcd_ff, temp_ff);
1059 temp_ff.full = rfixed_const(c);
1060 mc_latency_mclk.full += rfixed_mul(tcas_ff, temp_ff);
1061 temp_ff.full = rfixed_const(4);
1062 mc_latency_mclk.full += rfixed_mul(tras_ff, temp_ff);
1063 mc_latency_mclk.full += rfixed_mul(trp_ff, temp_ff);
1064 mc_latency_mclk.full += k1.full;
1065
1066 mc_latency_mclk.full = rfixed_div(mc_latency_mclk, mclk_ff);
1067 mc_latency_mclk.full += rfixed_div(temp_ff, sclk_eff_ff);
1068
1069 /*
1070 HW cursor time assuming worst case of full size colour cursor.
1071 */
1072 temp_ff.full = rfixed_const((2 * (cur_size - (rdev->mc.vram_is_ddr + 1))));
1073 temp_ff.full += trcd_ff.full;
1074 if (temp_ff.full < tras_ff.full)
1075 temp_ff.full = tras_ff.full;
1076 cur_latency_mclk.full = rfixed_div(temp_ff, mclk_ff);
1077
1078 temp_ff.full = rfixed_const(cur_size);
1079 cur_latency_sclk.full = rfixed_div(temp_ff, sclk_eff_ff);
1080 /*
1081 Find the total latency for the display data.
1082 */
1083 disp_latency_overhead.full = rfixed_const(80);
1084 disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff);
1085 mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full;
1086 mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full;
1087
1088 if (mc_latency_mclk.full > mc_latency_sclk.full)
1089 disp_latency.full = mc_latency_mclk.full;
1090 else
1091 disp_latency.full = mc_latency_sclk.full;
1092
1093 /* setup Max GRPH_STOP_REQ default value */
1094 if (ASIC_IS_RV100(rdev))
1095 max_stop_req = 0x5c;
1096 else
1097 max_stop_req = 0x7c;
1098
1099 if (mode1) {
1100 /* CRTC1
1101 Set GRPH_BUFFER_CNTL register using h/w defined optimal values.
1102 GRPH_STOP_REQ <= MIN[ 0x7C, (CRTC_H_DISP + 1) * (bit depth) / 0x10 ]
1103 */
1104 stop_req = mode1->hdisplay * pixel_bytes1 / 16;
1105
1106 if (stop_req > max_stop_req)
1107 stop_req = max_stop_req;
1108
1109 /*
1110 Find the drain rate of the display buffer.
1111 */
1112 temp_ff.full = rfixed_const((16/pixel_bytes1));
1113 disp_drain_rate.full = rfixed_div(pix_clk, temp_ff);
1114
1115 /*
1116 Find the critical point of the display buffer.
1117 */
1118 crit_point_ff.full = rfixed_mul(disp_drain_rate, disp_latency);
1119 crit_point_ff.full += rfixed_const_half(0);
1120
1121 critical_point = rfixed_trunc(crit_point_ff);
1122
1123 if (rdev->disp_priority == 2) {
1124 critical_point = 0;
1125 }
1126
1127 /*
1128 The critical point should never be above max_stop_req-4. Setting
1129 GRPH_CRITICAL_CNTL = 0 will thus force high priority all the time.
1130 */
1131 if (max_stop_req - critical_point < 4)
1132 critical_point = 0;
1133
1134 if (critical_point == 0 && mode2 && rdev->family == CHIP_R300) {
1135 /* some R300 cards have problem with this set to 0, when CRTC2 is enabled.*/
1136 critical_point = 0x10;
1137 }
1138
1139 temp = RREG32(RADEON_GRPH_BUFFER_CNTL);
1140 temp &= ~(RADEON_GRPH_STOP_REQ_MASK);
1141 temp |= (stop_req << RADEON_GRPH_STOP_REQ_SHIFT);
1142 temp &= ~(RADEON_GRPH_START_REQ_MASK);
1143 if ((rdev->family == CHIP_R350) &&
1144 (stop_req > 0x15)) {
1145 stop_req -= 0x10;
1146 }
1147 temp |= (stop_req << RADEON_GRPH_START_REQ_SHIFT);
1148 temp |= RADEON_GRPH_BUFFER_SIZE;
1149 temp &= ~(RADEON_GRPH_CRITICAL_CNTL |
1150 RADEON_GRPH_CRITICAL_AT_SOF |
1151 RADEON_GRPH_STOP_CNTL);
1152 /*
1153 Write the result into the register.
1154 */
1155 WREG32(RADEON_GRPH_BUFFER_CNTL, ((temp & ~RADEON_GRPH_CRITICAL_POINT_MASK) |
1156 (critical_point << RADEON_GRPH_CRITICAL_POINT_SHIFT)));
1157
1158#if 0
1159 if ((rdev->family == CHIP_RS400) ||
1160 (rdev->family == CHIP_RS480)) {
1161 /* attempt to program RS400 disp regs correctly ??? */
1162 temp = RREG32(RS400_DISP1_REG_CNTL);
1163 temp &= ~(RS400_DISP1_START_REQ_LEVEL_MASK |
1164 RS400_DISP1_STOP_REQ_LEVEL_MASK);
1165 WREG32(RS400_DISP1_REQ_CNTL1, (temp |
1166 (critical_point << RS400_DISP1_START_REQ_LEVEL_SHIFT) |
1167 (critical_point << RS400_DISP1_STOP_REQ_LEVEL_SHIFT)));
1168 temp = RREG32(RS400_DMIF_MEM_CNTL1);
1169 temp &= ~(RS400_DISP1_CRITICAL_POINT_START_MASK |
1170 RS400_DISP1_CRITICAL_POINT_STOP_MASK);
1171 WREG32(RS400_DMIF_MEM_CNTL1, (temp |
1172 (critical_point << RS400_DISP1_CRITICAL_POINT_START_SHIFT) |
1173 (critical_point << RS400_DISP1_CRITICAL_POINT_STOP_SHIFT)));
1174 }
1175#endif
1176
1177 DRM_DEBUG("GRPH_BUFFER_CNTL from to %x\n",
1178 /* (unsigned int)info->SavedReg->grph_buffer_cntl, */
1179 (unsigned int)RREG32(RADEON_GRPH_BUFFER_CNTL));
1180 }
1181
1182 if (mode2) {
1183 u32 grph2_cntl;
1184 stop_req = mode2->hdisplay * pixel_bytes2 / 16;
1185
1186 if (stop_req > max_stop_req)
1187 stop_req = max_stop_req;
1188
1189 /*
1190 Find the drain rate of the display buffer.
1191 */
1192 temp_ff.full = rfixed_const((16/pixel_bytes2));
1193 disp_drain_rate2.full = rfixed_div(pix_clk2, temp_ff);
1194
1195 grph2_cntl = RREG32(RADEON_GRPH2_BUFFER_CNTL);
1196 grph2_cntl &= ~(RADEON_GRPH_STOP_REQ_MASK);
1197 grph2_cntl |= (stop_req << RADEON_GRPH_STOP_REQ_SHIFT);
1198 grph2_cntl &= ~(RADEON_GRPH_START_REQ_MASK);
1199 if ((rdev->family == CHIP_R350) &&
1200 (stop_req > 0x15)) {
1201 stop_req -= 0x10;
1202 }
1203 grph2_cntl |= (stop_req << RADEON_GRPH_START_REQ_SHIFT);
1204 grph2_cntl |= RADEON_GRPH_BUFFER_SIZE;
1205 grph2_cntl &= ~(RADEON_GRPH_CRITICAL_CNTL |
1206 RADEON_GRPH_CRITICAL_AT_SOF |
1207 RADEON_GRPH_STOP_CNTL);
1208
1209 if ((rdev->family == CHIP_RS100) ||
1210 (rdev->family == CHIP_RS200))
1211 critical_point2 = 0;
1212 else {
1213 temp = (rdev->mc.vram_width * rdev->mc.vram_is_ddr + 1)/128;
1214 temp_ff.full = rfixed_const(temp);
1215 temp_ff.full = rfixed_mul(mclk_ff, temp_ff);
1216 if (sclk_ff.full < temp_ff.full)
1217 temp_ff.full = sclk_ff.full;
1218
1219 read_return_rate.full = temp_ff.full;
1220
1221 if (mode1) {
1222 temp_ff.full = read_return_rate.full - disp_drain_rate.full;
1223 time_disp1_drop_priority.full = rfixed_div(crit_point_ff, temp_ff);
1224 } else {
1225 time_disp1_drop_priority.full = 0;
1226 }
1227 crit_point_ff.full = disp_latency.full + time_disp1_drop_priority.full + disp_latency.full;
1228 crit_point_ff.full = rfixed_mul(crit_point_ff, disp_drain_rate2);
1229 crit_point_ff.full += rfixed_const_half(0);
1230
1231 critical_point2 = rfixed_trunc(crit_point_ff);
1232
1233 if (rdev->disp_priority == 2) {
1234 critical_point2 = 0;
1235 }
1236
1237 if (max_stop_req - critical_point2 < 4)
1238 critical_point2 = 0;
1239
1240 }
1241
1242 if (critical_point2 == 0 && rdev->family == CHIP_R300) {
1243 /* some R300 cards have problem with this set to 0 */
1244 critical_point2 = 0x10;
1245 }
1246
1247 WREG32(RADEON_GRPH2_BUFFER_CNTL, ((grph2_cntl & ~RADEON_GRPH_CRITICAL_POINT_MASK) |
1248 (critical_point2 << RADEON_GRPH_CRITICAL_POINT_SHIFT)));
1249
1250 if ((rdev->family == CHIP_RS400) ||
1251 (rdev->family == CHIP_RS480)) {
1252#if 0
1253 /* attempt to program RS400 disp2 regs correctly ??? */
1254 temp = RREG32(RS400_DISP2_REQ_CNTL1);
1255 temp &= ~(RS400_DISP2_START_REQ_LEVEL_MASK |
1256 RS400_DISP2_STOP_REQ_LEVEL_MASK);
1257 WREG32(RS400_DISP2_REQ_CNTL1, (temp |
1258 (critical_point2 << RS400_DISP1_START_REQ_LEVEL_SHIFT) |
1259 (critical_point2 << RS400_DISP1_STOP_REQ_LEVEL_SHIFT)));
1260 temp = RREG32(RS400_DISP2_REQ_CNTL2);
1261 temp &= ~(RS400_DISP2_CRITICAL_POINT_START_MASK |
1262 RS400_DISP2_CRITICAL_POINT_STOP_MASK);
1263 WREG32(RS400_DISP2_REQ_CNTL2, (temp |
1264 (critical_point2 << RS400_DISP2_CRITICAL_POINT_START_SHIFT) |
1265 (critical_point2 << RS400_DISP2_CRITICAL_POINT_STOP_SHIFT)));
1266#endif
1267 WREG32(RS400_DISP2_REQ_CNTL1, 0x105DC1CC);
1268 WREG32(RS400_DISP2_REQ_CNTL2, 0x2749D000);
1269 WREG32(RS400_DMIF_MEM_CNTL1, 0x29CA71DC);
1270 WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC);
1271 }
1272
1273 DRM_DEBUG("GRPH2_BUFFER_CNTL from to %x\n",
1274 (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL));
1275 }
1276}
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 2c2f42de1d4c..34d0f58eb944 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -30,170 +30,6 @@
30#include "atom.h" 30#include "atom.h"
31 31
32 32
33static void radeon_legacy_rmx_mode_set(struct drm_encoder *encoder,
34 struct drm_display_mode *mode,
35 struct drm_display_mode *adjusted_mode)
36{
37 struct drm_device *dev = encoder->dev;
38 struct radeon_device *rdev = dev->dev_private;
39 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
40 int xres = mode->hdisplay;
41 int yres = mode->vdisplay;
42 bool hscale = true, vscale = true;
43 int hsync_wid;
44 int vsync_wid;
45 int hsync_start;
46 uint32_t scale, inc;
47 uint32_t fp_horz_stretch, fp_vert_stretch, crtc_more_cntl, fp_horz_vert_active;
48 uint32_t fp_h_sync_strt_wid, fp_v_sync_strt_wid, fp_crtc_h_total_disp, fp_crtc_v_total_disp;
49 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode;
50
51 DRM_DEBUG("\n");
52
53 fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) &
54 (RADEON_VERT_STRETCH_RESERVED |
55 RADEON_VERT_AUTO_RATIO_INC);
56 fp_horz_stretch = RREG32(RADEON_FP_HORZ_STRETCH) &
57 (RADEON_HORZ_FP_LOOP_STRETCH |
58 RADEON_HORZ_AUTO_RATIO_INC);
59
60 crtc_more_cntl = 0;
61 if ((rdev->family == CHIP_RS100) ||
62 (rdev->family == CHIP_RS200)) {
63 /* This is to workaround the asic bug for RMX, some versions
64 of BIOS dosen't have this register initialized correctly. */
65 crtc_more_cntl |= RADEON_CRTC_H_CUTOFF_ACTIVE_EN;
66 }
67
68
69 fp_crtc_h_total_disp = ((((mode->crtc_htotal / 8) - 1) & 0x3ff)
70 | ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16));
71
72 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
73 if (!hsync_wid)
74 hsync_wid = 1;
75 hsync_start = mode->crtc_hsync_start - 8;
76
77 fp_h_sync_strt_wid = ((hsync_start & 0x1fff)
78 | ((hsync_wid & 0x3f) << 16)
79 | ((mode->flags & DRM_MODE_FLAG_NHSYNC)
80 ? RADEON_CRTC_H_SYNC_POL
81 : 0));
82
83 fp_crtc_v_total_disp = (((mode->crtc_vtotal - 1) & 0xffff)
84 | ((mode->crtc_vdisplay - 1) << 16));
85
86 vsync_wid = mode->crtc_vsync_end - mode->crtc_vsync_start;
87 if (!vsync_wid)
88 vsync_wid = 1;
89
90 fp_v_sync_strt_wid = (((mode->crtc_vsync_start - 1) & 0xfff)
91 | ((vsync_wid & 0x1f) << 16)
92 | ((mode->flags & DRM_MODE_FLAG_NVSYNC)
93 ? RADEON_CRTC_V_SYNC_POL
94 : 0));
95
96 fp_horz_vert_active = 0;
97
98 if (native_mode->panel_xres == 0 ||
99 native_mode->panel_yres == 0) {
100 hscale = false;
101 vscale = false;
102 } else {
103 if (xres > native_mode->panel_xres)
104 xres = native_mode->panel_xres;
105 if (yres > native_mode->panel_yres)
106 yres = native_mode->panel_yres;
107
108 if (xres == native_mode->panel_xres)
109 hscale = false;
110 if (yres == native_mode->panel_yres)
111 vscale = false;
112 }
113
114 if (radeon_encoder->flags & RADEON_USE_RMX) {
115 if (radeon_encoder->rmx_type != RMX_CENTER) {
116 if (!hscale)
117 fp_horz_stretch |= ((xres/8-1) << 16);
118 else {
119 inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0;
120 scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX)
121 / native_mode->panel_xres + 1;
122 fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) |
123 RADEON_HORZ_STRETCH_BLEND |
124 RADEON_HORZ_STRETCH_ENABLE |
125 ((native_mode->panel_xres/8-1) << 16));
126 }
127
128 if (!vscale)
129 fp_vert_stretch |= ((yres-1) << 12);
130 else {
131 inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0;
132 scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX)
133 / native_mode->panel_yres + 1;
134 fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) |
135 RADEON_VERT_STRETCH_ENABLE |
136 RADEON_VERT_STRETCH_BLEND |
137 ((native_mode->panel_yres-1) << 12));
138 }
139 } else if (radeon_encoder->rmx_type == RMX_CENTER) {
140 int blank_width;
141
142 fp_horz_stretch |= ((xres/8-1) << 16);
143 fp_vert_stretch |= ((yres-1) << 12);
144
145 crtc_more_cntl |= (RADEON_CRTC_AUTO_HORZ_CENTER_EN |
146 RADEON_CRTC_AUTO_VERT_CENTER_EN);
147
148 blank_width = (mode->crtc_hblank_end - mode->crtc_hblank_start) / 8;
149 if (blank_width > 110)
150 blank_width = 110;
151
152 fp_crtc_h_total_disp = (((blank_width) & 0x3ff)
153 | ((((mode->crtc_hdisplay / 8) - 1) & 0x1ff) << 16));
154
155 hsync_wid = (mode->crtc_hsync_end - mode->crtc_hsync_start) / 8;
156 if (!hsync_wid)
157 hsync_wid = 1;
158
159 fp_h_sync_strt_wid = ((((mode->crtc_hsync_start - mode->crtc_hblank_start) / 8) & 0x1fff)
160 | ((hsync_wid & 0x3f) << 16)
161 | ((mode->flags & DRM_MODE_FLAG_NHSYNC)
162 ? RADEON_CRTC_H_SYNC_POL
163 : 0));
164
165 fp_crtc_v_total_disp = (((mode->crtc_vblank_end - mode->crtc_vblank_start) & 0xffff)
166 | ((mode->crtc_vdisplay - 1) << 16));
167
168 vsync_wid = mode->crtc_vsync_end - mode->crtc_vsync_start;
169 if (!vsync_wid)
170 vsync_wid = 1;
171
172 fp_v_sync_strt_wid = ((((mode->crtc_vsync_start - mode->crtc_vblank_start) & 0xfff)
173 | ((vsync_wid & 0x1f) << 16)
174 | ((mode->flags & DRM_MODE_FLAG_NVSYNC)
175 ? RADEON_CRTC_V_SYNC_POL
176 : 0)));
177
178 fp_horz_vert_active = (((native_mode->panel_yres) & 0xfff) |
179 (((native_mode->panel_xres / 8) & 0x1ff) << 16));
180 }
181 } else {
182 fp_horz_stretch |= ((xres/8-1) << 16);
183 fp_vert_stretch |= ((yres-1) << 12);
184 }
185
186 WREG32(RADEON_FP_HORZ_STRETCH, fp_horz_stretch);
187 WREG32(RADEON_FP_VERT_STRETCH, fp_vert_stretch);
188 WREG32(RADEON_CRTC_MORE_CNTL, crtc_more_cntl);
189 WREG32(RADEON_FP_HORZ_VERT_ACTIVE, fp_horz_vert_active);
190 WREG32(RADEON_FP_H_SYNC_STRT_WID, fp_h_sync_strt_wid);
191 WREG32(RADEON_FP_V_SYNC_STRT_WID, fp_v_sync_strt_wid);
192 WREG32(RADEON_FP_CRTC_H_TOTAL_DISP, fp_crtc_h_total_disp);
193 WREG32(RADEON_FP_CRTC_V_TOTAL_DISP, fp_crtc_v_total_disp);
194
195}
196
197static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) 33static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
198{ 34{
199 struct drm_device *dev = encoder->dev; 35 struct drm_device *dev = encoder->dev;
@@ -287,9 +123,6 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder,
287 123
288 DRM_DEBUG("\n"); 124 DRM_DEBUG("\n");
289 125
290 if (radeon_crtc->crtc_id == 0)
291 radeon_legacy_rmx_mode_set(encoder, mode, adjusted_mode);
292
293 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); 126 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL);
294 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; 127 lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN;
295 128
@@ -318,7 +151,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder,
318 151
319 if (radeon_crtc->crtc_id == 0) { 152 if (radeon_crtc->crtc_id == 0) {
320 if (ASIC_IS_R300(rdev)) { 153 if (ASIC_IS_R300(rdev)) {
321 if (radeon_encoder->flags & RADEON_USE_RMX) 154 if (radeon_encoder->rmx_type != RMX_OFF)
322 lvds_pll_cntl |= R300_LVDS_SRC_SEL_RMX; 155 lvds_pll_cntl |= R300_LVDS_SRC_SEL_RMX;
323 } else 156 } else
324 lvds_gen_cntl &= ~RADEON_LVDS_SEL_CRTC2; 157 lvds_gen_cntl &= ~RADEON_LVDS_SEL_CRTC2;
@@ -350,8 +183,6 @@ static bool radeon_legacy_lvds_mode_fixup(struct drm_encoder *encoder,
350 183
351 drm_mode_set_crtcinfo(adjusted_mode, 0); 184 drm_mode_set_crtcinfo(adjusted_mode, 0);
352 185
353 radeon_encoder->flags &= ~RADEON_USE_RMX;
354
355 if (radeon_encoder->rmx_type != RMX_OFF) 186 if (radeon_encoder->rmx_type != RMX_OFF)
356 radeon_rmx_mode_fixup(encoder, mode, adjusted_mode); 187 radeon_rmx_mode_fixup(encoder, mode, adjusted_mode);
357 188
@@ -455,9 +286,6 @@ static void radeon_legacy_primary_dac_mode_set(struct drm_encoder *encoder,
455 286
456 DRM_DEBUG("\n"); 287 DRM_DEBUG("\n");
457 288
458 if (radeon_crtc->crtc_id == 0)
459 radeon_legacy_rmx_mode_set(encoder, mode, adjusted_mode);
460
461 if (radeon_crtc->crtc_id == 0) { 289 if (radeon_crtc->crtc_id == 0) {
462 if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { 290 if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) {
463 disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL) & 291 disp_output_cntl = RREG32(RADEON_DISP_OUTPUT_CNTL) &
@@ -653,9 +481,6 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
653 481
654 DRM_DEBUG("\n"); 482 DRM_DEBUG("\n");
655 483
656 if (radeon_crtc->crtc_id == 0)
657 radeon_legacy_rmx_mode_set(encoder, mode, adjusted_mode);
658
659 tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL); 484 tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL);
660 tmp &= 0xfffff; 485 tmp &= 0xfffff;
661 if (rdev->family == CHIP_RV280) { 486 if (rdev->family == CHIP_RV280) {
@@ -711,7 +536,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
711 if (radeon_crtc->crtc_id == 0) { 536 if (radeon_crtc->crtc_id == 0) {
712 if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { 537 if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) {
713 fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; 538 fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
714 if (radeon_encoder->flags & RADEON_USE_RMX) 539 if (radeon_encoder->rmx_type != RMX_OFF)
715 fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX; 540 fp_gen_cntl |= R200_FP_SOURCE_SEL_RMX;
716 else 541 else
717 fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; 542 fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
@@ -820,9 +645,6 @@ static void radeon_legacy_tmds_ext_mode_set(struct drm_encoder *encoder,
820 645
821 DRM_DEBUG("\n"); 646 DRM_DEBUG("\n");
822 647
823 if (radeon_crtc->crtc_id == 0)
824 radeon_legacy_rmx_mode_set(encoder, mode, adjusted_mode);
825
826 if (rdev->is_atom_bios) { 648 if (rdev->is_atom_bios) {
827 radeon_encoder->pixel_clock = adjusted_mode->clock; 649 radeon_encoder->pixel_clock = adjusted_mode->clock;
828 atombios_external_tmds_setup(encoder, ATOM_ENABLE); 650 atombios_external_tmds_setup(encoder, ATOM_ENABLE);
@@ -856,7 +678,7 @@ static void radeon_legacy_tmds_ext_mode_set(struct drm_encoder *encoder,
856 if (radeon_crtc->crtc_id == 0) { 678 if (radeon_crtc->crtc_id == 0) {
857 if ((rdev->family == CHIP_R200) || ASIC_IS_R300(rdev)) { 679 if ((rdev->family == CHIP_R200) || ASIC_IS_R300(rdev)) {
858 fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK; 680 fp2_gen_cntl &= ~R200_FP2_SOURCE_SEL_MASK;
859 if (radeon_encoder->flags & RADEON_USE_RMX) 681 if (radeon_encoder->rmx_type != RMX_OFF)
860 fp2_gen_cntl |= R200_FP2_SOURCE_SEL_RMX; 682 fp2_gen_cntl |= R200_FP2_SOURCE_SEL_RMX;
861 else 683 else
862 fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC1; 684 fp2_gen_cntl |= R200_FP2_SOURCE_SEL_CRTC1;
@@ -1014,9 +836,6 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder,
1014 836
1015 DRM_DEBUG("\n"); 837 DRM_DEBUG("\n");
1016 838
1017 if (radeon_crtc->crtc_id == 0)
1018 radeon_legacy_rmx_mode_set(encoder, mode, adjusted_mode);
1019
1020 if (rdev->family != CHIP_R200) { 839 if (rdev->family != CHIP_R200) {
1021 tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL); 840 tv_dac_cntl = RREG32(RADEON_TV_DAC_CNTL);
1022 if (rdev->family == CHIP_R420 || 841 if (rdev->family == CHIP_R420 ||
@@ -1243,6 +1062,7 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t
1243 1062
1244 radeon_encoder->encoder_id = encoder_id; 1063 radeon_encoder->encoder_id = encoder_id;
1245 radeon_encoder->devices = supported_device; 1064 radeon_encoder->devices = supported_device;
1065 radeon_encoder->rmx_type = RMX_OFF;
1246 1066
1247 switch (radeon_encoder->encoder_id) { 1067 switch (radeon_encoder->encoder_id) {
1248 case ENCODER_OBJECT_ID_INTERNAL_LVDS: 1068 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 9173b687462b..3b09a1f2d8f9 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -36,6 +36,9 @@
36#include <linux/i2c.h> 36#include <linux/i2c.h>
37#include <linux/i2c-id.h> 37#include <linux/i2c-id.h>
38#include <linux/i2c-algo-bit.h> 38#include <linux/i2c-algo-bit.h>
39#include "radeon_fixed.h"
40
41struct radeon_device;
39 42
40#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base) 43#define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
41#define to_radeon_connector(x) container_of(x, struct radeon_connector, base) 44#define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
@@ -124,6 +127,7 @@ struct radeon_tmds_pll {
124#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8) 127#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
125#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9) 128#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
126#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10) 129#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
130#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
127 131
128struct radeon_pll { 132struct radeon_pll {
129 uint16_t reference_freq; 133 uint16_t reference_freq;
@@ -170,6 +174,18 @@ struct radeon_mode_info {
170 struct atom_context *atom_context; 174 struct atom_context *atom_context;
171 enum radeon_connector_table connector_table; 175 enum radeon_connector_table connector_table;
172 bool mode_config_initialized; 176 bool mode_config_initialized;
177 struct radeon_crtc *crtcs[2];
178};
179
180struct radeon_native_mode {
181 /* preferred mode */
182 uint32_t panel_xres, panel_yres;
183 uint32_t hoverplus, hsync_width;
184 uint32_t hblank;
185 uint32_t voverplus, vsync_width;
186 uint32_t vblank;
187 uint32_t dotclock;
188 uint32_t flags;
173}; 189};
174 190
175struct radeon_crtc { 191struct radeon_crtc {
@@ -185,19 +201,13 @@ struct radeon_crtc {
185 uint64_t cursor_addr; 201 uint64_t cursor_addr;
186 int cursor_width; 202 int cursor_width;
187 int cursor_height; 203 int cursor_height;
188}; 204 uint32_t legacy_display_base_addr;
189 205 uint32_t legacy_cursor_offset;
190#define RADEON_USE_RMX 1 206 enum radeon_rmx_type rmx_type;
191 207 uint32_t devices;
192struct radeon_native_mode { 208 fixed20_12 vsc;
193 /* preferred mode */ 209 fixed20_12 hsc;
194 uint32_t panel_xres, panel_yres; 210 struct radeon_native_mode native_mode;
195 uint32_t hoverplus, hsync_width;
196 uint32_t hblank;
197 uint32_t voverplus, vsync_width;
198 uint32_t vblank;
199 uint32_t dotclock;
200 uint32_t flags;
201}; 211};
202 212
203struct radeon_encoder_primary_dac { 213struct radeon_encoder_primary_dac {
@@ -383,16 +393,9 @@ void radeon_enc_destroy(struct drm_encoder *encoder);
383void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj); 393void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
384void radeon_combios_asic_init(struct drm_device *dev); 394void radeon_combios_asic_init(struct drm_device *dev);
385extern int radeon_static_clocks_init(struct drm_device *dev); 395extern int radeon_static_clocks_init(struct drm_device *dev);
386void radeon_init_disp_bw_legacy(struct drm_device *dev, 396bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
387 struct drm_display_mode *mode1, 397 struct drm_display_mode *mode,
388 uint32_t pixel_bytes1, 398 struct drm_display_mode *adjusted_mode);
389 struct drm_display_mode *mode2, 399void atom_rv515_force_tv_scaler(struct radeon_device *rdev);
390 uint32_t pixel_bytes2);
391void radeon_init_disp_bw_avivo(struct drm_device *dev,
392 struct drm_display_mode *mode1,
393 uint32_t pixel_bytes1,
394 struct drm_display_mode *mode2,
395 uint32_t pixel_bytes2);
396void radeon_init_disp_bandwidth(struct drm_device *dev);
397 400
398#endif 401#endif
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index bac0d06c52ac..e98cae3bf4a6 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -44,6 +44,9 @@ struct radeon_object {
44 uint64_t gpu_addr; 44 uint64_t gpu_addr;
45 void *kptr; 45 void *kptr;
46 bool is_iomem; 46 bool is_iomem;
47 uint32_t tiling_flags;
48 uint32_t pitch;
49 int surface_reg;
47}; 50};
48 51
49int radeon_ttm_init(struct radeon_device *rdev); 52int radeon_ttm_init(struct radeon_device *rdev);
@@ -70,6 +73,7 @@ static void radeon_ttm_object_object_destroy(struct ttm_buffer_object *tobj)
70 73
71 robj = container_of(tobj, struct radeon_object, tobj); 74 robj = container_of(tobj, struct radeon_object, tobj);
72 list_del_init(&robj->list); 75 list_del_init(&robj->list);
76 radeon_object_clear_surface_reg(robj);
73 kfree(robj); 77 kfree(robj);
74} 78}
75 79
@@ -99,16 +103,16 @@ static inline uint32_t radeon_object_flags_from_domain(uint32_t domain)
99{ 103{
100 uint32_t flags = 0; 104 uint32_t flags = 0;
101 if (domain & RADEON_GEM_DOMAIN_VRAM) { 105 if (domain & RADEON_GEM_DOMAIN_VRAM) {
102 flags |= TTM_PL_FLAG_VRAM; 106 flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED;
103 } 107 }
104 if (domain & RADEON_GEM_DOMAIN_GTT) { 108 if (domain & RADEON_GEM_DOMAIN_GTT) {
105 flags |= TTM_PL_FLAG_TT; 109 flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
106 } 110 }
107 if (domain & RADEON_GEM_DOMAIN_CPU) { 111 if (domain & RADEON_GEM_DOMAIN_CPU) {
108 flags |= TTM_PL_FLAG_SYSTEM; 112 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
109 } 113 }
110 if (!flags) { 114 if (!flags) {
111 flags |= TTM_PL_FLAG_SYSTEM; 115 flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING;
112 } 116 }
113 return flags; 117 return flags;
114} 118}
@@ -141,6 +145,7 @@ int radeon_object_create(struct radeon_device *rdev,
141 } 145 }
142 robj->rdev = rdev; 146 robj->rdev = rdev;
143 robj->gobj = gobj; 147 robj->gobj = gobj;
148 robj->surface_reg = -1;
144 INIT_LIST_HEAD(&robj->list); 149 INIT_LIST_HEAD(&robj->list);
145 150
146 flags = radeon_object_flags_from_domain(domain); 151 flags = radeon_object_flags_from_domain(domain);
@@ -304,7 +309,7 @@ int radeon_object_wait(struct radeon_object *robj)
304 } 309 }
305 spin_lock(&robj->tobj.lock); 310 spin_lock(&robj->tobj.lock);
306 if (robj->tobj.sync_obj) { 311 if (robj->tobj.sync_obj) {
307 r = ttm_bo_wait(&robj->tobj, true, false, false); 312 r = ttm_bo_wait(&robj->tobj, true, true, false);
308 } 313 }
309 spin_unlock(&robj->tobj.lock); 314 spin_unlock(&robj->tobj.lock);
310 radeon_object_unreserve(robj); 315 radeon_object_unreserve(robj);
@@ -403,7 +408,6 @@ int radeon_object_list_validate(struct list_head *head, void *fence)
403 struct radeon_object *robj; 408 struct radeon_object *robj;
404 struct radeon_fence *old_fence = NULL; 409 struct radeon_fence *old_fence = NULL;
405 struct list_head *i; 410 struct list_head *i;
406 uint32_t flags;
407 int r; 411 int r;
408 412
409 r = radeon_object_list_reserve(head); 413 r = radeon_object_list_reserve(head);
@@ -414,27 +418,25 @@ int radeon_object_list_validate(struct list_head *head, void *fence)
414 list_for_each(i, head) { 418 list_for_each(i, head) {
415 lobj = list_entry(i, struct radeon_object_list, list); 419 lobj = list_entry(i, struct radeon_object_list, list);
416 robj = lobj->robj; 420 robj = lobj->robj;
417 if (lobj->wdomain) {
418 flags = radeon_object_flags_from_domain(lobj->wdomain);
419 flags |= TTM_PL_FLAG_TT;
420 } else {
421 flags = radeon_object_flags_from_domain(lobj->rdomain);
422 flags |= TTM_PL_FLAG_TT;
423 flags |= TTM_PL_FLAG_VRAM;
424 }
425 if (!robj->pin_count) { 421 if (!robj->pin_count) {
426 robj->tobj.proposed_placement = flags | TTM_PL_MASK_CACHING; 422 if (lobj->wdomain) {
423 robj->tobj.proposed_placement =
424 radeon_object_flags_from_domain(lobj->wdomain);
425 } else {
426 robj->tobj.proposed_placement =
427 radeon_object_flags_from_domain(lobj->rdomain);
428 }
427 r = ttm_buffer_object_validate(&robj->tobj, 429 r = ttm_buffer_object_validate(&robj->tobj,
428 robj->tobj.proposed_placement, 430 robj->tobj.proposed_placement,
429 true, false); 431 true, false);
430 if (unlikely(r)) { 432 if (unlikely(r)) {
431 radeon_object_list_unreserve(head);
432 DRM_ERROR("radeon: failed to validate.\n"); 433 DRM_ERROR("radeon: failed to validate.\n");
433 return r; 434 return r;
434 } 435 }
435 radeon_object_gpu_addr(robj); 436 radeon_object_gpu_addr(robj);
436 } 437 }
437 lobj->gpu_offset = robj->gpu_addr; 438 lobj->gpu_offset = robj->gpu_addr;
439 lobj->tiling_flags = robj->tiling_flags;
438 if (fence) { 440 if (fence) {
439 old_fence = (struct radeon_fence *)robj->tobj.sync_obj; 441 old_fence = (struct radeon_fence *)robj->tobj.sync_obj;
440 robj->tobj.sync_obj = radeon_fence_ref(fence); 442 robj->tobj.sync_obj = radeon_fence_ref(fence);
@@ -479,3 +481,127 @@ unsigned long radeon_object_size(struct radeon_object *robj)
479{ 481{
480 return robj->tobj.num_pages << PAGE_SHIFT; 482 return robj->tobj.num_pages << PAGE_SHIFT;
481} 483}
484
485int radeon_object_get_surface_reg(struct radeon_object *robj)
486{
487 struct radeon_device *rdev = robj->rdev;
488 struct radeon_surface_reg *reg;
489 struct radeon_object *old_object;
490 int steal;
491 int i;
492
493 if (!robj->tiling_flags)
494 return 0;
495
496 if (robj->surface_reg >= 0) {
497 reg = &rdev->surface_regs[robj->surface_reg];
498 i = robj->surface_reg;
499 goto out;
500 }
501
502 steal = -1;
503 for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
504
505 reg = &rdev->surface_regs[i];
506 if (!reg->robj)
507 break;
508
509 old_object = reg->robj;
510 if (old_object->pin_count == 0)
511 steal = i;
512 }
513
514 /* if we are all out */
515 if (i == RADEON_GEM_MAX_SURFACES) {
516 if (steal == -1)
517 return -ENOMEM;
518 /* find someone with a surface reg and nuke their BO */
519 reg = &rdev->surface_regs[steal];
520 old_object = reg->robj;
521 /* blow away the mapping */
522 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
523 ttm_bo_unmap_virtual(&old_object->tobj);
524 old_object->surface_reg = -1;
525 i = steal;
526 }
527
528 robj->surface_reg = i;
529 reg->robj = robj;
530
531out:
532 radeon_set_surface_reg(rdev, i, robj->tiling_flags, robj->pitch,
533 robj->tobj.mem.mm_node->start << PAGE_SHIFT,
534 robj->tobj.num_pages << PAGE_SHIFT);
535 return 0;
536}
537
538void radeon_object_clear_surface_reg(struct radeon_object *robj)
539{
540 struct radeon_device *rdev = robj->rdev;
541 struct radeon_surface_reg *reg;
542
543 if (robj->surface_reg == -1)
544 return;
545
546 reg = &rdev->surface_regs[robj->surface_reg];
547 radeon_clear_surface_reg(rdev, robj->surface_reg);
548
549 reg->robj = NULL;
550 robj->surface_reg = -1;
551}
552
553void radeon_object_set_tiling_flags(struct radeon_object *robj,
554 uint32_t tiling_flags, uint32_t pitch)
555{
556 robj->tiling_flags = tiling_flags;
557 robj->pitch = pitch;
558}
559
560void radeon_object_get_tiling_flags(struct radeon_object *robj,
561 uint32_t *tiling_flags,
562 uint32_t *pitch)
563{
564 if (tiling_flags)
565 *tiling_flags = robj->tiling_flags;
566 if (pitch)
567 *pitch = robj->pitch;
568}
569
570int radeon_object_check_tiling(struct radeon_object *robj, bool has_moved,
571 bool force_drop)
572{
573 if (!(robj->tiling_flags & RADEON_TILING_SURFACE))
574 return 0;
575
576 if (force_drop) {
577 radeon_object_clear_surface_reg(robj);
578 return 0;
579 }
580
581 if (robj->tobj.mem.mem_type != TTM_PL_VRAM) {
582 if (!has_moved)
583 return 0;
584
585 if (robj->surface_reg >= 0)
586 radeon_object_clear_surface_reg(robj);
587 return 0;
588 }
589
590 if ((robj->surface_reg >= 0) && !has_moved)
591 return 0;
592
593 return radeon_object_get_surface_reg(robj);
594}
595
596void radeon_bo_move_notify(struct ttm_buffer_object *bo,
597 struct ttm_mem_reg *mem)
598{
599 struct radeon_object *robj = container_of(bo, struct radeon_object, tobj);
600 radeon_object_check_tiling(robj, 0, 1);
601}
602
603void radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
604{
605 struct radeon_object *robj = container_of(bo, struct radeon_object, tobj);
606 radeon_object_check_tiling(robj, 0, 0);
607}
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index a853261d1881..60d159308b88 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -126,32 +126,19 @@ static void radeon_ib_align(struct radeon_device *rdev, struct radeon_ib *ib)
126 } 126 }
127} 127}
128 128
129static void radeon_ib_cpu_flush(struct radeon_device *rdev,
130 struct radeon_ib *ib)
131{
132 unsigned long tmp;
133 unsigned i;
134
135 /* To force CPU cache flush ugly but seems reliable */
136 for (i = 0; i < ib->length_dw; i += (rdev->cp.align_mask + 1)) {
137 tmp = readl(&ib->ptr[i]);
138 }
139}
140
141int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib) 129int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
142{ 130{
143 int r = 0; 131 int r = 0;
144 132
145 mutex_lock(&rdev->ib_pool.mutex); 133 mutex_lock(&rdev->ib_pool.mutex);
146 radeon_ib_align(rdev, ib); 134 radeon_ib_align(rdev, ib);
147 radeon_ib_cpu_flush(rdev, ib);
148 if (!ib->length_dw || !rdev->cp.ready) { 135 if (!ib->length_dw || !rdev->cp.ready) {
149 /* TODO: Nothings in the ib we should report. */ 136 /* TODO: Nothings in the ib we should report. */
150 mutex_unlock(&rdev->ib_pool.mutex); 137 mutex_unlock(&rdev->ib_pool.mutex);
151 DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx); 138 DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx);
152 return -EINVAL; 139 return -EINVAL;
153 } 140 }
154 /* 64 dwords should be enought for fence too */ 141 /* 64 dwords should be enough for fence too */
155 r = radeon_ring_lock(rdev, 64); 142 r = radeon_ring_lock(rdev, 64);
156 if (r) { 143 if (r) {
157 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r); 144 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r);
diff --git a/drivers/gpu/drm/radeon/radeon_share.h b/drivers/gpu/drm/radeon/radeon_share.h
new file mode 100644
index 000000000000..63a773578f17
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_share.h
@@ -0,0 +1,39 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef __RADEON_SHARE_H__
29#define __RADEON_SHARE_H__
30
31void r100_vram_init_sizes(struct radeon_device *rdev);
32
33void rs690_line_buffer_adjust(struct radeon_device *rdev,
34 struct drm_display_mode *mode1,
35 struct drm_display_mode *mode2);
36
37void rv515_bandwidth_avivo_update(struct radeon_device *rdev);
38
39#endif
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c
new file mode 100644
index 000000000000..03c33cf4e14c
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_test.c
@@ -0,0 +1,209 @@
1/*
2 * Copyright 2009 VMware, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Michel Dänzer
23 */
24#include <drm/drmP.h>
25#include <drm/radeon_drm.h>
26#include "radeon_reg.h"
27#include "radeon.h"
28
29
30/* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
31void radeon_test_moves(struct radeon_device *rdev)
32{
33 struct radeon_object *vram_obj = NULL;
34 struct radeon_object **gtt_obj = NULL;
35 struct radeon_fence *fence = NULL;
36 uint64_t gtt_addr, vram_addr;
37 unsigned i, n, size;
38 int r;
39
40 size = 1024 * 1024;
41
42 /* Number of tests =
43 * (Total GTT - IB pool - writeback page - ring buffer) / test size
44 */
45 n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - 4096 -
46 rdev->cp.ring_size) / size;
47
48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
49 if (!gtt_obj) {
50 DRM_ERROR("Failed to allocate %d pointers\n", n);
51 r = 1;
52 goto out_cleanup;
53 }
54
55 r = radeon_object_create(rdev, NULL, size, true, RADEON_GEM_DOMAIN_VRAM,
56 false, &vram_obj);
57 if (r) {
58 DRM_ERROR("Failed to create VRAM object\n");
59 goto out_cleanup;
60 }
61
62 r = radeon_object_pin(vram_obj, RADEON_GEM_DOMAIN_VRAM, &vram_addr);
63 if (r) {
64 DRM_ERROR("Failed to pin VRAM object\n");
65 goto out_cleanup;
66 }
67
68 for (i = 0; i < n; i++) {
69 void *gtt_map, *vram_map;
70 void **gtt_start, **gtt_end;
71 void **vram_start, **vram_end;
72
73 r = radeon_object_create(rdev, NULL, size, true,
74 RADEON_GEM_DOMAIN_GTT, false, gtt_obj + i);
75 if (r) {
76 DRM_ERROR("Failed to create GTT object %d\n", i);
77 goto out_cleanup;
78 }
79
80 r = radeon_object_pin(gtt_obj[i], RADEON_GEM_DOMAIN_GTT, &gtt_addr);
81 if (r) {
82 DRM_ERROR("Failed to pin GTT object %d\n", i);
83 goto out_cleanup;
84 }
85
86 r = radeon_object_kmap(gtt_obj[i], &gtt_map);
87 if (r) {
88 DRM_ERROR("Failed to map GTT object %d\n", i);
89 goto out_cleanup;
90 }
91
92 for (gtt_start = gtt_map, gtt_end = gtt_map + size;
93 gtt_start < gtt_end;
94 gtt_start++)
95 *gtt_start = gtt_start;
96
97 radeon_object_kunmap(gtt_obj[i]);
98
99 r = radeon_fence_create(rdev, &fence);
100 if (r) {
101 DRM_ERROR("Failed to create GTT->VRAM fence %d\n", i);
102 goto out_cleanup;
103 }
104
105 r = radeon_copy(rdev, gtt_addr, vram_addr, size / 4096, fence);
106 if (r) {
107 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
108 goto out_cleanup;
109 }
110
111 r = radeon_fence_wait(fence, false);
112 if (r) {
113 DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
114 goto out_cleanup;
115 }
116
117 radeon_fence_unref(&fence);
118
119 r = radeon_object_kmap(vram_obj, &vram_map);
120 if (r) {
121 DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
122 goto out_cleanup;
123 }
124
125 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
126 vram_start = vram_map, vram_end = vram_map + size;
127 vram_start < vram_end;
128 gtt_start++, vram_start++) {
129 if (*vram_start != gtt_start) {
130 DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
131 "expected 0x%p (GTT map 0x%p-0x%p)\n",
132 i, *vram_start, gtt_start, gtt_map,
133 gtt_end);
134 radeon_object_kunmap(vram_obj);
135 goto out_cleanup;
136 }
137 *vram_start = vram_start;
138 }
139
140 radeon_object_kunmap(vram_obj);
141
142 r = radeon_fence_create(rdev, &fence);
143 if (r) {
144 DRM_ERROR("Failed to create VRAM->GTT fence %d\n", i);
145 goto out_cleanup;
146 }
147
148 r = radeon_copy(rdev, vram_addr, gtt_addr, size / 4096, fence);
149 if (r) {
150 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
151 goto out_cleanup;
152 }
153
154 r = radeon_fence_wait(fence, false);
155 if (r) {
156 DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
157 goto out_cleanup;
158 }
159
160 radeon_fence_unref(&fence);
161
162 r = radeon_object_kmap(gtt_obj[i], &gtt_map);
163 if (r) {
164 DRM_ERROR("Failed to map GTT object after copy %d\n", i);
165 goto out_cleanup;
166 }
167
168 for (gtt_start = gtt_map, gtt_end = gtt_map + size,
169 vram_start = vram_map, vram_end = vram_map + size;
170 gtt_start < gtt_end;
171 gtt_start++, vram_start++) {
172 if (*gtt_start != vram_start) {
173 DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
174 "expected 0x%p (VRAM map 0x%p-0x%p)\n",
175 i, *gtt_start, vram_start, vram_map,
176 vram_end);
177 radeon_object_kunmap(gtt_obj[i]);
178 goto out_cleanup;
179 }
180 }
181
182 radeon_object_kunmap(gtt_obj[i]);
183
184 DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
185 gtt_addr - rdev->mc.gtt_location);
186 }
187
188out_cleanup:
189 if (vram_obj) {
190 radeon_object_unpin(vram_obj);
191 radeon_object_unref(&vram_obj);
192 }
193 if (gtt_obj) {
194 for (i = 0; i < n; i++) {
195 if (gtt_obj[i]) {
196 radeon_object_unpin(gtt_obj[i]);
197 radeon_object_unref(&gtt_obj[i]);
198 }
199 }
200 kfree(gtt_obj);
201 }
202 if (fence) {
203 radeon_fence_unref(&fence);
204 }
205 if (r) {
206 printk(KERN_WARNING "Error while testing BO move.\n");
207 }
208}
209
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 1227a97f5169..15c3531377ed 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -355,23 +355,26 @@ static int radeon_bo_move(struct ttm_buffer_object *bo,
355 if (!rdev->cp.ready) { 355 if (!rdev->cp.ready) {
356 /* use memcpy */ 356 /* use memcpy */
357 DRM_ERROR("CP is not ready use memcpy.\n"); 357 DRM_ERROR("CP is not ready use memcpy.\n");
358 return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem); 358 goto memcpy;
359 } 359 }
360 360
361 if (old_mem->mem_type == TTM_PL_VRAM && 361 if (old_mem->mem_type == TTM_PL_VRAM &&
362 new_mem->mem_type == TTM_PL_SYSTEM) { 362 new_mem->mem_type == TTM_PL_SYSTEM) {
363 return radeon_move_vram_ram(bo, evict, interruptible, 363 r = radeon_move_vram_ram(bo, evict, interruptible,
364 no_wait, new_mem); 364 no_wait, new_mem);
365 } else if (old_mem->mem_type == TTM_PL_SYSTEM && 365 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
366 new_mem->mem_type == TTM_PL_VRAM) { 366 new_mem->mem_type == TTM_PL_VRAM) {
367 return radeon_move_ram_vram(bo, evict, interruptible, 367 r = radeon_move_ram_vram(bo, evict, interruptible,
368 no_wait, new_mem); 368 no_wait, new_mem);
369 } else { 369 } else {
370 r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem); 370 r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem);
371 if (unlikely(r)) {
372 return r;
373 }
374 } 371 }
372
373 if (r) {
374memcpy:
375 r = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
376 }
377
375 return r; 378 return r;
376} 379}
377 380
@@ -429,6 +432,8 @@ static struct ttm_bo_driver radeon_bo_driver = {
429 .sync_obj_flush = &radeon_sync_obj_flush, 432 .sync_obj_flush = &radeon_sync_obj_flush,
430 .sync_obj_unref = &radeon_sync_obj_unref, 433 .sync_obj_unref = &radeon_sync_obj_unref,
431 .sync_obj_ref = &radeon_sync_obj_ref, 434 .sync_obj_ref = &radeon_sync_obj_ref,
435 .move_notify = &radeon_bo_move_notify,
436 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
432}; 437};
433 438
434int radeon_ttm_init(struct radeon_device *rdev) 439int radeon_ttm_init(struct radeon_device *rdev)
@@ -442,13 +447,14 @@ int radeon_ttm_init(struct radeon_device *rdev)
442 /* No others user of address space so set it to 0 */ 447 /* No others user of address space so set it to 0 */
443 r = ttm_bo_device_init(&rdev->mman.bdev, 448 r = ttm_bo_device_init(&rdev->mman.bdev,
444 rdev->mman.mem_global_ref.object, 449 rdev->mman.mem_global_ref.object,
445 &radeon_bo_driver, DRM_FILE_PAGE_OFFSET); 450 &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
451 rdev->need_dma32);
446 if (r) { 452 if (r) {
447 DRM_ERROR("failed initializing buffer object driver(%d).\n", r); 453 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
448 return r; 454 return r;
449 } 455 }
450 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 0, 456 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 0,
451 ((rdev->mc.aper_size) >> PAGE_SHIFT)); 457 ((rdev->mc.real_vram_size) >> PAGE_SHIFT));
452 if (r) { 458 if (r) {
453 DRM_ERROR("Failed initializing VRAM heap.\n"); 459 DRM_ERROR("Failed initializing VRAM heap.\n");
454 return r; 460 return r;
@@ -465,7 +471,7 @@ int radeon_ttm_init(struct radeon_device *rdev)
465 return r; 471 return r;
466 } 472 }
467 DRM_INFO("radeon: %uM of VRAM memory ready\n", 473 DRM_INFO("radeon: %uM of VRAM memory ready\n",
468 rdev->mc.vram_size / (1024 * 1024)); 474 rdev->mc.real_vram_size / (1024 * 1024));
469 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0, 475 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0,
470 ((rdev->mc.gtt_size) >> PAGE_SHIFT)); 476 ((rdev->mc.gtt_size) >> PAGE_SHIFT));
471 if (r) { 477 if (r) {
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index cc074b5a8f74..b29affd9c5d8 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -29,6 +29,7 @@
29#include <drm/drmP.h> 29#include <drm/drmP.h>
30#include "radeon_reg.h" 30#include "radeon_reg.h"
31#include "radeon.h" 31#include "radeon.h"
32#include "radeon_share.h"
32 33
33/* rs400,rs480 depends on : */ 34/* rs400,rs480 depends on : */
34void r100_hdp_reset(struct radeon_device *rdev); 35void r100_hdp_reset(struct radeon_device *rdev);
@@ -164,7 +165,9 @@ int rs400_gart_enable(struct radeon_device *rdev)
164 WREG32(RADEON_BUS_CNTL, tmp); 165 WREG32(RADEON_BUS_CNTL, tmp);
165 } 166 }
166 /* Table should be in 32bits address space so ignore bits above. */ 167 /* Table should be in 32bits address space so ignore bits above. */
167 tmp = rdev->gart.table_addr & 0xfffff000; 168 tmp = (u32)rdev->gart.table_addr & 0xfffff000;
169 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4;
170
168 WREG32_MC(RS480_GART_BASE, tmp); 171 WREG32_MC(RS480_GART_BASE, tmp);
169 /* TODO: more tweaking here */ 172 /* TODO: more tweaking here */
170 WREG32_MC(RS480_GART_FEATURE_ID, 173 WREG32_MC(RS480_GART_FEATURE_ID,
@@ -201,10 +204,17 @@ void rs400_gart_disable(struct radeon_device *rdev)
201 204
202int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr) 205int rs400_gart_set_page(struct radeon_device *rdev, int i, uint64_t addr)
203{ 206{
207 uint32_t entry;
208
204 if (i < 0 || i > rdev->gart.num_gpu_pages) { 209 if (i < 0 || i > rdev->gart.num_gpu_pages) {
205 return -EINVAL; 210 return -EINVAL;
206 } 211 }
207 rdev->gart.table.ram.ptr[i] = cpu_to_le32(((uint32_t)addr) | 0xC); 212
213 entry = (lower_32_bits(addr) & PAGE_MASK) |
214 ((upper_32_bits(addr) & 0xff) << 4) |
215 0xc;
216 entry = cpu_to_le32(entry);
217 rdev->gart.table.ram.ptr[i] = entry;
208 return 0; 218 return 0;
209} 219}
210 220
@@ -223,10 +233,9 @@ int rs400_mc_init(struct radeon_device *rdev)
223 233
224 rs400_gpu_init(rdev); 234 rs400_gpu_init(rdev);
225 rs400_gart_disable(rdev); 235 rs400_gart_disable(rdev);
226 rdev->mc.gtt_location = rdev->mc.vram_size; 236 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
227 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); 237 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
228 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); 238 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
229 rdev->mc.vram_location = 0xFFFFFFFFUL;
230 r = radeon_mc_setup(rdev); 239 r = radeon_mc_setup(rdev);
231 if (r) { 240 if (r) {
232 return r; 241 return r;
@@ -238,7 +247,7 @@ int rs400_mc_init(struct radeon_device *rdev)
238 "programming pipes. Bad things might happen.\n"); 247 "programming pipes. Bad things might happen.\n");
239 } 248 }
240 249
241 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 250 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
242 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16); 251 tmp = REG_SET(RADEON_MC_FB_TOP, tmp >> 16);
243 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16); 252 tmp |= REG_SET(RADEON_MC_FB_START, rdev->mc.vram_location >> 16);
244 WREG32(RADEON_MC_FB_LOCATION, tmp); 253 WREG32(RADEON_MC_FB_LOCATION, tmp);
@@ -284,21 +293,12 @@ void rs400_gpu_init(struct radeon_device *rdev)
284 */ 293 */
285void rs400_vram_info(struct radeon_device *rdev) 294void rs400_vram_info(struct radeon_device *rdev)
286{ 295{
287 uint32_t tom;
288
289 rs400_gart_adjust_size(rdev); 296 rs400_gart_adjust_size(rdev);
290 /* DDR for all card after R300 & IGP */ 297 /* DDR for all card after R300 & IGP */
291 rdev->mc.vram_is_ddr = true; 298 rdev->mc.vram_is_ddr = true;
292 rdev->mc.vram_width = 128; 299 rdev->mc.vram_width = 128;
293 300
294 /* read NB_TOM to get the amount of ram stolen for the GPU */ 301 r100_vram_init_sizes(rdev);
295 tom = RREG32(RADEON_NB_TOM);
296 rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16);
297 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size);
298
299 /* Could aper size report 0 ? */
300 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
301 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
302} 302}
303 303
304 304
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index ab0c967553e6..bbea6dee4a94 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -223,7 +223,7 @@ int rs600_mc_init(struct radeon_device *rdev)
223 printk(KERN_WARNING "Failed to wait MC idle while " 223 printk(KERN_WARNING "Failed to wait MC idle while "
224 "programming pipes. Bad things might happen.\n"); 224 "programming pipes. Bad things might happen.\n");
225 } 225 }
226 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 226 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
227 tmp = REG_SET(RS600_MC_FB_TOP, tmp >> 16); 227 tmp = REG_SET(RS600_MC_FB_TOP, tmp >> 16);
228 tmp |= REG_SET(RS600_MC_FB_START, rdev->mc.vram_location >> 16); 228 tmp |= REG_SET(RS600_MC_FB_START, rdev->mc.vram_location >> 16);
229 WREG32_MC(RS600_MC_FB_LOCATION, tmp); 229 WREG32_MC(RS600_MC_FB_LOCATION, tmp);
@@ -301,6 +301,11 @@ void rs600_vram_info(struct radeon_device *rdev)
301 rdev->mc.vram_width = 128; 301 rdev->mc.vram_width = 128;
302} 302}
303 303
304void rs600_bandwidth_update(struct radeon_device *rdev)
305{
306 /* FIXME: implement, should this be like rs690 ? */
307}
308
304 309
305/* 310/*
306 * Indirect registers accessor 311 * Indirect registers accessor
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 79ba85042b5f..839595b00728 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -28,6 +28,9 @@
28#include "drmP.h" 28#include "drmP.h"
29#include "radeon_reg.h" 29#include "radeon_reg.h"
30#include "radeon.h" 30#include "radeon.h"
31#include "rs690r.h"
32#include "atom.h"
33#include "atom-bits.h"
31 34
32/* rs690,rs740 depends on : */ 35/* rs690,rs740 depends on : */
33void r100_hdp_reset(struct radeon_device *rdev); 36void r100_hdp_reset(struct radeon_device *rdev);
@@ -64,7 +67,7 @@ int rs690_mc_init(struct radeon_device *rdev)
64 rs400_gart_disable(rdev); 67 rs400_gart_disable(rdev);
65 68
66 /* Setup GPU memory space */ 69 /* Setup GPU memory space */
67 rdev->mc.gtt_location = rdev->mc.vram_size; 70 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
68 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1); 71 rdev->mc.gtt_location += (rdev->mc.gtt_size - 1);
69 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1); 72 rdev->mc.gtt_location &= ~(rdev->mc.gtt_size - 1);
70 rdev->mc.vram_location = 0xFFFFFFFFUL; 73 rdev->mc.vram_location = 0xFFFFFFFFUL;
@@ -79,7 +82,7 @@ int rs690_mc_init(struct radeon_device *rdev)
79 printk(KERN_WARNING "Failed to wait MC idle while " 82 printk(KERN_WARNING "Failed to wait MC idle while "
80 "programming pipes. Bad things might happen.\n"); 83 "programming pipes. Bad things might happen.\n");
81 } 84 }
82 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 85 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
83 tmp = REG_SET(RS690_MC_FB_TOP, tmp >> 16); 86 tmp = REG_SET(RS690_MC_FB_TOP, tmp >> 16);
84 tmp |= REG_SET(RS690_MC_FB_START, rdev->mc.vram_location >> 16); 87 tmp |= REG_SET(RS690_MC_FB_START, rdev->mc.vram_location >> 16);
85 WREG32_MC(RS690_MCCFG_FB_LOCATION, tmp); 88 WREG32_MC(RS690_MCCFG_FB_LOCATION, tmp);
@@ -138,9 +141,82 @@ void rs690_gpu_init(struct radeon_device *rdev)
138/* 141/*
139 * VRAM info. 142 * VRAM info.
140 */ 143 */
144void rs690_pm_info(struct radeon_device *rdev)
145{
146 int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
147 struct _ATOM_INTEGRATED_SYSTEM_INFO *info;
148 struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 *info_v2;
149 void *ptr;
150 uint16_t data_offset;
151 uint8_t frev, crev;
152 fixed20_12 tmp;
153
154 atom_parse_data_header(rdev->mode_info.atom_context, index, NULL,
155 &frev, &crev, &data_offset);
156 ptr = rdev->mode_info.atom_context->bios + data_offset;
157 info = (struct _ATOM_INTEGRATED_SYSTEM_INFO *)ptr;
158 info_v2 = (struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 *)ptr;
159 /* Get various system informations from bios */
160 switch (crev) {
161 case 1:
162 tmp.full = rfixed_const(100);
163 rdev->pm.igp_sideport_mclk.full = rfixed_const(info->ulBootUpMemoryClock);
164 rdev->pm.igp_sideport_mclk.full = rfixed_div(rdev->pm.igp_sideport_mclk, tmp);
165 rdev->pm.igp_system_mclk.full = rfixed_const(le16_to_cpu(info->usK8MemoryClock));
166 rdev->pm.igp_ht_link_clk.full = rfixed_const(le16_to_cpu(info->usFSBClock));
167 rdev->pm.igp_ht_link_width.full = rfixed_const(info->ucHTLinkWidth);
168 break;
169 case 2:
170 tmp.full = rfixed_const(100);
171 rdev->pm.igp_sideport_mclk.full = rfixed_const(info_v2->ulBootUpSidePortClock);
172 rdev->pm.igp_sideport_mclk.full = rfixed_div(rdev->pm.igp_sideport_mclk, tmp);
173 rdev->pm.igp_system_mclk.full = rfixed_const(info_v2->ulBootUpUMAClock);
174 rdev->pm.igp_system_mclk.full = rfixed_div(rdev->pm.igp_system_mclk, tmp);
175 rdev->pm.igp_ht_link_clk.full = rfixed_const(info_v2->ulHTLinkFreq);
176 rdev->pm.igp_ht_link_clk.full = rfixed_div(rdev->pm.igp_ht_link_clk, tmp);
177 rdev->pm.igp_ht_link_width.full = rfixed_const(le16_to_cpu(info_v2->usMinHTLinkWidth));
178 break;
179 default:
180 tmp.full = rfixed_const(100);
181 /* We assume the slower possible clock ie worst case */
182 /* DDR 333Mhz */
183 rdev->pm.igp_sideport_mclk.full = rfixed_const(333);
184 /* FIXME: system clock ? */
185 rdev->pm.igp_system_mclk.full = rfixed_const(100);
186 rdev->pm.igp_system_mclk.full = rfixed_div(rdev->pm.igp_system_mclk, tmp);
187 rdev->pm.igp_ht_link_clk.full = rfixed_const(200);
188 rdev->pm.igp_ht_link_width.full = rfixed_const(8);
189 DRM_ERROR("No integrated system info for your GPU, using safe default\n");
190 break;
191 }
192 /* Compute various bandwidth */
193 /* k8_bandwidth = (memory_clk / 2) * 2 * 8 * 0.5 = memory_clk * 4 */
194 tmp.full = rfixed_const(4);
195 rdev->pm.k8_bandwidth.full = rfixed_mul(rdev->pm.igp_system_mclk, tmp);
196 /* ht_bandwidth = ht_clk * 2 * ht_width / 8 * 0.8
197 * = ht_clk * ht_width / 5
198 */
199 tmp.full = rfixed_const(5);
200 rdev->pm.ht_bandwidth.full = rfixed_mul(rdev->pm.igp_ht_link_clk,
201 rdev->pm.igp_ht_link_width);
202 rdev->pm.ht_bandwidth.full = rfixed_div(rdev->pm.ht_bandwidth, tmp);
203 if (tmp.full < rdev->pm.max_bandwidth.full) {
204 /* HT link is a limiting factor */
205 rdev->pm.max_bandwidth.full = tmp.full;
206 }
207 /* sideport_bandwidth = (sideport_clk / 2) * 2 * 2 * 0.7
208 * = (sideport_clk * 14) / 10
209 */
210 tmp.full = rfixed_const(14);
211 rdev->pm.sideport_bandwidth.full = rfixed_mul(rdev->pm.igp_sideport_mclk, tmp);
212 tmp.full = rfixed_const(10);
213 rdev->pm.sideport_bandwidth.full = rfixed_div(rdev->pm.sideport_bandwidth, tmp);
214}
215
141void rs690_vram_info(struct radeon_device *rdev) 216void rs690_vram_info(struct radeon_device *rdev)
142{ 217{
143 uint32_t tmp; 218 uint32_t tmp;
219 fixed20_12 a;
144 220
145 rs400_gart_adjust_size(rdev); 221 rs400_gart_adjust_size(rdev);
146 /* DDR for all card after R300 & IGP */ 222 /* DDR for all card after R300 & IGP */
@@ -152,12 +228,409 @@ void rs690_vram_info(struct radeon_device *rdev)
152 } else { 228 } else {
153 rdev->mc.vram_width = 64; 229 rdev->mc.vram_width = 64;
154 } 230 }
155 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); 231 rdev->mc.real_vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
232 rdev->mc.mc_vram_size = rdev->mc.real_vram_size;
156 233
157 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 234 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
158 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 235 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
236 rs690_pm_info(rdev);
237 /* FIXME: we should enforce default clock in case GPU is not in
238 * default setup
239 */
240 a.full = rfixed_const(100);
241 rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
242 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
243 a.full = rfixed_const(16);
244 /* core_bandwidth = sclk(Mhz) * 16 */
245 rdev->pm.core_bandwidth.full = rfixed_div(rdev->pm.sclk, a);
246}
247
248void rs690_line_buffer_adjust(struct radeon_device *rdev,
249 struct drm_display_mode *mode1,
250 struct drm_display_mode *mode2)
251{
252 u32 tmp;
253
254 /*
255 * Line Buffer Setup
256 * There is a single line buffer shared by both display controllers.
257 * DC_LB_MEMORY_SPLIT controls how that line buffer is shared between
258 * the display controllers. The paritioning can either be done
259 * manually or via one of four preset allocations specified in bits 1:0:
260 * 0 - line buffer is divided in half and shared between crtc
261 * 1 - D1 gets 3/4 of the line buffer, D2 gets 1/4
262 * 2 - D1 gets the whole buffer
263 * 3 - D1 gets 1/4 of the line buffer, D2 gets 3/4
264 * Setting bit 2 of DC_LB_MEMORY_SPLIT controls switches to manual
265 * allocation mode. In manual allocation mode, D1 always starts at 0,
266 * D1 end/2 is specified in bits 14:4; D2 allocation follows D1.
267 */
268 tmp = RREG32(DC_LB_MEMORY_SPLIT) & ~DC_LB_MEMORY_SPLIT_MASK;
269 tmp &= ~DC_LB_MEMORY_SPLIT_SHIFT_MODE;
270 /* auto */
271 if (mode1 && mode2) {
272 if (mode1->hdisplay > mode2->hdisplay) {
273 if (mode1->hdisplay > 2560)
274 tmp |= DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q;
275 else
276 tmp |= DC_LB_MEMORY_SPLIT_D1HALF_D2HALF;
277 } else if (mode2->hdisplay > mode1->hdisplay) {
278 if (mode2->hdisplay > 2560)
279 tmp |= DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q;
280 else
281 tmp |= DC_LB_MEMORY_SPLIT_D1HALF_D2HALF;
282 } else
283 tmp |= AVIVO_DC_LB_MEMORY_SPLIT_D1HALF_D2HALF;
284 } else if (mode1) {
285 tmp |= DC_LB_MEMORY_SPLIT_D1_ONLY;
286 } else if (mode2) {
287 tmp |= DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q;
288 }
289 WREG32(DC_LB_MEMORY_SPLIT, tmp);
159} 290}
160 291
292struct rs690_watermark {
293 u32 lb_request_fifo_depth;
294 fixed20_12 num_line_pair;
295 fixed20_12 estimated_width;
296 fixed20_12 worst_case_latency;
297 fixed20_12 consumption_rate;
298 fixed20_12 active_time;
299 fixed20_12 dbpp;
300 fixed20_12 priority_mark_max;
301 fixed20_12 priority_mark;
302 fixed20_12 sclk;
303};
304
305void rs690_crtc_bandwidth_compute(struct radeon_device *rdev,
306 struct radeon_crtc *crtc,
307 struct rs690_watermark *wm)
308{
309 struct drm_display_mode *mode = &crtc->base.mode;
310 fixed20_12 a, b, c;
311 fixed20_12 pclk, request_fifo_depth, tolerable_latency, estimated_width;
312 fixed20_12 consumption_time, line_time, chunk_time, read_delay_latency;
313 /* FIXME: detect IGP with sideport memory, i don't think there is any
314 * such product available
315 */
316 bool sideport = false;
317
318 if (!crtc->base.enabled) {
319 /* FIXME: wouldn't it better to set priority mark to maximum */
320 wm->lb_request_fifo_depth = 4;
321 return;
322 }
323
324 if (crtc->vsc.full > rfixed_const(2))
325 wm->num_line_pair.full = rfixed_const(2);
326 else
327 wm->num_line_pair.full = rfixed_const(1);
328
329 b.full = rfixed_const(mode->crtc_hdisplay);
330 c.full = rfixed_const(256);
331 a.full = rfixed_mul(wm->num_line_pair, b);
332 request_fifo_depth.full = rfixed_div(a, c);
333 if (a.full < rfixed_const(4)) {
334 wm->lb_request_fifo_depth = 4;
335 } else {
336 wm->lb_request_fifo_depth = rfixed_trunc(request_fifo_depth);
337 }
338
339 /* Determine consumption rate
340 * pclk = pixel clock period(ns) = 1000 / (mode.clock / 1000)
341 * vtaps = number of vertical taps,
342 * vsc = vertical scaling ratio, defined as source/destination
343 * hsc = horizontal scaling ration, defined as source/destination
344 */
345 a.full = rfixed_const(mode->clock);
346 b.full = rfixed_const(1000);
347 a.full = rfixed_div(a, b);
348 pclk.full = rfixed_div(b, a);
349 if (crtc->rmx_type != RMX_OFF) {
350 b.full = rfixed_const(2);
351 if (crtc->vsc.full > b.full)
352 b.full = crtc->vsc.full;
353 b.full = rfixed_mul(b, crtc->hsc);
354 c.full = rfixed_const(2);
355 b.full = rfixed_div(b, c);
356 consumption_time.full = rfixed_div(pclk, b);
357 } else {
358 consumption_time.full = pclk.full;
359 }
360 a.full = rfixed_const(1);
361 wm->consumption_rate.full = rfixed_div(a, consumption_time);
362
363
364 /* Determine line time
365 * LineTime = total time for one line of displayhtotal
366 * LineTime = total number of horizontal pixels
367 * pclk = pixel clock period(ns)
368 */
369 a.full = rfixed_const(crtc->base.mode.crtc_htotal);
370 line_time.full = rfixed_mul(a, pclk);
371
372 /* Determine active time
373 * ActiveTime = time of active region of display within one line,
374 * hactive = total number of horizontal active pixels
375 * htotal = total number of horizontal pixels
376 */
377 a.full = rfixed_const(crtc->base.mode.crtc_htotal);
378 b.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
379 wm->active_time.full = rfixed_mul(line_time, b);
380 wm->active_time.full = rfixed_div(wm->active_time, a);
381
382 /* Maximun bandwidth is the minimun bandwidth of all component */
383 rdev->pm.max_bandwidth = rdev->pm.core_bandwidth;
384 if (sideport) {
385 if (rdev->pm.max_bandwidth.full > rdev->pm.sideport_bandwidth.full &&
386 rdev->pm.sideport_bandwidth.full)
387 rdev->pm.max_bandwidth = rdev->pm.sideport_bandwidth;
388 read_delay_latency.full = rfixed_const(370 * 800 * 1000);
389 read_delay_latency.full = rfixed_div(read_delay_latency,
390 rdev->pm.igp_sideport_mclk);
391 } else {
392 if (rdev->pm.max_bandwidth.full > rdev->pm.k8_bandwidth.full &&
393 rdev->pm.k8_bandwidth.full)
394 rdev->pm.max_bandwidth = rdev->pm.k8_bandwidth;
395 if (rdev->pm.max_bandwidth.full > rdev->pm.ht_bandwidth.full &&
396 rdev->pm.ht_bandwidth.full)
397 rdev->pm.max_bandwidth = rdev->pm.ht_bandwidth;
398 read_delay_latency.full = rfixed_const(5000);
399 }
400
401 /* sclk = system clocks(ns) = 1000 / max_bandwidth / 16 */
402 a.full = rfixed_const(16);
403 rdev->pm.sclk.full = rfixed_mul(rdev->pm.max_bandwidth, a);
404 a.full = rfixed_const(1000);
405 rdev->pm.sclk.full = rfixed_div(a, rdev->pm.sclk);
406 /* Determine chunk time
407 * ChunkTime = the time it takes the DCP to send one chunk of data
408 * to the LB which consists of pipeline delay and inter chunk gap
409 * sclk = system clock(ns)
410 */
411 a.full = rfixed_const(256 * 13);
412 chunk_time.full = rfixed_mul(rdev->pm.sclk, a);
413 a.full = rfixed_const(10);
414 chunk_time.full = rfixed_div(chunk_time, a);
415
416 /* Determine the worst case latency
417 * NumLinePair = Number of line pairs to request(1=2 lines, 2=4 lines)
418 * WorstCaseLatency = worst case time from urgent to when the MC starts
419 * to return data
420 * READ_DELAY_IDLE_MAX = constant of 1us
421 * ChunkTime = time it takes the DCP to send one chunk of data to the LB
422 * which consists of pipeline delay and inter chunk gap
423 */
424 if (rfixed_trunc(wm->num_line_pair) > 1) {
425 a.full = rfixed_const(3);
426 wm->worst_case_latency.full = rfixed_mul(a, chunk_time);
427 wm->worst_case_latency.full += read_delay_latency.full;
428 } else {
429 a.full = rfixed_const(2);
430 wm->worst_case_latency.full = rfixed_mul(a, chunk_time);
431 wm->worst_case_latency.full += read_delay_latency.full;
432 }
433
434 /* Determine the tolerable latency
435 * TolerableLatency = Any given request has only 1 line time
436 * for the data to be returned
437 * LBRequestFifoDepth = Number of chunk requests the LB can
438 * put into the request FIFO for a display
439 * LineTime = total time for one line of display
440 * ChunkTime = the time it takes the DCP to send one chunk
441 * of data to the LB which consists of
442 * pipeline delay and inter chunk gap
443 */
444 if ((2+wm->lb_request_fifo_depth) >= rfixed_trunc(request_fifo_depth)) {
445 tolerable_latency.full = line_time.full;
446 } else {
447 tolerable_latency.full = rfixed_const(wm->lb_request_fifo_depth - 2);
448 tolerable_latency.full = request_fifo_depth.full - tolerable_latency.full;
449 tolerable_latency.full = rfixed_mul(tolerable_latency, chunk_time);
450 tolerable_latency.full = line_time.full - tolerable_latency.full;
451 }
452 /* We assume worst case 32bits (4 bytes) */
453 wm->dbpp.full = rfixed_const(4 * 8);
454
455 /* Determine the maximum priority mark
456 * width = viewport width in pixels
457 */
458 a.full = rfixed_const(16);
459 wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
460 wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);
461
462 /* Determine estimated width */
463 estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;
464 estimated_width.full = rfixed_div(estimated_width, consumption_time);
465 if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
466 wm->priority_mark.full = rfixed_const(10);
467 } else {
468 a.full = rfixed_const(16);
469 wm->priority_mark.full = rfixed_div(estimated_width, a);
470 wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;
471 }
472}
473
474void rs690_bandwidth_update(struct radeon_device *rdev)
475{
476 struct drm_display_mode *mode0 = NULL;
477 struct drm_display_mode *mode1 = NULL;
478 struct rs690_watermark wm0;
479 struct rs690_watermark wm1;
480 u32 tmp;
481 fixed20_12 priority_mark02, priority_mark12, fill_rate;
482 fixed20_12 a, b;
483
484 if (rdev->mode_info.crtcs[0]->base.enabled)
485 mode0 = &rdev->mode_info.crtcs[0]->base.mode;
486 if (rdev->mode_info.crtcs[1]->base.enabled)
487 mode1 = &rdev->mode_info.crtcs[1]->base.mode;
488 /*
489 * Set display0/1 priority up in the memory controller for
490 * modes if the user specifies HIGH for displaypriority
491 * option.
492 */
493 if (rdev->disp_priority == 2) {
494 tmp = RREG32_MC(MC_INIT_MISC_LAT_TIMER);
495 tmp &= ~MC_DISP1R_INIT_LAT_MASK;
496 tmp &= ~MC_DISP0R_INIT_LAT_MASK;
497 if (mode1)
498 tmp |= (1 << MC_DISP1R_INIT_LAT_SHIFT);
499 if (mode0)
500 tmp |= (1 << MC_DISP0R_INIT_LAT_SHIFT);
501 WREG32_MC(MC_INIT_MISC_LAT_TIMER, tmp);
502 }
503 rs690_line_buffer_adjust(rdev, mode0, mode1);
504
505 if ((rdev->family == CHIP_RS690) || (rdev->family == CHIP_RS740))
506 WREG32(DCP_CONTROL, 0);
507 if ((rdev->family == CHIP_RS780) || (rdev->family == CHIP_RS880))
508 WREG32(DCP_CONTROL, 2);
509
510 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0);
511 rs690_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1);
512
513 tmp = (wm0.lb_request_fifo_depth - 1);
514 tmp |= (wm1.lb_request_fifo_depth - 1) << 16;
515 WREG32(LB_MAX_REQ_OUTSTANDING, tmp);
516
517 if (mode0 && mode1) {
518 if (rfixed_trunc(wm0.dbpp) > 64)
519 a.full = rfixed_mul(wm0.dbpp, wm0.num_line_pair);
520 else
521 a.full = wm0.num_line_pair.full;
522 if (rfixed_trunc(wm1.dbpp) > 64)
523 b.full = rfixed_mul(wm1.dbpp, wm1.num_line_pair);
524 else
525 b.full = wm1.num_line_pair.full;
526 a.full += b.full;
527 fill_rate.full = rfixed_div(wm0.sclk, a);
528 if (wm0.consumption_rate.full > fill_rate.full) {
529 b.full = wm0.consumption_rate.full - fill_rate.full;
530 b.full = rfixed_mul(b, wm0.active_time);
531 a.full = rfixed_mul(wm0.worst_case_latency,
532 wm0.consumption_rate);
533 a.full = a.full + b.full;
534 b.full = rfixed_const(16 * 1000);
535 priority_mark02.full = rfixed_div(a, b);
536 } else {
537 a.full = rfixed_mul(wm0.worst_case_latency,
538 wm0.consumption_rate);
539 b.full = rfixed_const(16 * 1000);
540 priority_mark02.full = rfixed_div(a, b);
541 }
542 if (wm1.consumption_rate.full > fill_rate.full) {
543 b.full = wm1.consumption_rate.full - fill_rate.full;
544 b.full = rfixed_mul(b, wm1.active_time);
545 a.full = rfixed_mul(wm1.worst_case_latency,
546 wm1.consumption_rate);
547 a.full = a.full + b.full;
548 b.full = rfixed_const(16 * 1000);
549 priority_mark12.full = rfixed_div(a, b);
550 } else {
551 a.full = rfixed_mul(wm1.worst_case_latency,
552 wm1.consumption_rate);
553 b.full = rfixed_const(16 * 1000);
554 priority_mark12.full = rfixed_div(a, b);
555 }
556 if (wm0.priority_mark.full > priority_mark02.full)
557 priority_mark02.full = wm0.priority_mark.full;
558 if (rfixed_trunc(priority_mark02) < 0)
559 priority_mark02.full = 0;
560 if (wm0.priority_mark_max.full > priority_mark02.full)
561 priority_mark02.full = wm0.priority_mark_max.full;
562 if (wm1.priority_mark.full > priority_mark12.full)
563 priority_mark12.full = wm1.priority_mark.full;
564 if (rfixed_trunc(priority_mark12) < 0)
565 priority_mark12.full = 0;
566 if (wm1.priority_mark_max.full > priority_mark12.full)
567 priority_mark12.full = wm1.priority_mark_max.full;
568 WREG32(D1MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark02));
569 WREG32(D1MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark02));
570 WREG32(D2MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark12));
571 WREG32(D2MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark12));
572 } else if (mode0) {
573 if (rfixed_trunc(wm0.dbpp) > 64)
574 a.full = rfixed_mul(wm0.dbpp, wm0.num_line_pair);
575 else
576 a.full = wm0.num_line_pair.full;
577 fill_rate.full = rfixed_div(wm0.sclk, a);
578 if (wm0.consumption_rate.full > fill_rate.full) {
579 b.full = wm0.consumption_rate.full - fill_rate.full;
580 b.full = rfixed_mul(b, wm0.active_time);
581 a.full = rfixed_mul(wm0.worst_case_latency,
582 wm0.consumption_rate);
583 a.full = a.full + b.full;
584 b.full = rfixed_const(16 * 1000);
585 priority_mark02.full = rfixed_div(a, b);
586 } else {
587 a.full = rfixed_mul(wm0.worst_case_latency,
588 wm0.consumption_rate);
589 b.full = rfixed_const(16 * 1000);
590 priority_mark02.full = rfixed_div(a, b);
591 }
592 if (wm0.priority_mark.full > priority_mark02.full)
593 priority_mark02.full = wm0.priority_mark.full;
594 if (rfixed_trunc(priority_mark02) < 0)
595 priority_mark02.full = 0;
596 if (wm0.priority_mark_max.full > priority_mark02.full)
597 priority_mark02.full = wm0.priority_mark_max.full;
598 WREG32(D1MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark02));
599 WREG32(D1MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark02));
600 WREG32(D2MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
601 WREG32(D2MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
602 } else {
603 if (rfixed_trunc(wm1.dbpp) > 64)
604 a.full = rfixed_mul(wm1.dbpp, wm1.num_line_pair);
605 else
606 a.full = wm1.num_line_pair.full;
607 fill_rate.full = rfixed_div(wm1.sclk, a);
608 if (wm1.consumption_rate.full > fill_rate.full) {
609 b.full = wm1.consumption_rate.full - fill_rate.full;
610 b.full = rfixed_mul(b, wm1.active_time);
611 a.full = rfixed_mul(wm1.worst_case_latency,
612 wm1.consumption_rate);
613 a.full = a.full + b.full;
614 b.full = rfixed_const(16 * 1000);
615 priority_mark12.full = rfixed_div(a, b);
616 } else {
617 a.full = rfixed_mul(wm1.worst_case_latency,
618 wm1.consumption_rate);
619 b.full = rfixed_const(16 * 1000);
620 priority_mark12.full = rfixed_div(a, b);
621 }
622 if (wm1.priority_mark.full > priority_mark12.full)
623 priority_mark12.full = wm1.priority_mark.full;
624 if (rfixed_trunc(priority_mark12) < 0)
625 priority_mark12.full = 0;
626 if (wm1.priority_mark_max.full > priority_mark12.full)
627 priority_mark12.full = wm1.priority_mark_max.full;
628 WREG32(D1MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
629 WREG32(D1MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
630 WREG32(D2MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark12));
631 WREG32(D2MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark12));
632 }
633}
161 634
162/* 635/*
163 * Indirect registers accessor 636 * Indirect registers accessor
diff --git a/drivers/gpu/drm/radeon/rs690r.h b/drivers/gpu/drm/radeon/rs690r.h
new file mode 100644
index 000000000000..c0d9faa2175b
--- /dev/null
+++ b/drivers/gpu/drm/radeon/rs690r.h
@@ -0,0 +1,99 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef RS690R_H
29#define RS690R_H
30
31/* RS690/RS740 registers */
32#define MC_INDEX 0x0078
33# define MC_INDEX_MASK 0x1FF
34# define MC_INDEX_WR_EN (1 << 9)
35# define MC_INDEX_WR_ACK 0x7F
36#define MC_DATA 0x007C
37#define HDP_FB_LOCATION 0x0134
38#define DC_LB_MEMORY_SPLIT 0x6520
39#define DC_LB_MEMORY_SPLIT_MASK 0x00000003
40#define DC_LB_MEMORY_SPLIT_SHIFT 0
41#define DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0
42#define DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1
43#define DC_LB_MEMORY_SPLIT_D1_ONLY 2
44#define DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3
45#define DC_LB_MEMORY_SPLIT_SHIFT_MODE (1 << 2)
46#define DC_LB_DISP1_END_ADR_SHIFT 4
47#define DC_LB_DISP1_END_ADR_MASK 0x00007FF0
48#define D1MODE_PRIORITY_A_CNT 0x6548
49#define MODE_PRIORITY_MARK_MASK 0x00007FFF
50#define MODE_PRIORITY_OFF (1 << 16)
51#define MODE_PRIORITY_ALWAYS_ON (1 << 20)
52#define MODE_PRIORITY_FORCE_MASK (1 << 24)
53#define D1MODE_PRIORITY_B_CNT 0x654C
54#define LB_MAX_REQ_OUTSTANDING 0x6D58
55#define LB_D1_MAX_REQ_OUTSTANDING_MASK 0x0000000F
56#define LB_D1_MAX_REQ_OUTSTANDING_SHIFT 0
57#define LB_D2_MAX_REQ_OUTSTANDING_MASK 0x000F0000
58#define LB_D2_MAX_REQ_OUTSTANDING_SHIFT 16
59#define DCP_CONTROL 0x6C9C
60#define D2MODE_PRIORITY_A_CNT 0x6D48
61#define D2MODE_PRIORITY_B_CNT 0x6D4C
62
63/* MC indirect registers */
64#define MC_STATUS_IDLE (1 << 0)
65#define MC_MISC_CNTL 0x18
66#define DISABLE_GTW (1 << 1)
67#define GART_INDEX_REG_EN (1 << 12)
68#define BLOCK_GFX_D3_EN (1 << 14)
69#define GART_FEATURE_ID 0x2B
70#define HANG_EN (1 << 11)
71#define TLB_ENABLE (1 << 18)
72#define P2P_ENABLE (1 << 19)
73#define GTW_LAC_EN (1 << 25)
74#define LEVEL2_GART (0 << 30)
75#define LEVEL1_GART (1 << 30)
76#define PDC_EN (1 << 31)
77#define GART_BASE 0x2C
78#define GART_CACHE_CNTRL 0x2E
79# define GART_CACHE_INVALIDATE (1 << 0)
80#define MC_STATUS 0x90
81#define MCCFG_FB_LOCATION 0x100
82#define MC_FB_START_MASK 0x0000FFFF
83#define MC_FB_START_SHIFT 0
84#define MC_FB_TOP_MASK 0xFFFF0000
85#define MC_FB_TOP_SHIFT 16
86#define MCCFG_AGP_LOCATION 0x101
87#define MC_AGP_START_MASK 0x0000FFFF
88#define MC_AGP_START_SHIFT 0
89#define MC_AGP_TOP_MASK 0xFFFF0000
90#define MC_AGP_TOP_SHIFT 16
91#define MCCFG_AGP_BASE 0x102
92#define MCCFG_AGP_BASE_2 0x103
93#define MC_INIT_MISC_LAT_TIMER 0x104
94#define MC_DISP0R_INIT_LAT_SHIFT 8
95#define MC_DISP0R_INIT_LAT_MASK 0x00000F00
96#define MC_DISP1R_INIT_LAT_SHIFT 12
97#define MC_DISP1R_INIT_LAT_MASK 0x0000F000
98
99#endif
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index ffea37b1b3e2..fd8f3ca716ea 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -27,8 +27,9 @@
27 */ 27 */
28#include <linux/seq_file.h> 28#include <linux/seq_file.h>
29#include "drmP.h" 29#include "drmP.h"
30#include "radeon_reg.h" 30#include "rv515r.h"
31#include "radeon.h" 31#include "radeon.h"
32#include "radeon_share.h"
32 33
33/* rv515 depends on : */ 34/* rv515 depends on : */
34void r100_hdp_reset(struct radeon_device *rdev); 35void r100_hdp_reset(struct radeon_device *rdev);
@@ -99,26 +100,26 @@ int rv515_mc_init(struct radeon_device *rdev)
99 "programming pipes. Bad things might happen.\n"); 100 "programming pipes. Bad things might happen.\n");
100 } 101 }
101 /* Write VRAM size in case we are limiting it */ 102 /* Write VRAM size in case we are limiting it */
102 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); 103 WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.real_vram_size);
103 tmp = REG_SET(RV515_MC_FB_START, rdev->mc.vram_location >> 16); 104 tmp = REG_SET(MC_FB_START, rdev->mc.vram_location >> 16);
104 WREG32(0x134, tmp); 105 WREG32(0x134, tmp);
105 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 106 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
106 tmp = REG_SET(RV515_MC_FB_TOP, tmp >> 16); 107 tmp = REG_SET(MC_FB_TOP, tmp >> 16);
107 tmp |= REG_SET(RV515_MC_FB_START, rdev->mc.vram_location >> 16); 108 tmp |= REG_SET(MC_FB_START, rdev->mc.vram_location >> 16);
108 WREG32_MC(RV515_MC_FB_LOCATION, tmp); 109 WREG32_MC(MC_FB_LOCATION, tmp);
109 WREG32(RS690_HDP_FB_LOCATION, rdev->mc.vram_location >> 16); 110 WREG32(HDP_FB_LOCATION, rdev->mc.vram_location >> 16);
110 WREG32(0x310, rdev->mc.vram_location); 111 WREG32(0x310, rdev->mc.vram_location);
111 if (rdev->flags & RADEON_IS_AGP) { 112 if (rdev->flags & RADEON_IS_AGP) {
112 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1; 113 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 1;
113 tmp = REG_SET(RV515_MC_AGP_TOP, tmp >> 16); 114 tmp = REG_SET(MC_AGP_TOP, tmp >> 16);
114 tmp |= REG_SET(RV515_MC_AGP_START, rdev->mc.gtt_location >> 16); 115 tmp |= REG_SET(MC_AGP_START, rdev->mc.gtt_location >> 16);
115 WREG32_MC(RV515_MC_AGP_LOCATION, tmp); 116 WREG32_MC(MC_AGP_LOCATION, tmp);
116 WREG32_MC(RV515_MC_AGP_BASE, rdev->mc.agp_base); 117 WREG32_MC(MC_AGP_BASE, rdev->mc.agp_base);
117 WREG32_MC(RV515_MC_AGP_BASE_2, 0); 118 WREG32_MC(MC_AGP_BASE_2, 0);
118 } else { 119 } else {
119 WREG32_MC(RV515_MC_AGP_LOCATION, 0x0FFFFFFF); 120 WREG32_MC(MC_AGP_LOCATION, 0x0FFFFFFF);
120 WREG32_MC(RV515_MC_AGP_BASE, 0); 121 WREG32_MC(MC_AGP_BASE, 0);
121 WREG32_MC(RV515_MC_AGP_BASE_2, 0); 122 WREG32_MC(MC_AGP_BASE_2, 0);
122 } 123 }
123 return 0; 124 return 0;
124} 125}
@@ -136,95 +137,67 @@ void rv515_mc_fini(struct radeon_device *rdev)
136 */ 137 */
137void rv515_ring_start(struct radeon_device *rdev) 138void rv515_ring_start(struct radeon_device *rdev)
138{ 139{
139 unsigned gb_tile_config;
140 int r; 140 int r;
141 141
142 /* Sub pixel 1/12 so we can have 4K rendering according to doc */
143 gb_tile_config = R300_ENABLE_TILING | R300_TILE_SIZE_16;
144 switch (rdev->num_gb_pipes) {
145 case 2:
146 gb_tile_config |= R300_PIPE_COUNT_R300;
147 break;
148 case 3:
149 gb_tile_config |= R300_PIPE_COUNT_R420_3P;
150 break;
151 case 4:
152 gb_tile_config |= R300_PIPE_COUNT_R420;
153 break;
154 case 1:
155 default:
156 gb_tile_config |= R300_PIPE_COUNT_RV350;
157 break;
158 }
159
160 r = radeon_ring_lock(rdev, 64); 142 r = radeon_ring_lock(rdev, 64);
161 if (r) { 143 if (r) {
162 return; 144 return;
163 } 145 }
164 radeon_ring_write(rdev, PACKET0(RADEON_ISYNC_CNTL, 0)); 146 radeon_ring_write(rdev, PACKET0(ISYNC_CNTL, 0));
165 radeon_ring_write(rdev,
166 RADEON_ISYNC_ANY2D_IDLE3D |
167 RADEON_ISYNC_ANY3D_IDLE2D |
168 RADEON_ISYNC_WAIT_IDLEGUI |
169 RADEON_ISYNC_CPSCRATCH_IDLEGUI);
170 radeon_ring_write(rdev, PACKET0(R300_GB_TILE_CONFIG, 0));
171 radeon_ring_write(rdev, gb_tile_config);
172 radeon_ring_write(rdev, PACKET0(RADEON_WAIT_UNTIL, 0));
173 radeon_ring_write(rdev, 147 radeon_ring_write(rdev,
174 RADEON_WAIT_2D_IDLECLEAN | 148 ISYNC_ANY2D_IDLE3D |
175 RADEON_WAIT_3D_IDLECLEAN); 149 ISYNC_ANY3D_IDLE2D |
150 ISYNC_WAIT_IDLEGUI |
151 ISYNC_CPSCRATCH_IDLEGUI);
152 radeon_ring_write(rdev, PACKET0(WAIT_UNTIL, 0));
153 radeon_ring_write(rdev, WAIT_2D_IDLECLEAN | WAIT_3D_IDLECLEAN);
176 radeon_ring_write(rdev, PACKET0(0x170C, 0)); 154 radeon_ring_write(rdev, PACKET0(0x170C, 0));
177 radeon_ring_write(rdev, 1 << 31); 155 radeon_ring_write(rdev, 1 << 31);
178 radeon_ring_write(rdev, PACKET0(R300_GB_SELECT, 0)); 156 radeon_ring_write(rdev, PACKET0(GB_SELECT, 0));
179 radeon_ring_write(rdev, 0); 157 radeon_ring_write(rdev, 0);
180 radeon_ring_write(rdev, PACKET0(R300_GB_ENABLE, 0)); 158 radeon_ring_write(rdev, PACKET0(GB_ENABLE, 0));
181 radeon_ring_write(rdev, 0); 159 radeon_ring_write(rdev, 0);
182 radeon_ring_write(rdev, PACKET0(0x42C8, 0)); 160 radeon_ring_write(rdev, PACKET0(0x42C8, 0));
183 radeon_ring_write(rdev, (1 << rdev->num_gb_pipes) - 1); 161 radeon_ring_write(rdev, (1 << rdev->num_gb_pipes) - 1);
184 radeon_ring_write(rdev, PACKET0(R500_VAP_INDEX_OFFSET, 0)); 162 radeon_ring_write(rdev, PACKET0(VAP_INDEX_OFFSET, 0));
185 radeon_ring_write(rdev, 0); 163 radeon_ring_write(rdev, 0);
186 radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); 164 radeon_ring_write(rdev, PACKET0(RB3D_DSTCACHE_CTLSTAT, 0));
187 radeon_ring_write(rdev, R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE); 165 radeon_ring_write(rdev, RB3D_DC_FLUSH | RB3D_DC_FREE);
188 radeon_ring_write(rdev, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0)); 166 radeon_ring_write(rdev, PACKET0(ZB_ZCACHE_CTLSTAT, 0));
189 radeon_ring_write(rdev, R300_ZC_FLUSH | R300_ZC_FREE); 167 radeon_ring_write(rdev, ZC_FLUSH | ZC_FREE);
190 radeon_ring_write(rdev, PACKET0(RADEON_WAIT_UNTIL, 0)); 168 radeon_ring_write(rdev, PACKET0(WAIT_UNTIL, 0));
191 radeon_ring_write(rdev, 169 radeon_ring_write(rdev, WAIT_2D_IDLECLEAN | WAIT_3D_IDLECLEAN);
192 RADEON_WAIT_2D_IDLECLEAN | 170 radeon_ring_write(rdev, PACKET0(GB_AA_CONFIG, 0));
193 RADEON_WAIT_3D_IDLECLEAN);
194 radeon_ring_write(rdev, PACKET0(R300_GB_AA_CONFIG, 0));
195 radeon_ring_write(rdev, 0); 171 radeon_ring_write(rdev, 0);
196 radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0)); 172 radeon_ring_write(rdev, PACKET0(RB3D_DSTCACHE_CTLSTAT, 0));
197 radeon_ring_write(rdev, R300_RB3D_DC_FLUSH | R300_RB3D_DC_FREE); 173 radeon_ring_write(rdev, RB3D_DC_FLUSH | RB3D_DC_FREE);
198 radeon_ring_write(rdev, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0)); 174 radeon_ring_write(rdev, PACKET0(ZB_ZCACHE_CTLSTAT, 0));
199 radeon_ring_write(rdev, R300_ZC_FLUSH | R300_ZC_FREE); 175 radeon_ring_write(rdev, ZC_FLUSH | ZC_FREE);
200 radeon_ring_write(rdev, PACKET0(R300_GB_MSPOS0, 0)); 176 radeon_ring_write(rdev, PACKET0(GB_MSPOS0, 0));
201 radeon_ring_write(rdev,
202 ((6 << R300_MS_X0_SHIFT) |
203 (6 << R300_MS_Y0_SHIFT) |
204 (6 << R300_MS_X1_SHIFT) |
205 (6 << R300_MS_Y1_SHIFT) |
206 (6 << R300_MS_X2_SHIFT) |
207 (6 << R300_MS_Y2_SHIFT) |
208 (6 << R300_MSBD0_Y_SHIFT) |
209 (6 << R300_MSBD0_X_SHIFT)));
210 radeon_ring_write(rdev, PACKET0(R300_GB_MSPOS1, 0));
211 radeon_ring_write(rdev, 177 radeon_ring_write(rdev,
212 ((6 << R300_MS_X3_SHIFT) | 178 ((6 << MS_X0_SHIFT) |
213 (6 << R300_MS_Y3_SHIFT) | 179 (6 << MS_Y0_SHIFT) |
214 (6 << R300_MS_X4_SHIFT) | 180 (6 << MS_X1_SHIFT) |
215 (6 << R300_MS_Y4_SHIFT) | 181 (6 << MS_Y1_SHIFT) |
216 (6 << R300_MS_X5_SHIFT) | 182 (6 << MS_X2_SHIFT) |
217 (6 << R300_MS_Y5_SHIFT) | 183 (6 << MS_Y2_SHIFT) |
218 (6 << R300_MSBD1_SHIFT))); 184 (6 << MSBD0_Y_SHIFT) |
219 radeon_ring_write(rdev, PACKET0(R300_GA_ENHANCE, 0)); 185 (6 << MSBD0_X_SHIFT)));
220 radeon_ring_write(rdev, R300_GA_DEADLOCK_CNTL | R300_GA_FASTSYNC_CNTL); 186 radeon_ring_write(rdev, PACKET0(GB_MSPOS1, 0));
221 radeon_ring_write(rdev, PACKET0(R300_GA_POLY_MODE, 0));
222 radeon_ring_write(rdev, 187 radeon_ring_write(rdev,
223 R300_FRONT_PTYPE_TRIANGE | R300_BACK_PTYPE_TRIANGE); 188 ((6 << MS_X3_SHIFT) |
224 radeon_ring_write(rdev, PACKET0(R300_GA_ROUND_MODE, 0)); 189 (6 << MS_Y3_SHIFT) |
225 radeon_ring_write(rdev, 190 (6 << MS_X4_SHIFT) |
226 R300_GEOMETRY_ROUND_NEAREST | 191 (6 << MS_Y4_SHIFT) |
227 R300_COLOR_ROUND_NEAREST); 192 (6 << MS_X5_SHIFT) |
193 (6 << MS_Y5_SHIFT) |
194 (6 << MSBD1_SHIFT)));
195 radeon_ring_write(rdev, PACKET0(GA_ENHANCE, 0));
196 radeon_ring_write(rdev, GA_DEADLOCK_CNTL | GA_FASTSYNC_CNTL);
197 radeon_ring_write(rdev, PACKET0(GA_POLY_MODE, 0));
198 radeon_ring_write(rdev, FRONT_PTYPE_TRIANGE | BACK_PTYPE_TRIANGE);
199 radeon_ring_write(rdev, PACKET0(GA_ROUND_MODE, 0));
200 radeon_ring_write(rdev, GEOMETRY_ROUND_NEAREST | COLOR_ROUND_NEAREST);
228 radeon_ring_write(rdev, PACKET0(0x20C8, 0)); 201 radeon_ring_write(rdev, PACKET0(0x20C8, 0));
229 radeon_ring_write(rdev, 0); 202 radeon_ring_write(rdev, 0);
230 radeon_ring_unlock_commit(rdev); 203 radeon_ring_unlock_commit(rdev);
@@ -242,8 +215,8 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev)
242 215
243 for (i = 0; i < rdev->usec_timeout; i++) { 216 for (i = 0; i < rdev->usec_timeout; i++) {
244 /* read MC_STATUS */ 217 /* read MC_STATUS */
245 tmp = RREG32_MC(RV515_MC_STATUS); 218 tmp = RREG32_MC(MC_STATUS);
246 if (tmp & RV515_MC_STATUS_IDLE) { 219 if (tmp & MC_STATUS_IDLE) {
247 return 0; 220 return 0;
248 } 221 }
249 DRM_UDELAY(1); 222 DRM_UDELAY(1);
@@ -291,33 +264,33 @@ int rv515_ga_reset(struct radeon_device *rdev)
291 reinit_cp = rdev->cp.ready; 264 reinit_cp = rdev->cp.ready;
292 rdev->cp.ready = false; 265 rdev->cp.ready = false;
293 for (i = 0; i < rdev->usec_timeout; i++) { 266 for (i = 0; i < rdev->usec_timeout; i++) {
294 WREG32(RADEON_CP_CSQ_MODE, 0); 267 WREG32(CP_CSQ_MODE, 0);
295 WREG32(RADEON_CP_CSQ_CNTL, 0); 268 WREG32(CP_CSQ_CNTL, 0);
296 WREG32(RADEON_RBBM_SOFT_RESET, 0x32005); 269 WREG32(RBBM_SOFT_RESET, 0x32005);
297 (void)RREG32(RADEON_RBBM_SOFT_RESET); 270 (void)RREG32(RBBM_SOFT_RESET);
298 udelay(200); 271 udelay(200);
299 WREG32(RADEON_RBBM_SOFT_RESET, 0); 272 WREG32(RBBM_SOFT_RESET, 0);
300 /* Wait to prevent race in RBBM_STATUS */ 273 /* Wait to prevent race in RBBM_STATUS */
301 mdelay(1); 274 mdelay(1);
302 tmp = RREG32(RADEON_RBBM_STATUS); 275 tmp = RREG32(RBBM_STATUS);
303 if (tmp & ((1 << 20) | (1 << 26))) { 276 if (tmp & ((1 << 20) | (1 << 26))) {
304 DRM_ERROR("VAP & CP still busy (RBBM_STATUS=0x%08X)\n", tmp); 277 DRM_ERROR("VAP & CP still busy (RBBM_STATUS=0x%08X)\n", tmp);
305 /* GA still busy soft reset it */ 278 /* GA still busy soft reset it */
306 WREG32(0x429C, 0x200); 279 WREG32(0x429C, 0x200);
307 WREG32(R300_VAP_PVS_STATE_FLUSH_REG, 0); 280 WREG32(VAP_PVS_STATE_FLUSH_REG, 0);
308 WREG32(0x43E0, 0); 281 WREG32(0x43E0, 0);
309 WREG32(0x43E4, 0); 282 WREG32(0x43E4, 0);
310 WREG32(0x24AC, 0); 283 WREG32(0x24AC, 0);
311 } 284 }
312 /* Wait to prevent race in RBBM_STATUS */ 285 /* Wait to prevent race in RBBM_STATUS */
313 mdelay(1); 286 mdelay(1);
314 tmp = RREG32(RADEON_RBBM_STATUS); 287 tmp = RREG32(RBBM_STATUS);
315 if (!(tmp & ((1 << 20) | (1 << 26)))) { 288 if (!(tmp & ((1 << 20) | (1 << 26)))) {
316 break; 289 break;
317 } 290 }
318 } 291 }
319 for (i = 0; i < rdev->usec_timeout; i++) { 292 for (i = 0; i < rdev->usec_timeout; i++) {
320 tmp = RREG32(RADEON_RBBM_STATUS); 293 tmp = RREG32(RBBM_STATUS);
321 if (!(tmp & ((1 << 20) | (1 << 26)))) { 294 if (!(tmp & ((1 << 20) | (1 << 26)))) {
322 DRM_INFO("GA reset succeed (RBBM_STATUS=0x%08X)\n", 295 DRM_INFO("GA reset succeed (RBBM_STATUS=0x%08X)\n",
323 tmp); 296 tmp);
@@ -331,7 +304,7 @@ int rv515_ga_reset(struct radeon_device *rdev)
331 } 304 }
332 DRM_UDELAY(1); 305 DRM_UDELAY(1);
333 } 306 }
334 tmp = RREG32(RADEON_RBBM_STATUS); 307 tmp = RREG32(RBBM_STATUS);
335 DRM_ERROR("Failed to reset GA ! (RBBM_STATUS=0x%08X)\n", tmp); 308 DRM_ERROR("Failed to reset GA ! (RBBM_STATUS=0x%08X)\n", tmp);
336 return -1; 309 return -1;
337} 310}
@@ -341,7 +314,7 @@ int rv515_gpu_reset(struct radeon_device *rdev)
341 uint32_t status; 314 uint32_t status;
342 315
343 /* reset order likely matter */ 316 /* reset order likely matter */
344 status = RREG32(RADEON_RBBM_STATUS); 317 status = RREG32(RBBM_STATUS);
345 /* reset HDP */ 318 /* reset HDP */
346 r100_hdp_reset(rdev); 319 r100_hdp_reset(rdev);
347 /* reset rb2d */ 320 /* reset rb2d */
@@ -353,12 +326,12 @@ int rv515_gpu_reset(struct radeon_device *rdev)
353 rv515_ga_reset(rdev); 326 rv515_ga_reset(rdev);
354 } 327 }
355 /* reset CP */ 328 /* reset CP */
356 status = RREG32(RADEON_RBBM_STATUS); 329 status = RREG32(RBBM_STATUS);
357 if (status & (1 << 16)) { 330 if (status & (1 << 16)) {
358 r100_cp_reset(rdev); 331 r100_cp_reset(rdev);
359 } 332 }
360 /* Check if GPU is idle */ 333 /* Check if GPU is idle */
361 status = RREG32(RADEON_RBBM_STATUS); 334 status = RREG32(RBBM_STATUS);
362 if (status & (1 << 31)) { 335 if (status & (1 << 31)) {
363 DRM_ERROR("Failed to reset GPU (RBBM_STATUS=0x%08X)\n", status); 336 DRM_ERROR("Failed to reset GPU (RBBM_STATUS=0x%08X)\n", status);
364 return -1; 337 return -1;
@@ -377,8 +350,7 @@ static void rv515_vram_get_type(struct radeon_device *rdev)
377 350
378 rdev->mc.vram_width = 128; 351 rdev->mc.vram_width = 128;
379 rdev->mc.vram_is_ddr = true; 352 rdev->mc.vram_is_ddr = true;
380 tmp = RREG32_MC(RV515_MC_CNTL); 353 tmp = RREG32_MC(RV515_MC_CNTL) & MEM_NUM_CHANNELS_MASK;
381 tmp &= RV515_MEM_NUM_CHANNELS_MASK;
382 switch (tmp) { 354 switch (tmp) {
383 case 0: 355 case 0:
384 rdev->mc.vram_width = 64; 356 rdev->mc.vram_width = 64;
@@ -394,11 +366,17 @@ static void rv515_vram_get_type(struct radeon_device *rdev)
394 366
395void rv515_vram_info(struct radeon_device *rdev) 367void rv515_vram_info(struct radeon_device *rdev)
396{ 368{
369 fixed20_12 a;
370
397 rv515_vram_get_type(rdev); 371 rv515_vram_get_type(rdev);
398 rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE);
399 372
400 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 373 r100_vram_init_sizes(rdev);
401 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 374 /* FIXME: we should enforce default clock in case GPU is not in
375 * default setup
376 */
377 a.full = rfixed_const(100);
378 rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
379 rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
402} 380}
403 381
404 382
@@ -409,35 +387,35 @@ uint32_t rv515_mc_rreg(struct radeon_device *rdev, uint32_t reg)
409{ 387{
410 uint32_t r; 388 uint32_t r;
411 389
412 WREG32(R520_MC_IND_INDEX, 0x7f0000 | (reg & 0xffff)); 390 WREG32(MC_IND_INDEX, 0x7f0000 | (reg & 0xffff));
413 r = RREG32(R520_MC_IND_DATA); 391 r = RREG32(MC_IND_DATA);
414 WREG32(R520_MC_IND_INDEX, 0); 392 WREG32(MC_IND_INDEX, 0);
415 return r; 393 return r;
416} 394}
417 395
418void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) 396void rv515_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
419{ 397{
420 WREG32(R520_MC_IND_INDEX, 0xff0000 | ((reg) & 0xffff)); 398 WREG32(MC_IND_INDEX, 0xff0000 | ((reg) & 0xffff));
421 WREG32(R520_MC_IND_DATA, (v)); 399 WREG32(MC_IND_DATA, (v));
422 WREG32(R520_MC_IND_INDEX, 0); 400 WREG32(MC_IND_INDEX, 0);
423} 401}
424 402
425uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg) 403uint32_t rv515_pcie_rreg(struct radeon_device *rdev, uint32_t reg)
426{ 404{
427 uint32_t r; 405 uint32_t r;
428 406
429 WREG32(RADEON_PCIE_INDEX, ((reg) & 0x7ff)); 407 WREG32(PCIE_INDEX, ((reg) & 0x7ff));
430 (void)RREG32(RADEON_PCIE_INDEX); 408 (void)RREG32(PCIE_INDEX);
431 r = RREG32(RADEON_PCIE_DATA); 409 r = RREG32(PCIE_DATA);
432 return r; 410 return r;
433} 411}
434 412
435void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v) 413void rv515_pcie_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v)
436{ 414{
437 WREG32(RADEON_PCIE_INDEX, ((reg) & 0x7ff)); 415 WREG32(PCIE_INDEX, ((reg) & 0x7ff));
438 (void)RREG32(RADEON_PCIE_INDEX); 416 (void)RREG32(PCIE_INDEX);
439 WREG32(RADEON_PCIE_DATA, (v)); 417 WREG32(PCIE_DATA, (v));
440 (void)RREG32(RADEON_PCIE_DATA); 418 (void)RREG32(PCIE_DATA);
441} 419}
442 420
443 421
@@ -452,13 +430,13 @@ static int rv515_debugfs_pipes_info(struct seq_file *m, void *data)
452 struct radeon_device *rdev = dev->dev_private; 430 struct radeon_device *rdev = dev->dev_private;
453 uint32_t tmp; 431 uint32_t tmp;
454 432
455 tmp = RREG32(R400_GB_PIPE_SELECT); 433 tmp = RREG32(GB_PIPE_SELECT);
456 seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp); 434 seq_printf(m, "GB_PIPE_SELECT 0x%08x\n", tmp);
457 tmp = RREG32(R500_SU_REG_DEST); 435 tmp = RREG32(SU_REG_DEST);
458 seq_printf(m, "SU_REG_DEST 0x%08x\n", tmp); 436 seq_printf(m, "SU_REG_DEST 0x%08x\n", tmp);
459 tmp = RREG32(R300_GB_TILE_CONFIG); 437 tmp = RREG32(GB_TILE_CONFIG);
460 seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp); 438 seq_printf(m, "GB_TILE_CONFIG 0x%08x\n", tmp);
461 tmp = RREG32(R300_DST_PIPE_CONFIG); 439 tmp = RREG32(DST_PIPE_CONFIG);
462 seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp); 440 seq_printf(m, "DST_PIPE_CONFIG 0x%08x\n", tmp);
463 return 0; 441 return 0;
464} 442}
@@ -509,9 +487,9 @@ int rv515_debugfs_ga_info_init(struct radeon_device *rdev)
509/* 487/*
510 * Asic initialization 488 * Asic initialization
511 */ 489 */
512static const unsigned r500_reg_safe_bm[159] = { 490static const unsigned r500_reg_safe_bm[219] = {
491 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
513 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 492 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
514 0xFFFFFFBF, 0xFFFFFFFF, 0xFFFFFFBF, 0xFFFFFFFF,
515 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 493 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
516 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 494 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
517 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 495 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
@@ -549,14 +527,575 @@ static const unsigned r500_reg_safe_bm[159] = {
549 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 527 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
550 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFF80FFFF, 528 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFF80FFFF,
551 0x00000000, 0x00000000, 0x00000000, 0x00000000, 529 0x00000000, 0x00000000, 0x00000000, 0x00000000,
552 0x0003FC01, 0x3FFFFCF8, 0xFE800B19, 530 0x0003FC01, 0x3FFFFCF8, 0xFE800B19, 0xFFFFFFFF,
531 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
532 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
533 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
534 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
535 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
536 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
537 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
538 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
539 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
540 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
541 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
542 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
543 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
544 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
545 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF,
553}; 546};
554 547
555
556
557int rv515_init(struct radeon_device *rdev) 548int rv515_init(struct radeon_device *rdev)
558{ 549{
559 rdev->config.r300.reg_safe_bm = r500_reg_safe_bm; 550 rdev->config.r300.reg_safe_bm = r500_reg_safe_bm;
560 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r500_reg_safe_bm); 551 rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r500_reg_safe_bm);
561 return 0; 552 return 0;
562} 553}
554
555void atom_rv515_force_tv_scaler(struct radeon_device *rdev)
556{
557
558 WREG32(0x659C, 0x0);
559 WREG32(0x6594, 0x705);
560 WREG32(0x65A4, 0x10001);
561 WREG32(0x65D8, 0x0);
562 WREG32(0x65B0, 0x0);
563 WREG32(0x65C0, 0x0);
564 WREG32(0x65D4, 0x0);
565 WREG32(0x6578, 0x0);
566 WREG32(0x657C, 0x841880A8);
567 WREG32(0x6578, 0x1);
568 WREG32(0x657C, 0x84208680);
569 WREG32(0x6578, 0x2);
570 WREG32(0x657C, 0xBFF880B0);
571 WREG32(0x6578, 0x100);
572 WREG32(0x657C, 0x83D88088);
573 WREG32(0x6578, 0x101);
574 WREG32(0x657C, 0x84608680);
575 WREG32(0x6578, 0x102);
576 WREG32(0x657C, 0xBFF080D0);
577 WREG32(0x6578, 0x200);
578 WREG32(0x657C, 0x83988068);
579 WREG32(0x6578, 0x201);
580 WREG32(0x657C, 0x84A08680);
581 WREG32(0x6578, 0x202);
582 WREG32(0x657C, 0xBFF080F8);
583 WREG32(0x6578, 0x300);
584 WREG32(0x657C, 0x83588058);
585 WREG32(0x6578, 0x301);
586 WREG32(0x657C, 0x84E08660);
587 WREG32(0x6578, 0x302);
588 WREG32(0x657C, 0xBFF88120);
589 WREG32(0x6578, 0x400);
590 WREG32(0x657C, 0x83188040);
591 WREG32(0x6578, 0x401);
592 WREG32(0x657C, 0x85008660);
593 WREG32(0x6578, 0x402);
594 WREG32(0x657C, 0xBFF88150);
595 WREG32(0x6578, 0x500);
596 WREG32(0x657C, 0x82D88030);
597 WREG32(0x6578, 0x501);
598 WREG32(0x657C, 0x85408640);
599 WREG32(0x6578, 0x502);
600 WREG32(0x657C, 0xBFF88180);
601 WREG32(0x6578, 0x600);
602 WREG32(0x657C, 0x82A08018);
603 WREG32(0x6578, 0x601);
604 WREG32(0x657C, 0x85808620);
605 WREG32(0x6578, 0x602);
606 WREG32(0x657C, 0xBFF081B8);
607 WREG32(0x6578, 0x700);
608 WREG32(0x657C, 0x82608010);
609 WREG32(0x6578, 0x701);
610 WREG32(0x657C, 0x85A08600);
611 WREG32(0x6578, 0x702);
612 WREG32(0x657C, 0x800081F0);
613 WREG32(0x6578, 0x800);
614 WREG32(0x657C, 0x8228BFF8);
615 WREG32(0x6578, 0x801);
616 WREG32(0x657C, 0x85E085E0);
617 WREG32(0x6578, 0x802);
618 WREG32(0x657C, 0xBFF88228);
619 WREG32(0x6578, 0x10000);
620 WREG32(0x657C, 0x82A8BF00);
621 WREG32(0x6578, 0x10001);
622 WREG32(0x657C, 0x82A08CC0);
623 WREG32(0x6578, 0x10002);
624 WREG32(0x657C, 0x8008BEF8);
625 WREG32(0x6578, 0x10100);
626 WREG32(0x657C, 0x81F0BF28);
627 WREG32(0x6578, 0x10101);
628 WREG32(0x657C, 0x83608CA0);
629 WREG32(0x6578, 0x10102);
630 WREG32(0x657C, 0x8018BED0);
631 WREG32(0x6578, 0x10200);
632 WREG32(0x657C, 0x8148BF38);
633 WREG32(0x6578, 0x10201);
634 WREG32(0x657C, 0x84408C80);
635 WREG32(0x6578, 0x10202);
636 WREG32(0x657C, 0x8008BEB8);
637 WREG32(0x6578, 0x10300);
638 WREG32(0x657C, 0x80B0BF78);
639 WREG32(0x6578, 0x10301);
640 WREG32(0x657C, 0x85008C20);
641 WREG32(0x6578, 0x10302);
642 WREG32(0x657C, 0x8020BEA0);
643 WREG32(0x6578, 0x10400);
644 WREG32(0x657C, 0x8028BF90);
645 WREG32(0x6578, 0x10401);
646 WREG32(0x657C, 0x85E08BC0);
647 WREG32(0x6578, 0x10402);
648 WREG32(0x657C, 0x8018BE90);
649 WREG32(0x6578, 0x10500);
650 WREG32(0x657C, 0xBFB8BFB0);
651 WREG32(0x6578, 0x10501);
652 WREG32(0x657C, 0x86C08B40);
653 WREG32(0x6578, 0x10502);
654 WREG32(0x657C, 0x8010BE90);
655 WREG32(0x6578, 0x10600);
656 WREG32(0x657C, 0xBF58BFC8);
657 WREG32(0x6578, 0x10601);
658 WREG32(0x657C, 0x87A08AA0);
659 WREG32(0x6578, 0x10602);
660 WREG32(0x657C, 0x8010BE98);
661 WREG32(0x6578, 0x10700);
662 WREG32(0x657C, 0xBF10BFF0);
663 WREG32(0x6578, 0x10701);
664 WREG32(0x657C, 0x886089E0);
665 WREG32(0x6578, 0x10702);
666 WREG32(0x657C, 0x8018BEB0);
667 WREG32(0x6578, 0x10800);
668 WREG32(0x657C, 0xBED8BFE8);
669 WREG32(0x6578, 0x10801);
670 WREG32(0x657C, 0x89408940);
671 WREG32(0x6578, 0x10802);
672 WREG32(0x657C, 0xBFE8BED8);
673 WREG32(0x6578, 0x20000);
674 WREG32(0x657C, 0x80008000);
675 WREG32(0x6578, 0x20001);
676 WREG32(0x657C, 0x90008000);
677 WREG32(0x6578, 0x20002);
678 WREG32(0x657C, 0x80008000);
679 WREG32(0x6578, 0x20003);
680 WREG32(0x657C, 0x80008000);
681 WREG32(0x6578, 0x20100);
682 WREG32(0x657C, 0x80108000);
683 WREG32(0x6578, 0x20101);
684 WREG32(0x657C, 0x8FE0BF70);
685 WREG32(0x6578, 0x20102);
686 WREG32(0x657C, 0xBFE880C0);
687 WREG32(0x6578, 0x20103);
688 WREG32(0x657C, 0x80008000);
689 WREG32(0x6578, 0x20200);
690 WREG32(0x657C, 0x8018BFF8);
691 WREG32(0x6578, 0x20201);
692 WREG32(0x657C, 0x8F80BF08);
693 WREG32(0x6578, 0x20202);
694 WREG32(0x657C, 0xBFD081A0);
695 WREG32(0x6578, 0x20203);
696 WREG32(0x657C, 0xBFF88000);
697 WREG32(0x6578, 0x20300);
698 WREG32(0x657C, 0x80188000);
699 WREG32(0x6578, 0x20301);
700 WREG32(0x657C, 0x8EE0BEC0);
701 WREG32(0x6578, 0x20302);
702 WREG32(0x657C, 0xBFB082A0);
703 WREG32(0x6578, 0x20303);
704 WREG32(0x657C, 0x80008000);
705 WREG32(0x6578, 0x20400);
706 WREG32(0x657C, 0x80188000);
707 WREG32(0x6578, 0x20401);
708 WREG32(0x657C, 0x8E00BEA0);
709 WREG32(0x6578, 0x20402);
710 WREG32(0x657C, 0xBF8883C0);
711 WREG32(0x6578, 0x20403);
712 WREG32(0x657C, 0x80008000);
713 WREG32(0x6578, 0x20500);
714 WREG32(0x657C, 0x80188000);
715 WREG32(0x6578, 0x20501);
716 WREG32(0x657C, 0x8D00BE90);
717 WREG32(0x6578, 0x20502);
718 WREG32(0x657C, 0xBF588500);
719 WREG32(0x6578, 0x20503);
720 WREG32(0x657C, 0x80008008);
721 WREG32(0x6578, 0x20600);
722 WREG32(0x657C, 0x80188000);
723 WREG32(0x6578, 0x20601);
724 WREG32(0x657C, 0x8BC0BE98);
725 WREG32(0x6578, 0x20602);
726 WREG32(0x657C, 0xBF308660);
727 WREG32(0x6578, 0x20603);
728 WREG32(0x657C, 0x80008008);
729 WREG32(0x6578, 0x20700);
730 WREG32(0x657C, 0x80108000);
731 WREG32(0x6578, 0x20701);
732 WREG32(0x657C, 0x8A80BEB0);
733 WREG32(0x6578, 0x20702);
734 WREG32(0x657C, 0xBF0087C0);
735 WREG32(0x6578, 0x20703);
736 WREG32(0x657C, 0x80008008);
737 WREG32(0x6578, 0x20800);
738 WREG32(0x657C, 0x80108000);
739 WREG32(0x6578, 0x20801);
740 WREG32(0x657C, 0x8920BED0);
741 WREG32(0x6578, 0x20802);
742 WREG32(0x657C, 0xBED08920);
743 WREG32(0x6578, 0x20803);
744 WREG32(0x657C, 0x80008010);
745 WREG32(0x6578, 0x30000);
746 WREG32(0x657C, 0x90008000);
747 WREG32(0x6578, 0x30001);
748 WREG32(0x657C, 0x80008000);
749 WREG32(0x6578, 0x30100);
750 WREG32(0x657C, 0x8FE0BF90);
751 WREG32(0x6578, 0x30101);
752 WREG32(0x657C, 0xBFF880A0);
753 WREG32(0x6578, 0x30200);
754 WREG32(0x657C, 0x8F60BF40);
755 WREG32(0x6578, 0x30201);
756 WREG32(0x657C, 0xBFE88180);
757 WREG32(0x6578, 0x30300);
758 WREG32(0x657C, 0x8EC0BF00);
759 WREG32(0x6578, 0x30301);
760 WREG32(0x657C, 0xBFC88280);
761 WREG32(0x6578, 0x30400);
762 WREG32(0x657C, 0x8DE0BEE0);
763 WREG32(0x6578, 0x30401);
764 WREG32(0x657C, 0xBFA083A0);
765 WREG32(0x6578, 0x30500);
766 WREG32(0x657C, 0x8CE0BED0);
767 WREG32(0x6578, 0x30501);
768 WREG32(0x657C, 0xBF7884E0);
769 WREG32(0x6578, 0x30600);
770 WREG32(0x657C, 0x8BA0BED8);
771 WREG32(0x6578, 0x30601);
772 WREG32(0x657C, 0xBF508640);
773 WREG32(0x6578, 0x30700);
774 WREG32(0x657C, 0x8A60BEE8);
775 WREG32(0x6578, 0x30701);
776 WREG32(0x657C, 0xBF2087A0);
777 WREG32(0x6578, 0x30800);
778 WREG32(0x657C, 0x8900BF00);
779 WREG32(0x6578, 0x30801);
780 WREG32(0x657C, 0xBF008900);
781}
782
783struct rv515_watermark {
784 u32 lb_request_fifo_depth;
785 fixed20_12 num_line_pair;
786 fixed20_12 estimated_width;
787 fixed20_12 worst_case_latency;
788 fixed20_12 consumption_rate;
789 fixed20_12 active_time;
790 fixed20_12 dbpp;
791 fixed20_12 priority_mark_max;
792 fixed20_12 priority_mark;
793 fixed20_12 sclk;
794};
795
796void rv515_crtc_bandwidth_compute(struct radeon_device *rdev,
797 struct radeon_crtc *crtc,
798 struct rv515_watermark *wm)
799{
800 struct drm_display_mode *mode = &crtc->base.mode;
801 fixed20_12 a, b, c;
802 fixed20_12 pclk, request_fifo_depth, tolerable_latency, estimated_width;
803 fixed20_12 consumption_time, line_time, chunk_time, read_delay_latency;
804
805 if (!crtc->base.enabled) {
806 /* FIXME: wouldn't it better to set priority mark to maximum */
807 wm->lb_request_fifo_depth = 4;
808 return;
809 }
810
811 if (crtc->vsc.full > rfixed_const(2))
812 wm->num_line_pair.full = rfixed_const(2);
813 else
814 wm->num_line_pair.full = rfixed_const(1);
815
816 b.full = rfixed_const(mode->crtc_hdisplay);
817 c.full = rfixed_const(256);
818 a.full = rfixed_mul(wm->num_line_pair, b);
819 request_fifo_depth.full = rfixed_div(a, c);
820 if (a.full < rfixed_const(4)) {
821 wm->lb_request_fifo_depth = 4;
822 } else {
823 wm->lb_request_fifo_depth = rfixed_trunc(request_fifo_depth);
824 }
825
826 /* Determine consumption rate
827 * pclk = pixel clock period(ns) = 1000 / (mode.clock / 1000)
828 * vtaps = number of vertical taps,
829 * vsc = vertical scaling ratio, defined as source/destination
830 * hsc = horizontal scaling ration, defined as source/destination
831 */
832 a.full = rfixed_const(mode->clock);
833 b.full = rfixed_const(1000);
834 a.full = rfixed_div(a, b);
835 pclk.full = rfixed_div(b, a);
836 if (crtc->rmx_type != RMX_OFF) {
837 b.full = rfixed_const(2);
838 if (crtc->vsc.full > b.full)
839 b.full = crtc->vsc.full;
840 b.full = rfixed_mul(b, crtc->hsc);
841 c.full = rfixed_const(2);
842 b.full = rfixed_div(b, c);
843 consumption_time.full = rfixed_div(pclk, b);
844 } else {
845 consumption_time.full = pclk.full;
846 }
847 a.full = rfixed_const(1);
848 wm->consumption_rate.full = rfixed_div(a, consumption_time);
849
850
851 /* Determine line time
852 * LineTime = total time for one line of displayhtotal
853 * LineTime = total number of horizontal pixels
854 * pclk = pixel clock period(ns)
855 */
856 a.full = rfixed_const(crtc->base.mode.crtc_htotal);
857 line_time.full = rfixed_mul(a, pclk);
858
859 /* Determine active time
860 * ActiveTime = time of active region of display within one line,
861 * hactive = total number of horizontal active pixels
862 * htotal = total number of horizontal pixels
863 */
864 a.full = rfixed_const(crtc->base.mode.crtc_htotal);
865 b.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
866 wm->active_time.full = rfixed_mul(line_time, b);
867 wm->active_time.full = rfixed_div(wm->active_time, a);
868
869 /* Determine chunk time
870 * ChunkTime = the time it takes the DCP to send one chunk of data
871 * to the LB which consists of pipeline delay and inter chunk gap
872 * sclk = system clock(Mhz)
873 */
874 a.full = rfixed_const(600 * 1000);
875 chunk_time.full = rfixed_div(a, rdev->pm.sclk);
876 read_delay_latency.full = rfixed_const(1000);
877
878 /* Determine the worst case latency
879 * NumLinePair = Number of line pairs to request(1=2 lines, 2=4 lines)
880 * WorstCaseLatency = worst case time from urgent to when the MC starts
881 * to return data
882 * READ_DELAY_IDLE_MAX = constant of 1us
883 * ChunkTime = time it takes the DCP to send one chunk of data to the LB
884 * which consists of pipeline delay and inter chunk gap
885 */
886 if (rfixed_trunc(wm->num_line_pair) > 1) {
887 a.full = rfixed_const(3);
888 wm->worst_case_latency.full = rfixed_mul(a, chunk_time);
889 wm->worst_case_latency.full += read_delay_latency.full;
890 } else {
891 wm->worst_case_latency.full = chunk_time.full + read_delay_latency.full;
892 }
893
894 /* Determine the tolerable latency
895 * TolerableLatency = Any given request has only 1 line time
896 * for the data to be returned
897 * LBRequestFifoDepth = Number of chunk requests the LB can
898 * put into the request FIFO for a display
899 * LineTime = total time for one line of display
900 * ChunkTime = the time it takes the DCP to send one chunk
901 * of data to the LB which consists of
902 * pipeline delay and inter chunk gap
903 */
904 if ((2+wm->lb_request_fifo_depth) >= rfixed_trunc(request_fifo_depth)) {
905 tolerable_latency.full = line_time.full;
906 } else {
907 tolerable_latency.full = rfixed_const(wm->lb_request_fifo_depth - 2);
908 tolerable_latency.full = request_fifo_depth.full - tolerable_latency.full;
909 tolerable_latency.full = rfixed_mul(tolerable_latency, chunk_time);
910 tolerable_latency.full = line_time.full - tolerable_latency.full;
911 }
912 /* We assume worst case 32bits (4 bytes) */
913 wm->dbpp.full = rfixed_const(2 * 16);
914
915 /* Determine the maximum priority mark
916 * width = viewport width in pixels
917 */
918 a.full = rfixed_const(16);
919 wm->priority_mark_max.full = rfixed_const(crtc->base.mode.crtc_hdisplay);
920 wm->priority_mark_max.full = rfixed_div(wm->priority_mark_max, a);
921
922 /* Determine estimated width */
923 estimated_width.full = tolerable_latency.full - wm->worst_case_latency.full;
924 estimated_width.full = rfixed_div(estimated_width, consumption_time);
925 if (rfixed_trunc(estimated_width) > crtc->base.mode.crtc_hdisplay) {
926 wm->priority_mark.full = rfixed_const(10);
927 } else {
928 a.full = rfixed_const(16);
929 wm->priority_mark.full = rfixed_div(estimated_width, a);
930 wm->priority_mark.full = wm->priority_mark_max.full - wm->priority_mark.full;
931 }
932}
933
934void rv515_bandwidth_avivo_update(struct radeon_device *rdev)
935{
936 struct drm_display_mode *mode0 = NULL;
937 struct drm_display_mode *mode1 = NULL;
938 struct rv515_watermark wm0;
939 struct rv515_watermark wm1;
940 u32 tmp;
941 fixed20_12 priority_mark02, priority_mark12, fill_rate;
942 fixed20_12 a, b;
943
944 if (rdev->mode_info.crtcs[0]->base.enabled)
945 mode0 = &rdev->mode_info.crtcs[0]->base.mode;
946 if (rdev->mode_info.crtcs[1]->base.enabled)
947 mode1 = &rdev->mode_info.crtcs[1]->base.mode;
948 rs690_line_buffer_adjust(rdev, mode0, mode1);
949
950 rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[0], &wm0);
951 rv515_crtc_bandwidth_compute(rdev, rdev->mode_info.crtcs[1], &wm1);
952
953 tmp = wm0.lb_request_fifo_depth;
954 tmp |= wm1.lb_request_fifo_depth << 16;
955 WREG32(LB_MAX_REQ_OUTSTANDING, tmp);
956
957 if (mode0 && mode1) {
958 if (rfixed_trunc(wm0.dbpp) > 64)
959 a.full = rfixed_div(wm0.dbpp, wm0.num_line_pair);
960 else
961 a.full = wm0.num_line_pair.full;
962 if (rfixed_trunc(wm1.dbpp) > 64)
963 b.full = rfixed_div(wm1.dbpp, wm1.num_line_pair);
964 else
965 b.full = wm1.num_line_pair.full;
966 a.full += b.full;
967 fill_rate.full = rfixed_div(wm0.sclk, a);
968 if (wm0.consumption_rate.full > fill_rate.full) {
969 b.full = wm0.consumption_rate.full - fill_rate.full;
970 b.full = rfixed_mul(b, wm0.active_time);
971 a.full = rfixed_const(16);
972 b.full = rfixed_div(b, a);
973 a.full = rfixed_mul(wm0.worst_case_latency,
974 wm0.consumption_rate);
975 priority_mark02.full = a.full + b.full;
976 } else {
977 a.full = rfixed_mul(wm0.worst_case_latency,
978 wm0.consumption_rate);
979 b.full = rfixed_const(16 * 1000);
980 priority_mark02.full = rfixed_div(a, b);
981 }
982 if (wm1.consumption_rate.full > fill_rate.full) {
983 b.full = wm1.consumption_rate.full - fill_rate.full;
984 b.full = rfixed_mul(b, wm1.active_time);
985 a.full = rfixed_const(16);
986 b.full = rfixed_div(b, a);
987 a.full = rfixed_mul(wm1.worst_case_latency,
988 wm1.consumption_rate);
989 priority_mark12.full = a.full + b.full;
990 } else {
991 a.full = rfixed_mul(wm1.worst_case_latency,
992 wm1.consumption_rate);
993 b.full = rfixed_const(16 * 1000);
994 priority_mark12.full = rfixed_div(a, b);
995 }
996 if (wm0.priority_mark.full > priority_mark02.full)
997 priority_mark02.full = wm0.priority_mark.full;
998 if (rfixed_trunc(priority_mark02) < 0)
999 priority_mark02.full = 0;
1000 if (wm0.priority_mark_max.full > priority_mark02.full)
1001 priority_mark02.full = wm0.priority_mark_max.full;
1002 if (wm1.priority_mark.full > priority_mark12.full)
1003 priority_mark12.full = wm1.priority_mark.full;
1004 if (rfixed_trunc(priority_mark12) < 0)
1005 priority_mark12.full = 0;
1006 if (wm1.priority_mark_max.full > priority_mark12.full)
1007 priority_mark12.full = wm1.priority_mark_max.full;
1008 WREG32(D1MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark02));
1009 WREG32(D1MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark02));
1010 WREG32(D2MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark12));
1011 WREG32(D2MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark12));
1012 } else if (mode0) {
1013 if (rfixed_trunc(wm0.dbpp) > 64)
1014 a.full = rfixed_div(wm0.dbpp, wm0.num_line_pair);
1015 else
1016 a.full = wm0.num_line_pair.full;
1017 fill_rate.full = rfixed_div(wm0.sclk, a);
1018 if (wm0.consumption_rate.full > fill_rate.full) {
1019 b.full = wm0.consumption_rate.full - fill_rate.full;
1020 b.full = rfixed_mul(b, wm0.active_time);
1021 a.full = rfixed_const(16);
1022 b.full = rfixed_div(b, a);
1023 a.full = rfixed_mul(wm0.worst_case_latency,
1024 wm0.consumption_rate);
1025 priority_mark02.full = a.full + b.full;
1026 } else {
1027 a.full = rfixed_mul(wm0.worst_case_latency,
1028 wm0.consumption_rate);
1029 b.full = rfixed_const(16);
1030 priority_mark02.full = rfixed_div(a, b);
1031 }
1032 if (wm0.priority_mark.full > priority_mark02.full)
1033 priority_mark02.full = wm0.priority_mark.full;
1034 if (rfixed_trunc(priority_mark02) < 0)
1035 priority_mark02.full = 0;
1036 if (wm0.priority_mark_max.full > priority_mark02.full)
1037 priority_mark02.full = wm0.priority_mark_max.full;
1038 WREG32(D1MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark02));
1039 WREG32(D1MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark02));
1040 WREG32(D2MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
1041 WREG32(D2MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
1042 } else {
1043 if (rfixed_trunc(wm1.dbpp) > 64)
1044 a.full = rfixed_div(wm1.dbpp, wm1.num_line_pair);
1045 else
1046 a.full = wm1.num_line_pair.full;
1047 fill_rate.full = rfixed_div(wm1.sclk, a);
1048 if (wm1.consumption_rate.full > fill_rate.full) {
1049 b.full = wm1.consumption_rate.full - fill_rate.full;
1050 b.full = rfixed_mul(b, wm1.active_time);
1051 a.full = rfixed_const(16);
1052 b.full = rfixed_div(b, a);
1053 a.full = rfixed_mul(wm1.worst_case_latency,
1054 wm1.consumption_rate);
1055 priority_mark12.full = a.full + b.full;
1056 } else {
1057 a.full = rfixed_mul(wm1.worst_case_latency,
1058 wm1.consumption_rate);
1059 b.full = rfixed_const(16 * 1000);
1060 priority_mark12.full = rfixed_div(a, b);
1061 }
1062 if (wm1.priority_mark.full > priority_mark12.full)
1063 priority_mark12.full = wm1.priority_mark.full;
1064 if (rfixed_trunc(priority_mark12) < 0)
1065 priority_mark12.full = 0;
1066 if (wm1.priority_mark_max.full > priority_mark12.full)
1067 priority_mark12.full = wm1.priority_mark_max.full;
1068 WREG32(D1MODE_PRIORITY_A_CNT, MODE_PRIORITY_OFF);
1069 WREG32(D1MODE_PRIORITY_B_CNT, MODE_PRIORITY_OFF);
1070 WREG32(D2MODE_PRIORITY_A_CNT, rfixed_trunc(priority_mark12));
1071 WREG32(D2MODE_PRIORITY_B_CNT, rfixed_trunc(priority_mark12));
1072 }
1073}
1074
1075void rv515_bandwidth_update(struct radeon_device *rdev)
1076{
1077 uint32_t tmp;
1078 struct drm_display_mode *mode0 = NULL;
1079 struct drm_display_mode *mode1 = NULL;
1080
1081 if (rdev->mode_info.crtcs[0]->base.enabled)
1082 mode0 = &rdev->mode_info.crtcs[0]->base.mode;
1083 if (rdev->mode_info.crtcs[1]->base.enabled)
1084 mode1 = &rdev->mode_info.crtcs[1]->base.mode;
1085 /*
1086 * Set display0/1 priority up in the memory controller for
1087 * modes if the user specifies HIGH for displaypriority
1088 * option.
1089 */
1090 if (rdev->disp_priority == 2) {
1091 tmp = RREG32_MC(MC_MISC_LAT_TIMER);
1092 tmp &= ~MC_DISP1R_INIT_LAT_MASK;
1093 tmp &= ~MC_DISP0R_INIT_LAT_MASK;
1094 if (mode1)
1095 tmp |= (1 << MC_DISP1R_INIT_LAT_SHIFT);
1096 if (mode0)
1097 tmp |= (1 << MC_DISP0R_INIT_LAT_SHIFT);
1098 WREG32_MC(MC_MISC_LAT_TIMER, tmp);
1099 }
1100 rv515_bandwidth_avivo_update(rdev);
1101}
diff --git a/drivers/gpu/drm/radeon/rv515r.h b/drivers/gpu/drm/radeon/rv515r.h
new file mode 100644
index 000000000000..f3cf84039906
--- /dev/null
+++ b/drivers/gpu/drm/radeon/rv515r.h
@@ -0,0 +1,170 @@
1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
28#ifndef RV515R_H
29#define RV515R_H
30
31/* RV515 registers */
32#define PCIE_INDEX 0x0030
33#define PCIE_DATA 0x0034
34#define MC_IND_INDEX 0x0070
35#define MC_IND_WR_EN (1 << 24)
36#define MC_IND_DATA 0x0074
37#define RBBM_SOFT_RESET 0x00F0
38#define CONFIG_MEMSIZE 0x00F8
39#define HDP_FB_LOCATION 0x0134
40#define CP_CSQ_CNTL 0x0740
41#define CP_CSQ_MODE 0x0744
42#define CP_CSQ_ADDR 0x07F0
43#define CP_CSQ_DATA 0x07F4
44#define CP_CSQ_STAT 0x07F8
45#define CP_CSQ2_STAT 0x07FC
46#define RBBM_STATUS 0x0E40
47#define DST_PIPE_CONFIG 0x170C
48#define WAIT_UNTIL 0x1720
49#define WAIT_2D_IDLE (1 << 14)
50#define WAIT_3D_IDLE (1 << 15)
51#define WAIT_2D_IDLECLEAN (1 << 16)
52#define WAIT_3D_IDLECLEAN (1 << 17)
53#define ISYNC_CNTL 0x1724
54#define ISYNC_ANY2D_IDLE3D (1 << 0)
55#define ISYNC_ANY3D_IDLE2D (1 << 1)
56#define ISYNC_TRIG2D_IDLE3D (1 << 2)
57#define ISYNC_TRIG3D_IDLE2D (1 << 3)
58#define ISYNC_WAIT_IDLEGUI (1 << 4)
59#define ISYNC_CPSCRATCH_IDLEGUI (1 << 5)
60#define VAP_INDEX_OFFSET 0x208C
61#define VAP_PVS_STATE_FLUSH_REG 0x2284
62#define GB_ENABLE 0x4008
63#define GB_MSPOS0 0x4010
64#define MS_X0_SHIFT 0
65#define MS_Y0_SHIFT 4
66#define MS_X1_SHIFT 8
67#define MS_Y1_SHIFT 12
68#define MS_X2_SHIFT 16
69#define MS_Y2_SHIFT 20
70#define MSBD0_Y_SHIFT 24
71#define MSBD0_X_SHIFT 28
72#define GB_MSPOS1 0x4014
73#define MS_X3_SHIFT 0
74#define MS_Y3_SHIFT 4
75#define MS_X4_SHIFT 8
76#define MS_Y4_SHIFT 12
77#define MS_X5_SHIFT 16
78#define MS_Y5_SHIFT 20
79#define MSBD1_SHIFT 24
80#define GB_TILE_CONFIG 0x4018
81#define ENABLE_TILING (1 << 0)
82#define PIPE_COUNT_MASK 0x0000000E
83#define PIPE_COUNT_SHIFT 1
84#define TILE_SIZE_8 (0 << 4)
85#define TILE_SIZE_16 (1 << 4)
86#define TILE_SIZE_32 (2 << 4)
87#define SUBPIXEL_1_12 (0 << 16)
88#define SUBPIXEL_1_16 (1 << 16)
89#define GB_SELECT 0x401C
90#define GB_AA_CONFIG 0x4020
91#define GB_PIPE_SELECT 0x402C
92#define GA_ENHANCE 0x4274
93#define GA_DEADLOCK_CNTL (1 << 0)
94#define GA_FASTSYNC_CNTL (1 << 1)
95#define GA_POLY_MODE 0x4288
96#define FRONT_PTYPE_POINT (0 << 4)
97#define FRONT_PTYPE_LINE (1 << 4)
98#define FRONT_PTYPE_TRIANGE (2 << 4)
99#define BACK_PTYPE_POINT (0 << 7)
100#define BACK_PTYPE_LINE (1 << 7)
101#define BACK_PTYPE_TRIANGE (2 << 7)
102#define GA_ROUND_MODE 0x428C
103#define GEOMETRY_ROUND_TRUNC (0 << 0)
104#define GEOMETRY_ROUND_NEAREST (1 << 0)
105#define COLOR_ROUND_TRUNC (0 << 2)
106#define COLOR_ROUND_NEAREST (1 << 2)
107#define SU_REG_DEST 0x42C8
108#define RB3D_DSTCACHE_CTLSTAT 0x4E4C
109#define RB3D_DC_FLUSH (2 << 0)
110#define RB3D_DC_FREE (2 << 2)
111#define RB3D_DC_FINISH (1 << 4)
112#define ZB_ZCACHE_CTLSTAT 0x4F18
113#define ZC_FLUSH (1 << 0)
114#define ZC_FREE (1 << 1)
115#define DC_LB_MEMORY_SPLIT 0x6520
116#define DC_LB_MEMORY_SPLIT_MASK 0x00000003
117#define DC_LB_MEMORY_SPLIT_SHIFT 0
118#define DC_LB_MEMORY_SPLIT_D1HALF_D2HALF 0
119#define DC_LB_MEMORY_SPLIT_D1_3Q_D2_1Q 1
120#define DC_LB_MEMORY_SPLIT_D1_ONLY 2
121#define DC_LB_MEMORY_SPLIT_D1_1Q_D2_3Q 3
122#define DC_LB_MEMORY_SPLIT_SHIFT_MODE (1 << 2)
123#define DC_LB_DISP1_END_ADR_SHIFT 4
124#define DC_LB_DISP1_END_ADR_MASK 0x00007FF0
125#define D1MODE_PRIORITY_A_CNT 0x6548
126#define MODE_PRIORITY_MARK_MASK 0x00007FFF
127#define MODE_PRIORITY_OFF (1 << 16)
128#define MODE_PRIORITY_ALWAYS_ON (1 << 20)
129#define MODE_PRIORITY_FORCE_MASK (1 << 24)
130#define D1MODE_PRIORITY_B_CNT 0x654C
131#define LB_MAX_REQ_OUTSTANDING 0x6D58
132#define LB_D1_MAX_REQ_OUTSTANDING_MASK 0x0000000F
133#define LB_D1_MAX_REQ_OUTSTANDING_SHIFT 0
134#define LB_D2_MAX_REQ_OUTSTANDING_MASK 0x000F0000
135#define LB_D2_MAX_REQ_OUTSTANDING_SHIFT 16
136#define D2MODE_PRIORITY_A_CNT 0x6D48
137#define D2MODE_PRIORITY_B_CNT 0x6D4C
138
139/* ix[MC] registers */
140#define MC_FB_LOCATION 0x01
141#define MC_FB_START_MASK 0x0000FFFF
142#define MC_FB_START_SHIFT 0
143#define MC_FB_TOP_MASK 0xFFFF0000
144#define MC_FB_TOP_SHIFT 16
145#define MC_AGP_LOCATION 0x02
146#define MC_AGP_START_MASK 0x0000FFFF
147#define MC_AGP_START_SHIFT 0
148#define MC_AGP_TOP_MASK 0xFFFF0000
149#define MC_AGP_TOP_SHIFT 16
150#define MC_AGP_BASE 0x03
151#define MC_AGP_BASE_2 0x04
152#define MC_CNTL 0x5
153#define MEM_NUM_CHANNELS_MASK 0x00000003
154#define MC_STATUS 0x08
155#define MC_STATUS_IDLE (1 << 4)
156#define MC_MISC_LAT_TIMER 0x09
157#define MC_CPR_INIT_LAT_MASK 0x0000000F
158#define MC_VF_INIT_LAT_MASK 0x000000F0
159#define MC_DISP0R_INIT_LAT_MASK 0x00000F00
160#define MC_DISP0R_INIT_LAT_SHIFT 8
161#define MC_DISP1R_INIT_LAT_MASK 0x0000F000
162#define MC_DISP1R_INIT_LAT_SHIFT 12
163#define MC_FIXED_INIT_LAT_MASK 0x000F0000
164#define MC_E2R_INIT_LAT_MASK 0x00F00000
165#define SAME_PAGE_PRIO_MASK 0x0F000000
166#define MC_GLOBW_INIT_LAT_MASK 0xF0000000
167
168
169#endif
170
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index da50cc51ede3..21d8ffd57308 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -67,7 +67,7 @@ int rv770_mc_init(struct radeon_device *rdev)
67 "programming pipes. Bad things might happen.\n"); 67 "programming pipes. Bad things might happen.\n");
68 } 68 }
69 69
70 tmp = rdev->mc.vram_location + rdev->mc.vram_size - 1; 70 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
71 tmp = REG_SET(R700_MC_FB_TOP, tmp >> 24); 71 tmp = REG_SET(R700_MC_FB_TOP, tmp >> 24);
72 tmp |= REG_SET(R700_MC_FB_BASE, rdev->mc.vram_location >> 24); 72 tmp |= REG_SET(R700_MC_FB_BASE, rdev->mc.vram_location >> 24);
73 WREG32(R700_MC_VM_FB_LOCATION, tmp); 73 WREG32(R700_MC_VM_FB_LOCATION, tmp);
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index c1c407f7cca3..c2b0d710d10f 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -43,7 +43,6 @@
43#define TTM_BO_HASH_ORDER 13 43#define TTM_BO_HASH_ORDER 13
44 44
45static int ttm_bo_setup_vm(struct ttm_buffer_object *bo); 45static int ttm_bo_setup_vm(struct ttm_buffer_object *bo);
46static void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo);
47static int ttm_bo_swapout(struct ttm_mem_shrink *shrink); 46static int ttm_bo_swapout(struct ttm_mem_shrink *shrink);
48 47
49static inline uint32_t ttm_bo_type_flags(unsigned type) 48static inline uint32_t ttm_bo_type_flags(unsigned type)
@@ -224,6 +223,9 @@ static int ttm_bo_add_ttm(struct ttm_buffer_object *bo, bool zero_alloc)
224 TTM_ASSERT_LOCKED(&bo->mutex); 223 TTM_ASSERT_LOCKED(&bo->mutex);
225 bo->ttm = NULL; 224 bo->ttm = NULL;
226 225
226 if (bdev->need_dma32)
227 page_flags |= TTM_PAGE_FLAG_DMA32;
228
227 switch (bo->type) { 229 switch (bo->type) {
228 case ttm_bo_type_device: 230 case ttm_bo_type_device:
229 if (zero_alloc) 231 if (zero_alloc)
@@ -304,6 +306,9 @@ static int ttm_bo_handle_move_mem(struct ttm_buffer_object *bo,
304 306
305 } 307 }
306 308
309 if (bdev->driver->move_notify)
310 bdev->driver->move_notify(bo, mem);
311
307 if (!(old_man->flags & TTM_MEMTYPE_FLAG_FIXED) && 312 if (!(old_man->flags & TTM_MEMTYPE_FLAG_FIXED) &&
308 !(new_man->flags & TTM_MEMTYPE_FLAG_FIXED)) 313 !(new_man->flags & TTM_MEMTYPE_FLAG_FIXED))
309 ret = ttm_bo_move_ttm(bo, evict, no_wait, mem); 314 ret = ttm_bo_move_ttm(bo, evict, no_wait, mem);
@@ -655,31 +660,52 @@ retry_pre_get:
655 return 0; 660 return 0;
656} 661}
657 662
663static uint32_t ttm_bo_select_caching(struct ttm_mem_type_manager *man,
664 uint32_t cur_placement,
665 uint32_t proposed_placement)
666{
667 uint32_t caching = proposed_placement & TTM_PL_MASK_CACHING;
668 uint32_t result = proposed_placement & ~TTM_PL_MASK_CACHING;
669
670 /**
671 * Keep current caching if possible.
672 */
673
674 if ((cur_placement & caching) != 0)
675 result |= (cur_placement & caching);
676 else if ((man->default_caching & caching) != 0)
677 result |= man->default_caching;
678 else if ((TTM_PL_FLAG_CACHED & caching) != 0)
679 result |= TTM_PL_FLAG_CACHED;
680 else if ((TTM_PL_FLAG_WC & caching) != 0)
681 result |= TTM_PL_FLAG_WC;
682 else if ((TTM_PL_FLAG_UNCACHED & caching) != 0)
683 result |= TTM_PL_FLAG_UNCACHED;
684
685 return result;
686}
687
688
658static bool ttm_bo_mt_compatible(struct ttm_mem_type_manager *man, 689static bool ttm_bo_mt_compatible(struct ttm_mem_type_manager *man,
659 bool disallow_fixed, 690 bool disallow_fixed,
660 uint32_t mem_type, 691 uint32_t mem_type,
661 uint32_t mask, uint32_t *res_mask) 692 uint32_t proposed_placement,
693 uint32_t *masked_placement)
662{ 694{
663 uint32_t cur_flags = ttm_bo_type_flags(mem_type); 695 uint32_t cur_flags = ttm_bo_type_flags(mem_type);
664 696
665 if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && disallow_fixed) 697 if ((man->flags & TTM_MEMTYPE_FLAG_FIXED) && disallow_fixed)
666 return false; 698 return false;
667 699
668 if ((cur_flags & mask & TTM_PL_MASK_MEM) == 0) 700 if ((cur_flags & proposed_placement & TTM_PL_MASK_MEM) == 0)
669 return false; 701 return false;
670 702
671 if ((mask & man->available_caching) == 0) 703 if ((proposed_placement & man->available_caching) == 0)
672 return false; 704 return false;
673 if (mask & man->default_caching)
674 cur_flags |= man->default_caching;
675 else if (mask & TTM_PL_FLAG_CACHED)
676 cur_flags |= TTM_PL_FLAG_CACHED;
677 else if (mask & TTM_PL_FLAG_WC)
678 cur_flags |= TTM_PL_FLAG_WC;
679 else
680 cur_flags |= TTM_PL_FLAG_UNCACHED;
681 705
682 *res_mask = cur_flags; 706 cur_flags |= (proposed_placement & man->available_caching);
707
708 *masked_placement = cur_flags;
683 return true; 709 return true;
684} 710}
685 711
@@ -723,6 +749,9 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
723 if (!type_ok) 749 if (!type_ok)
724 continue; 750 continue;
725 751
752 cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
753 cur_flags);
754
726 if (mem_type == TTM_PL_SYSTEM) 755 if (mem_type == TTM_PL_SYSTEM)
727 break; 756 break;
728 757
@@ -779,6 +808,9 @@ int ttm_bo_mem_space(struct ttm_buffer_object *bo,
779 proposed_placement, &cur_flags)) 808 proposed_placement, &cur_flags))
780 continue; 809 continue;
781 810
811 cur_flags = ttm_bo_select_caching(man, bo->mem.placement,
812 cur_flags);
813
782 ret = ttm_bo_mem_force_space(bdev, mem, mem_type, 814 ret = ttm_bo_mem_force_space(bdev, mem, mem_type,
783 interruptible, no_wait); 815 interruptible, no_wait);
784 816
@@ -1150,13 +1182,14 @@ static int ttm_bo_force_list_clean(struct ttm_bo_device *bdev,
1150 1182
1151int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type) 1183int ttm_bo_clean_mm(struct ttm_bo_device *bdev, unsigned mem_type)
1152{ 1184{
1153 struct ttm_mem_type_manager *man = &bdev->man[mem_type]; 1185 struct ttm_mem_type_manager *man;
1154 int ret = -EINVAL; 1186 int ret = -EINVAL;
1155 1187
1156 if (mem_type >= TTM_NUM_MEM_TYPES) { 1188 if (mem_type >= TTM_NUM_MEM_TYPES) {
1157 printk(KERN_ERR TTM_PFX "Illegal memory type %d\n", mem_type); 1189 printk(KERN_ERR TTM_PFX "Illegal memory type %d\n", mem_type);
1158 return ret; 1190 return ret;
1159 } 1191 }
1192 man = &bdev->man[mem_type];
1160 1193
1161 if (!man->has_type) { 1194 if (!man->has_type) {
1162 printk(KERN_ERR TTM_PFX "Trying to take down uninitialized " 1195 printk(KERN_ERR TTM_PFX "Trying to take down uninitialized "
@@ -1305,7 +1338,8 @@ EXPORT_SYMBOL(ttm_bo_device_release);
1305 1338
1306int ttm_bo_device_init(struct ttm_bo_device *bdev, 1339int ttm_bo_device_init(struct ttm_bo_device *bdev,
1307 struct ttm_mem_global *mem_glob, 1340 struct ttm_mem_global *mem_glob,
1308 struct ttm_bo_driver *driver, uint64_t file_page_offset) 1341 struct ttm_bo_driver *driver, uint64_t file_page_offset,
1342 bool need_dma32)
1309{ 1343{
1310 int ret = -EINVAL; 1344 int ret = -EINVAL;
1311 1345
@@ -1342,6 +1376,7 @@ int ttm_bo_device_init(struct ttm_bo_device *bdev,
1342 INIT_LIST_HEAD(&bdev->ddestroy); 1376 INIT_LIST_HEAD(&bdev->ddestroy);
1343 INIT_LIST_HEAD(&bdev->swap_lru); 1377 INIT_LIST_HEAD(&bdev->swap_lru);
1344 bdev->dev_mapping = NULL; 1378 bdev->dev_mapping = NULL;
1379 bdev->need_dma32 = need_dma32;
1345 ttm_mem_init_shrink(&bdev->shrink, ttm_bo_swapout); 1380 ttm_mem_init_shrink(&bdev->shrink, ttm_bo_swapout);
1346 ret = ttm_mem_register_shrink(mem_glob, &bdev->shrink); 1381 ret = ttm_mem_register_shrink(mem_glob, &bdev->shrink);
1347 if (unlikely(ret != 0)) { 1382 if (unlikely(ret != 0)) {
@@ -1419,6 +1454,7 @@ void ttm_bo_unmap_virtual(struct ttm_buffer_object *bo)
1419 1454
1420 unmap_mapping_range(bdev->dev_mapping, offset, holelen, 1); 1455 unmap_mapping_range(bdev->dev_mapping, offset, holelen, 1);
1421} 1456}
1457EXPORT_SYMBOL(ttm_bo_unmap_virtual);
1422 1458
1423static void ttm_bo_vm_insert_rb(struct ttm_buffer_object *bo) 1459static void ttm_bo_vm_insert_rb(struct ttm_buffer_object *bo)
1424{ 1460{
@@ -1540,6 +1576,10 @@ int ttm_bo_wait(struct ttm_buffer_object *bo,
1540 driver->sync_obj_unref(&sync_obj); 1576 driver->sync_obj_unref(&sync_obj);
1541 driver->sync_obj_unref(&tmp_obj); 1577 driver->sync_obj_unref(&tmp_obj);
1542 spin_lock(&bo->lock); 1578 spin_lock(&bo->lock);
1579 } else {
1580 spin_unlock(&bo->lock);
1581 driver->sync_obj_unref(&sync_obj);
1582 spin_lock(&bo->lock);
1543 } 1583 }
1544 } 1584 }
1545 return 0; 1585 return 0;
diff --git a/drivers/gpu/drm/ttm/ttm_bo_util.c b/drivers/gpu/drm/ttm/ttm_bo_util.c
index bdec583901eb..ad4ada07c6cf 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_util.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_util.c
@@ -136,7 +136,8 @@ static int ttm_copy_io_page(void *dst, void *src, unsigned long page)
136} 136}
137 137
138static int ttm_copy_io_ttm_page(struct ttm_tt *ttm, void *src, 138static int ttm_copy_io_ttm_page(struct ttm_tt *ttm, void *src,
139 unsigned long page) 139 unsigned long page,
140 pgprot_t prot)
140{ 141{
141 struct page *d = ttm_tt_get_page(ttm, page); 142 struct page *d = ttm_tt_get_page(ttm, page);
142 void *dst; 143 void *dst;
@@ -145,17 +146,35 @@ static int ttm_copy_io_ttm_page(struct ttm_tt *ttm, void *src,
145 return -ENOMEM; 146 return -ENOMEM;
146 147
147 src = (void *)((unsigned long)src + (page << PAGE_SHIFT)); 148 src = (void *)((unsigned long)src + (page << PAGE_SHIFT));
148 dst = kmap(d); 149
150#ifdef CONFIG_X86
151 dst = kmap_atomic_prot(d, KM_USER0, prot);
152#else
153 if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
154 dst = vmap(&d, 1, 0, prot);
155 else
156 dst = kmap(d);
157#endif
149 if (!dst) 158 if (!dst)
150 return -ENOMEM; 159 return -ENOMEM;
151 160
152 memcpy_fromio(dst, src, PAGE_SIZE); 161 memcpy_fromio(dst, src, PAGE_SIZE);
153 kunmap(d); 162
163#ifdef CONFIG_X86
164 kunmap_atomic(dst, KM_USER0);
165#else
166 if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
167 vunmap(dst);
168 else
169 kunmap(d);
170#endif
171
154 return 0; 172 return 0;
155} 173}
156 174
157static int ttm_copy_ttm_io_page(struct ttm_tt *ttm, void *dst, 175static int ttm_copy_ttm_io_page(struct ttm_tt *ttm, void *dst,
158 unsigned long page) 176 unsigned long page,
177 pgprot_t prot)
159{ 178{
160 struct page *s = ttm_tt_get_page(ttm, page); 179 struct page *s = ttm_tt_get_page(ttm, page);
161 void *src; 180 void *src;
@@ -164,12 +183,28 @@ static int ttm_copy_ttm_io_page(struct ttm_tt *ttm, void *dst,
164 return -ENOMEM; 183 return -ENOMEM;
165 184
166 dst = (void *)((unsigned long)dst + (page << PAGE_SHIFT)); 185 dst = (void *)((unsigned long)dst + (page << PAGE_SHIFT));
167 src = kmap(s); 186#ifdef CONFIG_X86
187 src = kmap_atomic_prot(s, KM_USER0, prot);
188#else
189 if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
190 src = vmap(&s, 1, 0, prot);
191 else
192 src = kmap(s);
193#endif
168 if (!src) 194 if (!src)
169 return -ENOMEM; 195 return -ENOMEM;
170 196
171 memcpy_toio(dst, src, PAGE_SIZE); 197 memcpy_toio(dst, src, PAGE_SIZE);
172 kunmap(s); 198
199#ifdef CONFIG_X86
200 kunmap_atomic(src, KM_USER0);
201#else
202 if (pgprot_val(prot) != pgprot_val(PAGE_KERNEL))
203 vunmap(src);
204 else
205 kunmap(s);
206#endif
207
173 return 0; 208 return 0;
174} 209}
175 210
@@ -214,11 +249,17 @@ int ttm_bo_move_memcpy(struct ttm_buffer_object *bo,
214 249
215 for (i = 0; i < new_mem->num_pages; ++i) { 250 for (i = 0; i < new_mem->num_pages; ++i) {
216 page = i * dir + add; 251 page = i * dir + add;
217 if (old_iomap == NULL) 252 if (old_iomap == NULL) {
218 ret = ttm_copy_ttm_io_page(ttm, new_iomap, page); 253 pgprot_t prot = ttm_io_prot(old_mem->placement,
219 else if (new_iomap == NULL) 254 PAGE_KERNEL);
220 ret = ttm_copy_io_ttm_page(ttm, old_iomap, page); 255 ret = ttm_copy_ttm_io_page(ttm, new_iomap, page,
221 else 256 prot);
257 } else if (new_iomap == NULL) {
258 pgprot_t prot = ttm_io_prot(new_mem->placement,
259 PAGE_KERNEL);
260 ret = ttm_copy_io_ttm_page(ttm, old_iomap, page,
261 prot);
262 } else
222 ret = ttm_copy_io_page(new_iomap, old_iomap, page); 263 ret = ttm_copy_io_page(new_iomap, old_iomap, page);
223 if (ret) 264 if (ret)
224 goto out1; 265 goto out1;
@@ -509,8 +550,8 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
509 if (evict) { 550 if (evict) {
510 ret = ttm_bo_wait(bo, false, false, false); 551 ret = ttm_bo_wait(bo, false, false, false);
511 spin_unlock(&bo->lock); 552 spin_unlock(&bo->lock);
512 driver->sync_obj_unref(&bo->sync_obj); 553 if (tmp_obj)
513 554 driver->sync_obj_unref(&tmp_obj);
514 if (ret) 555 if (ret)
515 return ret; 556 return ret;
516 557
@@ -532,6 +573,8 @@ int ttm_bo_move_accel_cleanup(struct ttm_buffer_object *bo,
532 573
533 set_bit(TTM_BO_PRIV_FLAG_MOVING, &bo->priv_flags); 574 set_bit(TTM_BO_PRIV_FLAG_MOVING, &bo->priv_flags);
534 spin_unlock(&bo->lock); 575 spin_unlock(&bo->lock);
576 if (tmp_obj)
577 driver->sync_obj_unref(&tmp_obj);
535 578
536 ret = ttm_buffer_object_transfer(bo, &ghost_obj); 579 ret = ttm_buffer_object_transfer(bo, &ghost_obj);
537 if (ret) 580 if (ret)
diff --git a/drivers/gpu/drm/ttm/ttm_bo_vm.c b/drivers/gpu/drm/ttm/ttm_bo_vm.c
index fe949a12fe40..33de7637c0c6 100644
--- a/drivers/gpu/drm/ttm/ttm_bo_vm.c
+++ b/drivers/gpu/drm/ttm/ttm_bo_vm.c
@@ -101,6 +101,9 @@ static int ttm_bo_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
101 return VM_FAULT_NOPAGE; 101 return VM_FAULT_NOPAGE;
102 } 102 }
103 103
104 if (bdev->driver->fault_reserve_notify)
105 bdev->driver->fault_reserve_notify(bo);
106
104 /* 107 /*
105 * Wait for buffer data in transit, due to a pipelined 108 * Wait for buffer data in transit, due to a pipelined
106 * move. 109 * move.
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index 75dc8bd24592..b8b6c4a5f983 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -86,10 +86,16 @@ void ttm_tt_cache_flush(struct page *pages[], unsigned long num_pages)
86 unsigned long i; 86 unsigned long i;
87 87
88 for (i = 0; i < num_pages; ++i) { 88 for (i = 0; i < num_pages; ++i) {
89 if (pages[i]) { 89 struct page *page = pages[i];
90 unsigned long start = (unsigned long)page_address(pages[i]); 90 void *page_virtual;
91 flush_dcache_range(start, start + PAGE_SIZE); 91
92 } 92 if (unlikely(page == NULL))
93 continue;
94
95 page_virtual = kmap_atomic(page, KM_USER0);
96 flush_dcache_range((unsigned long) page_virtual,
97 (unsigned long) page_virtual + PAGE_SIZE);
98 kunmap_atomic(page_virtual, KM_USER0);
93 } 99 }
94#else 100#else
95 if (on_each_cpu(ttm_tt_ipi_handler, NULL, 1) != 0) 101 if (on_each_cpu(ttm_tt_ipi_handler, NULL, 1) != 0)
@@ -131,10 +137,17 @@ static void ttm_tt_free_page_directory(struct ttm_tt *ttm)
131 137
132static struct page *ttm_tt_alloc_page(unsigned page_flags) 138static struct page *ttm_tt_alloc_page(unsigned page_flags)
133{ 139{
140 gfp_t gfp_flags = GFP_USER;
141
134 if (page_flags & TTM_PAGE_FLAG_ZERO_ALLOC) 142 if (page_flags & TTM_PAGE_FLAG_ZERO_ALLOC)
135 return alloc_page(GFP_HIGHUSER | __GFP_ZERO); 143 gfp_flags |= __GFP_ZERO;
144
145 if (page_flags & TTM_PAGE_FLAG_DMA32)
146 gfp_flags |= __GFP_DMA32;
147 else
148 gfp_flags |= __GFP_HIGHMEM;
136 149
137 return alloc_page(GFP_HIGHUSER); 150 return alloc_page(gfp_flags);
138} 151}
139 152
140static void ttm_tt_free_user_pages(struct ttm_tt *ttm) 153static void ttm_tt_free_user_pages(struct ttm_tt *ttm)
diff --git a/drivers/hwmon/asus_atk0110.c b/drivers/hwmon/asus_atk0110.c
index bff0103610c1..fe4fa29c9219 100644
--- a/drivers/hwmon/asus_atk0110.c
+++ b/drivers/hwmon/asus_atk0110.c
@@ -593,7 +593,11 @@ static int atk_add_sensor(struct atk_data *data, union acpi_object *obj)
593 sensor->data = data; 593 sensor->data = data;
594 sensor->id = flags->integer.value; 594 sensor->id = flags->integer.value;
595 sensor->limit1 = limit1->integer.value; 595 sensor->limit1 = limit1->integer.value;
596 sensor->limit2 = limit2->integer.value; 596 if (data->old_interface)
597 sensor->limit2 = limit2->integer.value;
598 else
599 /* The upper limit is expressed as delta from lower limit */
600 sensor->limit2 = sensor->limit1 + limit2->integer.value;
597 601
598 snprintf(sensor->input_attr_name, ATTR_NAME_SIZE, 602 snprintf(sensor->input_attr_name, ATTR_NAME_SIZE,
599 "%s%d_input", base_name, start + *num); 603 "%s%d_input", base_name, start + *num);
diff --git a/drivers/hwmon/smsc47m1.c b/drivers/hwmon/smsc47m1.c
index a92dbb97ee99..ba75bfcf14ce 100644
--- a/drivers/hwmon/smsc47m1.c
+++ b/drivers/hwmon/smsc47m1.c
@@ -86,6 +86,7 @@ superio_exit(void)
86#define SUPERIO_REG_ACT 0x30 86#define SUPERIO_REG_ACT 0x30
87#define SUPERIO_REG_BASE 0x60 87#define SUPERIO_REG_BASE 0x60
88#define SUPERIO_REG_DEVID 0x20 88#define SUPERIO_REG_DEVID 0x20
89#define SUPERIO_REG_DEVREV 0x21
89 90
90/* Logical device registers */ 91/* Logical device registers */
91 92
@@ -429,6 +430,9 @@ static int __init smsc47m1_find(unsigned short *addr,
429 * The LPC47M292 (device id 0x6B) is somewhat compatible, but it 430 * The LPC47M292 (device id 0x6B) is somewhat compatible, but it
430 * supports a 3rd fan, and the pin configuration registers are 431 * supports a 3rd fan, and the pin configuration registers are
431 * unfortunately different. 432 * unfortunately different.
433 * The LPC47M233 has the same device id (0x6B) but is not compatible.
434 * We check the high bit of the device revision register to
435 * differentiate them.
432 */ 436 */
433 switch (val) { 437 switch (val) {
434 case 0x51: 438 case 0x51:
@@ -448,6 +452,13 @@ static int __init smsc47m1_find(unsigned short *addr,
448 sio_data->type = smsc47m1; 452 sio_data->type = smsc47m1;
449 break; 453 break;
450 case 0x6B: 454 case 0x6B:
455 if (superio_inb(SUPERIO_REG_DEVREV) & 0x80) {
456 pr_debug(DRVNAME ": "
457 "Found SMSC LPC47M233, unsupported\n");
458 superio_exit();
459 return -ENODEV;
460 }
461
451 pr_info(DRVNAME ": Found SMSC LPC47M292\n"); 462 pr_info(DRVNAME ": Found SMSC LPC47M292\n");
452 sio_data->type = smsc47m2; 463 sio_data->type = smsc47m2;
453 break; 464 break;
diff --git a/drivers/i2c/busses/i2c-omap.c b/drivers/i2c/busses/i2c-omap.c
index fdd83277c8a8..d258b02aef44 100644
--- a/drivers/i2c/busses/i2c-omap.c
+++ b/drivers/i2c/busses/i2c-omap.c
@@ -672,9 +672,10 @@ omap_i2c_isr(int this_irq, void *dev_id)
672 break; 672 break;
673 } 673 }
674 674
675 err = 0;
676complete:
675 omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat); 677 omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat);
676 678
677 err = 0;
678 if (stat & OMAP_I2C_STAT_NACK) { 679 if (stat & OMAP_I2C_STAT_NACK) {
679 err |= OMAP_I2C_STAT_NACK; 680 err |= OMAP_I2C_STAT_NACK;
680 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 681 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG,
@@ -685,16 +686,19 @@ omap_i2c_isr(int this_irq, void *dev_id)
685 err |= OMAP_I2C_STAT_AL; 686 err |= OMAP_I2C_STAT_AL;
686 } 687 }
687 if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK | 688 if (stat & (OMAP_I2C_STAT_ARDY | OMAP_I2C_STAT_NACK |
688 OMAP_I2C_STAT_AL)) 689 OMAP_I2C_STAT_AL)) {
689 omap_i2c_complete_cmd(dev, err); 690 omap_i2c_complete_cmd(dev, err);
691 return IRQ_HANDLED;
692 }
690 if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) { 693 if (stat & (OMAP_I2C_STAT_RRDY | OMAP_I2C_STAT_RDR)) {
691 u8 num_bytes = 1; 694 u8 num_bytes = 1;
692 if (dev->fifo_size) { 695 if (dev->fifo_size) {
693 if (stat & OMAP_I2C_STAT_RRDY) 696 if (stat & OMAP_I2C_STAT_RRDY)
694 num_bytes = dev->fifo_size; 697 num_bytes = dev->fifo_size;
695 else 698 else /* read RXSTAT on RDR interrupt */
696 num_bytes = omap_i2c_read_reg(dev, 699 num_bytes = (omap_i2c_read_reg(dev,
697 OMAP_I2C_BUFSTAT_REG); 700 OMAP_I2C_BUFSTAT_REG)
701 >> 8) & 0x3F;
698 } 702 }
699 while (num_bytes) { 703 while (num_bytes) {
700 num_bytes--; 704 num_bytes--;
@@ -731,9 +735,10 @@ omap_i2c_isr(int this_irq, void *dev_id)
731 if (dev->fifo_size) { 735 if (dev->fifo_size) {
732 if (stat & OMAP_I2C_STAT_XRDY) 736 if (stat & OMAP_I2C_STAT_XRDY)
733 num_bytes = dev->fifo_size; 737 num_bytes = dev->fifo_size;
734 else 738 else /* read TXSTAT on XDR interrupt */
735 num_bytes = omap_i2c_read_reg(dev, 739 num_bytes = omap_i2c_read_reg(dev,
736 OMAP_I2C_BUFSTAT_REG); 740 OMAP_I2C_BUFSTAT_REG)
741 & 0x3F;
737 } 742 }
738 while (num_bytes) { 743 while (num_bytes) {
739 num_bytes--; 744 num_bytes--;
@@ -760,6 +765,27 @@ omap_i2c_isr(int this_irq, void *dev_id)
760 "data to send\n"); 765 "data to send\n");
761 break; 766 break;
762 } 767 }
768
769 /*
770 * OMAP3430 Errata 1.153: When an XRDY/XDR
771 * is hit, wait for XUDF before writing data
772 * to DATA_REG. Otherwise some data bytes can
773 * be lost while transferring them from the
774 * memory to the I2C interface.
775 */
776
777 if (cpu_is_omap34xx()) {
778 while (!(stat & OMAP_I2C_STAT_XUDF)) {
779 if (stat & (OMAP_I2C_STAT_NACK | OMAP_I2C_STAT_AL)) {
780 omap_i2c_ack_stat(dev, stat & (OMAP_I2C_STAT_XRDY | OMAP_I2C_STAT_XDR));
781 err |= OMAP_I2C_STAT_XUDF;
782 goto complete;
783 }
784 cpu_relax();
785 stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG);
786 }
787 }
788
763 omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); 789 omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w);
764 } 790 }
765 omap_i2c_ack_stat(dev, 791 omap_i2c_ack_stat(dev,
@@ -879,7 +905,7 @@ omap_i2c_probe(struct platform_device *pdev)
879 i2c_set_adapdata(adap, dev); 905 i2c_set_adapdata(adap, dev);
880 adap->owner = THIS_MODULE; 906 adap->owner = THIS_MODULE;
881 adap->class = I2C_CLASS_HWMON; 907 adap->class = I2C_CLASS_HWMON;
882 strncpy(adap->name, "OMAP I2C adapter", sizeof(adap->name)); 908 strlcpy(adap->name, "OMAP I2C adapter", sizeof(adap->name));
883 adap->algo = &omap_i2c_algo; 909 adap->algo = &omap_i2c_algo;
884 adap->dev.parent = &pdev->dev; 910 adap->dev.parent = &pdev->dev;
885 911
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c
index 8f42a4536cdf..20bb0ceb027b 100644
--- a/drivers/i2c/busses/i2c-s3c2410.c
+++ b/drivers/i2c/busses/i2c-s3c2410.c
@@ -763,11 +763,6 @@ static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c)
763 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); 763 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq);
764 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon); 764 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02lx\n", iicon);
765 765
766 /* check for s3c2440 i2c controller */
767
768 if (s3c24xx_i2c_is2440(i2c))
769 writel(0x0, i2c->regs + S3C2440_IICLC);
770
771 return 0; 766 return 0;
772} 767}
773 768
diff --git a/drivers/i2c/chips/tsl2550.c b/drivers/i2c/chips/tsl2550.c
index 1a9cc135219f..b96f3025e588 100644
--- a/drivers/i2c/chips/tsl2550.c
+++ b/drivers/i2c/chips/tsl2550.c
@@ -27,7 +27,7 @@
27#include <linux/delay.h> 27#include <linux/delay.h>
28 28
29#define TSL2550_DRV_NAME "tsl2550" 29#define TSL2550_DRV_NAME "tsl2550"
30#define DRIVER_VERSION "1.1.1" 30#define DRIVER_VERSION "1.1.2"
31 31
32/* 32/*
33 * Defines 33 * Defines
@@ -189,13 +189,16 @@ static int tsl2550_calculate_lux(u8 ch0, u8 ch1)
189 u8 r = 128; 189 u8 r = 128;
190 190
191 /* Avoid division by 0 and count 1 cannot be greater than count 0 */ 191 /* Avoid division by 0 and count 1 cannot be greater than count 0 */
192 if (c0 && (c1 <= c0)) 192 if (c1 <= c0)
193 r = c1 * 128 / c0; 193 if (c0) {
194 r = c1 * 128 / c0;
195
196 /* Calculate LUX */
197 lux = ((c0 - c1) * ratio_lut[r]) / 256;
198 } else
199 lux = 0;
194 else 200 else
195 return -1; 201 return -EAGAIN;
196
197 /* Calculate LUX */
198 lux = ((c0 - c1) * ratio_lut[r]) / 256;
199 202
200 /* LUX range check */ 203 /* LUX range check */
201 return lux > TSL2550_MAX_LUX ? TSL2550_MAX_LUX : lux; 204 return lux > TSL2550_MAX_LUX ? TSL2550_MAX_LUX : lux;
diff --git a/drivers/input/keyboard/matrix_keypad.c b/drivers/input/keyboard/matrix_keypad.c
index e9b2e7cb05be..541b981ff075 100644
--- a/drivers/input/keyboard/matrix_keypad.c
+++ b/drivers/input/keyboard/matrix_keypad.c
@@ -27,6 +27,7 @@ struct matrix_keypad {
27 const struct matrix_keypad_platform_data *pdata; 27 const struct matrix_keypad_platform_data *pdata;
28 struct input_dev *input_dev; 28 struct input_dev *input_dev;
29 unsigned short *keycodes; 29 unsigned short *keycodes;
30 unsigned int row_shift;
30 31
31 uint32_t last_key_state[MATRIX_MAX_COLS]; 32 uint32_t last_key_state[MATRIX_MAX_COLS];
32 struct delayed_work work; 33 struct delayed_work work;
@@ -136,7 +137,7 @@ static void matrix_keypad_scan(struct work_struct *work)
136 if ((bits_changed & (1 << row)) == 0) 137 if ((bits_changed & (1 << row)) == 0)
137 continue; 138 continue;
138 139
139 code = (row << 4) + col; 140 code = MATRIX_SCAN_CODE(row, col, keypad->row_shift);
140 input_event(input_dev, EV_MSC, MSC_SCAN, code); 141 input_event(input_dev, EV_MSC, MSC_SCAN, code);
141 input_report_key(input_dev, 142 input_report_key(input_dev,
142 keypad->keycodes[code], 143 keypad->keycodes[code],
@@ -317,6 +318,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
317 struct matrix_keypad *keypad; 318 struct matrix_keypad *keypad;
318 struct input_dev *input_dev; 319 struct input_dev *input_dev;
319 unsigned short *keycodes; 320 unsigned short *keycodes;
321 unsigned int row_shift;
320 int i; 322 int i;
321 int err; 323 int err;
322 324
@@ -332,14 +334,11 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
332 return -EINVAL; 334 return -EINVAL;
333 } 335 }
334 336
335 if (!keymap_data->max_keymap_size) { 337 row_shift = get_count_order(pdata->num_col_gpios);
336 dev_err(&pdev->dev, "invalid keymap data supplied\n");
337 return -EINVAL;
338 }
339 338
340 keypad = kzalloc(sizeof(struct matrix_keypad), GFP_KERNEL); 339 keypad = kzalloc(sizeof(struct matrix_keypad), GFP_KERNEL);
341 keycodes = kzalloc(keymap_data->max_keymap_size * 340 keycodes = kzalloc((pdata->num_row_gpios << row_shift) *
342 sizeof(keypad->keycodes), 341 sizeof(*keycodes),
343 GFP_KERNEL); 342 GFP_KERNEL);
344 input_dev = input_allocate_device(); 343 input_dev = input_allocate_device();
345 if (!keypad || !keycodes || !input_dev) { 344 if (!keypad || !keycodes || !input_dev) {
@@ -350,6 +349,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
350 keypad->input_dev = input_dev; 349 keypad->input_dev = input_dev;
351 keypad->pdata = pdata; 350 keypad->pdata = pdata;
352 keypad->keycodes = keycodes; 351 keypad->keycodes = keycodes;
352 keypad->row_shift = row_shift;
353 keypad->stopped = true; 353 keypad->stopped = true;
354 INIT_DELAYED_WORK(&keypad->work, matrix_keypad_scan); 354 INIT_DELAYED_WORK(&keypad->work, matrix_keypad_scan);
355 spin_lock_init(&keypad->lock); 355 spin_lock_init(&keypad->lock);
@@ -363,7 +363,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
363 363
364 input_dev->keycode = keycodes; 364 input_dev->keycode = keycodes;
365 input_dev->keycodesize = sizeof(*keycodes); 365 input_dev->keycodesize = sizeof(*keycodes);
366 input_dev->keycodemax = keymap_data->max_keymap_size; 366 input_dev->keycodemax = pdata->num_row_gpios << keypad->row_shift;
367 367
368 for (i = 0; i < keymap_data->keymap_size; i++) { 368 for (i = 0; i < keymap_data->keymap_size; i++) {
369 unsigned int key = keymap_data->keymap[i]; 369 unsigned int key = keymap_data->keymap[i];
@@ -371,7 +371,7 @@ static int __devinit matrix_keypad_probe(struct platform_device *pdev)
371 unsigned int col = KEY_COL(key); 371 unsigned int col = KEY_COL(key);
372 unsigned short code = KEY_VAL(key); 372 unsigned short code = KEY_VAL(key);
373 373
374 keycodes[(row << 4) + col] = code; 374 keycodes[MATRIX_SCAN_CODE(row, col, row_shift)] = code;
375 __set_bit(code, input_dev->keybit); 375 __set_bit(code, input_dev->keybit);
376 } 376 }
377 __clear_bit(KEY_RESERVED, input_dev->keybit); 377 __clear_bit(KEY_RESERVED, input_dev->keybit);
diff --git a/drivers/input/misc/wistron_btns.c b/drivers/input/misc/wistron_btns.c
index 26e17a9a22eb..27ee976eb54c 100644
--- a/drivers/input/misc/wistron_btns.c
+++ b/drivers/input/misc/wistron_btns.c
@@ -611,6 +611,20 @@ static struct key_entry keymap_wistron_generic[] __initdata = {
611 { KE_END, 0 } 611 { KE_END, 0 }
612}; 612};
613 613
614static struct key_entry keymap_prestigio[] __initdata = {
615 { KE_KEY, 0x11, {KEY_PROG1} },
616 { KE_KEY, 0x12, {KEY_PROG2} },
617 { KE_WIFI, 0x30 },
618 { KE_KEY, 0x22, {KEY_REWIND} },
619 { KE_KEY, 0x23, {KEY_FORWARD} },
620 { KE_KEY, 0x24, {KEY_PLAYPAUSE} },
621 { KE_KEY, 0x25, {KEY_STOPCD} },
622 { KE_KEY, 0x31, {KEY_MAIL} },
623 { KE_KEY, 0x36, {KEY_WWW} },
624 { KE_END, 0 }
625};
626
627
614/* 628/*
615 * If your machine is not here (which is currently rather likely), please send 629 * If your machine is not here (which is currently rather likely), please send
616 * a list of buttons and their key codes (reported when loading this module 630 * a list of buttons and their key codes (reported when loading this module
@@ -971,6 +985,8 @@ static int __init select_keymap(void)
971 if (keymap_name != NULL) { 985 if (keymap_name != NULL) {
972 if (strcmp (keymap_name, "1557/MS2141") == 0) 986 if (strcmp (keymap_name, "1557/MS2141") == 0)
973 keymap = keymap_wistron_ms2141; 987 keymap = keymap_wistron_ms2141;
988 else if (strcmp (keymap_name, "prestigio") == 0)
989 keymap = keymap_prestigio;
974 else if (strcmp (keymap_name, "generic") == 0) 990 else if (strcmp (keymap_name, "generic") == 0)
975 keymap = keymap_wistron_generic; 991 keymap = keymap_wistron_generic;
976 else { 992 else {
diff --git a/drivers/input/serio/hp_sdc_mlc.c b/drivers/input/serio/hp_sdc_mlc.c
index b587e2d576ac..820e51673b26 100644
--- a/drivers/input/serio/hp_sdc_mlc.c
+++ b/drivers/input/serio/hp_sdc_mlc.c
@@ -296,7 +296,7 @@ static void hp_sdc_mlc_out(hil_mlc *mlc)
296 priv->tseq[3] = 0; 296 priv->tseq[3] = 0;
297 if (mlc->opacket & HIL_CTRL_APE) { 297 if (mlc->opacket & HIL_CTRL_APE) {
298 priv->tseq[3] |= HP_SDC_LPC_APE_IPF; 298 priv->tseq[3] |= HP_SDC_LPC_APE_IPF;
299 down_trylock(&mlc->csem); 299 BUG_ON(down_trylock(&mlc->csem));
300 } 300 }
301 enqueue: 301 enqueue:
302 hp_sdc_enqueue_transaction(&priv->trans); 302 hp_sdc_enqueue_transaction(&priv->trans);
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 924e8ed7f2cf..ae04d8a494e5 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -78,6 +78,14 @@ static struct dmi_system_id __initdata i8042_dmi_noloop_table[] = {
78 }, 78 },
79 }, 79 },
80 { 80 {
81 .ident = "ASUS G1S",
82 .matches = {
83 DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer Inc."),
84 DMI_MATCH(DMI_BOARD_NAME, "G1S"),
85 DMI_MATCH(DMI_BOARD_VERSION, "1.0"),
86 },
87 },
88 {
81 /* AUX LOOP command does not raise AUX IRQ */ 89 /* AUX LOOP command does not raise AUX IRQ */
82 .ident = "ASUS P65UP5", 90 .ident = "ASUS P65UP5",
83 .matches = { 91 .matches = {
diff --git a/drivers/isdn/mISDN/l1oip_core.c b/drivers/isdn/mISDN/l1oip_core.c
index 990e6a7e6674..7e5f30dbc0a0 100644
--- a/drivers/isdn/mISDN/l1oip_core.c
+++ b/drivers/isdn/mISDN/l1oip_core.c
@@ -731,10 +731,10 @@ l1oip_socket_thread(void *data)
731 while (!signal_pending(current)) { 731 while (!signal_pending(current)) {
732 struct kvec iov = { 732 struct kvec iov = {
733 .iov_base = recvbuf, 733 .iov_base = recvbuf,
734 .iov_len = sizeof(recvbuf), 734 .iov_len = recvbuf_size,
735 }; 735 };
736 recvlen = kernel_recvmsg(socket, &msg, &iov, 1, 736 recvlen = kernel_recvmsg(socket, &msg, &iov, 1,
737 sizeof(recvbuf), 0); 737 recvbuf_size, 0);
738 if (recvlen > 0) { 738 if (recvlen > 0) {
739 l1oip_socket_parse(hc, &sin_rx, recvbuf, recvlen); 739 l1oip_socket_parse(hc, &sin_rx, recvbuf, recvlen);
740 } else { 740 } else {
@@ -1480,7 +1480,7 @@ l1oip_init(void)
1480 return -ENOMEM; 1480 return -ENOMEM;
1481 1481
1482 l1oip_cnt = 0; 1482 l1oip_cnt = 0;
1483 while (type[l1oip_cnt] && l1oip_cnt < MAX_CARDS) { 1483 while (l1oip_cnt < MAX_CARDS && type[l1oip_cnt]) {
1484 switch (type[l1oip_cnt] & 0xff) { 1484 switch (type[l1oip_cnt] & 0xff) {
1485 case 1: 1485 case 1:
1486 pri = 0; 1486 pri = 0;
diff --git a/drivers/lguest/core.c b/drivers/lguest/core.c
index a6974e9b8ebf..1e2cb846b3c9 100644
--- a/drivers/lguest/core.c
+++ b/drivers/lguest/core.c
@@ -1,6 +1,8 @@
1/*P:400 This contains run_guest() which actually calls into the Host<->Guest 1/*P:400
2 * This contains run_guest() which actually calls into the Host<->Guest
2 * Switcher and analyzes the return, such as determining if the Guest wants the 3 * Switcher and analyzes the return, such as determining if the Guest wants the
3 * Host to do something. This file also contains useful helper routines. :*/ 4 * Host to do something. This file also contains useful helper routines.
5:*/
4#include <linux/module.h> 6#include <linux/module.h>
5#include <linux/stringify.h> 7#include <linux/stringify.h>
6#include <linux/stddef.h> 8#include <linux/stddef.h>
@@ -24,7 +26,8 @@ static struct page **switcher_page;
24/* This One Big lock protects all inter-guest data structures. */ 26/* This One Big lock protects all inter-guest data structures. */
25DEFINE_MUTEX(lguest_lock); 27DEFINE_MUTEX(lguest_lock);
26 28
27/*H:010 We need to set up the Switcher at a high virtual address. Remember the 29/*H:010
30 * We need to set up the Switcher at a high virtual address. Remember the
28 * Switcher is a few hundred bytes of assembler code which actually changes the 31 * Switcher is a few hundred bytes of assembler code which actually changes the
29 * CPU to run the Guest, and then changes back to the Host when a trap or 32 * CPU to run the Guest, and then changes back to the Host when a trap or
30 * interrupt happens. 33 * interrupt happens.
@@ -33,7 +36,8 @@ DEFINE_MUTEX(lguest_lock);
33 * Host since it will be running as the switchover occurs. 36 * Host since it will be running as the switchover occurs.
34 * 37 *
35 * Trying to map memory at a particular address is an unusual thing to do, so 38 * Trying to map memory at a particular address is an unusual thing to do, so
36 * it's not a simple one-liner. */ 39 * it's not a simple one-liner.
40 */
37static __init int map_switcher(void) 41static __init int map_switcher(void)
38{ 42{
39 int i, err; 43 int i, err;
@@ -47,8 +51,10 @@ static __init int map_switcher(void)
47 * easy. 51 * easy.
48 */ 52 */
49 53
50 /* We allocate an array of struct page pointers. map_vm_area() wants 54 /*
51 * this, rather than just an array of pages. */ 55 * We allocate an array of struct page pointers. map_vm_area() wants
56 * this, rather than just an array of pages.
57 */
52 switcher_page = kmalloc(sizeof(switcher_page[0])*TOTAL_SWITCHER_PAGES, 58 switcher_page = kmalloc(sizeof(switcher_page[0])*TOTAL_SWITCHER_PAGES,
53 GFP_KERNEL); 59 GFP_KERNEL);
54 if (!switcher_page) { 60 if (!switcher_page) {
@@ -56,8 +62,10 @@ static __init int map_switcher(void)
56 goto out; 62 goto out;
57 } 63 }
58 64
59 /* Now we actually allocate the pages. The Guest will see these pages, 65 /*
60 * so we make sure they're zeroed. */ 66 * Now we actually allocate the pages. The Guest will see these pages,
67 * so we make sure they're zeroed.
68 */
61 for (i = 0; i < TOTAL_SWITCHER_PAGES; i++) { 69 for (i = 0; i < TOTAL_SWITCHER_PAGES; i++) {
62 unsigned long addr = get_zeroed_page(GFP_KERNEL); 70 unsigned long addr = get_zeroed_page(GFP_KERNEL);
63 if (!addr) { 71 if (!addr) {
@@ -67,19 +75,23 @@ static __init int map_switcher(void)
67 switcher_page[i] = virt_to_page(addr); 75 switcher_page[i] = virt_to_page(addr);
68 } 76 }
69 77
70 /* First we check that the Switcher won't overlap the fixmap area at 78 /*
79 * First we check that the Switcher won't overlap the fixmap area at
71 * the top of memory. It's currently nowhere near, but it could have 80 * the top of memory. It's currently nowhere near, but it could have
72 * very strange effects if it ever happened. */ 81 * very strange effects if it ever happened.
82 */
73 if (SWITCHER_ADDR + (TOTAL_SWITCHER_PAGES+1)*PAGE_SIZE > FIXADDR_START){ 83 if (SWITCHER_ADDR + (TOTAL_SWITCHER_PAGES+1)*PAGE_SIZE > FIXADDR_START){
74 err = -ENOMEM; 84 err = -ENOMEM;
75 printk("lguest: mapping switcher would thwack fixmap\n"); 85 printk("lguest: mapping switcher would thwack fixmap\n");
76 goto free_pages; 86 goto free_pages;
77 } 87 }
78 88
79 /* Now we reserve the "virtual memory area" we want: 0xFFC00000 89 /*
90 * Now we reserve the "virtual memory area" we want: 0xFFC00000
80 * (SWITCHER_ADDR). We might not get it in theory, but in practice 91 * (SWITCHER_ADDR). We might not get it in theory, but in practice
81 * it's worked so far. The end address needs +1 because __get_vm_area 92 * it's worked so far. The end address needs +1 because __get_vm_area
82 * allocates an extra guard page, so we need space for that. */ 93 * allocates an extra guard page, so we need space for that.
94 */
83 switcher_vma = __get_vm_area(TOTAL_SWITCHER_PAGES * PAGE_SIZE, 95 switcher_vma = __get_vm_area(TOTAL_SWITCHER_PAGES * PAGE_SIZE,
84 VM_ALLOC, SWITCHER_ADDR, SWITCHER_ADDR 96 VM_ALLOC, SWITCHER_ADDR, SWITCHER_ADDR
85 + (TOTAL_SWITCHER_PAGES+1) * PAGE_SIZE); 97 + (TOTAL_SWITCHER_PAGES+1) * PAGE_SIZE);
@@ -89,11 +101,13 @@ static __init int map_switcher(void)
89 goto free_pages; 101 goto free_pages;
90 } 102 }
91 103
92 /* This code actually sets up the pages we've allocated to appear at 104 /*
105 * This code actually sets up the pages we've allocated to appear at
93 * SWITCHER_ADDR. map_vm_area() takes the vma we allocated above, the 106 * SWITCHER_ADDR. map_vm_area() takes the vma we allocated above, the
94 * kind of pages we're mapping (kernel pages), and a pointer to our 107 * kind of pages we're mapping (kernel pages), and a pointer to our
95 * array of struct pages. It increments that pointer, but we don't 108 * array of struct pages. It increments that pointer, but we don't
96 * care. */ 109 * care.
110 */
97 pagep = switcher_page; 111 pagep = switcher_page;
98 err = map_vm_area(switcher_vma, PAGE_KERNEL_EXEC, &pagep); 112 err = map_vm_area(switcher_vma, PAGE_KERNEL_EXEC, &pagep);
99 if (err) { 113 if (err) {
@@ -101,8 +115,10 @@ static __init int map_switcher(void)
101 goto free_vma; 115 goto free_vma;
102 } 116 }
103 117
104 /* Now the Switcher is mapped at the right address, we can't fail! 118 /*
105 * Copy in the compiled-in Switcher code (from <arch>_switcher.S). */ 119 * Now the Switcher is mapped at the right address, we can't fail!
120 * Copy in the compiled-in Switcher code (from <arch>_switcher.S).
121 */
106 memcpy(switcher_vma->addr, start_switcher_text, 122 memcpy(switcher_vma->addr, start_switcher_text,
107 end_switcher_text - start_switcher_text); 123 end_switcher_text - start_switcher_text);
108 124
@@ -124,8 +140,7 @@ out:
124} 140}
125/*:*/ 141/*:*/
126 142
127/* Cleaning up the mapping when the module is unloaded is almost... 143/* Cleaning up the mapping when the module is unloaded is almost... too easy. */
128 * too easy. */
129static void unmap_switcher(void) 144static void unmap_switcher(void)
130{ 145{
131 unsigned int i; 146 unsigned int i;
@@ -151,16 +166,19 @@ static void unmap_switcher(void)
151 * But we can't trust the Guest: it might be trying to access the Launcher 166 * But we can't trust the Guest: it might be trying to access the Launcher
152 * code. We have to check that the range is below the pfn_limit the Launcher 167 * code. We have to check that the range is below the pfn_limit the Launcher
153 * gave us. We have to make sure that addr + len doesn't give us a false 168 * gave us. We have to make sure that addr + len doesn't give us a false
154 * positive by overflowing, too. */ 169 * positive by overflowing, too.
170 */
155bool lguest_address_ok(const struct lguest *lg, 171bool lguest_address_ok(const struct lguest *lg,
156 unsigned long addr, unsigned long len) 172 unsigned long addr, unsigned long len)
157{ 173{
158 return (addr+len) / PAGE_SIZE < lg->pfn_limit && (addr+len >= addr); 174 return (addr+len) / PAGE_SIZE < lg->pfn_limit && (addr+len >= addr);
159} 175}
160 176
161/* This routine copies memory from the Guest. Here we can see how useful the 177/*
178 * This routine copies memory from the Guest. Here we can see how useful the
162 * kill_lguest() routine we met in the Launcher can be: we return a random 179 * kill_lguest() routine we met in the Launcher can be: we return a random
163 * value (all zeroes) instead of needing to return an error. */ 180 * value (all zeroes) instead of needing to return an error.
181 */
164void __lgread(struct lg_cpu *cpu, void *b, unsigned long addr, unsigned bytes) 182void __lgread(struct lg_cpu *cpu, void *b, unsigned long addr, unsigned bytes)
165{ 183{
166 if (!lguest_address_ok(cpu->lg, addr, bytes) 184 if (!lguest_address_ok(cpu->lg, addr, bytes)
@@ -181,9 +199,11 @@ void __lgwrite(struct lg_cpu *cpu, unsigned long addr, const void *b,
181} 199}
182/*:*/ 200/*:*/
183 201
184/*H:030 Let's jump straight to the the main loop which runs the Guest. 202/*H:030
203 * Let's jump straight to the the main loop which runs the Guest.
185 * Remember, this is called by the Launcher reading /dev/lguest, and we keep 204 * Remember, this is called by the Launcher reading /dev/lguest, and we keep
186 * going around and around until something interesting happens. */ 205 * going around and around until something interesting happens.
206 */
187int run_guest(struct lg_cpu *cpu, unsigned long __user *user) 207int run_guest(struct lg_cpu *cpu, unsigned long __user *user)
188{ 208{
189 /* We stop running once the Guest is dead. */ 209 /* We stop running once the Guest is dead. */
@@ -195,10 +215,17 @@ int run_guest(struct lg_cpu *cpu, unsigned long __user *user)
195 if (cpu->hcall) 215 if (cpu->hcall)
196 do_hypercalls(cpu); 216 do_hypercalls(cpu);
197 217
198 /* It's possible the Guest did a NOTIFY hypercall to the 218 /*
199 * Launcher, in which case we return from the read() now. */ 219 * It's possible the Guest did a NOTIFY hypercall to the
220 * Launcher.
221 */
200 if (cpu->pending_notify) { 222 if (cpu->pending_notify) {
223 /*
224 * Does it just needs to write to a registered
225 * eventfd (ie. the appropriate virtqueue thread)?
226 */
201 if (!send_notify_to_eventfd(cpu)) { 227 if (!send_notify_to_eventfd(cpu)) {
228 /* OK, we tell the main Laucher. */
202 if (put_user(cpu->pending_notify, user)) 229 if (put_user(cpu->pending_notify, user))
203 return -EFAULT; 230 return -EFAULT;
204 return sizeof(cpu->pending_notify); 231 return sizeof(cpu->pending_notify);
@@ -209,29 +236,39 @@ int run_guest(struct lg_cpu *cpu, unsigned long __user *user)
209 if (signal_pending(current)) 236 if (signal_pending(current))
210 return -ERESTARTSYS; 237 return -ERESTARTSYS;
211 238
212 /* Check if there are any interrupts which can be delivered now: 239 /*
240 * Check if there are any interrupts which can be delivered now:
213 * if so, this sets up the hander to be executed when we next 241 * if so, this sets up the hander to be executed when we next
214 * run the Guest. */ 242 * run the Guest.
243 */
215 irq = interrupt_pending(cpu, &more); 244 irq = interrupt_pending(cpu, &more);
216 if (irq < LGUEST_IRQS) 245 if (irq < LGUEST_IRQS)
217 try_deliver_interrupt(cpu, irq, more); 246 try_deliver_interrupt(cpu, irq, more);
218 247
219 /* All long-lived kernel loops need to check with this horrible 248 /*
249 * All long-lived kernel loops need to check with this horrible
220 * thing called the freezer. If the Host is trying to suspend, 250 * thing called the freezer. If the Host is trying to suspend,
221 * it stops us. */ 251 * it stops us.
252 */
222 try_to_freeze(); 253 try_to_freeze();
223 254
224 /* Just make absolutely sure the Guest is still alive. One of 255 /*
225 * those hypercalls could have been fatal, for example. */ 256 * Just make absolutely sure the Guest is still alive. One of
257 * those hypercalls could have been fatal, for example.
258 */
226 if (cpu->lg->dead) 259 if (cpu->lg->dead)
227 break; 260 break;
228 261
229 /* If the Guest asked to be stopped, we sleep. The Guest's 262 /*
230 * clock timer will wake us. */ 263 * If the Guest asked to be stopped, we sleep. The Guest's
264 * clock timer will wake us.
265 */
231 if (cpu->halted) { 266 if (cpu->halted) {
232 set_current_state(TASK_INTERRUPTIBLE); 267 set_current_state(TASK_INTERRUPTIBLE);
233 /* Just before we sleep, make sure no interrupt snuck in 268 /*
234 * which we should be doing. */ 269 * Just before we sleep, make sure no interrupt snuck in
270 * which we should be doing.
271 */
235 if (interrupt_pending(cpu, &more) < LGUEST_IRQS) 272 if (interrupt_pending(cpu, &more) < LGUEST_IRQS)
236 set_current_state(TASK_RUNNING); 273 set_current_state(TASK_RUNNING);
237 else 274 else
@@ -239,8 +276,10 @@ int run_guest(struct lg_cpu *cpu, unsigned long __user *user)
239 continue; 276 continue;
240 } 277 }
241 278
242 /* OK, now we're ready to jump into the Guest. First we put up 279 /*
243 * the "Do Not Disturb" sign: */ 280 * OK, now we're ready to jump into the Guest. First we put up
281 * the "Do Not Disturb" sign:
282 */
244 local_irq_disable(); 283 local_irq_disable();
245 284
246 /* Actually run the Guest until something happens. */ 285 /* Actually run the Guest until something happens. */
@@ -327,8 +366,10 @@ static void __exit fini(void)
327} 366}
328/*:*/ 367/*:*/
329 368
330/* The Host side of lguest can be a module. This is a nice way for people to 369/*
331 * play with it. */ 370 * The Host side of lguest can be a module. This is a nice way for people to
371 * play with it.
372 */
332module_init(init); 373module_init(init);
333module_exit(fini); 374module_exit(fini);
334MODULE_LICENSE("GPL"); 375MODULE_LICENSE("GPL");
diff --git a/drivers/lguest/hypercalls.c b/drivers/lguest/hypercalls.c
index c29ffa19cb74..83511eb0923d 100644
--- a/drivers/lguest/hypercalls.c
+++ b/drivers/lguest/hypercalls.c
@@ -1,8 +1,10 @@
1/*P:500 Just as userspace programs request kernel operations through a system 1/*P:500
2 * Just as userspace programs request kernel operations through a system
2 * call, the Guest requests Host operations through a "hypercall". You might 3 * call, the Guest requests Host operations through a "hypercall". You might
3 * notice this nomenclature doesn't really follow any logic, but the name has 4 * notice this nomenclature doesn't really follow any logic, but the name has
4 * been around for long enough that we're stuck with it. As you'd expect, this 5 * been around for long enough that we're stuck with it. As you'd expect, this
5 * code is basically a one big switch statement. :*/ 6 * code is basically a one big switch statement.
7:*/
6 8
7/* Copyright (C) 2006 Rusty Russell IBM Corporation 9/* Copyright (C) 2006 Rusty Russell IBM Corporation
8 10
@@ -28,30 +30,41 @@
28#include <asm/pgtable.h> 30#include <asm/pgtable.h>
29#include "lg.h" 31#include "lg.h"
30 32
31/*H:120 This is the core hypercall routine: where the Guest gets what it wants. 33/*H:120
32 * Or gets killed. Or, in the case of LHCALL_SHUTDOWN, both. */ 34 * This is the core hypercall routine: where the Guest gets what it wants.
35 * Or gets killed. Or, in the case of LHCALL_SHUTDOWN, both.
36 */
33static void do_hcall(struct lg_cpu *cpu, struct hcall_args *args) 37static void do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
34{ 38{
35 switch (args->arg0) { 39 switch (args->arg0) {
36 case LHCALL_FLUSH_ASYNC: 40 case LHCALL_FLUSH_ASYNC:
37 /* This call does nothing, except by breaking out of the Guest 41 /*
38 * it makes us process all the asynchronous hypercalls. */ 42 * This call does nothing, except by breaking out of the Guest
43 * it makes us process all the asynchronous hypercalls.
44 */
39 break; 45 break;
40 case LHCALL_SEND_INTERRUPTS: 46 case LHCALL_SEND_INTERRUPTS:
41 /* This call does nothing too, but by breaking out of the Guest 47 /*
42 * it makes us process any pending interrupts. */ 48 * This call does nothing too, but by breaking out of the Guest
49 * it makes us process any pending interrupts.
50 */
43 break; 51 break;
44 case LHCALL_LGUEST_INIT: 52 case LHCALL_LGUEST_INIT:
45 /* You can't get here unless you're already initialized. Don't 53 /*
46 * do that. */ 54 * You can't get here unless you're already initialized. Don't
55 * do that.
56 */
47 kill_guest(cpu, "already have lguest_data"); 57 kill_guest(cpu, "already have lguest_data");
48 break; 58 break;
49 case LHCALL_SHUTDOWN: { 59 case LHCALL_SHUTDOWN: {
50 /* Shutdown is such a trivial hypercall that we do it in four
51 * lines right here. */
52 char msg[128]; 60 char msg[128];
53 /* If the lgread fails, it will call kill_guest() itself; the 61 /*
54 * kill_guest() with the message will be ignored. */ 62 * Shutdown is such a trivial hypercall that we do it in five
63 * lines right here.
64 *
65 * If the lgread fails, it will call kill_guest() itself; the
66 * kill_guest() with the message will be ignored.
67 */
55 __lgread(cpu, msg, args->arg1, sizeof(msg)); 68 __lgread(cpu, msg, args->arg1, sizeof(msg));
56 msg[sizeof(msg)-1] = '\0'; 69 msg[sizeof(msg)-1] = '\0';
57 kill_guest(cpu, "CRASH: %s", msg); 70 kill_guest(cpu, "CRASH: %s", msg);
@@ -60,16 +73,17 @@ static void do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
60 break; 73 break;
61 } 74 }
62 case LHCALL_FLUSH_TLB: 75 case LHCALL_FLUSH_TLB:
63 /* FLUSH_TLB comes in two flavors, depending on the 76 /* FLUSH_TLB comes in two flavors, depending on the argument: */
64 * argument: */
65 if (args->arg1) 77 if (args->arg1)
66 guest_pagetable_clear_all(cpu); 78 guest_pagetable_clear_all(cpu);
67 else 79 else
68 guest_pagetable_flush_user(cpu); 80 guest_pagetable_flush_user(cpu);
69 break; 81 break;
70 82
71 /* All these calls simply pass the arguments through to the right 83 /*
72 * routines. */ 84 * All these calls simply pass the arguments through to the right
85 * routines.
86 */
73 case LHCALL_NEW_PGTABLE: 87 case LHCALL_NEW_PGTABLE:
74 guest_new_pagetable(cpu, args->arg1); 88 guest_new_pagetable(cpu, args->arg1);
75 break; 89 break;
@@ -112,15 +126,16 @@ static void do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
112 kill_guest(cpu, "Bad hypercall %li\n", args->arg0); 126 kill_guest(cpu, "Bad hypercall %li\n", args->arg0);
113 } 127 }
114} 128}
115/*:*/
116 129
117/*H:124 Asynchronous hypercalls are easy: we just look in the array in the 130/*H:124
131 * Asynchronous hypercalls are easy: we just look in the array in the
118 * Guest's "struct lguest_data" to see if any new ones are marked "ready". 132 * Guest's "struct lguest_data" to see if any new ones are marked "ready".
119 * 133 *
120 * We are careful to do these in order: obviously we respect the order the 134 * We are careful to do these in order: obviously we respect the order the
121 * Guest put them in the ring, but we also promise the Guest that they will 135 * Guest put them in the ring, but we also promise the Guest that they will
122 * happen before any normal hypercall (which is why we check this before 136 * happen before any normal hypercall (which is why we check this before
123 * checking for a normal hcall). */ 137 * checking for a normal hcall).
138 */
124static void do_async_hcalls(struct lg_cpu *cpu) 139static void do_async_hcalls(struct lg_cpu *cpu)
125{ 140{
126 unsigned int i; 141 unsigned int i;
@@ -133,22 +148,28 @@ static void do_async_hcalls(struct lg_cpu *cpu)
133 /* We process "struct lguest_data"s hcalls[] ring once. */ 148 /* We process "struct lguest_data"s hcalls[] ring once. */
134 for (i = 0; i < ARRAY_SIZE(st); i++) { 149 for (i = 0; i < ARRAY_SIZE(st); i++) {
135 struct hcall_args args; 150 struct hcall_args args;
136 /* We remember where we were up to from last time. This makes 151 /*
152 * We remember where we were up to from last time. This makes
137 * sure that the hypercalls are done in the order the Guest 153 * sure that the hypercalls are done in the order the Guest
138 * places them in the ring. */ 154 * places them in the ring.
155 */
139 unsigned int n = cpu->next_hcall; 156 unsigned int n = cpu->next_hcall;
140 157
141 /* 0xFF means there's no call here (yet). */ 158 /* 0xFF means there's no call here (yet). */
142 if (st[n] == 0xFF) 159 if (st[n] == 0xFF)
143 break; 160 break;
144 161
145 /* OK, we have hypercall. Increment the "next_hcall" cursor, 162 /*
146 * and wrap back to 0 if we reach the end. */ 163 * OK, we have hypercall. Increment the "next_hcall" cursor,
164 * and wrap back to 0 if we reach the end.
165 */
147 if (++cpu->next_hcall == LHCALL_RING_SIZE) 166 if (++cpu->next_hcall == LHCALL_RING_SIZE)
148 cpu->next_hcall = 0; 167 cpu->next_hcall = 0;
149 168
150 /* Copy the hypercall arguments into a local copy of 169 /*
151 * the hcall_args struct. */ 170 * Copy the hypercall arguments into a local copy of the
171 * hcall_args struct.
172 */
152 if (copy_from_user(&args, &cpu->lg->lguest_data->hcalls[n], 173 if (copy_from_user(&args, &cpu->lg->lguest_data->hcalls[n],
153 sizeof(struct hcall_args))) { 174 sizeof(struct hcall_args))) {
154 kill_guest(cpu, "Fetching async hypercalls"); 175 kill_guest(cpu, "Fetching async hypercalls");
@@ -164,19 +185,25 @@ static void do_async_hcalls(struct lg_cpu *cpu)
164 break; 185 break;
165 } 186 }
166 187
167 /* Stop doing hypercalls if they want to notify the Launcher: 188 /*
168 * it needs to service this first. */ 189 * Stop doing hypercalls if they want to notify the Launcher:
190 * it needs to service this first.
191 */
169 if (cpu->pending_notify) 192 if (cpu->pending_notify)
170 break; 193 break;
171 } 194 }
172} 195}
173 196
174/* Last of all, we look at what happens first of all. The very first time the 197/*
175 * Guest makes a hypercall, we end up here to set things up: */ 198 * Last of all, we look at what happens first of all. The very first time the
199 * Guest makes a hypercall, we end up here to set things up:
200 */
176static void initialize(struct lg_cpu *cpu) 201static void initialize(struct lg_cpu *cpu)
177{ 202{
178 /* You can't do anything until you're initialized. The Guest knows the 203 /*
179 * rules, so we're unforgiving here. */ 204 * You can't do anything until you're initialized. The Guest knows the
205 * rules, so we're unforgiving here.
206 */
180 if (cpu->hcall->arg0 != LHCALL_LGUEST_INIT) { 207 if (cpu->hcall->arg0 != LHCALL_LGUEST_INIT) {
181 kill_guest(cpu, "hypercall %li before INIT", cpu->hcall->arg0); 208 kill_guest(cpu, "hypercall %li before INIT", cpu->hcall->arg0);
182 return; 209 return;
@@ -185,32 +212,44 @@ static void initialize(struct lg_cpu *cpu)
185 if (lguest_arch_init_hypercalls(cpu)) 212 if (lguest_arch_init_hypercalls(cpu))
186 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data); 213 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data);
187 214
188 /* The Guest tells us where we're not to deliver interrupts by putting 215 /*
189 * the range of addresses into "struct lguest_data". */ 216 * The Guest tells us where we're not to deliver interrupts by putting
217 * the range of addresses into "struct lguest_data".
218 */
190 if (get_user(cpu->lg->noirq_start, &cpu->lg->lguest_data->noirq_start) 219 if (get_user(cpu->lg->noirq_start, &cpu->lg->lguest_data->noirq_start)
191 || get_user(cpu->lg->noirq_end, &cpu->lg->lguest_data->noirq_end)) 220 || get_user(cpu->lg->noirq_end, &cpu->lg->lguest_data->noirq_end))
192 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data); 221 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data);
193 222
194 /* We write the current time into the Guest's data page once so it can 223 /*
195 * set its clock. */ 224 * We write the current time into the Guest's data page once so it can
225 * set its clock.
226 */
196 write_timestamp(cpu); 227 write_timestamp(cpu);
197 228
198 /* page_tables.c will also do some setup. */ 229 /* page_tables.c will also do some setup. */
199 page_table_guest_data_init(cpu); 230 page_table_guest_data_init(cpu);
200 231
201 /* This is the one case where the above accesses might have been the 232 /*
233 * This is the one case where the above accesses might have been the
202 * first write to a Guest page. This may have caused a copy-on-write 234 * first write to a Guest page. This may have caused a copy-on-write
203 * fault, but the old page might be (read-only) in the Guest 235 * fault, but the old page might be (read-only) in the Guest
204 * pagetable. */ 236 * pagetable.
237 */
205 guest_pagetable_clear_all(cpu); 238 guest_pagetable_clear_all(cpu);
206} 239}
207/*:*/ 240/*:*/
208 241
209/*M:013 If a Guest reads from a page (so creates a mapping) that it has never 242/*M:013
243 * If a Guest reads from a page (so creates a mapping) that it has never
210 * written to, and then the Launcher writes to it (ie. the output of a virtual 244 * written to, and then the Launcher writes to it (ie. the output of a virtual
211 * device), the Guest will still see the old page. In practice, this never 245 * device), the Guest will still see the old page. In practice, this never
212 * happens: why would the Guest read a page which it has never written to? But 246 * happens: why would the Guest read a page which it has never written to? But
213 * a similar scenario might one day bite us, so it's worth mentioning. :*/ 247 * a similar scenario might one day bite us, so it's worth mentioning.
248 *
249 * Note that if we used a shared anonymous mapping in the Launcher instead of
250 * mapping /dev/zero private, we wouldn't worry about cop-on-write. And we
251 * need that to switch the Launcher to processes (away from threads) anyway.
252:*/
214 253
215/*H:100 254/*H:100
216 * Hypercalls 255 * Hypercalls
@@ -229,17 +268,22 @@ void do_hypercalls(struct lg_cpu *cpu)
229 return; 268 return;
230 } 269 }
231 270
232 /* The Guest has initialized. 271 /*
272 * The Guest has initialized.
233 * 273 *
234 * Look in the hypercall ring for the async hypercalls: */ 274 * Look in the hypercall ring for the async hypercalls:
275 */
235 do_async_hcalls(cpu); 276 do_async_hcalls(cpu);
236 277
237 /* If we stopped reading the hypercall ring because the Guest did a 278 /*
279 * If we stopped reading the hypercall ring because the Guest did a
238 * NOTIFY to the Launcher, we want to return now. Otherwise we do 280 * NOTIFY to the Launcher, we want to return now. Otherwise we do
239 * the hypercall. */ 281 * the hypercall.
282 */
240 if (!cpu->pending_notify) { 283 if (!cpu->pending_notify) {
241 do_hcall(cpu, cpu->hcall); 284 do_hcall(cpu, cpu->hcall);
242 /* Tricky point: we reset the hcall pointer to mark the 285 /*
286 * Tricky point: we reset the hcall pointer to mark the
243 * hypercall as "done". We use the hcall pointer rather than 287 * hypercall as "done". We use the hcall pointer rather than
244 * the trap number to indicate a hypercall is pending. 288 * the trap number to indicate a hypercall is pending.
245 * Normally it doesn't matter: the Guest will run again and 289 * Normally it doesn't matter: the Guest will run again and
@@ -248,13 +292,16 @@ void do_hypercalls(struct lg_cpu *cpu)
248 * However, if we are signalled or the Guest sends I/O to the 292 * However, if we are signalled or the Guest sends I/O to the
249 * Launcher, the run_guest() loop will exit without running the 293 * Launcher, the run_guest() loop will exit without running the
250 * Guest. When it comes back it would try to re-run the 294 * Guest. When it comes back it would try to re-run the
251 * hypercall. Finding that bug sucked. */ 295 * hypercall. Finding that bug sucked.
296 */
252 cpu->hcall = NULL; 297 cpu->hcall = NULL;
253 } 298 }
254} 299}
255 300
256/* This routine supplies the Guest with time: it's used for wallclock time at 301/*
257 * initial boot and as a rough time source if the TSC isn't available. */ 302 * This routine supplies the Guest with time: it's used for wallclock time at
303 * initial boot and as a rough time source if the TSC isn't available.
304 */
258void write_timestamp(struct lg_cpu *cpu) 305void write_timestamp(struct lg_cpu *cpu)
259{ 306{
260 struct timespec now; 307 struct timespec now;
diff --git a/drivers/lguest/interrupts_and_traps.c b/drivers/lguest/interrupts_and_traps.c
index 0e9067b0d507..18648180db02 100644
--- a/drivers/lguest/interrupts_and_traps.c
+++ b/drivers/lguest/interrupts_and_traps.c
@@ -1,4 +1,5 @@
1/*P:800 Interrupts (traps) are complicated enough to earn their own file. 1/*P:800
2 * Interrupts (traps) are complicated enough to earn their own file.
2 * There are three classes of interrupts: 3 * There are three classes of interrupts:
3 * 4 *
4 * 1) Real hardware interrupts which occur while we're running the Guest, 5 * 1) Real hardware interrupts which occur while we're running the Guest,
@@ -10,7 +11,8 @@
10 * just like real hardware would deliver them. Traps from the Guest can be set 11 * just like real hardware would deliver them. Traps from the Guest can be set
11 * up to go directly back into the Guest, but sometimes the Host wants to see 12 * up to go directly back into the Guest, but sometimes the Host wants to see
12 * them first, so we also have a way of "reflecting" them into the Guest as if 13 * them first, so we also have a way of "reflecting" them into the Guest as if
13 * they had been delivered to it directly. :*/ 14 * they had been delivered to it directly.
15:*/
14#include <linux/uaccess.h> 16#include <linux/uaccess.h>
15#include <linux/interrupt.h> 17#include <linux/interrupt.h>
16#include <linux/module.h> 18#include <linux/module.h>
@@ -26,8 +28,10 @@ static unsigned long idt_address(u32 lo, u32 hi)
26 return (lo & 0x0000FFFF) | (hi & 0xFFFF0000); 28 return (lo & 0x0000FFFF) | (hi & 0xFFFF0000);
27} 29}
28 30
29/* The "type" of the interrupt handler is a 4 bit field: we only support a 31/*
30 * couple of types. */ 32 * The "type" of the interrupt handler is a 4 bit field: we only support a
33 * couple of types.
34 */
31static int idt_type(u32 lo, u32 hi) 35static int idt_type(u32 lo, u32 hi)
32{ 36{
33 return (hi >> 8) & 0xF; 37 return (hi >> 8) & 0xF;
@@ -39,8 +43,10 @@ static bool idt_present(u32 lo, u32 hi)
39 return (hi & 0x8000); 43 return (hi & 0x8000);
40} 44}
41 45
42/* We need a helper to "push" a value onto the Guest's stack, since that's a 46/*
43 * big part of what delivering an interrupt does. */ 47 * We need a helper to "push" a value onto the Guest's stack, since that's a
48 * big part of what delivering an interrupt does.
49 */
44static void push_guest_stack(struct lg_cpu *cpu, unsigned long *gstack, u32 val) 50static void push_guest_stack(struct lg_cpu *cpu, unsigned long *gstack, u32 val)
45{ 51{
46 /* Stack grows upwards: move stack then write value. */ 52 /* Stack grows upwards: move stack then write value. */
@@ -48,7 +54,8 @@ static void push_guest_stack(struct lg_cpu *cpu, unsigned long *gstack, u32 val)
48 lgwrite(cpu, *gstack, u32, val); 54 lgwrite(cpu, *gstack, u32, val);
49} 55}
50 56
51/*H:210 The set_guest_interrupt() routine actually delivers the interrupt or 57/*H:210
58 * The set_guest_interrupt() routine actually delivers the interrupt or
52 * trap. The mechanics of delivering traps and interrupts to the Guest are the 59 * trap. The mechanics of delivering traps and interrupts to the Guest are the
53 * same, except some traps have an "error code" which gets pushed onto the 60 * same, except some traps have an "error code" which gets pushed onto the
54 * stack as well: the caller tells us if this is one. 61 * stack as well: the caller tells us if this is one.
@@ -59,7 +66,8 @@ static void push_guest_stack(struct lg_cpu *cpu, unsigned long *gstack, u32 val)
59 * 66 *
60 * We set up the stack just like the CPU does for a real interrupt, so it's 67 * We set up the stack just like the CPU does for a real interrupt, so it's
61 * identical for the Guest (and the standard "iret" instruction will undo 68 * identical for the Guest (and the standard "iret" instruction will undo
62 * it). */ 69 * it).
70 */
63static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi, 71static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi,
64 bool has_err) 72 bool has_err)
65{ 73{
@@ -67,20 +75,26 @@ static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi,
67 u32 eflags, ss, irq_enable; 75 u32 eflags, ss, irq_enable;
68 unsigned long virtstack; 76 unsigned long virtstack;
69 77
70 /* There are two cases for interrupts: one where the Guest is already 78 /*
79 * There are two cases for interrupts: one where the Guest is already
71 * in the kernel, and a more complex one where the Guest is in 80 * in the kernel, and a more complex one where the Guest is in
72 * userspace. We check the privilege level to find out. */ 81 * userspace. We check the privilege level to find out.
82 */
73 if ((cpu->regs->ss&0x3) != GUEST_PL) { 83 if ((cpu->regs->ss&0x3) != GUEST_PL) {
74 /* The Guest told us their kernel stack with the SET_STACK 84 /*
75 * hypercall: both the virtual address and the segment */ 85 * The Guest told us their kernel stack with the SET_STACK
86 * hypercall: both the virtual address and the segment.
87 */
76 virtstack = cpu->esp1; 88 virtstack = cpu->esp1;
77 ss = cpu->ss1; 89 ss = cpu->ss1;
78 90
79 origstack = gstack = guest_pa(cpu, virtstack); 91 origstack = gstack = guest_pa(cpu, virtstack);
80 /* We push the old stack segment and pointer onto the new 92 /*
93 * We push the old stack segment and pointer onto the new
81 * stack: when the Guest does an "iret" back from the interrupt 94 * stack: when the Guest does an "iret" back from the interrupt
82 * handler the CPU will notice they're dropping privilege 95 * handler the CPU will notice they're dropping privilege
83 * levels and expect these here. */ 96 * levels and expect these here.
97 */
84 push_guest_stack(cpu, &gstack, cpu->regs->ss); 98 push_guest_stack(cpu, &gstack, cpu->regs->ss);
85 push_guest_stack(cpu, &gstack, cpu->regs->esp); 99 push_guest_stack(cpu, &gstack, cpu->regs->esp);
86 } else { 100 } else {
@@ -91,18 +105,22 @@ static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi,
91 origstack = gstack = guest_pa(cpu, virtstack); 105 origstack = gstack = guest_pa(cpu, virtstack);
92 } 106 }
93 107
94 /* Remember that we never let the Guest actually disable interrupts, so 108 /*
109 * Remember that we never let the Guest actually disable interrupts, so
95 * the "Interrupt Flag" bit is always set. We copy that bit from the 110 * the "Interrupt Flag" bit is always set. We copy that bit from the
96 * Guest's "irq_enabled" field into the eflags word: we saw the Guest 111 * Guest's "irq_enabled" field into the eflags word: we saw the Guest
97 * copy it back in "lguest_iret". */ 112 * copy it back in "lguest_iret".
113 */
98 eflags = cpu->regs->eflags; 114 eflags = cpu->regs->eflags;
99 if (get_user(irq_enable, &cpu->lg->lguest_data->irq_enabled) == 0 115 if (get_user(irq_enable, &cpu->lg->lguest_data->irq_enabled) == 0
100 && !(irq_enable & X86_EFLAGS_IF)) 116 && !(irq_enable & X86_EFLAGS_IF))
101 eflags &= ~X86_EFLAGS_IF; 117 eflags &= ~X86_EFLAGS_IF;
102 118
103 /* An interrupt is expected to push three things on the stack: the old 119 /*
120 * An interrupt is expected to push three things on the stack: the old
104 * "eflags" word, the old code segment, and the old instruction 121 * "eflags" word, the old code segment, and the old instruction
105 * pointer. */ 122 * pointer.
123 */
106 push_guest_stack(cpu, &gstack, eflags); 124 push_guest_stack(cpu, &gstack, eflags);
107 push_guest_stack(cpu, &gstack, cpu->regs->cs); 125 push_guest_stack(cpu, &gstack, cpu->regs->cs);
108 push_guest_stack(cpu, &gstack, cpu->regs->eip); 126 push_guest_stack(cpu, &gstack, cpu->regs->eip);
@@ -111,15 +129,19 @@ static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi,
111 if (has_err) 129 if (has_err)
112 push_guest_stack(cpu, &gstack, cpu->regs->errcode); 130 push_guest_stack(cpu, &gstack, cpu->regs->errcode);
113 131
114 /* Now we've pushed all the old state, we change the stack, the code 132 /*
115 * segment and the address to execute. */ 133 * Now we've pushed all the old state, we change the stack, the code
134 * segment and the address to execute.
135 */
116 cpu->regs->ss = ss; 136 cpu->regs->ss = ss;
117 cpu->regs->esp = virtstack + (gstack - origstack); 137 cpu->regs->esp = virtstack + (gstack - origstack);
118 cpu->regs->cs = (__KERNEL_CS|GUEST_PL); 138 cpu->regs->cs = (__KERNEL_CS|GUEST_PL);
119 cpu->regs->eip = idt_address(lo, hi); 139 cpu->regs->eip = idt_address(lo, hi);
120 140
121 /* There are two kinds of interrupt handlers: 0xE is an "interrupt 141 /*
122 * gate" which expects interrupts to be disabled on entry. */ 142 * There are two kinds of interrupt handlers: 0xE is an "interrupt
143 * gate" which expects interrupts to be disabled on entry.
144 */
123 if (idt_type(lo, hi) == 0xE) 145 if (idt_type(lo, hi) == 0xE)
124 if (put_user(0, &cpu->lg->lguest_data->irq_enabled)) 146 if (put_user(0, &cpu->lg->lguest_data->irq_enabled))
125 kill_guest(cpu, "Disabling interrupts"); 147 kill_guest(cpu, "Disabling interrupts");
@@ -130,7 +152,8 @@ static void set_guest_interrupt(struct lg_cpu *cpu, u32 lo, u32 hi,
130 * 152 *
131 * interrupt_pending() returns the first pending interrupt which isn't blocked 153 * interrupt_pending() returns the first pending interrupt which isn't blocked
132 * by the Guest. It is called before every entry to the Guest, and just before 154 * by the Guest. It is called before every entry to the Guest, and just before
133 * we go to sleep when the Guest has halted itself. */ 155 * we go to sleep when the Guest has halted itself.
156 */
134unsigned int interrupt_pending(struct lg_cpu *cpu, bool *more) 157unsigned int interrupt_pending(struct lg_cpu *cpu, bool *more)
135{ 158{
136 unsigned int irq; 159 unsigned int irq;
@@ -140,8 +163,10 @@ unsigned int interrupt_pending(struct lg_cpu *cpu, bool *more)
140 if (!cpu->lg->lguest_data) 163 if (!cpu->lg->lguest_data)
141 return LGUEST_IRQS; 164 return LGUEST_IRQS;
142 165
143 /* Take our "irqs_pending" array and remove any interrupts the Guest 166 /*
144 * wants blocked: the result ends up in "blk". */ 167 * Take our "irqs_pending" array and remove any interrupts the Guest
168 * wants blocked: the result ends up in "blk".
169 */
145 if (copy_from_user(&blk, cpu->lg->lguest_data->blocked_interrupts, 170 if (copy_from_user(&blk, cpu->lg->lguest_data->blocked_interrupts,
146 sizeof(blk))) 171 sizeof(blk)))
147 return LGUEST_IRQS; 172 return LGUEST_IRQS;
@@ -154,16 +179,20 @@ unsigned int interrupt_pending(struct lg_cpu *cpu, bool *more)
154 return irq; 179 return irq;
155} 180}
156 181
157/* This actually diverts the Guest to running an interrupt handler, once an 182/*
158 * interrupt has been identified by interrupt_pending(). */ 183 * This actually diverts the Guest to running an interrupt handler, once an
184 * interrupt has been identified by interrupt_pending().
185 */
159void try_deliver_interrupt(struct lg_cpu *cpu, unsigned int irq, bool more) 186void try_deliver_interrupt(struct lg_cpu *cpu, unsigned int irq, bool more)
160{ 187{
161 struct desc_struct *idt; 188 struct desc_struct *idt;
162 189
163 BUG_ON(irq >= LGUEST_IRQS); 190 BUG_ON(irq >= LGUEST_IRQS);
164 191
165 /* They may be in the middle of an iret, where they asked us never to 192 /*
166 * deliver interrupts. */ 193 * They may be in the middle of an iret, where they asked us never to
194 * deliver interrupts.
195 */
167 if (cpu->regs->eip >= cpu->lg->noirq_start && 196 if (cpu->regs->eip >= cpu->lg->noirq_start &&
168 (cpu->regs->eip < cpu->lg->noirq_end)) 197 (cpu->regs->eip < cpu->lg->noirq_end))
169 return; 198 return;
@@ -187,29 +216,37 @@ void try_deliver_interrupt(struct lg_cpu *cpu, unsigned int irq, bool more)
187 } 216 }
188 } 217 }
189 218
190 /* Look at the IDT entry the Guest gave us for this interrupt. The 219 /*
220 * Look at the IDT entry the Guest gave us for this interrupt. The
191 * first 32 (FIRST_EXTERNAL_VECTOR) entries are for traps, so we skip 221 * first 32 (FIRST_EXTERNAL_VECTOR) entries are for traps, so we skip
192 * over them. */ 222 * over them.
223 */
193 idt = &cpu->arch.idt[FIRST_EXTERNAL_VECTOR+irq]; 224 idt = &cpu->arch.idt[FIRST_EXTERNAL_VECTOR+irq];
194 /* If they don't have a handler (yet?), we just ignore it */ 225 /* If they don't have a handler (yet?), we just ignore it */
195 if (idt_present(idt->a, idt->b)) { 226 if (idt_present(idt->a, idt->b)) {
196 /* OK, mark it no longer pending and deliver it. */ 227 /* OK, mark it no longer pending and deliver it. */
197 clear_bit(irq, cpu->irqs_pending); 228 clear_bit(irq, cpu->irqs_pending);
198 /* set_guest_interrupt() takes the interrupt descriptor and a 229 /*
230 * set_guest_interrupt() takes the interrupt descriptor and a
199 * flag to say whether this interrupt pushes an error code onto 231 * flag to say whether this interrupt pushes an error code onto
200 * the stack as well: virtual interrupts never do. */ 232 * the stack as well: virtual interrupts never do.
233 */
201 set_guest_interrupt(cpu, idt->a, idt->b, false); 234 set_guest_interrupt(cpu, idt->a, idt->b, false);
202 } 235 }
203 236
204 /* Every time we deliver an interrupt, we update the timestamp in the 237 /*
238 * Every time we deliver an interrupt, we update the timestamp in the
205 * Guest's lguest_data struct. It would be better for the Guest if we 239 * Guest's lguest_data struct. It would be better for the Guest if we
206 * did this more often, but it can actually be quite slow: doing it 240 * did this more often, but it can actually be quite slow: doing it
207 * here is a compromise which means at least it gets updated every 241 * here is a compromise which means at least it gets updated every
208 * timer interrupt. */ 242 * timer interrupt.
243 */
209 write_timestamp(cpu); 244 write_timestamp(cpu);
210 245
211 /* If there are no other interrupts we want to deliver, clear 246 /*
212 * the pending flag. */ 247 * If there are no other interrupts we want to deliver, clear
248 * the pending flag.
249 */
213 if (!more) 250 if (!more)
214 put_user(0, &cpu->lg->lguest_data->irq_pending); 251 put_user(0, &cpu->lg->lguest_data->irq_pending);
215} 252}
@@ -217,24 +254,29 @@ void try_deliver_interrupt(struct lg_cpu *cpu, unsigned int irq, bool more)
217/* And this is the routine when we want to set an interrupt for the Guest. */ 254/* And this is the routine when we want to set an interrupt for the Guest. */
218void set_interrupt(struct lg_cpu *cpu, unsigned int irq) 255void set_interrupt(struct lg_cpu *cpu, unsigned int irq)
219{ 256{
220 /* Next time the Guest runs, the core code will see if it can deliver 257 /*
221 * this interrupt. */ 258 * Next time the Guest runs, the core code will see if it can deliver
259 * this interrupt.
260 */
222 set_bit(irq, cpu->irqs_pending); 261 set_bit(irq, cpu->irqs_pending);
223 262
224 /* Make sure it sees it; it might be asleep (eg. halted), or 263 /*
225 * running the Guest right now, in which case kick_process() 264 * Make sure it sees it; it might be asleep (eg. halted), or running
226 * will knock it out. */ 265 * the Guest right now, in which case kick_process() will knock it out.
266 */
227 if (!wake_up_process(cpu->tsk)) 267 if (!wake_up_process(cpu->tsk))
228 kick_process(cpu->tsk); 268 kick_process(cpu->tsk);
229} 269}
230/*:*/ 270/*:*/
231 271
232/* Linux uses trap 128 for system calls. Plan9 uses 64, and Ron Minnich sent 272/*
273 * Linux uses trap 128 for system calls. Plan9 uses 64, and Ron Minnich sent
233 * me a patch, so we support that too. It'd be a big step for lguest if half 274 * me a patch, so we support that too. It'd be a big step for lguest if half
234 * the Plan 9 user base were to start using it. 275 * the Plan 9 user base were to start using it.
235 * 276 *
236 * Actually now I think of it, it's possible that Ron *is* half the Plan 9 277 * Actually now I think of it, it's possible that Ron *is* half the Plan 9
237 * userbase. Oh well. */ 278 * userbase. Oh well.
279 */
238static bool could_be_syscall(unsigned int num) 280static bool could_be_syscall(unsigned int num)
239{ 281{
240 /* Normal Linux SYSCALL_VECTOR or reserved vector? */ 282 /* Normal Linux SYSCALL_VECTOR or reserved vector? */
@@ -274,9 +316,11 @@ void free_interrupts(void)
274 clear_bit(syscall_vector, used_vectors); 316 clear_bit(syscall_vector, used_vectors);
275} 317}
276 318
277/*H:220 Now we've got the routines to deliver interrupts, delivering traps like 319/*H:220
320 * Now we've got the routines to deliver interrupts, delivering traps like
278 * page fault is easy. The only trick is that Intel decided that some traps 321 * page fault is easy. The only trick is that Intel decided that some traps
279 * should have error codes: */ 322 * should have error codes:
323 */
280static bool has_err(unsigned int trap) 324static bool has_err(unsigned int trap)
281{ 325{
282 return (trap == 8 || (trap >= 10 && trap <= 14) || trap == 17); 326 return (trap == 8 || (trap >= 10 && trap <= 14) || trap == 17);
@@ -285,13 +329,17 @@ static bool has_err(unsigned int trap)
285/* deliver_trap() returns true if it could deliver the trap. */ 329/* deliver_trap() returns true if it could deliver the trap. */
286bool deliver_trap(struct lg_cpu *cpu, unsigned int num) 330bool deliver_trap(struct lg_cpu *cpu, unsigned int num)
287{ 331{
288 /* Trap numbers are always 8 bit, but we set an impossible trap number 332 /*
289 * for traps inside the Switcher, so check that here. */ 333 * Trap numbers are always 8 bit, but we set an impossible trap number
334 * for traps inside the Switcher, so check that here.
335 */
290 if (num >= ARRAY_SIZE(cpu->arch.idt)) 336 if (num >= ARRAY_SIZE(cpu->arch.idt))
291 return false; 337 return false;
292 338
293 /* Early on the Guest hasn't set the IDT entries (or maybe it put a 339 /*
294 * bogus one in): if we fail here, the Guest will be killed. */ 340 * Early on the Guest hasn't set the IDT entries (or maybe it put a
341 * bogus one in): if we fail here, the Guest will be killed.
342 */
295 if (!idt_present(cpu->arch.idt[num].a, cpu->arch.idt[num].b)) 343 if (!idt_present(cpu->arch.idt[num].a, cpu->arch.idt[num].b))
296 return false; 344 return false;
297 set_guest_interrupt(cpu, cpu->arch.idt[num].a, 345 set_guest_interrupt(cpu, cpu->arch.idt[num].a,
@@ -299,7 +347,8 @@ bool deliver_trap(struct lg_cpu *cpu, unsigned int num)
299 return true; 347 return true;
300} 348}
301 349
302/*H:250 Here's the hard part: returning to the Host every time a trap happens 350/*H:250
351 * Here's the hard part: returning to the Host every time a trap happens
303 * and then calling deliver_trap() and re-entering the Guest is slow. 352 * and then calling deliver_trap() and re-entering the Guest is slow.
304 * Particularly because Guest userspace system calls are traps (usually trap 353 * Particularly because Guest userspace system calls are traps (usually trap
305 * 128). 354 * 128).
@@ -311,69 +360,87 @@ bool deliver_trap(struct lg_cpu *cpu, unsigned int num)
311 * the other hypervisors would beat it up at lunchtime. 360 * the other hypervisors would beat it up at lunchtime.
312 * 361 *
313 * This routine indicates if a particular trap number could be delivered 362 * This routine indicates if a particular trap number could be delivered
314 * directly. */ 363 * directly.
364 */
315static bool direct_trap(unsigned int num) 365static bool direct_trap(unsigned int num)
316{ 366{
317 /* Hardware interrupts don't go to the Guest at all (except system 367 /*
318 * call). */ 368 * Hardware interrupts don't go to the Guest at all (except system
369 * call).
370 */
319 if (num >= FIRST_EXTERNAL_VECTOR && !could_be_syscall(num)) 371 if (num >= FIRST_EXTERNAL_VECTOR && !could_be_syscall(num))
320 return false; 372 return false;
321 373
322 /* The Host needs to see page faults (for shadow paging and to save the 374 /*
375 * The Host needs to see page faults (for shadow paging and to save the
323 * fault address), general protection faults (in/out emulation) and 376 * fault address), general protection faults (in/out emulation) and
324 * device not available (TS handling), invalid opcode fault (kvm hcall), 377 * device not available (TS handling), invalid opcode fault (kvm hcall),
325 * and of course, the hypercall trap. */ 378 * and of course, the hypercall trap.
379 */
326 return num != 14 && num != 13 && num != 7 && 380 return num != 14 && num != 13 && num != 7 &&
327 num != 6 && num != LGUEST_TRAP_ENTRY; 381 num != 6 && num != LGUEST_TRAP_ENTRY;
328} 382}
329/*:*/ 383/*:*/
330 384
331/*M:005 The Guest has the ability to turn its interrupt gates into trap gates, 385/*M:005
386 * The Guest has the ability to turn its interrupt gates into trap gates,
332 * if it is careful. The Host will let trap gates can go directly to the 387 * if it is careful. The Host will let trap gates can go directly to the
333 * Guest, but the Guest needs the interrupts atomically disabled for an 388 * Guest, but the Guest needs the interrupts atomically disabled for an
334 * interrupt gate. It can do this by pointing the trap gate at instructions 389 * interrupt gate. It can do this by pointing the trap gate at instructions
335 * within noirq_start and noirq_end, where it can safely disable interrupts. */ 390 * within noirq_start and noirq_end, where it can safely disable interrupts.
391 */
336 392
337/*M:006 The Guests do not use the sysenter (fast system call) instruction, 393/*M:006
394 * The Guests do not use the sysenter (fast system call) instruction,
338 * because it's hardcoded to enter privilege level 0 and so can't go direct. 395 * because it's hardcoded to enter privilege level 0 and so can't go direct.
339 * It's about twice as fast as the older "int 0x80" system call, so it might 396 * It's about twice as fast as the older "int 0x80" system call, so it might
340 * still be worthwhile to handle it in the Switcher and lcall down to the 397 * still be worthwhile to handle it in the Switcher and lcall down to the
341 * Guest. The sysenter semantics are hairy tho: search for that keyword in 398 * Guest. The sysenter semantics are hairy tho: search for that keyword in
342 * entry.S :*/ 399 * entry.S
400:*/
343 401
344/*H:260 When we make traps go directly into the Guest, we need to make sure 402/*H:260
403 * When we make traps go directly into the Guest, we need to make sure
345 * the kernel stack is valid (ie. mapped in the page tables). Otherwise, the 404 * the kernel stack is valid (ie. mapped in the page tables). Otherwise, the
346 * CPU trying to deliver the trap will fault while trying to push the interrupt 405 * CPU trying to deliver the trap will fault while trying to push the interrupt
347 * words on the stack: this is called a double fault, and it forces us to kill 406 * words on the stack: this is called a double fault, and it forces us to kill
348 * the Guest. 407 * the Guest.
349 * 408 *
350 * Which is deeply unfair, because (literally!) it wasn't the Guests' fault. */ 409 * Which is deeply unfair, because (literally!) it wasn't the Guests' fault.
410 */
351void pin_stack_pages(struct lg_cpu *cpu) 411void pin_stack_pages(struct lg_cpu *cpu)
352{ 412{
353 unsigned int i; 413 unsigned int i;
354 414
355 /* Depending on the CONFIG_4KSTACKS option, the Guest can have one or 415 /*
356 * two pages of stack space. */ 416 * Depending on the CONFIG_4KSTACKS option, the Guest can have one or
417 * two pages of stack space.
418 */
357 for (i = 0; i < cpu->lg->stack_pages; i++) 419 for (i = 0; i < cpu->lg->stack_pages; i++)
358 /* The stack grows *upwards*, so the address we're given is the 420 /*
421 * The stack grows *upwards*, so the address we're given is the
359 * start of the page after the kernel stack. Subtract one to 422 * start of the page after the kernel stack. Subtract one to
360 * get back onto the first stack page, and keep subtracting to 423 * get back onto the first stack page, and keep subtracting to
361 * get to the rest of the stack pages. */ 424 * get to the rest of the stack pages.
425 */
362 pin_page(cpu, cpu->esp1 - 1 - i * PAGE_SIZE); 426 pin_page(cpu, cpu->esp1 - 1 - i * PAGE_SIZE);
363} 427}
364 428
365/* Direct traps also mean that we need to know whenever the Guest wants to use 429/*
430 * Direct traps also mean that we need to know whenever the Guest wants to use
366 * a different kernel stack, so we can change the IDT entries to use that 431 * a different kernel stack, so we can change the IDT entries to use that
367 * stack. The IDT entries expect a virtual address, so unlike most addresses 432 * stack. The IDT entries expect a virtual address, so unlike most addresses
368 * the Guest gives us, the "esp" (stack pointer) value here is virtual, not 433 * the Guest gives us, the "esp" (stack pointer) value here is virtual, not
369 * physical. 434 * physical.
370 * 435 *
371 * In Linux each process has its own kernel stack, so this happens a lot: we 436 * In Linux each process has its own kernel stack, so this happens a lot: we
372 * change stacks on each context switch. */ 437 * change stacks on each context switch.
438 */
373void guest_set_stack(struct lg_cpu *cpu, u32 seg, u32 esp, unsigned int pages) 439void guest_set_stack(struct lg_cpu *cpu, u32 seg, u32 esp, unsigned int pages)
374{ 440{
375 /* You are not allowed have a stack segment with privilege level 0: bad 441 /*
376 * Guest! */ 442 * You're not allowed a stack segment with privilege level 0: bad Guest!
443 */
377 if ((seg & 0x3) != GUEST_PL) 444 if ((seg & 0x3) != GUEST_PL)
378 kill_guest(cpu, "bad stack segment %i", seg); 445 kill_guest(cpu, "bad stack segment %i", seg);
379 /* We only expect one or two stack pages. */ 446 /* We only expect one or two stack pages. */
@@ -387,11 +454,15 @@ void guest_set_stack(struct lg_cpu *cpu, u32 seg, u32 esp, unsigned int pages)
387 pin_stack_pages(cpu); 454 pin_stack_pages(cpu);
388} 455}
389 456
390/* All this reference to mapping stacks leads us neatly into the other complex 457/*
391 * part of the Host: page table handling. */ 458 * All this reference to mapping stacks leads us neatly into the other complex
459 * part of the Host: page table handling.
460 */
392 461
393/*H:235 This is the routine which actually checks the Guest's IDT entry and 462/*H:235
394 * transfers it into the entry in "struct lguest": */ 463 * This is the routine which actually checks the Guest's IDT entry and
464 * transfers it into the entry in "struct lguest":
465 */
395static void set_trap(struct lg_cpu *cpu, struct desc_struct *trap, 466static void set_trap(struct lg_cpu *cpu, struct desc_struct *trap,
396 unsigned int num, u32 lo, u32 hi) 467 unsigned int num, u32 lo, u32 hi)
397{ 468{
@@ -407,30 +478,38 @@ static void set_trap(struct lg_cpu *cpu, struct desc_struct *trap,
407 if (type != 0xE && type != 0xF) 478 if (type != 0xE && type != 0xF)
408 kill_guest(cpu, "bad IDT type %i", type); 479 kill_guest(cpu, "bad IDT type %i", type);
409 480
410 /* We only copy the handler address, present bit, privilege level and 481 /*
482 * We only copy the handler address, present bit, privilege level and
411 * type. The privilege level controls where the trap can be triggered 483 * type. The privilege level controls where the trap can be triggered
412 * manually with an "int" instruction. This is usually GUEST_PL, 484 * manually with an "int" instruction. This is usually GUEST_PL,
413 * except for system calls which userspace can use. */ 485 * except for system calls which userspace can use.
486 */
414 trap->a = ((__KERNEL_CS|GUEST_PL)<<16) | (lo&0x0000FFFF); 487 trap->a = ((__KERNEL_CS|GUEST_PL)<<16) | (lo&0x0000FFFF);
415 trap->b = (hi&0xFFFFEF00); 488 trap->b = (hi&0xFFFFEF00);
416} 489}
417 490
418/*H:230 While we're here, dealing with delivering traps and interrupts to the 491/*H:230
492 * While we're here, dealing with delivering traps and interrupts to the
419 * Guest, we might as well complete the picture: how the Guest tells us where 493 * Guest, we might as well complete the picture: how the Guest tells us where
420 * it wants them to go. This would be simple, except making traps fast 494 * it wants them to go. This would be simple, except making traps fast
421 * requires some tricks. 495 * requires some tricks.
422 * 496 *
423 * We saw the Guest setting Interrupt Descriptor Table (IDT) entries with the 497 * We saw the Guest setting Interrupt Descriptor Table (IDT) entries with the
424 * LHCALL_LOAD_IDT_ENTRY hypercall before: that comes here. */ 498 * LHCALL_LOAD_IDT_ENTRY hypercall before: that comes here.
499 */
425void load_guest_idt_entry(struct lg_cpu *cpu, unsigned int num, u32 lo, u32 hi) 500void load_guest_idt_entry(struct lg_cpu *cpu, unsigned int num, u32 lo, u32 hi)
426{ 501{
427 /* Guest never handles: NMI, doublefault, spurious interrupt or 502 /*
428 * hypercall. We ignore when it tries to set them. */ 503 * Guest never handles: NMI, doublefault, spurious interrupt or
504 * hypercall. We ignore when it tries to set them.
505 */
429 if (num == 2 || num == 8 || num == 15 || num == LGUEST_TRAP_ENTRY) 506 if (num == 2 || num == 8 || num == 15 || num == LGUEST_TRAP_ENTRY)
430 return; 507 return;
431 508
432 /* Mark the IDT as changed: next time the Guest runs we'll know we have 509 /*
433 * to copy this again. */ 510 * Mark the IDT as changed: next time the Guest runs we'll know we have
511 * to copy this again.
512 */
434 cpu->changed |= CHANGED_IDT; 513 cpu->changed |= CHANGED_IDT;
435 514
436 /* Check that the Guest doesn't try to step outside the bounds. */ 515 /* Check that the Guest doesn't try to step outside the bounds. */
@@ -440,9 +519,11 @@ void load_guest_idt_entry(struct lg_cpu *cpu, unsigned int num, u32 lo, u32 hi)
440 set_trap(cpu, &cpu->arch.idt[num], num, lo, hi); 519 set_trap(cpu, &cpu->arch.idt[num], num, lo, hi);
441} 520}
442 521
443/* The default entry for each interrupt points into the Switcher routines which 522/*
523 * The default entry for each interrupt points into the Switcher routines which
444 * simply return to the Host. The run_guest() loop will then call 524 * simply return to the Host. The run_guest() loop will then call
445 * deliver_trap() to bounce it back into the Guest. */ 525 * deliver_trap() to bounce it back into the Guest.
526 */
446static void default_idt_entry(struct desc_struct *idt, 527static void default_idt_entry(struct desc_struct *idt,
447 int trap, 528 int trap,
448 const unsigned long handler, 529 const unsigned long handler,
@@ -451,13 +532,17 @@ static void default_idt_entry(struct desc_struct *idt,
451 /* A present interrupt gate. */ 532 /* A present interrupt gate. */
452 u32 flags = 0x8e00; 533 u32 flags = 0x8e00;
453 534
454 /* Set the privilege level on the entry for the hypercall: this allows 535 /*
455 * the Guest to use the "int" instruction to trigger it. */ 536 * Set the privilege level on the entry for the hypercall: this allows
537 * the Guest to use the "int" instruction to trigger it.
538 */
456 if (trap == LGUEST_TRAP_ENTRY) 539 if (trap == LGUEST_TRAP_ENTRY)
457 flags |= (GUEST_PL << 13); 540 flags |= (GUEST_PL << 13);
458 else if (base) 541 else if (base)
459 /* Copy priv. level from what Guest asked for. This allows 542 /*
460 * debug (int 3) traps from Guest userspace, for example. */ 543 * Copy privilege level from what Guest asked for. This allows
544 * debug (int 3) traps from Guest userspace, for example.
545 */
461 flags |= (base->b & 0x6000); 546 flags |= (base->b & 0x6000);
462 547
463 /* Now pack it into the IDT entry in its weird format. */ 548 /* Now pack it into the IDT entry in its weird format. */
@@ -475,16 +560,20 @@ void setup_default_idt_entries(struct lguest_ro_state *state,
475 default_idt_entry(&state->guest_idt[i], i, def[i], NULL); 560 default_idt_entry(&state->guest_idt[i], i, def[i], NULL);
476} 561}
477 562
478/*H:240 We don't use the IDT entries in the "struct lguest" directly, instead 563/*H:240
564 * We don't use the IDT entries in the "struct lguest" directly, instead
479 * we copy them into the IDT which we've set up for Guests on this CPU, just 565 * we copy them into the IDT which we've set up for Guests on this CPU, just
480 * before we run the Guest. This routine does that copy. */ 566 * before we run the Guest. This routine does that copy.
567 */
481void copy_traps(const struct lg_cpu *cpu, struct desc_struct *idt, 568void copy_traps(const struct lg_cpu *cpu, struct desc_struct *idt,
482 const unsigned long *def) 569 const unsigned long *def)
483{ 570{
484 unsigned int i; 571 unsigned int i;
485 572
486 /* We can simply copy the direct traps, otherwise we use the default 573 /*
487 * ones in the Switcher: they will return to the Host. */ 574 * We can simply copy the direct traps, otherwise we use the default
575 * ones in the Switcher: they will return to the Host.
576 */
488 for (i = 0; i < ARRAY_SIZE(cpu->arch.idt); i++) { 577 for (i = 0; i < ARRAY_SIZE(cpu->arch.idt); i++) {
489 const struct desc_struct *gidt = &cpu->arch.idt[i]; 578 const struct desc_struct *gidt = &cpu->arch.idt[i];
490 579
@@ -492,14 +581,16 @@ void copy_traps(const struct lg_cpu *cpu, struct desc_struct *idt,
492 if (!direct_trap(i)) 581 if (!direct_trap(i))
493 continue; 582 continue;
494 583
495 /* Only trap gates (type 15) can go direct to the Guest. 584 /*
585 * Only trap gates (type 15) can go direct to the Guest.
496 * Interrupt gates (type 14) disable interrupts as they are 586 * Interrupt gates (type 14) disable interrupts as they are
497 * entered, which we never let the Guest do. Not present 587 * entered, which we never let the Guest do. Not present
498 * entries (type 0x0) also can't go direct, of course. 588 * entries (type 0x0) also can't go direct, of course.
499 * 589 *
500 * If it can't go direct, we still need to copy the priv. level: 590 * If it can't go direct, we still need to copy the priv. level:
501 * they might want to give userspace access to a software 591 * they might want to give userspace access to a software
502 * interrupt. */ 592 * interrupt.
593 */
503 if (idt_type(gidt->a, gidt->b) == 0xF) 594 if (idt_type(gidt->a, gidt->b) == 0xF)
504 idt[i] = *gidt; 595 idt[i] = *gidt;
505 else 596 else
@@ -518,7 +609,8 @@ void copy_traps(const struct lg_cpu *cpu, struct desc_struct *idt,
518 * the next timer interrupt (in nanoseconds). We use the high-resolution timer 609 * the next timer interrupt (in nanoseconds). We use the high-resolution timer
519 * infrastructure to set a callback at that time. 610 * infrastructure to set a callback at that time.
520 * 611 *
521 * 0 means "turn off the clock". */ 612 * 0 means "turn off the clock".
613 */
522void guest_set_clockevent(struct lg_cpu *cpu, unsigned long delta) 614void guest_set_clockevent(struct lg_cpu *cpu, unsigned long delta)
523{ 615{
524 ktime_t expires; 616 ktime_t expires;
@@ -529,9 +621,11 @@ void guest_set_clockevent(struct lg_cpu *cpu, unsigned long delta)
529 return; 621 return;
530 } 622 }
531 623
532 /* We use wallclock time here, so the Guest might not be running for 624 /*
625 * We use wallclock time here, so the Guest might not be running for
533 * all the time between now and the timer interrupt it asked for. This 626 * all the time between now and the timer interrupt it asked for. This
534 * is almost always the right thing to do. */ 627 * is almost always the right thing to do.
628 */
535 expires = ktime_add_ns(ktime_get_real(), delta); 629 expires = ktime_add_ns(ktime_get_real(), delta);
536 hrtimer_start(&cpu->hrt, expires, HRTIMER_MODE_ABS); 630 hrtimer_start(&cpu->hrt, expires, HRTIMER_MODE_ABS);
537} 631}
diff --git a/drivers/lguest/lg.h b/drivers/lguest/lg.h
index 01c591923793..bc28745d05af 100644
--- a/drivers/lguest/lg.h
+++ b/drivers/lguest/lg.h
@@ -16,15 +16,13 @@
16void free_pagetables(void); 16void free_pagetables(void);
17int init_pagetables(struct page **switcher_page, unsigned int pages); 17int init_pagetables(struct page **switcher_page, unsigned int pages);
18 18
19struct pgdir 19struct pgdir {
20{
21 unsigned long gpgdir; 20 unsigned long gpgdir;
22 pgd_t *pgdir; 21 pgd_t *pgdir;
23}; 22};
24 23
25/* We have two pages shared with guests, per cpu. */ 24/* We have two pages shared with guests, per cpu. */
26struct lguest_pages 25struct lguest_pages {
27{
28 /* This is the stack page mapped rw in guest */ 26 /* This is the stack page mapped rw in guest */
29 char spare[PAGE_SIZE - sizeof(struct lguest_regs)]; 27 char spare[PAGE_SIZE - sizeof(struct lguest_regs)];
30 struct lguest_regs regs; 28 struct lguest_regs regs;
@@ -54,13 +52,13 @@ struct lg_cpu {
54 52
55 unsigned long pending_notify; /* pfn from LHCALL_NOTIFY */ 53 unsigned long pending_notify; /* pfn from LHCALL_NOTIFY */
56 54
57 /* At end of a page shared mapped over lguest_pages in guest. */ 55 /* At end of a page shared mapped over lguest_pages in guest. */
58 unsigned long regs_page; 56 unsigned long regs_page;
59 struct lguest_regs *regs; 57 struct lguest_regs *regs;
60 58
61 struct lguest_pages *last_pages; 59 struct lguest_pages *last_pages;
62 60
63 int cpu_pgd; /* which pgd this cpu is currently using */ 61 int cpu_pgd; /* Which pgd this cpu is currently using */
64 62
65 /* If a hypercall was asked for, this points to the arguments. */ 63 /* If a hypercall was asked for, this points to the arguments. */
66 struct hcall_args *hcall; 64 struct hcall_args *hcall;
@@ -89,15 +87,17 @@ struct lg_eventfd_map {
89}; 87};
90 88
91/* The private info the thread maintains about the guest. */ 89/* The private info the thread maintains about the guest. */
92struct lguest 90struct lguest {
93{
94 struct lguest_data __user *lguest_data; 91 struct lguest_data __user *lguest_data;
95 struct lg_cpu cpus[NR_CPUS]; 92 struct lg_cpu cpus[NR_CPUS];
96 unsigned int nr_cpus; 93 unsigned int nr_cpus;
97 94
98 u32 pfn_limit; 95 u32 pfn_limit;
99 /* This provides the offset to the base of guest-physical 96
100 * memory in the Launcher. */ 97 /*
98 * This provides the offset to the base of guest-physical memory in the
99 * Launcher.
100 */
101 void __user *mem_base; 101 void __user *mem_base;
102 unsigned long kernel_address; 102 unsigned long kernel_address;
103 103
@@ -122,11 +122,13 @@ bool lguest_address_ok(const struct lguest *lg,
122void __lgread(struct lg_cpu *, void *, unsigned long, unsigned); 122void __lgread(struct lg_cpu *, void *, unsigned long, unsigned);
123void __lgwrite(struct lg_cpu *, unsigned long, const void *, unsigned); 123void __lgwrite(struct lg_cpu *, unsigned long, const void *, unsigned);
124 124
125/*H:035 Using memory-copy operations like that is usually inconvient, so we 125/*H:035
126 * Using memory-copy operations like that is usually inconvient, so we
126 * have the following helper macros which read and write a specific type (often 127 * have the following helper macros which read and write a specific type (often
127 * an unsigned long). 128 * an unsigned long).
128 * 129 *
129 * This reads into a variable of the given type then returns that. */ 130 * This reads into a variable of the given type then returns that.
131 */
130#define lgread(cpu, addr, type) \ 132#define lgread(cpu, addr, type) \
131 ({ type _v; __lgread((cpu), &_v, (addr), sizeof(_v)); _v; }) 133 ({ type _v; __lgread((cpu), &_v, (addr), sizeof(_v)); _v; })
132 134
@@ -140,9 +142,11 @@ void __lgwrite(struct lg_cpu *, unsigned long, const void *, unsigned);
140 142
141int run_guest(struct lg_cpu *cpu, unsigned long __user *user); 143int run_guest(struct lg_cpu *cpu, unsigned long __user *user);
142 144
143/* Helper macros to obtain the first 12 or the last 20 bits, this is only the 145/*
146 * Helper macros to obtain the first 12 or the last 20 bits, this is only the
144 * first step in the migration to the kernel types. pte_pfn is already defined 147 * first step in the migration to the kernel types. pte_pfn is already defined
145 * in the kernel. */ 148 * in the kernel.
149 */
146#define pgd_flags(x) (pgd_val(x) & ~PAGE_MASK) 150#define pgd_flags(x) (pgd_val(x) & ~PAGE_MASK)
147#define pgd_pfn(x) (pgd_val(x) >> PAGE_SHIFT) 151#define pgd_pfn(x) (pgd_val(x) >> PAGE_SHIFT)
148#define pmd_flags(x) (pmd_val(x) & ~PAGE_MASK) 152#define pmd_flags(x) (pmd_val(x) & ~PAGE_MASK)
diff --git a/drivers/lguest/lguest_device.c b/drivers/lguest/lguest_device.c
index e082cdac88b4..b6200bc39b58 100644
--- a/drivers/lguest/lguest_device.c
+++ b/drivers/lguest/lguest_device.c
@@ -1,10 +1,12 @@
1/*P:050 Lguest guests use a very simple method to describe devices. It's a 1/*P:050
2 * Lguest guests use a very simple method to describe devices. It's a
2 * series of device descriptors contained just above the top of normal Guest 3 * series of device descriptors contained just above the top of normal Guest
3 * memory. 4 * memory.
4 * 5 *
5 * We use the standard "virtio" device infrastructure, which provides us with a 6 * We use the standard "virtio" device infrastructure, which provides us with a
6 * console, a network and a block driver. Each one expects some configuration 7 * console, a network and a block driver. Each one expects some configuration
7 * information and a "virtqueue" or two to send and receive data. :*/ 8 * information and a "virtqueue" or two to send and receive data.
9:*/
8#include <linux/init.h> 10#include <linux/init.h>
9#include <linux/bootmem.h> 11#include <linux/bootmem.h>
10#include <linux/lguest_launcher.h> 12#include <linux/lguest_launcher.h>
@@ -20,8 +22,10 @@
20/* The pointer to our (page) of device descriptions. */ 22/* The pointer to our (page) of device descriptions. */
21static void *lguest_devices; 23static void *lguest_devices;
22 24
23/* For Guests, device memory can be used as normal memory, so we cast away the 25/*
24 * __iomem to quieten sparse. */ 26 * For Guests, device memory can be used as normal memory, so we cast away the
27 * __iomem to quieten sparse.
28 */
25static inline void *lguest_map(unsigned long phys_addr, unsigned long pages) 29static inline void *lguest_map(unsigned long phys_addr, unsigned long pages)
26{ 30{
27 return (__force void *)ioremap_cache(phys_addr, PAGE_SIZE*pages); 31 return (__force void *)ioremap_cache(phys_addr, PAGE_SIZE*pages);
@@ -32,8 +36,10 @@ static inline void lguest_unmap(void *addr)
32 iounmap((__force void __iomem *)addr); 36 iounmap((__force void __iomem *)addr);
33} 37}
34 38
35/*D:100 Each lguest device is just a virtio device plus a pointer to its entry 39/*D:100
36 * in the lguest_devices page. */ 40 * Each lguest device is just a virtio device plus a pointer to its entry
41 * in the lguest_devices page.
42 */
37struct lguest_device { 43struct lguest_device {
38 struct virtio_device vdev; 44 struct virtio_device vdev;
39 45
@@ -41,9 +47,11 @@ struct lguest_device {
41 struct lguest_device_desc *desc; 47 struct lguest_device_desc *desc;
42}; 48};
43 49
44/* Since the virtio infrastructure hands us a pointer to the virtio_device all 50/*
51 * Since the virtio infrastructure hands us a pointer to the virtio_device all
45 * the time, it helps to have a curt macro to get a pointer to the struct 52 * the time, it helps to have a curt macro to get a pointer to the struct
46 * lguest_device it's enclosed in. */ 53 * lguest_device it's enclosed in.
54 */
47#define to_lgdev(vd) container_of(vd, struct lguest_device, vdev) 55#define to_lgdev(vd) container_of(vd, struct lguest_device, vdev)
48 56
49/*D:130 57/*D:130
@@ -55,7 +63,8 @@ struct lguest_device {
55 * the driver will look at them during setup. 63 * the driver will look at them during setup.
56 * 64 *
57 * A convenient routine to return the device's virtqueue config array: 65 * A convenient routine to return the device's virtqueue config array:
58 * immediately after the descriptor. */ 66 * immediately after the descriptor.
67 */
59static struct lguest_vqconfig *lg_vq(const struct lguest_device_desc *desc) 68static struct lguest_vqconfig *lg_vq(const struct lguest_device_desc *desc)
60{ 69{
61 return (void *)(desc + 1); 70 return (void *)(desc + 1);
@@ -98,10 +107,12 @@ static u32 lg_get_features(struct virtio_device *vdev)
98 return features; 107 return features;
99} 108}
100 109
101/* The virtio core takes the features the Host offers, and copies the 110/*
102 * ones supported by the driver into the vdev->features array. Once 111 * The virtio core takes the features the Host offers, and copies the ones
103 * that's all sorted out, this routine is called so we can tell the 112 * supported by the driver into the vdev->features array. Once that's all
104 * Host which features we understand and accept. */ 113 * sorted out, this routine is called so we can tell the Host which features we
114 * understand and accept.
115 */
105static void lg_finalize_features(struct virtio_device *vdev) 116static void lg_finalize_features(struct virtio_device *vdev)
106{ 117{
107 unsigned int i, bits; 118 unsigned int i, bits;
@@ -112,10 +123,11 @@ static void lg_finalize_features(struct virtio_device *vdev)
112 /* Give virtio_ring a chance to accept features. */ 123 /* Give virtio_ring a chance to accept features. */
113 vring_transport_features(vdev); 124 vring_transport_features(vdev);
114 125
115 /* The vdev->feature array is a Linux bitmask: this isn't the 126 /*
116 * same as a the simple array of bits used by lguest devices 127 * The vdev->feature array is a Linux bitmask: this isn't the same as a
117 * for features. So we do this slow, manual conversion which is 128 * the simple array of bits used by lguest devices for features. So we
118 * completely general. */ 129 * do this slow, manual conversion which is completely general.
130 */
119 memset(out_features, 0, desc->feature_len); 131 memset(out_features, 0, desc->feature_len);
120 bits = min_t(unsigned, desc->feature_len, sizeof(vdev->features)) * 8; 132 bits = min_t(unsigned, desc->feature_len, sizeof(vdev->features)) * 8;
121 for (i = 0; i < bits; i++) { 133 for (i = 0; i < bits; i++) {
@@ -146,15 +158,19 @@ static void lg_set(struct virtio_device *vdev, unsigned int offset,
146 memcpy(lg_config(desc) + offset, buf, len); 158 memcpy(lg_config(desc) + offset, buf, len);
147} 159}
148 160
149/* The operations to get and set the status word just access the status field 161/*
150 * of the device descriptor. */ 162 * The operations to get and set the status word just access the status field
163 * of the device descriptor.
164 */
151static u8 lg_get_status(struct virtio_device *vdev) 165static u8 lg_get_status(struct virtio_device *vdev)
152{ 166{
153 return to_lgdev(vdev)->desc->status; 167 return to_lgdev(vdev)->desc->status;
154} 168}
155 169
156/* To notify on status updates, we (ab)use the NOTIFY hypercall, with the 170/*
157 * descriptor address of the device. A zero status means "reset". */ 171 * To notify on status updates, we (ab)use the NOTIFY hypercall, with the
172 * descriptor address of the device. A zero status means "reset".
173 */
158static void set_status(struct virtio_device *vdev, u8 status) 174static void set_status(struct virtio_device *vdev, u8 status)
159{ 175{
160 unsigned long offset = (void *)to_lgdev(vdev)->desc - lguest_devices; 176 unsigned long offset = (void *)to_lgdev(vdev)->desc - lguest_devices;
@@ -191,8 +207,7 @@ static void lg_reset(struct virtio_device *vdev)
191 */ 207 */
192 208
193/*D:140 This is the information we remember about each virtqueue. */ 209/*D:140 This is the information we remember about each virtqueue. */
194struct lguest_vq_info 210struct lguest_vq_info {
195{
196 /* A copy of the information contained in the device config. */ 211 /* A copy of the information contained in the device config. */
197 struct lguest_vqconfig config; 212 struct lguest_vqconfig config;
198 213
@@ -200,13 +215,17 @@ struct lguest_vq_info
200 void *pages; 215 void *pages;
201}; 216};
202 217
203/* When the virtio_ring code wants to prod the Host, it calls us here and we 218/*
219 * When the virtio_ring code wants to prod the Host, it calls us here and we
204 * make a hypercall. We hand the physical address of the virtqueue so the Host 220 * make a hypercall. We hand the physical address of the virtqueue so the Host
205 * knows which virtqueue we're talking about. */ 221 * knows which virtqueue we're talking about.
222 */
206static void lg_notify(struct virtqueue *vq) 223static void lg_notify(struct virtqueue *vq)
207{ 224{
208 /* We store our virtqueue information in the "priv" pointer of the 225 /*
209 * virtqueue structure. */ 226 * We store our virtqueue information in the "priv" pointer of the
227 * virtqueue structure.
228 */
210 struct lguest_vq_info *lvq = vq->priv; 229 struct lguest_vq_info *lvq = vq->priv;
211 230
212 kvm_hypercall1(LHCALL_NOTIFY, lvq->config.pfn << PAGE_SHIFT); 231 kvm_hypercall1(LHCALL_NOTIFY, lvq->config.pfn << PAGE_SHIFT);
@@ -215,7 +234,8 @@ static void lg_notify(struct virtqueue *vq)
215/* An extern declaration inside a C file is bad form. Don't do it. */ 234/* An extern declaration inside a C file is bad form. Don't do it. */
216extern void lguest_setup_irq(unsigned int irq); 235extern void lguest_setup_irq(unsigned int irq);
217 236
218/* This routine finds the first virtqueue described in the configuration of 237/*
238 * This routine finds the Nth virtqueue described in the configuration of
219 * this device and sets it up. 239 * this device and sets it up.
220 * 240 *
221 * This is kind of an ugly duckling. It'd be nicer to have a standard 241 * This is kind of an ugly duckling. It'd be nicer to have a standard
@@ -223,9 +243,7 @@ extern void lguest_setup_irq(unsigned int irq);
223 * everyone wants to do it differently. The KVM coders want the Guest to 243 * everyone wants to do it differently. The KVM coders want the Guest to
224 * allocate its own pages and tell the Host where they are, but for lguest it's 244 * allocate its own pages and tell the Host where they are, but for lguest it's
225 * simpler for the Host to simply tell us where the pages are. 245 * simpler for the Host to simply tell us where the pages are.
226 * 246 */
227 * So we provide drivers with a "find the Nth virtqueue and set it up"
228 * function. */
229static struct virtqueue *lg_find_vq(struct virtio_device *vdev, 247static struct virtqueue *lg_find_vq(struct virtio_device *vdev,
230 unsigned index, 248 unsigned index,
231 void (*callback)(struct virtqueue *vq), 249 void (*callback)(struct virtqueue *vq),
@@ -244,9 +262,11 @@ static struct virtqueue *lg_find_vq(struct virtio_device *vdev,
244 if (!lvq) 262 if (!lvq)
245 return ERR_PTR(-ENOMEM); 263 return ERR_PTR(-ENOMEM);
246 264
247 /* Make a copy of the "struct lguest_vqconfig" entry, which sits after 265 /*
266 * Make a copy of the "struct lguest_vqconfig" entry, which sits after
248 * the descriptor. We need a copy because the config space might not 267 * the descriptor. We need a copy because the config space might not
249 * be aligned correctly. */ 268 * be aligned correctly.
269 */
250 memcpy(&lvq->config, lg_vq(ldev->desc)+index, sizeof(lvq->config)); 270 memcpy(&lvq->config, lg_vq(ldev->desc)+index, sizeof(lvq->config));
251 271
252 printk("Mapping virtqueue %i addr %lx\n", index, 272 printk("Mapping virtqueue %i addr %lx\n", index,
@@ -261,8 +281,10 @@ static struct virtqueue *lg_find_vq(struct virtio_device *vdev,
261 goto free_lvq; 281 goto free_lvq;
262 } 282 }
263 283
264 /* OK, tell virtio_ring.c to set up a virtqueue now we know its size 284 /*
265 * and we've got a pointer to its pages. */ 285 * OK, tell virtio_ring.c to set up a virtqueue now we know its size
286 * and we've got a pointer to its pages.
287 */
266 vq = vring_new_virtqueue(lvq->config.num, LGUEST_VRING_ALIGN, 288 vq = vring_new_virtqueue(lvq->config.num, LGUEST_VRING_ALIGN,
267 vdev, lvq->pages, lg_notify, callback, name); 289 vdev, lvq->pages, lg_notify, callback, name);
268 if (!vq) { 290 if (!vq) {
@@ -273,18 +295,23 @@ static struct virtqueue *lg_find_vq(struct virtio_device *vdev,
273 /* Make sure the interrupt is allocated. */ 295 /* Make sure the interrupt is allocated. */
274 lguest_setup_irq(lvq->config.irq); 296 lguest_setup_irq(lvq->config.irq);
275 297
276 /* Tell the interrupt for this virtqueue to go to the virtio_ring 298 /*
277 * interrupt handler. */ 299 * Tell the interrupt for this virtqueue to go to the virtio_ring
278 /* FIXME: We used to have a flag for the Host to tell us we could use 300 * interrupt handler.
301 *
302 * FIXME: We used to have a flag for the Host to tell us we could use
279 * the interrupt as a source of randomness: it'd be nice to have that 303 * the interrupt as a source of randomness: it'd be nice to have that
280 * back.. */ 304 * back.
305 */
281 err = request_irq(lvq->config.irq, vring_interrupt, IRQF_SHARED, 306 err = request_irq(lvq->config.irq, vring_interrupt, IRQF_SHARED,
282 dev_name(&vdev->dev), vq); 307 dev_name(&vdev->dev), vq);
283 if (err) 308 if (err)
284 goto destroy_vring; 309 goto destroy_vring;
285 310
286 /* Last of all we hook up our 'struct lguest_vq_info" to the 311 /*
287 * virtqueue's priv pointer. */ 312 * Last of all we hook up our 'struct lguest_vq_info" to the
313 * virtqueue's priv pointer.
314 */
288 vq->priv = lvq; 315 vq->priv = lvq;
289 return vq; 316 return vq;
290 317
@@ -358,11 +385,14 @@ static struct virtio_config_ops lguest_config_ops = {
358 .del_vqs = lg_del_vqs, 385 .del_vqs = lg_del_vqs,
359}; 386};
360 387
361/* The root device for the lguest virtio devices. This makes them appear as 388/*
362 * /sys/devices/lguest/0,1,2 not /sys/devices/0,1,2. */ 389 * The root device for the lguest virtio devices. This makes them appear as
390 * /sys/devices/lguest/0,1,2 not /sys/devices/0,1,2.
391 */
363static struct device *lguest_root; 392static struct device *lguest_root;
364 393
365/*D:120 This is the core of the lguest bus: actually adding a new device. 394/*D:120
395 * This is the core of the lguest bus: actually adding a new device.
366 * It's a separate function because it's neater that way, and because an 396 * It's a separate function because it's neater that way, and because an
367 * earlier version of the code supported hotplug and unplug. They were removed 397 * earlier version of the code supported hotplug and unplug. They were removed
368 * early on because they were never used. 398 * early on because they were never used.
@@ -371,14 +401,14 @@ static struct device *lguest_root;
371 * 401 *
372 * It's worth reading this carefully: we start with a pointer to the new device 402 * It's worth reading this carefully: we start with a pointer to the new device
373 * descriptor in the "lguest_devices" page, and the offset into the device 403 * descriptor in the "lguest_devices" page, and the offset into the device
374 * descriptor page so we can uniquely identify it if things go badly wrong. */ 404 * descriptor page so we can uniquely identify it if things go badly wrong.
405 */
375static void add_lguest_device(struct lguest_device_desc *d, 406static void add_lguest_device(struct lguest_device_desc *d,
376 unsigned int offset) 407 unsigned int offset)
377{ 408{
378 struct lguest_device *ldev; 409 struct lguest_device *ldev;
379 410
380 /* Start with zeroed memory; Linux's device layer seems to count on 411 /* Start with zeroed memory; Linux's device layer counts on it. */
381 * it. */
382 ldev = kzalloc(sizeof(*ldev), GFP_KERNEL); 412 ldev = kzalloc(sizeof(*ldev), GFP_KERNEL);
383 if (!ldev) { 413 if (!ldev) {
384 printk(KERN_EMERG "Cannot allocate lguest dev %u type %u\n", 414 printk(KERN_EMERG "Cannot allocate lguest dev %u type %u\n",
@@ -388,17 +418,25 @@ static void add_lguest_device(struct lguest_device_desc *d,
388 418
389 /* This devices' parent is the lguest/ dir. */ 419 /* This devices' parent is the lguest/ dir. */
390 ldev->vdev.dev.parent = lguest_root; 420 ldev->vdev.dev.parent = lguest_root;
391 /* We have a unique device index thanks to the dev_index counter. */ 421 /*
422 * The device type comes straight from the descriptor. There's also a
423 * device vendor field in the virtio_device struct, which we leave as
424 * 0.
425 */
392 ldev->vdev.id.device = d->type; 426 ldev->vdev.id.device = d->type;
393 /* We have a simple set of routines for querying the device's 427 /*
394 * configuration information and setting its status. */ 428 * We have a simple set of routines for querying the device's
429 * configuration information and setting its status.
430 */
395 ldev->vdev.config = &lguest_config_ops; 431 ldev->vdev.config = &lguest_config_ops;
396 /* And we remember the device's descriptor for lguest_config_ops. */ 432 /* And we remember the device's descriptor for lguest_config_ops. */
397 ldev->desc = d; 433 ldev->desc = d;
398 434
399 /* register_virtio_device() sets up the generic fields for the struct 435 /*
436 * register_virtio_device() sets up the generic fields for the struct
400 * virtio_device and calls device_register(). This makes the bus 437 * virtio_device and calls device_register(). This makes the bus
401 * infrastructure look for a matching driver. */ 438 * infrastructure look for a matching driver.
439 */
402 if (register_virtio_device(&ldev->vdev) != 0) { 440 if (register_virtio_device(&ldev->vdev) != 0) {
403 printk(KERN_ERR "Failed to register lguest dev %u type %u\n", 441 printk(KERN_ERR "Failed to register lguest dev %u type %u\n",
404 offset, d->type); 442 offset, d->type);
@@ -406,8 +444,10 @@ static void add_lguest_device(struct lguest_device_desc *d,
406 } 444 }
407} 445}
408 446
409/*D:110 scan_devices() simply iterates through the device page. The type 0 is 447/*D:110
410 * reserved to mean "end of devices". */ 448 * scan_devices() simply iterates through the device page. The type 0 is
449 * reserved to mean "end of devices".
450 */
411static void scan_devices(void) 451static void scan_devices(void)
412{ 452{
413 unsigned int i; 453 unsigned int i;
@@ -426,7 +466,8 @@ static void scan_devices(void)
426 } 466 }
427} 467}
428 468
429/*D:105 Fairly early in boot, lguest_devices_init() is called to set up the 469/*D:105
470 * Fairly early in boot, lguest_devices_init() is called to set up the
430 * lguest device infrastructure. We check that we are a Guest by checking 471 * lguest device infrastructure. We check that we are a Guest by checking
431 * pv_info.name: there are other ways of checking, but this seems most 472 * pv_info.name: there are other ways of checking, but this seems most
432 * obvious to me. 473 * obvious to me.
@@ -437,7 +478,8 @@ static void scan_devices(void)
437 * correct sysfs incantation). 478 * correct sysfs incantation).
438 * 479 *
439 * Finally we call scan_devices() which adds all the devices found in the 480 * Finally we call scan_devices() which adds all the devices found in the
440 * lguest_devices page. */ 481 * lguest_devices page.
482 */
441static int __init lguest_devices_init(void) 483static int __init lguest_devices_init(void)
442{ 484{
443 if (strcmp(pv_info.name, "lguest") != 0) 485 if (strcmp(pv_info.name, "lguest") != 0)
@@ -456,11 +498,13 @@ static int __init lguest_devices_init(void)
456/* We do this after core stuff, but before the drivers. */ 498/* We do this after core stuff, but before the drivers. */
457postcore_initcall(lguest_devices_init); 499postcore_initcall(lguest_devices_init);
458 500
459/*D:150 At this point in the journey we used to now wade through the lguest 501/*D:150
502 * At this point in the journey we used to now wade through the lguest
460 * devices themselves: net, block and console. Since they're all now virtio 503 * devices themselves: net, block and console. Since they're all now virtio
461 * devices rather than lguest-specific, I've decided to ignore them. Mostly, 504 * devices rather than lguest-specific, I've decided to ignore them. Mostly,
462 * they're kind of boring. But this does mean you'll never experience the 505 * they're kind of boring. But this does mean you'll never experience the
463 * thrill of reading the forbidden love scene buried deep in the block driver. 506 * thrill of reading the forbidden love scene buried deep in the block driver.
464 * 507 *
465 * "make Launcher" beckons, where we answer questions like "Where do Guests 508 * "make Launcher" beckons, where we answer questions like "Where do Guests
466 * come from?", and "What do you do when someone asks for optimization?". */ 509 * come from?", and "What do you do when someone asks for optimization?".
510 */
diff --git a/drivers/lguest/lguest_user.c b/drivers/lguest/lguest_user.c
index 9f9a2953b383..b4d3f7ca554f 100644
--- a/drivers/lguest/lguest_user.c
+++ b/drivers/lguest/lguest_user.c
@@ -1,8 +1,9 @@
1/*P:200 This contains all the /dev/lguest code, whereby the userspace launcher 1/*P:200 This contains all the /dev/lguest code, whereby the userspace launcher
2 * controls and communicates with the Guest. For example, the first write will 2 * controls and communicates with the Guest. For example, the first write will
3 * tell us the Guest's memory layout, pagetable, entry point and kernel address 3 * tell us the Guest's memory layout and entry point. A read will run the
4 * offset. A read will run the Guest until something happens, such as a signal 4 * Guest until something happens, such as a signal or the Guest doing a NOTIFY
5 * or the Guest doing a NOTIFY out to the Launcher. :*/ 5 * out to the Launcher.
6:*/
6#include <linux/uaccess.h> 7#include <linux/uaccess.h>
7#include <linux/miscdevice.h> 8#include <linux/miscdevice.h>
8#include <linux/fs.h> 9#include <linux/fs.h>
@@ -11,14 +12,41 @@
11#include <linux/file.h> 12#include <linux/file.h>
12#include "lg.h" 13#include "lg.h"
13 14
15/*L:056
16 * Before we move on, let's jump ahead and look at what the kernel does when
17 * it needs to look up the eventfds. That will complete our picture of how we
18 * use RCU.
19 *
20 * The notification value is in cpu->pending_notify: we return true if it went
21 * to an eventfd.
22 */
14bool send_notify_to_eventfd(struct lg_cpu *cpu) 23bool send_notify_to_eventfd(struct lg_cpu *cpu)
15{ 24{
16 unsigned int i; 25 unsigned int i;
17 struct lg_eventfd_map *map; 26 struct lg_eventfd_map *map;
18 27
19 /* lg->eventfds is RCU-protected */ 28 /*
29 * This "rcu_read_lock()" helps track when someone is still looking at
30 * the (RCU-using) eventfds array. It's not actually a lock at all;
31 * indeed it's a noop in many configurations. (You didn't expect me to
32 * explain all the RCU secrets here, did you?)
33 */
20 rcu_read_lock(); 34 rcu_read_lock();
35 /*
36 * rcu_dereference is the counter-side of rcu_assign_pointer(); it
37 * makes sure we don't access the memory pointed to by
38 * cpu->lg->eventfds before cpu->lg->eventfds is set. Sounds crazy,
39 * but Alpha allows this! Paul McKenney points out that a really
40 * aggressive compiler could have the same effect:
41 * http://lists.ozlabs.org/pipermail/lguest/2009-July/001560.html
42 *
43 * So play safe, use rcu_dereference to get the rcu-protected pointer:
44 */
21 map = rcu_dereference(cpu->lg->eventfds); 45 map = rcu_dereference(cpu->lg->eventfds);
46 /*
47 * Simple array search: even if they add an eventfd while we do this,
48 * we'll continue to use the old array and just won't see the new one.
49 */
22 for (i = 0; i < map->num; i++) { 50 for (i = 0; i < map->num; i++) {
23 if (map->map[i].addr == cpu->pending_notify) { 51 if (map->map[i].addr == cpu->pending_notify) {
24 eventfd_signal(map->map[i].event, 1); 52 eventfd_signal(map->map[i].event, 1);
@@ -26,19 +54,50 @@ bool send_notify_to_eventfd(struct lg_cpu *cpu)
26 break; 54 break;
27 } 55 }
28 } 56 }
57 /* We're done with the rcu-protected variable cpu->lg->eventfds. */
29 rcu_read_unlock(); 58 rcu_read_unlock();
59
60 /* If we cleared the notification, it's because we found a match. */
30 return cpu->pending_notify == 0; 61 return cpu->pending_notify == 0;
31} 62}
32 63
64/*L:055
65 * One of the more tricksy tricks in the Linux Kernel is a technique called
66 * Read Copy Update. Since one point of lguest is to teach lguest journeyers
67 * about kernel coding, I use it here. (In case you're curious, other purposes
68 * include learning about virtualization and instilling a deep appreciation for
69 * simplicity and puppies).
70 *
71 * We keep a simple array which maps LHCALL_NOTIFY values to eventfds, but we
72 * add new eventfds without ever blocking readers from accessing the array.
73 * The current Launcher only does this during boot, so that never happens. But
74 * Read Copy Update is cool, and adding a lock risks damaging even more puppies
75 * than this code does.
76 *
77 * We allocate a brand new one-larger array, copy the old one and add our new
78 * element. Then we make the lg eventfd pointer point to the new array.
79 * That's the easy part: now we need to free the old one, but we need to make
80 * sure no slow CPU somewhere is still looking at it. That's what
81 * synchronize_rcu does for us: waits until every CPU has indicated that it has
82 * moved on to know it's no longer using the old one.
83 *
84 * If that's unclear, see http://en.wikipedia.org/wiki/Read-copy-update.
85 */
33static int add_eventfd(struct lguest *lg, unsigned long addr, int fd) 86static int add_eventfd(struct lguest *lg, unsigned long addr, int fd)
34{ 87{
35 struct lg_eventfd_map *new, *old = lg->eventfds; 88 struct lg_eventfd_map *new, *old = lg->eventfds;
36 89
90 /*
91 * We don't allow notifications on value 0 anyway (pending_notify of
92 * 0 means "nothing pending").
93 */
37 if (!addr) 94 if (!addr)
38 return -EINVAL; 95 return -EINVAL;
39 96
40 /* Replace the old array with the new one, carefully: others can 97 /*
41 * be accessing it at the same time */ 98 * Replace the old array with the new one, carefully: others can
99 * be accessing it at the same time.
100 */
42 new = kmalloc(sizeof(*new) + sizeof(new->map[0]) * (old->num + 1), 101 new = kmalloc(sizeof(*new) + sizeof(new->map[0]) * (old->num + 1),
43 GFP_KERNEL); 102 GFP_KERNEL);
44 if (!new) 103 if (!new)
@@ -52,22 +111,41 @@ static int add_eventfd(struct lguest *lg, unsigned long addr, int fd)
52 new->map[new->num].addr = addr; 111 new->map[new->num].addr = addr;
53 new->map[new->num].event = eventfd_ctx_fdget(fd); 112 new->map[new->num].event = eventfd_ctx_fdget(fd);
54 if (IS_ERR(new->map[new->num].event)) { 113 if (IS_ERR(new->map[new->num].event)) {
114 int err = PTR_ERR(new->map[new->num].event);
55 kfree(new); 115 kfree(new);
56 return PTR_ERR(new->map[new->num].event); 116 return err;
57 } 117 }
58 new->num++; 118 new->num++;
59 119
60 /* Now put new one in place. */ 120 /*
121 * Now put new one in place: rcu_assign_pointer() is a fancy way of
122 * doing "lg->eventfds = new", but it uses memory barriers to make
123 * absolutely sure that the contents of "new" written above is nailed
124 * down before we actually do the assignment.
125 *
126 * We have to think about these kinds of things when we're operating on
127 * live data without locks.
128 */
61 rcu_assign_pointer(lg->eventfds, new); 129 rcu_assign_pointer(lg->eventfds, new);
62 130
63 /* We're not in a big hurry. Wait until noone's looking at old 131 /*
64 * version, then delete it. */ 132 * We're not in a big hurry. Wait until noone's looking at old
133 * version, then free it.
134 */
65 synchronize_rcu(); 135 synchronize_rcu();
66 kfree(old); 136 kfree(old);
67 137
68 return 0; 138 return 0;
69} 139}
70 140
141/*L:052
142 * Receiving notifications from the Guest is usually done by attaching a
143 * particular LHCALL_NOTIFY value to an event filedescriptor. The eventfd will
144 * become readable when the Guest does an LHCALL_NOTIFY with that value.
145 *
146 * This is really convenient for processing each virtqueue in a separate
147 * thread.
148 */
71static int attach_eventfd(struct lguest *lg, const unsigned long __user *input) 149static int attach_eventfd(struct lguest *lg, const unsigned long __user *input)
72{ 150{
73 unsigned long addr, fd; 151 unsigned long addr, fd;
@@ -79,15 +157,22 @@ static int attach_eventfd(struct lguest *lg, const unsigned long __user *input)
79 if (get_user(fd, input) != 0) 157 if (get_user(fd, input) != 0)
80 return -EFAULT; 158 return -EFAULT;
81 159
160 /*
161 * Just make sure two callers don't add eventfds at once. We really
162 * only need to lock against callers adding to the same Guest, so using
163 * the Big Lguest Lock is overkill. But this is setup, not a fast path.
164 */
82 mutex_lock(&lguest_lock); 165 mutex_lock(&lguest_lock);
83 err = add_eventfd(lg, addr, fd); 166 err = add_eventfd(lg, addr, fd);
84 mutex_unlock(&lguest_lock); 167 mutex_unlock(&lguest_lock);
85 168
86 return 0; 169 return err;
87} 170}
88 171
89/*L:050 Sending an interrupt is done by writing LHREQ_IRQ and an interrupt 172/*L:050
90 * number to /dev/lguest. */ 173 * Sending an interrupt is done by writing LHREQ_IRQ and an interrupt
174 * number to /dev/lguest.
175 */
91static int user_send_irq(struct lg_cpu *cpu, const unsigned long __user *input) 176static int user_send_irq(struct lg_cpu *cpu, const unsigned long __user *input)
92{ 177{
93 unsigned long irq; 178 unsigned long irq;
@@ -97,12 +182,18 @@ static int user_send_irq(struct lg_cpu *cpu, const unsigned long __user *input)
97 if (irq >= LGUEST_IRQS) 182 if (irq >= LGUEST_IRQS)
98 return -EINVAL; 183 return -EINVAL;
99 184
185 /*
186 * Next time the Guest runs, the core code will see if it can deliver
187 * this interrupt.
188 */
100 set_interrupt(cpu, irq); 189 set_interrupt(cpu, irq);
101 return 0; 190 return 0;
102} 191}
103 192
104/*L:040 Once our Guest is initialized, the Launcher makes it run by reading 193/*L:040
105 * from /dev/lguest. */ 194 * Once our Guest is initialized, the Launcher makes it run by reading
195 * from /dev/lguest.
196 */
106static ssize_t read(struct file *file, char __user *user, size_t size,loff_t*o) 197static ssize_t read(struct file *file, char __user *user, size_t size,loff_t*o)
107{ 198{
108 struct lguest *lg = file->private_data; 199 struct lguest *lg = file->private_data;
@@ -138,8 +229,10 @@ static ssize_t read(struct file *file, char __user *user, size_t size,loff_t*o)
138 return len; 229 return len;
139 } 230 }
140 231
141 /* If we returned from read() last time because the Guest sent I/O, 232 /*
142 * clear the flag. */ 233 * If we returned from read() last time because the Guest sent I/O,
234 * clear the flag.
235 */
143 if (cpu->pending_notify) 236 if (cpu->pending_notify)
144 cpu->pending_notify = 0; 237 cpu->pending_notify = 0;
145 238
@@ -147,8 +240,10 @@ static ssize_t read(struct file *file, char __user *user, size_t size,loff_t*o)
147 return run_guest(cpu, (unsigned long __user *)user); 240 return run_guest(cpu, (unsigned long __user *)user);
148} 241}
149 242
150/*L:025 This actually initializes a CPU. For the moment, a Guest is only 243/*L:025
151 * uniprocessor, so "id" is always 0. */ 244 * This actually initializes a CPU. For the moment, a Guest is only
245 * uniprocessor, so "id" is always 0.
246 */
152static int lg_cpu_start(struct lg_cpu *cpu, unsigned id, unsigned long start_ip) 247static int lg_cpu_start(struct lg_cpu *cpu, unsigned id, unsigned long start_ip)
153{ 248{
154 /* We have a limited number the number of CPUs in the lguest struct. */ 249 /* We have a limited number the number of CPUs in the lguest struct. */
@@ -163,8 +258,10 @@ static int lg_cpu_start(struct lg_cpu *cpu, unsigned id, unsigned long start_ip)
163 /* Each CPU has a timer it can set. */ 258 /* Each CPU has a timer it can set. */
164 init_clockdev(cpu); 259 init_clockdev(cpu);
165 260
166 /* We need a complete page for the Guest registers: they are accessible 261 /*
167 * to the Guest and we can only grant it access to whole pages. */ 262 * We need a complete page for the Guest registers: they are accessible
263 * to the Guest and we can only grant it access to whole pages.
264 */
168 cpu->regs_page = get_zeroed_page(GFP_KERNEL); 265 cpu->regs_page = get_zeroed_page(GFP_KERNEL);
169 if (!cpu->regs_page) 266 if (!cpu->regs_page)
170 return -ENOMEM; 267 return -ENOMEM;
@@ -172,29 +269,38 @@ static int lg_cpu_start(struct lg_cpu *cpu, unsigned id, unsigned long start_ip)
172 /* We actually put the registers at the bottom of the page. */ 269 /* We actually put the registers at the bottom of the page. */
173 cpu->regs = (void *)cpu->regs_page + PAGE_SIZE - sizeof(*cpu->regs); 270 cpu->regs = (void *)cpu->regs_page + PAGE_SIZE - sizeof(*cpu->regs);
174 271
175 /* Now we initialize the Guest's registers, handing it the start 272 /*
176 * address. */ 273 * Now we initialize the Guest's registers, handing it the start
274 * address.
275 */
177 lguest_arch_setup_regs(cpu, start_ip); 276 lguest_arch_setup_regs(cpu, start_ip);
178 277
179 /* We keep a pointer to the Launcher task (ie. current task) for when 278 /*
180 * other Guests want to wake this one (eg. console input). */ 279 * We keep a pointer to the Launcher task (ie. current task) for when
280 * other Guests want to wake this one (eg. console input).
281 */
181 cpu->tsk = current; 282 cpu->tsk = current;
182 283
183 /* We need to keep a pointer to the Launcher's memory map, because if 284 /*
285 * We need to keep a pointer to the Launcher's memory map, because if
184 * the Launcher dies we need to clean it up. If we don't keep a 286 * the Launcher dies we need to clean it up. If we don't keep a
185 * reference, it is destroyed before close() is called. */ 287 * reference, it is destroyed before close() is called.
288 */
186 cpu->mm = get_task_mm(cpu->tsk); 289 cpu->mm = get_task_mm(cpu->tsk);
187 290
188 /* We remember which CPU's pages this Guest used last, for optimization 291 /*
189 * when the same Guest runs on the same CPU twice. */ 292 * We remember which CPU's pages this Guest used last, for optimization
293 * when the same Guest runs on the same CPU twice.
294 */
190 cpu->last_pages = NULL; 295 cpu->last_pages = NULL;
191 296
192 /* No error == success. */ 297 /* No error == success. */
193 return 0; 298 return 0;
194} 299}
195 300
196/*L:020 The initialization write supplies 3 pointer sized (32 or 64 bit) 301/*L:020
197 * values (in addition to the LHREQ_INITIALIZE value). These are: 302 * The initialization write supplies 3 pointer sized (32 or 64 bit) values (in
303 * addition to the LHREQ_INITIALIZE value). These are:
198 * 304 *
199 * base: The start of the Guest-physical memory inside the Launcher memory. 305 * base: The start of the Guest-physical memory inside the Launcher memory.
200 * 306 *
@@ -206,14 +312,15 @@ static int lg_cpu_start(struct lg_cpu *cpu, unsigned id, unsigned long start_ip)
206 */ 312 */
207static int initialize(struct file *file, const unsigned long __user *input) 313static int initialize(struct file *file, const unsigned long __user *input)
208{ 314{
209 /* "struct lguest" contains everything we (the Host) know about a 315 /* "struct lguest" contains all we (the Host) know about a Guest. */
210 * Guest. */
211 struct lguest *lg; 316 struct lguest *lg;
212 int err; 317 int err;
213 unsigned long args[3]; 318 unsigned long args[3];
214 319
215 /* We grab the Big Lguest lock, which protects against multiple 320 /*
216 * simultaneous initializations. */ 321 * We grab the Big Lguest lock, which protects against multiple
322 * simultaneous initializations.
323 */
217 mutex_lock(&lguest_lock); 324 mutex_lock(&lguest_lock);
218 /* You can't initialize twice! Close the device and start again... */ 325 /* You can't initialize twice! Close the device and start again... */
219 if (file->private_data) { 326 if (file->private_data) {
@@ -248,8 +355,10 @@ static int initialize(struct file *file, const unsigned long __user *input)
248 if (err) 355 if (err)
249 goto free_eventfds; 356 goto free_eventfds;
250 357
251 /* Initialize the Guest's shadow page tables, using the toplevel 358 /*
252 * address the Launcher gave us. This allocates memory, so can fail. */ 359 * Initialize the Guest's shadow page tables, using the toplevel
360 * address the Launcher gave us. This allocates memory, so can fail.
361 */
253 err = init_guest_pagetable(lg); 362 err = init_guest_pagetable(lg);
254 if (err) 363 if (err)
255 goto free_regs; 364 goto free_regs;
@@ -274,20 +383,24 @@ unlock:
274 return err; 383 return err;
275} 384}
276 385
277/*L:010 The first operation the Launcher does must be a write. All writes 386/*L:010
387 * The first operation the Launcher does must be a write. All writes
278 * start with an unsigned long number: for the first write this must be 388 * start with an unsigned long number: for the first write this must be
279 * LHREQ_INITIALIZE to set up the Guest. After that the Launcher can use 389 * LHREQ_INITIALIZE to set up the Guest. After that the Launcher can use
280 * writes of other values to send interrupts. 390 * writes of other values to send interrupts or set up receipt of notifications.
281 * 391 *
282 * Note that we overload the "offset" in the /dev/lguest file to indicate what 392 * Note that we overload the "offset" in the /dev/lguest file to indicate what
283 * CPU number we're dealing with. Currently this is always 0, since we only 393 * CPU number we're dealing with. Currently this is always 0 since we only
284 * support uniprocessor Guests, but you can see the beginnings of SMP support 394 * support uniprocessor Guests, but you can see the beginnings of SMP support
285 * here. */ 395 * here.
396 */
286static ssize_t write(struct file *file, const char __user *in, 397static ssize_t write(struct file *file, const char __user *in,
287 size_t size, loff_t *off) 398 size_t size, loff_t *off)
288{ 399{
289 /* Once the Guest is initialized, we hold the "struct lguest" in the 400 /*
290 * file private data. */ 401 * Once the Guest is initialized, we hold the "struct lguest" in the
402 * file private data.
403 */
291 struct lguest *lg = file->private_data; 404 struct lguest *lg = file->private_data;
292 const unsigned long __user *input = (const unsigned long __user *)in; 405 const unsigned long __user *input = (const unsigned long __user *)in;
293 unsigned long req; 406 unsigned long req;
@@ -322,13 +435,15 @@ static ssize_t write(struct file *file, const char __user *in,
322 } 435 }
323} 436}
324 437
325/*L:060 The final piece of interface code is the close() routine. It reverses 438/*L:060
439 * The final piece of interface code is the close() routine. It reverses
326 * everything done in initialize(). This is usually called because the 440 * everything done in initialize(). This is usually called because the
327 * Launcher exited. 441 * Launcher exited.
328 * 442 *
329 * Note that the close routine returns 0 or a negative error number: it can't 443 * Note that the close routine returns 0 or a negative error number: it can't
330 * really fail, but it can whine. I blame Sun for this wart, and K&R C for 444 * really fail, but it can whine. I blame Sun for this wart, and K&R C for
331 * letting them do it. :*/ 445 * letting them do it.
446:*/
332static int close(struct inode *inode, struct file *file) 447static int close(struct inode *inode, struct file *file)
333{ 448{
334 struct lguest *lg = file->private_data; 449 struct lguest *lg = file->private_data;
@@ -338,8 +453,10 @@ static int close(struct inode *inode, struct file *file)
338 if (!lg) 453 if (!lg)
339 return 0; 454 return 0;
340 455
341 /* We need the big lock, to protect from inter-guest I/O and other 456 /*
342 * Launchers initializing guests. */ 457 * We need the big lock, to protect from inter-guest I/O and other
458 * Launchers initializing guests.
459 */
343 mutex_lock(&lguest_lock); 460 mutex_lock(&lguest_lock);
344 461
345 /* Free up the shadow page tables for the Guest. */ 462 /* Free up the shadow page tables for the Guest. */
@@ -350,8 +467,10 @@ static int close(struct inode *inode, struct file *file)
350 hrtimer_cancel(&lg->cpus[i].hrt); 467 hrtimer_cancel(&lg->cpus[i].hrt);
351 /* We can free up the register page we allocated. */ 468 /* We can free up the register page we allocated. */
352 free_page(lg->cpus[i].regs_page); 469 free_page(lg->cpus[i].regs_page);
353 /* Now all the memory cleanups are done, it's safe to release 470 /*
354 * the Launcher's memory management structure. */ 471 * Now all the memory cleanups are done, it's safe to release
472 * the Launcher's memory management structure.
473 */
355 mmput(lg->cpus[i].mm); 474 mmput(lg->cpus[i].mm);
356 } 475 }
357 476
@@ -360,8 +479,10 @@ static int close(struct inode *inode, struct file *file)
360 eventfd_ctx_put(lg->eventfds->map[i].event); 479 eventfd_ctx_put(lg->eventfds->map[i].event);
361 kfree(lg->eventfds); 480 kfree(lg->eventfds);
362 481
363 /* If lg->dead doesn't contain an error code it will be NULL or a 482 /*
364 * kmalloc()ed string, either of which is ok to hand to kfree(). */ 483 * If lg->dead doesn't contain an error code it will be NULL or a
484 * kmalloc()ed string, either of which is ok to hand to kfree().
485 */
365 if (!IS_ERR(lg->dead)) 486 if (!IS_ERR(lg->dead))
366 kfree(lg->dead); 487 kfree(lg->dead);
367 /* Free the memory allocated to the lguest_struct */ 488 /* Free the memory allocated to the lguest_struct */
@@ -385,7 +506,8 @@ static int close(struct inode *inode, struct file *file)
385 * 506 *
386 * We begin our understanding with the Host kernel interface which the Launcher 507 * We begin our understanding with the Host kernel interface which the Launcher
387 * uses: reading and writing a character device called /dev/lguest. All the 508 * uses: reading and writing a character device called /dev/lguest. All the
388 * work happens in the read(), write() and close() routines: */ 509 * work happens in the read(), write() and close() routines:
510 */
389static struct file_operations lguest_fops = { 511static struct file_operations lguest_fops = {
390 .owner = THIS_MODULE, 512 .owner = THIS_MODULE,
391 .release = close, 513 .release = close,
@@ -393,8 +515,10 @@ static struct file_operations lguest_fops = {
393 .read = read, 515 .read = read,
394}; 516};
395 517
396/* This is a textbook example of a "misc" character device. Populate a "struct 518/*
397 * miscdevice" and register it with misc_register(). */ 519 * This is a textbook example of a "misc" character device. Populate a "struct
520 * miscdevice" and register it with misc_register().
521 */
398static struct miscdevice lguest_dev = { 522static struct miscdevice lguest_dev = {
399 .minor = MISC_DYNAMIC_MINOR, 523 .minor = MISC_DYNAMIC_MINOR,
400 .name = "lguest", 524 .name = "lguest",
diff --git a/drivers/lguest/page_tables.c b/drivers/lguest/page_tables.c
index a6fe1abda240..a8d0aee3bc0e 100644
--- a/drivers/lguest/page_tables.c
+++ b/drivers/lguest/page_tables.c
@@ -1,9 +1,11 @@
1/*P:700 The pagetable code, on the other hand, still shows the scars of 1/*P:700
2 * The pagetable code, on the other hand, still shows the scars of
2 * previous encounters. It's functional, and as neat as it can be in the 3 * previous encounters. It's functional, and as neat as it can be in the
3 * circumstances, but be wary, for these things are subtle and break easily. 4 * circumstances, but be wary, for these things are subtle and break easily.
4 * The Guest provides a virtual to physical mapping, but we can neither trust 5 * The Guest provides a virtual to physical mapping, but we can neither trust
5 * it nor use it: we verify and convert it here then point the CPU to the 6 * it nor use it: we verify and convert it here then point the CPU to the
6 * converted Guest pages when running the Guest. :*/ 7 * converted Guest pages when running the Guest.
8:*/
7 9
8/* Copyright (C) Rusty Russell IBM Corporation 2006. 10/* Copyright (C) Rusty Russell IBM Corporation 2006.
9 * GPL v2 and any later version */ 11 * GPL v2 and any later version */
@@ -17,18 +19,20 @@
17#include <asm/bootparam.h> 19#include <asm/bootparam.h>
18#include "lg.h" 20#include "lg.h"
19 21
20/*M:008 We hold reference to pages, which prevents them from being swapped. 22/*M:008
23 * We hold reference to pages, which prevents them from being swapped.
21 * It'd be nice to have a callback in the "struct mm_struct" when Linux wants 24 * It'd be nice to have a callback in the "struct mm_struct" when Linux wants
22 * to swap out. If we had this, and a shrinker callback to trim PTE pages, we 25 * to swap out. If we had this, and a shrinker callback to trim PTE pages, we
23 * could probably consider launching Guests as non-root. :*/ 26 * could probably consider launching Guests as non-root.
27:*/
24 28
25/*H:300 29/*H:300
26 * The Page Table Code 30 * The Page Table Code
27 * 31 *
28 * We use two-level page tables for the Guest. If you're not entirely 32 * We use two-level page tables for the Guest, or three-level with PAE. If
29 * comfortable with virtual addresses, physical addresses and page tables then 33 * you're not entirely comfortable with virtual addresses, physical addresses
30 * I recommend you review arch/x86/lguest/boot.c's "Page Table Handling" (with 34 * and page tables then I recommend you review arch/x86/lguest/boot.c's "Page
31 * diagrams!). 35 * Table Handling" (with diagrams!).
32 * 36 *
33 * The Guest keeps page tables, but we maintain the actual ones here: these are 37 * The Guest keeps page tables, but we maintain the actual ones here: these are
34 * called "shadow" page tables. Which is a very Guest-centric name: these are 38 * called "shadow" page tables. Which is a very Guest-centric name: these are
@@ -45,16 +49,18 @@
45 * (v) Flushing (throwing away) page tables, 49 * (v) Flushing (throwing away) page tables,
46 * (vi) Mapping the Switcher when the Guest is about to run, 50 * (vi) Mapping the Switcher when the Guest is about to run,
47 * (vii) Setting up the page tables initially. 51 * (vii) Setting up the page tables initially.
48 :*/ 52:*/
49 53
50 54/*
51/* 1024 entries in a page table page maps 1024 pages: 4MB. The Switcher is 55 * The Switcher uses the complete top PTE page. That's 1024 PTE entries (4MB)
52 * conveniently placed at the top 4MB, so it uses a separate, complete PTE 56 * or 512 PTE entries with PAE (2MB).
53 * page. */ 57 */
54#define SWITCHER_PGD_INDEX (PTRS_PER_PGD - 1) 58#define SWITCHER_PGD_INDEX (PTRS_PER_PGD - 1)
55 59
56/* For PAE we need the PMD index as well. We use the last 2MB, so we 60/*
57 * will need the last pmd entry of the last pmd page. */ 61 * For PAE we need the PMD index as well. We use the last 2MB, so we
62 * will need the last pmd entry of the last pmd page.
63 */
58#ifdef CONFIG_X86_PAE 64#ifdef CONFIG_X86_PAE
59#define SWITCHER_PMD_INDEX (PTRS_PER_PMD - 1) 65#define SWITCHER_PMD_INDEX (PTRS_PER_PMD - 1)
60#define RESERVE_MEM 2U 66#define RESERVE_MEM 2U
@@ -64,14 +70,18 @@
64#define CHECK_GPGD_MASK _PAGE_TABLE 70#define CHECK_GPGD_MASK _PAGE_TABLE
65#endif 71#endif
66 72
67/* We actually need a separate PTE page for each CPU. Remember that after the 73/*
74 * We actually need a separate PTE page for each CPU. Remember that after the
68 * Switcher code itself comes two pages for each CPU, and we don't want this 75 * Switcher code itself comes two pages for each CPU, and we don't want this
69 * CPU's guest to see the pages of any other CPU. */ 76 * CPU's guest to see the pages of any other CPU.
77 */
70static DEFINE_PER_CPU(pte_t *, switcher_pte_pages); 78static DEFINE_PER_CPU(pte_t *, switcher_pte_pages);
71#define switcher_pte_page(cpu) per_cpu(switcher_pte_pages, cpu) 79#define switcher_pte_page(cpu) per_cpu(switcher_pte_pages, cpu)
72 80
73/*H:320 The page table code is curly enough to need helper functions to keep it 81/*H:320
74 * clear and clean. 82 * The page table code is curly enough to need helper functions to keep it
83 * clear and clean. The kernel itself provides many of them; one advantage
84 * of insisting that the Guest and Host use the same CONFIG_PAE setting.
75 * 85 *
76 * There are two functions which return pointers to the shadow (aka "real") 86 * There are two functions which return pointers to the shadow (aka "real")
77 * page tables. 87 * page tables.
@@ -79,7 +89,8 @@ static DEFINE_PER_CPU(pte_t *, switcher_pte_pages);
79 * spgd_addr() takes the virtual address and returns a pointer to the top-level 89 * spgd_addr() takes the virtual address and returns a pointer to the top-level
80 * page directory entry (PGD) for that address. Since we keep track of several 90 * page directory entry (PGD) for that address. Since we keep track of several
81 * page tables, the "i" argument tells us which one we're interested in (it's 91 * page tables, the "i" argument tells us which one we're interested in (it's
82 * usually the current one). */ 92 * usually the current one).
93 */
83static pgd_t *spgd_addr(struct lg_cpu *cpu, u32 i, unsigned long vaddr) 94static pgd_t *spgd_addr(struct lg_cpu *cpu, u32 i, unsigned long vaddr)
84{ 95{
85 unsigned int index = pgd_index(vaddr); 96 unsigned int index = pgd_index(vaddr);
@@ -96,9 +107,11 @@ static pgd_t *spgd_addr(struct lg_cpu *cpu, u32 i, unsigned long vaddr)
96} 107}
97 108
98#ifdef CONFIG_X86_PAE 109#ifdef CONFIG_X86_PAE
99/* This routine then takes the PGD entry given above, which contains the 110/*
111 * This routine then takes the PGD entry given above, which contains the
100 * address of the PMD page. It then returns a pointer to the PMD entry for the 112 * address of the PMD page. It then returns a pointer to the PMD entry for the
101 * given address. */ 113 * given address.
114 */
102static pmd_t *spmd_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr) 115static pmd_t *spmd_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr)
103{ 116{
104 unsigned int index = pmd_index(vaddr); 117 unsigned int index = pmd_index(vaddr);
@@ -119,9 +132,11 @@ static pmd_t *spmd_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr)
119} 132}
120#endif 133#endif
121 134
122/* This routine then takes the page directory entry returned above, which 135/*
136 * This routine then takes the page directory entry returned above, which
123 * contains the address of the page table entry (PTE) page. It then returns a 137 * contains the address of the page table entry (PTE) page. It then returns a
124 * pointer to the PTE entry for the given address. */ 138 * pointer to the PTE entry for the given address.
139 */
125static pte_t *spte_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr) 140static pte_t *spte_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr)
126{ 141{
127#ifdef CONFIG_X86_PAE 142#ifdef CONFIG_X86_PAE
@@ -139,8 +154,10 @@ static pte_t *spte_addr(struct lg_cpu *cpu, pgd_t spgd, unsigned long vaddr)
139 return &page[pte_index(vaddr)]; 154 return &page[pte_index(vaddr)];
140} 155}
141 156
142/* These two functions just like the above two, except they access the Guest 157/*
143 * page tables. Hence they return a Guest address. */ 158 * These functions are just like the above two, except they access the Guest
159 * page tables. Hence they return a Guest address.
160 */
144static unsigned long gpgd_addr(struct lg_cpu *cpu, unsigned long vaddr) 161static unsigned long gpgd_addr(struct lg_cpu *cpu, unsigned long vaddr)
145{ 162{
146 unsigned int index = vaddr >> (PGDIR_SHIFT); 163 unsigned int index = vaddr >> (PGDIR_SHIFT);
@@ -148,6 +165,7 @@ static unsigned long gpgd_addr(struct lg_cpu *cpu, unsigned long vaddr)
148} 165}
149 166
150#ifdef CONFIG_X86_PAE 167#ifdef CONFIG_X86_PAE
168/* Follow the PGD to the PMD. */
151static unsigned long gpmd_addr(pgd_t gpgd, unsigned long vaddr) 169static unsigned long gpmd_addr(pgd_t gpgd, unsigned long vaddr)
152{ 170{
153 unsigned long gpage = pgd_pfn(gpgd) << PAGE_SHIFT; 171 unsigned long gpage = pgd_pfn(gpgd) << PAGE_SHIFT;
@@ -155,6 +173,7 @@ static unsigned long gpmd_addr(pgd_t gpgd, unsigned long vaddr)
155 return gpage + pmd_index(vaddr) * sizeof(pmd_t); 173 return gpage + pmd_index(vaddr) * sizeof(pmd_t);
156} 174}
157 175
176/* Follow the PMD to the PTE. */
158static unsigned long gpte_addr(struct lg_cpu *cpu, 177static unsigned long gpte_addr(struct lg_cpu *cpu,
159 pmd_t gpmd, unsigned long vaddr) 178 pmd_t gpmd, unsigned long vaddr)
160{ 179{
@@ -164,6 +183,7 @@ static unsigned long gpte_addr(struct lg_cpu *cpu,
164 return gpage + pte_index(vaddr) * sizeof(pte_t); 183 return gpage + pte_index(vaddr) * sizeof(pte_t);
165} 184}
166#else 185#else
186/* Follow the PGD to the PTE (no mid-level for !PAE). */
167static unsigned long gpte_addr(struct lg_cpu *cpu, 187static unsigned long gpte_addr(struct lg_cpu *cpu,
168 pgd_t gpgd, unsigned long vaddr) 188 pgd_t gpgd, unsigned long vaddr)
169{ 189{
@@ -175,17 +195,21 @@ static unsigned long gpte_addr(struct lg_cpu *cpu,
175#endif 195#endif
176/*:*/ 196/*:*/
177 197
178/*M:014 get_pfn is slow: we could probably try to grab batches of pages here as 198/*M:014
179 * an optimization (ie. pre-faulting). :*/ 199 * get_pfn is slow: we could probably try to grab batches of pages here as
200 * an optimization (ie. pre-faulting).
201:*/
180 202
181/*H:350 This routine takes a page number given by the Guest and converts it to 203/*H:350
204 * This routine takes a page number given by the Guest and converts it to
182 * an actual, physical page number. It can fail for several reasons: the 205 * an actual, physical page number. It can fail for several reasons: the
183 * virtual address might not be mapped by the Launcher, the write flag is set 206 * virtual address might not be mapped by the Launcher, the write flag is set
184 * and the page is read-only, or the write flag was set and the page was 207 * and the page is read-only, or the write flag was set and the page was
185 * shared so had to be copied, but we ran out of memory. 208 * shared so had to be copied, but we ran out of memory.
186 * 209 *
187 * This holds a reference to the page, so release_pte() is careful to put that 210 * This holds a reference to the page, so release_pte() is careful to put that
188 * back. */ 211 * back.
212 */
189static unsigned long get_pfn(unsigned long virtpfn, int write) 213static unsigned long get_pfn(unsigned long virtpfn, int write)
190{ 214{
191 struct page *page; 215 struct page *page;
@@ -198,33 +222,41 @@ static unsigned long get_pfn(unsigned long virtpfn, int write)
198 return -1UL; 222 return -1UL;
199} 223}
200 224
201/*H:340 Converting a Guest page table entry to a shadow (ie. real) page table 225/*H:340
226 * Converting a Guest page table entry to a shadow (ie. real) page table
202 * entry can be a little tricky. The flags are (almost) the same, but the 227 * entry can be a little tricky. The flags are (almost) the same, but the
203 * Guest PTE contains a virtual page number: the CPU needs the real page 228 * Guest PTE contains a virtual page number: the CPU needs the real page
204 * number. */ 229 * number.
230 */
205static pte_t gpte_to_spte(struct lg_cpu *cpu, pte_t gpte, int write) 231static pte_t gpte_to_spte(struct lg_cpu *cpu, pte_t gpte, int write)
206{ 232{
207 unsigned long pfn, base, flags; 233 unsigned long pfn, base, flags;
208 234
209 /* The Guest sets the global flag, because it thinks that it is using 235 /*
236 * The Guest sets the global flag, because it thinks that it is using
210 * PGE. We only told it to use PGE so it would tell us whether it was 237 * PGE. We only told it to use PGE so it would tell us whether it was
211 * flushing a kernel mapping or a userspace mapping. We don't actually 238 * flushing a kernel mapping or a userspace mapping. We don't actually
212 * use the global bit, so throw it away. */ 239 * use the global bit, so throw it away.
240 */
213 flags = (pte_flags(gpte) & ~_PAGE_GLOBAL); 241 flags = (pte_flags(gpte) & ~_PAGE_GLOBAL);
214 242
215 /* The Guest's pages are offset inside the Launcher. */ 243 /* The Guest's pages are offset inside the Launcher. */
216 base = (unsigned long)cpu->lg->mem_base / PAGE_SIZE; 244 base = (unsigned long)cpu->lg->mem_base / PAGE_SIZE;
217 245
218 /* We need a temporary "unsigned long" variable to hold the answer from 246 /*
247 * We need a temporary "unsigned long" variable to hold the answer from
219 * get_pfn(), because it returns 0xFFFFFFFF on failure, which wouldn't 248 * get_pfn(), because it returns 0xFFFFFFFF on failure, which wouldn't
220 * fit in spte.pfn. get_pfn() finds the real physical number of the 249 * fit in spte.pfn. get_pfn() finds the real physical number of the
221 * page, given the virtual number. */ 250 * page, given the virtual number.
251 */
222 pfn = get_pfn(base + pte_pfn(gpte), write); 252 pfn = get_pfn(base + pte_pfn(gpte), write);
223 if (pfn == -1UL) { 253 if (pfn == -1UL) {
224 kill_guest(cpu, "failed to get page %lu", pte_pfn(gpte)); 254 kill_guest(cpu, "failed to get page %lu", pte_pfn(gpte));
225 /* When we destroy the Guest, we'll go through the shadow page 255 /*
256 * When we destroy the Guest, we'll go through the shadow page
226 * tables and release_pte() them. Make sure we don't think 257 * tables and release_pte() them. Make sure we don't think
227 * this one is valid! */ 258 * this one is valid!
259 */
228 flags = 0; 260 flags = 0;
229 } 261 }
230 /* Now we assemble our shadow PTE from the page number and flags. */ 262 /* Now we assemble our shadow PTE from the page number and flags. */
@@ -234,8 +266,10 @@ static pte_t gpte_to_spte(struct lg_cpu *cpu, pte_t gpte, int write)
234/*H:460 And to complete the chain, release_pte() looks like this: */ 266/*H:460 And to complete the chain, release_pte() looks like this: */
235static void release_pte(pte_t pte) 267static void release_pte(pte_t pte)
236{ 268{
237 /* Remember that get_user_pages_fast() took a reference to the page, in 269 /*
238 * get_pfn()? We have to put it back now. */ 270 * Remember that get_user_pages_fast() took a reference to the page, in
271 * get_pfn()? We have to put it back now.
272 */
239 if (pte_flags(pte) & _PAGE_PRESENT) 273 if (pte_flags(pte) & _PAGE_PRESENT)
240 put_page(pte_page(pte)); 274 put_page(pte_page(pte));
241} 275}
@@ -273,7 +307,8 @@ static void check_gpmd(struct lg_cpu *cpu, pmd_t gpmd)
273 * and return to the Guest without it knowing. 307 * and return to the Guest without it knowing.
274 * 308 *
275 * If we fixed up the fault (ie. we mapped the address), this routine returns 309 * If we fixed up the fault (ie. we mapped the address), this routine returns
276 * true. Otherwise, it was a real fault and we need to tell the Guest. */ 310 * true. Otherwise, it was a real fault and we need to tell the Guest.
311 */
277bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode) 312bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
278{ 313{
279 pgd_t gpgd; 314 pgd_t gpgd;
@@ -282,6 +317,7 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
282 pte_t gpte; 317 pte_t gpte;
283 pte_t *spte; 318 pte_t *spte;
284 319
320 /* Mid level for PAE. */
285#ifdef CONFIG_X86_PAE 321#ifdef CONFIG_X86_PAE
286 pmd_t *spmd; 322 pmd_t *spmd;
287 pmd_t gpmd; 323 pmd_t gpmd;
@@ -298,22 +334,26 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
298 if (!(pgd_flags(*spgd) & _PAGE_PRESENT)) { 334 if (!(pgd_flags(*spgd) & _PAGE_PRESENT)) {
299 /* No shadow entry: allocate a new shadow PTE page. */ 335 /* No shadow entry: allocate a new shadow PTE page. */
300 unsigned long ptepage = get_zeroed_page(GFP_KERNEL); 336 unsigned long ptepage = get_zeroed_page(GFP_KERNEL);
301 /* This is not really the Guest's fault, but killing it is 337 /*
302 * simple for this corner case. */ 338 * This is not really the Guest's fault, but killing it is
339 * simple for this corner case.
340 */
303 if (!ptepage) { 341 if (!ptepage) {
304 kill_guest(cpu, "out of memory allocating pte page"); 342 kill_guest(cpu, "out of memory allocating pte page");
305 return false; 343 return false;
306 } 344 }
307 /* We check that the Guest pgd is OK. */ 345 /* We check that the Guest pgd is OK. */
308 check_gpgd(cpu, gpgd); 346 check_gpgd(cpu, gpgd);
309 /* And we copy the flags to the shadow PGD entry. The page 347 /*
310 * number in the shadow PGD is the page we just allocated. */ 348 * And we copy the flags to the shadow PGD entry. The page
349 * number in the shadow PGD is the page we just allocated.
350 */
311 set_pgd(spgd, __pgd(__pa(ptepage) | pgd_flags(gpgd))); 351 set_pgd(spgd, __pgd(__pa(ptepage) | pgd_flags(gpgd)));
312 } 352 }
313 353
314#ifdef CONFIG_X86_PAE 354#ifdef CONFIG_X86_PAE
315 gpmd = lgread(cpu, gpmd_addr(gpgd, vaddr), pmd_t); 355 gpmd = lgread(cpu, gpmd_addr(gpgd, vaddr), pmd_t);
316 /* middle level not present? We can't map it in. */ 356 /* Middle level not present? We can't map it in. */
317 if (!(pmd_flags(gpmd) & _PAGE_PRESENT)) 357 if (!(pmd_flags(gpmd) & _PAGE_PRESENT))
318 return false; 358 return false;
319 359
@@ -324,8 +364,10 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
324 /* No shadow entry: allocate a new shadow PTE page. */ 364 /* No shadow entry: allocate a new shadow PTE page. */
325 unsigned long ptepage = get_zeroed_page(GFP_KERNEL); 365 unsigned long ptepage = get_zeroed_page(GFP_KERNEL);
326 366
327 /* This is not really the Guest's fault, but killing it is 367 /*
328 * simple for this corner case. */ 368 * This is not really the Guest's fault, but killing it is
369 * simple for this corner case.
370 */
329 if (!ptepage) { 371 if (!ptepage) {
330 kill_guest(cpu, "out of memory allocating pte page"); 372 kill_guest(cpu, "out of memory allocating pte page");
331 return false; 373 return false;
@@ -334,27 +376,37 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
334 /* We check that the Guest pmd is OK. */ 376 /* We check that the Guest pmd is OK. */
335 check_gpmd(cpu, gpmd); 377 check_gpmd(cpu, gpmd);
336 378
337 /* And we copy the flags to the shadow PMD entry. The page 379 /*
338 * number in the shadow PMD is the page we just allocated. */ 380 * And we copy the flags to the shadow PMD entry. The page
381 * number in the shadow PMD is the page we just allocated.
382 */
339 native_set_pmd(spmd, __pmd(__pa(ptepage) | pmd_flags(gpmd))); 383 native_set_pmd(spmd, __pmd(__pa(ptepage) | pmd_flags(gpmd)));
340 } 384 }
341 385
342 /* OK, now we look at the lower level in the Guest page table: keep its 386 /*
343 * address, because we might update it later. */ 387 * OK, now we look at the lower level in the Guest page table: keep its
388 * address, because we might update it later.
389 */
344 gpte_ptr = gpte_addr(cpu, gpmd, vaddr); 390 gpte_ptr = gpte_addr(cpu, gpmd, vaddr);
345#else 391#else
346 /* OK, now we look at the lower level in the Guest page table: keep its 392 /*
347 * address, because we might update it later. */ 393 * OK, now we look at the lower level in the Guest page table: keep its
394 * address, because we might update it later.
395 */
348 gpte_ptr = gpte_addr(cpu, gpgd, vaddr); 396 gpte_ptr = gpte_addr(cpu, gpgd, vaddr);
349#endif 397#endif
398
399 /* Read the actual PTE value. */
350 gpte = lgread(cpu, gpte_ptr, pte_t); 400 gpte = lgread(cpu, gpte_ptr, pte_t);
351 401
352 /* If this page isn't in the Guest page tables, we can't page it in. */ 402 /* If this page isn't in the Guest page tables, we can't page it in. */
353 if (!(pte_flags(gpte) & _PAGE_PRESENT)) 403 if (!(pte_flags(gpte) & _PAGE_PRESENT))
354 return false; 404 return false;
355 405
356 /* Check they're not trying to write to a page the Guest wants 406 /*
357 * read-only (bit 2 of errcode == write). */ 407 * Check they're not trying to write to a page the Guest wants
408 * read-only (bit 2 of errcode == write).
409 */
358 if ((errcode & 2) && !(pte_flags(gpte) & _PAGE_RW)) 410 if ((errcode & 2) && !(pte_flags(gpte) & _PAGE_RW))
359 return false; 411 return false;
360 412
@@ -362,8 +414,10 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
362 if ((errcode & 4) && !(pte_flags(gpte) & _PAGE_USER)) 414 if ((errcode & 4) && !(pte_flags(gpte) & _PAGE_USER))
363 return false; 415 return false;
364 416
365 /* Check that the Guest PTE flags are OK, and the page number is below 417 /*
366 * the pfn_limit (ie. not mapping the Launcher binary). */ 418 * Check that the Guest PTE flags are OK, and the page number is below
419 * the pfn_limit (ie. not mapping the Launcher binary).
420 */
367 check_gpte(cpu, gpte); 421 check_gpte(cpu, gpte);
368 422
369 /* Add the _PAGE_ACCESSED and (for a write) _PAGE_DIRTY flag */ 423 /* Add the _PAGE_ACCESSED and (for a write) _PAGE_DIRTY flag */
@@ -373,29 +427,40 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
373 427
374 /* Get the pointer to the shadow PTE entry we're going to set. */ 428 /* Get the pointer to the shadow PTE entry we're going to set. */
375 spte = spte_addr(cpu, *spgd, vaddr); 429 spte = spte_addr(cpu, *spgd, vaddr);
376 /* If there was a valid shadow PTE entry here before, we release it. 430
377 * This can happen with a write to a previously read-only entry. */ 431 /*
432 * If there was a valid shadow PTE entry here before, we release it.
433 * This can happen with a write to a previously read-only entry.
434 */
378 release_pte(*spte); 435 release_pte(*spte);
379 436
380 /* If this is a write, we insist that the Guest page is writable (the 437 /*
381 * final arg to gpte_to_spte()). */ 438 * If this is a write, we insist that the Guest page is writable (the
439 * final arg to gpte_to_spte()).
440 */
382 if (pte_dirty(gpte)) 441 if (pte_dirty(gpte))
383 *spte = gpte_to_spte(cpu, gpte, 1); 442 *spte = gpte_to_spte(cpu, gpte, 1);
384 else 443 else
385 /* If this is a read, don't set the "writable" bit in the page 444 /*
445 * If this is a read, don't set the "writable" bit in the page
386 * table entry, even if the Guest says it's writable. That way 446 * table entry, even if the Guest says it's writable. That way
387 * we will come back here when a write does actually occur, so 447 * we will come back here when a write does actually occur, so
388 * we can update the Guest's _PAGE_DIRTY flag. */ 448 * we can update the Guest's _PAGE_DIRTY flag.
449 */
389 native_set_pte(spte, gpte_to_spte(cpu, pte_wrprotect(gpte), 0)); 450 native_set_pte(spte, gpte_to_spte(cpu, pte_wrprotect(gpte), 0));
390 451
391 /* Finally, we write the Guest PTE entry back: we've set the 452 /*
392 * _PAGE_ACCESSED and maybe the _PAGE_DIRTY flags. */ 453 * Finally, we write the Guest PTE entry back: we've set the
454 * _PAGE_ACCESSED and maybe the _PAGE_DIRTY flags.
455 */
393 lgwrite(cpu, gpte_ptr, pte_t, gpte); 456 lgwrite(cpu, gpte_ptr, pte_t, gpte);
394 457
395 /* The fault is fixed, the page table is populated, the mapping 458 /*
459 * The fault is fixed, the page table is populated, the mapping
396 * manipulated, the result returned and the code complete. A small 460 * manipulated, the result returned and the code complete. A small
397 * delay and a trace of alliteration are the only indications the Guest 461 * delay and a trace of alliteration are the only indications the Guest
398 * has that a page fault occurred at all. */ 462 * has that a page fault occurred at all.
463 */
399 return true; 464 return true;
400} 465}
401 466
@@ -408,7 +473,8 @@ bool demand_page(struct lg_cpu *cpu, unsigned long vaddr, int errcode)
408 * mapped, so it's overkill. 473 * mapped, so it's overkill.
409 * 474 *
410 * This is a quick version which answers the question: is this virtual address 475 * This is a quick version which answers the question: is this virtual address
411 * mapped by the shadow page tables, and is it writable? */ 476 * mapped by the shadow page tables, and is it writable?
477 */
412static bool page_writable(struct lg_cpu *cpu, unsigned long vaddr) 478static bool page_writable(struct lg_cpu *cpu, unsigned long vaddr)
413{ 479{
414 pgd_t *spgd; 480 pgd_t *spgd;
@@ -428,21 +494,26 @@ static bool page_writable(struct lg_cpu *cpu, unsigned long vaddr)
428 return false; 494 return false;
429#endif 495#endif
430 496
431 /* Check the flags on the pte entry itself: it must be present and 497 /*
432 * writable. */ 498 * Check the flags on the pte entry itself: it must be present and
499 * writable.
500 */
433 flags = pte_flags(*(spte_addr(cpu, *spgd, vaddr))); 501 flags = pte_flags(*(spte_addr(cpu, *spgd, vaddr)));
434 502
435 return (flags & (_PAGE_PRESENT|_PAGE_RW)) == (_PAGE_PRESENT|_PAGE_RW); 503 return (flags & (_PAGE_PRESENT|_PAGE_RW)) == (_PAGE_PRESENT|_PAGE_RW);
436} 504}
437 505
438/* So, when pin_stack_pages() asks us to pin a page, we check if it's already 506/*
507 * So, when pin_stack_pages() asks us to pin a page, we check if it's already
439 * in the page tables, and if not, we call demand_page() with error code 2 508 * in the page tables, and if not, we call demand_page() with error code 2
440 * (meaning "write"). */ 509 * (meaning "write").
510 */
441void pin_page(struct lg_cpu *cpu, unsigned long vaddr) 511void pin_page(struct lg_cpu *cpu, unsigned long vaddr)
442{ 512{
443 if (!page_writable(cpu, vaddr) && !demand_page(cpu, vaddr, 2)) 513 if (!page_writable(cpu, vaddr) && !demand_page(cpu, vaddr, 2))
444 kill_guest(cpu, "bad stack page %#lx", vaddr); 514 kill_guest(cpu, "bad stack page %#lx", vaddr);
445} 515}
516/*:*/
446 517
447#ifdef CONFIG_X86_PAE 518#ifdef CONFIG_X86_PAE
448static void release_pmd(pmd_t *spmd) 519static void release_pmd(pmd_t *spmd)
@@ -479,15 +550,21 @@ static void release_pgd(pgd_t *spgd)
479} 550}
480 551
481#else /* !CONFIG_X86_PAE */ 552#else /* !CONFIG_X86_PAE */
482/*H:450 If we chase down the release_pgd() code, it looks like this: */ 553/*H:450
554 * If we chase down the release_pgd() code, the non-PAE version looks like
555 * this. The PAE version is almost identical, but instead of calling
556 * release_pte it calls release_pmd(), which looks much like this.
557 */
483static void release_pgd(pgd_t *spgd) 558static void release_pgd(pgd_t *spgd)
484{ 559{
485 /* If the entry's not present, there's nothing to release. */ 560 /* If the entry's not present, there's nothing to release. */
486 if (pgd_flags(*spgd) & _PAGE_PRESENT) { 561 if (pgd_flags(*spgd) & _PAGE_PRESENT) {
487 unsigned int i; 562 unsigned int i;
488 /* Converting the pfn to find the actual PTE page is easy: turn 563 /*
564 * Converting the pfn to find the actual PTE page is easy: turn
489 * the page number into a physical address, then convert to a 565 * the page number into a physical address, then convert to a
490 * virtual address (easy for kernel pages like this one). */ 566 * virtual address (easy for kernel pages like this one).
567 */
491 pte_t *ptepage = __va(pgd_pfn(*spgd) << PAGE_SHIFT); 568 pte_t *ptepage = __va(pgd_pfn(*spgd) << PAGE_SHIFT);
492 /* For each entry in the page, we might need to release it. */ 569 /* For each entry in the page, we might need to release it. */
493 for (i = 0; i < PTRS_PER_PTE; i++) 570 for (i = 0; i < PTRS_PER_PTE; i++)
@@ -499,9 +576,12 @@ static void release_pgd(pgd_t *spgd)
499 } 576 }
500} 577}
501#endif 578#endif
502/*H:445 We saw flush_user_mappings() twice: once from the flush_user_mappings() 579
580/*H:445
581 * We saw flush_user_mappings() twice: once from the flush_user_mappings()
503 * hypercall and once in new_pgdir() when we re-used a top-level pgdir page. 582 * hypercall and once in new_pgdir() when we re-used a top-level pgdir page.
504 * It simply releases every PTE page from 0 up to the Guest's kernel address. */ 583 * It simply releases every PTE page from 0 up to the Guest's kernel address.
584 */
505static void flush_user_mappings(struct lguest *lg, int idx) 585static void flush_user_mappings(struct lguest *lg, int idx)
506{ 586{
507 unsigned int i; 587 unsigned int i;
@@ -510,10 +590,12 @@ static void flush_user_mappings(struct lguest *lg, int idx)
510 release_pgd(lg->pgdirs[idx].pgdir + i); 590 release_pgd(lg->pgdirs[idx].pgdir + i);
511} 591}
512 592
513/*H:440 (v) Flushing (throwing away) page tables, 593/*H:440
594 * (v) Flushing (throwing away) page tables,
514 * 595 *
515 * The Guest has a hypercall to throw away the page tables: it's used when a 596 * The Guest has a hypercall to throw away the page tables: it's used when a
516 * large number of mappings have been changed. */ 597 * large number of mappings have been changed.
598 */
517void guest_pagetable_flush_user(struct lg_cpu *cpu) 599void guest_pagetable_flush_user(struct lg_cpu *cpu)
518{ 600{
519 /* Drop the userspace part of the current page table. */ 601 /* Drop the userspace part of the current page table. */
@@ -551,9 +633,11 @@ unsigned long guest_pa(struct lg_cpu *cpu, unsigned long vaddr)
551 return pte_pfn(gpte) * PAGE_SIZE | (vaddr & ~PAGE_MASK); 633 return pte_pfn(gpte) * PAGE_SIZE | (vaddr & ~PAGE_MASK);
552} 634}
553 635
554/* We keep several page tables. This is a simple routine to find the page 636/*
637 * We keep several page tables. This is a simple routine to find the page
555 * table (if any) corresponding to this top-level address the Guest has given 638 * table (if any) corresponding to this top-level address the Guest has given
556 * us. */ 639 * us.
640 */
557static unsigned int find_pgdir(struct lguest *lg, unsigned long pgtable) 641static unsigned int find_pgdir(struct lguest *lg, unsigned long pgtable)
558{ 642{
559 unsigned int i; 643 unsigned int i;
@@ -563,9 +647,11 @@ static unsigned int find_pgdir(struct lguest *lg, unsigned long pgtable)
563 return i; 647 return i;
564} 648}
565 649
566/*H:435 And this is us, creating the new page directory. If we really do 650/*H:435
651 * And this is us, creating the new page directory. If we really do
567 * allocate a new one (and so the kernel parts are not there), we set 652 * allocate a new one (and so the kernel parts are not there), we set
568 * blank_pgdir. */ 653 * blank_pgdir.
654 */
569static unsigned int new_pgdir(struct lg_cpu *cpu, 655static unsigned int new_pgdir(struct lg_cpu *cpu,
570 unsigned long gpgdir, 656 unsigned long gpgdir,
571 int *blank_pgdir) 657 int *blank_pgdir)
@@ -575,8 +661,10 @@ static unsigned int new_pgdir(struct lg_cpu *cpu,
575 pmd_t *pmd_table; 661 pmd_t *pmd_table;
576#endif 662#endif
577 663
578 /* We pick one entry at random to throw out. Choosing the Least 664 /*
579 * Recently Used might be better, but this is easy. */ 665 * We pick one entry at random to throw out. Choosing the Least
666 * Recently Used might be better, but this is easy.
667 */
580 next = random32() % ARRAY_SIZE(cpu->lg->pgdirs); 668 next = random32() % ARRAY_SIZE(cpu->lg->pgdirs);
581 /* If it's never been allocated at all before, try now. */ 669 /* If it's never been allocated at all before, try now. */
582 if (!cpu->lg->pgdirs[next].pgdir) { 670 if (!cpu->lg->pgdirs[next].pgdir) {
@@ -587,8 +675,10 @@ static unsigned int new_pgdir(struct lg_cpu *cpu,
587 next = cpu->cpu_pgd; 675 next = cpu->cpu_pgd;
588 else { 676 else {
589#ifdef CONFIG_X86_PAE 677#ifdef CONFIG_X86_PAE
590 /* In PAE mode, allocate a pmd page and populate the 678 /*
591 * last pgd entry. */ 679 * In PAE mode, allocate a pmd page and populate the
680 * last pgd entry.
681 */
592 pmd_table = (pmd_t *)get_zeroed_page(GFP_KERNEL); 682 pmd_table = (pmd_t *)get_zeroed_page(GFP_KERNEL);
593 if (!pmd_table) { 683 if (!pmd_table) {
594 free_page((long)cpu->lg->pgdirs[next].pgdir); 684 free_page((long)cpu->lg->pgdirs[next].pgdir);
@@ -598,8 +688,10 @@ static unsigned int new_pgdir(struct lg_cpu *cpu,
598 set_pgd(cpu->lg->pgdirs[next].pgdir + 688 set_pgd(cpu->lg->pgdirs[next].pgdir +
599 SWITCHER_PGD_INDEX, 689 SWITCHER_PGD_INDEX,
600 __pgd(__pa(pmd_table) | _PAGE_PRESENT)); 690 __pgd(__pa(pmd_table) | _PAGE_PRESENT));
601 /* This is a blank page, so there are no kernel 691 /*
602 * mappings: caller must map the stack! */ 692 * This is a blank page, so there are no kernel
693 * mappings: caller must map the stack!
694 */
603 *blank_pgdir = 1; 695 *blank_pgdir = 1;
604 } 696 }
605#else 697#else
@@ -615,19 +707,23 @@ static unsigned int new_pgdir(struct lg_cpu *cpu,
615 return next; 707 return next;
616} 708}
617 709
618/*H:430 (iv) Switching page tables 710/*H:430
711 * (iv) Switching page tables
619 * 712 *
620 * Now we've seen all the page table setting and manipulation, let's see 713 * Now we've seen all the page table setting and manipulation, let's see
621 * what happens when the Guest changes page tables (ie. changes the top-level 714 * what happens when the Guest changes page tables (ie. changes the top-level
622 * pgdir). This occurs on almost every context switch. */ 715 * pgdir). This occurs on almost every context switch.
716 */
623void guest_new_pagetable(struct lg_cpu *cpu, unsigned long pgtable) 717void guest_new_pagetable(struct lg_cpu *cpu, unsigned long pgtable)
624{ 718{
625 int newpgdir, repin = 0; 719 int newpgdir, repin = 0;
626 720
627 /* Look to see if we have this one already. */ 721 /* Look to see if we have this one already. */
628 newpgdir = find_pgdir(cpu->lg, pgtable); 722 newpgdir = find_pgdir(cpu->lg, pgtable);
629 /* If not, we allocate or mug an existing one: if it's a fresh one, 723 /*
630 * repin gets set to 1. */ 724 * If not, we allocate or mug an existing one: if it's a fresh one,
725 * repin gets set to 1.
726 */
631 if (newpgdir == ARRAY_SIZE(cpu->lg->pgdirs)) 727 if (newpgdir == ARRAY_SIZE(cpu->lg->pgdirs))
632 newpgdir = new_pgdir(cpu, pgtable, &repin); 728 newpgdir = new_pgdir(cpu, pgtable, &repin);
633 /* Change the current pgd index to the new one. */ 729 /* Change the current pgd index to the new one. */
@@ -637,9 +733,11 @@ void guest_new_pagetable(struct lg_cpu *cpu, unsigned long pgtable)
637 pin_stack_pages(cpu); 733 pin_stack_pages(cpu);
638} 734}
639 735
640/*H:470 Finally, a routine which throws away everything: all PGD entries in all 736/*H:470
737 * Finally, a routine which throws away everything: all PGD entries in all
641 * the shadow page tables, including the Guest's kernel mappings. This is used 738 * the shadow page tables, including the Guest's kernel mappings. This is used
642 * when we destroy the Guest. */ 739 * when we destroy the Guest.
740 */
643static void release_all_pagetables(struct lguest *lg) 741static void release_all_pagetables(struct lguest *lg)
644{ 742{
645 unsigned int i, j; 743 unsigned int i, j;
@@ -656,8 +754,10 @@ static void release_all_pagetables(struct lguest *lg)
656 spgd = lg->pgdirs[i].pgdir + SWITCHER_PGD_INDEX; 754 spgd = lg->pgdirs[i].pgdir + SWITCHER_PGD_INDEX;
657 pmdpage = __va(pgd_pfn(*spgd) << PAGE_SHIFT); 755 pmdpage = __va(pgd_pfn(*spgd) << PAGE_SHIFT);
658 756
659 /* And release the pmd entries of that pmd page, 757 /*
660 * except for the switcher pmd. */ 758 * And release the pmd entries of that pmd page,
759 * except for the switcher pmd.
760 */
661 for (k = 0; k < SWITCHER_PMD_INDEX; k++) 761 for (k = 0; k < SWITCHER_PMD_INDEX; k++)
662 release_pmd(&pmdpage[k]); 762 release_pmd(&pmdpage[k]);
663#endif 763#endif
@@ -667,10 +767,12 @@ static void release_all_pagetables(struct lguest *lg)
667 } 767 }
668} 768}
669 769
670/* We also throw away everything when a Guest tells us it's changed a kernel 770/*
771 * We also throw away everything when a Guest tells us it's changed a kernel
671 * mapping. Since kernel mappings are in every page table, it's easiest to 772 * mapping. Since kernel mappings are in every page table, it's easiest to
672 * throw them all away. This traps the Guest in amber for a while as 773 * throw them all away. This traps the Guest in amber for a while as
673 * everything faults back in, but it's rare. */ 774 * everything faults back in, but it's rare.
775 */
674void guest_pagetable_clear_all(struct lg_cpu *cpu) 776void guest_pagetable_clear_all(struct lg_cpu *cpu)
675{ 777{
676 release_all_pagetables(cpu->lg); 778 release_all_pagetables(cpu->lg);
@@ -678,15 +780,19 @@ void guest_pagetable_clear_all(struct lg_cpu *cpu)
678 pin_stack_pages(cpu); 780 pin_stack_pages(cpu);
679} 781}
680/*:*/ 782/*:*/
681/*M:009 Since we throw away all mappings when a kernel mapping changes, our 783
784/*M:009
785 * Since we throw away all mappings when a kernel mapping changes, our
682 * performance sucks for guests using highmem. In fact, a guest with 786 * performance sucks for guests using highmem. In fact, a guest with
683 * PAGE_OFFSET 0xc0000000 (the default) and more than about 700MB of RAM is 787 * PAGE_OFFSET 0xc0000000 (the default) and more than about 700MB of RAM is
684 * usually slower than a Guest with less memory. 788 * usually slower than a Guest with less memory.
685 * 789 *
686 * This, of course, cannot be fixed. It would take some kind of... well, I 790 * This, of course, cannot be fixed. It would take some kind of... well, I
687 * don't know, but the term "puissant code-fu" comes to mind. :*/ 791 * don't know, but the term "puissant code-fu" comes to mind.
792:*/
688 793
689/*H:420 This is the routine which actually sets the page table entry for then 794/*H:420
795 * This is the routine which actually sets the page table entry for then
690 * "idx"'th shadow page table. 796 * "idx"'th shadow page table.
691 * 797 *
692 * Normally, we can just throw out the old entry and replace it with 0: if they 798 * Normally, we can just throw out the old entry and replace it with 0: if they
@@ -715,31 +821,36 @@ static void do_set_pte(struct lg_cpu *cpu, int idx,
715 spmd = spmd_addr(cpu, *spgd, vaddr); 821 spmd = spmd_addr(cpu, *spgd, vaddr);
716 if (pmd_flags(*spmd) & _PAGE_PRESENT) { 822 if (pmd_flags(*spmd) & _PAGE_PRESENT) {
717#endif 823#endif
718 /* Otherwise, we start by releasing 824 /* Otherwise, start by releasing the existing entry. */
719 * the existing entry. */
720 pte_t *spte = spte_addr(cpu, *spgd, vaddr); 825 pte_t *spte = spte_addr(cpu, *spgd, vaddr);
721 release_pte(*spte); 826 release_pte(*spte);
722 827
723 /* If they're setting this entry as dirty or accessed, 828 /*
724 * we might as well put that entry they've given us 829 * If they're setting this entry as dirty or accessed,
725 * in now. This shaves 10% off a 830 * we might as well put that entry they've given us in
726 * copy-on-write micro-benchmark. */ 831 * now. This shaves 10% off a copy-on-write
832 * micro-benchmark.
833 */
727 if (pte_flags(gpte) & (_PAGE_DIRTY | _PAGE_ACCESSED)) { 834 if (pte_flags(gpte) & (_PAGE_DIRTY | _PAGE_ACCESSED)) {
728 check_gpte(cpu, gpte); 835 check_gpte(cpu, gpte);
729 native_set_pte(spte, 836 native_set_pte(spte,
730 gpte_to_spte(cpu, gpte, 837 gpte_to_spte(cpu, gpte,
731 pte_flags(gpte) & _PAGE_DIRTY)); 838 pte_flags(gpte) & _PAGE_DIRTY));
732 } else 839 } else {
733 /* Otherwise kill it and we can demand_page() 840 /*
734 * it in later. */ 841 * Otherwise kill it and we can demand_page()
842 * it in later.
843 */
735 native_set_pte(spte, __pte(0)); 844 native_set_pte(spte, __pte(0));
845 }
736#ifdef CONFIG_X86_PAE 846#ifdef CONFIG_X86_PAE
737 } 847 }
738#endif 848#endif
739 } 849 }
740} 850}
741 851
742/*H:410 Updating a PTE entry is a little trickier. 852/*H:410
853 * Updating a PTE entry is a little trickier.
743 * 854 *
744 * We keep track of several different page tables (the Guest uses one for each 855 * We keep track of several different page tables (the Guest uses one for each
745 * process, so it makes sense to cache at least a few). Each of these have 856 * process, so it makes sense to cache at least a few). Each of these have
@@ -748,12 +859,15 @@ static void do_set_pte(struct lg_cpu *cpu, int idx,
748 * all the page tables, not just the current one. This is rare. 859 * all the page tables, not just the current one. This is rare.
749 * 860 *
750 * The benefit is that when we have to track a new page table, we can keep all 861 * The benefit is that when we have to track a new page table, we can keep all
751 * the kernel mappings. This speeds up context switch immensely. */ 862 * the kernel mappings. This speeds up context switch immensely.
863 */
752void guest_set_pte(struct lg_cpu *cpu, 864void guest_set_pte(struct lg_cpu *cpu,
753 unsigned long gpgdir, unsigned long vaddr, pte_t gpte) 865 unsigned long gpgdir, unsigned long vaddr, pte_t gpte)
754{ 866{
755 /* Kernel mappings must be changed on all top levels. Slow, but doesn't 867 /*
756 * happen often. */ 868 * Kernel mappings must be changed on all top levels. Slow, but doesn't
869 * happen often.
870 */
757 if (vaddr >= cpu->lg->kernel_address) { 871 if (vaddr >= cpu->lg->kernel_address) {
758 unsigned int i; 872 unsigned int i;
759 for (i = 0; i < ARRAY_SIZE(cpu->lg->pgdirs); i++) 873 for (i = 0; i < ARRAY_SIZE(cpu->lg->pgdirs); i++)
@@ -795,19 +909,25 @@ void guest_set_pgd(struct lguest *lg, unsigned long gpgdir, u32 idx)
795 /* ... throw it away. */ 909 /* ... throw it away. */
796 release_pgd(lg->pgdirs[pgdir].pgdir + idx); 910 release_pgd(lg->pgdirs[pgdir].pgdir + idx);
797} 911}
912
798#ifdef CONFIG_X86_PAE 913#ifdef CONFIG_X86_PAE
914/* For setting a mid-level, we just throw everything away. It's easy. */
799void guest_set_pmd(struct lguest *lg, unsigned long pmdp, u32 idx) 915void guest_set_pmd(struct lguest *lg, unsigned long pmdp, u32 idx)
800{ 916{
801 guest_pagetable_clear_all(&lg->cpus[0]); 917 guest_pagetable_clear_all(&lg->cpus[0]);
802} 918}
803#endif 919#endif
804 920
805/* Once we know how much memory we have we can construct simple identity 921/*H:505
806 * (which set virtual == physical) and linear mappings 922 * To get through boot, we construct simple identity page mappings (which
807 * which will get the Guest far enough into the boot to create its own. 923 * set virtual == physical) and linear mappings which will get the Guest far
924 * enough into the boot to create its own. The linear mapping means we
925 * simplify the Guest boot, but it makes assumptions about their PAGE_OFFSET,
926 * as you'll see.
808 * 927 *
809 * We lay them out of the way, just below the initrd (which is why we need to 928 * We lay them out of the way, just below the initrd (which is why we need to
810 * know its size here). */ 929 * know its size here).
930 */
811static unsigned long setup_pagetables(struct lguest *lg, 931static unsigned long setup_pagetables(struct lguest *lg,
812 unsigned long mem, 932 unsigned long mem,
813 unsigned long initrd_size) 933 unsigned long initrd_size)
@@ -825,8 +945,10 @@ static unsigned long setup_pagetables(struct lguest *lg,
825 unsigned int phys_linear; 945 unsigned int phys_linear;
826#endif 946#endif
827 947
828 /* We have mapped_pages frames to map, so we need 948 /*
829 * linear_pages page tables to map them. */ 949 * We have mapped_pages frames to map, so we need linear_pages page
950 * tables to map them.
951 */
830 mapped_pages = mem / PAGE_SIZE; 952 mapped_pages = mem / PAGE_SIZE;
831 linear_pages = (mapped_pages + PTRS_PER_PTE - 1) / PTRS_PER_PTE; 953 linear_pages = (mapped_pages + PTRS_PER_PTE - 1) / PTRS_PER_PTE;
832 954
@@ -837,10 +959,16 @@ static unsigned long setup_pagetables(struct lguest *lg,
837 linear = (void *)pgdir - linear_pages * PAGE_SIZE; 959 linear = (void *)pgdir - linear_pages * PAGE_SIZE;
838 960
839#ifdef CONFIG_X86_PAE 961#ifdef CONFIG_X86_PAE
962 /*
963 * And the single mid page goes below that. We only use one, but
964 * that's enough to map 1G, which definitely gets us through boot.
965 */
840 pmds = (void *)linear - PAGE_SIZE; 966 pmds = (void *)linear - PAGE_SIZE;
841#endif 967#endif
842 /* Linear mapping is easy: put every page's address into the 968 /*
843 * mapping in order. */ 969 * Linear mapping is easy: put every page's address into the
970 * mapping in order.
971 */
844 for (i = 0; i < mapped_pages; i++) { 972 for (i = 0; i < mapped_pages; i++) {
845 pte_t pte; 973 pte_t pte;
846 pte = pfn_pte(i, __pgprot(_PAGE_PRESENT|_PAGE_RW|_PAGE_USER)); 974 pte = pfn_pte(i, __pgprot(_PAGE_PRESENT|_PAGE_RW|_PAGE_USER));
@@ -848,11 +976,14 @@ static unsigned long setup_pagetables(struct lguest *lg,
848 return -EFAULT; 976 return -EFAULT;
849 } 977 }
850 978
851 /* The top level points to the linear page table pages above.
852 * We setup the identity and linear mappings here. */
853#ifdef CONFIG_X86_PAE 979#ifdef CONFIG_X86_PAE
980 /*
981 * Make the Guest PMD entries point to the corresponding place in the
982 * linear mapping (up to one page worth of PMD).
983 */
854 for (i = j = 0; i < mapped_pages && j < PTRS_PER_PMD; 984 for (i = j = 0; i < mapped_pages && j < PTRS_PER_PMD;
855 i += PTRS_PER_PTE, j++) { 985 i += PTRS_PER_PTE, j++) {
986 /* FIXME: native_set_pmd is overkill here. */
856 native_set_pmd(&pmd, __pmd(((unsigned long)(linear + i) 987 native_set_pmd(&pmd, __pmd(((unsigned long)(linear + i)
857 - mem_base) | _PAGE_PRESENT | _PAGE_RW | _PAGE_USER)); 988 - mem_base) | _PAGE_PRESENT | _PAGE_RW | _PAGE_USER));
858 989
@@ -860,18 +991,36 @@ static unsigned long setup_pagetables(struct lguest *lg,
860 return -EFAULT; 991 return -EFAULT;
861 } 992 }
862 993
994 /* One PGD entry, pointing to that PMD page. */
863 set_pgd(&pgd, __pgd(((u32)pmds - mem_base) | _PAGE_PRESENT)); 995 set_pgd(&pgd, __pgd(((u32)pmds - mem_base) | _PAGE_PRESENT));
996 /* Copy it in as the first PGD entry (ie. addresses 0-1G). */
864 if (copy_to_user(&pgdir[0], &pgd, sizeof(pgd)) != 0) 997 if (copy_to_user(&pgdir[0], &pgd, sizeof(pgd)) != 0)
865 return -EFAULT; 998 return -EFAULT;
999 /*
1000 * And the third PGD entry (ie. addresses 3G-4G).
1001 *
1002 * FIXME: This assumes that PAGE_OFFSET for the Guest is 0xC0000000.
1003 */
866 if (copy_to_user(&pgdir[3], &pgd, sizeof(pgd)) != 0) 1004 if (copy_to_user(&pgdir[3], &pgd, sizeof(pgd)) != 0)
867 return -EFAULT; 1005 return -EFAULT;
868#else 1006#else
1007 /*
1008 * The top level points to the linear page table pages above.
1009 * We setup the identity and linear mappings here.
1010 */
869 phys_linear = (unsigned long)linear - mem_base; 1011 phys_linear = (unsigned long)linear - mem_base;
870 for (i = 0; i < mapped_pages; i += PTRS_PER_PTE) { 1012 for (i = 0; i < mapped_pages; i += PTRS_PER_PTE) {
871 pgd_t pgd; 1013 pgd_t pgd;
1014 /*
1015 * Create a PGD entry which points to the right part of the
1016 * linear PTE pages.
1017 */
872 pgd = __pgd((phys_linear + i * sizeof(pte_t)) | 1018 pgd = __pgd((phys_linear + i * sizeof(pte_t)) |
873 (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER)); 1019 (_PAGE_PRESENT | _PAGE_RW | _PAGE_USER));
874 1020
1021 /*
1022 * Copy it into the PGD page at 0 and PAGE_OFFSET.
1023 */
875 if (copy_to_user(&pgdir[i / PTRS_PER_PTE], &pgd, sizeof(pgd)) 1024 if (copy_to_user(&pgdir[i / PTRS_PER_PTE], &pgd, sizeof(pgd))
876 || copy_to_user(&pgdir[pgd_index(PAGE_OFFSET) 1025 || copy_to_user(&pgdir[pgd_index(PAGE_OFFSET)
877 + i / PTRS_PER_PTE], 1026 + i / PTRS_PER_PTE],
@@ -880,15 +1029,19 @@ static unsigned long setup_pagetables(struct lguest *lg,
880 } 1029 }
881#endif 1030#endif
882 1031
883 /* We return the top level (guest-physical) address: remember where 1032 /*
884 * this is. */ 1033 * We return the top level (guest-physical) address: we remember where
1034 * this is to write it into lguest_data when the Guest initializes.
1035 */
885 return (unsigned long)pgdir - mem_base; 1036 return (unsigned long)pgdir - mem_base;
886} 1037}
887 1038
888/*H:500 (vii) Setting up the page tables initially. 1039/*H:500
1040 * (vii) Setting up the page tables initially.
889 * 1041 *
890 * When a Guest is first created, the Launcher tells us where the toplevel of 1042 * When a Guest is first created, the Launcher tells us where the toplevel of
891 * its first page table is. We set some things up here: */ 1043 * its first page table is. We set some things up here:
1044 */
892int init_guest_pagetable(struct lguest *lg) 1045int init_guest_pagetable(struct lguest *lg)
893{ 1046{
894 u64 mem; 1047 u64 mem;
@@ -898,21 +1051,27 @@ int init_guest_pagetable(struct lguest *lg)
898 pgd_t *pgd; 1051 pgd_t *pgd;
899 pmd_t *pmd_table; 1052 pmd_t *pmd_table;
900#endif 1053#endif
901 /* Get the Guest memory size and the ramdisk size from the boot header 1054 /*
902 * located at lg->mem_base (Guest address 0). */ 1055 * Get the Guest memory size and the ramdisk size from the boot header
1056 * located at lg->mem_base (Guest address 0).
1057 */
903 if (copy_from_user(&mem, &boot->e820_map[0].size, sizeof(mem)) 1058 if (copy_from_user(&mem, &boot->e820_map[0].size, sizeof(mem))
904 || get_user(initrd_size, &boot->hdr.ramdisk_size)) 1059 || get_user(initrd_size, &boot->hdr.ramdisk_size))
905 return -EFAULT; 1060 return -EFAULT;
906 1061
907 /* We start on the first shadow page table, and give it a blank PGD 1062 /*
908 * page. */ 1063 * We start on the first shadow page table, and give it a blank PGD
1064 * page.
1065 */
909 lg->pgdirs[0].gpgdir = setup_pagetables(lg, mem, initrd_size); 1066 lg->pgdirs[0].gpgdir = setup_pagetables(lg, mem, initrd_size);
910 if (IS_ERR_VALUE(lg->pgdirs[0].gpgdir)) 1067 if (IS_ERR_VALUE(lg->pgdirs[0].gpgdir))
911 return lg->pgdirs[0].gpgdir; 1068 return lg->pgdirs[0].gpgdir;
912 lg->pgdirs[0].pgdir = (pgd_t *)get_zeroed_page(GFP_KERNEL); 1069 lg->pgdirs[0].pgdir = (pgd_t *)get_zeroed_page(GFP_KERNEL);
913 if (!lg->pgdirs[0].pgdir) 1070 if (!lg->pgdirs[0].pgdir)
914 return -ENOMEM; 1071 return -ENOMEM;
1072
915#ifdef CONFIG_X86_PAE 1073#ifdef CONFIG_X86_PAE
1074 /* For PAE, we also create the initial mid-level. */
916 pgd = lg->pgdirs[0].pgdir; 1075 pgd = lg->pgdirs[0].pgdir;
917 pmd_table = (pmd_t *) get_zeroed_page(GFP_KERNEL); 1076 pmd_table = (pmd_t *) get_zeroed_page(GFP_KERNEL);
918 if (!pmd_table) 1077 if (!pmd_table)
@@ -921,27 +1080,33 @@ int init_guest_pagetable(struct lguest *lg)
921 set_pgd(pgd + SWITCHER_PGD_INDEX, 1080 set_pgd(pgd + SWITCHER_PGD_INDEX,
922 __pgd(__pa(pmd_table) | _PAGE_PRESENT)); 1081 __pgd(__pa(pmd_table) | _PAGE_PRESENT));
923#endif 1082#endif
1083
1084 /* This is the current page table. */
924 lg->cpus[0].cpu_pgd = 0; 1085 lg->cpus[0].cpu_pgd = 0;
925 return 0; 1086 return 0;
926} 1087}
927 1088
928/* When the Guest calls LHCALL_LGUEST_INIT we do more setup. */ 1089/*H:508 When the Guest calls LHCALL_LGUEST_INIT we do more setup. */
929void page_table_guest_data_init(struct lg_cpu *cpu) 1090void page_table_guest_data_init(struct lg_cpu *cpu)
930{ 1091{
931 /* We get the kernel address: above this is all kernel memory. */ 1092 /* We get the kernel address: above this is all kernel memory. */
932 if (get_user(cpu->lg->kernel_address, 1093 if (get_user(cpu->lg->kernel_address,
933 &cpu->lg->lguest_data->kernel_address) 1094 &cpu->lg->lguest_data->kernel_address)
934 /* We tell the Guest that it can't use the top 2 or 4 MB 1095 /*
935 * of virtual addresses used by the Switcher. */ 1096 * We tell the Guest that it can't use the top 2 or 4 MB
1097 * of virtual addresses used by the Switcher.
1098 */
936 || put_user(RESERVE_MEM * 1024 * 1024, 1099 || put_user(RESERVE_MEM * 1024 * 1024,
937 &cpu->lg->lguest_data->reserve_mem) 1100 &cpu->lg->lguest_data->reserve_mem)
938 || put_user(cpu->lg->pgdirs[0].gpgdir, 1101 || put_user(cpu->lg->pgdirs[0].gpgdir,
939 &cpu->lg->lguest_data->pgdir)) 1102 &cpu->lg->lguest_data->pgdir))
940 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data); 1103 kill_guest(cpu, "bad guest page %p", cpu->lg->lguest_data);
941 1104
942 /* In flush_user_mappings() we loop from 0 to 1105 /*
1106 * In flush_user_mappings() we loop from 0 to
943 * "pgd_index(lg->kernel_address)". This assumes it won't hit the 1107 * "pgd_index(lg->kernel_address)". This assumes it won't hit the
944 * Switcher mappings, so check that now. */ 1108 * Switcher mappings, so check that now.
1109 */
945#ifdef CONFIG_X86_PAE 1110#ifdef CONFIG_X86_PAE
946 if (pgd_index(cpu->lg->kernel_address) == SWITCHER_PGD_INDEX && 1111 if (pgd_index(cpu->lg->kernel_address) == SWITCHER_PGD_INDEX &&
947 pmd_index(cpu->lg->kernel_address) == SWITCHER_PMD_INDEX) 1112 pmd_index(cpu->lg->kernel_address) == SWITCHER_PMD_INDEX)
@@ -964,12 +1129,14 @@ void free_guest_pagetable(struct lguest *lg)
964 free_page((long)lg->pgdirs[i].pgdir); 1129 free_page((long)lg->pgdirs[i].pgdir);
965} 1130}
966 1131
967/*H:480 (vi) Mapping the Switcher when the Guest is about to run. 1132/*H:480
1133 * (vi) Mapping the Switcher when the Guest is about to run.
968 * 1134 *
969 * The Switcher and the two pages for this CPU need to be visible in the 1135 * The Switcher and the two pages for this CPU need to be visible in the
970 * Guest (and not the pages for other CPUs). We have the appropriate PTE pages 1136 * Guest (and not the pages for other CPUs). We have the appropriate PTE pages
971 * for each CPU already set up, we just need to hook them in now we know which 1137 * for each CPU already set up, we just need to hook them in now we know which
972 * Guest is about to run on this CPU. */ 1138 * Guest is about to run on this CPU.
1139 */
973void map_switcher_in_guest(struct lg_cpu *cpu, struct lguest_pages *pages) 1140void map_switcher_in_guest(struct lg_cpu *cpu, struct lguest_pages *pages)
974{ 1141{
975 pte_t *switcher_pte_page = __get_cpu_var(switcher_pte_pages); 1142 pte_t *switcher_pte_page = __get_cpu_var(switcher_pte_pages);
@@ -980,30 +1147,38 @@ void map_switcher_in_guest(struct lg_cpu *cpu, struct lguest_pages *pages)
980 pmd_t switcher_pmd; 1147 pmd_t switcher_pmd;
981 pmd_t *pmd_table; 1148 pmd_t *pmd_table;
982 1149
1150 /* FIXME: native_set_pmd is overkill here. */
983 native_set_pmd(&switcher_pmd, pfn_pmd(__pa(switcher_pte_page) >> 1151 native_set_pmd(&switcher_pmd, pfn_pmd(__pa(switcher_pte_page) >>
984 PAGE_SHIFT, PAGE_KERNEL_EXEC)); 1152 PAGE_SHIFT, PAGE_KERNEL_EXEC));
985 1153
1154 /* Figure out where the pmd page is, by reading the PGD, and converting
1155 * it to a virtual address. */
986 pmd_table = __va(pgd_pfn(cpu->lg-> 1156 pmd_table = __va(pgd_pfn(cpu->lg->
987 pgdirs[cpu->cpu_pgd].pgdir[SWITCHER_PGD_INDEX]) 1157 pgdirs[cpu->cpu_pgd].pgdir[SWITCHER_PGD_INDEX])
988 << PAGE_SHIFT); 1158 << PAGE_SHIFT);
1159 /* Now write it into the shadow page table. */
989 native_set_pmd(&pmd_table[SWITCHER_PMD_INDEX], switcher_pmd); 1160 native_set_pmd(&pmd_table[SWITCHER_PMD_INDEX], switcher_pmd);
990#else 1161#else
991 pgd_t switcher_pgd; 1162 pgd_t switcher_pgd;
992 1163
993 /* Make the last PGD entry for this Guest point to the Switcher's PTE 1164 /*
994 * page for this CPU (with appropriate flags). */ 1165 * Make the last PGD entry for this Guest point to the Switcher's PTE
1166 * page for this CPU (with appropriate flags).
1167 */
995 switcher_pgd = __pgd(__pa(switcher_pte_page) | __PAGE_KERNEL_EXEC); 1168 switcher_pgd = __pgd(__pa(switcher_pte_page) | __PAGE_KERNEL_EXEC);
996 1169
997 cpu->lg->pgdirs[cpu->cpu_pgd].pgdir[SWITCHER_PGD_INDEX] = switcher_pgd; 1170 cpu->lg->pgdirs[cpu->cpu_pgd].pgdir[SWITCHER_PGD_INDEX] = switcher_pgd;
998 1171
999#endif 1172#endif
1000 /* We also change the Switcher PTE page. When we're running the Guest, 1173 /*
1174 * We also change the Switcher PTE page. When we're running the Guest,
1001 * we want the Guest's "regs" page to appear where the first Switcher 1175 * we want the Guest's "regs" page to appear where the first Switcher
1002 * page for this CPU is. This is an optimization: when the Switcher 1176 * page for this CPU is. This is an optimization: when the Switcher
1003 * saves the Guest registers, it saves them into the first page of this 1177 * saves the Guest registers, it saves them into the first page of this
1004 * CPU's "struct lguest_pages": if we make sure the Guest's register 1178 * CPU's "struct lguest_pages": if we make sure the Guest's register
1005 * page is already mapped there, we don't have to copy them out 1179 * page is already mapped there, we don't have to copy them out
1006 * again. */ 1180 * again.
1181 */
1007 pfn = __pa(cpu->regs_page) >> PAGE_SHIFT; 1182 pfn = __pa(cpu->regs_page) >> PAGE_SHIFT;
1008 native_set_pte(&regs_pte, pfn_pte(pfn, PAGE_KERNEL)); 1183 native_set_pte(&regs_pte, pfn_pte(pfn, PAGE_KERNEL));
1009 native_set_pte(&switcher_pte_page[pte_index((unsigned long)pages)], 1184 native_set_pte(&switcher_pte_page[pte_index((unsigned long)pages)],
@@ -1019,10 +1194,12 @@ static void free_switcher_pte_pages(void)
1019 free_page((long)switcher_pte_page(i)); 1194 free_page((long)switcher_pte_page(i));
1020} 1195}
1021 1196
1022/*H:520 Setting up the Switcher PTE page for given CPU is fairly easy, given 1197/*H:520
1198 * Setting up the Switcher PTE page for given CPU is fairly easy, given
1023 * the CPU number and the "struct page"s for the Switcher code itself. 1199 * the CPU number and the "struct page"s for the Switcher code itself.
1024 * 1200 *
1025 * Currently the Switcher is less than a page long, so "pages" is always 1. */ 1201 * Currently the Switcher is less than a page long, so "pages" is always 1.
1202 */
1026static __init void populate_switcher_pte_page(unsigned int cpu, 1203static __init void populate_switcher_pte_page(unsigned int cpu,
1027 struct page *switcher_page[], 1204 struct page *switcher_page[],
1028 unsigned int pages) 1205 unsigned int pages)
@@ -1043,13 +1220,16 @@ static __init void populate_switcher_pte_page(unsigned int cpu,
1043 native_set_pte(&pte[i], pfn_pte(page_to_pfn(switcher_page[i]), 1220 native_set_pte(&pte[i], pfn_pte(page_to_pfn(switcher_page[i]),
1044 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED|_PAGE_RW))); 1221 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED|_PAGE_RW)));
1045 1222
1046 /* The second page contains the "struct lguest_ro_state", and is 1223 /*
1047 * read-only. */ 1224 * The second page contains the "struct lguest_ro_state", and is
1225 * read-only.
1226 */
1048 native_set_pte(&pte[i+1], pfn_pte(page_to_pfn(switcher_page[i+1]), 1227 native_set_pte(&pte[i+1], pfn_pte(page_to_pfn(switcher_page[i+1]),
1049 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED))); 1228 __pgprot(_PAGE_PRESENT|_PAGE_ACCESSED)));
1050} 1229}
1051 1230
1052/* We've made it through the page table code. Perhaps our tired brains are 1231/*
1232 * We've made it through the page table code. Perhaps our tired brains are
1053 * still processing the details, or perhaps we're simply glad it's over. 1233 * still processing the details, or perhaps we're simply glad it's over.
1054 * 1234 *
1055 * If nothing else, note that all this complexity in juggling shadow page tables 1235 * If nothing else, note that all this complexity in juggling shadow page tables
@@ -1058,10 +1238,13 @@ static __init void populate_switcher_pte_page(unsigned int cpu,
1058 * uses exotic direct Guest pagetable manipulation, and why both Intel and AMD 1238 * uses exotic direct Guest pagetable manipulation, and why both Intel and AMD
1059 * have implemented shadow page table support directly into hardware. 1239 * have implemented shadow page table support directly into hardware.
1060 * 1240 *
1061 * There is just one file remaining in the Host. */ 1241 * There is just one file remaining in the Host.
1242 */
1062 1243
1063/*H:510 At boot or module load time, init_pagetables() allocates and populates 1244/*H:510
1064 * the Switcher PTE page for each CPU. */ 1245 * At boot or module load time, init_pagetables() allocates and populates
1246 * the Switcher PTE page for each CPU.
1247 */
1065__init int init_pagetables(struct page **switcher_page, unsigned int pages) 1248__init int init_pagetables(struct page **switcher_page, unsigned int pages)
1066{ 1249{
1067 unsigned int i; 1250 unsigned int i;
diff --git a/drivers/lguest/segments.c b/drivers/lguest/segments.c
index 482ed5a18750..951c57b0a7e0 100644
--- a/drivers/lguest/segments.c
+++ b/drivers/lguest/segments.c
@@ -1,4 +1,5 @@
1/*P:600 The x86 architecture has segments, which involve a table of descriptors 1/*P:600
2 * The x86 architecture has segments, which involve a table of descriptors
2 * which can be used to do funky things with virtual address interpretation. 3 * which can be used to do funky things with virtual address interpretation.
3 * We originally used to use segments so the Guest couldn't alter the 4 * We originally used to use segments so the Guest couldn't alter the
4 * Guest<->Host Switcher, and then we had to trim Guest segments, and restore 5 * Guest<->Host Switcher, and then we had to trim Guest segments, and restore
@@ -8,7 +9,8 @@
8 * 9 *
9 * In these modern times, the segment handling code consists of simple sanity 10 * In these modern times, the segment handling code consists of simple sanity
10 * checks, and the worst you'll experience reading this code is butterfly-rash 11 * checks, and the worst you'll experience reading this code is butterfly-rash
11 * from frolicking through its parklike serenity. :*/ 12 * from frolicking through its parklike serenity.
13:*/
12#include "lg.h" 14#include "lg.h"
13 15
14/*H:600 16/*H:600
@@ -41,10 +43,12 @@
41 * begin. 43 * begin.
42 */ 44 */
43 45
44/* There are several entries we don't let the Guest set. The TSS entry is the 46/*
47 * There are several entries we don't let the Guest set. The TSS entry is the
45 * "Task State Segment" which controls all kinds of delicate things. The 48 * "Task State Segment" which controls all kinds of delicate things. The
46 * LGUEST_CS and LGUEST_DS entries are reserved for the Switcher, and the 49 * LGUEST_CS and LGUEST_DS entries are reserved for the Switcher, and the
47 * the Guest can't be trusted to deal with double faults. */ 50 * the Guest can't be trusted to deal with double faults.
51 */
48static bool ignored_gdt(unsigned int num) 52static bool ignored_gdt(unsigned int num)
49{ 53{
50 return (num == GDT_ENTRY_TSS 54 return (num == GDT_ENTRY_TSS
@@ -53,42 +57,52 @@ static bool ignored_gdt(unsigned int num)
53 || num == GDT_ENTRY_DOUBLEFAULT_TSS); 57 || num == GDT_ENTRY_DOUBLEFAULT_TSS);
54} 58}
55 59
56/*H:630 Once the Guest gave us new GDT entries, we fix them up a little. We 60/*H:630
61 * Once the Guest gave us new GDT entries, we fix them up a little. We
57 * don't care if they're invalid: the worst that can happen is a General 62 * don't care if they're invalid: the worst that can happen is a General
58 * Protection Fault in the Switcher when it restores a Guest segment register 63 * Protection Fault in the Switcher when it restores a Guest segment register
59 * which tries to use that entry. Then we kill the Guest for causing such a 64 * which tries to use that entry. Then we kill the Guest for causing such a
60 * mess: the message will be "unhandled trap 256". */ 65 * mess: the message will be "unhandled trap 256".
66 */
61static void fixup_gdt_table(struct lg_cpu *cpu, unsigned start, unsigned end) 67static void fixup_gdt_table(struct lg_cpu *cpu, unsigned start, unsigned end)
62{ 68{
63 unsigned int i; 69 unsigned int i;
64 70
65 for (i = start; i < end; i++) { 71 for (i = start; i < end; i++) {
66 /* We never copy these ones to real GDT, so we don't care what 72 /*
67 * they say */ 73 * We never copy these ones to real GDT, so we don't care what
74 * they say
75 */
68 if (ignored_gdt(i)) 76 if (ignored_gdt(i))
69 continue; 77 continue;
70 78
71 /* Segment descriptors contain a privilege level: the Guest is 79 /*
80 * Segment descriptors contain a privilege level: the Guest is
72 * sometimes careless and leaves this as 0, even though it's 81 * sometimes careless and leaves this as 0, even though it's
73 * running at privilege level 1. If so, we fix it here. */ 82 * running at privilege level 1. If so, we fix it here.
83 */
74 if ((cpu->arch.gdt[i].b & 0x00006000) == 0) 84 if ((cpu->arch.gdt[i].b & 0x00006000) == 0)
75 cpu->arch.gdt[i].b |= (GUEST_PL << 13); 85 cpu->arch.gdt[i].b |= (GUEST_PL << 13);
76 86
77 /* Each descriptor has an "accessed" bit. If we don't set it 87 /*
88 * Each descriptor has an "accessed" bit. If we don't set it
78 * now, the CPU will try to set it when the Guest first loads 89 * now, the CPU will try to set it when the Guest first loads
79 * that entry into a segment register. But the GDT isn't 90 * that entry into a segment register. But the GDT isn't
80 * writable by the Guest, so bad things can happen. */ 91 * writable by the Guest, so bad things can happen.
92 */
81 cpu->arch.gdt[i].b |= 0x00000100; 93 cpu->arch.gdt[i].b |= 0x00000100;
82 } 94 }
83} 95}
84 96
85/*H:610 Like the IDT, we never simply use the GDT the Guest gives us. We keep 97/*H:610
98 * Like the IDT, we never simply use the GDT the Guest gives us. We keep
86 * a GDT for each CPU, and copy across the Guest's entries each time we want to 99 * a GDT for each CPU, and copy across the Guest's entries each time we want to
87 * run the Guest on that CPU. 100 * run the Guest on that CPU.
88 * 101 *
89 * This routine is called at boot or modprobe time for each CPU to set up the 102 * This routine is called at boot or modprobe time for each CPU to set up the
90 * constant GDT entries: the ones which are the same no matter what Guest we're 103 * constant GDT entries: the ones which are the same no matter what Guest we're
91 * running. */ 104 * running.
105 */
92void setup_default_gdt_entries(struct lguest_ro_state *state) 106void setup_default_gdt_entries(struct lguest_ro_state *state)
93{ 107{
94 struct desc_struct *gdt = state->guest_gdt; 108 struct desc_struct *gdt = state->guest_gdt;
@@ -98,30 +112,37 @@ void setup_default_gdt_entries(struct lguest_ro_state *state)
98 gdt[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT; 112 gdt[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
99 gdt[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT; 113 gdt[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
100 114
101 /* The TSS segment refers to the TSS entry for this particular CPU. 115 /*
116 * The TSS segment refers to the TSS entry for this particular CPU.
102 * Forgive the magic flags: the 0x8900 means the entry is Present, it's 117 * Forgive the magic flags: the 0x8900 means the entry is Present, it's
103 * privilege level 0 Available 386 TSS system segment, and the 0x67 118 * privilege level 0 Available 386 TSS system segment, and the 0x67
104 * means Saturn is eclipsed by Mercury in the twelfth house. */ 119 * means Saturn is eclipsed by Mercury in the twelfth house.
120 */
105 gdt[GDT_ENTRY_TSS].a = 0x00000067 | (tss << 16); 121 gdt[GDT_ENTRY_TSS].a = 0x00000067 | (tss << 16);
106 gdt[GDT_ENTRY_TSS].b = 0x00008900 | (tss & 0xFF000000) 122 gdt[GDT_ENTRY_TSS].b = 0x00008900 | (tss & 0xFF000000)
107 | ((tss >> 16) & 0x000000FF); 123 | ((tss >> 16) & 0x000000FF);
108} 124}
109 125
110/* This routine sets up the initial Guest GDT for booting. All entries start 126/*
111 * as 0 (unusable). */ 127 * This routine sets up the initial Guest GDT for booting. All entries start
128 * as 0 (unusable).
129 */
112void setup_guest_gdt(struct lg_cpu *cpu) 130void setup_guest_gdt(struct lg_cpu *cpu)
113{ 131{
114 /* Start with full 0-4G segments... */ 132 /*
133 * Start with full 0-4G segments...except the Guest is allowed to use
134 * them, so set the privilege level appropriately in the flags.
135 */
115 cpu->arch.gdt[GDT_ENTRY_KERNEL_CS] = FULL_EXEC_SEGMENT; 136 cpu->arch.gdt[GDT_ENTRY_KERNEL_CS] = FULL_EXEC_SEGMENT;
116 cpu->arch.gdt[GDT_ENTRY_KERNEL_DS] = FULL_SEGMENT; 137 cpu->arch.gdt[GDT_ENTRY_KERNEL_DS] = FULL_SEGMENT;
117 /* ...except the Guest is allowed to use them, so set the privilege
118 * level appropriately in the flags. */
119 cpu->arch.gdt[GDT_ENTRY_KERNEL_CS].b |= (GUEST_PL << 13); 138 cpu->arch.gdt[GDT_ENTRY_KERNEL_CS].b |= (GUEST_PL << 13);
120 cpu->arch.gdt[GDT_ENTRY_KERNEL_DS].b |= (GUEST_PL << 13); 139 cpu->arch.gdt[GDT_ENTRY_KERNEL_DS].b |= (GUEST_PL << 13);
121} 140}
122 141
123/*H:650 An optimization of copy_gdt(), for just the three "thead-local storage" 142/*H:650
124 * entries. */ 143 * An optimization of copy_gdt(), for just the three "thead-local storage"
144 * entries.
145 */
125void copy_gdt_tls(const struct lg_cpu *cpu, struct desc_struct *gdt) 146void copy_gdt_tls(const struct lg_cpu *cpu, struct desc_struct *gdt)
126{ 147{
127 unsigned int i; 148 unsigned int i;
@@ -130,26 +151,34 @@ void copy_gdt_tls(const struct lg_cpu *cpu, struct desc_struct *gdt)
130 gdt[i] = cpu->arch.gdt[i]; 151 gdt[i] = cpu->arch.gdt[i];
131} 152}
132 153
133/*H:640 When the Guest is run on a different CPU, or the GDT entries have 154/*H:640
134 * changed, copy_gdt() is called to copy the Guest's GDT entries across to this 155 * When the Guest is run on a different CPU, or the GDT entries have changed,
135 * CPU's GDT. */ 156 * copy_gdt() is called to copy the Guest's GDT entries across to this CPU's
157 * GDT.
158 */
136void copy_gdt(const struct lg_cpu *cpu, struct desc_struct *gdt) 159void copy_gdt(const struct lg_cpu *cpu, struct desc_struct *gdt)
137{ 160{
138 unsigned int i; 161 unsigned int i;
139 162
140 /* The default entries from setup_default_gdt_entries() are not 163 /*
141 * replaced. See ignored_gdt() above. */ 164 * The default entries from setup_default_gdt_entries() are not
165 * replaced. See ignored_gdt() above.
166 */
142 for (i = 0; i < GDT_ENTRIES; i++) 167 for (i = 0; i < GDT_ENTRIES; i++)
143 if (!ignored_gdt(i)) 168 if (!ignored_gdt(i))
144 gdt[i] = cpu->arch.gdt[i]; 169 gdt[i] = cpu->arch.gdt[i];
145} 170}
146 171
147/*H:620 This is where the Guest asks us to load a new GDT entry 172/*H:620
148 * (LHCALL_LOAD_GDT_ENTRY). We tweak the entry and copy it in. */ 173 * This is where the Guest asks us to load a new GDT entry
174 * (LHCALL_LOAD_GDT_ENTRY). We tweak the entry and copy it in.
175 */
149void load_guest_gdt_entry(struct lg_cpu *cpu, u32 num, u32 lo, u32 hi) 176void load_guest_gdt_entry(struct lg_cpu *cpu, u32 num, u32 lo, u32 hi)
150{ 177{
151 /* We assume the Guest has the same number of GDT entries as the 178 /*
152 * Host, otherwise we'd have to dynamically allocate the Guest GDT. */ 179 * We assume the Guest has the same number of GDT entries as the
180 * Host, otherwise we'd have to dynamically allocate the Guest GDT.
181 */
153 if (num >= ARRAY_SIZE(cpu->arch.gdt)) 182 if (num >= ARRAY_SIZE(cpu->arch.gdt))
154 kill_guest(cpu, "too many gdt entries %i", num); 183 kill_guest(cpu, "too many gdt entries %i", num);
155 184
@@ -157,15 +186,19 @@ void load_guest_gdt_entry(struct lg_cpu *cpu, u32 num, u32 lo, u32 hi)
157 cpu->arch.gdt[num].a = lo; 186 cpu->arch.gdt[num].a = lo;
158 cpu->arch.gdt[num].b = hi; 187 cpu->arch.gdt[num].b = hi;
159 fixup_gdt_table(cpu, num, num+1); 188 fixup_gdt_table(cpu, num, num+1);
160 /* Mark that the GDT changed so the core knows it has to copy it again, 189 /*
161 * even if the Guest is run on the same CPU. */ 190 * Mark that the GDT changed so the core knows it has to copy it again,
191 * even if the Guest is run on the same CPU.
192 */
162 cpu->changed |= CHANGED_GDT; 193 cpu->changed |= CHANGED_GDT;
163} 194}
164 195
165/* This is the fast-track version for just changing the three TLS entries. 196/*
197 * This is the fast-track version for just changing the three TLS entries.
166 * Remember that this happens on every context switch, so it's worth 198 * Remember that this happens on every context switch, so it's worth
167 * optimizing. But wouldn't it be neater to have a single hypercall to cover 199 * optimizing. But wouldn't it be neater to have a single hypercall to cover
168 * both cases? */ 200 * both cases?
201 */
169void guest_load_tls(struct lg_cpu *cpu, unsigned long gtls) 202void guest_load_tls(struct lg_cpu *cpu, unsigned long gtls)
170{ 203{
171 struct desc_struct *tls = &cpu->arch.gdt[GDT_ENTRY_TLS_MIN]; 204 struct desc_struct *tls = &cpu->arch.gdt[GDT_ENTRY_TLS_MIN];
@@ -175,7 +208,6 @@ void guest_load_tls(struct lg_cpu *cpu, unsigned long gtls)
175 /* Note that just the TLS entries have changed. */ 208 /* Note that just the TLS entries have changed. */
176 cpu->changed |= CHANGED_GDT_TLS; 209 cpu->changed |= CHANGED_GDT_TLS;
177} 210}
178/*:*/
179 211
180/*H:660 212/*H:660
181 * With this, we have finished the Host. 213 * With this, we have finished the Host.
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c
index eaf722fe309a..6ae388849a3b 100644
--- a/drivers/lguest/x86/core.c
+++ b/drivers/lguest/x86/core.c
@@ -17,13 +17,15 @@
17 * along with this program; if not, write to the Free Software 17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */ 19 */
20/*P:450 This file contains the x86-specific lguest code. It used to be all 20/*P:450
21 * This file contains the x86-specific lguest code. It used to be all
21 * mixed in with drivers/lguest/core.c but several foolhardy code slashers 22 * mixed in with drivers/lguest/core.c but several foolhardy code slashers
22 * wrestled most of the dependencies out to here in preparation for porting 23 * wrestled most of the dependencies out to here in preparation for porting
23 * lguest to other architectures (see what I mean by foolhardy?). 24 * lguest to other architectures (see what I mean by foolhardy?).
24 * 25 *
25 * This also contains a couple of non-obvious setup and teardown pieces which 26 * This also contains a couple of non-obvious setup and teardown pieces which
26 * were implemented after days of debugging pain. :*/ 27 * were implemented after days of debugging pain.
28:*/
27#include <linux/kernel.h> 29#include <linux/kernel.h>
28#include <linux/start_kernel.h> 30#include <linux/start_kernel.h>
29#include <linux/string.h> 31#include <linux/string.h>
@@ -82,25 +84,33 @@ static DEFINE_PER_CPU(struct lg_cpu *, last_cpu);
82 */ 84 */
83static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages) 85static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
84{ 86{
85 /* Copying all this data can be quite expensive. We usually run the 87 /*
88 * Copying all this data can be quite expensive. We usually run the
86 * same Guest we ran last time (and that Guest hasn't run anywhere else 89 * same Guest we ran last time (and that Guest hasn't run anywhere else
87 * meanwhile). If that's not the case, we pretend everything in the 90 * meanwhile). If that's not the case, we pretend everything in the
88 * Guest has changed. */ 91 * Guest has changed.
92 */
89 if (__get_cpu_var(last_cpu) != cpu || cpu->last_pages != pages) { 93 if (__get_cpu_var(last_cpu) != cpu || cpu->last_pages != pages) {
90 __get_cpu_var(last_cpu) = cpu; 94 __get_cpu_var(last_cpu) = cpu;
91 cpu->last_pages = pages; 95 cpu->last_pages = pages;
92 cpu->changed = CHANGED_ALL; 96 cpu->changed = CHANGED_ALL;
93 } 97 }
94 98
95 /* These copies are pretty cheap, so we do them unconditionally: */ 99 /*
96 /* Save the current Host top-level page directory. */ 100 * These copies are pretty cheap, so we do them unconditionally: */
101 /* Save the current Host top-level page directory.
102 */
97 pages->state.host_cr3 = __pa(current->mm->pgd); 103 pages->state.host_cr3 = __pa(current->mm->pgd);
98 /* Set up the Guest's page tables to see this CPU's pages (and no 104 /*
99 * other CPU's pages). */ 105 * Set up the Guest's page tables to see this CPU's pages (and no
106 * other CPU's pages).
107 */
100 map_switcher_in_guest(cpu, pages); 108 map_switcher_in_guest(cpu, pages);
101 /* Set up the two "TSS" members which tell the CPU what stack to use 109 /*
110 * Set up the two "TSS" members which tell the CPU what stack to use
102 * for traps which do directly into the Guest (ie. traps at privilege 111 * for traps which do directly into the Guest (ie. traps at privilege
103 * level 1). */ 112 * level 1).
113 */
104 pages->state.guest_tss.sp1 = cpu->esp1; 114 pages->state.guest_tss.sp1 = cpu->esp1;
105 pages->state.guest_tss.ss1 = cpu->ss1; 115 pages->state.guest_tss.ss1 = cpu->ss1;
106 116
@@ -125,97 +135,126 @@ static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
125 /* This is a dummy value we need for GCC's sake. */ 135 /* This is a dummy value we need for GCC's sake. */
126 unsigned int clobber; 136 unsigned int clobber;
127 137
128 /* Copy the guest-specific information into this CPU's "struct 138 /*
129 * lguest_pages". */ 139 * Copy the guest-specific information into this CPU's "struct
140 * lguest_pages".
141 */
130 copy_in_guest_info(cpu, pages); 142 copy_in_guest_info(cpu, pages);
131 143
132 /* Set the trap number to 256 (impossible value). If we fault while 144 /*
145 * Set the trap number to 256 (impossible value). If we fault while
133 * switching to the Guest (bad segment registers or bug), this will 146 * switching to the Guest (bad segment registers or bug), this will
134 * cause us to abort the Guest. */ 147 * cause us to abort the Guest.
148 */
135 cpu->regs->trapnum = 256; 149 cpu->regs->trapnum = 256;
136 150
137 /* Now: we push the "eflags" register on the stack, then do an "lcall". 151 /*
152 * Now: we push the "eflags" register on the stack, then do an "lcall".
138 * This is how we change from using the kernel code segment to using 153 * This is how we change from using the kernel code segment to using
139 * the dedicated lguest code segment, as well as jumping into the 154 * the dedicated lguest code segment, as well as jumping into the
140 * Switcher. 155 * Switcher.
141 * 156 *
142 * The lcall also pushes the old code segment (KERNEL_CS) onto the 157 * The lcall also pushes the old code segment (KERNEL_CS) onto the
143 * stack, then the address of this call. This stack layout happens to 158 * stack, then the address of this call. This stack layout happens to
144 * exactly match the stack layout created by an interrupt... */ 159 * exactly match the stack layout created by an interrupt...
160 */
145 asm volatile("pushf; lcall *lguest_entry" 161 asm volatile("pushf; lcall *lguest_entry"
146 /* This is how we tell GCC that %eax ("a") and %ebx ("b") 162 /*
147 * are changed by this routine. The "=" means output. */ 163 * This is how we tell GCC that %eax ("a") and %ebx ("b")
164 * are changed by this routine. The "=" means output.
165 */
148 : "=a"(clobber), "=b"(clobber) 166 : "=a"(clobber), "=b"(clobber)
149 /* %eax contains the pages pointer. ("0" refers to the 167 /*
168 * %eax contains the pages pointer. ("0" refers to the
150 * 0-th argument above, ie "a"). %ebx contains the 169 * 0-th argument above, ie "a"). %ebx contains the
151 * physical address of the Guest's top-level page 170 * physical address of the Guest's top-level page
152 * directory. */ 171 * directory.
172 */
153 : "0"(pages), "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir)) 173 : "0"(pages), "1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir))
154 /* We tell gcc that all these registers could change, 174 /*
175 * We tell gcc that all these registers could change,
155 * which means we don't have to save and restore them in 176 * which means we don't have to save and restore them in
156 * the Switcher. */ 177 * the Switcher.
178 */
157 : "memory", "%edx", "%ecx", "%edi", "%esi"); 179 : "memory", "%edx", "%ecx", "%edi", "%esi");
158} 180}
159/*:*/ 181/*:*/
160 182
161/*M:002 There are hooks in the scheduler which we can register to tell when we 183/*M:002
184 * There are hooks in the scheduler which we can register to tell when we
162 * get kicked off the CPU (preempt_notifier_register()). This would allow us 185 * get kicked off the CPU (preempt_notifier_register()). This would allow us
163 * to lazily disable SYSENTER which would regain some performance, and should 186 * to lazily disable SYSENTER which would regain some performance, and should
164 * also simplify copy_in_guest_info(). Note that we'd still need to restore 187 * also simplify copy_in_guest_info(). Note that we'd still need to restore
165 * things when we exit to Launcher userspace, but that's fairly easy. 188 * things when we exit to Launcher userspace, but that's fairly easy.
166 * 189 *
167 * We could also try using this hooks for PGE, but that might be too expensive. 190 * We could also try using these hooks for PGE, but that might be too expensive.
168 * 191 *
169 * The hooks were designed for KVM, but we can also put them to good use. :*/ 192 * The hooks were designed for KVM, but we can also put them to good use.
193:*/
170 194
171/*H:040 This is the i386-specific code to setup and run the Guest. Interrupts 195/*H:040
172 * are disabled: we own the CPU. */ 196 * This is the i386-specific code to setup and run the Guest. Interrupts
197 * are disabled: we own the CPU.
198 */
173void lguest_arch_run_guest(struct lg_cpu *cpu) 199void lguest_arch_run_guest(struct lg_cpu *cpu)
174{ 200{
175 /* Remember the awfully-named TS bit? If the Guest has asked to set it 201 /*
202 * Remember the awfully-named TS bit? If the Guest has asked to set it
176 * we set it now, so we can trap and pass that trap to the Guest if it 203 * we set it now, so we can trap and pass that trap to the Guest if it
177 * uses the FPU. */ 204 * uses the FPU.
205 */
178 if (cpu->ts) 206 if (cpu->ts)
179 unlazy_fpu(current); 207 unlazy_fpu(current);
180 208
181 /* SYSENTER is an optimized way of doing system calls. We can't allow 209 /*
210 * SYSENTER is an optimized way of doing system calls. We can't allow
182 * it because it always jumps to privilege level 0. A normal Guest 211 * it because it always jumps to privilege level 0. A normal Guest
183 * won't try it because we don't advertise it in CPUID, but a malicious 212 * won't try it because we don't advertise it in CPUID, but a malicious
184 * Guest (or malicious Guest userspace program) could, so we tell the 213 * Guest (or malicious Guest userspace program) could, so we tell the
185 * CPU to disable it before running the Guest. */ 214 * CPU to disable it before running the Guest.
215 */
186 if (boot_cpu_has(X86_FEATURE_SEP)) 216 if (boot_cpu_has(X86_FEATURE_SEP))
187 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0); 217 wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
188 218
189 /* Now we actually run the Guest. It will return when something 219 /*
220 * Now we actually run the Guest. It will return when something
190 * interesting happens, and we can examine its registers to see what it 221 * interesting happens, and we can examine its registers to see what it
191 * was doing. */ 222 * was doing.
223 */
192 run_guest_once(cpu, lguest_pages(raw_smp_processor_id())); 224 run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
193 225
194 /* Note that the "regs" structure contains two extra entries which are 226 /*
227 * Note that the "regs" structure contains two extra entries which are
195 * not really registers: a trap number which says what interrupt or 228 * not really registers: a trap number which says what interrupt or
196 * trap made the switcher code come back, and an error code which some 229 * trap made the switcher code come back, and an error code which some
197 * traps set. */ 230 * traps set.
231 */
198 232
199 /* Restore SYSENTER if it's supposed to be on. */ 233 /* Restore SYSENTER if it's supposed to be on. */
200 if (boot_cpu_has(X86_FEATURE_SEP)) 234 if (boot_cpu_has(X86_FEATURE_SEP))
201 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0); 235 wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
202 236
203 /* If the Guest page faulted, then the cr2 register will tell us the 237 /*
238 * If the Guest page faulted, then the cr2 register will tell us the
204 * bad virtual address. We have to grab this now, because once we 239 * bad virtual address. We have to grab this now, because once we
205 * re-enable interrupts an interrupt could fault and thus overwrite 240 * re-enable interrupts an interrupt could fault and thus overwrite
206 * cr2, or we could even move off to a different CPU. */ 241 * cr2, or we could even move off to a different CPU.
242 */
207 if (cpu->regs->trapnum == 14) 243 if (cpu->regs->trapnum == 14)
208 cpu->arch.last_pagefault = read_cr2(); 244 cpu->arch.last_pagefault = read_cr2();
209 /* Similarly, if we took a trap because the Guest used the FPU, 245 /*
246 * Similarly, if we took a trap because the Guest used the FPU,
210 * we have to restore the FPU it expects to see. 247 * we have to restore the FPU it expects to see.
211 * math_state_restore() may sleep and we may even move off to 248 * math_state_restore() may sleep and we may even move off to
212 * a different CPU. So all the critical stuff should be done 249 * a different CPU. So all the critical stuff should be done
213 * before this. */ 250 * before this.
251 */
214 else if (cpu->regs->trapnum == 7) 252 else if (cpu->regs->trapnum == 7)
215 math_state_restore(); 253 math_state_restore();
216} 254}
217 255
218/*H:130 Now we've examined the hypercall code; our Guest can make requests. 256/*H:130
257 * Now we've examined the hypercall code; our Guest can make requests.
219 * Our Guest is usually so well behaved; it never tries to do things it isn't 258 * Our Guest is usually so well behaved; it never tries to do things it isn't
220 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual 259 * allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
221 * infrastructure isn't quite complete, because it doesn't contain replacements 260 * infrastructure isn't quite complete, because it doesn't contain replacements
@@ -225,26 +264,33 @@ void lguest_arch_run_guest(struct lg_cpu *cpu)
225 * 264 *
226 * When the Guest uses one of these instructions, we get a trap (General 265 * When the Guest uses one of these instructions, we get a trap (General
227 * Protection Fault) and come here. We see if it's one of those troublesome 266 * Protection Fault) and come here. We see if it's one of those troublesome
228 * instructions and skip over it. We return true if we did. */ 267 * instructions and skip over it. We return true if we did.
268 */
229static int emulate_insn(struct lg_cpu *cpu) 269static int emulate_insn(struct lg_cpu *cpu)
230{ 270{
231 u8 insn; 271 u8 insn;
232 unsigned int insnlen = 0, in = 0, shift = 0; 272 unsigned int insnlen = 0, in = 0, shift = 0;
233 /* The eip contains the *virtual* address of the Guest's instruction: 273 /*
234 * guest_pa just subtracts the Guest's page_offset. */ 274 * The eip contains the *virtual* address of the Guest's instruction:
275 * guest_pa just subtracts the Guest's page_offset.
276 */
235 unsigned long physaddr = guest_pa(cpu, cpu->regs->eip); 277 unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
236 278
237 /* This must be the Guest kernel trying to do something, not userspace! 279 /*
280 * This must be the Guest kernel trying to do something, not userspace!
238 * The bottom two bits of the CS segment register are the privilege 281 * The bottom two bits of the CS segment register are the privilege
239 * level. */ 282 * level.
283 */
240 if ((cpu->regs->cs & 3) != GUEST_PL) 284 if ((cpu->regs->cs & 3) != GUEST_PL)
241 return 0; 285 return 0;
242 286
243 /* Decoding x86 instructions is icky. */ 287 /* Decoding x86 instructions is icky. */
244 insn = lgread(cpu, physaddr, u8); 288 insn = lgread(cpu, physaddr, u8);
245 289
246 /* 0x66 is an "operand prefix". It means it's using the upper 16 bits 290 /*
247 of the eax register. */ 291 * 0x66 is an "operand prefix". It means it's using the upper 16 bits
292 * of the eax register.
293 */
248 if (insn == 0x66) { 294 if (insn == 0x66) {
249 shift = 16; 295 shift = 16;
250 /* The instruction is 1 byte so far, read the next byte. */ 296 /* The instruction is 1 byte so far, read the next byte. */
@@ -252,8 +298,10 @@ static int emulate_insn(struct lg_cpu *cpu)
252 insn = lgread(cpu, physaddr + insnlen, u8); 298 insn = lgread(cpu, physaddr + insnlen, u8);
253 } 299 }
254 300
255 /* We can ignore the lower bit for the moment and decode the 4 opcodes 301 /*
256 * we need to emulate. */ 302 * We can ignore the lower bit for the moment and decode the 4 opcodes
303 * we need to emulate.
304 */
257 switch (insn & 0xFE) { 305 switch (insn & 0xFE) {
258 case 0xE4: /* in <next byte>,%al */ 306 case 0xE4: /* in <next byte>,%al */
259 insnlen += 2; 307 insnlen += 2;
@@ -274,9 +322,11 @@ static int emulate_insn(struct lg_cpu *cpu)
274 return 0; 322 return 0;
275 } 323 }
276 324
277 /* If it was an "IN" instruction, they expect the result to be read 325 /*
326 * If it was an "IN" instruction, they expect the result to be read
278 * into %eax, so we change %eax. We always return all-ones, which 327 * into %eax, so we change %eax. We always return all-ones, which
279 * traditionally means "there's nothing there". */ 328 * traditionally means "there's nothing there".
329 */
280 if (in) { 330 if (in) {
281 /* Lower bit tells is whether it's a 16 or 32 bit access */ 331 /* Lower bit tells is whether it's a 16 or 32 bit access */
282 if (insn & 0x1) 332 if (insn & 0x1)
@@ -290,7 +340,8 @@ static int emulate_insn(struct lg_cpu *cpu)
290 return 1; 340 return 1;
291} 341}
292 342
293/* Our hypercalls mechanism used to be based on direct software interrupts. 343/*
344 * Our hypercalls mechanism used to be based on direct software interrupts.
294 * After Anthony's "Refactor hypercall infrastructure" kvm patch, we decided to 345 * After Anthony's "Refactor hypercall infrastructure" kvm patch, we decided to
295 * change over to using kvm hypercalls. 346 * change over to using kvm hypercalls.
296 * 347 *
@@ -318,16 +369,20 @@ static int emulate_insn(struct lg_cpu *cpu)
318 */ 369 */
319static void rewrite_hypercall(struct lg_cpu *cpu) 370static void rewrite_hypercall(struct lg_cpu *cpu)
320{ 371{
321 /* This are the opcodes we use to patch the Guest. The opcode for "int 372 /*
373 * This are the opcodes we use to patch the Guest. The opcode for "int
322 * $0x1f" is "0xcd 0x1f" but vmcall instruction is 3 bytes long, so we 374 * $0x1f" is "0xcd 0x1f" but vmcall instruction is 3 bytes long, so we
323 * complete the sequence with a NOP (0x90). */ 375 * complete the sequence with a NOP (0x90).
376 */
324 u8 insn[3] = {0xcd, 0x1f, 0x90}; 377 u8 insn[3] = {0xcd, 0x1f, 0x90};
325 378
326 __lgwrite(cpu, guest_pa(cpu, cpu->regs->eip), insn, sizeof(insn)); 379 __lgwrite(cpu, guest_pa(cpu, cpu->regs->eip), insn, sizeof(insn));
327 /* The above write might have caused a copy of that page to be made 380 /*
381 * The above write might have caused a copy of that page to be made
328 * (if it was read-only). We need to make sure the Guest has 382 * (if it was read-only). We need to make sure the Guest has
329 * up-to-date pagetables. As this doesn't happen often, we can just 383 * up-to-date pagetables. As this doesn't happen often, we can just
330 * drop them all. */ 384 * drop them all.
385 */
331 guest_pagetable_clear_all(cpu); 386 guest_pagetable_clear_all(cpu);
332} 387}
333 388
@@ -335,9 +390,11 @@ static bool is_hypercall(struct lg_cpu *cpu)
335{ 390{
336 u8 insn[3]; 391 u8 insn[3];
337 392
338 /* This must be the Guest kernel trying to do something. 393 /*
394 * This must be the Guest kernel trying to do something.
339 * The bottom two bits of the CS segment register are the privilege 395 * The bottom two bits of the CS segment register are the privilege
340 * level. */ 396 * level.
397 */
341 if ((cpu->regs->cs & 3) != GUEST_PL) 398 if ((cpu->regs->cs & 3) != GUEST_PL)
342 return false; 399 return false;
343 400
@@ -351,86 +408,105 @@ void lguest_arch_handle_trap(struct lg_cpu *cpu)
351{ 408{
352 switch (cpu->regs->trapnum) { 409 switch (cpu->regs->trapnum) {
353 case 13: /* We've intercepted a General Protection Fault. */ 410 case 13: /* We've intercepted a General Protection Fault. */
354 /* Check if this was one of those annoying IN or OUT 411 /*
412 * Check if this was one of those annoying IN or OUT
355 * instructions which we need to emulate. If so, we just go 413 * instructions which we need to emulate. If so, we just go
356 * back into the Guest after we've done it. */ 414 * back into the Guest after we've done it.
415 */
357 if (cpu->regs->errcode == 0) { 416 if (cpu->regs->errcode == 0) {
358 if (emulate_insn(cpu)) 417 if (emulate_insn(cpu))
359 return; 418 return;
360 } 419 }
361 /* If KVM is active, the vmcall instruction triggers a 420 /*
362 * General Protection Fault. Normally it triggers an 421 * If KVM is active, the vmcall instruction triggers a General
363 * invalid opcode fault (6): */ 422 * Protection Fault. Normally it triggers an invalid opcode
423 * fault (6):
424 */
364 case 6: 425 case 6:
365 /* We need to check if ring == GUEST_PL and 426 /*
366 * faulting instruction == vmcall. */ 427 * We need to check if ring == GUEST_PL and faulting
428 * instruction == vmcall.
429 */
367 if (is_hypercall(cpu)) { 430 if (is_hypercall(cpu)) {
368 rewrite_hypercall(cpu); 431 rewrite_hypercall(cpu);
369 return; 432 return;
370 } 433 }
371 break; 434 break;
372 case 14: /* We've intercepted a Page Fault. */ 435 case 14: /* We've intercepted a Page Fault. */
373 /* The Guest accessed a virtual address that wasn't mapped. 436 /*
437 * The Guest accessed a virtual address that wasn't mapped.
374 * This happens a lot: we don't actually set up most of the page 438 * This happens a lot: we don't actually set up most of the page
375 * tables for the Guest at all when we start: as it runs it asks 439 * tables for the Guest at all when we start: as it runs it asks
376 * for more and more, and we set them up as required. In this 440 * for more and more, and we set them up as required. In this
377 * case, we don't even tell the Guest that the fault happened. 441 * case, we don't even tell the Guest that the fault happened.
378 * 442 *
379 * The errcode tells whether this was a read or a write, and 443 * The errcode tells whether this was a read or a write, and
380 * whether kernel or userspace code. */ 444 * whether kernel or userspace code.
445 */
381 if (demand_page(cpu, cpu->arch.last_pagefault, 446 if (demand_page(cpu, cpu->arch.last_pagefault,
382 cpu->regs->errcode)) 447 cpu->regs->errcode))
383 return; 448 return;
384 449
385 /* OK, it's really not there (or not OK): the Guest needs to 450 /*
451 * OK, it's really not there (or not OK): the Guest needs to
386 * know. We write out the cr2 value so it knows where the 452 * know. We write out the cr2 value so it knows where the
387 * fault occurred. 453 * fault occurred.
388 * 454 *
389 * Note that if the Guest were really messed up, this could 455 * Note that if the Guest were really messed up, this could
390 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so 456 * happen before it's done the LHCALL_LGUEST_INIT hypercall, so
391 * lg->lguest_data could be NULL */ 457 * lg->lguest_data could be NULL
458 */
392 if (cpu->lg->lguest_data && 459 if (cpu->lg->lguest_data &&
393 put_user(cpu->arch.last_pagefault, 460 put_user(cpu->arch.last_pagefault,
394 &cpu->lg->lguest_data->cr2)) 461 &cpu->lg->lguest_data->cr2))
395 kill_guest(cpu, "Writing cr2"); 462 kill_guest(cpu, "Writing cr2");
396 break; 463 break;
397 case 7: /* We've intercepted a Device Not Available fault. */ 464 case 7: /* We've intercepted a Device Not Available fault. */
398 /* If the Guest doesn't want to know, we already restored the 465 /*
399 * Floating Point Unit, so we just continue without telling 466 * If the Guest doesn't want to know, we already restored the
400 * it. */ 467 * Floating Point Unit, so we just continue without telling it.
468 */
401 if (!cpu->ts) 469 if (!cpu->ts)
402 return; 470 return;
403 break; 471 break;
404 case 32 ... 255: 472 case 32 ... 255:
405 /* These values mean a real interrupt occurred, in which case 473 /*
474 * These values mean a real interrupt occurred, in which case
406 * the Host handler has already been run. We just do a 475 * the Host handler has already been run. We just do a
407 * friendly check if another process should now be run, then 476 * friendly check if another process should now be run, then
408 * return to run the Guest again */ 477 * return to run the Guest again
478 */
409 cond_resched(); 479 cond_resched();
410 return; 480 return;
411 case LGUEST_TRAP_ENTRY: 481 case LGUEST_TRAP_ENTRY:
412 /* Our 'struct hcall_args' maps directly over our regs: we set 482 /*
413 * up the pointer now to indicate a hypercall is pending. */ 483 * Our 'struct hcall_args' maps directly over our regs: we set
484 * up the pointer now to indicate a hypercall is pending.
485 */
414 cpu->hcall = (struct hcall_args *)cpu->regs; 486 cpu->hcall = (struct hcall_args *)cpu->regs;
415 return; 487 return;
416 } 488 }
417 489
418 /* We didn't handle the trap, so it needs to go to the Guest. */ 490 /* We didn't handle the trap, so it needs to go to the Guest. */
419 if (!deliver_trap(cpu, cpu->regs->trapnum)) 491 if (!deliver_trap(cpu, cpu->regs->trapnum))
420 /* If the Guest doesn't have a handler (either it hasn't 492 /*
493 * If the Guest doesn't have a handler (either it hasn't
421 * registered any yet, or it's one of the faults we don't let 494 * registered any yet, or it's one of the faults we don't let
422 * it handle), it dies with this cryptic error message. */ 495 * it handle), it dies with this cryptic error message.
496 */
423 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)", 497 kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
424 cpu->regs->trapnum, cpu->regs->eip, 498 cpu->regs->trapnum, cpu->regs->eip,
425 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault 499 cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
426 : cpu->regs->errcode); 500 : cpu->regs->errcode);
427} 501}
428 502
429/* Now we can look at each of the routines this calls, in increasing order of 503/*
504 * Now we can look at each of the routines this calls, in increasing order of
430 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(), 505 * complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
431 * deliver_trap() and demand_page(). After all those, we'll be ready to 506 * deliver_trap() and demand_page(). After all those, we'll be ready to
432 * examine the Switcher, and our philosophical understanding of the Host/Guest 507 * examine the Switcher, and our philosophical understanding of the Host/Guest
433 * duality will be complete. :*/ 508 * duality will be complete.
509:*/
434static void adjust_pge(void *on) 510static void adjust_pge(void *on)
435{ 511{
436 if (on) 512 if (on)
@@ -439,13 +515,16 @@ static void adjust_pge(void *on)
439 write_cr4(read_cr4() & ~X86_CR4_PGE); 515 write_cr4(read_cr4() & ~X86_CR4_PGE);
440} 516}
441 517
442/*H:020 Now the Switcher is mapped and every thing else is ready, we need to do 518/*H:020
443 * some more i386-specific initialization. */ 519 * Now the Switcher is mapped and every thing else is ready, we need to do
520 * some more i386-specific initialization.
521 */
444void __init lguest_arch_host_init(void) 522void __init lguest_arch_host_init(void)
445{ 523{
446 int i; 524 int i;
447 525
448 /* Most of the i386/switcher.S doesn't care that it's been moved; on 526 /*
527 * Most of the i386/switcher.S doesn't care that it's been moved; on
449 * Intel, jumps are relative, and it doesn't access any references to 528 * Intel, jumps are relative, and it doesn't access any references to
450 * external code or data. 529 * external code or data.
451 * 530 *
@@ -453,7 +532,8 @@ void __init lguest_arch_host_init(void)
453 * addresses are placed in a table (default_idt_entries), so we need to 532 * addresses are placed in a table (default_idt_entries), so we need to
454 * update the table with the new addresses. switcher_offset() is a 533 * update the table with the new addresses. switcher_offset() is a
455 * convenience function which returns the distance between the 534 * convenience function which returns the distance between the
456 * compiled-in switcher code and the high-mapped copy we just made. */ 535 * compiled-in switcher code and the high-mapped copy we just made.
536 */
457 for (i = 0; i < IDT_ENTRIES; i++) 537 for (i = 0; i < IDT_ENTRIES; i++)
458 default_idt_entries[i] += switcher_offset(); 538 default_idt_entries[i] += switcher_offset();
459 539
@@ -468,63 +548,81 @@ void __init lguest_arch_host_init(void)
468 for_each_possible_cpu(i) { 548 for_each_possible_cpu(i) {
469 /* lguest_pages() returns this CPU's two pages. */ 549 /* lguest_pages() returns this CPU's two pages. */
470 struct lguest_pages *pages = lguest_pages(i); 550 struct lguest_pages *pages = lguest_pages(i);
471 /* This is a convenience pointer to make the code fit one 551 /* This is a convenience pointer to make the code neater. */
472 * statement to a line. */
473 struct lguest_ro_state *state = &pages->state; 552 struct lguest_ro_state *state = &pages->state;
474 553
475 /* The Global Descriptor Table: the Host has a different one 554 /*
555 * The Global Descriptor Table: the Host has a different one
476 * for each CPU. We keep a descriptor for the GDT which says 556 * for each CPU. We keep a descriptor for the GDT which says
477 * where it is and how big it is (the size is actually the last 557 * where it is and how big it is (the size is actually the last
478 * byte, not the size, hence the "-1"). */ 558 * byte, not the size, hence the "-1").
559 */
479 state->host_gdt_desc.size = GDT_SIZE-1; 560 state->host_gdt_desc.size = GDT_SIZE-1;
480 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i); 561 state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
481 562
482 /* All CPUs on the Host use the same Interrupt Descriptor 563 /*
564 * All CPUs on the Host use the same Interrupt Descriptor
483 * Table, so we just use store_idt(), which gets this CPU's IDT 565 * Table, so we just use store_idt(), which gets this CPU's IDT
484 * descriptor. */ 566 * descriptor.
567 */
485 store_idt(&state->host_idt_desc); 568 store_idt(&state->host_idt_desc);
486 569
487 /* The descriptors for the Guest's GDT and IDT can be filled 570 /*
571 * The descriptors for the Guest's GDT and IDT can be filled
488 * out now, too. We copy the GDT & IDT into ->guest_gdt and 572 * out now, too. We copy the GDT & IDT into ->guest_gdt and
489 * ->guest_idt before actually running the Guest. */ 573 * ->guest_idt before actually running the Guest.
574 */
490 state->guest_idt_desc.size = sizeof(state->guest_idt)-1; 575 state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
491 state->guest_idt_desc.address = (long)&state->guest_idt; 576 state->guest_idt_desc.address = (long)&state->guest_idt;
492 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1; 577 state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
493 state->guest_gdt_desc.address = (long)&state->guest_gdt; 578 state->guest_gdt_desc.address = (long)&state->guest_gdt;
494 579
495 /* We know where we want the stack to be when the Guest enters 580 /*
581 * We know where we want the stack to be when the Guest enters
496 * the Switcher: in pages->regs. The stack grows upwards, so 582 * the Switcher: in pages->regs. The stack grows upwards, so
497 * we start it at the end of that structure. */ 583 * we start it at the end of that structure.
584 */
498 state->guest_tss.sp0 = (long)(&pages->regs + 1); 585 state->guest_tss.sp0 = (long)(&pages->regs + 1);
499 /* And this is the GDT entry to use for the stack: we keep a 586 /*
500 * couple of special LGUEST entries. */ 587 * And this is the GDT entry to use for the stack: we keep a
588 * couple of special LGUEST entries.
589 */
501 state->guest_tss.ss0 = LGUEST_DS; 590 state->guest_tss.ss0 = LGUEST_DS;
502 591
503 /* x86 can have a finegrained bitmap which indicates what I/O 592 /*
593 * x86 can have a finegrained bitmap which indicates what I/O
504 * ports the process can use. We set it to the end of our 594 * ports the process can use. We set it to the end of our
505 * structure, meaning "none". */ 595 * structure, meaning "none".
596 */
506 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss); 597 state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
507 598
508 /* Some GDT entries are the same across all Guests, so we can 599 /*
509 * set them up now. */ 600 * Some GDT entries are the same across all Guests, so we can
601 * set them up now.
602 */
510 setup_default_gdt_entries(state); 603 setup_default_gdt_entries(state);
511 /* Most IDT entries are the same for all Guests, too.*/ 604 /* Most IDT entries are the same for all Guests, too.*/
512 setup_default_idt_entries(state, default_idt_entries); 605 setup_default_idt_entries(state, default_idt_entries);
513 606
514 /* The Host needs to be able to use the LGUEST segments on this 607 /*
515 * CPU, too, so put them in the Host GDT. */ 608 * The Host needs to be able to use the LGUEST segments on this
609 * CPU, too, so put them in the Host GDT.
610 */
516 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT; 611 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
517 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT; 612 get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
518 } 613 }
519 614
520 /* In the Switcher, we want the %cs segment register to use the 615 /*
616 * In the Switcher, we want the %cs segment register to use the
521 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so 617 * LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
522 * it will be undisturbed when we switch. To change %cs and jump we 618 * it will be undisturbed when we switch. To change %cs and jump we
523 * need this structure to feed to Intel's "lcall" instruction. */ 619 * need this structure to feed to Intel's "lcall" instruction.
620 */
524 lguest_entry.offset = (long)switch_to_guest + switcher_offset(); 621 lguest_entry.offset = (long)switch_to_guest + switcher_offset();
525 lguest_entry.segment = LGUEST_CS; 622 lguest_entry.segment = LGUEST_CS;
526 623
527 /* Finally, we need to turn off "Page Global Enable". PGE is an 624 /*
625 * Finally, we need to turn off "Page Global Enable". PGE is an
528 * optimization where page table entries are specially marked to show 626 * optimization where page table entries are specially marked to show
529 * they never change. The Host kernel marks all the kernel pages this 627 * they never change. The Host kernel marks all the kernel pages this
530 * way because it's always present, even when userspace is running. 628 * way because it's always present, even when userspace is running.
@@ -534,16 +632,21 @@ void __init lguest_arch_host_init(void)
534 * you'll get really weird bugs that you'll chase for two days. 632 * you'll get really weird bugs that you'll chase for two days.
535 * 633 *
536 * I used to turn PGE off every time we switched to the Guest and back 634 * I used to turn PGE off every time we switched to the Guest and back
537 * on when we return, but that slowed the Switcher down noticibly. */ 635 * on when we return, but that slowed the Switcher down noticibly.
636 */
538 637
539 /* We don't need the complexity of CPUs coming and going while we're 638 /*
540 * doing this. */ 639 * We don't need the complexity of CPUs coming and going while we're
640 * doing this.
641 */
541 get_online_cpus(); 642 get_online_cpus();
542 if (cpu_has_pge) { /* We have a broader idea of "global". */ 643 if (cpu_has_pge) { /* We have a broader idea of "global". */
543 /* Remember that this was originally set (for cleanup). */ 644 /* Remember that this was originally set (for cleanup). */
544 cpu_had_pge = 1; 645 cpu_had_pge = 1;
545 /* adjust_pge is a helper function which sets or unsets the PGE 646 /*
546 * bit on its CPU, depending on the argument (0 == unset). */ 647 * adjust_pge is a helper function which sets or unsets the PGE
648 * bit on its CPU, depending on the argument (0 == unset).
649 */
547 on_each_cpu(adjust_pge, (void *)0, 1); 650 on_each_cpu(adjust_pge, (void *)0, 1);
548 /* Turn off the feature in the global feature set. */ 651 /* Turn off the feature in the global feature set. */
549 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE); 652 clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
@@ -590,26 +693,32 @@ int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
590{ 693{
591 u32 tsc_speed; 694 u32 tsc_speed;
592 695
593 /* The pointer to the Guest's "struct lguest_data" is the only argument. 696 /*
594 * We check that address now. */ 697 * The pointer to the Guest's "struct lguest_data" is the only argument.
698 * We check that address now.
699 */
595 if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1, 700 if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
596 sizeof(*cpu->lg->lguest_data))) 701 sizeof(*cpu->lg->lguest_data)))
597 return -EFAULT; 702 return -EFAULT;
598 703
599 /* Having checked it, we simply set lg->lguest_data to point straight 704 /*
705 * Having checked it, we simply set lg->lguest_data to point straight
600 * into the Launcher's memory at the right place and then use 706 * into the Launcher's memory at the right place and then use
601 * copy_to_user/from_user from now on, instead of lgread/write. I put 707 * copy_to_user/from_user from now on, instead of lgread/write. I put
602 * this in to show that I'm not immune to writing stupid 708 * this in to show that I'm not immune to writing stupid
603 * optimizations. */ 709 * optimizations.
710 */
604 cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1; 711 cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
605 712
606 /* We insist that the Time Stamp Counter exist and doesn't change with 713 /*
714 * We insist that the Time Stamp Counter exist and doesn't change with
607 * cpu frequency. Some devious chip manufacturers decided that TSC 715 * cpu frequency. Some devious chip manufacturers decided that TSC
608 * changes could be handled in software. I decided that time going 716 * changes could be handled in software. I decided that time going
609 * backwards might be good for benchmarks, but it's bad for users. 717 * backwards might be good for benchmarks, but it's bad for users.
610 * 718 *
611 * We also insist that the TSC be stable: the kernel detects unreliable 719 * We also insist that the TSC be stable: the kernel detects unreliable
612 * TSCs for its own purposes, and we use that here. */ 720 * TSCs for its own purposes, and we use that here.
721 */
613 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable()) 722 if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
614 tsc_speed = tsc_khz; 723 tsc_speed = tsc_khz;
615 else 724 else
@@ -625,38 +734,47 @@ int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
625} 734}
626/*:*/ 735/*:*/
627 736
628/*L:030 lguest_arch_setup_regs() 737/*L:030
738 * lguest_arch_setup_regs()
629 * 739 *
630 * Most of the Guest's registers are left alone: we used get_zeroed_page() to 740 * Most of the Guest's registers are left alone: we used get_zeroed_page() to
631 * allocate the structure, so they will be 0. */ 741 * allocate the structure, so they will be 0.
742 */
632void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start) 743void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
633{ 744{
634 struct lguest_regs *regs = cpu->regs; 745 struct lguest_regs *regs = cpu->regs;
635 746
636 /* There are four "segment" registers which the Guest needs to boot: 747 /*
748 * There are four "segment" registers which the Guest needs to boot:
637 * The "code segment" register (cs) refers to the kernel code segment 749 * The "code segment" register (cs) refers to the kernel code segment
638 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers 750 * __KERNEL_CS, and the "data", "extra" and "stack" segment registers
639 * refer to the kernel data segment __KERNEL_DS. 751 * refer to the kernel data segment __KERNEL_DS.
640 * 752 *
641 * The privilege level is packed into the lower bits. The Guest runs 753 * The privilege level is packed into the lower bits. The Guest runs
642 * at privilege level 1 (GUEST_PL).*/ 754 * at privilege level 1 (GUEST_PL).
755 */
643 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL; 756 regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
644 regs->cs = __KERNEL_CS|GUEST_PL; 757 regs->cs = __KERNEL_CS|GUEST_PL;
645 758
646 /* The "eflags" register contains miscellaneous flags. Bit 1 (0x002) 759 /*
760 * The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
647 * is supposed to always be "1". Bit 9 (0x200) controls whether 761 * is supposed to always be "1". Bit 9 (0x200) controls whether
648 * interrupts are enabled. We always leave interrupts enabled while 762 * interrupts are enabled. We always leave interrupts enabled while
649 * running the Guest. */ 763 * running the Guest.
764 */
650 regs->eflags = X86_EFLAGS_IF | 0x2; 765 regs->eflags = X86_EFLAGS_IF | 0x2;
651 766
652 /* The "Extended Instruction Pointer" register says where the Guest is 767 /*
653 * running. */ 768 * The "Extended Instruction Pointer" register says where the Guest is
769 * running.
770 */
654 regs->eip = start; 771 regs->eip = start;
655 772
656 /* %esi points to our boot information, at physical address 0, so don't 773 /*
657 * touch it. */ 774 * %esi points to our boot information, at physical address 0, so don't
775 * touch it.
776 */
658 777
659 /* There are a couple of GDT entries the Guest expects when first 778 /* There are a couple of GDT entries the Guest expects at boot. */
660 * booting. */
661 setup_guest_gdt(cpu); 779 setup_guest_gdt(cpu);
662} 780}
diff --git a/drivers/lguest/x86/switcher_32.S b/drivers/lguest/x86/switcher_32.S
index 3fc15318a80f..40634b0db9f7 100644
--- a/drivers/lguest/x86/switcher_32.S
+++ b/drivers/lguest/x86/switcher_32.S
@@ -1,12 +1,15 @@
1/*P:900 This is the Switcher: code which sits at 0xFFC00000 astride both the 1/*P:900
2 * Host and Guest to do the low-level Guest<->Host switch. It is as simple as 2 * This is the Switcher: code which sits at 0xFFC00000 (or 0xFFE00000) astride
3 * it can be made, but it's naturally very specific to x86. 3 * both the Host and Guest to do the low-level Guest<->Host switch. It is as
4 * simple as it can be made, but it's naturally very specific to x86.
4 * 5 *
5 * You have now completed Preparation. If this has whet your appetite; if you 6 * You have now completed Preparation. If this has whet your appetite; if you
6 * are feeling invigorated and refreshed then the next, more challenging stage 7 * are feeling invigorated and refreshed then the next, more challenging stage
7 * can be found in "make Guest". :*/ 8 * can be found in "make Guest".
9 :*/
8 10
9/*M:012 Lguest is meant to be simple: my rule of thumb is that 1% more LOC must 11/*M:012
12 * Lguest is meant to be simple: my rule of thumb is that 1% more LOC must
10 * gain at least 1% more performance. Since neither LOC nor performance can be 13 * gain at least 1% more performance. Since neither LOC nor performance can be
11 * measured beforehand, it generally means implementing a feature then deciding 14 * measured beforehand, it generally means implementing a feature then deciding
12 * if it's worth it. And once it's implemented, who can say no? 15 * if it's worth it. And once it's implemented, who can say no?
@@ -31,11 +34,14 @@
31 * Host (which is actually really easy). 34 * Host (which is actually really easy).
32 * 35 *
33 * Two questions remain. Would the performance gain outweigh the complexity? 36 * Two questions remain. Would the performance gain outweigh the complexity?
34 * And who would write the verse documenting it? :*/ 37 * And who would write the verse documenting it?
38:*/
35 39
36/*M:011 Lguest64 handles NMI. This gave me NMI envy (until I looked at their 40/*M:011
41 * Lguest64 handles NMI. This gave me NMI envy (until I looked at their
37 * code). It's worth doing though, since it would let us use oprofile in the 42 * code). It's worth doing though, since it would let us use oprofile in the
38 * Host when a Guest is running. :*/ 43 * Host when a Guest is running.
44:*/
39 45
40/*S:100 46/*S:100
41 * Welcome to the Switcher itself! 47 * Welcome to the Switcher itself!
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index 529e2ba505c3..ed1038164019 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -1318,7 +1318,7 @@ static int crypt_iterate_devices(struct dm_target *ti,
1318{ 1318{
1319 struct crypt_config *cc = ti->private; 1319 struct crypt_config *cc = ti->private;
1320 1320
1321 return fn(ti, cc->dev, cc->start, data); 1321 return fn(ti, cc->dev, cc->start, ti->len, data);
1322} 1322}
1323 1323
1324static struct target_type crypt_target = { 1324static struct target_type crypt_target = {
diff --git a/drivers/md/dm-delay.c b/drivers/md/dm-delay.c
index 4e5b843cd4d7..ebe7381f47c8 100644
--- a/drivers/md/dm-delay.c
+++ b/drivers/md/dm-delay.c
@@ -324,12 +324,12 @@ static int delay_iterate_devices(struct dm_target *ti,
324 struct delay_c *dc = ti->private; 324 struct delay_c *dc = ti->private;
325 int ret = 0; 325 int ret = 0;
326 326
327 ret = fn(ti, dc->dev_read, dc->start_read, data); 327 ret = fn(ti, dc->dev_read, dc->start_read, ti->len, data);
328 if (ret) 328 if (ret)
329 goto out; 329 goto out;
330 330
331 if (dc->dev_write) 331 if (dc->dev_write)
332 ret = fn(ti, dc->dev_write, dc->start_write, data); 332 ret = fn(ti, dc->dev_write, dc->start_write, ti->len, data);
333 333
334out: 334out:
335 return ret; 335 return ret;
diff --git a/drivers/md/dm-linear.c b/drivers/md/dm-linear.c
index 9184b6deb868..82f7d6e6b1ea 100644
--- a/drivers/md/dm-linear.c
+++ b/drivers/md/dm-linear.c
@@ -139,7 +139,7 @@ static int linear_iterate_devices(struct dm_target *ti,
139{ 139{
140 struct linear_c *lc = ti->private; 140 struct linear_c *lc = ti->private;
141 141
142 return fn(ti, lc->dev, lc->start, data); 142 return fn(ti, lc->dev, lc->start, ti->len, data);
143} 143}
144 144
145static struct target_type linear_target = { 145static struct target_type linear_target = {
diff --git a/drivers/md/dm-mpath.c b/drivers/md/dm-mpath.c
index c70604a20897..6f0d90d4a541 100644
--- a/drivers/md/dm-mpath.c
+++ b/drivers/md/dm-mpath.c
@@ -1453,7 +1453,7 @@ static int multipath_iterate_devices(struct dm_target *ti,
1453 1453
1454 list_for_each_entry(pg, &m->priority_groups, list) { 1454 list_for_each_entry(pg, &m->priority_groups, list) {
1455 list_for_each_entry(p, &pg->pgpaths, list) { 1455 list_for_each_entry(p, &pg->pgpaths, list) {
1456 ret = fn(ti, p->path.dev, ti->begin, data); 1456 ret = fn(ti, p->path.dev, ti->begin, ti->len, data);
1457 if (ret) 1457 if (ret)
1458 goto out; 1458 goto out;
1459 } 1459 }
diff --git a/drivers/md/dm-raid1.c b/drivers/md/dm-raid1.c
index ce8868c768cc..9726577cde49 100644
--- a/drivers/md/dm-raid1.c
+++ b/drivers/md/dm-raid1.c
@@ -638,6 +638,7 @@ static void do_writes(struct mirror_set *ms, struct bio_list *writes)
638 spin_lock_irq(&ms->lock); 638 spin_lock_irq(&ms->lock);
639 bio_list_merge(&ms->writes, &requeue); 639 bio_list_merge(&ms->writes, &requeue);
640 spin_unlock_irq(&ms->lock); 640 spin_unlock_irq(&ms->lock);
641 delayed_wake(ms);
641 } 642 }
642 643
643 /* 644 /*
@@ -1292,7 +1293,7 @@ static int mirror_iterate_devices(struct dm_target *ti,
1292 1293
1293 for (i = 0; !ret && i < ms->nr_mirrors; i++) 1294 for (i = 0; !ret && i < ms->nr_mirrors; i++)
1294 ret = fn(ti, ms->mirror[i].dev, 1295 ret = fn(ti, ms->mirror[i].dev,
1295 ms->mirror[i].offset, data); 1296 ms->mirror[i].offset, ti->len, data);
1296 1297
1297 return ret; 1298 return ret;
1298} 1299}
diff --git a/drivers/md/dm-stripe.c b/drivers/md/dm-stripe.c
index b240e85ae39a..4e0e5937e42a 100644
--- a/drivers/md/dm-stripe.c
+++ b/drivers/md/dm-stripe.c
@@ -320,10 +320,11 @@ static int stripe_iterate_devices(struct dm_target *ti,
320 int ret = 0; 320 int ret = 0;
321 unsigned i = 0; 321 unsigned i = 0;
322 322
323 do 323 do {
324 ret = fn(ti, sc->stripe[i].dev, 324 ret = fn(ti, sc->stripe[i].dev,
325 sc->stripe[i].physical_start, data); 325 sc->stripe[i].physical_start,
326 while (!ret && ++i < sc->stripes); 326 sc->stripe_width, data);
327 } while (!ret && ++i < sc->stripes);
327 328
328 return ret; 329 return ret;
329} 330}
diff --git a/drivers/md/dm-table.c b/drivers/md/dm-table.c
index 2cba557d9e61..d952b3441913 100644
--- a/drivers/md/dm-table.c
+++ b/drivers/md/dm-table.c
@@ -346,7 +346,7 @@ static void close_dev(struct dm_dev_internal *d, struct mapped_device *md)
346 * If possible, this checks an area of a destination device is valid. 346 * If possible, this checks an area of a destination device is valid.
347 */ 347 */
348static int device_area_is_valid(struct dm_target *ti, struct dm_dev *dev, 348static int device_area_is_valid(struct dm_target *ti, struct dm_dev *dev,
349 sector_t start, void *data) 349 sector_t start, sector_t len, void *data)
350{ 350{
351 struct queue_limits *limits = data; 351 struct queue_limits *limits = data;
352 struct block_device *bdev = dev->bdev; 352 struct block_device *bdev = dev->bdev;
@@ -359,7 +359,7 @@ static int device_area_is_valid(struct dm_target *ti, struct dm_dev *dev,
359 if (!dev_size) 359 if (!dev_size)
360 return 1; 360 return 1;
361 361
362 if ((start >= dev_size) || (start + ti->len > dev_size)) { 362 if ((start >= dev_size) || (start + len > dev_size)) {
363 DMWARN("%s: %s too small for target", 363 DMWARN("%s: %s too small for target",
364 dm_device_name(ti->table->md), bdevname(bdev, b)); 364 dm_device_name(ti->table->md), bdevname(bdev, b));
365 return 0; 365 return 0;
@@ -377,11 +377,11 @@ static int device_area_is_valid(struct dm_target *ti, struct dm_dev *dev,
377 return 0; 377 return 0;
378 } 378 }
379 379
380 if (ti->len & (logical_block_size_sectors - 1)) { 380 if (len & (logical_block_size_sectors - 1)) {
381 DMWARN("%s: len=%llu not aligned to h/w " 381 DMWARN("%s: len=%llu not aligned to h/w "
382 "logical block size %hu of %s", 382 "logical block size %hu of %s",
383 dm_device_name(ti->table->md), 383 dm_device_name(ti->table->md),
384 (unsigned long long)ti->len, 384 (unsigned long long)len,
385 limits->logical_block_size, bdevname(bdev, b)); 385 limits->logical_block_size, bdevname(bdev, b));
386 return 0; 386 return 0;
387 } 387 }
@@ -482,7 +482,7 @@ static int __table_get_device(struct dm_table *t, struct dm_target *ti,
482#define min_not_zero(l, r) (l == 0) ? r : ((r == 0) ? l : min(l, r)) 482#define min_not_zero(l, r) (l == 0) ? r : ((r == 0) ? l : min(l, r))
483 483
484int dm_set_device_limits(struct dm_target *ti, struct dm_dev *dev, 484int dm_set_device_limits(struct dm_target *ti, struct dm_dev *dev,
485 sector_t start, void *data) 485 sector_t start, sector_t len, void *data)
486{ 486{
487 struct queue_limits *limits = data; 487 struct queue_limits *limits = data;
488 struct block_device *bdev = dev->bdev; 488 struct block_device *bdev = dev->bdev;
@@ -830,11 +830,6 @@ unsigned dm_table_get_type(struct dm_table *t)
830 return t->type; 830 return t->type;
831} 831}
832 832
833bool dm_table_bio_based(struct dm_table *t)
834{
835 return dm_table_get_type(t) == DM_TYPE_BIO_BASED;
836}
837
838bool dm_table_request_based(struct dm_table *t) 833bool dm_table_request_based(struct dm_table *t)
839{ 834{
840 return dm_table_get_type(t) == DM_TYPE_REQUEST_BASED; 835 return dm_table_get_type(t) == DM_TYPE_REQUEST_BASED;
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 9acd54a5cffb..8a311ea0d441 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -2203,16 +2203,6 @@ int dm_swap_table(struct mapped_device *md, struct dm_table *table)
2203 goto out; 2203 goto out;
2204 } 2204 }
2205 2205
2206 /*
2207 * It is enought that blk_queue_ordered() is called only once when
2208 * the first bio-based table is bound.
2209 *
2210 * This setting should be moved to alloc_dev() when request-based dm
2211 * supports barrier.
2212 */
2213 if (!md->map && dm_table_bio_based(table))
2214 blk_queue_ordered(md->queue, QUEUE_ORDERED_DRAIN, NULL);
2215
2216 __unbind(md); 2206 __unbind(md);
2217 r = __bind(md, table, &limits); 2207 r = __bind(md, table, &limits);
2218 2208
diff --git a/drivers/md/dm.h b/drivers/md/dm.h
index 23278ae80f08..a7663eba17e2 100644
--- a/drivers/md/dm.h
+++ b/drivers/md/dm.h
@@ -61,7 +61,6 @@ int dm_table_any_congested(struct dm_table *t, int bdi_bits);
61int dm_table_any_busy_target(struct dm_table *t); 61int dm_table_any_busy_target(struct dm_table *t);
62int dm_table_set_type(struct dm_table *t); 62int dm_table_set_type(struct dm_table *t);
63unsigned dm_table_get_type(struct dm_table *t); 63unsigned dm_table_get_type(struct dm_table *t);
64bool dm_table_bio_based(struct dm_table *t);
65bool dm_table_request_based(struct dm_table *t); 64bool dm_table_request_based(struct dm_table *t);
66int dm_table_alloc_md_mempools(struct dm_table *t); 65int dm_table_alloc_md_mempools(struct dm_table *t);
67void dm_table_free_md_mempools(struct dm_table *t); 66void dm_table_free_md_mempools(struct dm_table *t);
diff --git a/drivers/md/linear.c b/drivers/md/linear.c
index 5810fa906af0..5fe39c2a3d2b 100644
--- a/drivers/md/linear.c
+++ b/drivers/md/linear.c
@@ -220,6 +220,7 @@ static int linear_run (mddev_t *mddev)
220 mddev->queue->unplug_fn = linear_unplug; 220 mddev->queue->unplug_fn = linear_unplug;
221 mddev->queue->backing_dev_info.congested_fn = linear_congested; 221 mddev->queue->backing_dev_info.congested_fn = linear_congested;
222 mddev->queue->backing_dev_info.congested_data = mddev; 222 mddev->queue->backing_dev_info.congested_data = mddev;
223 md_integrity_register(mddev);
223 return 0; 224 return 0;
224} 225}
225 226
@@ -256,6 +257,7 @@ static int linear_add(mddev_t *mddev, mdk_rdev_t *rdev)
256 rcu_assign_pointer(mddev->private, newconf); 257 rcu_assign_pointer(mddev->private, newconf);
257 md_set_array_sectors(mddev, linear_size(mddev, 0, 0)); 258 md_set_array_sectors(mddev, linear_size(mddev, 0, 0));
258 set_capacity(mddev->gendisk, mddev->array_sectors); 259 set_capacity(mddev->gendisk, mddev->array_sectors);
260 revalidate_disk(mddev->gendisk);
259 call_rcu(&oldconf->rcu, free_conf); 261 call_rcu(&oldconf->rcu, free_conf);
260 return 0; 262 return 0;
261} 263}
diff --git a/drivers/md/md.c b/drivers/md/md.c
index d4351ff0849f..5b98bea4ff9b 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -1308,7 +1308,12 @@ static int super_1_validate(mddev_t *mddev, mdk_rdev_t *rdev)
1308 } 1308 }
1309 if (mddev->level != LEVEL_MULTIPATH) { 1309 if (mddev->level != LEVEL_MULTIPATH) {
1310 int role; 1310 int role;
1311 role = le16_to_cpu(sb->dev_roles[rdev->desc_nr]); 1311 if (rdev->desc_nr < 0 ||
1312 rdev->desc_nr >= le32_to_cpu(sb->max_dev)) {
1313 role = 0xffff;
1314 rdev->desc_nr = -1;
1315 } else
1316 role = le16_to_cpu(sb->dev_roles[rdev->desc_nr]);
1312 switch(role) { 1317 switch(role) {
1313 case 0xffff: /* spare */ 1318 case 0xffff: /* spare */
1314 break; 1319 break;
@@ -1394,8 +1399,14 @@ static void super_1_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1394 if (rdev2->desc_nr+1 > max_dev) 1399 if (rdev2->desc_nr+1 > max_dev)
1395 max_dev = rdev2->desc_nr+1; 1400 max_dev = rdev2->desc_nr+1;
1396 1401
1397 if (max_dev > le32_to_cpu(sb->max_dev)) 1402 if (max_dev > le32_to_cpu(sb->max_dev)) {
1403 int bmask;
1398 sb->max_dev = cpu_to_le32(max_dev); 1404 sb->max_dev = cpu_to_le32(max_dev);
1405 rdev->sb_size = max_dev * 2 + 256;
1406 bmask = queue_logical_block_size(rdev->bdev->bd_disk->queue)-1;
1407 if (rdev->sb_size & bmask)
1408 rdev->sb_size = (rdev->sb_size | bmask) + 1;
1409 }
1399 for (i=0; i<max_dev;i++) 1410 for (i=0; i<max_dev;i++)
1400 sb->dev_roles[i] = cpu_to_le16(0xfffe); 1411 sb->dev_roles[i] = cpu_to_le16(0xfffe);
1401 1412
@@ -1487,37 +1498,76 @@ static int match_mddev_units(mddev_t *mddev1, mddev_t *mddev2)
1487 1498
1488static LIST_HEAD(pending_raid_disks); 1499static LIST_HEAD(pending_raid_disks);
1489 1500
1490static void md_integrity_check(mdk_rdev_t *rdev, mddev_t *mddev) 1501/*
1502 * Try to register data integrity profile for an mddev
1503 *
1504 * This is called when an array is started and after a disk has been kicked
1505 * from the array. It only succeeds if all working and active component devices
1506 * are integrity capable with matching profiles.
1507 */
1508int md_integrity_register(mddev_t *mddev)
1509{
1510 mdk_rdev_t *rdev, *reference = NULL;
1511
1512 if (list_empty(&mddev->disks))
1513 return 0; /* nothing to do */
1514 if (blk_get_integrity(mddev->gendisk))
1515 return 0; /* already registered */
1516 list_for_each_entry(rdev, &mddev->disks, same_set) {
1517 /* skip spares and non-functional disks */
1518 if (test_bit(Faulty, &rdev->flags))
1519 continue;
1520 if (rdev->raid_disk < 0)
1521 continue;
1522 /*
1523 * If at least one rdev is not integrity capable, we can not
1524 * enable data integrity for the md device.
1525 */
1526 if (!bdev_get_integrity(rdev->bdev))
1527 return -EINVAL;
1528 if (!reference) {
1529 /* Use the first rdev as the reference */
1530 reference = rdev;
1531 continue;
1532 }
1533 /* does this rdev's profile match the reference profile? */
1534 if (blk_integrity_compare(reference->bdev->bd_disk,
1535 rdev->bdev->bd_disk) < 0)
1536 return -EINVAL;
1537 }
1538 /*
1539 * All component devices are integrity capable and have matching
1540 * profiles, register the common profile for the md device.
1541 */
1542 if (blk_integrity_register(mddev->gendisk,
1543 bdev_get_integrity(reference->bdev)) != 0) {
1544 printk(KERN_ERR "md: failed to register integrity for %s\n",
1545 mdname(mddev));
1546 return -EINVAL;
1547 }
1548 printk(KERN_NOTICE "md: data integrity on %s enabled\n",
1549 mdname(mddev));
1550 return 0;
1551}
1552EXPORT_SYMBOL(md_integrity_register);
1553
1554/* Disable data integrity if non-capable/non-matching disk is being added */
1555void md_integrity_add_rdev(mdk_rdev_t *rdev, mddev_t *mddev)
1491{ 1556{
1492 struct mdk_personality *pers = mddev->pers;
1493 struct gendisk *disk = mddev->gendisk;
1494 struct blk_integrity *bi_rdev = bdev_get_integrity(rdev->bdev); 1557 struct blk_integrity *bi_rdev = bdev_get_integrity(rdev->bdev);
1495 struct blk_integrity *bi_mddev = blk_get_integrity(disk); 1558 struct blk_integrity *bi_mddev = blk_get_integrity(mddev->gendisk);
1496 1559
1497 /* Data integrity passthrough not supported on RAID 4, 5 and 6 */ 1560 if (!bi_mddev) /* nothing to do */
1498 if (pers && pers->level >= 4 && pers->level <= 6)
1499 return; 1561 return;
1500 1562 if (rdev->raid_disk < 0) /* skip spares */
1501 /* If rdev is integrity capable, register profile for mddev */
1502 if (!bi_mddev && bi_rdev) {
1503 if (blk_integrity_register(disk, bi_rdev))
1504 printk(KERN_ERR "%s: %s Could not register integrity!\n",
1505 __func__, disk->disk_name);
1506 else
1507 printk(KERN_NOTICE "Enabling data integrity on %s\n",
1508 disk->disk_name);
1509 return; 1563 return;
1510 } 1564 if (bi_rdev && blk_integrity_compare(mddev->gendisk,
1511 1565 rdev->bdev->bd_disk) >= 0)
1512 /* Check that mddev and rdev have matching profiles */ 1566 return;
1513 if (blk_integrity_compare(disk, rdev->bdev->bd_disk) < 0) { 1567 printk(KERN_NOTICE "disabling data integrity on %s\n", mdname(mddev));
1514 printk(KERN_ERR "%s: %s/%s integrity mismatch!\n", __func__, 1568 blk_integrity_unregister(mddev->gendisk);
1515 disk->disk_name, rdev->bdev->bd_disk->disk_name);
1516 printk(KERN_NOTICE "Disabling data integrity on %s\n",
1517 disk->disk_name);
1518 blk_integrity_unregister(disk);
1519 }
1520} 1569}
1570EXPORT_SYMBOL(md_integrity_add_rdev);
1521 1571
1522static int bind_rdev_to_array(mdk_rdev_t * rdev, mddev_t * mddev) 1572static int bind_rdev_to_array(mdk_rdev_t * rdev, mddev_t * mddev)
1523{ 1573{
@@ -1591,7 +1641,6 @@ static int bind_rdev_to_array(mdk_rdev_t * rdev, mddev_t * mddev)
1591 /* May as well allow recovery to be retried once */ 1641 /* May as well allow recovery to be retried once */
1592 mddev->recovery_disabled = 0; 1642 mddev->recovery_disabled = 0;
1593 1643
1594 md_integrity_check(rdev, mddev);
1595 return 0; 1644 return 0;
1596 1645
1597 fail: 1646 fail:
@@ -2657,6 +2706,7 @@ level_store(mddev_t *mddev, const char *buf, size_t len)
2657 ssize_t rv = len; 2706 ssize_t rv = len;
2658 struct mdk_personality *pers; 2707 struct mdk_personality *pers;
2659 void *priv; 2708 void *priv;
2709 mdk_rdev_t *rdev;
2660 2710
2661 if (mddev->pers == NULL) { 2711 if (mddev->pers == NULL) {
2662 if (len == 0) 2712 if (len == 0)
@@ -2736,6 +2786,12 @@ level_store(mddev_t *mddev, const char *buf, size_t len)
2736 mddev_suspend(mddev); 2786 mddev_suspend(mddev);
2737 mddev->pers->stop(mddev); 2787 mddev->pers->stop(mddev);
2738 module_put(mddev->pers->owner); 2788 module_put(mddev->pers->owner);
2789 /* Invalidate devices that are now superfluous */
2790 list_for_each_entry(rdev, &mddev->disks, same_set)
2791 if (rdev->raid_disk >= mddev->raid_disks) {
2792 rdev->raid_disk = -1;
2793 clear_bit(In_sync, &rdev->flags);
2794 }
2739 mddev->pers = pers; 2795 mddev->pers = pers;
2740 mddev->private = priv; 2796 mddev->private = priv;
2741 strlcpy(mddev->clevel, pers->name, sizeof(mddev->clevel)); 2797 strlcpy(mddev->clevel, pers->name, sizeof(mddev->clevel));
@@ -3685,17 +3741,8 @@ array_size_store(mddev_t *mddev, const char *buf, size_t len)
3685 3741
3686 mddev->array_sectors = sectors; 3742 mddev->array_sectors = sectors;
3687 set_capacity(mddev->gendisk, mddev->array_sectors); 3743 set_capacity(mddev->gendisk, mddev->array_sectors);
3688 if (mddev->pers) { 3744 if (mddev->pers)
3689 struct block_device *bdev = bdget_disk(mddev->gendisk, 0); 3745 revalidate_disk(mddev->gendisk);
3690
3691 if (bdev) {
3692 mutex_lock(&bdev->bd_inode->i_mutex);
3693 i_size_write(bdev->bd_inode,
3694 (loff_t)mddev->array_sectors << 9);
3695 mutex_unlock(&bdev->bd_inode->i_mutex);
3696 bdput(bdev);
3697 }
3698 }
3699 3746
3700 return len; 3747 return len;
3701} 3748}
@@ -4048,10 +4095,6 @@ static int do_md_run(mddev_t * mddev)
4048 } 4095 }
4049 strlcpy(mddev->clevel, pers->name, sizeof(mddev->clevel)); 4096 strlcpy(mddev->clevel, pers->name, sizeof(mddev->clevel));
4050 4097
4051 if (pers->level >= 4 && pers->level <= 6)
4052 /* Cannot support integrity (yet) */
4053 blk_integrity_unregister(mddev->gendisk);
4054
4055 if (mddev->reshape_position != MaxSector && 4098 if (mddev->reshape_position != MaxSector &&
4056 pers->start_reshape == NULL) { 4099 pers->start_reshape == NULL) {
4057 /* This personality cannot handle reshaping... */ 4100 /* This personality cannot handle reshaping... */
@@ -4189,6 +4232,7 @@ static int do_md_run(mddev_t * mddev)
4189 md_wakeup_thread(mddev->thread); 4232 md_wakeup_thread(mddev->thread);
4190 md_wakeup_thread(mddev->sync_thread); /* possibly kick off a reshape */ 4233 md_wakeup_thread(mddev->sync_thread); /* possibly kick off a reshape */
4191 4234
4235 revalidate_disk(mddev->gendisk);
4192 mddev->changed = 1; 4236 mddev->changed = 1;
4193 md_new_event(mddev); 4237 md_new_event(mddev);
4194 sysfs_notify_dirent(mddev->sysfs_state); 4238 sysfs_notify_dirent(mddev->sysfs_state);
@@ -5087,18 +5131,8 @@ static int update_size(mddev_t *mddev, sector_t num_sectors)
5087 return -ENOSPC; 5131 return -ENOSPC;
5088 } 5132 }
5089 rv = mddev->pers->resize(mddev, num_sectors); 5133 rv = mddev->pers->resize(mddev, num_sectors);
5090 if (!rv) { 5134 if (!rv)
5091 struct block_device *bdev; 5135 revalidate_disk(mddev->gendisk);
5092
5093 bdev = bdget_disk(mddev->gendisk, 0);
5094 if (bdev) {
5095 mutex_lock(&bdev->bd_inode->i_mutex);
5096 i_size_write(bdev->bd_inode,
5097 (loff_t)mddev->array_sectors << 9);
5098 mutex_unlock(&bdev->bd_inode->i_mutex);
5099 bdput(bdev);
5100 }
5101 }
5102 return rv; 5136 return rv;
5103} 5137}
5104 5138
diff --git a/drivers/md/md.h b/drivers/md/md.h
index 9430a110db93..78f03168baf9 100644
--- a/drivers/md/md.h
+++ b/drivers/md/md.h
@@ -431,5 +431,7 @@ extern int md_allow_write(mddev_t *mddev);
431extern void md_wait_for_blocked_rdev(mdk_rdev_t *rdev, mddev_t *mddev); 431extern void md_wait_for_blocked_rdev(mdk_rdev_t *rdev, mddev_t *mddev);
432extern void md_set_array_sectors(mddev_t *mddev, sector_t array_sectors); 432extern void md_set_array_sectors(mddev_t *mddev, sector_t array_sectors);
433extern int md_check_no_bitmap(mddev_t *mddev); 433extern int md_check_no_bitmap(mddev_t *mddev);
434extern int md_integrity_register(mddev_t *mddev);
435void md_integrity_add_rdev(mdk_rdev_t *rdev, mddev_t *mddev);
434 436
435#endif /* _MD_MD_H */ 437#endif /* _MD_MD_H */
diff --git a/drivers/md/multipath.c b/drivers/md/multipath.c
index 237fe3fd235c..7140909f6662 100644
--- a/drivers/md/multipath.c
+++ b/drivers/md/multipath.c
@@ -313,6 +313,7 @@ static int multipath_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
313 set_bit(In_sync, &rdev->flags); 313 set_bit(In_sync, &rdev->flags);
314 rcu_assign_pointer(p->rdev, rdev); 314 rcu_assign_pointer(p->rdev, rdev);
315 err = 0; 315 err = 0;
316 md_integrity_add_rdev(rdev, mddev);
316 break; 317 break;
317 } 318 }
318 319
@@ -345,7 +346,9 @@ static int multipath_remove_disk(mddev_t *mddev, int number)
345 /* lost the race, try later */ 346 /* lost the race, try later */
346 err = -EBUSY; 347 err = -EBUSY;
347 p->rdev = rdev; 348 p->rdev = rdev;
349 goto abort;
348 } 350 }
351 md_integrity_register(mddev);
349 } 352 }
350abort: 353abort:
351 354
@@ -519,7 +522,7 @@ static int multipath_run (mddev_t *mddev)
519 mddev->queue->unplug_fn = multipath_unplug; 522 mddev->queue->unplug_fn = multipath_unplug;
520 mddev->queue->backing_dev_info.congested_fn = multipath_congested; 523 mddev->queue->backing_dev_info.congested_fn = multipath_congested;
521 mddev->queue->backing_dev_info.congested_data = mddev; 524 mddev->queue->backing_dev_info.congested_data = mddev;
522 525 md_integrity_register(mddev);
523 return 0; 526 return 0;
524 527
525out_free_conf: 528out_free_conf:
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c
index 335f490dcad6..898e2bdfee47 100644
--- a/drivers/md/raid0.c
+++ b/drivers/md/raid0.c
@@ -351,6 +351,7 @@ static int raid0_run(mddev_t *mddev)
351 351
352 blk_queue_merge_bvec(mddev->queue, raid0_mergeable_bvec); 352 blk_queue_merge_bvec(mddev->queue, raid0_mergeable_bvec);
353 dump_zones(mddev); 353 dump_zones(mddev);
354 md_integrity_register(mddev);
354 return 0; 355 return 0;
355} 356}
356 357
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index 0569efba0c02..8726fd7ebce5 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -1144,7 +1144,7 @@ static int raid1_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
1144 rcu_assign_pointer(p->rdev, rdev); 1144 rcu_assign_pointer(p->rdev, rdev);
1145 break; 1145 break;
1146 } 1146 }
1147 1147 md_integrity_add_rdev(rdev, mddev);
1148 print_conf(conf); 1148 print_conf(conf);
1149 return err; 1149 return err;
1150} 1150}
@@ -1178,7 +1178,9 @@ static int raid1_remove_disk(mddev_t *mddev, int number)
1178 /* lost the race, try later */ 1178 /* lost the race, try later */
1179 err = -EBUSY; 1179 err = -EBUSY;
1180 p->rdev = rdev; 1180 p->rdev = rdev;
1181 goto abort;
1181 } 1182 }
1183 md_integrity_register(mddev);
1182 } 1184 }
1183abort: 1185abort:
1184 1186
@@ -2067,7 +2069,7 @@ static int run(mddev_t *mddev)
2067 mddev->queue->unplug_fn = raid1_unplug; 2069 mddev->queue->unplug_fn = raid1_unplug;
2068 mddev->queue->backing_dev_info.congested_fn = raid1_congested; 2070 mddev->queue->backing_dev_info.congested_fn = raid1_congested;
2069 mddev->queue->backing_dev_info.congested_data = mddev; 2071 mddev->queue->backing_dev_info.congested_data = mddev;
2070 2072 md_integrity_register(mddev);
2071 return 0; 2073 return 0;
2072 2074
2073out_no_mem: 2075out_no_mem:
@@ -2132,6 +2134,7 @@ static int raid1_resize(mddev_t *mddev, sector_t sectors)
2132 return -EINVAL; 2134 return -EINVAL;
2133 set_capacity(mddev->gendisk, mddev->array_sectors); 2135 set_capacity(mddev->gendisk, mddev->array_sectors);
2134 mddev->changed = 1; 2136 mddev->changed = 1;
2137 revalidate_disk(mddev->gendisk);
2135 if (sectors > mddev->dev_sectors && 2138 if (sectors > mddev->dev_sectors &&
2136 mddev->recovery_cp == MaxSector) { 2139 mddev->recovery_cp == MaxSector) {
2137 mddev->recovery_cp = mddev->dev_sectors; 2140 mddev->recovery_cp = mddev->dev_sectors;
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 7298a5e5a183..3d9020cf6f6e 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -1170,6 +1170,7 @@ static int raid10_add_disk(mddev_t *mddev, mdk_rdev_t *rdev)
1170 break; 1170 break;
1171 } 1171 }
1172 1172
1173 md_integrity_add_rdev(rdev, mddev);
1173 print_conf(conf); 1174 print_conf(conf);
1174 return err; 1175 return err;
1175} 1176}
@@ -1203,7 +1204,9 @@ static int raid10_remove_disk(mddev_t *mddev, int number)
1203 /* lost the race, try later */ 1204 /* lost the race, try later */
1204 err = -EBUSY; 1205 err = -EBUSY;
1205 p->rdev = rdev; 1206 p->rdev = rdev;
1207 goto abort;
1206 } 1208 }
1209 md_integrity_register(mddev);
1207 } 1210 }
1208abort: 1211abort:
1209 1212
@@ -2225,6 +2228,7 @@ static int run(mddev_t *mddev)
2225 2228
2226 if (conf->near_copies < mddev->raid_disks) 2229 if (conf->near_copies < mddev->raid_disks)
2227 blk_queue_merge_bvec(mddev->queue, raid10_mergeable_bvec); 2230 blk_queue_merge_bvec(mddev->queue, raid10_mergeable_bvec);
2231 md_integrity_register(mddev);
2228 return 0; 2232 return 0;
2229 2233
2230out_free_conf: 2234out_free_conf:
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 37835538b58e..2b521ee67dfa 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -3999,6 +3999,9 @@ static inline sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *ski
3999 return 0; 3999 return 0;
4000 } 4000 }
4001 4001
4002 /* Allow raid5_quiesce to complete */
4003 wait_event(conf->wait_for_overlap, conf->quiesce != 2);
4004
4002 if (test_bit(MD_RECOVERY_RESHAPE, &mddev->recovery)) 4005 if (test_bit(MD_RECOVERY_RESHAPE, &mddev->recovery))
4003 return reshape_request(mddev, sector_nr, skipped); 4006 return reshape_request(mddev, sector_nr, skipped);
4004 4007
@@ -4316,6 +4319,15 @@ raid5_size(mddev_t *mddev, sector_t sectors, int raid_disks)
4316 return sectors * (raid_disks - conf->max_degraded); 4319 return sectors * (raid_disks - conf->max_degraded);
4317} 4320}
4318 4321
4322static void free_conf(raid5_conf_t *conf)
4323{
4324 shrink_stripes(conf);
4325 safe_put_page(conf->spare_page);
4326 kfree(conf->disks);
4327 kfree(conf->stripe_hashtbl);
4328 kfree(conf);
4329}
4330
4319static raid5_conf_t *setup_conf(mddev_t *mddev) 4331static raid5_conf_t *setup_conf(mddev_t *mddev)
4320{ 4332{
4321 raid5_conf_t *conf; 4333 raid5_conf_t *conf;
@@ -4447,11 +4459,7 @@ static raid5_conf_t *setup_conf(mddev_t *mddev)
4447 4459
4448 abort: 4460 abort:
4449 if (conf) { 4461 if (conf) {
4450 shrink_stripes(conf); 4462 free_conf(conf);
4451 safe_put_page(conf->spare_page);
4452 kfree(conf->disks);
4453 kfree(conf->stripe_hashtbl);
4454 kfree(conf);
4455 return ERR_PTR(-EIO); 4463 return ERR_PTR(-EIO);
4456 } else 4464 } else
4457 return ERR_PTR(-ENOMEM); 4465 return ERR_PTR(-ENOMEM);
@@ -4629,12 +4637,8 @@ abort:
4629 md_unregister_thread(mddev->thread); 4637 md_unregister_thread(mddev->thread);
4630 mddev->thread = NULL; 4638 mddev->thread = NULL;
4631 if (conf) { 4639 if (conf) {
4632 shrink_stripes(conf);
4633 print_raid5_conf(conf); 4640 print_raid5_conf(conf);
4634 safe_put_page(conf->spare_page); 4641 free_conf(conf);
4635 kfree(conf->disks);
4636 kfree(conf->stripe_hashtbl);
4637 kfree(conf);
4638 } 4642 }
4639 mddev->private = NULL; 4643 mddev->private = NULL;
4640 printk(KERN_ALERT "raid5: failed to run raid set %s\n", mdname(mddev)); 4644 printk(KERN_ALERT "raid5: failed to run raid set %s\n", mdname(mddev));
@@ -4649,13 +4653,10 @@ static int stop(mddev_t *mddev)
4649 4653
4650 md_unregister_thread(mddev->thread); 4654 md_unregister_thread(mddev->thread);
4651 mddev->thread = NULL; 4655 mddev->thread = NULL;
4652 shrink_stripes(conf);
4653 kfree(conf->stripe_hashtbl);
4654 mddev->queue->backing_dev_info.congested_fn = NULL; 4656 mddev->queue->backing_dev_info.congested_fn = NULL;
4655 blk_sync_queue(mddev->queue); /* the unplug fn references 'conf'*/ 4657 blk_sync_queue(mddev->queue); /* the unplug fn references 'conf'*/
4656 sysfs_remove_group(&mddev->kobj, &raid5_attrs_group); 4658 sysfs_remove_group(&mddev->kobj, &raid5_attrs_group);
4657 kfree(conf->disks); 4659 free_conf(conf);
4658 kfree(conf);
4659 mddev->private = NULL; 4660 mddev->private = NULL;
4660 return 0; 4661 return 0;
4661} 4662}
@@ -4857,6 +4858,7 @@ static int raid5_resize(mddev_t *mddev, sector_t sectors)
4857 return -EINVAL; 4858 return -EINVAL;
4858 set_capacity(mddev->gendisk, mddev->array_sectors); 4859 set_capacity(mddev->gendisk, mddev->array_sectors);
4859 mddev->changed = 1; 4860 mddev->changed = 1;
4861 revalidate_disk(mddev->gendisk);
4860 if (sectors > mddev->dev_sectors && mddev->recovery_cp == MaxSector) { 4862 if (sectors > mddev->dev_sectors && mddev->recovery_cp == MaxSector) {
4861 mddev->recovery_cp = mddev->dev_sectors; 4863 mddev->recovery_cp = mddev->dev_sectors;
4862 set_bit(MD_RECOVERY_NEEDED, &mddev->recovery); 4864 set_bit(MD_RECOVERY_NEEDED, &mddev->recovery);
@@ -5002,7 +5004,7 @@ static int raid5_start_reshape(mddev_t *mddev)
5002 spin_unlock_irqrestore(&conf->device_lock, flags); 5004 spin_unlock_irqrestore(&conf->device_lock, flags);
5003 } 5005 }
5004 mddev->raid_disks = conf->raid_disks; 5006 mddev->raid_disks = conf->raid_disks;
5005 mddev->reshape_position = 0; 5007 mddev->reshape_position = conf->reshape_progress;
5006 set_bit(MD_CHANGE_DEVS, &mddev->flags); 5008 set_bit(MD_CHANGE_DEVS, &mddev->flags);
5007 5009
5008 clear_bit(MD_RECOVERY_SYNC, &mddev->recovery); 5010 clear_bit(MD_RECOVERY_SYNC, &mddev->recovery);
@@ -5057,7 +5059,6 @@ static void end_reshape(raid5_conf_t *conf)
5057 */ 5059 */
5058static void raid5_finish_reshape(mddev_t *mddev) 5060static void raid5_finish_reshape(mddev_t *mddev)
5059{ 5061{
5060 struct block_device *bdev;
5061 raid5_conf_t *conf = mddev->private; 5062 raid5_conf_t *conf = mddev->private;
5062 5063
5063 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) { 5064 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) {
@@ -5066,15 +5067,7 @@ static void raid5_finish_reshape(mddev_t *mddev)
5066 md_set_array_sectors(mddev, raid5_size(mddev, 0, 0)); 5067 md_set_array_sectors(mddev, raid5_size(mddev, 0, 0));
5067 set_capacity(mddev->gendisk, mddev->array_sectors); 5068 set_capacity(mddev->gendisk, mddev->array_sectors);
5068 mddev->changed = 1; 5069 mddev->changed = 1;
5069 5070 revalidate_disk(mddev->gendisk);
5070 bdev = bdget_disk(mddev->gendisk, 0);
5071 if (bdev) {
5072 mutex_lock(&bdev->bd_inode->i_mutex);
5073 i_size_write(bdev->bd_inode,
5074 (loff_t)mddev->array_sectors << 9);
5075 mutex_unlock(&bdev->bd_inode->i_mutex);
5076 bdput(bdev);
5077 }
5078 } else { 5071 } else {
5079 int d; 5072 int d;
5080 mddev->degraded = conf->raid_disks; 5073 mddev->degraded = conf->raid_disks;
@@ -5106,12 +5099,18 @@ static void raid5_quiesce(mddev_t *mddev, int state)
5106 5099
5107 case 1: /* stop all writes */ 5100 case 1: /* stop all writes */
5108 spin_lock_irq(&conf->device_lock); 5101 spin_lock_irq(&conf->device_lock);
5109 conf->quiesce = 1; 5102 /* '2' tells resync/reshape to pause so that all
5103 * active stripes can drain
5104 */
5105 conf->quiesce = 2;
5110 wait_event_lock_irq(conf->wait_for_stripe, 5106 wait_event_lock_irq(conf->wait_for_stripe,
5111 atomic_read(&conf->active_stripes) == 0 && 5107 atomic_read(&conf->active_stripes) == 0 &&
5112 atomic_read(&conf->active_aligned_reads) == 0, 5108 atomic_read(&conf->active_aligned_reads) == 0,
5113 conf->device_lock, /* nothing */); 5109 conf->device_lock, /* nothing */);
5110 conf->quiesce = 1;
5114 spin_unlock_irq(&conf->device_lock); 5111 spin_unlock_irq(&conf->device_lock);
5112 /* allow reshape to continue */
5113 wake_up(&conf->wait_for_overlap);
5115 break; 5114 break;
5116 5115
5117 case 0: /* re-enable writes */ 5116 case 0: /* re-enable writes */
diff --git a/drivers/media/dvb/b2c2/flexcop-fe-tuner.c b/drivers/media/dvb/b2c2/flexcop-fe-tuner.c
index efb4a6c2b57a..9a6307a347b2 100644
--- a/drivers/media/dvb/b2c2/flexcop-fe-tuner.c
+++ b/drivers/media/dvb/b2c2/flexcop-fe-tuner.c
@@ -20,8 +20,14 @@
20#include "tuner-simple.h" 20#include "tuner-simple.h"
21#include "stv0297.h" 21#include "stv0297.h"
22 22
23
24/* Can we use the specified front-end? Remember that if we are compiled
25 * into the kernel we can't call code that's in modules. */
26#define FE_SUPPORTED(fe) (defined(CONFIG_DVB_##fe) || \
27 (defined(CONFIG_DVB_##fe##_MODULE) && defined(MODULE)))
28
23/* lnb control */ 29/* lnb control */
24#if defined(CONFIG_DVB_MT312_MODULE) || defined(CONFIG_DVB_STV0299_MODULE) 30#if FE_SUPPORTED(MT312) || FE_SUPPORTED(STV0299)
25static int flexcop_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) 31static int flexcop_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
26{ 32{
27 struct flexcop_device *fc = fe->dvb->priv; 33 struct flexcop_device *fc = fe->dvb->priv;
@@ -49,8 +55,7 @@ static int flexcop_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage
49} 55}
50#endif 56#endif
51 57
52#if defined(CONFIG_DVB_S5H1420_MODULE) || defined(CONFIG_DVB_STV0299_MODULE) \ 58#if FE_SUPPORTED(S5H1420) || FE_SUPPORTED(STV0299) || FE_SUPPORTED(MT312)
53 || defined(CONFIG_DVB_MT312_MODULE)
54static int flexcop_sleep(struct dvb_frontend* fe) 59static int flexcop_sleep(struct dvb_frontend* fe)
55{ 60{
56 struct flexcop_device *fc = fe->dvb->priv; 61 struct flexcop_device *fc = fe->dvb->priv;
@@ -61,7 +66,7 @@ static int flexcop_sleep(struct dvb_frontend* fe)
61#endif 66#endif
62 67
63/* SkyStar2 DVB-S rev 2.3 */ 68/* SkyStar2 DVB-S rev 2.3 */
64#if defined(CONFIG_DVB_MT312_MODULE) 69#if FE_SUPPORTED(MT312)
65static int flexcop_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone) 70static int flexcop_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
66{ 71{
67/* u16 wz_half_period_for_45_mhz[] = { 0x01ff, 0x0154, 0x00ff, 0x00cc }; */ 72/* u16 wz_half_period_for_45_mhz[] = { 0x01ff, 0x0154, 0x00ff, 0x00cc }; */
@@ -193,10 +198,12 @@ static int skystar2_rev23_attach(struct flexcop_device *fc,
193 } 198 }
194 return 0; 199 return 0;
195} 200}
201#else
202#define skystar2_rev23_attach NULL
196#endif 203#endif
197 204
198/* SkyStar2 DVB-S rev 2.6 */ 205/* SkyStar2 DVB-S rev 2.6 */
199#if defined(CONFIG_DVB_STV0299_MODULE) 206#if FE_SUPPORTED(STV0299)
200static int samsung_tbmu24112_set_symbol_rate(struct dvb_frontend *fe, 207static int samsung_tbmu24112_set_symbol_rate(struct dvb_frontend *fe,
201 u32 srate, u32 ratio) 208 u32 srate, u32 ratio)
202{ 209{
@@ -321,10 +328,12 @@ static int skystar2_rev26_attach(struct flexcop_device *fc,
321 } 328 }
322 return 0; 329 return 0;
323} 330}
331#else
332#define skystar2_rev26_attach NULL
324#endif 333#endif
325 334
326/* SkyStar2 DVB-S rev 2.7 */ 335/* SkyStar2 DVB-S rev 2.7 */
327#if defined(CONFIG_DVB_S5H1420_MODULE) 336#if FE_SUPPORTED(S5H1420) && FE_SUPPORTED(ISL6421) && FE_SUPPORTED(TUNER_ITD1000)
328static struct s5h1420_config skystar2_rev2_7_s5h1420_config = { 337static struct s5h1420_config skystar2_rev2_7_s5h1420_config = {
329 .demod_address = 0x53, 338 .demod_address = 0x53,
330 .invert = 1, 339 .invert = 1,
@@ -385,10 +394,12 @@ fail:
385 fc->fc_i2c_adap[0].no_base_addr = 0; 394 fc->fc_i2c_adap[0].no_base_addr = 0;
386 return 0; 395 return 0;
387} 396}
397#else
398#define skystar2_rev27_attach NULL
388#endif 399#endif
389 400
390/* SkyStar2 rev 2.8 */ 401/* SkyStar2 rev 2.8 */
391#if defined(CONFIG_DVB_CX24123_MODULE) 402#if FE_SUPPORTED(CX24123) && FE_SUPPORTED(ISL6421) && FE_SUPPORTED(TUNER_CX24113)
392static struct cx24123_config skystar2_rev2_8_cx24123_config = { 403static struct cx24123_config skystar2_rev2_8_cx24123_config = {
393 .demod_address = 0x55, 404 .demod_address = 0x55,
394 .dont_use_pll = 1, 405 .dont_use_pll = 1,
@@ -433,10 +444,12 @@ static int skystar2_rev28_attach(struct flexcop_device *fc,
433 * IR-receiver (PIC16F818) - but the card has no input for that ??? */ 444 * IR-receiver (PIC16F818) - but the card has no input for that ??? */
434 return 1; 445 return 1;
435} 446}
447#else
448#define skystar2_rev28_attach NULL
436#endif 449#endif
437 450
438/* AirStar DVB-T */ 451/* AirStar DVB-T */
439#if defined(CONFIG_DVB_MT352_MODULE) 452#if FE_SUPPORTED(MT352)
440static int samsung_tdtc9251dh0_demod_init(struct dvb_frontend *fe) 453static int samsung_tdtc9251dh0_demod_init(struct dvb_frontend *fe)
441{ 454{
442 static u8 mt352_clock_config[] = { 0x89, 0x18, 0x2d }; 455 static u8 mt352_clock_config[] = { 0x89, 0x18, 0x2d };
@@ -495,10 +508,12 @@ static int airstar_dvbt_attach(struct flexcop_device *fc,
495 } 508 }
496 return 0; 509 return 0;
497} 510}
511#else
512#define airstar_dvbt_attach NULL
498#endif 513#endif
499 514
500/* AirStar ATSC 1st generation */ 515/* AirStar ATSC 1st generation */
501#if defined(CONFIG_DVB_BCM3510_MODULE) 516#if FE_SUPPORTED(BCM3510)
502static int flexcop_fe_request_firmware(struct dvb_frontend *fe, 517static int flexcop_fe_request_firmware(struct dvb_frontend *fe,
503 const struct firmware **fw, char* name) 518 const struct firmware **fw, char* name)
504{ 519{
@@ -517,10 +532,12 @@ static int airstar_atsc1_attach(struct flexcop_device *fc,
517 fc->fe = dvb_attach(bcm3510_attach, &air2pc_atsc_first_gen_config, i2c); 532 fc->fe = dvb_attach(bcm3510_attach, &air2pc_atsc_first_gen_config, i2c);
518 return fc->fe != NULL; 533 return fc->fe != NULL;
519} 534}
535#else
536#define airstar_atsc1_attach NULL
520#endif 537#endif
521 538
522/* AirStar ATSC 2nd generation */ 539/* AirStar ATSC 2nd generation */
523#if defined(CONFIG_DVB_NXT200X_MODULE) 540#if FE_SUPPORTED(NXT200X) && FE_SUPPORTED(PLL)
524static struct nxt200x_config samsung_tbmv_config = { 541static struct nxt200x_config samsung_tbmv_config = {
525 .demod_address = 0x0a, 542 .demod_address = 0x0a,
526}; 543};
@@ -535,10 +552,12 @@ static int airstar_atsc2_attach(struct flexcop_device *fc,
535 return !!dvb_attach(dvb_pll_attach, fc->fe, 0x61, NULL, 552 return !!dvb_attach(dvb_pll_attach, fc->fe, 0x61, NULL,
536 DVB_PLL_SAMSUNG_TBMV); 553 DVB_PLL_SAMSUNG_TBMV);
537} 554}
555#else
556#define airstar_atsc2_attach NULL
538#endif 557#endif
539 558
540/* AirStar ATSC 3rd generation */ 559/* AirStar ATSC 3rd generation */
541#if defined(CONFIG_DVB_LGDT330X_MODULE) 560#if FE_SUPPORTED(LGDT330X)
542static struct lgdt330x_config air2pc_atsc_hd5000_config = { 561static struct lgdt330x_config air2pc_atsc_hd5000_config = {
543 .demod_address = 0x59, 562 .demod_address = 0x59,
544 .demod_chip = LGDT3303, 563 .demod_chip = LGDT3303,
@@ -556,10 +575,12 @@ static int airstar_atsc3_attach(struct flexcop_device *fc,
556 return !!dvb_attach(simple_tuner_attach, fc->fe, i2c, 0x61, 575 return !!dvb_attach(simple_tuner_attach, fc->fe, i2c, 0x61,
557 TUNER_LG_TDVS_H06XF); 576 TUNER_LG_TDVS_H06XF);
558} 577}
578#else
579#define airstar_atsc3_attach NULL
559#endif 580#endif
560 581
561/* CableStar2 DVB-C */ 582/* CableStar2 DVB-C */
562#if defined(CONFIG_DVB_STV0297_MODULE) 583#if FE_SUPPORTED(STV0297)
563static int alps_tdee4_stv0297_tuner_set_params(struct dvb_frontend* fe, 584static int alps_tdee4_stv0297_tuner_set_params(struct dvb_frontend* fe,
564 struct dvb_frontend_parameters *fep) 585 struct dvb_frontend_parameters *fep)
565{ 586{
@@ -698,39 +719,23 @@ static int cablestar2_attach(struct flexcop_device *fc,
698 fc->fe->ops.tuner_ops.set_params = alps_tdee4_stv0297_tuner_set_params; 719 fc->fe->ops.tuner_ops.set_params = alps_tdee4_stv0297_tuner_set_params;
699 return 1; 720 return 1;
700} 721}
722#else
723#define cablestar2_attach NULL
701#endif 724#endif
702 725
703static struct { 726static struct {
704 flexcop_device_type_t type; 727 flexcop_device_type_t type;
705 int (*attach)(struct flexcop_device *, struct i2c_adapter *); 728 int (*attach)(struct flexcop_device *, struct i2c_adapter *);
706} flexcop_frontends[] = { 729} flexcop_frontends[] = {
707#if defined(CONFIG_DVB_S5H1420_MODULE)
708 { FC_SKY_REV27, skystar2_rev27_attach }, 730 { FC_SKY_REV27, skystar2_rev27_attach },
709#endif
710#if defined(CONFIG_DVB_CX24123_MODULE)
711 { FC_SKY_REV28, skystar2_rev28_attach }, 731 { FC_SKY_REV28, skystar2_rev28_attach },
712#endif
713#if defined(CONFIG_DVB_STV0299_MODULE)
714 { FC_SKY_REV26, skystar2_rev26_attach }, 732 { FC_SKY_REV26, skystar2_rev26_attach },
715#endif
716#if defined(CONFIG_DVB_MT352_MODULE)
717 { FC_AIR_DVBT, airstar_dvbt_attach }, 733 { FC_AIR_DVBT, airstar_dvbt_attach },
718#endif
719#if defined(CONFIG_DVB_NXT200X_MODULE)
720 { FC_AIR_ATSC2, airstar_atsc2_attach }, 734 { FC_AIR_ATSC2, airstar_atsc2_attach },
721#endif
722#if defined(CONFIG_DVB_LGDT330X_MODULE)
723 { FC_AIR_ATSC3, airstar_atsc3_attach }, 735 { FC_AIR_ATSC3, airstar_atsc3_attach },
724#endif
725#if defined(CONFIG_DVB_BCM3510_MODULE)
726 { FC_AIR_ATSC1, airstar_atsc1_attach }, 736 { FC_AIR_ATSC1, airstar_atsc1_attach },
727#endif
728#if defined(CONFIG_DVB_STV0297_MODULE)
729 { FC_CABLE, cablestar2_attach }, 737 { FC_CABLE, cablestar2_attach },
730#endif
731#if defined(CONFIG_DVB_MT312_MODULE)
732 { FC_SKY_REV23, skystar2_rev23_attach }, 738 { FC_SKY_REV23, skystar2_rev23_attach },
733#endif
734}; 739};
735 740
736/* try to figure out the frontend */ 741/* try to figure out the frontend */
@@ -738,6 +743,8 @@ int flexcop_frontend_init(struct flexcop_device *fc)
738{ 743{
739 int i; 744 int i;
740 for (i = 0; i < ARRAY_SIZE(flexcop_frontends); i++) { 745 for (i = 0; i < ARRAY_SIZE(flexcop_frontends); i++) {
746 if (!flexcop_frontends[i].attach)
747 continue;
741 /* type needs to be set before, because of some workarounds 748 /* type needs to be set before, because of some workarounds
742 * done based on the probed card type */ 749 * done based on the probed card type */
743 fc->dev_type = flexcop_frontends[i].type; 750 fc->dev_type = flexcop_frontends[i].type;
diff --git a/drivers/media/dvb/frontends/af9013.c b/drivers/media/dvb/frontends/af9013.c
index 136c5863d81b..12e018b4107d 100644
--- a/drivers/media/dvb/frontends/af9013.c
+++ b/drivers/media/dvb/frontends/af9013.c
@@ -527,6 +527,10 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
527 u8 i, buf[3] = {0, 0, 0}; 527 u8 i, buf[3] = {0, 0, 0};
528 *auto_mode = 0; /* set if parameters are requested to auto set */ 528 *auto_mode = 0; /* set if parameters are requested to auto set */
529 529
530 /* Try auto-detect transmission parameters in case of AUTO requested or
531 garbage parameters given by application for compatibility.
532 MPlayer seems to provide garbage parameters currently. */
533
530 switch (params->transmission_mode) { 534 switch (params->transmission_mode) {
531 case TRANSMISSION_MODE_AUTO: 535 case TRANSMISSION_MODE_AUTO:
532 *auto_mode = 1; 536 *auto_mode = 1;
@@ -536,7 +540,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
536 buf[0] |= (1 << 0); 540 buf[0] |= (1 << 0);
537 break; 541 break;
538 default: 542 default:
539 return -EINVAL; 543 deb_info("%s: invalid transmission_mode\n", __func__);
544 *auto_mode = 1;
540 } 545 }
541 546
542 switch (params->guard_interval) { 547 switch (params->guard_interval) {
@@ -554,7 +559,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
554 buf[0] |= (3 << 2); 559 buf[0] |= (3 << 2);
555 break; 560 break;
556 default: 561 default:
557 return -EINVAL; 562 deb_info("%s: invalid guard_interval\n", __func__);
563 *auto_mode = 1;
558 } 564 }
559 565
560 switch (params->hierarchy_information) { 566 switch (params->hierarchy_information) {
@@ -572,7 +578,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
572 buf[0] |= (3 << 4); 578 buf[0] |= (3 << 4);
573 break; 579 break;
574 default: 580 default:
575 return -EINVAL; 581 deb_info("%s: invalid hierarchy_information\n", __func__);
582 *auto_mode = 1;
576 }; 583 };
577 584
578 switch (params->constellation) { 585 switch (params->constellation) {
@@ -587,7 +594,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
587 buf[1] |= (2 << 6); 594 buf[1] |= (2 << 6);
588 break; 595 break;
589 default: 596 default:
590 return -EINVAL; 597 deb_info("%s: invalid constellation\n", __func__);
598 *auto_mode = 1;
591 } 599 }
592 600
593 /* Use HP. How and which case we can switch to LP? */ 601 /* Use HP. How and which case we can switch to LP? */
@@ -611,7 +619,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
611 buf[2] |= (4 << 0); 619 buf[2] |= (4 << 0);
612 break; 620 break;
613 default: 621 default:
614 return -EINVAL; 622 deb_info("%s: invalid code_rate_HP\n", __func__);
623 *auto_mode = 1;
615 } 624 }
616 625
617 switch (params->code_rate_LP) { 626 switch (params->code_rate_LP) {
@@ -638,7 +647,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
638 if (params->hierarchy_information == HIERARCHY_AUTO) 647 if (params->hierarchy_information == HIERARCHY_AUTO)
639 break; 648 break;
640 default: 649 default:
641 return -EINVAL; 650 deb_info("%s: invalid code_rate_LP\n", __func__);
651 *auto_mode = 1;
642 } 652 }
643 653
644 switch (params->bandwidth) { 654 switch (params->bandwidth) {
@@ -651,7 +661,8 @@ static int af9013_set_ofdm_params(struct af9013_state *state,
651 buf[1] |= (2 << 2); 661 buf[1] |= (2 << 2);
652 break; 662 break;
653 default: 663 default:
654 return -EINVAL; 664 deb_info("%s: invalid bandwidth\n", __func__);
665 buf[1] |= (2 << 2); /* cannot auto-detect BW, try 8 MHz */
655 } 666 }
656 667
657 /* program */ 668 /* program */
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index fdb4adff3d28..ca6558c394be 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -3324,8 +3324,6 @@ void __devinit bttv_init_card1(struct bttv *btv)
3324/* initialization part two -- after registering i2c bus */ 3324/* initialization part two -- after registering i2c bus */
3325void __devinit bttv_init_card2(struct bttv *btv) 3325void __devinit bttv_init_card2(struct bttv *btv)
3326{ 3326{
3327 int addr=ADDR_UNSET;
3328
3329 btv->tuner_type = UNSET; 3327 btv->tuner_type = UNSET;
3330 3328
3331 if (BTTV_BOARD_UNKNOWN == btv->c.type) { 3329 if (BTTV_BOARD_UNKNOWN == btv->c.type) {
@@ -3470,9 +3468,6 @@ void __devinit bttv_init_card2(struct bttv *btv)
3470 btv->pll.pll_current = -1; 3468 btv->pll.pll_current = -1;
3471 3469
3472 /* tuner configuration (from card list / autodetect / insmod option) */ 3470 /* tuner configuration (from card list / autodetect / insmod option) */
3473 if (ADDR_UNSET != bttv_tvcards[btv->c.type].tuner_addr)
3474 addr = bttv_tvcards[btv->c.type].tuner_addr;
3475
3476 if (UNSET != bttv_tvcards[btv->c.type].tuner_type) 3471 if (UNSET != bttv_tvcards[btv->c.type].tuner_type)
3477 if (UNSET == btv->tuner_type) 3472 if (UNSET == btv->tuner_type)
3478 btv->tuner_type = bttv_tvcards[btv->c.type].tuner_type; 3473 btv->tuner_type = bttv_tvcards[btv->c.type].tuner_type;
@@ -3496,40 +3491,6 @@ void __devinit bttv_init_card2(struct bttv *btv)
3496 if (UNSET == btv->tuner_type) 3491 if (UNSET == btv->tuner_type)
3497 btv->tuner_type = TUNER_ABSENT; 3492 btv->tuner_type = TUNER_ABSENT;
3498 3493
3499 if (btv->tuner_type != TUNER_ABSENT) {
3500 struct tuner_setup tun_setup;
3501
3502 /* Load tuner module before issuing tuner config call! */
3503 if (bttv_tvcards[btv->c.type].has_radio)
3504 v4l2_i2c_new_probed_subdev(&btv->c.v4l2_dev,
3505 &btv->c.i2c_adap, "tuner", "tuner",
3506 v4l2_i2c_tuner_addrs(ADDRS_RADIO));
3507 v4l2_i2c_new_probed_subdev(&btv->c.v4l2_dev,
3508 &btv->c.i2c_adap, "tuner", "tuner",
3509 v4l2_i2c_tuner_addrs(ADDRS_DEMOD));
3510 v4l2_i2c_new_probed_subdev(&btv->c.v4l2_dev,
3511 &btv->c.i2c_adap, "tuner", "tuner",
3512 v4l2_i2c_tuner_addrs(ADDRS_TV_WITH_DEMOD));
3513
3514 tun_setup.mode_mask = T_ANALOG_TV | T_DIGITAL_TV;
3515 tun_setup.type = btv->tuner_type;
3516 tun_setup.addr = addr;
3517
3518 if (bttv_tvcards[btv->c.type].has_radio)
3519 tun_setup.mode_mask |= T_RADIO;
3520
3521 bttv_call_all(btv, tuner, s_type_addr, &tun_setup);
3522 }
3523
3524 if (btv->tda9887_conf) {
3525 struct v4l2_priv_tun_config tda9887_cfg;
3526
3527 tda9887_cfg.tuner = TUNER_TDA9887;
3528 tda9887_cfg.priv = &btv->tda9887_conf;
3529
3530 bttv_call_all(btv, tuner, s_config, &tda9887_cfg);
3531 }
3532
3533 btv->dig = bttv_tvcards[btv->c.type].has_dig_in ? 3494 btv->dig = bttv_tvcards[btv->c.type].has_dig_in ?
3534 bttv_tvcards[btv->c.type].video_inputs - 1 : UNSET; 3495 bttv_tvcards[btv->c.type].video_inputs - 1 : UNSET;
3535 btv->svhs = bttv_tvcards[btv->c.type].svhs == NO_SVHS ? 3496 btv->svhs = bttv_tvcards[btv->c.type].svhs == NO_SVHS ?
@@ -3540,15 +3501,15 @@ void __devinit bttv_init_card2(struct bttv *btv)
3540 btv->has_remote = remote[btv->c.nr]; 3501 btv->has_remote = remote[btv->c.nr];
3541 3502
3542 if (bttv_tvcards[btv->c.type].has_radio) 3503 if (bttv_tvcards[btv->c.type].has_radio)
3543 btv->has_radio=1; 3504 btv->has_radio = 1;
3544 if (bttv_tvcards[btv->c.type].has_remote) 3505 if (bttv_tvcards[btv->c.type].has_remote)
3545 btv->has_remote=1; 3506 btv->has_remote = 1;
3546 if (!bttv_tvcards[btv->c.type].no_gpioirq) 3507 if (!bttv_tvcards[btv->c.type].no_gpioirq)
3547 btv->gpioirq=1; 3508 btv->gpioirq = 1;
3548 if (bttv_tvcards[btv->c.type].volume_gpio) 3509 if (bttv_tvcards[btv->c.type].volume_gpio)
3549 btv->volume_gpio=bttv_tvcards[btv->c.type].volume_gpio; 3510 btv->volume_gpio = bttv_tvcards[btv->c.type].volume_gpio;
3550 if (bttv_tvcards[btv->c.type].audio_mode_gpio) 3511 if (bttv_tvcards[btv->c.type].audio_mode_gpio)
3551 btv->audio_mode_gpio=bttv_tvcards[btv->c.type].audio_mode_gpio; 3512 btv->audio_mode_gpio = bttv_tvcards[btv->c.type].audio_mode_gpio;
3552 3513
3553 if (btv->tuner_type == TUNER_ABSENT) 3514 if (btv->tuner_type == TUNER_ABSENT)
3554 return; /* no tuner or related drivers to load */ 3515 return; /* no tuner or related drivers to load */
@@ -3666,6 +3627,49 @@ no_audio:
3666} 3627}
3667 3628
3668 3629
3630/* initialize the tuner */
3631void __devinit bttv_init_tuner(struct bttv *btv)
3632{
3633 int addr = ADDR_UNSET;
3634
3635 if (ADDR_UNSET != bttv_tvcards[btv->c.type].tuner_addr)
3636 addr = bttv_tvcards[btv->c.type].tuner_addr;
3637
3638 if (btv->tuner_type != TUNER_ABSENT) {
3639 struct tuner_setup tun_setup;
3640
3641 /* Load tuner module before issuing tuner config call! */
3642 if (bttv_tvcards[btv->c.type].has_radio)
3643 v4l2_i2c_new_probed_subdev(&btv->c.v4l2_dev,
3644 &btv->c.i2c_adap, "tuner", "tuner",
3645 v4l2_i2c_tuner_addrs(ADDRS_RADIO));
3646 v4l2_i2c_new_probed_subdev(&btv->c.v4l2_dev,
3647 &btv->c.i2c_adap, "tuner", "tuner",
3648 v4l2_i2c_tuner_addrs(ADDRS_DEMOD));
3649 v4l2_i2c_new_probed_subdev(&btv->c.v4l2_dev,
3650 &btv->c.i2c_adap, "tuner", "tuner",
3651 v4l2_i2c_tuner_addrs(ADDRS_TV_WITH_DEMOD));
3652
3653 tun_setup.mode_mask = T_ANALOG_TV | T_DIGITAL_TV;
3654 tun_setup.type = btv->tuner_type;
3655 tun_setup.addr = addr;
3656
3657 if (bttv_tvcards[btv->c.type].has_radio)
3658 tun_setup.mode_mask |= T_RADIO;
3659
3660 bttv_call_all(btv, tuner, s_type_addr, &tun_setup);
3661 }
3662
3663 if (btv->tda9887_conf) {
3664 struct v4l2_priv_tun_config tda9887_cfg;
3665
3666 tda9887_cfg.tuner = TUNER_TDA9887;
3667 tda9887_cfg.priv = &btv->tda9887_conf;
3668
3669 bttv_call_all(btv, tuner, s_config, &tda9887_cfg);
3670 }
3671}
3672
3669/* ----------------------------------------------------------------------- */ 3673/* ----------------------------------------------------------------------- */
3670 3674
3671static void modtec_eeprom(struct bttv *btv) 3675static void modtec_eeprom(struct bttv *btv)
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index d147d29bb0d3..8cc6dd28d6a7 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -4419,6 +4419,7 @@ static int __devinit bttv_probe(struct pci_dev *dev,
4419 4419
4420 /* some card-specific stuff (needs working i2c) */ 4420 /* some card-specific stuff (needs working i2c) */
4421 bttv_init_card2(btv); 4421 bttv_init_card2(btv);
4422 bttv_init_tuner(btv);
4422 init_irqreg(btv); 4423 init_irqreg(btv);
4423 4424
4424 /* register video4linux + input */ 4425 /* register video4linux + input */
diff --git a/drivers/media/video/bt8xx/bttv.h b/drivers/media/video/bt8xx/bttv.h
index 3d36daf206f3..3ec2402c6b4a 100644
--- a/drivers/media/video/bt8xx/bttv.h
+++ b/drivers/media/video/bt8xx/bttv.h
@@ -283,6 +283,7 @@ extern struct tvcard bttv_tvcards[];
283extern void bttv_idcard(struct bttv *btv); 283extern void bttv_idcard(struct bttv *btv);
284extern void bttv_init_card1(struct bttv *btv); 284extern void bttv_init_card1(struct bttv *btv);
285extern void bttv_init_card2(struct bttv *btv); 285extern void bttv_init_card2(struct bttv *btv);
286extern void bttv_init_tuner(struct bttv *btv);
286 287
287/* card-specific funtions */ 288/* card-specific funtions */
288extern void tea5757_set_freq(struct bttv *btv, unsigned short freq); 289extern void tea5757_set_freq(struct bttv *btv, unsigned short freq);
diff --git a/drivers/media/video/cx23885/cx23885-417.c b/drivers/media/video/cx23885/cx23885-417.c
index 428f0c45e6b7..e0cf21e0b1bf 100644
--- a/drivers/media/video/cx23885/cx23885-417.c
+++ b/drivers/media/video/cx23885/cx23885-417.c
@@ -58,7 +58,8 @@ MODULE_PARM_DESC(v4l_debug, "enable V4L debug messages");
58 58
59#define dprintk(level, fmt, arg...)\ 59#define dprintk(level, fmt, arg...)\
60 do { if (v4l_debug >= level) \ 60 do { if (v4l_debug >= level) \
61 printk(KERN_DEBUG "%s: " fmt, dev->name , ## arg);\ 61 printk(KERN_DEBUG "%s: " fmt, \
62 (dev) ? dev->name : "cx23885[?]", ## arg); \
62 } while (0) 63 } while (0)
63 64
64static struct cx23885_tvnorm cx23885_tvnorms[] = { 65static struct cx23885_tvnorm cx23885_tvnorms[] = {
@@ -1677,6 +1678,7 @@ static struct v4l2_file_operations mpeg_fops = {
1677 .read = mpeg_read, 1678 .read = mpeg_read,
1678 .poll = mpeg_poll, 1679 .poll = mpeg_poll,
1679 .mmap = mpeg_mmap, 1680 .mmap = mpeg_mmap,
1681 .ioctl = video_ioctl2,
1680}; 1682};
1681 1683
1682static const struct v4l2_ioctl_ops mpeg_ioctl_ops = { 1684static const struct v4l2_ioctl_ops mpeg_ioctl_ops = {
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index ebd24a25fb85..320f1f60276e 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -58,8 +58,6 @@ static unsigned int card[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = UNSET };
58module_param_array(card, int, NULL, 0444); 58module_param_array(card, int, NULL, 0444);
59MODULE_PARM_DESC(card, "card type"); 59MODULE_PARM_DESC(card, "card type");
60 60
61#define MT9V011_VERSION 0x8243
62
63/* Bitmask marking allocated devices from 0 to EM28XX_MAXBOARDS */ 61/* Bitmask marking allocated devices from 0 to EM28XX_MAXBOARDS */
64static unsigned long em28xx_devused; 62static unsigned long em28xx_devused;
65 63
@@ -159,6 +157,20 @@ static struct em28xx_reg_seq evga_indtube_digital[] = {
159 { -1, -1, -1, -1}, 157 { -1, -1, -1, -1},
160}; 158};
161 159
160/* Pinnacle Hybrid Pro eb1a:2881 */
161static struct em28xx_reg_seq pinnacle_hybrid_pro_analog[] = {
162 {EM28XX_R08_GPIO, 0xfd, ~EM_GPIO_4, 10},
163 { -1, -1, -1, -1},
164};
165
166static struct em28xx_reg_seq pinnacle_hybrid_pro_digital[] = {
167 {EM28XX_R08_GPIO, 0x6e, ~EM_GPIO_4, 10},
168 {EM2880_R04_GPO, 0x04, 0xff, 100},/* zl10353 reset */
169 {EM2880_R04_GPO, 0x0c, 0xff, 1},
170 { -1, -1, -1, -1},
171};
172
173
162/* Callback for the most boards */ 174/* Callback for the most boards */
163static struct em28xx_reg_seq default_tuner_gpio[] = { 175static struct em28xx_reg_seq default_tuner_gpio[] = {
164 {EM28XX_R08_GPIO, EM_GPIO_4, EM_GPIO_4, 10}, 176 {EM28XX_R08_GPIO, EM_GPIO_4, EM_GPIO_4, 10},
@@ -205,13 +217,15 @@ static struct em28xx_reg_seq silvercrest_reg_seq[] = {
205 */ 217 */
206struct em28xx_board em28xx_boards[] = { 218struct em28xx_board em28xx_boards[] = {
207 [EM2750_BOARD_UNKNOWN] = { 219 [EM2750_BOARD_UNKNOWN] = {
208 .name = "Unknown EM2750/EM2751 webcam grabber", 220 .name = "EM2710/EM2750/EM2751 webcam grabber",
209 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ, 221 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
210 .tuner_type = TUNER_ABSENT, /* This is a webcam */ 222 .tuner_type = TUNER_ABSENT,
223 .is_webcam = 1,
211 .input = { { 224 .input = { {
212 .type = EM28XX_VMUX_COMPOSITE1, 225 .type = EM28XX_VMUX_COMPOSITE1,
213 .vmux = 0, 226 .vmux = 0,
214 .amux = EM28XX_AMUX_VIDEO, 227 .amux = EM28XX_AMUX_VIDEO,
228 .gpio = silvercrest_reg_seq,
215 } }, 229 } },
216 }, 230 },
217 [EM2800_BOARD_UNKNOWN] = { 231 [EM2800_BOARD_UNKNOWN] = {
@@ -233,13 +247,15 @@ struct em28xx_board em28xx_boards[] = {
233 [EM2820_BOARD_UNKNOWN] = { 247 [EM2820_BOARD_UNKNOWN] = {
234 .name = "Unknown EM2750/28xx video grabber", 248 .name = "Unknown EM2750/28xx video grabber",
235 .tuner_type = TUNER_ABSENT, 249 .tuner_type = TUNER_ABSENT,
250 .is_webcam = 1, /* To enable sensor probe */
236 }, 251 },
237 [EM2750_BOARD_DLCW_130] = { 252 [EM2750_BOARD_DLCW_130] = {
238 /* Beijing Huaqi Information Digital Technology Co., Ltd */ 253 /* Beijing Huaqi Information Digital Technology Co., Ltd */
239 .name = "Huaqi DLCW-130", 254 .name = "Huaqi DLCW-130",
240 .valid = EM28XX_BOARD_NOT_VALIDATED, 255 .valid = EM28XX_BOARD_NOT_VALIDATED,
241 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ, 256 .xclk = EM28XX_XCLK_FREQUENCY_48MHZ,
242 .tuner_type = TUNER_ABSENT, /* This is a webcam */ 257 .tuner_type = TUNER_ABSENT,
258 .is_webcam = 1,
243 .input = { { 259 .input = { {
244 .type = EM28XX_VMUX_COMPOSITE1, 260 .type = EM28XX_VMUX_COMPOSITE1,
245 .vmux = 0, 261 .vmux = 0,
@@ -440,7 +456,8 @@ struct em28xx_board em28xx_boards[] = {
440 [EM2820_BOARD_VIDEOLOGY_20K14XUSB] = { 456 [EM2820_BOARD_VIDEOLOGY_20K14XUSB] = {
441 .name = "Videology 20K14XUSB USB2.0", 457 .name = "Videology 20K14XUSB USB2.0",
442 .valid = EM28XX_BOARD_NOT_VALIDATED, 458 .valid = EM28XX_BOARD_NOT_VALIDATED,
443 .tuner_type = TUNER_ABSENT, /* This is a webcam */ 459 .tuner_type = TUNER_ABSENT,
460 .is_webcam = 1,
444 .input = { { 461 .input = { {
445 .type = EM28XX_VMUX_COMPOSITE1, 462 .type = EM28XX_VMUX_COMPOSITE1,
446 .vmux = 0, 463 .vmux = 0,
@@ -450,8 +467,7 @@ struct em28xx_board em28xx_boards[] = {
450 [EM2820_BOARD_SILVERCREST_WEBCAM] = { 467 [EM2820_BOARD_SILVERCREST_WEBCAM] = {
451 .name = "Silvercrest Webcam 1.3mpix", 468 .name = "Silvercrest Webcam 1.3mpix",
452 .tuner_type = TUNER_ABSENT, 469 .tuner_type = TUNER_ABSENT,
453 .is_27xx = 1, 470 .is_webcam = 1,
454 .decoder = EM28XX_MT9V011,
455 .input = { { 471 .input = { {
456 .type = EM28XX_VMUX_COMPOSITE1, 472 .type = EM28XX_VMUX_COMPOSITE1,
457 .vmux = 0, 473 .vmux = 0,
@@ -500,7 +516,8 @@ struct em28xx_board em28xx_boards[] = {
500 /* Beijing Huaqi Information Digital Technology Co., Ltd */ 516 /* Beijing Huaqi Information Digital Technology Co., Ltd */
501 .name = "NetGMBH Cam", 517 .name = "NetGMBH Cam",
502 .valid = EM28XX_BOARD_NOT_VALIDATED, 518 .valid = EM28XX_BOARD_NOT_VALIDATED,
503 .tuner_type = TUNER_ABSENT, /* This is a webcam */ 519 .tuner_type = TUNER_ABSENT,
520 .is_webcam = 1,
504 .input = { { 521 .input = { {
505 .type = EM28XX_VMUX_COMPOSITE1, 522 .type = EM28XX_VMUX_COMPOSITE1,
506 .vmux = 0, 523 .vmux = 0,
@@ -1250,25 +1267,26 @@ struct em28xx_board em28xx_boards[] = {
1250 }, 1267 },
1251 [EM2881_BOARD_PINNACLE_HYBRID_PRO] = { 1268 [EM2881_BOARD_PINNACLE_HYBRID_PRO] = {
1252 .name = "Pinnacle Hybrid Pro", 1269 .name = "Pinnacle Hybrid Pro",
1253 .valid = EM28XX_BOARD_NOT_VALIDATED,
1254 .tuner_type = TUNER_XC2028, 1270 .tuner_type = TUNER_XC2028,
1255 .tuner_gpio = default_tuner_gpio, 1271 .tuner_gpio = default_tuner_gpio,
1256 .decoder = EM28XX_TVP5150, 1272 .decoder = EM28XX_TVP5150,
1273 .has_dvb = 1,
1274 .dvb_gpio = pinnacle_hybrid_pro_digital,
1257 .input = { { 1275 .input = { {
1258 .type = EM28XX_VMUX_TELEVISION, 1276 .type = EM28XX_VMUX_TELEVISION,
1259 .vmux = TVP5150_COMPOSITE0, 1277 .vmux = TVP5150_COMPOSITE0,
1260 .amux = EM28XX_AMUX_VIDEO, 1278 .amux = EM28XX_AMUX_VIDEO,
1261 .gpio = default_analog, 1279 .gpio = pinnacle_hybrid_pro_analog,
1262 }, { 1280 }, {
1263 .type = EM28XX_VMUX_COMPOSITE1, 1281 .type = EM28XX_VMUX_COMPOSITE1,
1264 .vmux = TVP5150_COMPOSITE1, 1282 .vmux = TVP5150_COMPOSITE1,
1265 .amux = EM28XX_AMUX_LINE_IN, 1283 .amux = EM28XX_AMUX_LINE_IN,
1266 .gpio = default_analog, 1284 .gpio = pinnacle_hybrid_pro_analog,
1267 }, { 1285 }, {
1268 .type = EM28XX_VMUX_SVIDEO, 1286 .type = EM28XX_VMUX_SVIDEO,
1269 .vmux = TVP5150_SVIDEO, 1287 .vmux = TVP5150_SVIDEO,
1270 .amux = EM28XX_AMUX_LINE_IN, 1288 .amux = EM28XX_AMUX_LINE_IN,
1271 .gpio = default_analog, 1289 .gpio = pinnacle_hybrid_pro_analog,
1272 } }, 1290 } },
1273 }, 1291 },
1274 [EM2882_BOARD_PINNACLE_HYBRID_PRO] = { 1292 [EM2882_BOARD_PINNACLE_HYBRID_PRO] = {
@@ -1638,6 +1656,7 @@ static struct em28xx_hash_table em28xx_eeprom_hash[] = {
1638 {0x966a0441, EM2880_BOARD_KWORLD_DVB_310U, TUNER_XC2028}, 1656 {0x966a0441, EM2880_BOARD_KWORLD_DVB_310U, TUNER_XC2028},
1639 {0x9567eb1a, EM2880_BOARD_EMPIRE_DUAL_TV, TUNER_XC2028}, 1657 {0x9567eb1a, EM2880_BOARD_EMPIRE_DUAL_TV, TUNER_XC2028},
1640 {0xcee44a99, EM2882_BOARD_EVGA_INDTUBE, TUNER_XC2028}, 1658 {0xcee44a99, EM2882_BOARD_EVGA_INDTUBE, TUNER_XC2028},
1659 {0xb8846b20, EM2881_BOARD_PINNACLE_HYBRID_PRO, TUNER_XC2028},
1641}; 1660};
1642 1661
1643/* I2C devicelist hash table for devices with generic USB IDs */ 1662/* I2C devicelist hash table for devices with generic USB IDs */
@@ -1704,6 +1723,32 @@ static inline void em28xx_set_model(struct em28xx *dev)
1704 EM28XX_I2C_FREQ_100_KHZ; 1723 EM28XX_I2C_FREQ_100_KHZ;
1705} 1724}
1706 1725
1726/* FIXME: Should be replaced by a proper mt9m001 driver */
1727static int em28xx_initialize_mt9m001(struct em28xx *dev)
1728{
1729 int i;
1730 unsigned char regs[][3] = {
1731 { 0x0d, 0x00, 0x01, },
1732 { 0x0d, 0x00, 0x00, },
1733 { 0x04, 0x05, 0x00, }, /* hres = 1280 */
1734 { 0x03, 0x04, 0x00, }, /* vres = 1024 */
1735 { 0x20, 0x11, 0x00, },
1736 { 0x06, 0x00, 0x10, },
1737 { 0x2b, 0x00, 0x24, },
1738 { 0x2e, 0x00, 0x24, },
1739 { 0x35, 0x00, 0x24, },
1740 { 0x2d, 0x00, 0x20, },
1741 { 0x2c, 0x00, 0x20, },
1742 { 0x09, 0x0a, 0xd4, },
1743 { 0x35, 0x00, 0x57, },
1744 };
1745
1746 for (i = 0; i < ARRAY_SIZE(regs); i++)
1747 i2c_master_send(&dev->i2c_client, &regs[i][0], 3);
1748
1749 return 0;
1750}
1751
1707/* HINT method: webcam I2C chips 1752/* HINT method: webcam I2C chips
1708 * 1753 *
1709 * This method work for webcams with Micron sensors 1754 * This method work for webcams with Micron sensors
@@ -1716,9 +1761,6 @@ static int em28xx_hint_sensor(struct em28xx *dev)
1716 __be16 version_be; 1761 __be16 version_be;
1717 u16 version; 1762 u16 version;
1718 1763
1719 if (dev->model != EM2820_BOARD_UNKNOWN)
1720 return 0;
1721
1722 dev->i2c_client.addr = 0xba >> 1; 1764 dev->i2c_client.addr = 0xba >> 1;
1723 cmd = 0; 1765 cmd = 0;
1724 i2c_master_send(&dev->i2c_client, &cmd, 1); 1766 i2c_master_send(&dev->i2c_client, &cmd, 1);
@@ -1729,16 +1771,38 @@ static int em28xx_hint_sensor(struct em28xx *dev)
1729 version = be16_to_cpu(version_be); 1771 version = be16_to_cpu(version_be);
1730 1772
1731 switch (version) { 1773 switch (version) {
1732 case MT9V011_VERSION: 1774 case 0x8243: /* mt9v011 640x480 1.3 Mpix sensor */
1733 dev->model = EM2820_BOARD_SILVERCREST_WEBCAM; 1775 dev->model = EM2820_BOARD_SILVERCREST_WEBCAM;
1734 sensor_name = "mt9v011"; 1776 sensor_name = "mt9v011";
1777 dev->em28xx_sensor = EM28XX_MT9V011;
1778 dev->sensor_xres = 640;
1779 dev->sensor_yres = 480;
1780 dev->sensor_xtal = 6300000;
1781
1782 /* probably means GRGB 16 bit bayer */
1783 dev->vinmode = 0x0d;
1784 dev->vinctl = 0x00;
1785
1786 break;
1787 case 0x8431:
1788 dev->model = EM2750_BOARD_UNKNOWN;
1789 sensor_name = "mt9m001";
1790 dev->em28xx_sensor = EM28XX_MT9M001;
1791 em28xx_initialize_mt9m001(dev);
1792 dev->sensor_xres = 1280;
1793 dev->sensor_yres = 1024;
1794
1795 /* probably means BGGR 16 bit bayer */
1796 dev->vinmode = 0x0c;
1797 dev->vinctl = 0x00;
1798
1735 break; 1799 break;
1736 default: 1800 default:
1737 printk("Unknown Sensor 0x%04x\n", be16_to_cpu(version)); 1801 printk("Unknown Micron Sensor 0x%04x\n", be16_to_cpu(version));
1738 return -EINVAL; 1802 return -EINVAL;
1739 } 1803 }
1740 1804
1741 em28xx_errdev("Sensor is %s, assuming that webcam is %s\n", 1805 em28xx_errdev("Sensor is %s, using model %s entry.\n",
1742 sensor_name, em28xx_boards[dev->model].name); 1806 sensor_name, em28xx_boards[dev->model].name);
1743 1807
1744 return 0; 1808 return 0;
@@ -1772,10 +1836,7 @@ void em28xx_pre_card_setup(struct em28xx *dev)
1772 em28xx_info("chip ID is em2750\n"); 1836 em28xx_info("chip ID is em2750\n");
1773 break; 1837 break;
1774 case CHIP_ID_EM2820: 1838 case CHIP_ID_EM2820:
1775 if (dev->board.is_27xx) 1839 em28xx_info("chip ID is em2710 or em2820\n");
1776 em28xx_info("chip is em2710\n");
1777 else
1778 em28xx_info("chip ID is em2820\n");
1779 break; 1840 break;
1780 case CHIP_ID_EM2840: 1841 case CHIP_ID_EM2840:
1781 em28xx_info("chip ID is em2840\n"); 1842 em28xx_info("chip ID is em2840\n");
@@ -1929,6 +1990,7 @@ static void em28xx_setup_xc3028(struct em28xx *dev, struct xc2028_ctrl *ctl)
1929 ctl->demod = XC3028_FE_ZARLINK456; 1990 ctl->demod = XC3028_FE_ZARLINK456;
1930 break; 1991 break;
1931 case EM2880_BOARD_TERRATEC_HYBRID_XS: 1992 case EM2880_BOARD_TERRATEC_HYBRID_XS:
1993 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
1932 ctl->demod = XC3028_FE_ZARLINK456; 1994 ctl->demod = XC3028_FE_ZARLINK456;
1933 break; 1995 break;
1934 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2: 1996 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2:
@@ -2225,6 +2287,7 @@ void em28xx_card_setup(struct em28xx *dev)
2225 em28xx_set_mode() in em28xx_pre_card_setup() was a no-op, 2287 em28xx_set_mode() in em28xx_pre_card_setup() was a no-op,
2226 so make the call now so the analog GPIOs are set properly 2288 so make the call now so the analog GPIOs are set properly
2227 before probing the i2c bus. */ 2289 before probing the i2c bus. */
2290 em28xx_gpio_set(dev, dev->board.tuner_gpio);
2228 em28xx_set_mode(dev, EM28XX_ANALOG_MODE); 2291 em28xx_set_mode(dev, EM28XX_ANALOG_MODE);
2229 break; 2292 break;
2230 case EM2820_BOARD_SILVERCREST_WEBCAM: 2293 case EM2820_BOARD_SILVERCREST_WEBCAM:
@@ -2262,9 +2325,14 @@ void em28xx_card_setup(struct em28xx *dev)
2262 v4l2_i2c_new_probed_subdev(&dev->v4l2_dev, &dev->i2c_adap, 2325 v4l2_i2c_new_probed_subdev(&dev->v4l2_dev, &dev->i2c_adap,
2263 "tvp5150", "tvp5150", tvp5150_addrs); 2326 "tvp5150", "tvp5150", tvp5150_addrs);
2264 2327
2265 if (dev->board.decoder == EM28XX_MT9V011) 2328 if (dev->em28xx_sensor == EM28XX_MT9V011) {
2266 v4l2_i2c_new_probed_subdev(&dev->v4l2_dev, &dev->i2c_adap, 2329 struct v4l2_subdev *sd;
2267 "mt9v011", "mt9v011", mt9v011_addrs); 2330
2331 sd = v4l2_i2c_new_probed_subdev(&dev->v4l2_dev,
2332 &dev->i2c_adap, "mt9v011", "mt9v011", mt9v011_addrs);
2333 v4l2_subdev_call(sd, core, s_config, 0, &dev->sensor_xtal);
2334 }
2335
2268 2336
2269 if (dev->board.adecoder == EM28XX_TVAUDIO) 2337 if (dev->board.adecoder == EM28XX_TVAUDIO)
2270 v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap, 2338 v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap,
@@ -2410,7 +2478,19 @@ static int em28xx_init_dev(struct em28xx **devhandle, struct usb_device *udev,
2410 return errCode; 2478 return errCode;
2411 } 2479 }
2412 2480
2413 em28xx_hint_sensor(dev); 2481 /*
2482 * Default format, used for tvp5150 or saa711x output formats
2483 */
2484 dev->vinmode = 0x10;
2485 dev->vinctl = 0x11;
2486
2487 /*
2488 * If the device can be a webcam, seek for a sensor.
2489 * If sensor is not found, then it isn't a webcam.
2490 */
2491 if (dev->board.is_webcam)
2492 if (em28xx_hint_sensor(dev) < 0)
2493 dev->board.is_webcam = 0;
2414 2494
2415 /* Do board specific init and eeprom reading */ 2495 /* Do board specific init and eeprom reading */
2416 em28xx_card_setup(dev); 2496 em28xx_card_setup(dev);
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c
index 079ab4d563a6..5b78e199abd1 100644
--- a/drivers/media/video/em28xx/em28xx-core.c
+++ b/drivers/media/video/em28xx/em28xx-core.c
@@ -648,28 +648,17 @@ int em28xx_capture_start(struct em28xx *dev, int start)
648int em28xx_set_outfmt(struct em28xx *dev) 648int em28xx_set_outfmt(struct em28xx *dev)
649{ 649{
650 int ret; 650 int ret;
651 int vinmode, vinctl, outfmt;
652
653 outfmt = dev->format->reg;
654
655 if (dev->board.is_27xx) {
656 vinmode = 0x0d;
657 vinctl = 0x00;
658 } else {
659 vinmode = 0x10;
660 vinctl = 0x11;
661 }
662 651
663 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT, 652 ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT,
664 outfmt | 0x20, 0xff); 653 dev->format->reg | 0x20, 0xff);
665 if (ret < 0) 654 if (ret < 0)
666 return ret; 655 return ret;
667 656
668 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, vinmode); 657 ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, dev->vinmode);
669 if (ret < 0) 658 if (ret < 0)
670 return ret; 659 return ret;
671 660
672 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctl); 661 return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, dev->vinctl);
673} 662}
674 663
675static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, 664static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
@@ -707,10 +696,7 @@ static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
707 u8 mode; 696 u8 mode;
708 /* the em2800 scaler only supports scaling down to 50% */ 697 /* the em2800 scaler only supports scaling down to 50% */
709 698
710 if (dev->board.is_27xx) { 699 if (dev->board.is_em2800) {
711 /* FIXME: Don't use the scaler yet */
712 mode = 0;
713 } else if (dev->board.is_em2800) {
714 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); 700 mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
715 } else { 701 } else {
716 u8 buf[2]; 702 u8 buf[2];
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c
index 3da97c32b8fa..cf0ac7f2a30d 100644
--- a/drivers/media/video/em28xx/em28xx-dvb.c
+++ b/drivers/media/video/em28xx/em28xx-dvb.c
@@ -31,6 +31,8 @@
31#include "lgdt330x.h" 31#include "lgdt330x.h"
32#include "zl10353.h" 32#include "zl10353.h"
33#include "s5h1409.h" 33#include "s5h1409.h"
34#include "mt352.h"
35#include "mt352_priv.h" /* FIXME */
34 36
35MODULE_DESCRIPTION("driver for em28xx based DVB cards"); 37MODULE_DESCRIPTION("driver for em28xx based DVB cards");
36MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>"); 38MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@infradead.org>");
@@ -243,7 +245,7 @@ static struct s5h1409_config em28xx_s5h1409_with_xc3028 = {
243 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK 245 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK
244}; 246};
245 247
246static struct zl10353_config em28xx_terratec_xs_zl10353_xc3028 = { 248static struct zl10353_config em28xx_zl10353_xc3028_no_i2c_gate = {
247 .demod_address = (0x1e >> 1), 249 .demod_address = (0x1e >> 1),
248 .no_tuner = 1, 250 .no_tuner = 1,
249 .disable_i2c_gate_ctrl = 1, 251 .disable_i2c_gate_ctrl = 1,
@@ -258,6 +260,41 @@ static struct drx397xD_config em28xx_drx397xD_with_xc3028 = {
258}; 260};
259#endif 261#endif
260 262
263static int mt352_terratec_xs_init(struct dvb_frontend *fe)
264{
265 /* Values extracted from a USB trace of the Terratec Windows driver */
266 static u8 clock_config[] = { CLOCK_CTL, 0x38, 0x2c };
267 static u8 reset[] = { RESET, 0x80 };
268 static u8 adc_ctl_1_cfg[] = { ADC_CTL_1, 0x40 };
269 static u8 agc_cfg[] = { AGC_TARGET, 0x28, 0xa0 };
270 static u8 input_freq_cfg[] = { INPUT_FREQ_1, 0x31, 0xb8 };
271 static u8 rs_err_cfg[] = { RS_ERR_PER_1, 0x00, 0x4d };
272 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
273 static u8 trl_nom_cfg[] = { TRL_NOMINAL_RATE_1, 0x64, 0x00 };
274 static u8 tps_given_cfg[] = { TPS_GIVEN_1, 0x40, 0x80, 0x50 };
275 static u8 tuner_go[] = { TUNER_GO, 0x01};
276
277 mt352_write(fe, clock_config, sizeof(clock_config));
278 udelay(200);
279 mt352_write(fe, reset, sizeof(reset));
280 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
281 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
282 mt352_write(fe, input_freq_cfg, sizeof(input_freq_cfg));
283 mt352_write(fe, rs_err_cfg, sizeof(rs_err_cfg));
284 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
285 mt352_write(fe, trl_nom_cfg, sizeof(trl_nom_cfg));
286 mt352_write(fe, tps_given_cfg, sizeof(tps_given_cfg));
287 mt352_write(fe, tuner_go, sizeof(tuner_go));
288 return 0;
289}
290
291static struct mt352_config terratec_xs_mt352_cfg = {
292 .demod_address = (0x1e >> 1),
293 .no_tuner = 1,
294 .if2 = 45600,
295 .demod_init = mt352_terratec_xs_init,
296};
297
261/* ------------------------------------------------------------------ */ 298/* ------------------------------------------------------------------ */
262 299
263static int attach_xc3028(u8 addr, struct em28xx *dev) 300static int attach_xc3028(u8 addr, struct em28xx *dev)
@@ -440,7 +477,6 @@ static int dvb_init(struct em28xx *dev)
440 goto out_free; 477 goto out_free;
441 } 478 }
442 break; 479 break;
443 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
444 case EM2880_BOARD_KWORLD_DVB_310U: 480 case EM2880_BOARD_KWORLD_DVB_310U:
445 case EM2880_BOARD_EMPIRE_DUAL_TV: 481 case EM2880_BOARD_EMPIRE_DUAL_TV:
446 dvb->frontend = dvb_attach(zl10353_attach, 482 dvb->frontend = dvb_attach(zl10353_attach,
@@ -451,20 +487,28 @@ static int dvb_init(struct em28xx *dev)
451 goto out_free; 487 goto out_free;
452 } 488 }
453 break; 489 break;
490 case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900:
491 dvb->frontend = dvb_attach(zl10353_attach,
492 &em28xx_zl10353_xc3028_no_i2c_gate,
493 &dev->i2c_adap);
494 if (attach_xc3028(0x61, dev) < 0) {
495 result = -EINVAL;
496 goto out_free;
497 }
498 break;
454 case EM2880_BOARD_TERRATEC_HYBRID_XS: 499 case EM2880_BOARD_TERRATEC_HYBRID_XS:
500 case EM2881_BOARD_PINNACLE_HYBRID_PRO:
455 dvb->frontend = dvb_attach(zl10353_attach, 501 dvb->frontend = dvb_attach(zl10353_attach,
456 &em28xx_terratec_xs_zl10353_xc3028, 502 &em28xx_zl10353_xc3028_no_i2c_gate,
457 &dev->i2c_adap); 503 &dev->i2c_adap);
458 if (dvb->frontend == NULL) { 504 if (dvb->frontend == NULL) {
459 /* This board could have either a zl10353 or a mt352. 505 /* This board could have either a zl10353 or a mt352.
460 If the chip id isn't for zl10353, try mt352 */ 506 If the chip id isn't for zl10353, try mt352 */
461 507 dvb->frontend = dvb_attach(mt352_attach,
462 /* FIXME: make support for mt352 work */ 508 &terratec_xs_mt352_cfg,
463 printk(KERN_ERR "version of this board with mt352 not " 509 &dev->i2c_adap);
464 "currently supported\n");
465 result = -EINVAL;
466 goto out_free;
467 } 510 }
511
468 if (attach_xc3028(0x61, dev) < 0) { 512 if (attach_xc3028(0x61, dev) < 0) {
469 result = -EINVAL; 513 result = -EINVAL;
470 goto out_free; 514 goto out_free;
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c
index 14316c912179..ff37b4c15f44 100644
--- a/drivers/media/video/em28xx/em28xx-video.c
+++ b/drivers/media/video/em28xx/em28xx-video.c
@@ -657,8 +657,8 @@ static void get_scale(struct em28xx *dev,
657 unsigned int width, unsigned int height, 657 unsigned int width, unsigned int height,
658 unsigned int *hscale, unsigned int *vscale) 658 unsigned int *hscale, unsigned int *vscale)
659{ 659{
660 unsigned int maxw = norm_maxw(dev); 660 unsigned int maxw = norm_maxw(dev);
661 unsigned int maxh = norm_maxh(dev); 661 unsigned int maxh = norm_maxh(dev);
662 662
663 *hscale = (((unsigned long)maxw) << 12) / width - 4096L; 663 *hscale = (((unsigned long)maxw) << 12) / width - 4096L;
664 if (*hscale >= 0x4000) 664 if (*hscale >= 0x4000)
@@ -726,11 +726,7 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
726 return -EINVAL; 726 return -EINVAL;
727 } 727 }
728 728
729 if (dev->board.is_27xx) { 729 if (dev->board.is_em2800) {
730 /* FIXME: This is the only supported fmt */
731 width = 640;
732 height = 480;
733 } else if (dev->board.is_em2800) {
734 /* the em2800 can only scale down to 50% */ 730 /* the em2800 can only scale down to 50% */
735 height = height > (3 * maxh / 4) ? maxh : maxh / 2; 731 height = height > (3 * maxh / 4) ? maxh : maxh / 2;
736 width = width > (3 * maxw / 4) ? maxw : maxw / 2; 732 width = width > (3 * maxw / 4) ? maxw : maxw / 2;
@@ -767,12 +763,6 @@ static int em28xx_set_video_format(struct em28xx *dev, unsigned int fourcc,
767{ 763{
768 struct em28xx_fmt *fmt; 764 struct em28xx_fmt *fmt;
769 765
770 /* FIXME: This is the only supported fmt */
771 if (dev->board.is_27xx) {
772 width = 640;
773 height = 480;
774 }
775
776 fmt = format_by_fourcc(fourcc); 766 fmt = format_by_fourcc(fourcc);
777 if (!fmt) 767 if (!fmt)
778 return -EINVAL; 768 return -EINVAL;
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h
index d90fef463764..45bd513f62dc 100644
--- a/drivers/media/video/em28xx/em28xx.h
+++ b/drivers/media/video/em28xx/em28xx.h
@@ -358,10 +358,15 @@ struct em28xx_input {
358#define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) 358#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
359 359
360enum em28xx_decoder { 360enum em28xx_decoder {
361 EM28XX_NODECODER, 361 EM28XX_NODECODER = 0,
362 EM28XX_TVP5150, 362 EM28XX_TVP5150,
363 EM28XX_SAA711X, 363 EM28XX_SAA711X,
364};
365
366enum em28xx_sensor {
367 EM28XX_NOSENSOR = 0,
364 EM28XX_MT9V011, 368 EM28XX_MT9V011,
369 EM28XX_MT9M001,
365}; 370};
366 371
367enum em28xx_adecoder { 372enum em28xx_adecoder {
@@ -390,7 +395,7 @@ struct em28xx_board {
390 unsigned int max_range_640_480:1; 395 unsigned int max_range_640_480:1;
391 unsigned int has_dvb:1; 396 unsigned int has_dvb:1;
392 unsigned int has_snapshot_button:1; 397 unsigned int has_snapshot_button:1;
393 unsigned int is_27xx:1; 398 unsigned int is_webcam:1;
394 unsigned int valid:1; 399 unsigned int valid:1;
395 400
396 unsigned char xclk, i2c_speed; 401 unsigned char xclk, i2c_speed;
@@ -474,6 +479,14 @@ struct em28xx {
474 struct v4l2_device v4l2_dev; 479 struct v4l2_device v4l2_dev;
475 struct em28xx_board board; 480 struct em28xx_board board;
476 481
482 /* Webcam specific fields */
483 enum em28xx_sensor em28xx_sensor;
484 int sensor_xres, sensor_yres;
485 int sensor_xtal;
486
487 /* Vinmode/Vinctl used at the driver */
488 int vinmode, vinctl;
489
477 unsigned int stream_on:1; /* Locks streams */ 490 unsigned int stream_on:1; /* Locks streams */
478 unsigned int has_audio_class:1; 491 unsigned int has_audio_class:1;
479 unsigned int has_alsa_audio:1; 492 unsigned int has_alsa_audio:1;
@@ -754,17 +767,23 @@ static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
754/*FIXME: maxw should be dependent of alt mode */ 767/*FIXME: maxw should be dependent of alt mode */
755static inline unsigned int norm_maxw(struct em28xx *dev) 768static inline unsigned int norm_maxw(struct em28xx *dev)
756{ 769{
770 if (dev->board.is_webcam)
771 return dev->sensor_xres;
772
757 if (dev->board.max_range_640_480) 773 if (dev->board.max_range_640_480)
758 return 640; 774 return 640;
759 else 775
760 return 720; 776 return 720;
761} 777}
762 778
763static inline unsigned int norm_maxh(struct em28xx *dev) 779static inline unsigned int norm_maxh(struct em28xx *dev)
764{ 780{
781 if (dev->board.is_webcam)
782 return dev->sensor_yres;
783
765 if (dev->board.max_range_640_480) 784 if (dev->board.max_range_640_480)
766 return 480; 785 return 480;
767 else 786
768 return (dev->norm & V4L2_STD_625_50) ? 576 : 480; 787 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
769} 788}
770#endif 789#endif
diff --git a/drivers/media/video/gspca/Kconfig b/drivers/media/video/gspca/Kconfig
index 578dc4ffc965..34f46f2bc040 100644
--- a/drivers/media/video/gspca/Kconfig
+++ b/drivers/media/video/gspca/Kconfig
@@ -102,6 +102,22 @@ config USB_GSPCA_PAC7311
102 To compile this driver as a module, choose M here: the 102 To compile this driver as a module, choose M here: the
103 module will be called gspca_pac7311. 103 module will be called gspca_pac7311.
104 104
105config USB_GSPCA_SN9C20X
106 tristate "SN9C20X USB Camera Driver"
107 depends on VIDEO_V4L2 && USB_GSPCA
108 help
109 Say Y here if you want support for cameras based on the
110 sn9c20x chips (SN9C201 and SN9C202).
111
112 To compile this driver as a module, choose M here: the
113 module will be called gspca_sn9c20x.
114
115config USB_GSPCA_SN9C20X_EVDEV
116 bool "Enable evdev support"
117 depends on USB_GSPCA_SN9C20X
118 ---help---
119 Say Y here in order to enable evdev support for sn9c20x webcam button.
120
105config USB_GSPCA_SONIXB 121config USB_GSPCA_SONIXB
106 tristate "SONIX Bayer USB Camera Driver" 122 tristate "SONIX Bayer USB Camera Driver"
107 depends on VIDEO_V4L2 && USB_GSPCA 123 depends on VIDEO_V4L2 && USB_GSPCA
diff --git a/drivers/media/video/gspca/Makefile b/drivers/media/video/gspca/Makefile
index 8a6643e8eb96..f6d3b86e9ad5 100644
--- a/drivers/media/video/gspca/Makefile
+++ b/drivers/media/video/gspca/Makefile
@@ -8,6 +8,7 @@ obj-$(CONFIG_USB_GSPCA_OV519) += gspca_ov519.o
8obj-$(CONFIG_USB_GSPCA_OV534) += gspca_ov534.o 8obj-$(CONFIG_USB_GSPCA_OV534) += gspca_ov534.o
9obj-$(CONFIG_USB_GSPCA_PAC207) += gspca_pac207.o 9obj-$(CONFIG_USB_GSPCA_PAC207) += gspca_pac207.o
10obj-$(CONFIG_USB_GSPCA_PAC7311) += gspca_pac7311.o 10obj-$(CONFIG_USB_GSPCA_PAC7311) += gspca_pac7311.o
11obj-$(CONFIG_USB_GSPCA_SN9C20X) += gspca_sn9c20x.o
11obj-$(CONFIG_USB_GSPCA_SONIXB) += gspca_sonixb.o 12obj-$(CONFIG_USB_GSPCA_SONIXB) += gspca_sonixb.o
12obj-$(CONFIG_USB_GSPCA_SONIXJ) += gspca_sonixj.o 13obj-$(CONFIG_USB_GSPCA_SONIXJ) += gspca_sonixj.o
13obj-$(CONFIG_USB_GSPCA_SPCA500) += gspca_spca500.o 14obj-$(CONFIG_USB_GSPCA_SPCA500) += gspca_spca500.o
@@ -35,6 +36,7 @@ gspca_ov519-objs := ov519.o
35gspca_ov534-objs := ov534.o 36gspca_ov534-objs := ov534.o
36gspca_pac207-objs := pac207.o 37gspca_pac207-objs := pac207.o
37gspca_pac7311-objs := pac7311.o 38gspca_pac7311-objs := pac7311.o
39gspca_sn9c20x-objs := sn9c20x.o
38gspca_sonixb-objs := sonixb.o 40gspca_sonixb-objs := sonixb.o
39gspca_sonixj-objs := sonixj.o 41gspca_sonixj-objs := sonixj.o
40gspca_spca500-objs := spca500.o 42gspca_spca500-objs := spca500.o
diff --git a/drivers/media/video/gspca/conex.c b/drivers/media/video/gspca/conex.c
index 219cfa6fb877..8d48ea1742c2 100644
--- a/drivers/media/video/gspca/conex.c
+++ b/drivers/media/video/gspca/conex.c
@@ -846,6 +846,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
846 846
847 /* create the JPEG header */ 847 /* create the JPEG header */
848 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 848 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
849 if (!sd->jpeg_hdr)
850 return -ENOMEM;
849 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 851 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
850 0x22); /* JPEG 411 */ 852 0x22); /* JPEG 411 */
851 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 853 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 1e89600986c8..b8561dfb6c8c 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -727,6 +727,74 @@ static int gspca_get_mode(struct gspca_dev *gspca_dev,
727 return -EINVAL; 727 return -EINVAL;
728} 728}
729 729
730#ifdef CONFIG_VIDEO_ADV_DEBUG
731static int vidioc_g_register(struct file *file, void *priv,
732 struct v4l2_dbg_register *reg)
733{
734 int ret;
735 struct gspca_dev *gspca_dev = priv;
736
737 if (!gspca_dev->sd_desc->get_chip_ident)
738 return -EINVAL;
739
740 if (!gspca_dev->sd_desc->get_register)
741 return -EINVAL;
742
743 if (mutex_lock_interruptible(&gspca_dev->usb_lock))
744 return -ERESTARTSYS;
745 if (gspca_dev->present)
746 ret = gspca_dev->sd_desc->get_register(gspca_dev, reg);
747 else
748 ret = -ENODEV;
749 mutex_unlock(&gspca_dev->usb_lock);
750
751 return ret;
752}
753
754static int vidioc_s_register(struct file *file, void *priv,
755 struct v4l2_dbg_register *reg)
756{
757 int ret;
758 struct gspca_dev *gspca_dev = priv;
759
760 if (!gspca_dev->sd_desc->get_chip_ident)
761 return -EINVAL;
762
763 if (!gspca_dev->sd_desc->set_register)
764 return -EINVAL;
765
766 if (mutex_lock_interruptible(&gspca_dev->usb_lock))
767 return -ERESTARTSYS;
768 if (gspca_dev->present)
769 ret = gspca_dev->sd_desc->set_register(gspca_dev, reg);
770 else
771 ret = -ENODEV;
772 mutex_unlock(&gspca_dev->usb_lock);
773
774 return ret;
775}
776#endif
777
778static int vidioc_g_chip_ident(struct file *file, void *priv,
779 struct v4l2_dbg_chip_ident *chip)
780{
781 int ret;
782 struct gspca_dev *gspca_dev = priv;
783
784 if (!gspca_dev->sd_desc->get_chip_ident)
785 return -EINVAL;
786
787 if (mutex_lock_interruptible(&gspca_dev->usb_lock))
788 return -ERESTARTSYS;
789 if (gspca_dev->present)
790 ret = gspca_dev->sd_desc->get_chip_ident(gspca_dev, chip);
791 else
792 ret = -ENODEV;
793 mutex_unlock(&gspca_dev->usb_lock);
794
795 return ret;
796}
797
730static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv, 798static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
731 struct v4l2_fmtdesc *fmtdesc) 799 struct v4l2_fmtdesc *fmtdesc)
732{ 800{
@@ -1883,6 +1951,11 @@ static const struct v4l2_ioctl_ops dev_ioctl_ops = {
1883 .vidioc_s_parm = vidioc_s_parm, 1951 .vidioc_s_parm = vidioc_s_parm,
1884 .vidioc_s_std = vidioc_s_std, 1952 .vidioc_s_std = vidioc_s_std,
1885 .vidioc_enum_framesizes = vidioc_enum_framesizes, 1953 .vidioc_enum_framesizes = vidioc_enum_framesizes,
1954#ifdef CONFIG_VIDEO_ADV_DEBUG
1955 .vidioc_g_register = vidioc_g_register,
1956 .vidioc_s_register = vidioc_s_register,
1957#endif
1958 .vidioc_g_chip_ident = vidioc_g_chip_ident,
1886#ifdef CONFIG_VIDEO_V4L1_COMPAT 1959#ifdef CONFIG_VIDEO_V4L1_COMPAT
1887 .vidiocgmbuf = vidiocgmbuf, 1960 .vidiocgmbuf = vidiocgmbuf,
1888#endif 1961#endif
diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h
index bd1faff88644..46c4effdfcd5 100644
--- a/drivers/media/video/gspca/gspca.h
+++ b/drivers/media/video/gspca/gspca.h
@@ -69,6 +69,10 @@ typedef void (*cam_v_op) (struct gspca_dev *);
69typedef int (*cam_cf_op) (struct gspca_dev *, const struct usb_device_id *); 69typedef int (*cam_cf_op) (struct gspca_dev *, const struct usb_device_id *);
70typedef int (*cam_jpg_op) (struct gspca_dev *, 70typedef int (*cam_jpg_op) (struct gspca_dev *,
71 struct v4l2_jpegcompression *); 71 struct v4l2_jpegcompression *);
72typedef int (*cam_reg_op) (struct gspca_dev *,
73 struct v4l2_dbg_register *);
74typedef int (*cam_ident_op) (struct gspca_dev *,
75 struct v4l2_dbg_chip_ident *);
72typedef int (*cam_streamparm_op) (struct gspca_dev *, 76typedef int (*cam_streamparm_op) (struct gspca_dev *,
73 struct v4l2_streamparm *); 77 struct v4l2_streamparm *);
74typedef int (*cam_qmnu_op) (struct gspca_dev *, 78typedef int (*cam_qmnu_op) (struct gspca_dev *,
@@ -105,6 +109,11 @@ struct sd_desc {
105 cam_qmnu_op querymenu; 109 cam_qmnu_op querymenu;
106 cam_streamparm_op get_streamparm; 110 cam_streamparm_op get_streamparm;
107 cam_streamparm_op set_streamparm; 111 cam_streamparm_op set_streamparm;
112#ifdef CONFIG_VIDEO_ADV_DEBUG
113 cam_reg_op set_register;
114 cam_reg_op get_register;
115#endif
116 cam_ident_op get_chip_ident;
108}; 117};
109 118
110/* packet types when moving from iso buf to frame buf */ 119/* packet types when moving from iso buf to frame buf */
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index 191bcd718979..0163903d1c0f 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -476,9 +476,6 @@ static int s5k4aa_set_vflip(struct gspca_dev *gspca_dev, __s32 val)
476 err = m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &data, 1); 476 err = m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &data, 1);
477 if (err < 0) 477 if (err < 0)
478 return err; 478 return err;
479 err = m5602_write_sensor(sd, S5K4AA_READ_MODE, &data, 1);
480 if (err < 0)
481 return err;
482 479
483 err = m5602_read_sensor(sd, S5K4AA_READ_MODE, &data, 1); 480 err = m5602_read_sensor(sd, S5K4AA_READ_MODE, &data, 1);
484 if (err < 0) 481 if (err < 0)
@@ -524,9 +521,6 @@ static int s5k4aa_set_hflip(struct gspca_dev *gspca_dev, __s32 val)
524 err = m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &data, 1); 521 err = m5602_write_sensor(sd, S5K4AA_PAGE_MAP, &data, 1);
525 if (err < 0) 522 if (err < 0)
526 return err; 523 return err;
527 err = m5602_write_sensor(sd, S5K4AA_READ_MODE, &data, 1);
528 if (err < 0)
529 return err;
530 524
531 err = m5602_read_sensor(sd, S5K4AA_READ_MODE, &data, 1); 525 err = m5602_read_sensor(sd, S5K4AA_READ_MODE, &data, 1);
532 if (err < 0) 526 if (err < 0)
diff --git a/drivers/media/video/gspca/mars.c b/drivers/media/video/gspca/mars.c
index 75e8d14e4ac7..de769caf013d 100644
--- a/drivers/media/video/gspca/mars.c
+++ b/drivers/media/video/gspca/mars.c
@@ -201,6 +201,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
201 201
202 /* create the JPEG header */ 202 /* create the JPEG header */
203 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 203 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
204 if (!sd->jpeg_hdr)
205 return -ENOMEM;
204 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 206 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
205 0x21); /* JPEG 422 */ 207 0x21); /* JPEG 422 */
206 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 208 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c
new file mode 100644
index 000000000000..fcfbbd329b4c
--- /dev/null
+++ b/drivers/media/video/gspca/sn9c20x.c
@@ -0,0 +1,2434 @@
1/*
2 * Sonix sn9c201 sn9c202 library
3 * Copyright (C) 2008-2009 microdia project <microdia@googlegroups.com>
4 * Copyright (C) 2009 Brian Johnson <brijohn@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21#ifdef CONFIG_USB_GSPCA_SN9C20X_EVDEV
22#include <linux/kthread.h>
23#include <linux/freezer.h>
24#include <linux/usb/input.h>
25#include <linux/input.h>
26#endif
27
28#include "gspca.h"
29#include "jpeg.h"
30
31#include <media/v4l2-chip-ident.h>
32
33MODULE_AUTHOR("Brian Johnson <brijohn@gmail.com>, "
34 "microdia project <microdia@googlegroups.com>");
35MODULE_DESCRIPTION("GSPCA/SN9C20X USB Camera Driver");
36MODULE_LICENSE("GPL");
37
38#define MODULE_NAME "sn9c20x"
39
40#define MODE_RAW 0x10
41#define MODE_JPEG 0x20
42#define MODE_SXGA 0x80
43
44#define SENSOR_OV9650 0
45#define SENSOR_OV9655 1
46#define SENSOR_SOI968 2
47#define SENSOR_OV7660 3
48#define SENSOR_OV7670 4
49#define SENSOR_MT9V011 5
50#define SENSOR_MT9V111 6
51#define SENSOR_MT9V112 7
52#define SENSOR_MT9M001 8
53#define SENSOR_MT9M111 9
54#define SENSOR_HV7131R 10
55#define SENSOR_MT9VPRB 20
56
57/* specific webcam descriptor */
58struct sd {
59 struct gspca_dev gspca_dev;
60
61#define MIN_AVG_LUM 80
62#define MAX_AVG_LUM 130
63 atomic_t avg_lum;
64 u8 old_step;
65 u8 older_step;
66 u8 exposure_step;
67
68 u8 brightness;
69 u8 contrast;
70 u8 saturation;
71 s16 hue;
72 u8 gamma;
73 u8 red;
74 u8 blue;
75
76 u8 hflip;
77 u8 vflip;
78 u8 gain;
79 u16 exposure;
80 u8 auto_exposure;
81
82 u8 i2c_addr;
83 u8 sensor;
84 u8 hstart;
85 u8 vstart;
86
87 u8 *jpeg_hdr;
88 u8 quality;
89
90#ifdef CONFIG_USB_GSPCA_SN9C20X_EVDEV
91 struct input_dev *input_dev;
92 u8 input_gpio;
93 struct task_struct *input_task;
94#endif
95};
96
97static int sd_setbrightness(struct gspca_dev *gspca_dev, s32 val);
98static int sd_getbrightness(struct gspca_dev *gspca_dev, s32 *val);
99static int sd_setcontrast(struct gspca_dev *gspca_dev, s32 val);
100static int sd_getcontrast(struct gspca_dev *gspca_dev, s32 *val);
101static int sd_setsaturation(struct gspca_dev *gspca_dev, s32 val);
102static int sd_getsaturation(struct gspca_dev *gspca_dev, s32 *val);
103static int sd_sethue(struct gspca_dev *gspca_dev, s32 val);
104static int sd_gethue(struct gspca_dev *gspca_dev, s32 *val);
105static int sd_setgamma(struct gspca_dev *gspca_dev, s32 val);
106static int sd_getgamma(struct gspca_dev *gspca_dev, s32 *val);
107static int sd_setredbalance(struct gspca_dev *gspca_dev, s32 val);
108static int sd_getredbalance(struct gspca_dev *gspca_dev, s32 *val);
109static int sd_setbluebalance(struct gspca_dev *gspca_dev, s32 val);
110static int sd_getbluebalance(struct gspca_dev *gspca_dev, s32 *val);
111static int sd_setvflip(struct gspca_dev *gspca_dev, s32 val);
112static int sd_getvflip(struct gspca_dev *gspca_dev, s32 *val);
113static int sd_sethflip(struct gspca_dev *gspca_dev, s32 val);
114static int sd_gethflip(struct gspca_dev *gspca_dev, s32 *val);
115static int sd_setgain(struct gspca_dev *gspca_dev, s32 val);
116static int sd_getgain(struct gspca_dev *gspca_dev, s32 *val);
117static int sd_setexposure(struct gspca_dev *gspca_dev, s32 val);
118static int sd_getexposure(struct gspca_dev *gspca_dev, s32 *val);
119static int sd_setautoexposure(struct gspca_dev *gspca_dev, s32 val);
120static int sd_getautoexposure(struct gspca_dev *gspca_dev, s32 *val);
121
122static struct ctrl sd_ctrls[] = {
123 {
124#define BRIGHTNESS_IDX 0
125 {
126 .id = V4L2_CID_BRIGHTNESS,
127 .type = V4L2_CTRL_TYPE_INTEGER,
128 .name = "Brightness",
129 .minimum = 0,
130 .maximum = 0xff,
131 .step = 1,
132#define BRIGHTNESS_DEFAULT 0x7f
133 .default_value = BRIGHTNESS_DEFAULT,
134 },
135 .set = sd_setbrightness,
136 .get = sd_getbrightness,
137 },
138 {
139#define CONTRAST_IDX 1
140 {
141 .id = V4L2_CID_CONTRAST,
142 .type = V4L2_CTRL_TYPE_INTEGER,
143 .name = "Contrast",
144 .minimum = 0,
145 .maximum = 0xff,
146 .step = 1,
147#define CONTRAST_DEFAULT 0x7f
148 .default_value = CONTRAST_DEFAULT,
149 },
150 .set = sd_setcontrast,
151 .get = sd_getcontrast,
152 },
153 {
154#define SATURATION_IDX 2
155 {
156 .id = V4L2_CID_SATURATION,
157 .type = V4L2_CTRL_TYPE_INTEGER,
158 .name = "Saturation",
159 .minimum = 0,
160 .maximum = 0xff,
161 .step = 1,
162#define SATURATION_DEFAULT 0x7f
163 .default_value = SATURATION_DEFAULT,
164 },
165 .set = sd_setsaturation,
166 .get = sd_getsaturation,
167 },
168 {
169#define HUE_IDX 3
170 {
171 .id = V4L2_CID_HUE,
172 .type = V4L2_CTRL_TYPE_INTEGER,
173 .name = "Hue",
174 .minimum = -180,
175 .maximum = 180,
176 .step = 1,
177#define HUE_DEFAULT 0
178 .default_value = HUE_DEFAULT,
179 },
180 .set = sd_sethue,
181 .get = sd_gethue,
182 },
183 {
184#define GAMMA_IDX 4
185 {
186 .id = V4L2_CID_GAMMA,
187 .type = V4L2_CTRL_TYPE_INTEGER,
188 .name = "Gamma",
189 .minimum = 0,
190 .maximum = 0xff,
191 .step = 1,
192#define GAMMA_DEFAULT 0x10
193 .default_value = GAMMA_DEFAULT,
194 },
195 .set = sd_setgamma,
196 .get = sd_getgamma,
197 },
198 {
199#define BLUE_IDX 5
200 {
201 .id = V4L2_CID_BLUE_BALANCE,
202 .type = V4L2_CTRL_TYPE_INTEGER,
203 .name = "Blue Balance",
204 .minimum = 0,
205 .maximum = 0x7f,
206 .step = 1,
207#define BLUE_DEFAULT 0x28
208 .default_value = BLUE_DEFAULT,
209 },
210 .set = sd_setbluebalance,
211 .get = sd_getbluebalance,
212 },
213 {
214#define RED_IDX 6
215 {
216 .id = V4L2_CID_RED_BALANCE,
217 .type = V4L2_CTRL_TYPE_INTEGER,
218 .name = "Red Balance",
219 .minimum = 0,
220 .maximum = 0x7f,
221 .step = 1,
222#define RED_DEFAULT 0x28
223 .default_value = RED_DEFAULT,
224 },
225 .set = sd_setredbalance,
226 .get = sd_getredbalance,
227 },
228 {
229#define HFLIP_IDX 7
230 {
231 .id = V4L2_CID_HFLIP,
232 .type = V4L2_CTRL_TYPE_BOOLEAN,
233 .name = "Horizontal Flip",
234 .minimum = 0,
235 .maximum = 1,
236 .step = 1,
237#define HFLIP_DEFAULT 0
238 .default_value = HFLIP_DEFAULT,
239 },
240 .set = sd_sethflip,
241 .get = sd_gethflip,
242 },
243 {
244#define VFLIP_IDX 8
245 {
246 .id = V4L2_CID_VFLIP,
247 .type = V4L2_CTRL_TYPE_BOOLEAN,
248 .name = "Vertical Flip",
249 .minimum = 0,
250 .maximum = 1,
251 .step = 1,
252#define VFLIP_DEFAULT 0
253 .default_value = VFLIP_DEFAULT,
254 },
255 .set = sd_setvflip,
256 .get = sd_getvflip,
257 },
258 {
259#define EXPOSURE_IDX 9
260 {
261 .id = V4L2_CID_EXPOSURE,
262 .type = V4L2_CTRL_TYPE_INTEGER,
263 .name = "Exposure",
264 .minimum = 0,
265 .maximum = 0x1780,
266 .step = 1,
267#define EXPOSURE_DEFAULT 0x33
268 .default_value = EXPOSURE_DEFAULT,
269 },
270 .set = sd_setexposure,
271 .get = sd_getexposure,
272 },
273 {
274#define GAIN_IDX 10
275 {
276 .id = V4L2_CID_GAIN,
277 .type = V4L2_CTRL_TYPE_INTEGER,
278 .name = "Gain",
279 .minimum = 0,
280 .maximum = 28,
281 .step = 1,
282#define GAIN_DEFAULT 0x00
283 .default_value = GAIN_DEFAULT,
284 },
285 .set = sd_setgain,
286 .get = sd_getgain,
287 },
288 {
289#define AUTOGAIN_IDX 11
290 {
291 .id = V4L2_CID_AUTOGAIN,
292 .type = V4L2_CTRL_TYPE_BOOLEAN,
293 .name = "Auto Exposure",
294 .minimum = 0,
295 .maximum = 1,
296 .step = 1,
297#define AUTO_EXPOSURE_DEFAULT 1
298 .default_value = AUTO_EXPOSURE_DEFAULT,
299 },
300 .set = sd_setautoexposure,
301 .get = sd_getautoexposure,
302 },
303};
304
305static const struct v4l2_pix_format vga_mode[] = {
306 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
307 .bytesperline = 240,
308 .sizeimage = 240 * 120,
309 .colorspace = V4L2_COLORSPACE_JPEG,
310 .priv = 0 | MODE_JPEG},
311 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
312 .bytesperline = 160,
313 .sizeimage = 160 * 120,
314 .colorspace = V4L2_COLORSPACE_SRGB,
315 .priv = 0 | MODE_RAW},
316 {160, 120, V4L2_PIX_FMT_SN9C20X_I420, V4L2_FIELD_NONE,
317 .bytesperline = 240,
318 .sizeimage = 240 * 120,
319 .colorspace = V4L2_COLORSPACE_SRGB,
320 .priv = 0},
321 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
322 .bytesperline = 480,
323 .sizeimage = 480 * 240 ,
324 .colorspace = V4L2_COLORSPACE_JPEG,
325 .priv = 1 | MODE_JPEG},
326 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
327 .bytesperline = 320,
328 .sizeimage = 320 * 240 ,
329 .colorspace = V4L2_COLORSPACE_SRGB,
330 .priv = 1 | MODE_RAW},
331 {320, 240, V4L2_PIX_FMT_SN9C20X_I420, V4L2_FIELD_NONE,
332 .bytesperline = 480,
333 .sizeimage = 480 * 240 ,
334 .colorspace = V4L2_COLORSPACE_SRGB,
335 .priv = 1},
336 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
337 .bytesperline = 960,
338 .sizeimage = 960 * 480,
339 .colorspace = V4L2_COLORSPACE_JPEG,
340 .priv = 2 | MODE_JPEG},
341 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
342 .bytesperline = 640,
343 .sizeimage = 640 * 480,
344 .colorspace = V4L2_COLORSPACE_SRGB,
345 .priv = 2 | MODE_RAW},
346 {640, 480, V4L2_PIX_FMT_SN9C20X_I420, V4L2_FIELD_NONE,
347 .bytesperline = 960,
348 .sizeimage = 960 * 480,
349 .colorspace = V4L2_COLORSPACE_SRGB,
350 .priv = 2},
351};
352
353static const struct v4l2_pix_format sxga_mode[] = {
354 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
355 .bytesperline = 240,
356 .sizeimage = 240 * 120,
357 .colorspace = V4L2_COLORSPACE_JPEG,
358 .priv = 0 | MODE_JPEG},
359 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
360 .bytesperline = 160,
361 .sizeimage = 160 * 120,
362 .colorspace = V4L2_COLORSPACE_SRGB,
363 .priv = 0 | MODE_RAW},
364 {160, 120, V4L2_PIX_FMT_SN9C20X_I420, V4L2_FIELD_NONE,
365 .bytesperline = 240,
366 .sizeimage = 240 * 120,
367 .colorspace = V4L2_COLORSPACE_SRGB,
368 .priv = 0},
369 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
370 .bytesperline = 480,
371 .sizeimage = 480 * 240 ,
372 .colorspace = V4L2_COLORSPACE_JPEG,
373 .priv = 1 | MODE_JPEG},
374 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
375 .bytesperline = 320,
376 .sizeimage = 320 * 240 ,
377 .colorspace = V4L2_COLORSPACE_SRGB,
378 .priv = 1 | MODE_RAW},
379 {320, 240, V4L2_PIX_FMT_SN9C20X_I420, V4L2_FIELD_NONE,
380 .bytesperline = 480,
381 .sizeimage = 480 * 240 ,
382 .colorspace = V4L2_COLORSPACE_SRGB,
383 .priv = 1},
384 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
385 .bytesperline = 960,
386 .sizeimage = 960 * 480,
387 .colorspace = V4L2_COLORSPACE_JPEG,
388 .priv = 2 | MODE_JPEG},
389 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
390 .bytesperline = 640,
391 .sizeimage = 640 * 480,
392 .colorspace = V4L2_COLORSPACE_SRGB,
393 .priv = 2 | MODE_RAW},
394 {640, 480, V4L2_PIX_FMT_SN9C20X_I420, V4L2_FIELD_NONE,
395 .bytesperline = 960,
396 .sizeimage = 960 * 480,
397 .colorspace = V4L2_COLORSPACE_SRGB,
398 .priv = 2},
399 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
400 .bytesperline = 1280,
401 .sizeimage = (1280 * 1024) + 64,
402 .colorspace = V4L2_COLORSPACE_SRGB,
403 .priv = 3 | MODE_RAW | MODE_SXGA},
404};
405
406static const int hsv_red_x[] = {
407 41, 44, 46, 48, 50, 52, 54, 56,
408 58, 60, 62, 64, 66, 68, 70, 72,
409 74, 76, 78, 80, 81, 83, 85, 87,
410 88, 90, 92, 93, 95, 97, 98, 100,
411 101, 102, 104, 105, 107, 108, 109, 110,
412 112, 113, 114, 115, 116, 117, 118, 119,
413 120, 121, 122, 123, 123, 124, 125, 125,
414 126, 127, 127, 128, 128, 129, 129, 129,
415 130, 130, 130, 130, 131, 131, 131, 131,
416 131, 131, 131, 131, 130, 130, 130, 130,
417 129, 129, 129, 128, 128, 127, 127, 126,
418 125, 125, 124, 123, 122, 122, 121, 120,
419 119, 118, 117, 116, 115, 114, 112, 111,
420 110, 109, 107, 106, 105, 103, 102, 101,
421 99, 98, 96, 94, 93, 91, 90, 88,
422 86, 84, 83, 81, 79, 77, 75, 74,
423 72, 70, 68, 66, 64, 62, 60, 58,
424 56, 54, 52, 49, 47, 45, 43, 41,
425 39, 36, 34, 32, 30, 28, 25, 23,
426 21, 19, 16, 14, 12, 9, 7, 5,
427 3, 0, -1, -3, -6, -8, -10, -12,
428 -15, -17, -19, -22, -24, -26, -28, -30,
429 -33, -35, -37, -39, -41, -44, -46, -48,
430 -50, -52, -54, -56, -58, -60, -62, -64,
431 -66, -68, -70, -72, -74, -76, -78, -80,
432 -81, -83, -85, -87, -88, -90, -92, -93,
433 -95, -97, -98, -100, -101, -102, -104, -105,
434 -107, -108, -109, -110, -112, -113, -114, -115,
435 -116, -117, -118, -119, -120, -121, -122, -123,
436 -123, -124, -125, -125, -126, -127, -127, -128,
437 -128, -128, -128, -128, -128, -128, -128, -128,
438 -128, -128, -128, -128, -128, -128, -128, -128,
439 -128, -128, -128, -128, -128, -128, -128, -128,
440 -128, -127, -127, -126, -125, -125, -124, -123,
441 -122, -122, -121, -120, -119, -118, -117, -116,
442 -115, -114, -112, -111, -110, -109, -107, -106,
443 -105, -103, -102, -101, -99, -98, -96, -94,
444 -93, -91, -90, -88, -86, -84, -83, -81,
445 -79, -77, -75, -74, -72, -70, -68, -66,
446 -64, -62, -60, -58, -56, -54, -52, -49,
447 -47, -45, -43, -41, -39, -36, -34, -32,
448 -30, -28, -25, -23, -21, -19, -16, -14,
449 -12, -9, -7, -5, -3, 0, 1, 3,
450 6, 8, 10, 12, 15, 17, 19, 22,
451 24, 26, 28, 30, 33, 35, 37, 39, 41
452};
453
454static const int hsv_red_y[] = {
455 82, 80, 78, 76, 74, 73, 71, 69,
456 67, 65, 63, 61, 58, 56, 54, 52,
457 50, 48, 46, 44, 41, 39, 37, 35,
458 32, 30, 28, 26, 23, 21, 19, 16,
459 14, 12, 10, 7, 5, 3, 0, -1,
460 -3, -6, -8, -10, -13, -15, -17, -19,
461 -22, -24, -26, -29, -31, -33, -35, -38,
462 -40, -42, -44, -46, -48, -51, -53, -55,
463 -57, -59, -61, -63, -65, -67, -69, -71,
464 -73, -75, -77, -79, -81, -82, -84, -86,
465 -88, -89, -91, -93, -94, -96, -98, -99,
466 -101, -102, -104, -105, -106, -108, -109, -110,
467 -112, -113, -114, -115, -116, -117, -119, -120,
468 -120, -121, -122, -123, -124, -125, -126, -126,
469 -127, -128, -128, -128, -128, -128, -128, -128,
470 -128, -128, -128, -128, -128, -128, -128, -128,
471 -128, -128, -128, -128, -128, -128, -128, -128,
472 -128, -128, -128, -128, -128, -128, -128, -128,
473 -127, -127, -126, -125, -125, -124, -123, -122,
474 -121, -120, -119, -118, -117, -116, -115, -114,
475 -113, -111, -110, -109, -107, -106, -105, -103,
476 -102, -100, -99, -97, -96, -94, -92, -91,
477 -89, -87, -85, -84, -82, -80, -78, -76,
478 -74, -73, -71, -69, -67, -65, -63, -61,
479 -58, -56, -54, -52, -50, -48, -46, -44,
480 -41, -39, -37, -35, -32, -30, -28, -26,
481 -23, -21, -19, -16, -14, -12, -10, -7,
482 -5, -3, 0, 1, 3, 6, 8, 10,
483 13, 15, 17, 19, 22, 24, 26, 29,
484 31, 33, 35, 38, 40, 42, 44, 46,
485 48, 51, 53, 55, 57, 59, 61, 63,
486 65, 67, 69, 71, 73, 75, 77, 79,
487 81, 82, 84, 86, 88, 89, 91, 93,
488 94, 96, 98, 99, 101, 102, 104, 105,
489 106, 108, 109, 110, 112, 113, 114, 115,
490 116, 117, 119, 120, 120, 121, 122, 123,
491 124, 125, 126, 126, 127, 128, 128, 129,
492 129, 130, 130, 131, 131, 131, 131, 132,
493 132, 132, 132, 132, 132, 132, 132, 132,
494 132, 132, 132, 131, 131, 131, 130, 130,
495 130, 129, 129, 128, 127, 127, 126, 125,
496 125, 124, 123, 122, 121, 120, 119, 118,
497 117, 116, 115, 114, 113, 111, 110, 109,
498 107, 106, 105, 103, 102, 100, 99, 97,
499 96, 94, 92, 91, 89, 87, 85, 84, 82
500};
501
502static const int hsv_green_x[] = {
503 -124, -124, -125, -125, -125, -125, -125, -125,
504 -125, -126, -126, -125, -125, -125, -125, -125,
505 -125, -124, -124, -124, -123, -123, -122, -122,
506 -121, -121, -120, -120, -119, -118, -117, -117,
507 -116, -115, -114, -113, -112, -111, -110, -109,
508 -108, -107, -105, -104, -103, -102, -100, -99,
509 -98, -96, -95, -93, -92, -91, -89, -87,
510 -86, -84, -83, -81, -79, -77, -76, -74,
511 -72, -70, -69, -67, -65, -63, -61, -59,
512 -57, -55, -53, -51, -49, -47, -45, -43,
513 -41, -39, -37, -35, -33, -30, -28, -26,
514 -24, -22, -20, -18, -15, -13, -11, -9,
515 -7, -4, -2, 0, 1, 3, 6, 8,
516 10, 12, 14, 17, 19, 21, 23, 25,
517 27, 29, 32, 34, 36, 38, 40, 42,
518 44, 46, 48, 50, 52, 54, 56, 58,
519 60, 62, 64, 66, 68, 70, 71, 73,
520 75, 77, 78, 80, 82, 83, 85, 87,
521 88, 90, 91, 93, 94, 96, 97, 98,
522 100, 101, 102, 104, 105, 106, 107, 108,
523 109, 111, 112, 113, 113, 114, 115, 116,
524 117, 118, 118, 119, 120, 120, 121, 122,
525 122, 123, 123, 124, 124, 124, 125, 125,
526 125, 125, 125, 125, 125, 126, 126, 125,
527 125, 125, 125, 125, 125, 124, 124, 124,
528 123, 123, 122, 122, 121, 121, 120, 120,
529 119, 118, 117, 117, 116, 115, 114, 113,
530 112, 111, 110, 109, 108, 107, 105, 104,
531 103, 102, 100, 99, 98, 96, 95, 93,
532 92, 91, 89, 87, 86, 84, 83, 81,
533 79, 77, 76, 74, 72, 70, 69, 67,
534 65, 63, 61, 59, 57, 55, 53, 51,
535 49, 47, 45, 43, 41, 39, 37, 35,
536 33, 30, 28, 26, 24, 22, 20, 18,
537 15, 13, 11, 9, 7, 4, 2, 0,
538 -1, -3, -6, -8, -10, -12, -14, -17,
539 -19, -21, -23, -25, -27, -29, -32, -34,
540 -36, -38, -40, -42, -44, -46, -48, -50,
541 -52, -54, -56, -58, -60, -62, -64, -66,
542 -68, -70, -71, -73, -75, -77, -78, -80,
543 -82, -83, -85, -87, -88, -90, -91, -93,
544 -94, -96, -97, -98, -100, -101, -102, -104,
545 -105, -106, -107, -108, -109, -111, -112, -113,
546 -113, -114, -115, -116, -117, -118, -118, -119,
547 -120, -120, -121, -122, -122, -123, -123, -124, -124
548};
549
550static const int hsv_green_y[] = {
551 -100, -99, -98, -97, -95, -94, -93, -91,
552 -90, -89, -87, -86, -84, -83, -81, -80,
553 -78, -76, -75, -73, -71, -70, -68, -66,
554 -64, -63, -61, -59, -57, -55, -53, -51,
555 -49, -48, -46, -44, -42, -40, -38, -36,
556 -34, -32, -30, -27, -25, -23, -21, -19,
557 -17, -15, -13, -11, -9, -7, -4, -2,
558 0, 1, 3, 5, 7, 9, 11, 14,
559 16, 18, 20, 22, 24, 26, 28, 30,
560 32, 34, 36, 38, 40, 42, 44, 46,
561 48, 50, 52, 54, 56, 58, 59, 61,
562 63, 65, 67, 68, 70, 72, 74, 75,
563 77, 78, 80, 82, 83, 85, 86, 88,
564 89, 90, 92, 93, 95, 96, 97, 98,
565 100, 101, 102, 103, 104, 105, 106, 107,
566 108, 109, 110, 111, 112, 112, 113, 114,
567 115, 115, 116, 116, 117, 117, 118, 118,
568 119, 119, 119, 120, 120, 120, 120, 120,
569 121, 121, 121, 121, 121, 121, 120, 120,
570 120, 120, 120, 119, 119, 119, 118, 118,
571 117, 117, 116, 116, 115, 114, 114, 113,
572 112, 111, 111, 110, 109, 108, 107, 106,
573 105, 104, 103, 102, 100, 99, 98, 97,
574 95, 94, 93, 91, 90, 89, 87, 86,
575 84, 83, 81, 80, 78, 76, 75, 73,
576 71, 70, 68, 66, 64, 63, 61, 59,
577 57, 55, 53, 51, 49, 48, 46, 44,
578 42, 40, 38, 36, 34, 32, 30, 27,
579 25, 23, 21, 19, 17, 15, 13, 11,
580 9, 7, 4, 2, 0, -1, -3, -5,
581 -7, -9, -11, -14, -16, -18, -20, -22,
582 -24, -26, -28, -30, -32, -34, -36, -38,
583 -40, -42, -44, -46, -48, -50, -52, -54,
584 -56, -58, -59, -61, -63, -65, -67, -68,
585 -70, -72, -74, -75, -77, -78, -80, -82,
586 -83, -85, -86, -88, -89, -90, -92, -93,
587 -95, -96, -97, -98, -100, -101, -102, -103,
588 -104, -105, -106, -107, -108, -109, -110, -111,
589 -112, -112, -113, -114, -115, -115, -116, -116,
590 -117, -117, -118, -118, -119, -119, -119, -120,
591 -120, -120, -120, -120, -121, -121, -121, -121,
592 -121, -121, -120, -120, -120, -120, -120, -119,
593 -119, -119, -118, -118, -117, -117, -116, -116,
594 -115, -114, -114, -113, -112, -111, -111, -110,
595 -109, -108, -107, -106, -105, -104, -103, -102, -100
596};
597
598static const int hsv_blue_x[] = {
599 112, 113, 114, 114, 115, 116, 117, 117,
600 118, 118, 119, 119, 120, 120, 120, 121,
601 121, 121, 122, 122, 122, 122, 122, 122,
602 122, 122, 122, 122, 122, 122, 121, 121,
603 121, 120, 120, 120, 119, 119, 118, 118,
604 117, 116, 116, 115, 114, 113, 113, 112,
605 111, 110, 109, 108, 107, 106, 105, 104,
606 103, 102, 100, 99, 98, 97, 95, 94,
607 93, 91, 90, 88, 87, 85, 84, 82,
608 80, 79, 77, 76, 74, 72, 70, 69,
609 67, 65, 63, 61, 60, 58, 56, 54,
610 52, 50, 48, 46, 44, 42, 40, 38,
611 36, 34, 32, 30, 28, 26, 24, 22,
612 19, 17, 15, 13, 11, 9, 7, 5,
613 2, 0, -1, -3, -5, -7, -9, -12,
614 -14, -16, -18, -20, -22, -24, -26, -28,
615 -31, -33, -35, -37, -39, -41, -43, -45,
616 -47, -49, -51, -53, -54, -56, -58, -60,
617 -62, -64, -66, -67, -69, -71, -73, -74,
618 -76, -78, -79, -81, -83, -84, -86, -87,
619 -89, -90, -92, -93, -94, -96, -97, -98,
620 -99, -101, -102, -103, -104, -105, -106, -107,
621 -108, -109, -110, -111, -112, -113, -114, -114,
622 -115, -116, -117, -117, -118, -118, -119, -119,
623 -120, -120, -120, -121, -121, -121, -122, -122,
624 -122, -122, -122, -122, -122, -122, -122, -122,
625 -122, -122, -121, -121, -121, -120, -120, -120,
626 -119, -119, -118, -118, -117, -116, -116, -115,
627 -114, -113, -113, -112, -111, -110, -109, -108,
628 -107, -106, -105, -104, -103, -102, -100, -99,
629 -98, -97, -95, -94, -93, -91, -90, -88,
630 -87, -85, -84, -82, -80, -79, -77, -76,
631 -74, -72, -70, -69, -67, -65, -63, -61,
632 -60, -58, -56, -54, -52, -50, -48, -46,
633 -44, -42, -40, -38, -36, -34, -32, -30,
634 -28, -26, -24, -22, -19, -17, -15, -13,
635 -11, -9, -7, -5, -2, 0, 1, 3,
636 5, 7, 9, 12, 14, 16, 18, 20,
637 22, 24, 26, 28, 31, 33, 35, 37,
638 39, 41, 43, 45, 47, 49, 51, 53,
639 54, 56, 58, 60, 62, 64, 66, 67,
640 69, 71, 73, 74, 76, 78, 79, 81,
641 83, 84, 86, 87, 89, 90, 92, 93,
642 94, 96, 97, 98, 99, 101, 102, 103,
643 104, 105, 106, 107, 108, 109, 110, 111, 112
644};
645
646static const int hsv_blue_y[] = {
647 -11, -13, -15, -17, -19, -21, -23, -25,
648 -27, -29, -31, -33, -35, -37, -39, -41,
649 -43, -45, -46, -48, -50, -52, -54, -55,
650 -57, -59, -61, -62, -64, -66, -67, -69,
651 -71, -72, -74, -75, -77, -78, -80, -81,
652 -83, -84, -86, -87, -88, -90, -91, -92,
653 -93, -95, -96, -97, -98, -99, -100, -101,
654 -102, -103, -104, -105, -106, -106, -107, -108,
655 -109, -109, -110, -111, -111, -112, -112, -113,
656 -113, -114, -114, -114, -115, -115, -115, -115,
657 -116, -116, -116, -116, -116, -116, -116, -116,
658 -116, -115, -115, -115, -115, -114, -114, -114,
659 -113, -113, -112, -112, -111, -111, -110, -110,
660 -109, -108, -108, -107, -106, -105, -104, -103,
661 -102, -101, -100, -99, -98, -97, -96, -95,
662 -94, -93, -91, -90, -89, -88, -86, -85,
663 -84, -82, -81, -79, -78, -76, -75, -73,
664 -71, -70, -68, -67, -65, -63, -62, -60,
665 -58, -56, -55, -53, -51, -49, -47, -45,
666 -44, -42, -40, -38, -36, -34, -32, -30,
667 -28, -26, -24, -22, -20, -18, -16, -14,
668 -12, -10, -8, -6, -4, -2, 0, 1,
669 3, 5, 7, 9, 11, 13, 15, 17,
670 19, 21, 23, 25, 27, 29, 31, 33,
671 35, 37, 39, 41, 43, 45, 46, 48,
672 50, 52, 54, 55, 57, 59, 61, 62,
673 64, 66, 67, 69, 71, 72, 74, 75,
674 77, 78, 80, 81, 83, 84, 86, 87,
675 88, 90, 91, 92, 93, 95, 96, 97,
676 98, 99, 100, 101, 102, 103, 104, 105,
677 106, 106, 107, 108, 109, 109, 110, 111,
678 111, 112, 112, 113, 113, 114, 114, 114,
679 115, 115, 115, 115, 116, 116, 116, 116,
680 116, 116, 116, 116, 116, 115, 115, 115,
681 115, 114, 114, 114, 113, 113, 112, 112,
682 111, 111, 110, 110, 109, 108, 108, 107,
683 106, 105, 104, 103, 102, 101, 100, 99,
684 98, 97, 96, 95, 94, 93, 91, 90,
685 89, 88, 86, 85, 84, 82, 81, 79,
686 78, 76, 75, 73, 71, 70, 68, 67,
687 65, 63, 62, 60, 58, 56, 55, 53,
688 51, 49, 47, 45, 44, 42, 40, 38,
689 36, 34, 32, 30, 28, 26, 24, 22,
690 20, 18, 16, 14, 12, 10, 8, 6,
691 4, 2, 0, -1, -3, -5, -7, -9, -11
692};
693
694static u16 i2c_ident[] = {
695 V4L2_IDENT_OV9650,
696 V4L2_IDENT_OV9655,
697 V4L2_IDENT_SOI968,
698 V4L2_IDENT_OV7660,
699 V4L2_IDENT_OV7670,
700 V4L2_IDENT_MT9V011,
701 V4L2_IDENT_MT9V111,
702 V4L2_IDENT_MT9V112,
703 V4L2_IDENT_MT9M001C12ST,
704 V4L2_IDENT_MT9M111,
705 V4L2_IDENT_HV7131R,
706};
707
708static u16 bridge_init[][2] = {
709 {0x1000, 0x78}, {0x1001, 0x40}, {0x1002, 0x1c},
710 {0x1020, 0x80}, {0x1061, 0x01}, {0x1067, 0x40},
711 {0x1068, 0x30}, {0x1069, 0x20}, {0x106a, 0x10},
712 {0x106b, 0x08}, {0x1188, 0x87}, {0x11a1, 0x00},
713 {0x11a2, 0x00}, {0x11a3, 0x6a}, {0x11a4, 0x50},
714 {0x11ab, 0x00}, {0x11ac, 0x00}, {0x11ad, 0x50},
715 {0x11ae, 0x3c}, {0x118a, 0x04}, {0x0395, 0x04},
716 {0x11b8, 0x3a}, {0x118b, 0x0e}, {0x10f7, 0x05},
717 {0x10f8, 0x14}, {0x10fa, 0xff}, {0x10f9, 0x00},
718 {0x11ba, 0x0a}, {0x11a5, 0x2d}, {0x11a6, 0x2d},
719 {0x11a7, 0x3a}, {0x11a8, 0x05}, {0x11a9, 0x04},
720 {0x11aa, 0x3f}, {0x11af, 0x28}, {0x11b0, 0xd8},
721 {0x11b1, 0x14}, {0x11b2, 0xec}, {0x11b3, 0x32},
722 {0x11b4, 0xdd}, {0x11b5, 0x32}, {0x11b6, 0xdd},
723 {0x10e0, 0x2c}, {0x11bc, 0x40}, {0x11bd, 0x01},
724 {0x11be, 0xf0}, {0x11bf, 0x00}, {0x118c, 0x1f},
725 {0x118d, 0x1f}, {0x118e, 0x1f}, {0x118f, 0x1f},
726 {0x1180, 0x01}, {0x1181, 0x00}, {0x1182, 0x01},
727 {0x1183, 0x00}, {0x1184, 0x50}, {0x1185, 0x80}
728};
729
730/* Gain = (bit[3:0] / 16 + 1) * (bit[4] + 1) * (bit[5] + 1) * (bit[6] + 1) */
731static u8 ov_gain[] = {
732 0x00 /* 1x */, 0x04 /* 1.25x */, 0x08 /* 1.5x */, 0x0c /* 1.75x */,
733 0x10 /* 2x */, 0x12 /* 2.25x */, 0x14 /* 2.5x */, 0x16 /* 2.75x */,
734 0x18 /* 3x */, 0x1a /* 3.25x */, 0x1c /* 3.5x */, 0x1e /* 3.75x */,
735 0x30 /* 4x */, 0x31 /* 4.25x */, 0x32 /* 4.5x */, 0x33 /* 4.75x */,
736 0x34 /* 5x */, 0x35 /* 5.25x */, 0x36 /* 5.5x */, 0x37 /* 5.75x */,
737 0x38 /* 6x */, 0x39 /* 6.25x */, 0x3a /* 6.5x */, 0x3b /* 6.75x */,
738 0x3c /* 7x */, 0x3d /* 7.25x */, 0x3e /* 7.5x */, 0x3f /* 7.75x */,
739 0x70 /* 8x */
740};
741
742/* Gain = (bit[8] + 1) * (bit[7] + 1) * (bit[6:0] * 0.03125) */
743static u16 micron1_gain[] = {
744 /* 1x 1.25x 1.5x 1.75x */
745 0x0020, 0x0028, 0x0030, 0x0038,
746 /* 2x 2.25x 2.5x 2.75x */
747 0x00a0, 0x00a4, 0x00a8, 0x00ac,
748 /* 3x 3.25x 3.5x 3.75x */
749 0x00b0, 0x00b4, 0x00b8, 0x00bc,
750 /* 4x 4.25x 4.5x 4.75x */
751 0x00c0, 0x00c4, 0x00c8, 0x00cc,
752 /* 5x 5.25x 5.5x 5.75x */
753 0x00d0, 0x00d4, 0x00d8, 0x00dc,
754 /* 6x 6.25x 6.5x 6.75x */
755 0x00e0, 0x00e4, 0x00e8, 0x00ec,
756 /* 7x 7.25x 7.5x 7.75x */
757 0x00f0, 0x00f4, 0x00f8, 0x00fc,
758 /* 8x */
759 0x01c0
760};
761
762/* mt9m001 sensor uses a different gain formula then other micron sensors */
763/* Gain = (bit[6] + 1) * (bit[5-0] * 0.125) */
764static u16 micron2_gain[] = {
765 /* 1x 1.25x 1.5x 1.75x */
766 0x0008, 0x000a, 0x000c, 0x000e,
767 /* 2x 2.25x 2.5x 2.75x */
768 0x0010, 0x0012, 0x0014, 0x0016,
769 /* 3x 3.25x 3.5x 3.75x */
770 0x0018, 0x001a, 0x001c, 0x001e,
771 /* 4x 4.25x 4.5x 4.75x */
772 0x0020, 0x0051, 0x0052, 0x0053,
773 /* 5x 5.25x 5.5x 5.75x */
774 0x0054, 0x0055, 0x0056, 0x0057,
775 /* 6x 6.25x 6.5x 6.75x */
776 0x0058, 0x0059, 0x005a, 0x005b,
777 /* 7x 7.25x 7.5x 7.75x */
778 0x005c, 0x005d, 0x005e, 0x005f,
779 /* 8x */
780 0x0060
781};
782
783/* Gain = .5 + bit[7:0] / 16 */
784static u8 hv7131r_gain[] = {
785 0x08 /* 1x */, 0x0c /* 1.25x */, 0x10 /* 1.5x */, 0x14 /* 1.75x */,
786 0x18 /* 2x */, 0x1c /* 2.25x */, 0x20 /* 2.5x */, 0x24 /* 2.75x */,
787 0x28 /* 3x */, 0x2c /* 3.25x */, 0x30 /* 3.5x */, 0x34 /* 3.75x */,
788 0x38 /* 4x */, 0x3c /* 4.25x */, 0x40 /* 4.5x */, 0x44 /* 4.75x */,
789 0x48 /* 5x */, 0x4c /* 5.25x */, 0x50 /* 5.5x */, 0x54 /* 5.75x */,
790 0x58 /* 6x */, 0x5c /* 6.25x */, 0x60 /* 6.5x */, 0x64 /* 6.75x */,
791 0x68 /* 7x */, 0x6c /* 7.25x */, 0x70 /* 7.5x */, 0x74 /* 7.75x */,
792 0x78 /* 8x */
793};
794
795static u8 soi968_init[][2] = {
796 {0x12, 0x80}, {0x0c, 0x00}, {0x0f, 0x1f},
797 {0x11, 0x80}, {0x38, 0x52}, {0x1e, 0x00},
798 {0x33, 0x08}, {0x35, 0x8c}, {0x36, 0x0c},
799 {0x37, 0x04}, {0x45, 0x04}, {0x47, 0xff},
800 {0x3e, 0x00}, {0x3f, 0x00}, {0x3b, 0x20},
801 {0x3a, 0x96}, {0x3d, 0x0a}, {0x14, 0x8e},
802 {0x13, 0x8a}, {0x12, 0x40}, {0x17, 0x13},
803 {0x18, 0x63}, {0x19, 0x01}, {0x1a, 0x79},
804 {0x32, 0x24}, {0x03, 0x00}, {0x11, 0x40},
805 {0x2a, 0x10}, {0x2b, 0xe0}, {0x10, 0x32},
806 {0x00, 0x00}, {0x01, 0x80}, {0x02, 0x80},
807};
808
809static u8 ov7660_init[][2] = {
810 {0x0e, 0x80}, {0x0d, 0x08}, {0x0f, 0xc3},
811 {0x04, 0xc3}, {0x10, 0x40}, {0x11, 0x40},
812 {0x12, 0x05}, {0x13, 0xba}, {0x14, 0x2a},
813 {0x37, 0x0f}, {0x38, 0x02}, {0x39, 0x43},
814 {0x3a, 0x00}, {0x69, 0x90}, {0x2d, 0xf6},
815 {0x2e, 0x0b}, {0x01, 0x78}, {0x02, 0x50},
816};
817
818static u8 ov7670_init[][2] = {
819 {0x12, 0x80}, {0x11, 0x80}, {0x3a, 0x04}, {0x12, 0x01},
820 {0x32, 0xb6}, {0x03, 0x0a}, {0x0c, 0x00}, {0x3e, 0x00},
821 {0x70, 0x3a}, {0x71, 0x35}, {0x72, 0x11}, {0x73, 0xf0},
822 {0xa2, 0x02}, {0x13, 0xe0}, {0x00, 0x00}, {0x10, 0x00},
823 {0x0d, 0x40}, {0x14, 0x28}, {0xa5, 0x05}, {0xab, 0x07},
824 {0x24, 0x95}, {0x25, 0x33}, {0x26, 0xe3}, {0x9f, 0x75},
825 {0xa0, 0x65}, {0xa1, 0x0b}, {0xa6, 0xd8}, {0xa7, 0xd8},
826 {0xa8, 0xf0}, {0xa9, 0x90}, {0xaa, 0x94}, {0x13, 0xe5},
827 {0x0e, 0x61}, {0x0f, 0x4b}, {0x16, 0x02}, {0x1e, 0x27},
828 {0x21, 0x02}, {0x22, 0x91}, {0x29, 0x07}, {0x33, 0x0b},
829 {0x35, 0x0b}, {0x37, 0x1d}, {0x38, 0x71}, {0x39, 0x2a},
830 {0x3c, 0x78}, {0x4d, 0x40}, {0x4e, 0x20}, {0x69, 0x00},
831 {0x74, 0x19}, {0x8d, 0x4f}, {0x8e, 0x00}, {0x8f, 0x00},
832 {0x90, 0x00}, {0x91, 0x00}, {0x96, 0x00}, {0x9a, 0x80},
833 {0xb0, 0x84}, {0xb1, 0x0c}, {0xb2, 0x0e}, {0xb3, 0x82},
834 {0xb8, 0x0a}, {0x43, 0x0a}, {0x44, 0xf0}, {0x45, 0x20},
835 {0x46, 0x7d}, {0x47, 0x29}, {0x48, 0x4a}, {0x59, 0x8c},
836 {0x5a, 0xa5}, {0x5b, 0xde}, {0x5c, 0x96}, {0x5d, 0x66},
837 {0x5e, 0x10}, {0x6c, 0x0a}, {0x6d, 0x55}, {0x6e, 0x11},
838 {0x6f, 0x9e}, {0x6a, 0x40}, {0x01, 0x40}, {0x02, 0x40},
839 {0x13, 0xe7}, {0x4f, 0x6e}, {0x50, 0x70}, {0x51, 0x02},
840 {0x52, 0x1d}, {0x53, 0x56}, {0x54, 0x73}, {0x55, 0x0a},
841 {0x56, 0x55}, {0x57, 0x80}, {0x58, 0x9e}, {0x41, 0x08},
842 {0x3f, 0x02}, {0x75, 0x03}, {0x76, 0x63}, {0x4c, 0x04},
843 {0x77, 0x06}, {0x3d, 0x02}, {0x4b, 0x09}, {0xc9, 0x30},
844 {0x41, 0x08}, {0x56, 0x48}, {0x34, 0x11}, {0xa4, 0x88},
845 {0x96, 0x00}, {0x97, 0x30}, {0x98, 0x20}, {0x99, 0x30},
846 {0x9a, 0x84}, {0x9b, 0x29}, {0x9c, 0x03}, {0x9d, 0x99},
847 {0x9e, 0x7f}, {0x78, 0x04}, {0x79, 0x01}, {0xc8, 0xf0},
848 {0x79, 0x0f}, {0xc8, 0x00}, {0x79, 0x10}, {0xc8, 0x7e},
849 {0x79, 0x0a}, {0xc8, 0x80}, {0x79, 0x0b}, {0xc8, 0x01},
850 {0x79, 0x0c}, {0xc8, 0x0f}, {0x79, 0x0d}, {0xc8, 0x20},
851 {0x79, 0x09}, {0xc8, 0x80}, {0x79, 0x02}, {0xc8, 0xc0},
852 {0x79, 0x03}, {0xc8, 0x40}, {0x79, 0x05}, {0xc8, 0x30},
853 {0x79, 0x26}, {0x62, 0x20}, {0x63, 0x00}, {0x64, 0x06},
854 {0x65, 0x00}, {0x66, 0x05}, {0x94, 0x05}, {0x95, 0x0a},
855 {0x17, 0x13}, {0x18, 0x01}, {0x19, 0x02}, {0x1a, 0x7a},
856 {0x46, 0x59}, {0x47, 0x30}, {0x58, 0x9a}, {0x59, 0x84},
857 {0x5a, 0x91}, {0x5b, 0x57}, {0x5c, 0x75}, {0x5d, 0x6d},
858 {0x5e, 0x13}, {0x64, 0x07}, {0x94, 0x07}, {0x95, 0x0d},
859 {0xa6, 0xdf}, {0xa7, 0xdf}, {0x48, 0x4d}, {0x51, 0x00},
860 {0x6b, 0x0a}, {0x11, 0x80}, {0x2a, 0x00}, {0x2b, 0x00},
861 {0x92, 0x00}, {0x93, 0x00}, {0x55, 0x0a}, {0x56, 0x60},
862 {0x4f, 0x6e}, {0x50, 0x70}, {0x51, 0x00}, {0x52, 0x1d},
863 {0x53, 0x56}, {0x54, 0x73}, {0x58, 0x9a}, {0x4f, 0x6e},
864 {0x50, 0x70}, {0x51, 0x00}, {0x52, 0x1d}, {0x53, 0x56},
865 {0x54, 0x73}, {0x58, 0x9a}, {0x3f, 0x01}, {0x7b, 0x03},
866 {0x7c, 0x09}, {0x7d, 0x16}, {0x7e, 0x38}, {0x7f, 0x47},
867 {0x80, 0x53}, {0x81, 0x5e}, {0x82, 0x6a}, {0x83, 0x74},
868 {0x84, 0x80}, {0x85, 0x8c}, {0x86, 0x9b}, {0x87, 0xb2},
869 {0x88, 0xcc}, {0x89, 0xe5}, {0x7a, 0x24}, {0x3b, 0x00},
870 {0x9f, 0x76}, {0xa0, 0x65}, {0x13, 0xe2}, {0x6b, 0x0a},
871 {0x11, 0x80}, {0x2a, 0x00}, {0x2b, 0x00}, {0x92, 0x00},
872 {0x93, 0x00},
873};
874
875static u8 ov9650_init[][2] = {
876 {0x12, 0x80}, {0x00, 0x00}, {0x01, 0x78},
877 {0x02, 0x78}, {0x03, 0x36}, {0x04, 0x03},
878 {0x05, 0x00}, {0x06, 0x00}, {0x08, 0x00},
879 {0x09, 0x01}, {0x0c, 0x00}, {0x0d, 0x00},
880 {0x0e, 0xa0}, {0x0f, 0x52}, {0x10, 0x7c},
881 {0x11, 0x80}, {0x12, 0x45}, {0x13, 0xc2},
882 {0x14, 0x2e}, {0x15, 0x00}, {0x16, 0x07},
883 {0x17, 0x24}, {0x18, 0xc5}, {0x19, 0x00},
884 {0x1a, 0x3c}, {0x1b, 0x00}, {0x1e, 0x04},
885 {0x1f, 0x00}, {0x24, 0x78}, {0x25, 0x68},
886 {0x26, 0xd4}, {0x27, 0x80}, {0x28, 0x80},
887 {0x29, 0x30}, {0x2a, 0x00}, {0x2b, 0x00},
888 {0x2c, 0x80}, {0x2d, 0x00}, {0x2e, 0x00},
889 {0x2f, 0x00}, {0x30, 0x08}, {0x31, 0x30},
890 {0x32, 0x84}, {0x33, 0xe2}, {0x34, 0xbf},
891 {0x35, 0x81}, {0x36, 0xf9}, {0x37, 0x00},
892 {0x38, 0x93}, {0x39, 0x50}, {0x3a, 0x01},
893 {0x3b, 0x01}, {0x3c, 0x73}, {0x3d, 0x19},
894 {0x3e, 0x0b}, {0x3f, 0x80}, {0x40, 0xc1},
895 {0x41, 0x00}, {0x42, 0x08}, {0x67, 0x80},
896 {0x68, 0x80}, {0x69, 0x40}, {0x6a, 0x00},
897 {0x6b, 0x0a}, {0x8b, 0x06}, {0x8c, 0x20},
898 {0x8d, 0x00}, {0x8e, 0x00}, {0x8f, 0xdf},
899 {0x92, 0x00}, {0x93, 0x00}, {0x94, 0x88},
900 {0x95, 0x88}, {0x96, 0x04}, {0xa1, 0x00},
901 {0xa5, 0x80}, {0xa8, 0x80}, {0xa9, 0xb8},
902 {0xaa, 0x92}, {0xab, 0x0a},
903};
904
905static u8 ov9655_init[][2] = {
906 {0x12, 0x80}, {0x12, 0x01}, {0x0d, 0x00}, {0x0e, 0x61},
907 {0x11, 0x80}, {0x13, 0xba}, {0x14, 0x2e}, {0x16, 0x24},
908 {0x1e, 0x04}, {0x1e, 0x04}, {0x1e, 0x04}, {0x27, 0x08},
909 {0x28, 0x08}, {0x29, 0x15}, {0x2c, 0x08}, {0x32, 0xbf},
910 {0x34, 0x3d}, {0x35, 0x00}, {0x36, 0xf8}, {0x38, 0x12},
911 {0x39, 0x57}, {0x3a, 0x00}, {0x3b, 0xcc}, {0x3c, 0x0c},
912 {0x3d, 0x19}, {0x3e, 0x0c}, {0x3f, 0x01}, {0x41, 0x40},
913 {0x42, 0x80}, {0x45, 0x46}, {0x46, 0x62}, {0x47, 0x2a},
914 {0x48, 0x3c}, {0x4a, 0xf0}, {0x4b, 0xdc}, {0x4c, 0xdc},
915 {0x4d, 0xdc}, {0x4e, 0xdc}, {0x69, 0x02}, {0x6c, 0x04},
916 {0x6f, 0x9e}, {0x70, 0x05}, {0x71, 0x78}, {0x77, 0x02},
917 {0x8a, 0x23}, {0x8c, 0x0d}, {0x90, 0x7e}, {0x91, 0x7c},
918 {0x9f, 0x6e}, {0xa0, 0x6e}, {0xa5, 0x68}, {0xa6, 0x60},
919 {0xa8, 0xc1}, {0xa9, 0xfa}, {0xaa, 0x92}, {0xab, 0x04},
920 {0xac, 0x80}, {0xad, 0x80}, {0xae, 0x80}, {0xaf, 0x80},
921 {0xb2, 0xf2}, {0xb3, 0x20}, {0xb5, 0x00}, {0xb6, 0xaf},
922 {0xbb, 0xae}, {0xbc, 0x44}, {0xbd, 0x44}, {0xbe, 0x3b},
923 {0xbf, 0x3a}, {0xc0, 0xe2}, {0xc1, 0xc8}, {0xc2, 0x01},
924 {0xc4, 0x00}, {0xc6, 0x85}, {0xc7, 0x81}, {0xc9, 0xe0},
925 {0xca, 0xe8}, {0xcc, 0xd8}, {0xcd, 0x93}, {0x12, 0x61},
926 {0x36, 0xfa}, {0x8c, 0x8d}, {0xc0, 0xaa}, {0x69, 0x0a},
927 {0x03, 0x12}, {0x17, 0x14}, {0x18, 0x00}, {0x19, 0x01},
928 {0x1a, 0x3d}, {0x32, 0xbf}, {0x11, 0x80}, {0x2a, 0x10},
929 {0x2b, 0x0a}, {0x92, 0x00}, {0x93, 0x00}, {0x1e, 0x04},
930 {0x1e, 0x04}, {0x10, 0x7c}, {0x04, 0x03}, {0xa1, 0x00},
931 {0x2d, 0x00}, {0x2e, 0x00}, {0x00, 0x00}, {0x01, 0x80},
932 {0x02, 0x80}, {0x12, 0x61}, {0x36, 0xfa}, {0x8c, 0x8d},
933 {0xc0, 0xaa}, {0x69, 0x0a}, {0x03, 0x12}, {0x17, 0x14},
934 {0x18, 0x00}, {0x19, 0x01}, {0x1a, 0x3d}, {0x32, 0xbf},
935 {0x11, 0x80}, {0x2a, 0x10}, {0x2b, 0x0a}, {0x92, 0x00},
936 {0x93, 0x00}, {0x04, 0x01}, {0x10, 0x1f}, {0xa1, 0x00},
937 {0x00, 0x0a}, {0xa1, 0x00}, {0x10, 0x5d}, {0x04, 0x03},
938 {0x00, 0x01}, {0xa1, 0x00}, {0x10, 0x7c}, {0x04, 0x03},
939 {0x00, 0x03}, {0x00, 0x0a}, {0x00, 0x10}, {0x00, 0x13},
940};
941
942static u16 mt9v112_init[][2] = {
943 {0xf0, 0x0000}, {0x0d, 0x0021}, {0x0d, 0x0020},
944 {0x34, 0xc019}, {0x0a, 0x0011}, {0x0b, 0x000b},
945 {0x20, 0x0703}, {0x35, 0x2022}, {0xf0, 0x0001},
946 {0x05, 0x0000}, {0x06, 0x340c}, {0x3b, 0x042a},
947 {0x3c, 0x0400}, {0xf0, 0x0002}, {0x2e, 0x0c58},
948 {0x5b, 0x0001}, {0xc8, 0x9f0b}, {0xf0, 0x0001},
949 {0x9b, 0x5300}, {0xf0, 0x0000}, {0x2b, 0x0020},
950 {0x2c, 0x002a}, {0x2d, 0x0032}, {0x2e, 0x0020},
951 {0x09, 0x01dc}, {0x01, 0x000c}, {0x02, 0x0020},
952 {0x03, 0x01e0}, {0x04, 0x0280}, {0x06, 0x000c},
953 {0x05, 0x0098}, {0x20, 0x0703}, {0x09, 0x01f2},
954 {0x2b, 0x00a0}, {0x2c, 0x00a0}, {0x2d, 0x00a0},
955 {0x2e, 0x00a0}, {0x01, 0x000c}, {0x02, 0x0020},
956 {0x03, 0x01e0}, {0x04, 0x0280}, {0x06, 0x000c},
957 {0x05, 0x0098}, {0x09, 0x01c1}, {0x2b, 0x00ae},
958 {0x2c, 0x00ae}, {0x2d, 0x00ae}, {0x2e, 0x00ae},
959};
960
961static u16 mt9v111_init[][2] = {
962 {0x01, 0x0004}, {0x0d, 0x0001}, {0x0d, 0x0000},
963 {0x01, 0x0001}, {0x02, 0x0016}, {0x03, 0x01e1},
964 {0x04, 0x0281}, {0x05, 0x0004}, {0x07, 0x3002},
965 {0x21, 0x0000}, {0x25, 0x4024}, {0x26, 0xff03},
966 {0x27, 0xff10}, {0x2b, 0x7828}, {0x2c, 0xb43c},
967 {0x2d, 0xf0a0}, {0x2e, 0x0c64}, {0x2f, 0x0064},
968 {0x67, 0x4010}, {0x06, 0x301e}, {0x08, 0x0480},
969 {0x01, 0x0004}, {0x02, 0x0016}, {0x03, 0x01e6},
970 {0x04, 0x0286}, {0x05, 0x0004}, {0x06, 0x0000},
971 {0x07, 0x3002}, {0x08, 0x0008}, {0x0c, 0x0000},
972 {0x0d, 0x0000}, {0x0e, 0x0000}, {0x0f, 0x0000},
973 {0x10, 0x0000}, {0x11, 0x0000}, {0x12, 0x00b0},
974 {0x13, 0x007c}, {0x14, 0x0000}, {0x15, 0x0000},
975 {0x16, 0x0000}, {0x17, 0x0000}, {0x18, 0x0000},
976 {0x19, 0x0000}, {0x1a, 0x0000}, {0x1b, 0x0000},
977 {0x1c, 0x0000}, {0x1d, 0x0000}, {0x30, 0x0000},
978 {0x30, 0x0005}, {0x31, 0x0000}, {0x02, 0x0016},
979 {0x03, 0x01e1}, {0x04, 0x0281}, {0x05, 0x0004},
980 {0x06, 0x0000}, {0x07, 0x3002}, {0x06, 0x002d},
981 {0x05, 0x0004}, {0x09, 0x0064}, {0x2b, 0x00a0},
982 {0x2c, 0x00a0}, {0x2d, 0x00a0}, {0x2e, 0x00a0},
983 {0x02, 0x0016}, {0x03, 0x01e1}, {0x04, 0x0281},
984 {0x05, 0x0004}, {0x06, 0x002d}, {0x07, 0x3002},
985 {0x0e, 0x0008}, {0x06, 0x002d}, {0x05, 0x0004},
986};
987
988static u16 mt9v011_init[][2] = {
989 {0x07, 0x0002}, {0x0d, 0x0001}, {0x0d, 0x0000},
990 {0x01, 0x0008}, {0x02, 0x0016}, {0x03, 0x01e1},
991 {0x04, 0x0281}, {0x05, 0x0083}, {0x06, 0x0006},
992 {0x0d, 0x0002}, {0x0a, 0x0000}, {0x0b, 0x0000},
993 {0x0c, 0x0000}, {0x0d, 0x0000}, {0x0e, 0x0000},
994 {0x0f, 0x0000}, {0x10, 0x0000}, {0x11, 0x0000},
995 {0x12, 0x0000}, {0x13, 0x0000}, {0x14, 0x0000},
996 {0x15, 0x0000}, {0x16, 0x0000}, {0x17, 0x0000},
997 {0x18, 0x0000}, {0x19, 0x0000}, {0x1a, 0x0000},
998 {0x1b, 0x0000}, {0x1c, 0x0000}, {0x1d, 0x0000},
999 {0x32, 0x0000}, {0x20, 0x1101}, {0x21, 0x0000},
1000 {0x22, 0x0000}, {0x23, 0x0000}, {0x24, 0x0000},
1001 {0x25, 0x0000}, {0x26, 0x0000}, {0x27, 0x0024},
1002 {0x2f, 0xf7b0}, {0x30, 0x0005}, {0x31, 0x0000},
1003 {0x32, 0x0000}, {0x33, 0x0000}, {0x34, 0x0100},
1004 {0x3d, 0x068f}, {0x40, 0x01e0}, {0x41, 0x00d1},
1005 {0x44, 0x0082}, {0x5a, 0x0000}, {0x5b, 0x0000},
1006 {0x5c, 0x0000}, {0x5d, 0x0000}, {0x5e, 0x0000},
1007 {0x5f, 0xa31d}, {0x62, 0x0611}, {0x0a, 0x0000},
1008 {0x06, 0x0029}, {0x05, 0x0009}, {0x20, 0x1101},
1009 {0x20, 0x1101}, {0x09, 0x0064}, {0x07, 0x0003},
1010 {0x2b, 0x0033}, {0x2c, 0x00a0}, {0x2d, 0x00a0},
1011 {0x2e, 0x0033}, {0x07, 0x0002}, {0x06, 0x0000},
1012 {0x06, 0x0029}, {0x05, 0x0009},
1013};
1014
1015static u16 mt9m001_init[][2] = {
1016 {0x0d, 0x0001}, {0x0d, 0x0000}, {0x01, 0x000e},
1017 {0x02, 0x0014}, {0x03, 0x03c1}, {0x04, 0x0501},
1018 {0x05, 0x0083}, {0x06, 0x0006}, {0x0d, 0x0002},
1019 {0x0a, 0x0000}, {0x0c, 0x0000}, {0x11, 0x0000},
1020 {0x1e, 0x8000}, {0x5f, 0x8904}, {0x60, 0x0000},
1021 {0x61, 0x0000}, {0x62, 0x0498}, {0x63, 0x0000},
1022 {0x64, 0x0000}, {0x20, 0x111d}, {0x06, 0x00f2},
1023 {0x05, 0x0013}, {0x09, 0x10f2}, {0x07, 0x0003},
1024 {0x2b, 0x002a}, {0x2d, 0x002a}, {0x2c, 0x002a},
1025 {0x2e, 0x0029}, {0x07, 0x0002},
1026};
1027
1028static u16 mt9m111_init[][2] = {
1029 {0xf0, 0x0000}, {0x0d, 0x0008}, {0x0d, 0x0009},
1030 {0x0d, 0x0008}, {0xf0, 0x0001}, {0x3a, 0x4300},
1031 {0x9b, 0x4300}, {0xa1, 0x0280}, {0xa4, 0x0200},
1032 {0x06, 0x308e}, {0xf0, 0x0000},
1033};
1034
1035static u8 hv7131r_init[][2] = {
1036 {0x02, 0x08}, {0x02, 0x00}, {0x01, 0x08},
1037 {0x02, 0x00}, {0x20, 0x00}, {0x21, 0xd0},
1038 {0x22, 0x00}, {0x23, 0x09}, {0x01, 0x08},
1039 {0x01, 0x08}, {0x01, 0x08}, {0x25, 0x07},
1040 {0x26, 0xc3}, {0x27, 0x50}, {0x30, 0x62},
1041 {0x31, 0x10}, {0x32, 0x06}, {0x33, 0x10},
1042 {0x20, 0x00}, {0x21, 0xd0}, {0x22, 0x00},
1043 {0x23, 0x09}, {0x01, 0x08},
1044};
1045
1046int reg_r(struct gspca_dev *gspca_dev, u16 reg, u16 length)
1047{
1048 struct usb_device *dev = gspca_dev->dev;
1049 int result;
1050 result = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0),
1051 0x00,
1052 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
1053 reg,
1054 0x00,
1055 gspca_dev->usb_buf,
1056 length,
1057 500);
1058 if (unlikely(result < 0 || result != length)) {
1059 err("Read register failed 0x%02X", reg);
1060 return -EIO;
1061 }
1062 return 0;
1063}
1064
1065int reg_w(struct gspca_dev *gspca_dev, u16 reg, const u8 *buffer, int length)
1066{
1067 struct usb_device *dev = gspca_dev->dev;
1068 int result;
1069 memcpy(gspca_dev->usb_buf, buffer, length);
1070 result = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
1071 0x08,
1072 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
1073 reg,
1074 0x00,
1075 gspca_dev->usb_buf,
1076 length,
1077 500);
1078 if (unlikely(result < 0 || result != length)) {
1079 err("Write register failed index 0x%02X", reg);
1080 return -EIO;
1081 }
1082 return 0;
1083}
1084
1085int reg_w1(struct gspca_dev *gspca_dev, u16 reg, const u8 value)
1086{
1087 u8 data[1] = {value};
1088 return reg_w(gspca_dev, reg, data, 1);
1089}
1090
1091int i2c_w(struct gspca_dev *gspca_dev, const u8 *buffer)
1092{
1093 int i;
1094 reg_w(gspca_dev, 0x10c0, buffer, 8);
1095 for (i = 0; i < 5; i++) {
1096 reg_r(gspca_dev, 0x10c0, 1);
1097 if (gspca_dev->usb_buf[0] & 0x04) {
1098 if (gspca_dev->usb_buf[0] & 0x08)
1099 return -1;
1100 return 0;
1101 }
1102 msleep(1);
1103 }
1104 return -1;
1105}
1106
1107int i2c_w1(struct gspca_dev *gspca_dev, u8 reg, u8 val)
1108{
1109 struct sd *sd = (struct sd *) gspca_dev;
1110
1111 u8 row[8];
1112
1113 /*
1114 * from the point of view of the bridge, the length
1115 * includes the address
1116 */
1117 row[0] = 0x81 | (2 << 4);
1118 row[1] = sd->i2c_addr;
1119 row[2] = reg;
1120 row[3] = val;
1121 row[4] = 0x00;
1122 row[5] = 0x00;
1123 row[6] = 0x00;
1124 row[7] = 0x10;
1125
1126 return i2c_w(gspca_dev, row);
1127}
1128
1129int i2c_w2(struct gspca_dev *gspca_dev, u8 reg, u16 val)
1130{
1131 struct sd *sd = (struct sd *) gspca_dev;
1132 u8 row[8];
1133
1134 /*
1135 * from the point of view of the bridge, the length
1136 * includes the address
1137 */
1138 row[0] = 0x81 | (3 << 4);
1139 row[1] = sd->i2c_addr;
1140 row[2] = reg;
1141 row[3] = (val >> 8) & 0xff;
1142 row[4] = val & 0xff;
1143 row[5] = 0x00;
1144 row[6] = 0x00;
1145 row[7] = 0x10;
1146
1147 return i2c_w(gspca_dev, row);
1148}
1149
1150int i2c_r1(struct gspca_dev *gspca_dev, u8 reg, u8 *val)
1151{
1152 struct sd *sd = (struct sd *) gspca_dev;
1153 u8 row[8];
1154
1155 row[0] = 0x81 | 0x10;
1156 row[1] = sd->i2c_addr;
1157 row[2] = reg;
1158 row[3] = 0;
1159 row[4] = 0;
1160 row[5] = 0;
1161 row[6] = 0;
1162 row[7] = 0x10;
1163 reg_w(gspca_dev, 0x10c0, row, 8);
1164 msleep(1);
1165 row[0] = 0x81 | (2 << 4) | 0x02;
1166 row[2] = 0;
1167 reg_w(gspca_dev, 0x10c0, row, 8);
1168 msleep(1);
1169 reg_r(gspca_dev, 0x10c2, 5);
1170 *val = gspca_dev->usb_buf[3];
1171 return 0;
1172}
1173
1174int i2c_r2(struct gspca_dev *gspca_dev, u8 reg, u16 *val)
1175{
1176 struct sd *sd = (struct sd *) gspca_dev;
1177 u8 row[8];
1178
1179 row[0] = 0x81 | 0x10;
1180 row[1] = sd->i2c_addr;
1181 row[2] = reg;
1182 row[3] = 0;
1183 row[4] = 0;
1184 row[5] = 0;
1185 row[6] = 0;
1186 row[7] = 0x10;
1187 reg_w(gspca_dev, 0x10c0, row, 8);
1188 msleep(1);
1189 row[0] = 0x81 | (3 << 4) | 0x02;
1190 row[2] = 0;
1191 reg_w(gspca_dev, 0x10c0, row, 8);
1192 msleep(1);
1193 reg_r(gspca_dev, 0x10c2, 5);
1194 *val = (gspca_dev->usb_buf[2] << 8) | gspca_dev->usb_buf[3];
1195 return 0;
1196}
1197
1198static int ov9650_init_sensor(struct gspca_dev *gspca_dev)
1199{
1200 int i;
1201 struct sd *sd = (struct sd *) gspca_dev;
1202
1203 for (i = 0; i < ARRAY_SIZE(ov9650_init); i++) {
1204 if (i2c_w1(gspca_dev, ov9650_init[i][0],
1205 ov9650_init[i][1]) < 0) {
1206 err("OV9650 sensor initialization failed");
1207 return -ENODEV;
1208 }
1209 }
1210 sd->hstart = 1;
1211 sd->vstart = 7;
1212 return 0;
1213}
1214
1215static int ov9655_init_sensor(struct gspca_dev *gspca_dev)
1216{
1217 int i;
1218 struct sd *sd = (struct sd *) gspca_dev;
1219
1220 for (i = 0; i < ARRAY_SIZE(ov9655_init); i++) {
1221 if (i2c_w1(gspca_dev, ov9655_init[i][0],
1222 ov9655_init[i][1]) < 0) {
1223 err("OV9655 sensor initialization failed");
1224 return -ENODEV;
1225 }
1226 }
1227 /* disable hflip and vflip */
1228 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
1229 sd->hstart = 0;
1230 sd->vstart = 7;
1231 return 0;
1232}
1233
1234static int soi968_init_sensor(struct gspca_dev *gspca_dev)
1235{
1236 int i;
1237 struct sd *sd = (struct sd *) gspca_dev;
1238
1239 for (i = 0; i < ARRAY_SIZE(soi968_init); i++) {
1240 if (i2c_w1(gspca_dev, soi968_init[i][0],
1241 soi968_init[i][1]) < 0) {
1242 err("SOI968 sensor initialization failed");
1243 return -ENODEV;
1244 }
1245 }
1246 /* disable hflip and vflip */
1247 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
1248 sd->hstart = 60;
1249 sd->vstart = 11;
1250 return 0;
1251}
1252
1253static int ov7660_init_sensor(struct gspca_dev *gspca_dev)
1254{
1255 int i;
1256 struct sd *sd = (struct sd *) gspca_dev;
1257
1258 for (i = 0; i < ARRAY_SIZE(ov7660_init); i++) {
1259 if (i2c_w1(gspca_dev, ov7660_init[i][0],
1260 ov7660_init[i][1]) < 0) {
1261 err("OV7660 sensor initialization failed");
1262 return -ENODEV;
1263 }
1264 }
1265 /* disable hflip and vflip */
1266 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
1267 sd->hstart = 1;
1268 sd->vstart = 1;
1269 return 0;
1270}
1271
1272static int ov7670_init_sensor(struct gspca_dev *gspca_dev)
1273{
1274 int i;
1275 struct sd *sd = (struct sd *) gspca_dev;
1276
1277 for (i = 0; i < ARRAY_SIZE(ov7670_init); i++) {
1278 if (i2c_w1(gspca_dev, ov7670_init[i][0],
1279 ov7670_init[i][1]) < 0) {
1280 err("OV7670 sensor initialization failed");
1281 return -ENODEV;
1282 }
1283 }
1284 /* disable hflip and vflip */
1285 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
1286 sd->hstart = 0;
1287 sd->vstart = 1;
1288 return 0;
1289}
1290
1291static int mt9v_init_sensor(struct gspca_dev *gspca_dev)
1292{
1293 struct sd *sd = (struct sd *) gspca_dev;
1294 int i;
1295 u16 value;
1296 int ret;
1297
1298 sd->i2c_addr = 0x5d;
1299 ret = i2c_r2(gspca_dev, 0xff, &value);
1300 if ((ret == 0) && (value == 0x8243)) {
1301 for (i = 0; i < ARRAY_SIZE(mt9v011_init); i++) {
1302 if (i2c_w2(gspca_dev, mt9v011_init[i][0],
1303 mt9v011_init[i][1]) < 0) {
1304 err("MT9V011 sensor initialization failed");
1305 return -ENODEV;
1306 }
1307 }
1308 sd->hstart = 2;
1309 sd->vstart = 2;
1310 sd->sensor = SENSOR_MT9V011;
1311 info("MT9V011 sensor detected");
1312 return 0;
1313 }
1314
1315 sd->i2c_addr = 0x5c;
1316 i2c_w2(gspca_dev, 0x01, 0x0004);
1317 ret = i2c_r2(gspca_dev, 0xff, &value);
1318 if ((ret == 0) && (value == 0x823a)) {
1319 for (i = 0; i < ARRAY_SIZE(mt9v111_init); i++) {
1320 if (i2c_w2(gspca_dev, mt9v111_init[i][0],
1321 mt9v111_init[i][1]) < 0) {
1322 err("MT9V111 sensor initialization failed");
1323 return -ENODEV;
1324 }
1325 }
1326 sd->hstart = 2;
1327 sd->vstart = 2;
1328 sd->sensor = SENSOR_MT9V111;
1329 info("MT9V111 sensor detected");
1330 return 0;
1331 }
1332
1333 sd->i2c_addr = 0x5d;
1334 ret = i2c_w2(gspca_dev, 0xf0, 0x0000);
1335 if (ret < 0) {
1336 sd->i2c_addr = 0x48;
1337 i2c_w2(gspca_dev, 0xf0, 0x0000);
1338 }
1339 ret = i2c_r2(gspca_dev, 0x00, &value);
1340 if ((ret == 0) && (value == 0x1229)) {
1341 for (i = 0; i < ARRAY_SIZE(mt9v112_init); i++) {
1342 if (i2c_w2(gspca_dev, mt9v112_init[i][0],
1343 mt9v112_init[i][1]) < 0) {
1344 err("MT9V112 sensor initialization failed");
1345 return -ENODEV;
1346 }
1347 }
1348 sd->hstart = 6;
1349 sd->vstart = 2;
1350 sd->sensor = SENSOR_MT9V112;
1351 info("MT9V112 sensor detected");
1352 return 0;
1353 }
1354
1355 return -ENODEV;
1356}
1357
1358static int mt9m111_init_sensor(struct gspca_dev *gspca_dev)
1359{
1360 struct sd *sd = (struct sd *) gspca_dev;
1361 int i;
1362 for (i = 0; i < ARRAY_SIZE(mt9m111_init); i++) {
1363 if (i2c_w2(gspca_dev, mt9m111_init[i][0],
1364 mt9m111_init[i][1]) < 0) {
1365 err("MT9M111 sensor initialization failed");
1366 return -ENODEV;
1367 }
1368 }
1369 sd->hstart = 0;
1370 sd->vstart = 2;
1371 return 0;
1372}
1373
1374static int mt9m001_init_sensor(struct gspca_dev *gspca_dev)
1375{
1376 struct sd *sd = (struct sd *) gspca_dev;
1377 int i;
1378 for (i = 0; i < ARRAY_SIZE(mt9m001_init); i++) {
1379 if (i2c_w2(gspca_dev, mt9m001_init[i][0],
1380 mt9m001_init[i][1]) < 0) {
1381 err("MT9M001 sensor initialization failed");
1382 return -ENODEV;
1383 }
1384 }
1385 /* disable hflip and vflip */
1386 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX);
1387 sd->hstart = 2;
1388 sd->vstart = 2;
1389 return 0;
1390}
1391
1392static int hv7131r_init_sensor(struct gspca_dev *gspca_dev)
1393{
1394 int i;
1395 struct sd *sd = (struct sd *) gspca_dev;
1396
1397 for (i = 0; i < ARRAY_SIZE(hv7131r_init); i++) {
1398 if (i2c_w1(gspca_dev, hv7131r_init[i][0],
1399 hv7131r_init[i][1]) < 0) {
1400 err("HV7131R Sensor initialization failed");
1401 return -ENODEV;
1402 }
1403 }
1404 sd->hstart = 0;
1405 sd->vstart = 1;
1406 return 0;
1407}
1408
1409#ifdef CONFIG_USB_GSPCA_SN9C20X_EVDEV
1410static int input_kthread(void *data)
1411{
1412 struct gspca_dev *gspca_dev = (struct gspca_dev *)data;
1413 struct sd *sd = (struct sd *) gspca_dev;
1414
1415 DECLARE_WAIT_QUEUE_HEAD(wait);
1416 set_freezable();
1417 for (;;) {
1418 if (kthread_should_stop())
1419 break;
1420
1421 if (reg_r(gspca_dev, 0x1005, 1) < 0)
1422 continue;
1423
1424 input_report_key(sd->input_dev,
1425 KEY_CAMERA,
1426 gspca_dev->usb_buf[0] & sd->input_gpio);
1427 input_sync(sd->input_dev);
1428
1429 wait_event_freezable_timeout(wait,
1430 kthread_should_stop(),
1431 msecs_to_jiffies(100));
1432 }
1433 return 0;
1434}
1435
1436
1437static int sn9c20x_input_init(struct gspca_dev *gspca_dev)
1438{
1439 struct sd *sd = (struct sd *) gspca_dev;
1440 if (sd->input_gpio == 0)
1441 return 0;
1442
1443 sd->input_dev = input_allocate_device();
1444 if (!sd->input_dev)
1445 return -ENOMEM;
1446
1447 sd->input_dev->name = "SN9C20X Webcam";
1448
1449 sd->input_dev->phys = kasprintf(GFP_KERNEL, "usb-%s-%s",
1450 gspca_dev->dev->bus->bus_name,
1451 gspca_dev->dev->devpath);
1452
1453 if (!sd->input_dev->phys)
1454 return -ENOMEM;
1455
1456 usb_to_input_id(gspca_dev->dev, &sd->input_dev->id);
1457 sd->input_dev->dev.parent = &gspca_dev->dev->dev;
1458
1459 set_bit(EV_KEY, sd->input_dev->evbit);
1460 set_bit(KEY_CAMERA, sd->input_dev->keybit);
1461
1462 if (input_register_device(sd->input_dev))
1463 return -EINVAL;
1464
1465 sd->input_task = kthread_run(input_kthread, gspca_dev, "sn9c20x/%d",
1466 gspca_dev->vdev.minor);
1467
1468 if (IS_ERR(sd->input_task))
1469 return -EINVAL;
1470
1471 return 0;
1472}
1473
1474static void sn9c20x_input_cleanup(struct gspca_dev *gspca_dev)
1475{
1476 struct sd *sd = (struct sd *) gspca_dev;
1477 if (sd->input_task != NULL && !IS_ERR(sd->input_task))
1478 kthread_stop(sd->input_task);
1479
1480 if (sd->input_dev != NULL) {
1481 input_unregister_device(sd->input_dev);
1482 kfree(sd->input_dev->phys);
1483 input_free_device(sd->input_dev);
1484 sd->input_dev = NULL;
1485 }
1486}
1487#endif
1488
1489static int set_cmatrix(struct gspca_dev *gspca_dev)
1490{
1491 struct sd *sd = (struct sd *) gspca_dev;
1492 s32 hue_coord, hue_index = 180 + sd->hue;
1493 u8 cmatrix[21];
1494 memset(cmatrix, 0, 21);
1495
1496 cmatrix[2] = (sd->contrast * 0x25 / 0x100) + 0x26;
1497 cmatrix[0] = 0x13 + (cmatrix[2] - 0x26) * 0x13 / 0x25;
1498 cmatrix[4] = 0x07 + (cmatrix[2] - 0x26) * 0x07 / 0x25;
1499 cmatrix[18] = sd->brightness - 0x80;
1500
1501 hue_coord = (hsv_red_x[hue_index] * sd->saturation) >> 8;
1502 cmatrix[6] = (unsigned char)(hue_coord & 0xff);
1503 cmatrix[7] = (unsigned char)((hue_coord >> 8) & 0x0f);
1504
1505 hue_coord = (hsv_red_y[hue_index] * sd->saturation) >> 8;
1506 cmatrix[8] = (unsigned char)(hue_coord & 0xff);
1507 cmatrix[9] = (unsigned char)((hue_coord >> 8) & 0x0f);
1508
1509 hue_coord = (hsv_green_x[hue_index] * sd->saturation) >> 8;
1510 cmatrix[10] = (unsigned char)(hue_coord & 0xff);
1511 cmatrix[11] = (unsigned char)((hue_coord >> 8) & 0x0f);
1512
1513 hue_coord = (hsv_green_y[hue_index] * sd->saturation) >> 8;
1514 cmatrix[12] = (unsigned char)(hue_coord & 0xff);
1515 cmatrix[13] = (unsigned char)((hue_coord >> 8) & 0x0f);
1516
1517 hue_coord = (hsv_blue_x[hue_index] * sd->saturation) >> 8;
1518 cmatrix[14] = (unsigned char)(hue_coord & 0xff);
1519 cmatrix[15] = (unsigned char)((hue_coord >> 8) & 0x0f);
1520
1521 hue_coord = (hsv_blue_y[hue_index] * sd->saturation) >> 8;
1522 cmatrix[16] = (unsigned char)(hue_coord & 0xff);
1523 cmatrix[17] = (unsigned char)((hue_coord >> 8) & 0x0f);
1524
1525 return reg_w(gspca_dev, 0x10e1, cmatrix, 21);
1526}
1527
1528static int set_gamma(struct gspca_dev *gspca_dev)
1529{
1530 struct sd *sd = (struct sd *) gspca_dev;
1531 u8 gamma[17];
1532 u8 gval = sd->gamma * 0xb8 / 0x100;
1533
1534
1535 gamma[0] = 0x0a;
1536 gamma[1] = 0x13 + (gval * (0xcb - 0x13) / 0xb8);
1537 gamma[2] = 0x25 + (gval * (0xee - 0x25) / 0xb8);
1538 gamma[3] = 0x37 + (gval * (0xfa - 0x37) / 0xb8);
1539 gamma[4] = 0x45 + (gval * (0xfc - 0x45) / 0xb8);
1540 gamma[5] = 0x55 + (gval * (0xfb - 0x55) / 0xb8);
1541 gamma[6] = 0x65 + (gval * (0xfc - 0x65) / 0xb8);
1542 gamma[7] = 0x74 + (gval * (0xfd - 0x74) / 0xb8);
1543 gamma[8] = 0x83 + (gval * (0xfe - 0x83) / 0xb8);
1544 gamma[9] = 0x92 + (gval * (0xfc - 0x92) / 0xb8);
1545 gamma[10] = 0xa1 + (gval * (0xfc - 0xa1) / 0xb8);
1546 gamma[11] = 0xb0 + (gval * (0xfc - 0xb0) / 0xb8);
1547 gamma[12] = 0xbf + (gval * (0xfb - 0xbf) / 0xb8);
1548 gamma[13] = 0xce + (gval * (0xfb - 0xce) / 0xb8);
1549 gamma[14] = 0xdf + (gval * (0xfd - 0xdf) / 0xb8);
1550 gamma[15] = 0xea + (gval * (0xf9 - 0xea) / 0xb8);
1551 gamma[16] = 0xf5;
1552
1553 return reg_w(gspca_dev, 0x1190, gamma, 17);
1554}
1555
1556static int set_redblue(struct gspca_dev *gspca_dev)
1557{
1558 struct sd *sd = (struct sd *) gspca_dev;
1559 reg_w1(gspca_dev, 0x118c, sd->red);
1560 reg_w1(gspca_dev, 0x118f, sd->blue);
1561 return 0;
1562}
1563
1564static int set_hvflip(struct gspca_dev *gspca_dev)
1565{
1566 u8 value, tslb;
1567 u16 value2;
1568 struct sd *sd = (struct sd *) gspca_dev;
1569 switch (sd->sensor) {
1570 case SENSOR_OV9650:
1571 i2c_r1(gspca_dev, 0x1e, &value);
1572 value &= ~0x30;
1573 tslb = 0x01;
1574 if (sd->hflip)
1575 value |= 0x20;
1576 if (sd->vflip) {
1577 value |= 0x10;
1578 tslb = 0x49;
1579 }
1580 i2c_w1(gspca_dev, 0x1e, value);
1581 i2c_w1(gspca_dev, 0x3a, tslb);
1582 break;
1583 case SENSOR_MT9V111:
1584 case SENSOR_MT9V011:
1585 i2c_r2(gspca_dev, 0x20, &value2);
1586 value2 &= ~0xc0a0;
1587 if (sd->hflip)
1588 value2 |= 0x8080;
1589 if (sd->vflip)
1590 value2 |= 0x4020;
1591 i2c_w2(gspca_dev, 0x20, value2);
1592 break;
1593 case SENSOR_MT9M111:
1594 case SENSOR_MT9V112:
1595 i2c_r2(gspca_dev, 0x20, &value2);
1596 value2 &= ~0x0003;
1597 if (sd->hflip)
1598 value2 |= 0x0002;
1599 if (sd->vflip)
1600 value2 |= 0x0001;
1601 i2c_w2(gspca_dev, 0x20, value2);
1602 break;
1603 case SENSOR_HV7131R:
1604 i2c_r1(gspca_dev, 0x01, &value);
1605 value &= ~0x03;
1606 if (sd->vflip)
1607 value |= 0x01;
1608 if (sd->hflip)
1609 value |= 0x02;
1610 i2c_w1(gspca_dev, 0x01, value);
1611 break;
1612 }
1613 return 0;
1614}
1615
1616static int set_exposure(struct gspca_dev *gspca_dev)
1617{
1618 struct sd *sd = (struct sd *) gspca_dev;
1619 u8 exp[8] = {0x81, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e};
1620 switch (sd->sensor) {
1621 case SENSOR_OV7660:
1622 case SENSOR_OV7670:
1623 case SENSOR_SOI968:
1624 case SENSOR_OV9655:
1625 case SENSOR_OV9650:
1626 exp[0] |= (3 << 4);
1627 exp[2] = 0x2d;
1628 exp[3] = sd->exposure & 0xff;
1629 exp[4] = sd->exposure >> 8;
1630 break;
1631 case SENSOR_MT9M001:
1632 case SENSOR_MT9M111:
1633 case SENSOR_MT9V112:
1634 case SENSOR_MT9V111:
1635 case SENSOR_MT9V011:
1636 exp[0] |= (3 << 4);
1637 exp[2] = 0x09;
1638 exp[3] = sd->exposure >> 8;
1639 exp[4] = sd->exposure & 0xff;
1640 break;
1641 case SENSOR_HV7131R:
1642 exp[0] |= (4 << 4);
1643 exp[2] = 0x25;
1644 exp[3] = ((sd->exposure * 0xffffff) / 0xffff) >> 16;
1645 exp[4] = ((sd->exposure * 0xffffff) / 0xffff) >> 8;
1646 exp[5] = ((sd->exposure * 0xffffff) / 0xffff) & 0xff;
1647 break;
1648 }
1649 i2c_w(gspca_dev, exp);
1650 return 0;
1651}
1652
1653static int set_gain(struct gspca_dev *gspca_dev)
1654{
1655 struct sd *sd = (struct sd *) gspca_dev;
1656 u8 gain[8] = {0x81, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1d};
1657 switch (sd->sensor) {
1658 case SENSOR_OV7660:
1659 case SENSOR_OV7670:
1660 case SENSOR_SOI968:
1661 case SENSOR_OV9655:
1662 case SENSOR_OV9650:
1663 gain[0] |= (2 << 4);
1664 gain[3] = ov_gain[sd->gain];
1665 break;
1666 case SENSOR_MT9V011:
1667 case SENSOR_MT9V111:
1668 gain[0] |= (3 << 4);
1669 gain[2] = 0x35;
1670 gain[3] = micron1_gain[sd->gain] >> 8;
1671 gain[4] = micron1_gain[sd->gain] & 0xff;
1672 break;
1673 case SENSOR_MT9V112:
1674 case SENSOR_MT9M111:
1675 gain[0] |= (3 << 4);
1676 gain[2] = 0x2f;
1677 gain[3] = micron1_gain[sd->gain] >> 8;
1678 gain[4] = micron1_gain[sd->gain] & 0xff;
1679 break;
1680 case SENSOR_MT9M001:
1681 gain[0] |= (3 << 4);
1682 gain[2] = 0x2f;
1683 gain[3] = micron2_gain[sd->gain] >> 8;
1684 gain[4] = micron2_gain[sd->gain] & 0xff;
1685 break;
1686 case SENSOR_HV7131R:
1687 gain[0] |= (2 << 4);
1688 gain[2] = 0x30;
1689 gain[3] = hv7131r_gain[sd->gain];
1690 break;
1691 }
1692 i2c_w(gspca_dev, gain);
1693 return 0;
1694}
1695
1696static int sd_setbrightness(struct gspca_dev *gspca_dev, s32 val)
1697{
1698 struct sd *sd = (struct sd *) gspca_dev;
1699
1700 sd->brightness = val;
1701 if (gspca_dev->streaming)
1702 return set_cmatrix(gspca_dev);
1703 return 0;
1704}
1705
1706static int sd_getbrightness(struct gspca_dev *gspca_dev, s32 *val)
1707{
1708 struct sd *sd = (struct sd *) gspca_dev;
1709 *val = sd->brightness;
1710 return 0;
1711}
1712
1713
1714static int sd_setcontrast(struct gspca_dev *gspca_dev, s32 val)
1715{
1716 struct sd *sd = (struct sd *) gspca_dev;
1717
1718 sd->contrast = val;
1719 if (gspca_dev->streaming)
1720 return set_cmatrix(gspca_dev);
1721 return 0;
1722}
1723
1724static int sd_getcontrast(struct gspca_dev *gspca_dev, s32 *val)
1725{
1726 struct sd *sd = (struct sd *) gspca_dev;
1727 *val = sd->contrast;
1728 return 0;
1729}
1730
1731static int sd_setsaturation(struct gspca_dev *gspca_dev, s32 val)
1732{
1733 struct sd *sd = (struct sd *) gspca_dev;
1734
1735 sd->saturation = val;
1736 if (gspca_dev->streaming)
1737 return set_cmatrix(gspca_dev);
1738 return 0;
1739}
1740
1741static int sd_getsaturation(struct gspca_dev *gspca_dev, s32 *val)
1742{
1743 struct sd *sd = (struct sd *) gspca_dev;
1744 *val = sd->saturation;
1745 return 0;
1746}
1747
1748static int sd_sethue(struct gspca_dev *gspca_dev, s32 val)
1749{
1750 struct sd *sd = (struct sd *) gspca_dev;
1751
1752 sd->hue = val;
1753 if (gspca_dev->streaming)
1754 return set_cmatrix(gspca_dev);
1755 return 0;
1756}
1757
1758static int sd_gethue(struct gspca_dev *gspca_dev, s32 *val)
1759{
1760 struct sd *sd = (struct sd *) gspca_dev;
1761 *val = sd->hue;
1762 return 0;
1763}
1764
1765static int sd_setgamma(struct gspca_dev *gspca_dev, s32 val)
1766{
1767 struct sd *sd = (struct sd *) gspca_dev;
1768
1769 sd->gamma = val;
1770 if (gspca_dev->streaming)
1771 return set_gamma(gspca_dev);
1772 return 0;
1773}
1774
1775static int sd_getgamma(struct gspca_dev *gspca_dev, s32 *val)
1776{
1777 struct sd *sd = (struct sd *) gspca_dev;
1778 *val = sd->gamma;
1779 return 0;
1780}
1781
1782static int sd_setredbalance(struct gspca_dev *gspca_dev, s32 val)
1783{
1784 struct sd *sd = (struct sd *) gspca_dev;
1785
1786 sd->red = val;
1787 if (gspca_dev->streaming)
1788 return set_redblue(gspca_dev);
1789 return 0;
1790}
1791
1792static int sd_getredbalance(struct gspca_dev *gspca_dev, s32 *val)
1793{
1794 struct sd *sd = (struct sd *) gspca_dev;
1795 *val = sd->red;
1796 return 0;
1797}
1798
1799static int sd_setbluebalance(struct gspca_dev *gspca_dev, s32 val)
1800{
1801 struct sd *sd = (struct sd *) gspca_dev;
1802
1803 sd->blue = val;
1804 if (gspca_dev->streaming)
1805 return set_redblue(gspca_dev);
1806 return 0;
1807}
1808
1809static int sd_getbluebalance(struct gspca_dev *gspca_dev, s32 *val)
1810{
1811 struct sd *sd = (struct sd *) gspca_dev;
1812 *val = sd->blue;
1813 return 0;
1814}
1815
1816static int sd_sethflip(struct gspca_dev *gspca_dev, s32 val)
1817{
1818 struct sd *sd = (struct sd *) gspca_dev;
1819
1820 sd->hflip = val;
1821 if (gspca_dev->streaming)
1822 return set_hvflip(gspca_dev);
1823 return 0;
1824}
1825
1826static int sd_gethflip(struct gspca_dev *gspca_dev, s32 *val)
1827{
1828 struct sd *sd = (struct sd *) gspca_dev;
1829 *val = sd->hflip;
1830 return 0;
1831}
1832
1833static int sd_setvflip(struct gspca_dev *gspca_dev, s32 val)
1834{
1835 struct sd *sd = (struct sd *) gspca_dev;
1836
1837 sd->vflip = val;
1838 if (gspca_dev->streaming)
1839 return set_hvflip(gspca_dev);
1840 return 0;
1841}
1842
1843static int sd_getvflip(struct gspca_dev *gspca_dev, s32 *val)
1844{
1845 struct sd *sd = (struct sd *) gspca_dev;
1846 *val = sd->vflip;
1847 return 0;
1848}
1849
1850static int sd_setexposure(struct gspca_dev *gspca_dev, s32 val)
1851{
1852 struct sd *sd = (struct sd *) gspca_dev;
1853
1854 sd->exposure = val;
1855 if (gspca_dev->streaming)
1856 return set_exposure(gspca_dev);
1857 return 0;
1858}
1859
1860static int sd_getexposure(struct gspca_dev *gspca_dev, s32 *val)
1861{
1862 struct sd *sd = (struct sd *) gspca_dev;
1863 *val = sd->exposure;
1864 return 0;
1865}
1866
1867static int sd_setgain(struct gspca_dev *gspca_dev, s32 val)
1868{
1869 struct sd *sd = (struct sd *) gspca_dev;
1870
1871 sd->gain = val;
1872 if (gspca_dev->streaming)
1873 return set_gain(gspca_dev);
1874 return 0;
1875}
1876
1877static int sd_getgain(struct gspca_dev *gspca_dev, s32 *val)
1878{
1879 struct sd *sd = (struct sd *) gspca_dev;
1880 *val = sd->gain;
1881 return 0;
1882}
1883
1884static int sd_setautoexposure(struct gspca_dev *gspca_dev, s32 val)
1885{
1886 struct sd *sd = (struct sd *) gspca_dev;
1887 sd->auto_exposure = val;
1888 return 0;
1889}
1890
1891static int sd_getautoexposure(struct gspca_dev *gspca_dev, s32 *val)
1892{
1893 struct sd *sd = (struct sd *) gspca_dev;
1894 *val = sd->auto_exposure;
1895 return 0;
1896}
1897
1898#ifdef CONFIG_VIDEO_ADV_DEBUG
1899static int sd_dbg_g_register(struct gspca_dev *gspca_dev,
1900 struct v4l2_dbg_register *reg)
1901{
1902 struct sd *sd = (struct sd *) gspca_dev;
1903 switch (reg->match.type) {
1904 case V4L2_CHIP_MATCH_HOST:
1905 if (reg->match.addr != 0)
1906 return -EINVAL;
1907 if (reg->reg < 0x1000 || reg->reg > 0x11ff)
1908 return -EINVAL;
1909 if (reg_r(gspca_dev, reg->reg, 1) < 0)
1910 return -EINVAL;
1911 reg->val = gspca_dev->usb_buf[0];
1912 return 0;
1913 case V4L2_CHIP_MATCH_I2C_ADDR:
1914 if (reg->match.addr != sd->i2c_addr)
1915 return -EINVAL;
1916 if (sd->sensor >= SENSOR_MT9V011 &&
1917 sd->sensor <= SENSOR_MT9M111) {
1918 if (i2c_r2(gspca_dev, reg->reg, (u16 *)&reg->val) < 0)
1919 return -EINVAL;
1920 } else {
1921 if (i2c_r1(gspca_dev, reg->reg, (u8 *)&reg->val) < 0)
1922 return -EINVAL;
1923 }
1924 return 0;
1925 }
1926 return -EINVAL;
1927}
1928
1929static int sd_dbg_s_register(struct gspca_dev *gspca_dev,
1930 struct v4l2_dbg_register *reg)
1931{
1932 struct sd *sd = (struct sd *) gspca_dev;
1933 switch (reg->match.type) {
1934 case V4L2_CHIP_MATCH_HOST:
1935 if (reg->match.addr != 0)
1936 return -EINVAL;
1937 if (reg->reg < 0x1000 || reg->reg > 0x11ff)
1938 return -EINVAL;
1939 if (reg_w1(gspca_dev, reg->reg, reg->val) < 0)
1940 return -EINVAL;
1941 return 0;
1942 case V4L2_CHIP_MATCH_I2C_ADDR:
1943 if (reg->match.addr != sd->i2c_addr)
1944 return -EINVAL;
1945 if (sd->sensor >= SENSOR_MT9V011 &&
1946 sd->sensor <= SENSOR_MT9M111) {
1947 if (i2c_w2(gspca_dev, reg->reg, reg->val) < 0)
1948 return -EINVAL;
1949 } else {
1950 if (i2c_w1(gspca_dev, reg->reg, reg->val) < 0)
1951 return -EINVAL;
1952 }
1953 return 0;
1954 }
1955 return -EINVAL;
1956}
1957#endif
1958
1959static int sd_chip_ident(struct gspca_dev *gspca_dev,
1960 struct v4l2_dbg_chip_ident *chip)
1961{
1962 struct sd *sd = (struct sd *) gspca_dev;
1963
1964 switch (chip->match.type) {
1965 case V4L2_CHIP_MATCH_HOST:
1966 if (chip->match.addr != 0)
1967 return -EINVAL;
1968 chip->revision = 0;
1969 chip->ident = V4L2_IDENT_SN9C20X;
1970 return 0;
1971 case V4L2_CHIP_MATCH_I2C_ADDR:
1972 if (chip->match.addr != sd->i2c_addr)
1973 return -EINVAL;
1974 chip->revision = 0;
1975 chip->ident = i2c_ident[sd->sensor];
1976 return 0;
1977 }
1978 return -EINVAL;
1979}
1980
1981static int sd_config(struct gspca_dev *gspca_dev,
1982 const struct usb_device_id *id)
1983{
1984 struct sd *sd = (struct sd *) gspca_dev;
1985 struct cam *cam;
1986
1987 cam = &gspca_dev->cam;
1988
1989 sd->sensor = (id->driver_info >> 8) & 0xff;
1990 sd->i2c_addr = id->driver_info & 0xff;
1991
1992 switch (sd->sensor) {
1993 case SENSOR_OV9650:
1994 cam->cam_mode = sxga_mode;
1995 cam->nmodes = ARRAY_SIZE(sxga_mode);
1996 break;
1997 default:
1998 cam->cam_mode = vga_mode;
1999 cam->nmodes = ARRAY_SIZE(vga_mode);
2000 }
2001
2002 sd->old_step = 0;
2003 sd->older_step = 0;
2004 sd->exposure_step = 16;
2005
2006 sd->brightness = BRIGHTNESS_DEFAULT;
2007 sd->contrast = CONTRAST_DEFAULT;
2008 sd->saturation = SATURATION_DEFAULT;
2009 sd->hue = HUE_DEFAULT;
2010 sd->gamma = GAMMA_DEFAULT;
2011 sd->red = RED_DEFAULT;
2012 sd->blue = BLUE_DEFAULT;
2013
2014 sd->hflip = HFLIP_DEFAULT;
2015 sd->vflip = VFLIP_DEFAULT;
2016 sd->exposure = EXPOSURE_DEFAULT;
2017 sd->gain = GAIN_DEFAULT;
2018 sd->auto_exposure = AUTO_EXPOSURE_DEFAULT;
2019
2020 sd->quality = 95;
2021
2022#ifdef CONFIG_USB_GSPCA_SN9C20X_EVDEV
2023 sd->input_gpio = (id->driver_info >> 16) & 0xff;
2024 if (sn9c20x_input_init(gspca_dev) < 0)
2025 return -ENODEV;
2026#endif
2027 return 0;
2028}
2029
2030static int sd_init(struct gspca_dev *gspca_dev)
2031{
2032 struct sd *sd = (struct sd *) gspca_dev;
2033 int i;
2034 u8 value;
2035 u8 i2c_init[9] =
2036 {0x80, sd->i2c_addr, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03};
2037
2038 for (i = 0; i < ARRAY_SIZE(bridge_init); i++) {
2039 value = bridge_init[i][1];
2040 if (reg_w(gspca_dev, bridge_init[i][0], &value, 1) < 0) {
2041 err("Device initialization failed");
2042 return -ENODEV;
2043 }
2044 }
2045
2046 if (reg_w(gspca_dev, 0x10c0, i2c_init, 9) < 0) {
2047 err("Device initialization failed");
2048 return -ENODEV;
2049 }
2050
2051 switch (sd->sensor) {
2052 case SENSOR_OV9650:
2053 if (ov9650_init_sensor(gspca_dev) < 0)
2054 return -ENODEV;
2055 info("OV9650 sensor detected");
2056 break;
2057 case SENSOR_OV9655:
2058 if (ov9655_init_sensor(gspca_dev) < 0)
2059 return -ENODEV;
2060 info("OV9655 sensor detected");
2061 break;
2062 case SENSOR_SOI968:
2063 if (soi968_init_sensor(gspca_dev) < 0)
2064 return -ENODEV;
2065 info("SOI968 sensor detected");
2066 break;
2067 case SENSOR_OV7660:
2068 if (ov7660_init_sensor(gspca_dev) < 0)
2069 return -ENODEV;
2070 info("OV7660 sensor detected");
2071 break;
2072 case SENSOR_OV7670:
2073 if (ov7670_init_sensor(gspca_dev) < 0)
2074 return -ENODEV;
2075 info("OV7670 sensor detected");
2076 break;
2077 case SENSOR_MT9VPRB:
2078 if (mt9v_init_sensor(gspca_dev) < 0)
2079 return -ENODEV;
2080 break;
2081 case SENSOR_MT9M111:
2082 if (mt9m111_init_sensor(gspca_dev) < 0)
2083 return -ENODEV;
2084 info("MT9M111 sensor detected");
2085 break;
2086 case SENSOR_MT9M001:
2087 if (mt9m001_init_sensor(gspca_dev) < 0)
2088 return -ENODEV;
2089 info("MT9M001 sensor detected");
2090 break;
2091 case SENSOR_HV7131R:
2092 if (hv7131r_init_sensor(gspca_dev) < 0)
2093 return -ENODEV;
2094 info("HV7131R sensor detected");
2095 break;
2096 default:
2097 info("Unsupported Sensor");
2098 return -ENODEV;
2099 }
2100
2101 return 0;
2102}
2103
2104static void configure_sensor_output(struct gspca_dev *gspca_dev, int mode)
2105{
2106 struct sd *sd = (struct sd *) gspca_dev;
2107 u8 value;
2108 switch (sd->sensor) {
2109 case SENSOR_OV9650:
2110 if (mode & MODE_SXGA) {
2111 i2c_w1(gspca_dev, 0x17, 0x1b);
2112 i2c_w1(gspca_dev, 0x18, 0xbc);
2113 i2c_w1(gspca_dev, 0x19, 0x01);
2114 i2c_w1(gspca_dev, 0x1a, 0x82);
2115 i2c_r1(gspca_dev, 0x12, &value);
2116 i2c_w1(gspca_dev, 0x12, value & 0x07);
2117 } else {
2118 i2c_w1(gspca_dev, 0x17, 0x24);
2119 i2c_w1(gspca_dev, 0x18, 0xc5);
2120 i2c_w1(gspca_dev, 0x19, 0x00);
2121 i2c_w1(gspca_dev, 0x1a, 0x3c);
2122 i2c_r1(gspca_dev, 0x12, &value);
2123 i2c_w1(gspca_dev, 0x12, (value & 0x7) | 0x40);
2124 }
2125 break;
2126 }
2127}
2128
2129#define HW_WIN(mode, hstart, vstart) \
2130((const u8 []){hstart & 0xff, hstart >> 8, \
2131vstart & 0xff, vstart >> 8, \
2132(mode & MODE_SXGA ? 1280 >> 4 : 640 >> 4), \
2133(mode & MODE_SXGA ? 1024 >> 3 : 480 >> 3)})
2134
2135#define CLR_WIN(width, height) \
2136((const u8 [])\
2137{0, width >> 2, 0, height >> 1,\
2138((width >> 10) & 0x01) | ((height >> 8) & 0x6)})
2139
2140static int sd_start(struct gspca_dev *gspca_dev)
2141{
2142 struct sd *sd = (struct sd *) gspca_dev;
2143 int mode = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv;
2144 int width = gspca_dev->width;
2145 int height = gspca_dev->height;
2146 u8 fmt, scale = 0;
2147
2148 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
2149 if (sd->jpeg_hdr == NULL)
2150 return -ENOMEM;
2151
2152 jpeg_define(sd->jpeg_hdr, height, width,
2153 0x21);
2154 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
2155
2156 if (mode & MODE_RAW)
2157 fmt = 0x2d;
2158 else if (mode & MODE_JPEG)
2159 fmt = 0x2c;
2160 else
2161 fmt = 0x2f;
2162
2163 switch (mode & 0x0f) {
2164 case 3:
2165 scale = 0xc0;
2166 info("Set 1280x1024");
2167 break;
2168 case 2:
2169 scale = 0x80;
2170 info("Set 640x480");
2171 break;
2172 case 1:
2173 scale = 0x90;
2174 info("Set 320x240");
2175 break;
2176 case 0:
2177 scale = 0xa0;
2178 info("Set 160x120");
2179 break;
2180 }
2181
2182 configure_sensor_output(gspca_dev, mode);
2183 reg_w(gspca_dev, 0x1100, sd->jpeg_hdr + JPEG_QT0_OFFSET, 64);
2184 reg_w(gspca_dev, 0x1140, sd->jpeg_hdr + JPEG_QT1_OFFSET, 64);
2185 reg_w(gspca_dev, 0x10fb, CLR_WIN(width, height), 5);
2186 reg_w(gspca_dev, 0x1180, HW_WIN(mode, sd->hstart, sd->vstart), 6);
2187 reg_w1(gspca_dev, 0x1189, scale);
2188 reg_w1(gspca_dev, 0x10e0, fmt);
2189
2190 set_cmatrix(gspca_dev);
2191 set_gamma(gspca_dev);
2192 set_redblue(gspca_dev);
2193 set_gain(gspca_dev);
2194 set_exposure(gspca_dev);
2195 set_hvflip(gspca_dev);
2196
2197 reg_r(gspca_dev, 0x1061, 1);
2198 reg_w1(gspca_dev, 0x1061, gspca_dev->usb_buf[0] | 0x02);
2199 return 0;
2200}
2201
2202static void sd_stopN(struct gspca_dev *gspca_dev)
2203{
2204 reg_r(gspca_dev, 0x1061, 1);
2205 reg_w1(gspca_dev, 0x1061, gspca_dev->usb_buf[0] & ~0x02);
2206}
2207
2208static void sd_stop0(struct gspca_dev *gspca_dev)
2209{
2210 struct sd *sd = (struct sd *) gspca_dev;
2211 kfree(sd->jpeg_hdr);
2212}
2213
2214static void do_autoexposure(struct gspca_dev *gspca_dev)
2215{
2216 struct sd *sd = (struct sd *) gspca_dev;
2217 int avg_lum, new_exp;
2218
2219 if (!sd->auto_exposure)
2220 return;
2221
2222 avg_lum = atomic_read(&sd->avg_lum);
2223
2224 /*
2225 * some hardcoded values are present
2226 * like those for maximal/minimal exposure
2227 * and exposure steps
2228 */
2229 if (avg_lum < MIN_AVG_LUM) {
2230 if (sd->exposure > 0x1770)
2231 return;
2232
2233 new_exp = sd->exposure + sd->exposure_step;
2234 if (new_exp > 0x1770)
2235 new_exp = 0x1770;
2236 if (new_exp < 0x10)
2237 new_exp = 0x10;
2238 sd->exposure = new_exp;
2239 set_exposure(gspca_dev);
2240
2241 sd->older_step = sd->old_step;
2242 sd->old_step = 1;
2243
2244 if (sd->old_step ^ sd->older_step)
2245 sd->exposure_step /= 2;
2246 else
2247 sd->exposure_step += 2;
2248 }
2249 if (avg_lum > MAX_AVG_LUM) {
2250 if (sd->exposure < 0x10)
2251 return;
2252 new_exp = sd->exposure - sd->exposure_step;
2253 if (new_exp > 0x1700)
2254 new_exp = 0x1770;
2255 if (new_exp < 0x10)
2256 new_exp = 0x10;
2257 sd->exposure = new_exp;
2258 set_exposure(gspca_dev);
2259 sd->older_step = sd->old_step;
2260 sd->old_step = 0;
2261
2262 if (sd->old_step ^ sd->older_step)
2263 sd->exposure_step /= 2;
2264 else
2265 sd->exposure_step += 2;
2266 }
2267}
2268
2269static void sd_pkt_scan(struct gspca_dev *gspca_dev,
2270 struct gspca_frame *frame, /* target */
2271 u8 *data, /* isoc packet */
2272 int len) /* iso packet length */
2273{
2274 struct sd *sd = (struct sd *) gspca_dev;
2275 int avg_lum;
2276 static unsigned char frame_header[] =
2277 {0xff, 0xff, 0x00, 0xc4, 0xc4, 0x96};
2278 if (len == 64 && memcmp(data, frame_header, 6) == 0) {
2279 avg_lum = ((data[35] >> 2) & 3) |
2280 (data[20] << 2) |
2281 (data[19] << 10);
2282 avg_lum += ((data[35] >> 4) & 3) |
2283 (data[22] << 2) |
2284 (data[21] << 10);
2285 avg_lum += ((data[35] >> 6) & 3) |
2286 (data[24] << 2) |
2287 (data[23] << 10);
2288 avg_lum += (data[36] & 3) |
2289 (data[26] << 2) |
2290 (data[25] << 10);
2291 avg_lum += ((data[36] >> 2) & 3) |
2292 (data[28] << 2) |
2293 (data[27] << 10);
2294 avg_lum += ((data[36] >> 4) & 3) |
2295 (data[30] << 2) |
2296 (data[29] << 10);
2297 avg_lum += ((data[36] >> 6) & 3) |
2298 (data[32] << 2) |
2299 (data[31] << 10);
2300 avg_lum += ((data[44] >> 4) & 3) |
2301 (data[34] << 2) |
2302 (data[33] << 10);
2303 avg_lum >>= 9;
2304 atomic_set(&sd->avg_lum, avg_lum);
2305 gspca_frame_add(gspca_dev, LAST_PACKET,
2306 frame, data, len);
2307 return;
2308 }
2309 if (gspca_dev->last_packet_type == LAST_PACKET) {
2310 if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv
2311 & MODE_JPEG) {
2312 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
2313 sd->jpeg_hdr, JPEG_HDR_SZ);
2314 gspca_frame_add(gspca_dev, INTER_PACKET, frame,
2315 data, len);
2316 } else {
2317 gspca_frame_add(gspca_dev, FIRST_PACKET, frame,
2318 data, len);
2319 }
2320 } else {
2321 gspca_frame_add(gspca_dev, INTER_PACKET, frame, data, len);
2322 }
2323}
2324
2325/* sub-driver description */
2326static const struct sd_desc sd_desc = {
2327 .name = MODULE_NAME,
2328 .ctrls = sd_ctrls,
2329 .nctrls = ARRAY_SIZE(sd_ctrls),
2330 .config = sd_config,
2331 .init = sd_init,
2332 .start = sd_start,
2333 .stopN = sd_stopN,
2334 .stop0 = sd_stop0,
2335 .pkt_scan = sd_pkt_scan,
2336 .dq_callback = do_autoexposure,
2337#ifdef CONFIG_VIDEO_ADV_DEBUG
2338 .set_register = sd_dbg_s_register,
2339 .get_register = sd_dbg_g_register,
2340#endif
2341 .get_chip_ident = sd_chip_ident,
2342};
2343
2344#define SN9C20X(sensor, i2c_addr, button_mask) \
2345 .driver_info = (button_mask << 16) \
2346 | (SENSOR_ ## sensor << 8) \
2347 | (i2c_addr)
2348
2349static const __devinitdata struct usb_device_id device_table[] = {
2350 {USB_DEVICE(0x0c45, 0x6240), SN9C20X(MT9M001, 0x5d, 0)},
2351 {USB_DEVICE(0x0c45, 0x6242), SN9C20X(MT9M111, 0x5d, 0)},
2352 {USB_DEVICE(0x0c45, 0x6248), SN9C20X(OV9655, 0x30, 0)},
2353 {USB_DEVICE(0x0c45, 0x624e), SN9C20X(SOI968, 0x30, 0x10)},
2354 {USB_DEVICE(0x0c45, 0x624f), SN9C20X(OV9650, 0x30, 0)},
2355 {USB_DEVICE(0x0c45, 0x6251), SN9C20X(OV9650, 0x30, 0)},
2356 {USB_DEVICE(0x0c45, 0x6253), SN9C20X(OV9650, 0x30, 0)},
2357 {USB_DEVICE(0x0c45, 0x6260), SN9C20X(OV7670, 0x21, 0)},
2358 {USB_DEVICE(0x0c45, 0x6270), SN9C20X(MT9VPRB, 0x00, 0)},
2359 {USB_DEVICE(0x0c45, 0x627b), SN9C20X(OV7660, 0x21, 0)},
2360 {USB_DEVICE(0x0c45, 0x627c), SN9C20X(HV7131R, 0x11, 0)},
2361 {USB_DEVICE(0x0c45, 0x627f), SN9C20X(OV9650, 0x30, 0)},
2362 {USB_DEVICE(0x0c45, 0x6280), SN9C20X(MT9M001, 0x5d, 0)},
2363 {USB_DEVICE(0x0c45, 0x6282), SN9C20X(MT9M111, 0x5d, 0)},
2364 {USB_DEVICE(0x0c45, 0x6288), SN9C20X(OV9655, 0x30, 0)},
2365 {USB_DEVICE(0x0c45, 0x628e), SN9C20X(SOI968, 0x30, 0)},
2366 {USB_DEVICE(0x0c45, 0x628f), SN9C20X(OV9650, 0x30, 0)},
2367 {USB_DEVICE(0x0c45, 0x62a0), SN9C20X(OV7670, 0x21, 0)},
2368 {USB_DEVICE(0x0c45, 0x62b0), SN9C20X(MT9VPRB, 0x00, 0)},
2369 {USB_DEVICE(0x0c45, 0x62b3), SN9C20X(OV9655, 0x30, 0)},
2370 {USB_DEVICE(0x0c45, 0x62bb), SN9C20X(OV7660, 0x21, 0)},
2371 {USB_DEVICE(0x0c45, 0x62bc), SN9C20X(HV7131R, 0x11, 0)},
2372 {USB_DEVICE(0x045e, 0x00f4), SN9C20X(OV9650, 0x30, 0)},
2373 {USB_DEVICE(0x145f, 0x013d), SN9C20X(OV7660, 0x21, 0)},
2374 {USB_DEVICE(0x0458, 0x7029), SN9C20X(HV7131R, 0x11, 0)},
2375 {USB_DEVICE(0xa168, 0x0610), SN9C20X(HV7131R, 0x11, 0)},
2376 {USB_DEVICE(0xa168, 0x0611), SN9C20X(HV7131R, 0x11, 0)},
2377 {USB_DEVICE(0xa168, 0x0613), SN9C20X(HV7131R, 0x11, 0)},
2378 {USB_DEVICE(0xa168, 0x0618), SN9C20X(HV7131R, 0x11, 0)},
2379 {USB_DEVICE(0xa168, 0x0614), SN9C20X(MT9M111, 0x5d, 0)},
2380 {USB_DEVICE(0xa168, 0x0615), SN9C20X(MT9M111, 0x5d, 0)},
2381 {USB_DEVICE(0xa168, 0x0617), SN9C20X(MT9M111, 0x5d, 0)},
2382 {}
2383};
2384MODULE_DEVICE_TABLE(usb, device_table);
2385
2386/* -- device connect -- */
2387static int sd_probe(struct usb_interface *intf,
2388 const struct usb_device_id *id)
2389{
2390 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
2391 THIS_MODULE);
2392}
2393
2394static void sd_disconnect(struct usb_interface *intf)
2395{
2396#ifdef CONFIG_USB_GSPCA_SN9C20X_EVDEV
2397 struct gspca_dev *gspca_dev = usb_get_intfdata(intf);
2398
2399 sn9c20x_input_cleanup(gspca_dev);
2400#endif
2401
2402 gspca_disconnect(intf);
2403}
2404
2405static struct usb_driver sd_driver = {
2406 .name = MODULE_NAME,
2407 .id_table = device_table,
2408 .probe = sd_probe,
2409 .disconnect = sd_disconnect,
2410#ifdef CONFIG_PM
2411 .suspend = gspca_suspend,
2412 .resume = gspca_resume,
2413 .reset_resume = gspca_resume,
2414#endif
2415};
2416
2417/* -- module insert / remove -- */
2418static int __init sd_mod_init(void)
2419{
2420 int ret;
2421 ret = usb_register(&sd_driver);
2422 if (ret < 0)
2423 return ret;
2424 info("registered");
2425 return 0;
2426}
2427static void __exit sd_mod_exit(void)
2428{
2429 usb_deregister(&sd_driver);
2430 info("deregistered");
2431}
2432
2433module_init(sd_mod_init);
2434module_exit(sd_mod_exit);
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index 0d02f41fa7d0..d6332ab80669 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -1634,6 +1634,8 @@ static void setfreq(struct gspca_dev *gspca_dev)
1634{ 1634{
1635 struct sd *sd = (struct sd *) gspca_dev; 1635 struct sd *sd = (struct sd *) gspca_dev;
1636 1636
1637 if (gspca_dev->ctrl_dis & (1 << FREQ_IDX))
1638 return;
1637 if (sd->sensor == SENSOR_OV7660) { 1639 if (sd->sensor == SENSOR_OV7660) {
1638 switch (sd->freq) { 1640 switch (sd->freq) {
1639 case 0: /* Banding filter disabled */ 1641 case 0: /* Banding filter disabled */
@@ -1735,6 +1737,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
1735 1737
1736 /* create the JPEG header */ 1738 /* create the JPEG header */
1737 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 1739 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
1740 if (!sd->jpeg_hdr)
1741 return -ENOMEM;
1738 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 1742 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
1739 0x21); /* JPEG 422 */ 1743 0x21); /* JPEG 422 */
1740 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 1744 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/gspca/spca500.c b/drivers/media/video/gspca/spca500.c
index 8806b2ff82be..fab7ef85a6c1 100644
--- a/drivers/media/video/gspca/spca500.c
+++ b/drivers/media/video/gspca/spca500.c
@@ -670,6 +670,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
670 670
671 /* create the JPEG header */ 671 /* create the JPEG header */
672 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 672 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
673 if (!sd->jpeg_hdr)
674 return -ENOMEM;
673 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 675 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
674 0x22); /* JPEG 411 */ 676 0x22); /* JPEG 411 */
675 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 677 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/gspca/stk014.c b/drivers/media/video/gspca/stk014.c
index f25be20cf1a6..47628964801e 100644
--- a/drivers/media/video/gspca/stk014.c
+++ b/drivers/media/video/gspca/stk014.c
@@ -333,6 +333,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
333 333
334 /* create the JPEG header */ 334 /* create the JPEG header */
335 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 335 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
336 if (!sd->jpeg_hdr)
337 return -ENOMEM;
336 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 338 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
337 0x22); /* JPEG 411 */ 339 0x22); /* JPEG 411 */
338 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 340 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
index 3039ec208f3a..e5024c8496ef 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.c
@@ -64,7 +64,7 @@ static struct v4l2_pix_format hdcs1x00_mode[] = {
64 { 64 {
65 HDCS_1X00_DEF_WIDTH, 65 HDCS_1X00_DEF_WIDTH,
66 HDCS_1X00_DEF_HEIGHT, 66 HDCS_1X00_DEF_HEIGHT,
67 V4L2_PIX_FMT_SBGGR8, 67 V4L2_PIX_FMT_SGRBG8,
68 V4L2_FIELD_NONE, 68 V4L2_FIELD_NONE,
69 .sizeimage = 69 .sizeimage =
70 HDCS_1X00_DEF_WIDTH * HDCS_1X00_DEF_HEIGHT, 70 HDCS_1X00_DEF_WIDTH * HDCS_1X00_DEF_HEIGHT,
@@ -80,7 +80,7 @@ static struct v4l2_pix_format hdcs1020_mode[] = {
80 { 80 {
81 HDCS_1020_DEF_WIDTH, 81 HDCS_1020_DEF_WIDTH,
82 HDCS_1020_DEF_HEIGHT, 82 HDCS_1020_DEF_HEIGHT,
83 V4L2_PIX_FMT_SBGGR8, 83 V4L2_PIX_FMT_SGRBG8,
84 V4L2_FIELD_NONE, 84 V4L2_FIELD_NONE,
85 .sizeimage = 85 .sizeimage =
86 HDCS_1020_DEF_WIDTH * HDCS_1020_DEF_HEIGHT, 86 HDCS_1020_DEF_WIDTH * HDCS_1020_DEF_HEIGHT,
@@ -131,9 +131,11 @@ static int hdcs_reg_write_seq(struct sd *sd, u8 reg, u8 *vals, u8 len)
131 (reg + len > 0xff))) 131 (reg + len > 0xff)))
132 return -EINVAL; 132 return -EINVAL;
133 133
134 for (i = 0; i < len; i++, reg++) { 134 for (i = 0; i < len; i++) {
135 regs[2*i] = reg; 135 regs[2 * i] = reg;
136 regs[2*i+1] = vals[i]; 136 regs[2 * i + 1] = vals[i];
137 /* All addresses are shifted left one bit as bit 0 toggles r/w */
138 reg += 2;
137 } 139 }
138 140
139 return stv06xx_write_sensor_bytes(sd, regs, len); 141 return stv06xx_write_sensor_bytes(sd, regs, len);
@@ -174,7 +176,9 @@ static int hdcs_set_state(struct sd *sd, enum hdcs_power_state state)
174 } 176 }
175 177
176 ret = stv06xx_write_sensor(sd, HDCS_REG_CONTROL(sd), val); 178 ret = stv06xx_write_sensor(sd, HDCS_REG_CONTROL(sd), val);
177 if (ret < 0) 179
180 /* Update the state if the write succeeded */
181 if (!ret)
178 hdcs->state = state; 182 hdcs->state = state;
179 183
180 return ret; 184 return ret;
diff --git a/drivers/media/video/gspca/sunplus.c b/drivers/media/video/gspca/sunplus.c
index 9623f294bdac..5127bbf9dd26 100644
--- a/drivers/media/video/gspca/sunplus.c
+++ b/drivers/media/video/gspca/sunplus.c
@@ -973,6 +973,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
973 973
974 /* create the JPEG header */ 974 /* create the JPEG header */
975 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 975 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
976 if (!sd->jpeg_hdr)
977 return -ENOMEM;
976 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 978 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
977 0x22); /* JPEG 411 */ 979 0x22); /* JPEG 411 */
978 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 980 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c
index 08422d315e68..3d2756f7874a 100644
--- a/drivers/media/video/gspca/zc3xx.c
+++ b/drivers/media/video/gspca/zc3xx.c
@@ -7243,6 +7243,8 @@ static int sd_start(struct gspca_dev *gspca_dev)
7243 7243
7244 /* create the JPEG header */ 7244 /* create the JPEG header */
7245 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL); 7245 sd->jpeg_hdr = kmalloc(JPEG_HDR_SZ, GFP_KERNEL);
7246 if (!sd->jpeg_hdr)
7247 return -ENOMEM;
7246 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width, 7248 jpeg_define(sd->jpeg_hdr, gspca_dev->height, gspca_dev->width,
7247 0x21); /* JPEG 422 */ 7249 0x21); /* JPEG 422 */
7248 jpeg_set_qual(sd->jpeg_hdr, sd->quality); 7250 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
diff --git a/drivers/media/video/mt9v011.c b/drivers/media/video/mt9v011.c
index 1fe8fc9183a7..b2260de645f0 100644
--- a/drivers/media/video/mt9v011.c
+++ b/drivers/media/video/mt9v011.c
@@ -8,6 +8,7 @@
8#include <linux/i2c.h> 8#include <linux/i2c.h>
9#include <linux/videodev2.h> 9#include <linux/videodev2.h>
10#include <linux/delay.h> 10#include <linux/delay.h>
11#include <asm/div64.h>
11#include <media/v4l2-device.h> 12#include <media/v4l2-device.h>
12#include "mt9v011.h" 13#include "mt9v011.h"
13#include <media/v4l2-i2c-drv.h> 14#include <media/v4l2-i2c-drv.h>
@@ -57,6 +58,7 @@ static struct v4l2_queryctrl mt9v011_qctrl[] = {
57struct mt9v011 { 58struct mt9v011 {
58 struct v4l2_subdev sd; 59 struct v4l2_subdev sd;
59 unsigned width, height; 60 unsigned width, height;
61 unsigned xtal;
60 62
61 u16 global_gain, red_bal, blue_bal; 63 u16 global_gain, red_bal, blue_bal;
62}; 64};
@@ -131,7 +133,7 @@ static const struct i2c_reg_value mt9v011_init_default[] = {
131 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 }, 133 { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
132 { R20_MT9V011_READ_MODE, 0x1000 }, 134 { R20_MT9V011_READ_MODE, 0x1000 },
133 135
134 { R07_MT9V011_OUT_CTRL, 0x000a }, /* chip enable */ 136 { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
135}; 137};
136 138
137static void set_balance(struct v4l2_subdev *sd) 139static void set_balance(struct v4l2_subdev *sd)
@@ -154,6 +156,31 @@ static void set_balance(struct v4l2_subdev *sd)
154 mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain); 156 mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
155} 157}
156 158
159static void calc_fps(struct v4l2_subdev *sd)
160{
161 struct mt9v011 *core = to_mt9v011(sd);
162 unsigned height, width, hblank, vblank, speed;
163 unsigned row_time, t_time;
164 u64 frames_per_ms;
165 unsigned tmp;
166
167 height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
168 width = mt9v011_read(sd, R04_MT9V011_WIDTH);
169 hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
170 vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
171 speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
172
173 row_time = (width + 113 + hblank) * (speed + 2);
174 t_time = row_time * (height + vblank + 1);
175
176 frames_per_ms = core->xtal * 1000l;
177 do_div(frames_per_ms, t_time);
178 tmp = frames_per_ms;
179
180 v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
181 tmp / 1000, tmp % 1000, t_time);
182}
183
157static void set_res(struct v4l2_subdev *sd) 184static void set_res(struct v4l2_subdev *sd)
158{ 185{
159 struct mt9v011 *core = to_mt9v011(sd); 186 struct mt9v011 *core = to_mt9v011(sd);
@@ -175,10 +202,12 @@ static void set_res(struct v4l2_subdev *sd)
175 mt9v011_write(sd, R04_MT9V011_WIDTH, core->width); 202 mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
176 mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width); 203 mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
177 204
178 vstart = 8 + (640 - core->height) / 2; 205 vstart = 8 + (480 - core->height) / 2;
179 mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart); 206 mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
180 mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height); 207 mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
181 mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height); 208 mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
209
210 calc_fps(sd);
182}; 211};
183 212
184static int mt9v011_reset(struct v4l2_subdev *sd, u32 val) 213static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
@@ -215,6 +244,23 @@ static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
215 return -EINVAL; 244 return -EINVAL;
216} 245}
217 246
247static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
248{
249 int i;
250
251 v4l2_dbg(1, debug, sd, "queryctrl called\n");
252
253 for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
254 if (qc->id && qc->id == mt9v011_qctrl[i].id) {
255 memcpy(qc, &(mt9v011_qctrl[i]),
256 sizeof(*qc));
257 return 0;
258 }
259
260 return -EINVAL;
261}
262
263
218static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) 264static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
219{ 265{
220 struct mt9v011 *core = to_mt9v011(sd); 266 struct mt9v011 *core = to_mt9v011(sd);
@@ -294,6 +340,22 @@ static int mt9v011_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
294 return 0; 340 return 0;
295} 341}
296 342
343static int mt9v011_s_config(struct v4l2_subdev *sd, int dumb, void *data)
344{
345 struct mt9v011 *core = to_mt9v011(sd);
346 unsigned *xtal = data;
347
348 v4l2_dbg(1, debug, sd, "s_config called\n");
349
350 if (xtal) {
351 core->xtal = *xtal;
352 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
353 *xtal / 1000000, (*xtal / 1000) % 1000);
354 }
355
356 return 0;
357}
358
297 359
298#ifdef CONFIG_VIDEO_ADV_DEBUG 360#ifdef CONFIG_VIDEO_ADV_DEBUG
299static int mt9v011_g_register(struct v4l2_subdev *sd, 361static int mt9v011_g_register(struct v4l2_subdev *sd,
@@ -338,9 +400,11 @@ static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
338} 400}
339 401
340static const struct v4l2_subdev_core_ops mt9v011_core_ops = { 402static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
403 .queryctrl = mt9v011_queryctrl,
341 .g_ctrl = mt9v011_g_ctrl, 404 .g_ctrl = mt9v011_g_ctrl,
342 .s_ctrl = mt9v011_s_ctrl, 405 .s_ctrl = mt9v011_s_ctrl,
343 .reset = mt9v011_reset, 406 .reset = mt9v011_reset,
407 .s_config = mt9v011_s_config,
344 .g_chip_ident = mt9v011_g_chip_ident, 408 .g_chip_ident = mt9v011_g_chip_ident,
345#ifdef CONFIG_VIDEO_ADV_DEBUG 409#ifdef CONFIG_VIDEO_ADV_DEBUG
346 .g_register = mt9v011_g_register, 410 .g_register = mt9v011_g_register,
@@ -395,6 +459,7 @@ static int mt9v011_probe(struct i2c_client *c,
395 core->global_gain = 0x0024; 459 core->global_gain = 0x0024;
396 core->width = 640; 460 core->width = 640;
397 core->height = 480; 461 core->height = 480;
462 core->xtal = 27000000; /* Hz */
398 463
399 v4l_info(c, "chip found @ 0x%02x (%s)\n", 464 v4l_info(c, "chip found @ 0x%02x (%s)\n",
400 c->addr << 1, c->adapter->name); 465 c->addr << 1, c->adapter->name);
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
index bae61b22501c..7d430835655f 100644
--- a/drivers/mfd/twl4030-irq.c
+++ b/drivers/mfd/twl4030-irq.c
@@ -180,14 +180,9 @@ static struct completion irq_event;
180static int twl4030_irq_thread(void *data) 180static int twl4030_irq_thread(void *data)
181{ 181{
182 long irq = (long)data; 182 long irq = (long)data;
183 struct irq_desc *desc = irq_to_desc(irq);
184 static unsigned i2c_errors; 183 static unsigned i2c_errors;
185 static const unsigned max_i2c_errors = 100; 184 static const unsigned max_i2c_errors = 100;
186 185
187 if (!desc) {
188 pr_err("twl4030: Invalid IRQ: %ld\n", irq);
189 return -EINVAL;
190 }
191 186
192 current->flags |= PF_NOFREEZE; 187 current->flags |= PF_NOFREEZE;
193 188
@@ -240,7 +235,7 @@ static int twl4030_irq_thread(void *data)
240 } 235 }
241 local_irq_enable(); 236 local_irq_enable();
242 237
243 desc->chip->unmask(irq); 238 enable_irq(irq);
244 } 239 }
245 240
246 return 0; 241 return 0;
@@ -255,25 +250,13 @@ static int twl4030_irq_thread(void *data)
255 * thread. All we do here is acknowledge and mask the interrupt and wakeup 250 * thread. All we do here is acknowledge and mask the interrupt and wakeup
256 * the kernel thread. 251 * the kernel thread.
257 */ 252 */
258static void handle_twl4030_pih(unsigned int irq, struct irq_desc *desc) 253static irqreturn_t handle_twl4030_pih(int irq, void *devid)
259{ 254{
260 /* Acknowledge, clear *AND* mask the interrupt... */ 255 /* Acknowledge, clear *AND* mask the interrupt... */
261 desc->chip->ack(irq); 256 disable_irq_nosync(irq);
262 complete(&irq_event); 257 complete(devid);
263} 258 return IRQ_HANDLED;
264
265static struct task_struct *start_twl4030_irq_thread(long irq)
266{
267 struct task_struct *thread;
268
269 init_completion(&irq_event);
270 thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq");
271 if (!thread)
272 pr_err("twl4030: could not create irq %ld thread!\n", irq);
273
274 return thread;
275} 259}
276
277/*----------------------------------------------------------------------*/ 260/*----------------------------------------------------------------------*/
278 261
279/* 262/*
@@ -734,18 +717,28 @@ int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
734 } 717 }
735 718
736 /* install an irq handler to demultiplex the TWL4030 interrupt */ 719 /* install an irq handler to demultiplex the TWL4030 interrupt */
737 task = start_twl4030_irq_thread(irq_num);
738 if (!task) {
739 pr_err("twl4030: irq thread FAIL\n");
740 status = -ESRCH;
741 goto fail;
742 }
743 720
744 set_irq_data(irq_num, task);
745 set_irq_chained_handler(irq_num, handle_twl4030_pih);
746 721
747 return status; 722 init_completion(&irq_event);
748 723
724 status = request_irq(irq_num, handle_twl4030_pih, IRQF_DISABLED,
725 "TWL4030-PIH", &irq_event);
726 if (status < 0) {
727 pr_err("twl4030: could not claim irq%d: %d\n", irq_num, status);
728 goto fail_rqirq;
729 }
730
731 task = kthread_run(twl4030_irq_thread, (void *)irq_num, "twl4030-irq");
732 if (IS_ERR(task)) {
733 pr_err("twl4030: could not create irq %d thread!\n", irq_num);
734 status = PTR_ERR(task);
735 goto fail_kthread;
736 }
737 return status;
738fail_kthread:
739 free_irq(irq_num, &irq_event);
740fail_rqirq:
741 /* clean up twl4030_sih_setup */
749fail: 742fail:
750 for (i = irq_base; i < irq_end; i++) 743 for (i = irq_base; i < irq_end; i++)
751 set_irq_chip_and_handler(i, NULL, NULL); 744 set_irq_chip_and_handler(i, NULL, NULL);
diff --git a/drivers/misc/cb710/sgbuf2.c b/drivers/misc/cb710/sgbuf2.c
index d38a7acdb6ec..d019746551f3 100644
--- a/drivers/misc/cb710/sgbuf2.c
+++ b/drivers/misc/cb710/sgbuf2.c
@@ -114,7 +114,6 @@ static void sg_dwiter_write_slow(struct sg_mapping_iter *miter, uint32_t data)
114 if (!left) 114 if (!left)
115 return; 115 return;
116 addr += len; 116 addr += len;
117 flush_kernel_dcache_page(miter->page);
118 } while (sg_dwiter_next(miter)); 117 } while (sg_dwiter_next(miter));
119} 118}
120 119
@@ -142,9 +141,6 @@ void cb710_sg_dwiter_write_next_block(struct sg_mapping_iter *miter, uint32_t da
142 return; 141 return;
143 } else 142 } else
144 sg_dwiter_write_slow(miter, data); 143 sg_dwiter_write_slow(miter, data);
145
146 if (miter->length == miter->consumed)
147 flush_kernel_dcache_page(miter->page);
148} 144}
149EXPORT_SYMBOL_GPL(cb710_sg_dwiter_write_next_block); 145EXPORT_SYMBOL_GPL(cb710_sg_dwiter_write_next_block);
150 146
diff --git a/drivers/misc/eeprom/at25.c b/drivers/misc/eeprom/at25.c
index b34cb5f79eea..2e535a0ccd5e 100644
--- a/drivers/misc/eeprom/at25.c
+++ b/drivers/misc/eeprom/at25.c
@@ -173,6 +173,7 @@ at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
173 unsigned segment; 173 unsigned segment;
174 unsigned offset = (unsigned) off; 174 unsigned offset = (unsigned) off;
175 u8 *cp = bounce + 1; 175 u8 *cp = bounce + 1;
176 int sr;
176 177
177 *cp = AT25_WREN; 178 *cp = AT25_WREN;
178 status = spi_write(at25->spi, cp, 1); 179 status = spi_write(at25->spi, cp, 1);
@@ -214,7 +215,6 @@ at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
214 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT); 215 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
215 retries = 0; 216 retries = 0;
216 do { 217 do {
217 int sr;
218 218
219 sr = spi_w8r8(at25->spi, AT25_RDSR); 219 sr = spi_w8r8(at25->spi, AT25_RDSR);
220 if (sr < 0 || (sr & AT25_SR_nRDY)) { 220 if (sr < 0 || (sr & AT25_SR_nRDY)) {
@@ -228,7 +228,7 @@ at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
228 break; 228 break;
229 } while (retries++ < 3 || time_before_eq(jiffies, timeout)); 229 } while (retries++ < 3 || time_before_eq(jiffies, timeout));
230 230
231 if (time_after(jiffies, timeout)) { 231 if ((sr < 0) || (sr & AT25_SR_nRDY)) {
232 dev_err(&at25->spi->dev, 232 dev_err(&at25->spi->dev,
233 "write %d bytes offset %d, " 233 "write %d bytes offset %d, "
234 "timeout after %u msecs\n", 234 "timeout after %u msecs\n",
diff --git a/drivers/mmc/host/cb710-mmc.c b/drivers/mmc/host/cb710-mmc.c
index 11efefb1af51..4e72964a7b43 100644
--- a/drivers/mmc/host/cb710-mmc.c
+++ b/drivers/mmc/host/cb710-mmc.c
@@ -278,7 +278,7 @@ static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data)
278 if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8))) 278 if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8)))
279 return -EINVAL; 279 return -EINVAL;
280 280
281 sg_miter_start(&miter, data->sg, data->sg_len, 0); 281 sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_TO_SG);
282 282
283 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 283 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
284 15, CB710_MMC_C2_READ_PIO_SIZE_MASK); 284 15, CB710_MMC_C2_READ_PIO_SIZE_MASK);
@@ -307,7 +307,7 @@ static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data)
307 goto out; 307 goto out;
308 } 308 }
309out: 309out:
310 cb710_sg_miter_stop_writing(&miter); 310 sg_miter_stop(&miter);
311 return err; 311 return err;
312} 312}
313 313
@@ -322,7 +322,7 @@ static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data)
322 if (unlikely(data->blocks > 1 && data->blksz & 15)) 322 if (unlikely(data->blocks > 1 && data->blksz & 15))
323 return -EINVAL; 323 return -EINVAL;
324 324
325 sg_miter_start(&miter, data->sg, data->sg_len, 0); 325 sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_FROM_SG);
326 326
327 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 327 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT,
328 0, CB710_MMC_C2_READ_PIO_SIZE_MASK); 328 0, CB710_MMC_C2_READ_PIO_SIZE_MASK);
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c
index e0be21a4a696..bf98d7cc928a 100644
--- a/drivers/mmc/host/imxmmc.c
+++ b/drivers/mmc/host/imxmmc.c
@@ -652,7 +652,7 @@ static irqreturn_t imxmci_irq(int irq, void *devid)
652 set_bit(IMXMCI_PEND_STARTED_b, &host->pending_events); 652 set_bit(IMXMCI_PEND_STARTED_b, &host->pending_events);
653 tasklet_schedule(&host->tasklet); 653 tasklet_schedule(&host->tasklet);
654 654
655 return IRQ_RETVAL(handled);; 655 return IRQ_RETVAL(handled);
656} 656}
657 657
658static void imxmci_tasklet_fnc(unsigned long data) 658static void imxmci_tasklet_fnc(unsigned long data)
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of.c
index d79fa55c3b89..1e8aa590bb39 100644
--- a/drivers/mmc/host/sdhci-of.c
+++ b/drivers/mmc/host/sdhci-of.c
@@ -158,6 +158,13 @@ static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
158 return of_host->clock; 158 return of_host->clock;
159} 159}
160 160
161static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
162{
163 struct sdhci_of_host *of_host = sdhci_priv(host);
164
165 return of_host->clock / 256 / 16;
166}
167
161static unsigned int esdhc_get_timeout_clock(struct sdhci_host *host) 168static unsigned int esdhc_get_timeout_clock(struct sdhci_host *host)
162{ 169{
163 struct sdhci_of_host *of_host = sdhci_priv(host); 170 struct sdhci_of_host *of_host = sdhci_priv(host);
@@ -184,6 +191,7 @@ static struct sdhci_of_data sdhci_esdhc = {
184 .set_clock = esdhc_set_clock, 191 .set_clock = esdhc_set_clock,
185 .enable_dma = esdhc_enable_dma, 192 .enable_dma = esdhc_enable_dma,
186 .get_max_clock = esdhc_get_max_clock, 193 .get_max_clock = esdhc_get_max_clock,
194 .get_min_clock = esdhc_get_min_clock,
187 .get_timeout_clock = esdhc_get_timeout_clock, 195 .get_timeout_clock = esdhc_get_timeout_clock,
188 }, 196 },
189}; 197};
@@ -226,7 +234,7 @@ static int __devinit sdhci_of_probe(struct of_device *ofdev,
226 return -ENODEV; 234 return -ENODEV;
227 235
228 host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host)); 236 host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
229 if (!host) 237 if (IS_ERR(host))
230 return -ENOMEM; 238 return -ENOMEM;
231 239
232 of_host = sdhci_priv(host); 240 of_host = sdhci_priv(host);
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 6779b4ecab18..fc96f8cb9c0b 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -773,8 +773,14 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
773 } 773 }
774 774
775 if (!(host->flags & SDHCI_REQ_USE_DMA)) { 775 if (!(host->flags & SDHCI_REQ_USE_DMA)) {
776 sg_miter_start(&host->sg_miter, 776 int flags;
777 data->sg, data->sg_len, SG_MITER_ATOMIC); 777
778 flags = SG_MITER_ATOMIC;
779 if (host->data->flags & MMC_DATA_READ)
780 flags |= SG_MITER_TO_SG;
781 else
782 flags |= SG_MITER_FROM_SG;
783 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
778 host->blocks = data->blocks; 784 host->blocks = data->blocks;
779 } 785 }
780 786
@@ -1766,7 +1772,10 @@ int sdhci_add_host(struct sdhci_host *host)
1766 * Set host parameters. 1772 * Set host parameters.
1767 */ 1773 */
1768 mmc->ops = &sdhci_ops; 1774 mmc->ops = &sdhci_ops;
1769 mmc->f_min = host->max_clk / 256; 1775 if (host->ops->get_min_clock)
1776 mmc->f_min = host->ops->get_min_clock(host);
1777 else
1778 mmc->f_min = host->max_clk / 256;
1770 mmc->f_max = host->max_clk; 1779 mmc->f_max = host->max_clk;
1771 mmc->caps = MMC_CAP_SDIO_IRQ; 1780 mmc->caps = MMC_CAP_SDIO_IRQ;
1772 1781
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 831ddf7dcb49..c77e9ff30223 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -302,6 +302,7 @@ struct sdhci_ops {
302 302
303 int (*enable_dma)(struct sdhci_host *host); 303 int (*enable_dma)(struct sdhci_host *host);
304 unsigned int (*get_max_clock)(struct sdhci_host *host); 304 unsigned int (*get_max_clock)(struct sdhci_host *host);
305 unsigned int (*get_min_clock)(struct sdhci_host *host);
305 unsigned int (*get_timeout_clock)(struct sdhci_host *host); 306 unsigned int (*get_timeout_clock)(struct sdhci_host *host);
306}; 307};
307 308
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 0b98654d8eed..7a58bd5522fd 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -284,13 +284,6 @@ config MTD_L440GX
284 284
285 BE VERY CAREFUL. 285 BE VERY CAREFUL.
286 286
287config MTD_SBC8240
288 tristate "Flash device on SBC8240"
289 depends on MTD_JEDECPROBE && 8260
290 help
291 Flash access on the SBC8240 board from Wind River. See
292 <http://www.windriver.com/products/sbc8240/>
293
294config MTD_TQM8XXL 287config MTD_TQM8XXL
295 tristate "CFI Flash device mapped on TQM8XXL" 288 tristate "CFI Flash device mapped on TQM8XXL"
296 depends on MTD_CFI && TQM8xxL 289 depends on MTD_CFI && TQM8xxL
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 8bae7f9850c0..5beb0662d724 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -50,7 +50,6 @@ obj-$(CONFIG_MTD_UCLINUX) += uclinux.o
50obj-$(CONFIG_MTD_NETtel) += nettel.o 50obj-$(CONFIG_MTD_NETtel) += nettel.o
51obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o 51obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o
52obj-$(CONFIG_MTD_H720X) += h720x-flash.o 52obj-$(CONFIG_MTD_H720X) += h720x-flash.o
53obj-$(CONFIG_MTD_SBC8240) += sbc8240.o
54obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o 53obj-$(CONFIG_MTD_IXP4XX) += ixp4xx.o
55obj-$(CONFIG_MTD_IXP2000) += ixp2000.o 54obj-$(CONFIG_MTD_IXP2000) += ixp2000.o
56obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o 55obj-$(CONFIG_MTD_WRSBC8260) += wr_sbc82xx_flash.o
diff --git a/drivers/mtd/maps/sbc8240.c b/drivers/mtd/maps/sbc8240.c
deleted file mode 100644
index d5374cdcb163..000000000000
--- a/drivers/mtd/maps/sbc8240.c
+++ /dev/null
@@ -1,250 +0,0 @@
1/*
2 * Handle mapping of the flash memory access routines on the SBC8240 board.
3 *
4 * Carolyn Smith, Tektronix, Inc.
5 *
6 * This code is GPLed
7 */
8
9/*
10 * The SBC8240 has 2 flash banks.
11 * Bank 0 is a 512 KiB AMD AM29F040B; 8 x 64 KiB sectors.
12 * It contains the U-Boot code (7 sectors) and the environment (1 sector).
13 * Bank 1 is 4 x 1 MiB AMD AM29LV800BT; 15 x 64 KiB sectors, 1 x 32 KiB sector,
14 * 2 x 8 KiB sectors, 1 x 16 KiB sectors.
15 * Both parts are JEDEC compatible.
16 */
17
18#include <linux/module.h>
19#include <linux/types.h>
20#include <linux/kernel.h>
21#include <asm/io.h>
22
23#include <linux/mtd/mtd.h>
24#include <linux/mtd/map.h>
25#include <linux/mtd/cfi.h>
26
27#ifdef CONFIG_MTD_PARTITIONS
28#include <linux/mtd/partitions.h>
29#endif
30
31#define DEBUG
32
33#ifdef DEBUG
34# define debugk(fmt,args...) printk(fmt ,##args)
35#else
36# define debugk(fmt,args...)
37#endif
38
39
40#define WINDOW_ADDR0 0xFFF00000 /* 512 KiB */
41#define WINDOW_SIZE0 0x00080000
42#define BUSWIDTH0 1
43
44#define WINDOW_ADDR1 0xFF000000 /* 4 MiB */
45#define WINDOW_SIZE1 0x00400000
46#define BUSWIDTH1 8
47
48#define MSG_PREFIX "sbc8240:" /* prefix for our printk()'s */
49#define MTDID "sbc8240-%d" /* for mtdparts= partitioning */
50
51
52static struct map_info sbc8240_map[2] = {
53 {
54 .name = "sbc8240 Flash Bank #0",
55 .size = WINDOW_SIZE0,
56 .bankwidth = BUSWIDTH0,
57 },
58 {
59 .name = "sbc8240 Flash Bank #1",
60 .size = WINDOW_SIZE1,
61 .bankwidth = BUSWIDTH1,
62 }
63};
64
65#define NUM_FLASH_BANKS ARRAY_SIZE(sbc8240_map)
66
67/*
68 * The following defines the partition layout of SBC8240 boards.
69 *
70 * See include/linux/mtd/partitions.h for definition of the
71 * mtd_partition structure.
72 *
73 * The *_max_flash_size is the maximum possible mapped flash size
74 * which is not necessarily the actual flash size. It must correspond
75 * to the value specified in the mapping definition defined by the
76 * "struct map_desc *_io_desc" for the corresponding machine.
77 */
78
79#ifdef CONFIG_MTD_PARTITIONS
80
81static struct mtd_partition sbc8240_uboot_partitions [] = {
82 /* Bank 0 */
83 {
84 .name = "U-boot", /* U-Boot Firmware */
85 .offset = 0,
86 .size = 0x00070000, /* 7 x 64 KiB sectors */
87 .mask_flags = MTD_WRITEABLE, /* force read-only */
88 },
89 {
90 .name = "environment", /* U-Boot environment */
91 .offset = 0x00070000,
92 .size = 0x00010000, /* 1 x 64 KiB sector */
93 },
94};
95
96static struct mtd_partition sbc8240_fs_partitions [] = {
97 {
98 .name = "jffs", /* JFFS filesystem */
99 .offset = 0,
100 .size = 0x003C0000, /* 4 * 15 * 64KiB */
101 },
102 {
103 .name = "tmp32",
104 .offset = 0x003C0000,
105 .size = 0x00020000, /* 4 * 32KiB */
106 },
107 {
108 .name = "tmp8a",
109 .offset = 0x003E0000,
110 .size = 0x00008000, /* 4 * 8KiB */
111 },
112 {
113 .name = "tmp8b",
114 .offset = 0x003E8000,
115 .size = 0x00008000, /* 4 * 8KiB */
116 },
117 {
118 .name = "tmp16",
119 .offset = 0x003F0000,
120 .size = 0x00010000, /* 4 * 16KiB */
121 }
122};
123
124/* trivial struct to describe partition information */
125struct mtd_part_def
126{
127 int nums;
128 unsigned char *type;
129 struct mtd_partition* mtd_part;
130};
131
132static struct mtd_info *sbc8240_mtd[NUM_FLASH_BANKS];
133static struct mtd_part_def sbc8240_part_banks[NUM_FLASH_BANKS];
134
135
136#endif /* CONFIG_MTD_PARTITIONS */
137
138
139static int __init init_sbc8240_mtd (void)
140{
141 static struct _cjs {
142 u_long addr;
143 u_long size;
144 } pt[NUM_FLASH_BANKS] = {
145 {
146 .addr = WINDOW_ADDR0,
147 .size = WINDOW_SIZE0
148 },
149 {
150 .addr = WINDOW_ADDR1,
151 .size = WINDOW_SIZE1
152 },
153 };
154
155 int devicesfound = 0;
156 int i,j;
157
158 for (i = 0; i < NUM_FLASH_BANKS; i++) {
159 printk (KERN_NOTICE MSG_PREFIX
160 "Probing 0x%08lx at 0x%08lx\n", pt[i].size, pt[i].addr);
161
162 sbc8240_map[i].map_priv_1 =
163 (unsigned long) ioremap (pt[i].addr, pt[i].size);
164 if (!sbc8240_map[i].map_priv_1) {
165 printk (MSG_PREFIX "failed to ioremap\n");
166 for (j = 0; j < i; j++) {
167 iounmap((void *) sbc8240_map[j].map_priv_1);
168 sbc8240_map[j].map_priv_1 = 0;
169 }
170 return -EIO;
171 }
172 simple_map_init(&sbc8240_mtd[i]);
173
174 sbc8240_mtd[i] = do_map_probe("jedec_probe", &sbc8240_map[i]);
175
176 if (sbc8240_mtd[i]) {
177 sbc8240_mtd[i]->module = THIS_MODULE;
178 devicesfound++;
179 } else {
180 if (sbc8240_map[i].map_priv_1) {
181 iounmap((void *) sbc8240_map[i].map_priv_1);
182 sbc8240_map[i].map_priv_1 = 0;
183 }
184 }
185 }
186
187 if (!devicesfound) {
188 printk(KERN_NOTICE MSG_PREFIX
189 "No suppported flash chips found!\n");
190 return -ENXIO;
191 }
192
193#ifdef CONFIG_MTD_PARTITIONS
194 sbc8240_part_banks[0].mtd_part = sbc8240_uboot_partitions;
195 sbc8240_part_banks[0].type = "static image";
196 sbc8240_part_banks[0].nums = ARRAY_SIZE(sbc8240_uboot_partitions);
197 sbc8240_part_banks[1].mtd_part = sbc8240_fs_partitions;
198 sbc8240_part_banks[1].type = "static file system";
199 sbc8240_part_banks[1].nums = ARRAY_SIZE(sbc8240_fs_partitions);
200
201 for (i = 0; i < NUM_FLASH_BANKS; i++) {
202
203 if (!sbc8240_mtd[i]) continue;
204 if (sbc8240_part_banks[i].nums == 0) {
205 printk (KERN_NOTICE MSG_PREFIX
206 "No partition info available, registering whole device\n");
207 add_mtd_device(sbc8240_mtd[i]);
208 } else {
209 printk (KERN_NOTICE MSG_PREFIX
210 "Using %s partition definition\n", sbc8240_part_banks[i].mtd_part->name);
211 add_mtd_partitions (sbc8240_mtd[i],
212 sbc8240_part_banks[i].mtd_part,
213 sbc8240_part_banks[i].nums);
214 }
215 }
216#else
217 printk(KERN_NOTICE MSG_PREFIX
218 "Registering %d flash banks at once\n", devicesfound);
219
220 for (i = 0; i < devicesfound; i++) {
221 add_mtd_device(sbc8240_mtd[i]);
222 }
223#endif /* CONFIG_MTD_PARTITIONS */
224
225 return devicesfound == 0 ? -ENXIO : 0;
226}
227
228static void __exit cleanup_sbc8240_mtd (void)
229{
230 int i;
231
232 for (i = 0; i < NUM_FLASH_BANKS; i++) {
233 if (sbc8240_mtd[i]) {
234 del_mtd_device (sbc8240_mtd[i]);
235 map_destroy (sbc8240_mtd[i]);
236 }
237 if (sbc8240_map[i].map_priv_1) {
238 iounmap ((void *) sbc8240_map[i].map_priv_1);
239 sbc8240_map[i].map_priv_1 = 0;
240 }
241 }
242}
243
244module_init (init_sbc8240_mtd);
245module_exit (cleanup_sbc8240_mtd);
246
247MODULE_LICENSE ("GPL");
248MODULE_AUTHOR ("Carolyn Smith <carolyn.smith@tektronix.com>");
249MODULE_DESCRIPTION ("MTD map driver for SBC8240 boards");
250
diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c
index c3f62654b6df..7baba40c1ed2 100644
--- a/drivers/mtd/mtd_blkdevs.c
+++ b/drivers/mtd/mtd_blkdevs.c
@@ -144,7 +144,7 @@ static int blktrans_open(struct block_device *bdev, fmode_t mode)
144 struct mtd_blktrans_ops *tr = dev->tr; 144 struct mtd_blktrans_ops *tr = dev->tr;
145 int ret = -ENODEV; 145 int ret = -ENODEV;
146 146
147 if (!try_module_get(dev->mtd->owner)) 147 if (!get_mtd_device(NULL, dev->mtd->index))
148 goto out; 148 goto out;
149 149
150 if (!try_module_get(tr->owner)) 150 if (!try_module_get(tr->owner))
@@ -158,7 +158,7 @@ static int blktrans_open(struct block_device *bdev, fmode_t mode)
158 ret = 0; 158 ret = 0;
159 if (tr->open && (ret = tr->open(dev))) { 159 if (tr->open && (ret = tr->open(dev))) {
160 dev->mtd->usecount--; 160 dev->mtd->usecount--;
161 module_put(dev->mtd->owner); 161 put_mtd_device(dev->mtd);
162 out_tr: 162 out_tr:
163 module_put(tr->owner); 163 module_put(tr->owner);
164 } 164 }
@@ -177,7 +177,7 @@ static int blktrans_release(struct gendisk *disk, fmode_t mode)
177 177
178 if (!ret) { 178 if (!ret) {
179 dev->mtd->usecount--; 179 dev->mtd->usecount--;
180 module_put(dev->mtd->owner); 180 put_mtd_device(dev->mtd);
181 module_put(tr->owner); 181 module_put(tr->owner);
182 } 182 }
183 183
diff --git a/drivers/mtd/mtdblock.c b/drivers/mtd/mtdblock.c
index 208c6faa0358..77db5ce24d92 100644
--- a/drivers/mtd/mtdblock.c
+++ b/drivers/mtd/mtdblock.c
@@ -29,6 +29,8 @@ static struct mtdblk_dev {
29 enum { STATE_EMPTY, STATE_CLEAN, STATE_DIRTY } cache_state; 29 enum { STATE_EMPTY, STATE_CLEAN, STATE_DIRTY } cache_state;
30} *mtdblks[MAX_MTD_DEVICES]; 30} *mtdblks[MAX_MTD_DEVICES];
31 31
32static struct mutex mtdblks_lock;
33
32/* 34/*
33 * Cache stuff... 35 * Cache stuff...
34 * 36 *
@@ -270,15 +272,19 @@ static int mtdblock_open(struct mtd_blktrans_dev *mbd)
270 272
271 DEBUG(MTD_DEBUG_LEVEL1,"mtdblock_open\n"); 273 DEBUG(MTD_DEBUG_LEVEL1,"mtdblock_open\n");
272 274
275 mutex_lock(&mtdblks_lock);
273 if (mtdblks[dev]) { 276 if (mtdblks[dev]) {
274 mtdblks[dev]->count++; 277 mtdblks[dev]->count++;
278 mutex_unlock(&mtdblks_lock);
275 return 0; 279 return 0;
276 } 280 }
277 281
278 /* OK, it's not open. Create cache info for it */ 282 /* OK, it's not open. Create cache info for it */
279 mtdblk = kzalloc(sizeof(struct mtdblk_dev), GFP_KERNEL); 283 mtdblk = kzalloc(sizeof(struct mtdblk_dev), GFP_KERNEL);
280 if (!mtdblk) 284 if (!mtdblk) {
285 mutex_unlock(&mtdblks_lock);
281 return -ENOMEM; 286 return -ENOMEM;
287 }
282 288
283 mtdblk->count = 1; 289 mtdblk->count = 1;
284 mtdblk->mtd = mtd; 290 mtdblk->mtd = mtd;
@@ -291,6 +297,7 @@ static int mtdblock_open(struct mtd_blktrans_dev *mbd)
291 } 297 }
292 298
293 mtdblks[dev] = mtdblk; 299 mtdblks[dev] = mtdblk;
300 mutex_unlock(&mtdblks_lock);
294 301
295 DEBUG(MTD_DEBUG_LEVEL1, "ok\n"); 302 DEBUG(MTD_DEBUG_LEVEL1, "ok\n");
296 303
@@ -304,6 +311,8 @@ static int mtdblock_release(struct mtd_blktrans_dev *mbd)
304 311
305 DEBUG(MTD_DEBUG_LEVEL1, "mtdblock_release\n"); 312 DEBUG(MTD_DEBUG_LEVEL1, "mtdblock_release\n");
306 313
314 mutex_lock(&mtdblks_lock);
315
307 mutex_lock(&mtdblk->cache_mutex); 316 mutex_lock(&mtdblk->cache_mutex);
308 write_cached_data(mtdblk); 317 write_cached_data(mtdblk);
309 mutex_unlock(&mtdblk->cache_mutex); 318 mutex_unlock(&mtdblk->cache_mutex);
@@ -316,6 +325,9 @@ static int mtdblock_release(struct mtd_blktrans_dev *mbd)
316 vfree(mtdblk->cache_data); 325 vfree(mtdblk->cache_data);
317 kfree(mtdblk); 326 kfree(mtdblk);
318 } 327 }
328
329 mutex_unlock(&mtdblks_lock);
330
319 DEBUG(MTD_DEBUG_LEVEL1, "ok\n"); 331 DEBUG(MTD_DEBUG_LEVEL1, "ok\n");
320 332
321 return 0; 333 return 0;
@@ -376,6 +388,8 @@ static struct mtd_blktrans_ops mtdblock_tr = {
376 388
377static int __init init_mtdblock(void) 389static int __init init_mtdblock(void)
378{ 390{
391 mutex_init(&mtdblks_lock);
392
379 return register_mtd_blktrans(&mtdblock_tr); 393 return register_mtd_blktrans(&mtdblock_tr);
380} 394}
381 395
diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c
index fac54a3fa3f1..00ebf7af7467 100644
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -65,8 +65,8 @@ static void mtd_release(struct device *dev)
65static int mtd_cls_suspend(struct device *dev, pm_message_t state) 65static int mtd_cls_suspend(struct device *dev, pm_message_t state)
66{ 66{
67 struct mtd_info *mtd = dev_to_mtd(dev); 67 struct mtd_info *mtd = dev_to_mtd(dev);
68 68
69 if (mtd->suspend) 69 if (mtd && mtd->suspend)
70 return mtd->suspend(mtd); 70 return mtd->suspend(mtd);
71 else 71 else
72 return 0; 72 return 0;
@@ -76,7 +76,7 @@ static int mtd_cls_resume(struct device *dev)
76{ 76{
77 struct mtd_info *mtd = dev_to_mtd(dev); 77 struct mtd_info *mtd = dev_to_mtd(dev);
78 78
79 if (mtd->resume) 79 if (mtd && mtd->resume)
80 mtd->resume(mtd); 80 mtd->resume(mtd);
81 return 0; 81 return 0;
82} 82}
@@ -298,6 +298,7 @@ int add_mtd_device(struct mtd_info *mtd)
298 mtd->dev.class = &mtd_class; 298 mtd->dev.class = &mtd_class;
299 mtd->dev.devt = MTD_DEVT(i); 299 mtd->dev.devt = MTD_DEVT(i);
300 dev_set_name(&mtd->dev, "mtd%d", i); 300 dev_set_name(&mtd->dev, "mtd%d", i);
301 dev_set_drvdata(&mtd->dev, mtd);
301 if (device_register(&mtd->dev) != 0) { 302 if (device_register(&mtd->dev) != 0) {
302 mtd_table[i] = NULL; 303 mtd_table[i] = NULL;
303 break; 304 break;
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c
index 38d656b9b2ee..0108ed42e877 100644
--- a/drivers/mtd/onenand/omap2.c
+++ b/drivers/mtd/onenand/omap2.c
@@ -266,7 +266,7 @@ static inline int omap2_onenand_bufferram_offset(struct mtd_info *mtd, int area)
266 266
267 if (ONENAND_CURRENT_BUFFERRAM(this)) { 267 if (ONENAND_CURRENT_BUFFERRAM(this)) {
268 if (area == ONENAND_DATARAM) 268 if (area == ONENAND_DATARAM)
269 return mtd->writesize; 269 return this->writesize;
270 if (area == ONENAND_SPARERAM) 270 if (area == ONENAND_SPARERAM)
271 return mtd->oobsize; 271 return mtd->oobsize;
272 } 272 }
@@ -770,6 +770,7 @@ static int __devexit omap2_onenand_remove(struct platform_device *pdev)
770 } 770 }
771 iounmap(c->onenand.base); 771 iounmap(c->onenand.base);
772 release_mem_region(c->phys_base, ONENAND_IO_SIZE); 772 release_mem_region(c->phys_base, ONENAND_IO_SIZE);
773 gpmc_cs_free(c->gpmc_cs);
773 kfree(c); 774 kfree(c);
774 775
775 return 0; 776 return 0;
diff --git a/drivers/mtd/ubi/eba.c b/drivers/mtd/ubi/eba.c
index 0f2034c3ed2f..e4d9ef0c965a 100644
--- a/drivers/mtd/ubi/eba.c
+++ b/drivers/mtd/ubi/eba.c
@@ -1254,6 +1254,7 @@ out_free:
1254 if (!ubi->volumes[i]) 1254 if (!ubi->volumes[i])
1255 continue; 1255 continue;
1256 kfree(ubi->volumes[i]->eba_tbl); 1256 kfree(ubi->volumes[i]->eba_tbl);
1257 ubi->volumes[i]->eba_tbl = NULL;
1257 } 1258 }
1258 return err; 1259 return err;
1259} 1260}
diff --git a/drivers/mtd/ubi/scan.c b/drivers/mtd/ubi/scan.c
index a423131b6171..b847745394b4 100644
--- a/drivers/mtd/ubi/scan.c
+++ b/drivers/mtd/ubi/scan.c
@@ -781,11 +781,22 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,
781 return -EINVAL; 781 return -EINVAL;
782 } 782 }
783 783
784 /*
785 * Make sure that all PEBs have the same image sequence number.
786 * This allows us to detect situations when users flash UBI
787 * images incorrectly, so that the flash has the new UBI image
788 * and leftovers from the old one. This feature was added
789 * relatively recently, and the sequence number was always
790 * zero, because old UBI implementations always set it to zero.
791 * For this reasons, we do not panic if some PEBs have zero
792 * sequence number, while other PEBs have non-zero sequence
793 * number.
794 */
784 image_seq = be32_to_cpu(ech->image_seq); 795 image_seq = be32_to_cpu(ech->image_seq);
785 if (!si->image_seq_set) { 796 if (!si->image_seq_set) {
786 ubi->image_seq = image_seq; 797 ubi->image_seq = image_seq;
787 si->image_seq_set = 1; 798 si->image_seq_set = 1;
788 } else if (ubi->image_seq != image_seq) { 799 } else if (ubi->image_seq && ubi->image_seq != image_seq) {
789 ubi_err("bad image sequence number %d in PEB %d, " 800 ubi_err("bad image sequence number %d in PEB %d, "
790 "expected %d", image_seq, pnum, ubi->image_seq); 801 "expected %d", image_seq, pnum, ubi->image_seq);
791 ubi_dbg_dump_ec_hdr(ech); 802 ubi_dbg_dump_ec_hdr(ech);
diff --git a/drivers/net/3c515.c b/drivers/net/3c515.c
index 3e00fa8ea65f..4a7c32895be5 100644
--- a/drivers/net/3c515.c
+++ b/drivers/net/3c515.c
@@ -832,7 +832,9 @@ static int corkscrew_open(struct net_device *dev)
832 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ 832 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
833 vp->rx_ring[i].addr = isa_virt_to_bus(skb->data); 833 vp->rx_ring[i].addr = isa_virt_to_bus(skb->data);
834 } 834 }
835 vp->rx_ring[i - 1].next = isa_virt_to_bus(&vp->rx_ring[0]); /* Wrap the ring. */ 835 if (i != 0)
836 vp->rx_ring[i - 1].next =
837 isa_virt_to_bus(&vp->rx_ring[0]); /* Wrap the ring. */
836 outl(isa_virt_to_bus(&vp->rx_ring[0]), ioaddr + UpListPtr); 838 outl(isa_virt_to_bus(&vp->rx_ring[0]), ioaddr + UpListPtr);
837 } 839 }
838 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */ 840 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c
index c34aee91250b..c20416850948 100644
--- a/drivers/net/3c59x.c
+++ b/drivers/net/3c59x.c
@@ -2721,13 +2721,15 @@ dump_tx_ring(struct net_device *dev)
2721 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]); 2721 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2722 issue_and_wait(dev, DownStall); 2722 issue_and_wait(dev, DownStall);
2723 for (i = 0; i < TX_RING_SIZE; i++) { 2723 for (i = 0; i < TX_RING_SIZE; i++) {
2724 pr_err(" %d: @%p length %8.8x status %8.8x\n", i, 2724 unsigned int length;
2725 &vp->tx_ring[i], 2725
2726#if DO_ZEROCOPY 2726#if DO_ZEROCOPY
2727 le32_to_cpu(vp->tx_ring[i].frag[0].length), 2727 length = le32_to_cpu(vp->tx_ring[i].frag[0].length);
2728#else 2728#else
2729 le32_to_cpu(vp->tx_ring[i].length), 2729 length = le32_to_cpu(vp->tx_ring[i].length);
2730#endif 2730#endif
2731 pr_err(" %d: @%p length %8.8x status %8.8x\n",
2732 i, &vp->tx_ring[i], length,
2731 le32_to_cpu(vp->tx_ring[i].status)); 2733 le32_to_cpu(vp->tx_ring[i].status));
2732 } 2734 }
2733 if (!stalled) 2735 if (!stalled)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index b5a7513df4eb..5f6509a5f640 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1732,6 +1732,7 @@ config KS8842
1732config KS8851 1732config KS8851
1733 tristate "Micrel KS8851 SPI" 1733 tristate "Micrel KS8851 SPI"
1734 depends on SPI 1734 depends on SPI
1735 select MII
1735 help 1736 help
1736 SPI driver for Micrel KS8851 SPI attached network chip. 1737 SPI driver for Micrel KS8851 SPI attached network chip.
1737 1738
diff --git a/drivers/net/arm/at91_ether.c b/drivers/net/arm/at91_ether.c
index 2e7419a61191..5041d10bae9d 100644
--- a/drivers/net/arm/at91_ether.c
+++ b/drivers/net/arm/at91_ether.c
@@ -1228,7 +1228,6 @@ static int at91ether_resume(struct platform_device *pdev)
1228#endif 1228#endif
1229 1229
1230static struct platform_driver at91ether_driver = { 1230static struct platform_driver at91ether_driver = {
1231 .probe = at91ether_probe,
1232 .remove = __devexit_p(at91ether_remove), 1231 .remove = __devexit_p(at91ether_remove),
1233 .suspend = at91ether_suspend, 1232 .suspend = at91ether_suspend,
1234 .resume = at91ether_resume, 1233 .resume = at91ether_resume,
@@ -1240,7 +1239,7 @@ static struct platform_driver at91ether_driver = {
1240 1239
1241static int __init at91ether_init(void) 1240static int __init at91ether_init(void)
1242{ 1241{
1243 return platform_driver_register(&at91ether_driver); 1242 return platform_driver_probe(&at91ether_driver, at91ether_probe);
1244} 1243}
1245 1244
1246static void __exit at91ether_exit(void) 1245static void __exit at91ether_exit(void)
diff --git a/drivers/net/at1700.c b/drivers/net/at1700.c
index 18b566ad4fd1..cf30e278f182 100644
--- a/drivers/net/at1700.c
+++ b/drivers/net/at1700.c
@@ -318,7 +318,7 @@ static int __init at1700_probe1(struct net_device *dev, int ioaddr)
318 pos3 = mca_read_stored_pos( slot, 3 ); 318 pos3 = mca_read_stored_pos( slot, 3 );
319 pos4 = mca_read_stored_pos( slot, 4 ); 319 pos4 = mca_read_stored_pos( slot, 4 );
320 320
321 for (l_i = 0; l_i < 0x09; l_i++) 321 for (l_i = 0; l_i < 8; l_i++)
322 if (( pos3 & 0x07) == at1700_ioaddr_pattern[l_i]) 322 if (( pos3 & 0x07) == at1700_ioaddr_pattern[l_i])
323 break; 323 break;
324 ioaddr = at1700_mca_probe_list[l_i]; 324 ioaddr = at1700_mca_probe_list[l_i];
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index c43f6a119295..dea3155688bb 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -667,7 +667,7 @@ static void skb_fill_rx_data(struct be_adapter *adapter,
667 struct be_queue_info *rxq = &adapter->rx_obj.q; 667 struct be_queue_info *rxq = &adapter->rx_obj.q;
668 struct be_rx_page_info *page_info; 668 struct be_rx_page_info *page_info;
669 u16 rxq_idx, i, num_rcvd, j; 669 u16 rxq_idx, i, num_rcvd, j;
670 u32 pktsize, hdr_len, curr_frag_len; 670 u32 pktsize, hdr_len, curr_frag_len, size;
671 u8 *start; 671 u8 *start;
672 672
673 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp); 673 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
@@ -708,12 +708,13 @@ static void skb_fill_rx_data(struct be_adapter *adapter,
708 } 708 }
709 709
710 /* More frags present for this completion */ 710 /* More frags present for this completion */
711 pktsize -= curr_frag_len; /* account for above copied frag */ 711 size = pktsize;
712 for (i = 1, j = 0; i < num_rcvd; i++) { 712 for (i = 1, j = 0; i < num_rcvd; i++) {
713 size -= curr_frag_len;
713 index_inc(&rxq_idx, rxq->len); 714 index_inc(&rxq_idx, rxq->len);
714 page_info = get_rx_page_info(adapter, rxq_idx); 715 page_info = get_rx_page_info(adapter, rxq_idx);
715 716
716 curr_frag_len = min(pktsize, rx_frag_size); 717 curr_frag_len = min(size, rx_frag_size);
717 718
718 /* Coalesce all frags from the same physical page in one slot */ 719 /* Coalesce all frags from the same physical page in one slot */
719 if (page_info->page_offset == 0) { 720 if (page_info->page_offset == 0) {
@@ -731,7 +732,6 @@ static void skb_fill_rx_data(struct be_adapter *adapter,
731 skb_shinfo(skb)->frags[j].size += curr_frag_len; 732 skb_shinfo(skb)->frags[j].size += curr_frag_len;
732 skb->len += curr_frag_len; 733 skb->len += curr_frag_len;
733 skb->data_len += curr_frag_len; 734 skb->data_len += curr_frag_len;
734 pktsize -= curr_frag_len;
735 735
736 memset(page_info, 0, sizeof(*page_info)); 736 memset(page_info, 0, sizeof(*page_info));
737 } 737 }
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c
index 4d1515f45ba2..4869d77cbe91 100644
--- a/drivers/net/cnic.c
+++ b/drivers/net/cnic.c
@@ -227,7 +227,7 @@ static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
227 } 227 }
228 228
229 rcu_read_lock(); 229 rcu_read_lock();
230 ulp_ops = rcu_dereference(cp->ulp_ops[CNIC_ULP_ISCSI]); 230 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
231 if (ulp_ops) 231 if (ulp_ops)
232 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len); 232 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
233 rcu_read_unlock(); 233 rcu_read_unlock();
@@ -319,6 +319,20 @@ static int cnic_abort_prep(struct cnic_sock *csk)
319 return 0; 319 return 0;
320} 320}
321 321
322static void cnic_uio_stop(void)
323{
324 struct cnic_dev *dev;
325
326 read_lock(&cnic_dev_lock);
327 list_for_each_entry(dev, &cnic_dev_list, list) {
328 struct cnic_local *cp = dev->cnic_priv;
329
330 if (cp->cnic_uinfo)
331 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
332 }
333 read_unlock(&cnic_dev_lock);
334}
335
322int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops) 336int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
323{ 337{
324 struct cnic_dev *dev; 338 struct cnic_dev *dev;
@@ -390,6 +404,9 @@ int cnic_unregister_driver(int ulp_type)
390 } 404 }
391 read_unlock(&cnic_dev_lock); 405 read_unlock(&cnic_dev_lock);
392 406
407 if (ulp_type == CNIC_ULP_ISCSI)
408 cnic_uio_stop();
409
393 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL); 410 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
394 411
395 mutex_unlock(&cnic_lock); 412 mutex_unlock(&cnic_lock);
@@ -632,7 +649,6 @@ static void cnic_free_resc(struct cnic_dev *dev)
632 int i = 0; 649 int i = 0;
633 650
634 if (cp->cnic_uinfo) { 651 if (cp->cnic_uinfo) {
635 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
636 while (cp->uio_dev != -1 && i < 15) { 652 while (cp->uio_dev != -1 && i < 15) {
637 msleep(100); 653 msleep(100);
638 i++; 654 i++;
@@ -1057,6 +1073,9 @@ static void cnic_ulp_stop(struct cnic_dev *dev)
1057 struct cnic_local *cp = dev->cnic_priv; 1073 struct cnic_local *cp = dev->cnic_priv;
1058 int if_type; 1074 int if_type;
1059 1075
1076 if (cp->cnic_uinfo)
1077 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
1078
1060 rcu_read_lock(); 1079 rcu_read_lock();
1061 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) { 1080 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
1062 struct cnic_ulp_ops *ulp_ops; 1081 struct cnic_ulp_ops *ulp_ops;
diff --git a/drivers/net/eepro.c b/drivers/net/eepro.c
index cc2ab6412c73..4f7003485348 100644
--- a/drivers/net/eepro.c
+++ b/drivers/net/eepro.c
@@ -1784,7 +1784,7 @@ int __init init_module(void)
1784 printk(KERN_INFO "eepro_init_module: Auto-detecting boards (May God protect us...)\n"); 1784 printk(KERN_INFO "eepro_init_module: Auto-detecting boards (May God protect us...)\n");
1785 } 1785 }
1786 1786
1787 for (i = 0; io[i] != -1 && i < MAX_EEPRO; i++) { 1787 for (i = 0; i < MAX_EEPRO && io[i] != -1; i++) {
1788 dev = alloc_etherdev(sizeof(struct eepro_local)); 1788 dev = alloc_etherdev(sizeof(struct eepro_local));
1789 if (!dev) 1789 if (!dev)
1790 break; 1790 break;
diff --git a/drivers/net/eexpress.c b/drivers/net/eexpress.c
index 1686dca28748..1f016d66684a 100644
--- a/drivers/net/eexpress.c
+++ b/drivers/net/eexpress.c
@@ -1474,13 +1474,13 @@ static void eexp_hw_init586(struct net_device *dev)
1474 outw(0x0000, ioaddr + 0x800c); 1474 outw(0x0000, ioaddr + 0x800c);
1475 outw(0x0000, ioaddr + 0x800e); 1475 outw(0x0000, ioaddr + 0x800e);
1476 1476
1477 for (i = 0; i < (sizeof(start_code)); i+=32) { 1477 for (i = 0; i < ARRAY_SIZE(start_code) * 2; i+=32) {
1478 int j; 1478 int j;
1479 outw(i, ioaddr + SM_PTR); 1479 outw(i, ioaddr + SM_PTR);
1480 for (j = 0; j < 16; j+=2) 1480 for (j = 0; j < 16 && (i+j)/2 < ARRAY_SIZE(start_code); j+=2)
1481 outw(start_code[(i+j)/2], 1481 outw(start_code[(i+j)/2],
1482 ioaddr+0x4000+j); 1482 ioaddr+0x4000+j);
1483 for (j = 0; j < 16; j+=2) 1483 for (j = 0; j < 16 && (i+j+16)/2 < ARRAY_SIZE(start_code); j+=2)
1484 outw(start_code[(i+j+16)/2], 1484 outw(start_code[(i+j+16)/2],
1485 ioaddr+0x8000+j); 1485 ioaddr+0x8000+j);
1486 } 1486 }
diff --git a/drivers/net/ehea/ehea.h b/drivers/net/ehea/ehea.h
index 78952f8324e2..fa311a950996 100644
--- a/drivers/net/ehea/ehea.h
+++ b/drivers/net/ehea/ehea.h
@@ -40,7 +40,7 @@
40#include <asm/io.h> 40#include <asm/io.h>
41 41
42#define DRV_NAME "ehea" 42#define DRV_NAME "ehea"
43#define DRV_VERSION "EHEA_0101" 43#define DRV_VERSION "EHEA_0102"
44 44
45/* eHEA capability flags */ 45/* eHEA capability flags */
46#define DLPAR_PORT_ADD_REM 1 46#define DLPAR_PORT_ADD_REM 1
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c
index e8d46cc1bec2..977c3d358279 100644
--- a/drivers/net/ehea/ehea_main.c
+++ b/drivers/net/ehea/ehea_main.c
@@ -1545,6 +1545,9 @@ static int ehea_clean_portres(struct ehea_port *port, struct ehea_port_res *pr)
1545{ 1545{
1546 int ret, i; 1546 int ret, i;
1547 1547
1548 if (pr->qp)
1549 netif_napi_del(&pr->napi);
1550
1548 ret = ehea_destroy_qp(pr->qp); 1551 ret = ehea_destroy_qp(pr->qp);
1549 1552
1550 if (!ret) { 1553 if (!ret) {
diff --git a/drivers/net/fealnx.c b/drivers/net/fealnx.c
index 48385c42ab57..160655d24581 100644
--- a/drivers/net/fealnx.c
+++ b/drivers/net/fealnx.c
@@ -584,7 +584,8 @@ static int __devinit fealnx_init_one(struct pci_dev *pdev,
584 if (np->flags == HAS_MII_XCVR) { 584 if (np->flags == HAS_MII_XCVR) {
585 int phy, phy_idx = 0; 585 int phy, phy_idx = 0;
586 586
587 for (phy = 1; phy < 32 && phy_idx < 4; phy++) { 587 for (phy = 1; phy < 32 && phy_idx < ARRAY_SIZE(np->phys);
588 phy++) {
588 int mii_status = mdio_read(dev, phy, 1); 589 int mii_status = mdio_read(dev, phy, 1);
589 590
590 if (mii_status != 0xffff && mii_status != 0x0000) { 591 if (mii_status != 0xffff && mii_status != 0x0000) {
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index b892c3ad9a74..2bc2d2b20644 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -754,17 +754,16 @@ static int fs_init_phy(struct net_device *dev)
754 fep->oldlink = 0; 754 fep->oldlink = 0;
755 fep->oldspeed = 0; 755 fep->oldspeed = 0;
756 fep->oldduplex = -1; 756 fep->oldduplex = -1;
757 if(fep->fpi->phy_node) 757
758 phydev = of_phy_connect(dev, fep->fpi->phy_node, 758 phydev = of_phy_connect(dev, fep->fpi->phy_node, &fs_adjust_link, 0,
759 &fs_adjust_link, 0, 759 PHY_INTERFACE_MODE_MII);
760 PHY_INTERFACE_MODE_MII); 760 if (!phydev) {
761 else { 761 phydev = of_phy_connect_fixed_link(dev, &fs_adjust_link,
762 printk("No phy bus ID specified in BSP code\n"); 762 PHY_INTERFACE_MODE_MII);
763 return -EINVAL;
764 } 763 }
765 if (IS_ERR(phydev)) { 764 if (!phydev) {
766 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); 765 dev_err(&dev->dev, "Could not attach to PHY\n");
767 return PTR_ERR(phydev); 766 return -ENODEV;
768 } 767 }
769 768
770 fep->phydev = phydev; 769 fep->phydev = phydev;
@@ -1005,6 +1004,7 @@ static int __devinit fs_enet_probe(struct of_device *ofdev,
1005 goto out_free_fpi; 1004 goto out_free_fpi;
1006 } 1005 }
1007 1006
1007 SET_NETDEV_DEV(ndev, &ofdev->dev);
1008 dev_set_drvdata(&ofdev->dev, ndev); 1008 dev_set_drvdata(&ofdev->dev, ndev);
1009 1009
1010 fep = netdev_priv(ndev); 1010 fep = netdev_priv(ndev);
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 43d813ed9f45..f8ffcbf0bc39 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -264,15 +264,6 @@ static int gfar_of_init(struct net_device *dev)
264 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET; 264 priv->device_flags |= FSL_GIANFAR_DEV_HAS_MAGIC_PACKET;
265 265
266 priv->phy_node = of_parse_phandle(np, "phy-handle", 0); 266 priv->phy_node = of_parse_phandle(np, "phy-handle", 0);
267 if (!priv->phy_node) {
268 u32 *fixed_link;
269
270 fixed_link = (u32 *)of_get_property(np, "fixed-link", NULL);
271 if (!fixed_link) {
272 err = -ENODEV;
273 goto err_out;
274 }
275 }
276 267
277 /* Find the TBI PHY. If it's not there, we don't support SGMII */ 268 /* Find the TBI PHY. If it's not there, we don't support SGMII */
278 priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0); 269 priv->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
@@ -659,13 +650,14 @@ static int init_phy(struct net_device *dev)
659 650
660 interface = gfar_get_interface(dev); 651 interface = gfar_get_interface(dev);
661 652
662 if (priv->phy_node) { 653 priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 0,
663 priv->phydev = of_phy_connect(dev, priv->phy_node, &adjust_link, 654 interface);
664 0, interface); 655 if (!priv->phydev)
665 if (!priv->phydev) { 656 priv->phydev = of_phy_connect_fixed_link(dev, &adjust_link,
666 dev_err(&dev->dev, "error: Could not attach to PHY\n"); 657 interface);
667 return -ENODEV; 658 if (!priv->phydev) {
668 } 659 dev_err(&dev->dev, "could not attach to PHY\n");
660 return -ENODEV;
669 } 661 }
670 662
671 if (interface == PHY_INTERFACE_MODE_SGMII) 663 if (interface == PHY_INTERFACE_MODE_SGMII)
diff --git a/drivers/net/gianfar_ethtool.c b/drivers/net/gianfar_ethtool.c
index dbf06e9313cc..2234118eedbb 100644
--- a/drivers/net/gianfar_ethtool.c
+++ b/drivers/net/gianfar_ethtool.c
@@ -366,9 +366,8 @@ static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals
366 return -EINVAL; 366 return -EINVAL;
367 } 367 }
368 368
369 priv->rxic = mk_ic_value( 369 priv->rxic = mk_ic_value(cvals->rx_max_coalesced_frames,
370 gfar_usecs2ticks(priv, cvals->rx_coalesce_usecs), 370 gfar_usecs2ticks(priv, cvals->rx_coalesce_usecs));
371 cvals->rx_max_coalesced_frames);
372 371
373 /* Set up tx coalescing */ 372 /* Set up tx coalescing */
374 if ((cvals->tx_coalesce_usecs == 0) || 373 if ((cvals->tx_coalesce_usecs == 0) ||
@@ -390,9 +389,8 @@ static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals
390 return -EINVAL; 389 return -EINVAL;
391 } 390 }
392 391
393 priv->txic = mk_ic_value( 392 priv->txic = mk_ic_value(cvals->tx_max_coalesced_frames,
394 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs), 393 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs));
395 cvals->tx_max_coalesced_frames);
396 394
397 gfar_write(&priv->regs->rxic, 0); 395 gfar_write(&priv->regs->rxic, 0);
398 if (priv->rxcoalescing) 396 if (priv->rxcoalescing)
diff --git a/drivers/net/igbvf/vf.c b/drivers/net/igbvf/vf.c
index 2a4faf9ade69..a9a61efa964c 100644
--- a/drivers/net/igbvf/vf.c
+++ b/drivers/net/igbvf/vf.c
@@ -274,6 +274,8 @@ static s32 e1000_set_vfta_vf(struct e1000_hw *hw, u16 vid, bool set)
274 274
275 err = mbx->ops.read_posted(hw, msgbuf, 2); 275 err = mbx->ops.read_posted(hw, msgbuf, 2);
276 276
277 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
278
277 /* if nacked the vlan was rejected */ 279 /* if nacked the vlan was rejected */
278 if (!err && (msgbuf[0] == (E1000_VF_SET_VLAN | E1000_VT_MSGTYPE_NACK))) 280 if (!err && (msgbuf[0] == (E1000_VF_SET_VLAN | E1000_VT_MSGTYPE_NACK)))
279 err = -E1000_ERR_MAC_INIT; 281 err = -E1000_ERR_MAC_INIT;
@@ -317,6 +319,8 @@ static void e1000_rar_set_vf(struct e1000_hw *hw, u8 * addr, u32 index)
317 if (!ret_val) 319 if (!ret_val)
318 ret_val = mbx->ops.read_posted(hw, msgbuf, 3); 320 ret_val = mbx->ops.read_posted(hw, msgbuf, 3);
319 321
322 msgbuf[0] &= ~E1000_VT_MSGTYPE_CTS;
323
320 /* if nacked the address was rejected, use "perm_addr" */ 324 /* if nacked the address was rejected, use "perm_addr" */
321 if (!ret_val && 325 if (!ret_val &&
322 (msgbuf[0] == (E1000_VF_SET_MAC_ADDR | E1000_VT_MSGTYPE_NACK))) 326 (msgbuf[0] == (E1000_VF_SET_MAC_ADDR | E1000_VT_MSGTYPE_NACK)))
diff --git a/drivers/net/ixgbe/ixgbe.h b/drivers/net/ixgbe/ixgbe.h
index cd22323cfd22..e11d83d5852b 100644
--- a/drivers/net/ixgbe/ixgbe.h
+++ b/drivers/net/ixgbe/ixgbe.h
@@ -96,6 +96,8 @@
96#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000 96#define IXGBE_TX_FLAGS_VLAN_PRIO_MASK 0x0000e000
97#define IXGBE_TX_FLAGS_VLAN_SHIFT 16 97#define IXGBE_TX_FLAGS_VLAN_SHIFT 16
98 98
99#define IXGBE_MAX_RSC_INT_RATE 162760
100
99/* wrapper around a pointer to a socket buffer, 101/* wrapper around a pointer to a socket buffer,
100 * so a DMA handle can be stored along with the buffer */ 102 * so a DMA handle can be stored along with the buffer */
101struct ixgbe_tx_buffer { 103struct ixgbe_tx_buffer {
@@ -327,6 +329,7 @@ struct ixgbe_adapter {
327#define IXGBE_FLAG_IN_SFP_MOD_TASK (u32)(1 << 25) 329#define IXGBE_FLAG_IN_SFP_MOD_TASK (u32)(1 << 25)
328#define IXGBE_FLAG_FDIR_HASH_CAPABLE (u32)(1 << 26) 330#define IXGBE_FLAG_FDIR_HASH_CAPABLE (u32)(1 << 26)
329#define IXGBE_FLAG_FDIR_PERFECT_CAPABLE (u32)(1 << 27) 331#define IXGBE_FLAG_FDIR_PERFECT_CAPABLE (u32)(1 << 27)
332#define IXGBE_FLAG_FCOE_CAPABLE (u32)(1 << 28)
330#define IXGBE_FLAG_FCOE_ENABLED (u32)(1 << 29) 333#define IXGBE_FLAG_FCOE_ENABLED (u32)(1 << 29)
331 334
332 u32 flags2; 335 u32 flags2;
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c
index b9923047ce11..522c03bc1dad 100644
--- a/drivers/net/ixgbe/ixgbe_82598.c
+++ b/drivers/net/ixgbe/ixgbe_82598.c
@@ -50,6 +50,51 @@ static s32 ixgbe_read_i2c_eeprom_82598(struct ixgbe_hw *hw, u8 byte_offset,
50 u8 *eeprom_data); 50 u8 *eeprom_data);
51 51
52/** 52/**
53 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
54 * @hw: pointer to the HW structure
55 *
56 * The defaults for 82598 should be in the range of 50us to 50ms,
57 * however the hardware default for these parts is 500us to 1ms which is less
58 * than the 10ms recommended by the pci-e spec. To address this we need to
59 * increase the value to either 10ms to 250ms for capability version 1 config,
60 * or 16ms to 55ms for version 2.
61 **/
62void ixgbe_set_pcie_completion_timeout(struct ixgbe_hw *hw)
63{
64 struct ixgbe_adapter *adapter = hw->back;
65 u32 gcr = IXGBE_READ_REG(hw, IXGBE_GCR);
66 u16 pcie_devctl2;
67
68 /* only take action if timeout value is defaulted to 0 */
69 if (gcr & IXGBE_GCR_CMPL_TMOUT_MASK)
70 goto out;
71
72 /*
73 * if capababilities version is type 1 we can write the
74 * timeout of 10ms to 250ms through the GCR register
75 */
76 if (!(gcr & IXGBE_GCR_CAP_VER2)) {
77 gcr |= IXGBE_GCR_CMPL_TMOUT_10ms;
78 goto out;
79 }
80
81 /*
82 * for version 2 capabilities we need to write the config space
83 * directly in order to set the completion timeout value for
84 * 16ms to 55ms
85 */
86 pci_read_config_word(adapter->pdev,
87 IXGBE_PCI_DEVICE_CONTROL2, &pcie_devctl2);
88 pcie_devctl2 |= IXGBE_PCI_DEVICE_CONTROL2_16ms;
89 pci_write_config_word(adapter->pdev,
90 IXGBE_PCI_DEVICE_CONTROL2, pcie_devctl2);
91out:
92 /* disable completion timeout resend */
93 gcr &= ~IXGBE_GCR_CMPL_TMOUT_RESEND;
94 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr);
95}
96
97/**
53 * ixgbe_get_pcie_msix_count_82598 - Gets MSI-X vector count 98 * ixgbe_get_pcie_msix_count_82598 - Gets MSI-X vector count
54 * @hw: pointer to hardware structure 99 * @hw: pointer to hardware structure
55 * 100 *
@@ -153,6 +198,26 @@ out:
153} 198}
154 199
155/** 200/**
201 * ixgbe_start_hw_82598 - Prepare hardware for Tx/Rx
202 * @hw: pointer to hardware structure
203 *
204 * Starts the hardware using the generic start_hw function.
205 * Then set pcie completion timeout
206 **/
207s32 ixgbe_start_hw_82598(struct ixgbe_hw *hw)
208{
209 s32 ret_val = 0;
210
211 ret_val = ixgbe_start_hw_generic(hw);
212
213 /* set the completion timeout for interface */
214 if (ret_val == 0)
215 ixgbe_set_pcie_completion_timeout(hw);
216
217 return ret_val;
218}
219
220/**
156 * ixgbe_get_link_capabilities_82598 - Determines link capabilities 221 * ixgbe_get_link_capabilities_82598 - Determines link capabilities
157 * @hw: pointer to hardware structure 222 * @hw: pointer to hardware structure
158 * @speed: pointer to link speed 223 * @speed: pointer to link speed
@@ -1085,7 +1150,7 @@ out:
1085static struct ixgbe_mac_operations mac_ops_82598 = { 1150static struct ixgbe_mac_operations mac_ops_82598 = {
1086 .init_hw = &ixgbe_init_hw_generic, 1151 .init_hw = &ixgbe_init_hw_generic,
1087 .reset_hw = &ixgbe_reset_hw_82598, 1152 .reset_hw = &ixgbe_reset_hw_82598,
1088 .start_hw = &ixgbe_start_hw_generic, 1153 .start_hw = &ixgbe_start_hw_82598,
1089 .clear_hw_cntrs = &ixgbe_clear_hw_cntrs_generic, 1154 .clear_hw_cntrs = &ixgbe_clear_hw_cntrs_generic,
1090 .get_media_type = &ixgbe_get_media_type_82598, 1155 .get_media_type = &ixgbe_get_media_type_82598,
1091 .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82598, 1156 .get_supported_physical_layer = &ixgbe_get_supported_physical_layer_82598,
diff --git a/drivers/net/ixgbe/ixgbe_dcb_nl.c b/drivers/net/ixgbe/ixgbe_dcb_nl.c
index da2c8514b8d0..1c7265732900 100644
--- a/drivers/net/ixgbe/ixgbe_dcb_nl.c
+++ b/drivers/net/ixgbe/ixgbe_dcb_nl.c
@@ -139,6 +139,18 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
139 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE; 139 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
140 } 140 }
141 adapter->flags |= IXGBE_FLAG_DCB_ENABLED; 141 adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
142#ifdef IXGBE_FCOE
143 /* Turn on FCoE offload */
144 if ((adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) &&
145 (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))) {
146 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
147 adapter->ring_feature[RING_F_FCOE].indices =
148 IXGBE_FCRETA_SIZE;
149 netdev->features |= NETIF_F_FCOE_CRC;
150 netdev->features |= NETIF_F_FSO;
151 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
152 }
153#endif /* IXGBE_FCOE */
142 ixgbe_init_interrupt_scheme(adapter); 154 ixgbe_init_interrupt_scheme(adapter);
143 if (netif_running(netdev)) 155 if (netif_running(netdev))
144 netdev->netdev_ops->ndo_open(netdev); 156 netdev->netdev_ops->ndo_open(netdev);
@@ -156,6 +168,18 @@ static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
156 adapter->flags |= IXGBE_FLAG_RSS_ENABLED; 168 adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
157 if (adapter->hw.mac.type == ixgbe_mac_82599EB) 169 if (adapter->hw.mac.type == ixgbe_mac_82599EB)
158 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; 170 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
171
172#ifdef IXGBE_FCOE
173 /* Turn off FCoE offload */
174 if (adapter->flags & (IXGBE_FLAG_FCOE_CAPABLE |
175 IXGBE_FLAG_FCOE_ENABLED)) {
176 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
177 adapter->ring_feature[RING_F_FCOE].indices = 0;
178 netdev->features &= ~NETIF_F_FCOE_CRC;
179 netdev->features &= ~NETIF_F_FSO;
180 netdev->fcoe_ddp_xid = 0;
181 }
182#endif /* IXGBE_FCOE */
159 ixgbe_init_interrupt_scheme(adapter); 183 ixgbe_init_interrupt_scheme(adapter);
160 if (netif_running(netdev)) 184 if (netif_running(netdev))
161 netdev->netdev_ops->ndo_open(netdev); 185 netdev->netdev_ops->ndo_open(netdev);
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index 2a978008fd6e..79144e950a34 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -1975,7 +1975,10 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
1975 * any other value means disable eitr, which is best 1975 * any other value means disable eitr, which is best
1976 * served by setting the interrupt rate very high 1976 * served by setting the interrupt rate very high
1977 */ 1977 */
1978 adapter->eitr_param = IXGBE_MAX_INT_RATE; 1978 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
1979 adapter->eitr_param = IXGBE_MAX_RSC_INT_RATE;
1980 else
1981 adapter->eitr_param = IXGBE_MAX_INT_RATE;
1979 adapter->itr_setting = 0; 1982 adapter->itr_setting = 0;
1980 } 1983 }
1981 1984
@@ -1999,13 +2002,13 @@ static int ixgbe_set_flags(struct net_device *netdev, u32 data)
1999 2002
2000 ethtool_op_set_flags(netdev, data); 2003 ethtool_op_set_flags(netdev, data);
2001 2004
2002 if (!(adapter->flags & IXGBE_FLAG2_RSC_CAPABLE)) 2005 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE))
2003 return 0; 2006 return 0;
2004 2007
2005 /* if state changes we need to update adapter->flags and reset */ 2008 /* if state changes we need to update adapter->flags and reset */
2006 if ((!!(data & ETH_FLAG_LRO)) != 2009 if ((!!(data & ETH_FLAG_LRO)) !=
2007 (!!(adapter->flags & IXGBE_FLAG2_RSC_ENABLED))) { 2010 (!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
2008 adapter->flags ^= IXGBE_FLAG2_RSC_ENABLED; 2011 adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
2009 if (netif_running(netdev)) 2012 if (netif_running(netdev))
2010 ixgbe_reinit_locked(adapter); 2013 ixgbe_reinit_locked(adapter);
2011 else 2014 else
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index e3442f47f932..110c65ab5cb5 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -34,6 +34,7 @@
34#include <linux/in.h> 34#include <linux/in.h>
35#include <linux/ip.h> 35#include <linux/ip.h>
36#include <linux/tcp.h> 36#include <linux/tcp.h>
37#include <linux/pkt_sched.h>
37#include <linux/ipv6.h> 38#include <linux/ipv6.h>
38#include <net/checksum.h> 39#include <net/checksum.h>
39#include <net/ip6_checksum.h> 40#include <net/ip6_checksum.h>
@@ -510,8 +511,11 @@ static void ixgbe_receive_skb(struct ixgbe_q_vector *q_vector,
510 * @skb: skb currently being received and modified 511 * @skb: skb currently being received and modified
511 **/ 512 **/
512static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter, 513static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
513 u32 status_err, struct sk_buff *skb) 514 union ixgbe_adv_rx_desc *rx_desc,
515 struct sk_buff *skb)
514{ 516{
517 u32 status_err = le32_to_cpu(rx_desc->wb.upper.status_error);
518
515 skb->ip_summed = CHECKSUM_NONE; 519 skb->ip_summed = CHECKSUM_NONE;
516 520
517 /* Rx csum disabled */ 521 /* Rx csum disabled */
@@ -529,6 +533,16 @@ static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
529 return; 533 return;
530 534
531 if (status_err & IXGBE_RXDADV_ERR_TCPE) { 535 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
536 u16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
537
538 /*
539 * 82599 errata, UDP frames with a 0 checksum can be marked as
540 * checksum errors.
541 */
542 if ((pkt_info & IXGBE_RXDADV_PKTTYPE_UDP) &&
543 (adapter->hw.mac.type == ixgbe_mac_82599EB))
544 return;
545
532 adapter->hw_csum_rx_error++; 546 adapter->hw_csum_rx_error++;
533 return; 547 return;
534 } 548 }
@@ -766,7 +780,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
766 prefetch(next_rxd); 780 prefetch(next_rxd);
767 cleaned_count++; 781 cleaned_count++;
768 782
769 if (adapter->flags & IXGBE_FLAG2_RSC_CAPABLE) 783 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
770 rsc_count = ixgbe_get_rsc_count(rx_desc); 784 rsc_count = ixgbe_get_rsc_count(rx_desc);
771 785
772 if (rsc_count) { 786 if (rsc_count) {
@@ -802,7 +816,7 @@ static bool ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
802 goto next_desc; 816 goto next_desc;
803 } 817 }
804 818
805 ixgbe_rx_checksum(adapter, staterr, skb); 819 ixgbe_rx_checksum(adapter, rx_desc, skb);
806 820
807 /* probably a little skewed due to removing CRC */ 821 /* probably a little skewed due to removing CRC */
808 total_rx_bytes += skb->len; 822 total_rx_bytes += skb->len;
@@ -2022,7 +2036,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2022 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype); 2036 IXGBE_WRITE_REG(hw, IXGBE_PSRTYPE(0), psrtype);
2023 } 2037 }
2024 } else { 2038 } else {
2025 if (!(adapter->flags & IXGBE_FLAG2_RSC_ENABLED) && 2039 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) &&
2026 (netdev->mtu <= ETH_DATA_LEN)) 2040 (netdev->mtu <= ETH_DATA_LEN))
2027 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE; 2041 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
2028 else 2042 else
@@ -2151,7 +2165,7 @@ static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
2151 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl); 2165 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, rdrxctl);
2152 } 2166 }
2153 2167
2154 if (adapter->flags & IXGBE_FLAG2_RSC_ENABLED) { 2168 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2155 /* Enable 82599 HW-RSC */ 2169 /* Enable 82599 HW-RSC */
2156 for (i = 0; i < adapter->num_rx_queues; i++) { 2170 for (i = 0; i < adapter->num_rx_queues; i++) {
2157 j = adapter->rx_ring[i].reg_idx; 2171 j = adapter->rx_ring[i].reg_idx;
@@ -3798,16 +3812,17 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
3798 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598; 3812 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82598;
3799 } else if (hw->mac.type == ixgbe_mac_82599EB) { 3813 } else if (hw->mac.type == ixgbe_mac_82599EB) {
3800 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599; 3814 adapter->max_msix_q_vectors = MAX_MSIX_Q_VECTORS_82599;
3801 adapter->flags |= IXGBE_FLAG2_RSC_CAPABLE; 3815 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
3802 adapter->flags |= IXGBE_FLAG2_RSC_ENABLED; 3816 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
3803 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE; 3817 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
3804 adapter->ring_feature[RING_F_FDIR].indices = 3818 adapter->ring_feature[RING_F_FDIR].indices =
3805 IXGBE_MAX_FDIR_INDICES; 3819 IXGBE_MAX_FDIR_INDICES;
3806 adapter->atr_sample_rate = 20; 3820 adapter->atr_sample_rate = 20;
3807 adapter->fdir_pballoc = 0; 3821 adapter->fdir_pballoc = 0;
3808#ifdef IXGBE_FCOE 3822#ifdef IXGBE_FCOE
3809 adapter->flags |= IXGBE_FLAG_FCOE_ENABLED; 3823 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
3810 adapter->ring_feature[RING_F_FCOE].indices = IXGBE_FCRETA_SIZE; 3824 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
3825 adapter->ring_feature[RING_F_FCOE].indices = 0;
3811#endif /* IXGBE_FCOE */ 3826#endif /* IXGBE_FCOE */
3812 } 3827 }
3813 3828
@@ -5125,9 +5140,6 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
5125 int count = 0; 5140 int count = 0;
5126 unsigned int f; 5141 unsigned int f;
5127 5142
5128 r_idx = skb->queue_mapping;
5129 tx_ring = &adapter->tx_ring[r_idx];
5130
5131 if (adapter->vlgrp && vlan_tx_tag_present(skb)) { 5143 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
5132 tx_flags |= vlan_tx_tag_get(skb); 5144 tx_flags |= vlan_tx_tag_get(skb);
5133 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 5145 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
@@ -5137,11 +5149,19 @@ static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
5137 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 5149 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
5138 tx_flags |= IXGBE_TX_FLAGS_VLAN; 5150 tx_flags |= IXGBE_TX_FLAGS_VLAN;
5139 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 5151 } else if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
5140 tx_flags |= (skb->queue_mapping << 13); 5152 if (skb->priority != TC_PRIO_CONTROL) {
5141 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT; 5153 tx_flags |= (skb->queue_mapping << 13);
5142 tx_flags |= IXGBE_TX_FLAGS_VLAN; 5154 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
5155 tx_flags |= IXGBE_TX_FLAGS_VLAN;
5156 } else {
5157 skb->queue_mapping =
5158 adapter->ring_feature[RING_F_DCB].indices-1;
5159 }
5143 } 5160 }
5144 5161
5162 r_idx = skb->queue_mapping;
5163 tx_ring = &adapter->tx_ring[r_idx];
5164
5145 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) && 5165 if ((adapter->flags & IXGBE_FLAG_FCOE_ENABLED) &&
5146 (skb->protocol == htons(ETH_P_FCOE))) 5166 (skb->protocol == htons(ETH_P_FCOE)))
5147 tx_flags |= IXGBE_TX_FLAGS_FCOE; 5167 tx_flags |= IXGBE_TX_FLAGS_FCOE;
@@ -5340,12 +5360,19 @@ static int ixgbe_del_sanmac_netdev(struct net_device *dev)
5340static void ixgbe_netpoll(struct net_device *netdev) 5360static void ixgbe_netpoll(struct net_device *netdev)
5341{ 5361{
5342 struct ixgbe_adapter *adapter = netdev_priv(netdev); 5362 struct ixgbe_adapter *adapter = netdev_priv(netdev);
5363 int i;
5343 5364
5344 disable_irq(adapter->pdev->irq);
5345 adapter->flags |= IXGBE_FLAG_IN_NETPOLL; 5365 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
5346 ixgbe_intr(adapter->pdev->irq, netdev); 5366 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
5367 int num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5368 for (i = 0; i < num_q_vectors; i++) {
5369 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
5370 ixgbe_msix_clean_many(0, q_vector);
5371 }
5372 } else {
5373 ixgbe_intr(adapter->pdev->irq, netdev);
5374 }
5347 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL; 5375 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
5348 enable_irq(adapter->pdev->irq);
5349} 5376}
5350#endif 5377#endif
5351 5378
@@ -5580,23 +5607,18 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
5580#endif 5607#endif
5581 5608
5582#ifdef IXGBE_FCOE 5609#ifdef IXGBE_FCOE
5583 if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) { 5610 if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
5584 if (hw->mac.ops.get_device_caps) { 5611 if (hw->mac.ops.get_device_caps) {
5585 hw->mac.ops.get_device_caps(hw, &device_caps); 5612 hw->mac.ops.get_device_caps(hw, &device_caps);
5586 if (!(device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)) { 5613 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS)
5587 netdev->features |= NETIF_F_FCOE_CRC; 5614 adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
5588 netdev->features |= NETIF_F_FSO;
5589 netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
5590 } else {
5591 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
5592 }
5593 } 5615 }
5594 } 5616 }
5595#endif /* IXGBE_FCOE */ 5617#endif /* IXGBE_FCOE */
5596 if (pci_using_dac) 5618 if (pci_using_dac)
5597 netdev->features |= NETIF_F_HIGHDMA; 5619 netdev->features |= NETIF_F_HIGHDMA;
5598 5620
5599 if (adapter->flags & IXGBE_FLAG2_RSC_ENABLED) 5621 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
5600 netdev->features |= NETIF_F_LRO; 5622 netdev->features |= NETIF_F_LRO;
5601 5623
5602 /* make sure the EEPROM is good */ 5624 /* make sure the EEPROM is good */
@@ -5638,7 +5660,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev,
5638 adapter->wol = 0; 5660 adapter->wol = 0;
5639 break; 5661 break;
5640 } 5662 }
5641 device_init_wakeup(&adapter->pdev->dev, true);
5642 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol); 5663 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
5643 5664
5644 /* pick up the PCI bus settings for reporting later */ 5665 /* pick up the PCI bus settings for reporting later */
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h
index fa87309dc087..be90eb4575f6 100644
--- a/drivers/net/ixgbe/ixgbe_type.h
+++ b/drivers/net/ixgbe/ixgbe_type.h
@@ -718,6 +718,12 @@
718#define IXGBE_ECC_STATUS_82599 0x110E0 718#define IXGBE_ECC_STATUS_82599 0x110E0
719#define IXGBE_BAR_CTRL_82599 0x110F4 719#define IXGBE_BAR_CTRL_82599 0x110F4
720 720
721/* PCI Express Control */
722#define IXGBE_GCR_CMPL_TMOUT_MASK 0x0000F000
723#define IXGBE_GCR_CMPL_TMOUT_10ms 0x00001000
724#define IXGBE_GCR_CMPL_TMOUT_RESEND 0x00010000
725#define IXGBE_GCR_CAP_VER2 0x00040000
726
721/* Time Sync Registers */ 727/* Time Sync Registers */
722#define IXGBE_TSYNCRXCTL 0x05188 /* Rx Time Sync Control register - RW */ 728#define IXGBE_TSYNCRXCTL 0x05188 /* Rx Time Sync Control register - RW */
723#define IXGBE_TSYNCTXCTL 0x08C00 /* Tx Time Sync Control register - RW */ 729#define IXGBE_TSYNCTXCTL 0x08C00 /* Tx Time Sync Control register - RW */
@@ -1521,6 +1527,7 @@
1521 1527
1522/* PCI Bus Info */ 1528/* PCI Bus Info */
1523#define IXGBE_PCI_LINK_STATUS 0xB2 1529#define IXGBE_PCI_LINK_STATUS 0xB2
1530#define IXGBE_PCI_DEVICE_CONTROL2 0xC8
1524#define IXGBE_PCI_LINK_WIDTH 0x3F0 1531#define IXGBE_PCI_LINK_WIDTH 0x3F0
1525#define IXGBE_PCI_LINK_WIDTH_1 0x10 1532#define IXGBE_PCI_LINK_WIDTH_1 0x10
1526#define IXGBE_PCI_LINK_WIDTH_2 0x20 1533#define IXGBE_PCI_LINK_WIDTH_2 0x20
@@ -1531,6 +1538,7 @@
1531#define IXGBE_PCI_LINK_SPEED_5000 0x2 1538#define IXGBE_PCI_LINK_SPEED_5000 0x2
1532#define IXGBE_PCI_HEADER_TYPE_REGISTER 0x0E 1539#define IXGBE_PCI_HEADER_TYPE_REGISTER 0x0E
1533#define IXGBE_PCI_HEADER_TYPE_MULTIFUNC 0x80 1540#define IXGBE_PCI_HEADER_TYPE_MULTIFUNC 0x80
1541#define IXGBE_PCI_DEVICE_CONTROL2_16ms 0x0005
1534 1542
1535/* Number of 100 microseconds we wait for PCI Express master disable */ 1543/* Number of 100 microseconds we wait for PCI Express master disable */
1536#define IXGBE_PCI_MASTER_DISABLE_TIMEOUT 800 1544#define IXGBE_PCI_MASTER_DISABLE_TIMEOUT 800
diff --git a/drivers/net/mlx4/en_tx.c b/drivers/net/mlx4/en_tx.c
index 08c43f2ae72b..5a88b3f57693 100644
--- a/drivers/net/mlx4/en_tx.c
+++ b/drivers/net/mlx4/en_tx.c
@@ -249,6 +249,7 @@ static u32 mlx4_en_free_tx_desc(struct mlx4_en_priv *priv,
249 pci_unmap_page(mdev->pdev, 249 pci_unmap_page(mdev->pdev,
250 (dma_addr_t) be64_to_cpu(data->addr), 250 (dma_addr_t) be64_to_cpu(data->addr),
251 frag->size, PCI_DMA_TODEVICE); 251 frag->size, PCI_DMA_TODEVICE);
252 ++data;
252 } 253 }
253 } 254 }
254 /* Stamp the freed descriptor */ 255 /* Stamp the freed descriptor */
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 5d3343ef3d86..7acf204e38c9 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -184,6 +184,13 @@ void netxen_free_sw_resources(struct netxen_adapter *adapter)
184 kfree(recv_ctx->rds_rings); 184 kfree(recv_ctx->rds_rings);
185 185
186skip_rds: 186skip_rds:
187 if (recv_ctx->sds_rings == NULL)
188 goto skip_sds;
189
190 for(ring = 0; ring < adapter->max_sds_rings; ring++)
191 recv_ctx->sds_rings[ring].consumer = 0;
192
193skip_sds:
187 if (adapter->tx_ring == NULL) 194 if (adapter->tx_ring == NULL)
188 return; 195 return;
189 196
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 637ac8b89bac..3cd8cfcf627b 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -221,7 +221,7 @@ netxen_napi_disable(struct netxen_adapter *adapter)
221 } 221 }
222} 222}
223 223
224static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) 224static int nx_set_dma_mask(struct netxen_adapter *adapter)
225{ 225{
226 struct pci_dev *pdev = adapter->pdev; 226 struct pci_dev *pdev = adapter->pdev;
227 uint64_t mask, cmask; 227 uint64_t mask, cmask;
@@ -229,19 +229,17 @@ static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
229 adapter->pci_using_dac = 0; 229 adapter->pci_using_dac = 0;
230 230
231 mask = DMA_BIT_MASK(32); 231 mask = DMA_BIT_MASK(32);
232 /*
233 * Consistent DMA mask is set to 32 bit because it cannot be set to
234 * 35 bits. For P3 also leave it at 32 bits for now. Only the rings
235 * come off this pool.
236 */
237 cmask = DMA_BIT_MASK(32); 232 cmask = DMA_BIT_MASK(32);
238 233
234 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
239#ifndef CONFIG_IA64 235#ifndef CONFIG_IA64
240 if (revision_id >= NX_P3_B0)
241 mask = DMA_BIT_MASK(39);
242 else if (revision_id == NX_P2_C1)
243 mask = DMA_BIT_MASK(35); 236 mask = DMA_BIT_MASK(35);
244#endif 237#endif
238 } else {
239 mask = DMA_BIT_MASK(39);
240 cmask = mask;
241 }
242
245 if (pci_set_dma_mask(pdev, mask) == 0 && 243 if (pci_set_dma_mask(pdev, mask) == 0 &&
246 pci_set_consistent_dma_mask(pdev, cmask) == 0) { 244 pci_set_consistent_dma_mask(pdev, cmask) == 0) {
247 adapter->pci_using_dac = 1; 245 adapter->pci_using_dac = 1;
@@ -256,7 +254,7 @@ static int
256nx_update_dma_mask(struct netxen_adapter *adapter) 254nx_update_dma_mask(struct netxen_adapter *adapter)
257{ 255{
258 int change, shift, err; 256 int change, shift, err;
259 uint64_t mask, old_mask; 257 uint64_t mask, old_mask, old_cmask;
260 struct pci_dev *pdev = adapter->pdev; 258 struct pci_dev *pdev = adapter->pdev;
261 259
262 change = 0; 260 change = 0;
@@ -272,14 +270,29 @@ nx_update_dma_mask(struct netxen_adapter *adapter)
272 270
273 if (change) { 271 if (change) {
274 old_mask = pdev->dma_mask; 272 old_mask = pdev->dma_mask;
273 old_cmask = pdev->dev.coherent_dma_mask;
274
275 mask = (1ULL<<(32+shift)) - 1; 275 mask = (1ULL<<(32+shift)) - 1;
276 276
277 err = pci_set_dma_mask(pdev, mask); 277 err = pci_set_dma_mask(pdev, mask);
278 if (err) 278 if (err)
279 return pci_set_dma_mask(pdev, old_mask); 279 goto err_out;
280
281 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
282
283 err = pci_set_consistent_dma_mask(pdev, mask);
284 if (err)
285 goto err_out;
286 }
287 dev_info(&pdev->dev, "using %d-bit dma mask\n", 32+shift);
280 } 288 }
281 289
282 return 0; 290 return 0;
291
292err_out:
293 pci_set_dma_mask(pdev, old_mask);
294 pci_set_consistent_dma_mask(pdev, old_cmask);
295 return err;
283} 296}
284 297
285static void netxen_check_options(struct netxen_adapter *adapter) 298static void netxen_check_options(struct netxen_adapter *adapter)
@@ -1006,7 +1019,7 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1006 revision_id = pdev->revision; 1019 revision_id = pdev->revision;
1007 adapter->ahw.revision_id = revision_id; 1020 adapter->ahw.revision_id = revision_id;
1008 1021
1009 err = nx_set_dma_mask(adapter, revision_id); 1022 err = nx_set_dma_mask(adapter);
1010 if (err) 1023 if (err)
1011 goto err_out_free_netdev; 1024 goto err_out_free_netdev;
1012 1025
diff --git a/drivers/net/pcnet32.c b/drivers/net/pcnet32.c
index 28368157dac4..a646a445fda9 100644
--- a/drivers/net/pcnet32.c
+++ b/drivers/net/pcnet32.c
@@ -1611,8 +1611,11 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1611 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 1611 if (pcnet32_dwio_read_csr(ioaddr, 0) == 4
1612 && pcnet32_dwio_check(ioaddr)) { 1612 && pcnet32_dwio_check(ioaddr)) {
1613 a = &pcnet32_dwio; 1613 a = &pcnet32_dwio;
1614 } else 1614 } else {
1615 if (pcnet32_debug & NETIF_MSG_PROBE)
1616 printk(KERN_ERR PFX "No access methods\n");
1615 goto err_release_region; 1617 goto err_release_region;
1618 }
1616 } 1619 }
1617 1620
1618 chip_version = 1621 chip_version =
@@ -1719,7 +1722,9 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1719 ret = -ENOMEM; 1722 ret = -ENOMEM;
1720 goto err_release_region; 1723 goto err_release_region;
1721 } 1724 }
1722 SET_NETDEV_DEV(dev, &pdev->dev); 1725
1726 if (pdev)
1727 SET_NETDEV_DEV(dev, &pdev->dev);
1723 1728
1724 if (pcnet32_debug & NETIF_MSG_PROBE) 1729 if (pcnet32_debug & NETIF_MSG_PROBE)
1725 printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr); 1730 printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr);
@@ -1818,7 +1823,6 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1818 1823
1819 spin_lock_init(&lp->lock); 1824 spin_lock_init(&lp->lock);
1820 1825
1821 SET_NETDEV_DEV(dev, &pdev->dev);
1822 lp->name = chipname; 1826 lp->name = chipname;
1823 lp->shared_irq = shared; 1827 lp->shared_irq = shared;
1824 lp->tx_ring_size = TX_RING_SIZE; /* default tx ring size */ 1828 lp->tx_ring_size = TX_RING_SIZE; /* default tx ring size */
@@ -1852,12 +1856,6 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1852 ((cards_found >= MAX_UNITS) || full_duplex[cards_found])) 1856 ((cards_found >= MAX_UNITS) || full_duplex[cards_found]))
1853 lp->options |= PCNET32_PORT_FD; 1857 lp->options |= PCNET32_PORT_FD;
1854 1858
1855 if (!a) {
1856 if (pcnet32_debug & NETIF_MSG_PROBE)
1857 printk(KERN_ERR PFX "No access methods\n");
1858 ret = -ENODEV;
1859 goto err_free_consistent;
1860 }
1861 lp->a = *a; 1859 lp->a = *a;
1862 1860
1863 /* prior to register_netdev, dev->name is not yet correct */ 1861 /* prior to register_netdev, dev->name is not yet correct */
@@ -1973,14 +1971,13 @@ pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev)
1973 1971
1974 return 0; 1972 return 0;
1975 1973
1976 err_free_ring: 1974err_free_ring:
1977 pcnet32_free_ring(dev); 1975 pcnet32_free_ring(dev);
1978 err_free_consistent:
1979 pci_free_consistent(lp->pci_dev, sizeof(*lp->init_block), 1976 pci_free_consistent(lp->pci_dev, sizeof(*lp->init_block),
1980 lp->init_block, lp->init_dma_addr); 1977 lp->init_block, lp->init_dma_addr);
1981 err_free_netdev: 1978err_free_netdev:
1982 free_netdev(dev); 1979 free_netdev(dev);
1983 err_release_region: 1980err_release_region:
1984 release_region(ioaddr, PCNET32_TOTAL_SIZE); 1981 release_region(ioaddr, PCNET32_TOTAL_SIZE);
1985 return ret; 1982 return ret;
1986} 1983}
@@ -2089,6 +2086,7 @@ static void pcnet32_free_ring(struct net_device *dev)
2089static int pcnet32_open(struct net_device *dev) 2086static int pcnet32_open(struct net_device *dev)
2090{ 2087{
2091 struct pcnet32_private *lp = netdev_priv(dev); 2088 struct pcnet32_private *lp = netdev_priv(dev);
2089 struct pci_dev *pdev = lp->pci_dev;
2092 unsigned long ioaddr = dev->base_addr; 2090 unsigned long ioaddr = dev->base_addr;
2093 u16 val; 2091 u16 val;
2094 int i; 2092 int i;
@@ -2149,9 +2147,9 @@ static int pcnet32_open(struct net_device *dev)
2149 lp->a.write_csr(ioaddr, 124, val); 2147 lp->a.write_csr(ioaddr, 124, val);
2150 2148
2151 /* Allied Telesyn AT 2700/2701 FX are 100Mbit only and do not negotiate */ 2149 /* Allied Telesyn AT 2700/2701 FX are 100Mbit only and do not negotiate */
2152 if (lp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_AT && 2150 if (pdev && pdev->subsystem_vendor == PCI_VENDOR_ID_AT &&
2153 (lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2700FX || 2151 (pdev->subsystem_device == PCI_SUBDEVICE_ID_AT_2700FX ||
2154 lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2701FX)) { 2152 pdev->subsystem_device == PCI_SUBDEVICE_ID_AT_2701FX)) {
2155 if (lp->options & PCNET32_PORT_ASEL) { 2153 if (lp->options & PCNET32_PORT_ASEL) {
2156 lp->options = PCNET32_PORT_FD | PCNET32_PORT_100; 2154 lp->options = PCNET32_PORT_FD | PCNET32_PORT_100;
2157 if (netif_msg_link(lp)) 2155 if (netif_msg_link(lp))
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index 33984b737233..22cdd451fb82 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -30,6 +30,7 @@
30 30
31#ifdef CONFIG_OF_GPIO 31#ifdef CONFIG_OF_GPIO
32#include <linux/of_gpio.h> 32#include <linux/of_gpio.h>
33#include <linux/of_mdio.h>
33#include <linux/of_platform.h> 34#include <linux/of_platform.h>
34#endif 35#endif
35 36
@@ -81,13 +82,12 @@ static struct mdiobb_ops mdio_gpio_ops = {
81 .get_mdio_data = mdio_get, 82 .get_mdio_data = mdio_get,
82}; 83};
83 84
84static int __devinit mdio_gpio_bus_init(struct device *dev, 85static struct mii_bus * __devinit mdio_gpio_bus_init(struct device *dev,
85 struct mdio_gpio_platform_data *pdata, 86 struct mdio_gpio_platform_data *pdata,
86 int bus_id) 87 int bus_id)
87{ 88{
88 struct mii_bus *new_bus; 89 struct mii_bus *new_bus;
89 struct mdio_gpio_info *bitbang; 90 struct mdio_gpio_info *bitbang;
90 int ret = -ENOMEM;
91 int i; 91 int i;
92 92
93 bitbang = kzalloc(sizeof(*bitbang), GFP_KERNEL); 93 bitbang = kzalloc(sizeof(*bitbang), GFP_KERNEL);
@@ -104,8 +104,6 @@ static int __devinit mdio_gpio_bus_init(struct device *dev,
104 104
105 new_bus->name = "GPIO Bitbanged MDIO", 105 new_bus->name = "GPIO Bitbanged MDIO",
106 106
107 ret = -ENODEV;
108
109 new_bus->phy_mask = pdata->phy_mask; 107 new_bus->phy_mask = pdata->phy_mask;
110 new_bus->irq = pdata->irqs; 108 new_bus->irq = pdata->irqs;
111 new_bus->parent = dev; 109 new_bus->parent = dev;
@@ -129,15 +127,8 @@ static int __devinit mdio_gpio_bus_init(struct device *dev,
129 127
130 dev_set_drvdata(dev, new_bus); 128 dev_set_drvdata(dev, new_bus);
131 129
132 ret = mdiobus_register(new_bus); 130 return new_bus;
133 if (ret)
134 goto out_free_all;
135
136 return 0;
137 131
138out_free_all:
139 dev_set_drvdata(dev, NULL);
140 gpio_free(bitbang->mdio);
141out_free_mdc: 132out_free_mdc:
142 gpio_free(bitbang->mdc); 133 gpio_free(bitbang->mdc);
143out_free_bus: 134out_free_bus:
@@ -145,30 +136,47 @@ out_free_bus:
145out_free_bitbang: 136out_free_bitbang:
146 kfree(bitbang); 137 kfree(bitbang);
147out: 138out:
148 return ret; 139 return NULL;
149} 140}
150 141
151static void __devexit mdio_gpio_bus_destroy(struct device *dev) 142static void __devinit mdio_gpio_bus_deinit(struct device *dev)
152{ 143{
153 struct mii_bus *bus = dev_get_drvdata(dev); 144 struct mii_bus *bus = dev_get_drvdata(dev);
154 struct mdio_gpio_info *bitbang = bus->priv; 145 struct mdio_gpio_info *bitbang = bus->priv;
155 146
156 mdiobus_unregister(bus);
157 free_mdio_bitbang(bus);
158 dev_set_drvdata(dev, NULL); 147 dev_set_drvdata(dev, NULL);
159 gpio_free(bitbang->mdc);
160 gpio_free(bitbang->mdio); 148 gpio_free(bitbang->mdio);
149 gpio_free(bitbang->mdc);
150 free_mdio_bitbang(bus);
161 kfree(bitbang); 151 kfree(bitbang);
162} 152}
163 153
154static void __devexit mdio_gpio_bus_destroy(struct device *dev)
155{
156 struct mii_bus *bus = dev_get_drvdata(dev);
157
158 mdiobus_unregister(bus);
159 mdio_gpio_bus_deinit(dev);
160}
161
164static int __devinit mdio_gpio_probe(struct platform_device *pdev) 162static int __devinit mdio_gpio_probe(struct platform_device *pdev)
165{ 163{
166 struct mdio_gpio_platform_data *pdata = pdev->dev.platform_data; 164 struct mdio_gpio_platform_data *pdata = pdev->dev.platform_data;
165 struct mii_bus *new_bus;
166 int ret;
167 167
168 if (!pdata) 168 if (!pdata)
169 return -ENODEV; 169 return -ENODEV;
170 170
171 return mdio_gpio_bus_init(&pdev->dev, pdata, pdev->id); 171 new_bus = mdio_gpio_bus_init(&pdev->dev, pdata, pdev->id);
172 if (!new_bus)
173 return -ENODEV;
174
175 ret = mdiobus_register(new_bus);
176 if (ret)
177 mdio_gpio_bus_deinit(&pdev->dev);
178
179 return ret;
172} 180}
173 181
174static int __devexit mdio_gpio_remove(struct platform_device *pdev) 182static int __devexit mdio_gpio_remove(struct platform_device *pdev)
@@ -179,29 +187,12 @@ static int __devexit mdio_gpio_remove(struct platform_device *pdev)
179} 187}
180 188
181#ifdef CONFIG_OF_GPIO 189#ifdef CONFIG_OF_GPIO
182static void __devinit add_phy(struct mdio_gpio_platform_data *pdata,
183 struct device_node *np)
184{
185 const u32 *data;
186 int len, id, irq;
187
188 data = of_get_property(np, "reg", &len);
189 if (!data || len != 4)
190 return;
191
192 id = *data;
193 pdata->phy_mask &= ~(1 << id);
194
195 irq = of_irq_to_resource(np, 0, NULL);
196 if (irq)
197 pdata->irqs[id] = irq;
198}
199 190
200static int __devinit mdio_ofgpio_probe(struct of_device *ofdev, 191static int __devinit mdio_ofgpio_probe(struct of_device *ofdev,
201 const struct of_device_id *match) 192 const struct of_device_id *match)
202{ 193{
203 struct device_node *np = NULL;
204 struct mdio_gpio_platform_data *pdata; 194 struct mdio_gpio_platform_data *pdata;
195 struct mii_bus *new_bus;
205 int ret; 196 int ret;
206 197
207 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); 198 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
@@ -215,14 +206,18 @@ static int __devinit mdio_ofgpio_probe(struct of_device *ofdev,
215 206
216 ret = of_get_gpio(ofdev->node, 1); 207 ret = of_get_gpio(ofdev->node, 1);
217 if (ret < 0) 208 if (ret < 0)
218 goto out_free; 209 goto out_free;
219 pdata->mdio = ret; 210 pdata->mdio = ret;
220 211
221 while ((np = of_get_next_child(ofdev->node, np))) 212 new_bus = mdio_gpio_bus_init(&ofdev->dev, pdata, pdata->mdc);
222 if (!strcmp(np->type, "ethernet-phy")) 213 if (!new_bus)
223 add_phy(pdata, np); 214 return -ENODEV;
224 215
225 return mdio_gpio_bus_init(&ofdev->dev, pdata, pdata->mdc); 216 ret = of_mdiobus_register(new_bus, ofdev->node);
217 if (ret)
218 mdio_gpio_bus_deinit(&ofdev->dev);
219
220 return ret;
226 221
227out_free: 222out_free:
228 kfree(pdata); 223 kfree(pdata);
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 639d11bc444e..cd37d739ac74 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1384,7 +1384,7 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)
1384 1384
1385 /* create a fragment for each channel */ 1385 /* create a fragment for each channel */
1386 bits = B; 1386 bits = B;
1387 while (nfree > 0 && len > 0) { 1387 while (len > 0) {
1388 list = list->next; 1388 list = list->next;
1389 if (list == &ppp->channels) { 1389 if (list == &ppp->channels) {
1390 i = 0; 1390 i = 0;
@@ -1431,29 +1431,31 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)
1431 *otherwise divide it according to the speed 1431 *otherwise divide it according to the speed
1432 *of the channel we are going to transmit on 1432 *of the channel we are going to transmit on
1433 */ 1433 */
1434 if (pch->speed == 0) { 1434 if (nfree > 0) {
1435 flen = totlen/nfree ; 1435 if (pch->speed == 0) {
1436 if (nbigger > 0) { 1436 flen = totlen/nfree ;
1437 flen++; 1437 if (nbigger > 0) {
1438 nbigger--; 1438 flen++;
1439 } 1439 nbigger--;
1440 } else { 1440 }
1441 flen = (((totfree - nzero)*(totlen + hdrlen*totfree)) / 1441 } else {
1442 ((totspeed*totfree)/pch->speed)) - hdrlen; 1442 flen = (((totfree - nzero)*(totlen + hdrlen*totfree)) /
1443 if (nbigger > 0) { 1443 ((totspeed*totfree)/pch->speed)) - hdrlen;
1444 flen += ((totfree - nzero)*pch->speed)/totspeed; 1444 if (nbigger > 0) {
1445 nbigger -= ((totfree - nzero)*pch->speed)/ 1445 flen += ((totfree - nzero)*pch->speed)/totspeed;
1446 nbigger -= ((totfree - nzero)*pch->speed)/
1446 totspeed; 1447 totspeed;
1448 }
1447 } 1449 }
1450 nfree--;
1448 } 1451 }
1449 nfree--;
1450 1452
1451 /* 1453 /*
1452 *check if we are on the last channel or 1454 *check if we are on the last channel or
1453 *we exceded the lenght of the data to 1455 *we exceded the lenght of the data to
1454 *fragment 1456 *fragment
1455 */ 1457 */
1456 if ((nfree == 0) || (flen > len)) 1458 if ((nfree <= 0) || (flen > len))
1457 flen = len; 1459 flen = len;
1458 /* 1460 /*
1459 *it is not worth to tx on slow channels: 1461 *it is not worth to tx on slow channels:
@@ -1467,7 +1469,7 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)
1467 continue; 1469 continue;
1468 } 1470 }
1469 1471
1470 mtu = pch->chan->mtu + 2 - hdrlen; 1472 mtu = pch->chan->mtu - hdrlen;
1471 if (mtu < 4) 1473 if (mtu < 4)
1472 mtu = 4; 1474 mtu = 4;
1473 if (flen > mtu) 1475 if (flen > mtu)
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index f0031f1f97e5..5f2090233d7b 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -1063,6 +1063,7 @@ static void *pppoe_seq_next(struct seq_file *seq, void *v, loff_t *pos)
1063 else { 1063 else {
1064 int hash = hash_item(po->pppoe_pa.sid, po->pppoe_pa.remote); 1064 int hash = hash_item(po->pppoe_pa.sid, po->pppoe_pa.remote);
1065 1065
1066 po = NULL;
1066 while (++hash < PPPOE_HASH_SIZE) { 1067 while (++hash < PPPOE_HASH_SIZE) {
1067 po = pn->hash_table[hash]; 1068 po = pn->hash_table[hash];
1068 if (po) 1069 if (po)
diff --git a/drivers/net/pppol2tp.c b/drivers/net/pppol2tp.c
index e7935d09c896..e0f9219a0aea 100644
--- a/drivers/net/pppol2tp.c
+++ b/drivers/net/pppol2tp.c
@@ -2680,6 +2680,7 @@ out_unregister_pppol2tp_proto:
2680static void __exit pppol2tp_exit(void) 2680static void __exit pppol2tp_exit(void)
2681{ 2681{
2682 unregister_pppox_proto(PX_PROTO_OL2TP); 2682 unregister_pppox_proto(PX_PROTO_OL2TP);
2683 unregister_pernet_gen_device(pppol2tp_net_id, &pppol2tp_net_ops);
2683 proto_unregister(&pppol2tp_sk_proto); 2684 proto_unregister(&pppol2tp_sk_proto);
2684} 2685}
2685 2686
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 4b53b58d75fc..b82780d805f5 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -2060,8 +2060,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2060 } 2060 }
2061 } 2061 }
2062 2062
2063 pci_set_master(pdev);
2064
2065 /* ioremap MMIO region */ 2063 /* ioremap MMIO region */
2066 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE); 2064 ioaddr = ioremap(pci_resource_start(pdev, region), R8169_REGS_SIZE);
2067 if (!ioaddr) { 2065 if (!ioaddr) {
@@ -2089,6 +2087,8 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2089 2087
2090 RTL_W16(IntrStatus, 0xffff); 2088 RTL_W16(IntrStatus, 0xffff);
2091 2089
2090 pci_set_master(pdev);
2091
2092 /* Identify chip attached to board */ 2092 /* Identify chip attached to board */
2093 rtl8169_get_mac_version(tp, ioaddr); 2093 rtl8169_get_mac_version(tp, ioaddr);
2094 2094
@@ -3874,6 +3874,15 @@ static void rtl_shutdown(struct pci_dev *pdev)
3874 spin_unlock_irq(&tp->lock); 3874 spin_unlock_irq(&tp->lock);
3875 3875
3876 if (system_state == SYSTEM_POWER_OFF) { 3876 if (system_state == SYSTEM_POWER_OFF) {
3877 /* WoL fails with some 8168 when the receiver is disabled. */
3878 if (tp->features & RTL_FEATURE_WOL) {
3879 pci_clear_master(pdev);
3880
3881 RTL_W8(ChipCmd, CmdRxEnb);
3882 /* PCI commit */
3883 RTL_R8(ChipCmd);
3884 }
3885
3877 pci_wake_from_d3(pdev, true); 3886 pci_wake_from_d3(pdev, true);
3878 pci_set_power_state(pdev, PCI_D3hot); 3887 pci_set_power_state(pdev, PCI_D3hot);
3879 } 3888 }
diff --git a/drivers/net/s6gmac.c b/drivers/net/s6gmac.c
index 5345e47b35ac..4525cbe8dd69 100644
--- a/drivers/net/s6gmac.c
+++ b/drivers/net/s6gmac.c
@@ -793,7 +793,7 @@ static inline int s6gmac_phy_start(struct net_device *dev)
793 struct s6gmac *pd = netdev_priv(dev); 793 struct s6gmac *pd = netdev_priv(dev);
794 int i = 0; 794 int i = 0;
795 struct phy_device *p = NULL; 795 struct phy_device *p = NULL;
796 while ((!(p = pd->mii.bus->phy_map[i])) && (i < PHY_MAX_ADDR)) 796 while ((i < PHY_MAX_ADDR) && (!(p = pd->mii.bus->phy_map[i])))
797 i++; 797 i++;
798 p = phy_connect(dev, dev_name(&p->dev), &s6gmac_adjust_link, 0, 798 p = phy_connect(dev, dev_name(&p->dev), &s6gmac_adjust_link, 0,
799 PHY_INTERFACE_MODE_RGMII); 799 PHY_INTERFACE_MODE_RGMII);
diff --git a/drivers/net/skge.c b/drivers/net/skge.c
index 60d502eef4fc..543af2044f40 100644
--- a/drivers/net/skge.c
+++ b/drivers/net/skge.c
@@ -3854,8 +3854,10 @@ static struct net_device *skge_devinit(struct skge_hw *hw, int port,
3854 skge->speed = -1; 3854 skge->speed = -1;
3855 skge->advertising = skge_supported_modes(hw); 3855 skge->advertising = skge_supported_modes(hw);
3856 3856
3857 if (device_may_wakeup(&hw->pdev->dev)) 3857 if (device_can_wakeup(&hw->pdev->dev)) {
3858 skge->wol = wol_supported(hw) & WAKE_MAGIC; 3858 skge->wol = wol_supported(hw) & WAKE_MAGIC;
3859 device_set_wakeup_enable(&hw->pdev->dev, skge->wol);
3860 }
3859 3861
3860 hw->dev[port] = dev; 3862 hw->dev[port] = dev;
3861 3863
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 3550c5dcd93c..0a551d8f5d95 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1488,6 +1488,8 @@ static int sky2_up(struct net_device *dev)
1488 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL); 1488 sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL);
1489#endif 1489#endif
1490 1490
1491 sky2->restarting = 0;
1492
1491 err = sky2_rx_start(sky2); 1493 err = sky2_rx_start(sky2);
1492 if (err) 1494 if (err)
1493 goto err_out; 1495 goto err_out;
@@ -1500,6 +1502,9 @@ static int sky2_up(struct net_device *dev)
1500 1502
1501 sky2_set_multicast(dev); 1503 sky2_set_multicast(dev);
1502 1504
1505 /* wake queue incase we are restarting */
1506 netif_wake_queue(dev);
1507
1503 if (netif_msg_ifup(sky2)) 1508 if (netif_msg_ifup(sky2))
1504 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name); 1509 printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
1505 return 0; 1510 return 0;
@@ -1533,6 +1538,8 @@ static inline int tx_dist(unsigned tail, unsigned head)
1533/* Number of list elements available for next tx */ 1538/* Number of list elements available for next tx */
1534static inline int tx_avail(const struct sky2_port *sky2) 1539static inline int tx_avail(const struct sky2_port *sky2)
1535{ 1540{
1541 if (unlikely(sky2->restarting))
1542 return 0;
1536 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod); 1543 return sky2->tx_pending - tx_dist(sky2->tx_cons, sky2->tx_prod);
1537} 1544}
1538 1545
@@ -1818,6 +1825,10 @@ static int sky2_down(struct net_device *dev)
1818 if (netif_msg_ifdown(sky2)) 1825 if (netif_msg_ifdown(sky2))
1819 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name); 1826 printk(KERN_INFO PFX "%s: disabling interface\n", dev->name);
1820 1827
1828 /* explicitly shut off tx incase we're restarting */
1829 sky2->restarting = 1;
1830 netif_tx_disable(dev);
1831
1821 /* Force flow control off */ 1832 /* Force flow control off */
1822 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); 1833 sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF);
1823 1834
@@ -2359,7 +2370,7 @@ static inline void sky2_tx_done(struct net_device *dev, u16 last)
2359{ 2370{
2360 struct sky2_port *sky2 = netdev_priv(dev); 2371 struct sky2_port *sky2 = netdev_priv(dev);
2361 2372
2362 if (netif_running(dev)) { 2373 if (likely(netif_running(dev) && !sky2->restarting)) {
2363 netif_tx_lock(dev); 2374 netif_tx_lock(dev);
2364 sky2_tx_complete(sky2, last); 2375 sky2_tx_complete(sky2, last);
2365 netif_tx_unlock(dev); 2376 netif_tx_unlock(dev);
@@ -4283,6 +4294,7 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
4283 spin_lock_init(&sky2->phy_lock); 4294 spin_lock_init(&sky2->phy_lock);
4284 sky2->tx_pending = TX_DEF_PENDING; 4295 sky2->tx_pending = TX_DEF_PENDING;
4285 sky2->rx_pending = RX_DEF_PENDING; 4296 sky2->rx_pending = RX_DEF_PENDING;
4297 sky2->restarting = 0;
4286 4298
4287 hw->dev[port] = dev; 4299 hw->dev[port] = dev;
4288 4300
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index b5549c9e5107..4486b066b43f 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -2051,6 +2051,7 @@ struct sky2_port {
2051 u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */ 2051 u8 duplex; /* DUPLEX_HALF, DUPLEX_FULL */
2052 u8 rx_csum; 2052 u8 rx_csum;
2053 u8 wol; 2053 u8 wol;
2054 u8 restarting;
2054 enum flow_control flow_mode; 2055 enum flow_control flow_mode;
2055 enum flow_control flow_status; 2056 enum flow_control flow_status;
2056 2057
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index f1f773b17fe1..57a159fac99f 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -186,7 +186,8 @@ static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
186#define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l)) 186#define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l))
187#define SMC_IRQ_FLAGS (-1) /* from resource */ 187#define SMC_IRQ_FLAGS (-1) /* from resource */
188 188
189#elif defined(CONFIG_MACH_LOGICPD_PXA270) 189#elif defined(CONFIG_MACH_LOGICPD_PXA270) \
190 || defined(CONFIG_MACH_NOMADIK_8815NHK)
190 191
191#define SMC_CAN_USE_8BIT 0 192#define SMC_CAN_USE_8BIT 0
192#define SMC_CAN_USE_16BIT 1 193#define SMC_CAN_USE_16BIT 1
diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c
index 9d896116cf76..08a6c41c1599 100644
--- a/drivers/net/tokenring/ibmtr.c
+++ b/drivers/net/tokenring/ibmtr.c
@@ -1912,7 +1912,7 @@ static int __init ibmtr_init(void)
1912 1912
1913 find_turbo_adapters(io); 1913 find_turbo_adapters(io);
1914 1914
1915 for (i = 0; io[i] && (i < IBMTR_MAX_ADAPTERS); i++) { 1915 for (i = 0; i < IBMTR_MAX_ADAPTERS && io[i]; i++) {
1916 struct net_device *dev; 1916 struct net_device *dev;
1917 irq[i] = 0; 1917 irq[i] = 0;
1918 mem[i] = 0; 1918 mem[i] = 0;
diff --git a/drivers/net/tulip/de4x5.c b/drivers/net/tulip/de4x5.c
index eb72d2e9ab3d..acfdccd44567 100644
--- a/drivers/net/tulip/de4x5.c
+++ b/drivers/net/tulip/de4x5.c
@@ -5059,7 +5059,7 @@ mii_get_phy(struct net_device *dev)
5059 if ((id == 0) || (id == 65535)) continue; /* Valid ID? */ 5059 if ((id == 0) || (id == 65535)) continue; /* Valid ID? */
5060 for (j=0; j<limit; j++) { /* Search PHY table */ 5060 for (j=0; j<limit; j++) { /* Search PHY table */
5061 if (id != phy_info[j].id) continue; /* ID match? */ 5061 if (id != phy_info[j].id) continue; /* ID match? */
5062 for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++); 5062 for (k=0; k < DE4X5_MAX_PHY && lp->phy[k].id; k++);
5063 if (k < DE4X5_MAX_PHY) { 5063 if (k < DE4X5_MAX_PHY) {
5064 memcpy((char *)&lp->phy[k], 5064 memcpy((char *)&lp->phy[k],
5065 (char *)&phy_info[j], sizeof(struct phy_table)); 5065 (char *)&phy_info[j], sizeof(struct phy_table));
@@ -5072,7 +5072,7 @@ mii_get_phy(struct net_device *dev)
5072 break; 5072 break;
5073 } 5073 }
5074 if ((j == limit) && (i < DE4X5_MAX_MII)) { 5074 if ((j == limit) && (i < DE4X5_MAX_MII)) {
5075 for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++); 5075 for (k=0; k < DE4X5_MAX_PHY && lp->phy[k].id; k++);
5076 lp->phy[k].addr = i; 5076 lp->phy[k].addr = i;
5077 lp->phy[k].id = id; 5077 lp->phy[k].id = id;
5078 lp->phy[k].spd.reg = GENERIC_REG; /* ANLPA register */ 5078 lp->phy[k].spd.reg = GENERIC_REG; /* ANLPA register */
@@ -5091,7 +5091,7 @@ mii_get_phy(struct net_device *dev)
5091 purgatory: 5091 purgatory:
5092 lp->active = 0; 5092 lp->active = 0;
5093 if (lp->phy[0].id) { /* Reset the PHY devices */ 5093 if (lp->phy[0].id) { /* Reset the PHY devices */
5094 for (k=0; lp->phy[k].id && (k < DE4X5_MAX_PHY); k++) { /*For each PHY*/ 5094 for (k=0; k < DE4X5_MAX_PHY && lp->phy[k].id; k++) { /*For each PHY*/
5095 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII); 5095 mii_wr(MII_CR_RST, MII_CR, lp->phy[k].addr, DE4X5_MII);
5096 while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST); 5096 while (mii_rd(MII_CR, lp->phy[k].addr, DE4X5_MII) & MII_CR_RST);
5097 5097
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 40c6eba775ce..3b957e6412ee 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -1590,13 +1590,13 @@ static int init_phy(struct net_device *dev)
1590 priv->oldspeed = 0; 1590 priv->oldspeed = 0;
1591 priv->oldduplex = -1; 1591 priv->oldduplex = -1;
1592 1592
1593 if (!ug_info->phy_node)
1594 return 0;
1595
1596 phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0, 1593 phydev = of_phy_connect(dev, ug_info->phy_node, &adjust_link, 0,
1597 priv->phy_interface); 1594 priv->phy_interface);
1595 if (!phydev)
1596 phydev = of_phy_connect_fixed_link(dev, &adjust_link,
1597 priv->phy_interface);
1598 if (!phydev) { 1598 if (!phydev) {
1599 printk("%s: Could not attach to PHY\n", dev->name); 1599 dev_err(&dev->dev, "Could not attach to PHY\n");
1600 return -ENODEV; 1600 return -ENODEV;
1601 } 1601 }
1602 1602
@@ -3608,9 +3608,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3608 struct ucc_geth_private *ugeth = NULL; 3608 struct ucc_geth_private *ugeth = NULL;
3609 struct ucc_geth_info *ug_info; 3609 struct ucc_geth_info *ug_info;
3610 struct resource res; 3610 struct resource res;
3611 struct device_node *phy;
3612 int err, ucc_num, max_speed = 0; 3611 int err, ucc_num, max_speed = 0;
3613 const u32 *fixed_link;
3614 const unsigned int *prop; 3612 const unsigned int *prop;
3615 const char *sprop; 3613 const char *sprop;
3616 const void *mac_addr; 3614 const void *mac_addr;
@@ -3708,15 +3706,8 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3708 3706
3709 ug_info->uf_info.regs = res.start; 3707 ug_info->uf_info.regs = res.start;
3710 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0); 3708 ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
3711 fixed_link = of_get_property(np, "fixed-link", NULL); 3709
3712 if (fixed_link) { 3710 ug_info->phy_node = of_parse_phandle(np, "phy-handle", 0);
3713 phy = NULL;
3714 } else {
3715 phy = of_parse_phandle(np, "phy-handle", 0);
3716 if (phy == NULL)
3717 return -ENODEV;
3718 }
3719 ug_info->phy_node = phy;
3720 3711
3721 /* Find the TBI PHY node. If it's not there, we don't support SGMII */ 3712 /* Find the TBI PHY node. If it's not there, we don't support SGMII */
3722 ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0); 3713 ug_info->tbi_node = of_parse_phandle(np, "tbi-handle", 0);
@@ -3725,7 +3716,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
3725 prop = of_get_property(np, "phy-connection-type", NULL); 3716 prop = of_get_property(np, "phy-connection-type", NULL);
3726 if (!prop) { 3717 if (!prop) {
3727 /* handle interface property present in old trees */ 3718 /* handle interface property present in old trees */
3728 prop = of_get_property(phy, "interface", NULL); 3719 prop = of_get_property(ug_info->phy_node, "interface", NULL);
3729 if (prop != NULL) { 3720 if (prop != NULL) {
3730 phy_interface = enet_to_phy_interface[*prop]; 3721 phy_interface = enet_to_phy_interface[*prop];
3731 max_speed = enet_to_speed[*prop]; 3722 max_speed = enet_to_speed[*prop];
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index c70604f0329e..8ce5e4cee168 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -5918,20 +5918,19 @@ static int airo_set_essid(struct net_device *dev,
5918 readSsidRid(local, &SSID_rid); 5918 readSsidRid(local, &SSID_rid);
5919 5919
5920 /* Check if we asked for `any' */ 5920 /* Check if we asked for `any' */
5921 if(dwrq->flags == 0) { 5921 if (dwrq->flags == 0) {
5922 /* Just send an empty SSID list */ 5922 /* Just send an empty SSID list */
5923 memset(&SSID_rid, 0, sizeof(SSID_rid)); 5923 memset(&SSID_rid, 0, sizeof(SSID_rid));
5924 } else { 5924 } else {
5925 int index = (dwrq->flags & IW_ENCODE_INDEX) - 1; 5925 unsigned index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
5926 5926
5927 /* Check the size of the string */ 5927 /* Check the size of the string */
5928 if(dwrq->length > IW_ESSID_MAX_SIZE) { 5928 if (dwrq->length > IW_ESSID_MAX_SIZE)
5929 return -E2BIG ; 5929 return -E2BIG ;
5930 } 5930
5931 /* Check if index is valid */ 5931 /* Check if index is valid */
5932 if((index < 0) || (index >= 4)) { 5932 if (index >= ARRAY_SIZE(SSID_rid.ssids))
5933 return -EINVAL; 5933 return -EINVAL;
5934 }
5935 5934
5936 /* Set the SSID */ 5935 /* Set the SSID */
5937 memset(SSID_rid.ssids[index].ssid, 0, 5936 memset(SSID_rid.ssids[index].ssid, 0,
@@ -6819,7 +6818,7 @@ static int airo_set_txpow(struct net_device *dev,
6819 return -EINVAL; 6818 return -EINVAL;
6820 } 6819 }
6821 clear_bit (FLAG_RADIO_OFF, &local->flags); 6820 clear_bit (FLAG_RADIO_OFF, &local->flags);
6822 for (i = 0; cap_rid.txPowerLevels[i] && (i < 8); i++) 6821 for (i = 0; i < 8 && cap_rid.txPowerLevels[i]; i++)
6823 if (v == cap_rid.txPowerLevels[i]) { 6822 if (v == cap_rid.txPowerLevels[i]) {
6824 readConfigRid(local, 1); 6823 readConfigRid(local, 1);
6825 local->config.txPower = v; 6824 local->config.txPower = v;
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index ea045151f953..029c1bc7468f 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -2970,6 +2970,9 @@ ath5k_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2970 if (modparam_nohwcrypt) 2970 if (modparam_nohwcrypt)
2971 return -EOPNOTSUPP; 2971 return -EOPNOTSUPP;
2972 2972
2973 if (sc->opmode == NL80211_IFTYPE_AP)
2974 return -EOPNOTSUPP;
2975
2973 switch (key->alg) { 2976 switch (key->alg) {
2974 case ALG_WEP: 2977 case ALG_WEP:
2975 case ALG_TKIP: 2978 case ALG_TKIP:
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index 1aeafb511ddd..aad259b4c197 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -478,6 +478,18 @@ void ath9k_ani_reset(struct ath_hw *ah)
478 "Reset ANI state opmode %u\n", ah->opmode); 478 "Reset ANI state opmode %u\n", ah->opmode);
479 ah->stats.ast_ani_reset++; 479 ah->stats.ast_ani_reset++;
480 480
481 if (ah->opmode == NL80211_IFTYPE_AP) {
482 /*
483 * ath9k_hw_ani_control() will only process items set on
484 * ah->ani_function
485 */
486 if (IS_CHAN_2GHZ(chan))
487 ah->ani_function = (ATH9K_ANI_SPUR_IMMUNITY_LEVEL |
488 ATH9K_ANI_FIRSTEP_LEVEL);
489 else
490 ah->ani_function = 0;
491 }
492
481 ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0); 493 ath9k_hw_ani_control(ah, ATH9K_ANI_NOISE_IMMUNITY_LEVEL, 0);
482 ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, 0); 494 ath9k_hw_ani_control(ah, ATH9K_ANI_SPUR_IMMUNITY_LEVEL, 0);
483 ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, 0); 495 ath9k_hw_ani_control(ah, ATH9K_ANI_FIRSTEP_LEVEL, 0);
diff --git a/drivers/net/wireless/ath/ath9k/eeprom.c b/drivers/net/wireless/ath/ath9k/eeprom.c
index a2fda702b620..ce0e86c36a82 100644
--- a/drivers/net/wireless/ath/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
@@ -460,7 +460,7 @@ static int ath9k_hw_4k_check_eeprom(struct ath_hw *ah)
460 integer = swab32(eep->modalHeader.antCtrlCommon); 460 integer = swab32(eep->modalHeader.antCtrlCommon);
461 eep->modalHeader.antCtrlCommon = integer; 461 eep->modalHeader.antCtrlCommon = integer;
462 462
463 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 463 for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
464 integer = swab32(eep->modalHeader.antCtrlChain[i]); 464 integer = swab32(eep->modalHeader.antCtrlChain[i]);
465 eep->modalHeader.antCtrlChain[i] = integer; 465 eep->modalHeader.antCtrlChain[i] = integer;
466 } 466 }
@@ -914,7 +914,7 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
914 ctlMode, numCtlModes, isHt40CtlMode, 914 ctlMode, numCtlModes, isHt40CtlMode,
915 (pCtlMode[ctlMode] & EXT_ADDITIVE)); 915 (pCtlMode[ctlMode] & EXT_ADDITIVE));
916 916
917 for (i = 0; (i < AR5416_NUM_CTLS) && 917 for (i = 0; (i < AR5416_EEP4K_NUM_CTLS) &&
918 pEepData->ctlIndex[i]; i++) { 918 pEepData->ctlIndex[i]; i++) {
919 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM, 919 DPRINTF(ah->ah_sc, ATH_DBG_EEPROM,
920 " LOOP-Ctlidx %d: cfgCtl 0x%2.2x " 920 " LOOP-Ctlidx %d: cfgCtl 0x%2.2x "
diff --git a/drivers/net/wireless/ath/regd.c b/drivers/net/wireless/ath/regd.c
index eef370bd1211..bf3d25ba7be1 100644
--- a/drivers/net/wireless/ath/regd.c
+++ b/drivers/net/wireless/ath/regd.c
@@ -474,6 +474,21 @@ ath_regd_init_wiphy(struct ath_regulatory *reg,
474 return 0; 474 return 0;
475} 475}
476 476
477/*
478 * Some users have reported their EEPROM programmed with
479 * 0x8000 set, this is not a supported regulatory domain
480 * but since we have more than one user with it we need
481 * a solution for them. We default to 0x64, which is the
482 * default Atheros world regulatory domain.
483 */
484static void ath_regd_sanitize(struct ath_regulatory *reg)
485{
486 if (reg->current_rd != COUNTRY_ERD_FLAG)
487 return;
488 printk(KERN_DEBUG "ath: EEPROM regdomain sanitized\n");
489 reg->current_rd = 0x64;
490}
491
477int 492int
478ath_regd_init(struct ath_regulatory *reg, 493ath_regd_init(struct ath_regulatory *reg,
479 struct wiphy *wiphy, 494 struct wiphy *wiphy,
@@ -486,6 +501,8 @@ ath_regd_init(struct ath_regulatory *reg,
486 if (!reg) 501 if (!reg)
487 return -EINVAL; 502 return -EINVAL;
488 503
504 ath_regd_sanitize(reg);
505
489 printk(KERN_DEBUG "ath: EEPROM regdomain: 0x%0x\n", reg->current_rd); 506 printk(KERN_DEBUG "ath: EEPROM regdomain: 0x%0x\n", reg->current_rd);
490 507
491 if (!ath_regd_is_eeprom_valid(reg)) { 508 if (!ath_regd_is_eeprom_valid(reg)) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.h b/drivers/net/wireless/iwlwifi/iwl-3945.h
index fbb3a573463e..2de6471d4be9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.h
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.h
@@ -112,7 +112,7 @@ enum iwl3945_antenna {
112#define IWL_TX_FIFO_NONE 7 112#define IWL_TX_FIFO_NONE 7
113 113
114/* Minimum number of queues. MAX_NUM is defined in hw specific files */ 114/* Minimum number of queues. MAX_NUM is defined in hw specific files */
115#define IWL_MIN_NUM_QUEUES 4 115#define IWL39_MIN_NUM_QUEUES 4
116 116
117#define IEEE80211_DATA_LEN 2304 117#define IEEE80211_DATA_LEN 2304
118#define IEEE80211_4ADDR_LEN 30 118#define IEEE80211_4ADDR_LEN 30
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 6d1519e1f011..355f50ea7fef 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -2675,12 +2675,10 @@ static ssize_t show_power_level(struct device *d,
2675 struct device_attribute *attr, char *buf) 2675 struct device_attribute *attr, char *buf)
2676{ 2676{
2677 struct iwl_priv *priv = dev_get_drvdata(d); 2677 struct iwl_priv *priv = dev_get_drvdata(d);
2678 int mode = priv->power_data.user_power_setting;
2679 int level = priv->power_data.power_mode; 2678 int level = priv->power_data.power_mode;
2680 char *p = buf; 2679 char *p = buf;
2681 2680
2682 p += sprintf(p, "INDEX:%d\t", level); 2681 p += sprintf(p, "%d\n", level);
2683 p += sprintf(p, "USER:%d\n", mode);
2684 return p - buf + 1; 2682 return p - buf + 1;
2685} 2683}
2686 2684
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 6ab07165ea28..18b135f510e5 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -1332,6 +1332,9 @@ int iwl_setup_mac(struct iwl_priv *priv)
1332 1332
1333 hw->wiphy->custom_regulatory = true; 1333 hw->wiphy->custom_regulatory = true;
1334 1334
1335 /* Firmware does not support this */
1336 hw->wiphy->disable_beacon_hints = true;
1337
1335 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX; 1338 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX;
1336 /* we create the 802.11 header and a zero-length SSID element */ 1339 /* we create the 802.11 header and a zero-length SSID element */
1337 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2; 1340 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
diff --git a/drivers/net/wireless/iwlwifi/iwl-debugfs.c b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
index 11e08c068917..ca00cc8ad4c7 100644
--- a/drivers/net/wireless/iwlwifi/iwl-debugfs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-debugfs.c
@@ -308,18 +308,18 @@ static ssize_t iwl_dbgfs_nvm_read(struct file *file,
308 return -ENODATA; 308 return -ENODATA;
309 } 309 }
310 310
311 ptr = priv->eeprom;
312 if (!ptr) {
313 IWL_ERR(priv, "Invalid EEPROM/OTP memory\n");
314 return -ENOMEM;
315 }
316
311 /* 4 characters for byte 0xYY */ 317 /* 4 characters for byte 0xYY */
312 buf = kzalloc(buf_size, GFP_KERNEL); 318 buf = kzalloc(buf_size, GFP_KERNEL);
313 if (!buf) { 319 if (!buf) {
314 IWL_ERR(priv, "Can not allocate Buffer\n"); 320 IWL_ERR(priv, "Can not allocate Buffer\n");
315 return -ENOMEM; 321 return -ENOMEM;
316 } 322 }
317
318 ptr = priv->eeprom;
319 if (!ptr) {
320 IWL_ERR(priv, "Invalid EEPROM/OTP memory\n");
321 return -ENOMEM;
322 }
323 pos += scnprintf(buf + pos, buf_size - pos, "NVM Type: %s\n", 323 pos += scnprintf(buf + pos, buf_size - pos, "NVM Type: %s\n",
324 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP) 324 (priv->nvm_device_type == NVM_DEVICE_TYPE_OTP)
325 ? "OTP" : "EEPROM"); 325 ? "OTP" : "EEPROM");
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h
index e2d620f0b6e8..650e20af20fa 100644
--- a/drivers/net/wireless/iwlwifi/iwl-dev.h
+++ b/drivers/net/wireless/iwlwifi/iwl-dev.h
@@ -258,8 +258,10 @@ struct iwl_channel_info {
258#define IWL_TX_FIFO_HCCA_2 6 258#define IWL_TX_FIFO_HCCA_2 6
259#define IWL_TX_FIFO_NONE 7 259#define IWL_TX_FIFO_NONE 7
260 260
261/* Minimum number of queues. MAX_NUM is defined in hw specific files */ 261/* Minimum number of queues. MAX_NUM is defined in hw specific files.
262#define IWL_MIN_NUM_QUEUES 4 262 * Set the minimum to accommodate the 4 standard TX queues, 1 command
263 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
264#define IWL_MIN_NUM_QUEUES 10
263 265
264/* Power management (not Tx power) structures */ 266/* Power management (not Tx power) structures */
265 267
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 2addf735b193..ffd5c61a7553 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -566,6 +566,8 @@ int iwl_remove_default_wep_key(struct iwl_priv *priv,
566 unsigned long flags; 566 unsigned long flags;
567 567
568 spin_lock_irqsave(&priv->sta_lock, flags); 568 spin_lock_irqsave(&priv->sta_lock, flags);
569 IWL_DEBUG_WEP(priv, "Removing default WEP key: idx=%d\n",
570 keyconf->keyidx);
569 571
570 if (!test_and_clear_bit(keyconf->keyidx, &priv->ucode_key_table)) 572 if (!test_and_clear_bit(keyconf->keyidx, &priv->ucode_key_table))
571 IWL_ERR(priv, "index %d not used in uCode key table.\n", 573 IWL_ERR(priv, "index %d not used in uCode key table.\n",
@@ -573,6 +575,11 @@ int iwl_remove_default_wep_key(struct iwl_priv *priv,
573 575
574 priv->default_wep_key--; 576 priv->default_wep_key--;
575 memset(&priv->wep_keys[keyconf->keyidx], 0, sizeof(priv->wep_keys[0])); 577 memset(&priv->wep_keys[keyconf->keyidx], 0, sizeof(priv->wep_keys[0]));
578 if (iwl_is_rfkill(priv)) {
579 IWL_DEBUG_WEP(priv, "Not sending REPLY_WEPKEY command due to RFKILL.\n");
580 spin_unlock_irqrestore(&priv->sta_lock, flags);
581 return 0;
582 }
576 ret = iwl_send_static_wepkey_cmd(priv, 1); 583 ret = iwl_send_static_wepkey_cmd(priv, 1);
577 IWL_DEBUG_WEP(priv, "Remove default WEP key: idx=%d ret=%d\n", 584 IWL_DEBUG_WEP(priv, "Remove default WEP key: idx=%d ret=%d\n",
578 keyconf->keyidx, ret); 585 keyconf->keyidx, ret);
@@ -853,6 +860,11 @@ int iwl_remove_dynamic_key(struct iwl_priv *priv,
853 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; 860 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
854 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; 861 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
855 862
863 if (iwl_is_rfkill(priv)) {
864 IWL_DEBUG_WEP(priv, "Not sending REPLY_ADD_STA command because RFKILL enabled. \n");
865 spin_unlock_irqrestore(&priv->sta_lock, flags);
866 return 0;
867 }
856 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); 868 ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
857 spin_unlock_irqrestore(&priv->sta_lock, flags); 869 spin_unlock_irqrestore(&priv->sta_lock, flags);
858 return ret; 870 return ret;
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index 85ae7a62109c..2e89040e63be 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -720,8 +720,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
720 goto drop_unlock; 720 goto drop_unlock;
721 } 721 }
722 722
723 spin_unlock_irqrestore(&priv->lock, flags);
724
725 hdr_len = ieee80211_hdrlen(fc); 723 hdr_len = ieee80211_hdrlen(fc);
726 724
727 /* Find (or create) index into station table for destination station */ 725 /* Find (or create) index into station table for destination station */
@@ -729,7 +727,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
729 if (sta_id == IWL_INVALID_STATION) { 727 if (sta_id == IWL_INVALID_STATION) {
730 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", 728 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
731 hdr->addr1); 729 hdr->addr1);
732 goto drop; 730 goto drop_unlock;
733 } 731 }
734 732
735 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id); 733 IWL_DEBUG_TX(priv, "station Id %d\n", sta_id);
@@ -750,14 +748,17 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
750 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id; 748 txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
751 swq_id = iwl_virtual_agg_queue_num(swq_id, txq_id); 749 swq_id = iwl_virtual_agg_queue_num(swq_id, txq_id);
752 } 750 }
753 priv->stations[sta_id].tid[tid].tfds_in_queue++;
754 } 751 }
755 752
756 txq = &priv->txq[txq_id]; 753 txq = &priv->txq[txq_id];
757 q = &txq->q; 754 q = &txq->q;
758 txq->swq_id = swq_id; 755 txq->swq_id = swq_id;
759 756
760 spin_lock_irqsave(&priv->lock, flags); 757 if (unlikely(iwl_queue_space(q) < q->high_mark))
758 goto drop_unlock;
759
760 if (ieee80211_is_data_qos(fc))
761 priv->stations[sta_id].tid[tid].tfds_in_queue++;
761 762
762 /* Set up driver data for this TFD */ 763 /* Set up driver data for this TFD */
763 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); 764 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
@@ -872,7 +873,8 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
872 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len); 873 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, hdr_len);
873 874
874 /* Set up entry for this TFD in Tx byte-count array */ 875 /* Set up entry for this TFD in Tx byte-count array */
875 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 876 if (info->flags & IEEE80211_TX_CTL_AMPDU)
877 priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq,
876 le16_to_cpu(tx_cmd->len)); 878 le16_to_cpu(tx_cmd->len));
877 879
878 pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys, 880 pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys,
@@ -901,7 +903,6 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
901 903
902drop_unlock: 904drop_unlock:
903 spin_unlock_irqrestore(&priv->lock, flags); 905 spin_unlock_irqrestore(&priv->lock, flags);
904drop:
905 return -1; 906 return -1;
906} 907}
907EXPORT_SYMBOL(iwl_tx_skb); 908EXPORT_SYMBOL(iwl_tx_skb);
@@ -1170,6 +1171,8 @@ int iwl_tx_agg_start(struct iwl_priv *priv, const u8 *ra, u16 tid, u16 *ssn)
1170 IWL_ERR(priv, "Start AGG on invalid station\n"); 1171 IWL_ERR(priv, "Start AGG on invalid station\n");
1171 return -ENXIO; 1172 return -ENXIO;
1172 } 1173 }
1174 if (unlikely(tid >= MAX_TID_COUNT))
1175 return -EINVAL;
1173 1176
1174 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) { 1177 if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
1175 IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n"); 1178 IWL_ERR(priv, "Start AGG when state is not IWL_AGG_OFF !\n");
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index cb9bd4c8f25e..523843369ca2 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -3643,12 +3643,10 @@ static ssize_t show_power_level(struct device *d,
3643 struct device_attribute *attr, char *buf) 3643 struct device_attribute *attr, char *buf)
3644{ 3644{
3645 struct iwl_priv *priv = dev_get_drvdata(d); 3645 struct iwl_priv *priv = dev_get_drvdata(d);
3646 int mode = priv->power_data.user_power_setting;
3647 int level = priv->power_data.power_mode; 3646 int level = priv->power_data.power_mode;
3648 char *p = buf; 3647 char *p = buf;
3649 3648
3650 p += sprintf(p, "INDEX:%d\t", level); 3649 p += sprintf(p, "%d\n", level);
3651 p += sprintf(p, "USER:%d\n", mode);
3652 return p - buf + 1; 3650 return p - buf + 1;
3653} 3651}
3654 3652
@@ -3970,6 +3968,9 @@ static int iwl3945_setup_mac(struct iwl_priv *priv)
3970 3968
3971 hw->wiphy->custom_regulatory = true; 3969 hw->wiphy->custom_regulatory = true;
3972 3970
3971 /* Firmware does not support this */
3972 hw->wiphy->disable_beacon_hints = true;
3973
3973 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; 3974 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3974 /* we create the 802.11 header and a zero-length SSID element */ 3975 /* we create the 802.11 header and a zero-length SSID element */
3975 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2; 3976 hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
@@ -4020,10 +4021,10 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
4020 SET_IEEE80211_DEV(hw, &pdev->dev); 4021 SET_IEEE80211_DEV(hw, &pdev->dev);
4021 4022
4022 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) || 4023 if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
4023 (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) { 4024 (iwl3945_mod_params.num_of_queues < IWL39_MIN_NUM_QUEUES)) {
4024 IWL_ERR(priv, 4025 IWL_ERR(priv,
4025 "invalid queues_num, should be between %d and %d\n", 4026 "invalid queues_num, should be between %d and %d\n",
4026 IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES); 4027 IWL39_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
4027 err = -EINVAL; 4028 err = -EINVAL;
4028 goto out_ieee80211_free_hw; 4029 goto out_ieee80211_free_hw;
4029 } 4030 }
diff --git a/drivers/net/wireless/iwmc3200wifi/commands.c b/drivers/net/wireless/iwmc3200wifi/commands.c
index 834a7f544e5d..e2334d123599 100644
--- a/drivers/net/wireless/iwmc3200wifi/commands.c
+++ b/drivers/net/wireless/iwmc3200wifi/commands.c
@@ -220,6 +220,7 @@ int iwm_store_rxiq_calib_result(struct iwm_priv *iwm)
220 eeprom_rxiq = iwm_eeprom_access(iwm, IWM_EEPROM_CALIB_RXIQ); 220 eeprom_rxiq = iwm_eeprom_access(iwm, IWM_EEPROM_CALIB_RXIQ);
221 if (IS_ERR(eeprom_rxiq)) { 221 if (IS_ERR(eeprom_rxiq)) {
222 IWM_ERR(iwm, "Couldn't access EEPROM RX IQ entry\n"); 222 IWM_ERR(iwm, "Couldn't access EEPROM RX IQ entry\n");
223 kfree(rxiq);
223 return PTR_ERR(eeprom_rxiq); 224 return PTR_ERR(eeprom_rxiq);
224 } 225 }
225 226
diff --git a/drivers/net/wireless/iwmc3200wifi/netdev.c b/drivers/net/wireless/iwmc3200wifi/netdev.c
index aaa20c6885c8..bf294e41753b 100644
--- a/drivers/net/wireless/iwmc3200wifi/netdev.c
+++ b/drivers/net/wireless/iwmc3200wifi/netdev.c
@@ -106,10 +106,8 @@ void *iwm_if_alloc(int sizeof_bus, struct device *dev,
106 int ret = 0; 106 int ret = 0;
107 107
108 wdev = iwm_wdev_alloc(sizeof_bus, dev); 108 wdev = iwm_wdev_alloc(sizeof_bus, dev);
109 if (!wdev) { 109 if (IS_ERR(wdev))
110 dev_err(dev, "no memory for wireless device instance\n"); 110 return wdev;
111 return ERR_PTR(-ENOMEM);
112 }
113 111
114 iwm = wdev_to_iwm(wdev); 112 iwm = wdev_to_iwm(wdev);
115 iwm->bus_ops = if_ops; 113 iwm->bus_ops = if_ops;
@@ -151,8 +149,8 @@ void iwm_if_free(struct iwm_priv *iwm)
151 return; 149 return;
152 150
153 free_netdev(iwm_to_ndev(iwm)); 151 free_netdev(iwm_to_ndev(iwm));
154 iwm_wdev_free(iwm);
155 iwm_priv_deinit(iwm); 152 iwm_priv_deinit(iwm);
153 iwm_wdev_free(iwm);
156} 154}
157 155
158int iwm_if_add(struct iwm_priv *iwm) 156int iwm_if_add(struct iwm_priv *iwm)
diff --git a/drivers/net/wireless/libertas/11d.c b/drivers/net/wireless/libertas/11d.c
index 9a5408e7d94a..5c6968101f0d 100644
--- a/drivers/net/wireless/libertas/11d.c
+++ b/drivers/net/wireless/libertas/11d.c
@@ -47,7 +47,7 @@ static u8 lbs_region_2_code(u8 *region)
47{ 47{
48 u8 i; 48 u8 i;
49 49
50 for (i = 0; region[i] && i < COUNTRY_CODE_LEN; i++) 50 for (i = 0; i < COUNTRY_CODE_LEN && region[i]; i++)
51 region[i] = toupper(region[i]); 51 region[i] = toupper(region[i]);
52 52
53 for (i = 0; i < ARRAY_SIZE(region_code_mapping); i++) { 53 for (i = 0; i < ARRAY_SIZE(region_code_mapping); i++) {
diff --git a/drivers/net/wireless/libertas/assoc.c b/drivers/net/wireless/libertas/assoc.c
index b9b374119033..d6997371c27e 100644
--- a/drivers/net/wireless/libertas/assoc.c
+++ b/drivers/net/wireless/libertas/assoc.c
@@ -1,6 +1,7 @@
1/* Copyright (C) 2006, Red Hat, Inc. */ 1/* Copyright (C) 2006, Red Hat, Inc. */
2 2
3#include <linux/types.h> 3#include <linux/types.h>
4#include <linux/kernel.h>
4#include <linux/etherdevice.h> 5#include <linux/etherdevice.h>
5#include <linux/ieee80211.h> 6#include <linux/ieee80211.h>
6#include <linux/if_arp.h> 7#include <linux/if_arp.h>
@@ -43,21 +44,21 @@ static int get_common_rates(struct lbs_private *priv,
43 u16 *rates_size) 44 u16 *rates_size)
44{ 45{
45 u8 *card_rates = lbs_bg_rates; 46 u8 *card_rates = lbs_bg_rates;
46 size_t num_card_rates = sizeof(lbs_bg_rates);
47 int ret = 0, i, j; 47 int ret = 0, i, j;
48 u8 tmp[30]; 48 u8 tmp[(ARRAY_SIZE(lbs_bg_rates) - 1) * (*rates_size - 1)];
49 size_t tmp_size = 0; 49 size_t tmp_size = 0;
50 50
51 /* For each rate in card_rates that exists in rate1, copy to tmp */ 51 /* For each rate in card_rates that exists in rate1, copy to tmp */
52 for (i = 0; card_rates[i] && (i < num_card_rates); i++) { 52 for (i = 0; i < ARRAY_SIZE(lbs_bg_rates) && card_rates[i]; i++) {
53 for (j = 0; rates[j] && (j < *rates_size); j++) { 53 for (j = 0; j < *rates_size && rates[j]; j++) {
54 if (rates[j] == card_rates[i]) 54 if (rates[j] == card_rates[i])
55 tmp[tmp_size++] = card_rates[i]; 55 tmp[tmp_size++] = card_rates[i];
56 } 56 }
57 } 57 }
58 58
59 lbs_deb_hex(LBS_DEB_JOIN, "AP rates ", rates, *rates_size); 59 lbs_deb_hex(LBS_DEB_JOIN, "AP rates ", rates, *rates_size);
60 lbs_deb_hex(LBS_DEB_JOIN, "card rates ", card_rates, num_card_rates); 60 lbs_deb_hex(LBS_DEB_JOIN, "card rates ", card_rates,
61 ARRAY_SIZE(lbs_bg_rates));
61 lbs_deb_hex(LBS_DEB_JOIN, "common rates", tmp, tmp_size); 62 lbs_deb_hex(LBS_DEB_JOIN, "common rates", tmp, tmp_size);
62 lbs_deb_join("TX data rate 0x%02x\n", priv->cur_rate); 63 lbs_deb_join("TX data rate 0x%02x\n", priv->cur_rate);
63 64
@@ -69,10 +70,7 @@ static int get_common_rates(struct lbs_private *priv,
69 lbs_pr_alert("Previously set fixed data rate %#x isn't " 70 lbs_pr_alert("Previously set fixed data rate %#x isn't "
70 "compatible with the network.\n", priv->cur_rate); 71 "compatible with the network.\n", priv->cur_rate);
71 ret = -1; 72 ret = -1;
72 goto done;
73 } 73 }
74 ret = 0;
75
76done: 74done:
77 memset(rates, 0, *rates_size); 75 memset(rates, 0, *rates_size);
78 *rates_size = min_t(int, tmp_size, *rates_size); 76 *rates_size = min_t(int, tmp_size, *rates_size);
@@ -322,7 +320,7 @@ static int lbs_associate(struct lbs_private *priv,
322 rates = (struct mrvl_ie_rates_param_set *) pos; 320 rates = (struct mrvl_ie_rates_param_set *) pos;
323 rates->header.type = cpu_to_le16(TLV_TYPE_RATES); 321 rates->header.type = cpu_to_le16(TLV_TYPE_RATES);
324 memcpy(&rates->rates, &bss->rates, MAX_RATES); 322 memcpy(&rates->rates, &bss->rates, MAX_RATES);
325 tmplen = MAX_RATES; 323 tmplen = min_t(u16, ARRAY_SIZE(rates->rates), MAX_RATES);
326 if (get_common_rates(priv, rates->rates, &tmplen)) { 324 if (get_common_rates(priv, rates->rates, &tmplen)) {
327 ret = -1; 325 ret = -1;
328 goto done; 326 goto done;
@@ -598,7 +596,7 @@ static int lbs_adhoc_join(struct lbs_private *priv,
598 596
599 /* Copy Data rates from the rates recorded in scan response */ 597 /* Copy Data rates from the rates recorded in scan response */
600 memset(cmd.bss.rates, 0, sizeof(cmd.bss.rates)); 598 memset(cmd.bss.rates, 0, sizeof(cmd.bss.rates));
601 ratesize = min_t(u16, sizeof(cmd.bss.rates), MAX_RATES); 599 ratesize = min_t(u16, ARRAY_SIZE(cmd.bss.rates), MAX_RATES);
602 memcpy(cmd.bss.rates, bss->rates, ratesize); 600 memcpy(cmd.bss.rates, bss->rates, ratesize);
603 if (get_common_rates(priv, cmd.bss.rates, &ratesize)) { 601 if (get_common_rates(priv, cmd.bss.rates, &ratesize)) {
604 lbs_deb_join("ADHOC_JOIN: get_common_rates returned error.\n"); 602 lbs_deb_join("ADHOC_JOIN: get_common_rates returned error.\n");
diff --git a/drivers/net/wireless/libertas/cmd.c b/drivers/net/wireless/libertas/cmd.c
index 01db705a38ec..685098148e10 100644
--- a/drivers/net/wireless/libertas/cmd.c
+++ b/drivers/net/wireless/libertas/cmd.c
@@ -135,8 +135,14 @@ int lbs_update_hw_spec(struct lbs_private *priv)
135 /* Clamp region code to 8-bit since FW spec indicates that it should 135 /* Clamp region code to 8-bit since FW spec indicates that it should
136 * only ever be 8-bit, even though the field size is 16-bit. Some firmware 136 * only ever be 8-bit, even though the field size is 16-bit. Some firmware
137 * returns non-zero high 8 bits here. 137 * returns non-zero high 8 bits here.
138 *
139 * Firmware version 4.0.102 used in CF8381 has region code shifted. We
140 * need to check for this problem and handle it properly.
138 */ 141 */
139 priv->regioncode = le16_to_cpu(cmd.regioncode) & 0xFF; 142 if (MRVL_FW_MAJOR_REV(priv->fwrelease) == MRVL_FW_V4)
143 priv->regioncode = (le16_to_cpu(cmd.regioncode) >> 8) & 0xFF;
144 else
145 priv->regioncode = le16_to_cpu(cmd.regioncode) & 0xFF;
140 146
141 for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) { 147 for (i = 0; i < MRVDRV_MAX_REGION_CODE; i++) {
142 /* use the region code to search for the index */ 148 /* use the region code to search for the index */
diff --git a/drivers/net/wireless/libertas/defs.h b/drivers/net/wireless/libertas/defs.h
index 48da157d6cda..72f3479a4d70 100644
--- a/drivers/net/wireless/libertas/defs.h
+++ b/drivers/net/wireless/libertas/defs.h
@@ -234,6 +234,8 @@ static inline void lbs_deb_hex(unsigned int grp, const char *prompt, u8 *buf, in
234/** Mesh enable bit in FW capability */ 234/** Mesh enable bit in FW capability */
235#define MESH_CAPINFO_ENABLE_MASK (1<<16) 235#define MESH_CAPINFO_ENABLE_MASK (1<<16)
236 236
237/** FW definition from Marvell v4 */
238#define MRVL_FW_V4 (0x04)
237/** FW definition from Marvell v5 */ 239/** FW definition from Marvell v5 */
238#define MRVL_FW_V5 (0x05) 240#define MRVL_FW_V5 (0x05)
239/** FW definition from Marvell v10 */ 241/** FW definition from Marvell v10 */
diff --git a/drivers/net/wireless/libertas/scan.c b/drivers/net/wireless/libertas/scan.c
index 601b54249677..6c95af3023cc 100644
--- a/drivers/net/wireless/libertas/scan.c
+++ b/drivers/net/wireless/libertas/scan.c
@@ -5,6 +5,7 @@
5 * for sending scan commands to the firmware. 5 * for sending scan commands to the firmware.
6 */ 6 */
7#include <linux/types.h> 7#include <linux/types.h>
8#include <linux/kernel.h>
8#include <linux/etherdevice.h> 9#include <linux/etherdevice.h>
9#include <linux/if_arp.h> 10#include <linux/if_arp.h>
10#include <asm/unaligned.h> 11#include <asm/unaligned.h>
@@ -876,7 +877,7 @@ static inline char *lbs_translate_scan(struct lbs_private *priv,
876 iwe.u.bitrate.disabled = 0; 877 iwe.u.bitrate.disabled = 0;
877 iwe.u.bitrate.value = 0; 878 iwe.u.bitrate.value = 0;
878 879
879 for (j = 0; bss->rates[j] && (j < sizeof(bss->rates)); j++) { 880 for (j = 0; j < ARRAY_SIZE(bss->rates) && bss->rates[j]; j++) {
880 /* Bit rate given in 500 kb/s units */ 881 /* Bit rate given in 500 kb/s units */
881 iwe.u.bitrate.value = bss->rates[j] * 500000; 882 iwe.u.bitrate.value = bss->rates[j] * 500000;
882 current_val = iwe_stream_add_value(info, start, current_val, 883 current_val = iwe_stream_add_value(info, start, current_val,
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index a111bda392e2..7916ca3f84c8 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -709,7 +709,7 @@ static const struct ieee80211_ops mac80211_hwsim_ops =
709static void mac80211_hwsim_free(void) 709static void mac80211_hwsim_free(void)
710{ 710{
711 struct list_head tmplist, *i, *tmp; 711 struct list_head tmplist, *i, *tmp;
712 struct mac80211_hwsim_data *data; 712 struct mac80211_hwsim_data *data, *tmpdata;
713 713
714 INIT_LIST_HEAD(&tmplist); 714 INIT_LIST_HEAD(&tmplist);
715 715
@@ -718,7 +718,7 @@ static void mac80211_hwsim_free(void)
718 list_move(i, &tmplist); 718 list_move(i, &tmplist);
719 spin_unlock_bh(&hwsim_radio_lock); 719 spin_unlock_bh(&hwsim_radio_lock);
720 720
721 list_for_each_entry(data, &tmplist, list) { 721 list_for_each_entry_safe(data, tmpdata, &tmplist, list) {
722 debugfs_remove(data->debugfs_group); 722 debugfs_remove(data->debugfs_group);
723 debugfs_remove(data->debugfs_ps); 723 debugfs_remove(data->debugfs_ps);
724 debugfs_remove(data->debugfs); 724 debugfs_remove(data->debugfs);
@@ -1167,8 +1167,8 @@ static void __exit exit_mac80211_hwsim(void)
1167{ 1167{
1168 printk(KERN_DEBUG "mac80211_hwsim: unregister radios\n"); 1168 printk(KERN_DEBUG "mac80211_hwsim: unregister radios\n");
1169 1169
1170 unregister_netdev(hwsim_mon);
1171 mac80211_hwsim_free(); 1170 mac80211_hwsim_free();
1171 unregister_netdev(hwsim_mon);
1172} 1172}
1173 1173
1174 1174
diff --git a/drivers/net/wireless/p54/p54spi.c b/drivers/net/wireless/p54/p54spi.c
index 83116baeb110..72c7dbd39d0a 100644
--- a/drivers/net/wireless/p54/p54spi.c
+++ b/drivers/net/wireless/p54/p54spi.c
@@ -635,7 +635,7 @@ static int __devinit p54spi_probe(struct spi_device *spi)
635 635
636 hw = p54_init_common(sizeof(*priv)); 636 hw = p54_init_common(sizeof(*priv));
637 if (!hw) { 637 if (!hw) {
638 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw"); 638 dev_err(&spi->dev, "could not alloc ieee80211_hw");
639 return -ENOMEM; 639 return -ENOMEM;
640 } 640 }
641 641
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index 66daf68ff0ee..ce75426764a1 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -1550,7 +1550,9 @@ static int rt2500usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1550 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg); 1550 rt2500usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1551 rt2x00_set_chip(rt2x00dev, RT2570, value, reg); 1551 rt2x00_set_chip(rt2x00dev, RT2570, value, reg);
1552 1552
1553 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0)) { 1553 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x000ffff0, 0) ||
1554 rt2x00_check_rev(&rt2x00dev->chip, 0x0000000f, 0)) {
1555
1554 ERROR(rt2x00dev, "Invalid RT chipset detected.\n"); 1556 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1555 return -ENODEV; 1557 return -ENODEV;
1556 } 1558 }
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c
index b44253592243..cf9f899fe0e6 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_leds.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c
@@ -208,11 +208,12 @@ void rtl8187_leds_exit(struct ieee80211_hw *dev)
208{ 208{
209 struct rtl8187_priv *priv = dev->priv; 209 struct rtl8187_priv *priv = dev->priv;
210 210
211 rtl8187_unregister_led(&priv->led_tx);
212 /* turn the LED off before exiting */ 211 /* turn the LED off before exiting */
213 queue_delayed_work(dev->workqueue, &priv->led_off, 0); 212 queue_delayed_work(dev->workqueue, &priv->led_off, 0);
214 cancel_delayed_work_sync(&priv->led_off); 213 cancel_delayed_work_sync(&priv->led_off);
214 cancel_delayed_work_sync(&priv->led_on);
215 rtl8187_unregister_led(&priv->led_rx); 215 rtl8187_unregister_led(&priv->led_rx);
216 rtl8187_unregister_led(&priv->led_tx);
216} 217}
217#endif /* def CONFIG_RTL8187_LED */ 218#endif /* def CONFIG_RTL8187_LED */
218 219
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index 40b07b988224..3bd3c779fff3 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -698,7 +698,7 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length)
698 && !mac->pass_ctrl) 698 && !mac->pass_ctrl)
699 return 0; 699 return 0;
700 700
701 fc = *(__le16 *)buffer; 701 fc = get_unaligned((__le16*)buffer);
702 need_padding = ieee80211_is_data_qos(fc) ^ ieee80211_has_a4(fc); 702 need_padding = ieee80211_is_data_qos(fc) ^ ieee80211_has_a4(fc);
703 703
704 skb = dev_alloc_skb(length + (need_padding ? 2 : 0)); 704 skb = dev_alloc_skb(length + (need_padding ? 2 : 0));
diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c
index aee967d7f760..bacaa536fd51 100644
--- a/drivers/of/of_mdio.c
+++ b/drivers/of/of_mdio.c
@@ -9,6 +9,10 @@
9 * out of the OpenFirmware device tree and using it to populate an mii_bus. 9 * out of the OpenFirmware device tree and using it to populate an mii_bus.
10 */ 10 */
11 11
12#include <linux/kernel.h>
13#include <linux/device.h>
14#include <linux/netdevice.h>
15#include <linux/err.h>
12#include <linux/phy.h> 16#include <linux/phy.h>
13#include <linux/of.h> 17#include <linux/of.h>
14#include <linux/of_mdio.h> 18#include <linux/of_mdio.h>
@@ -137,3 +141,41 @@ struct phy_device *of_phy_connect(struct net_device *dev,
137 return phy_connect_direct(dev, phy, hndlr, flags, iface) ? NULL : phy; 141 return phy_connect_direct(dev, phy, hndlr, flags, iface) ? NULL : phy;
138} 142}
139EXPORT_SYMBOL(of_phy_connect); 143EXPORT_SYMBOL(of_phy_connect);
144
145/**
146 * of_phy_connect_fixed_link - Parse fixed-link property and return a dummy phy
147 * @dev: pointer to net_device claiming the phy
148 * @hndlr: Link state callback for the network device
149 * @iface: PHY data interface type
150 *
151 * This function is a temporary stop-gap and will be removed soon. It is
152 * only to support the fs_enet, ucc_geth and gianfar Ethernet drivers. Do
153 * not call this function from new drivers.
154 */
155struct phy_device *of_phy_connect_fixed_link(struct net_device *dev,
156 void (*hndlr)(struct net_device *),
157 phy_interface_t iface)
158{
159 struct device_node *net_np;
160 char bus_id[MII_BUS_ID_SIZE + 3];
161 struct phy_device *phy;
162 const u32 *phy_id;
163 int sz;
164
165 if (!dev->dev.parent)
166 return NULL;
167
168 net_np = dev_archdata_get_node(&dev->dev.parent->archdata);
169 if (!net_np)
170 return NULL;
171
172 phy_id = of_get_property(net_np, "fixed-link", &sz);
173 if (!phy_id || sz < sizeof(*phy_id))
174 return NULL;
175
176 sprintf(bus_id, PHY_ID_FMT, "0", phy_id[0]);
177
178 phy = phy_connect(dev, bus_id, hndlr, 0, iface);
179 return IS_ERR(phy) ? NULL : phy;
180}
181EXPORT_SYMBOL(of_phy_connect_fixed_link);
diff --git a/drivers/parisc/ccio-dma.c b/drivers/parisc/ccio-dma.c
index 0f0e0b919ef4..a45b0c0d574e 100644
--- a/drivers/parisc/ccio-dma.c
+++ b/drivers/parisc/ccio-dma.c
@@ -70,7 +70,6 @@
70#undef CCIO_COLLECT_STATS 70#undef CCIO_COLLECT_STATS
71#endif 71#endif
72 72
73#include <linux/proc_fs.h>
74#include <asm/runway.h> /* for proc_runway_root */ 73#include <asm/runway.h> /* for proc_runway_root */
75 74
76#ifdef DEBUG_CCIO_INIT 75#ifdef DEBUG_CCIO_INIT
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index c590974e9815..d69bde6a2343 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -614,7 +614,7 @@ dino_fixup_bus(struct pci_bus *bus)
614 dev_name(&bus->self->dev), i, 614 dev_name(&bus->self->dev), i,
615 bus->self->resource[i].start, 615 bus->self->resource[i].start,
616 bus->self->resource[i].end); 616 bus->self->resource[i].end);
617 pci_assign_resource(bus->self, i); 617 WARN_ON(pci_assign_resource(bus->self, i));
618 DBG("DEBUG %s after assign %d [0x%lx,0x%lx]\n", 618 DBG("DEBUG %s after assign %d [0x%lx,0x%lx]\n",
619 dev_name(&bus->self->dev), i, 619 dev_name(&bus->self->dev), i,
620 bus->self->resource[i].start, 620 bus->self->resource[i].start,
diff --git a/drivers/parisc/eisa_eeprom.c b/drivers/parisc/eisa_eeprom.c
index 685d94e69d44..8c0b26e9b98a 100644
--- a/drivers/parisc/eisa_eeprom.c
+++ b/drivers/parisc/eisa_eeprom.c
@@ -55,7 +55,7 @@ static ssize_t eisa_eeprom_read(struct file * file,
55 ssize_t ret; 55 ssize_t ret;
56 int i; 56 int i;
57 57
58 if (*ppos >= HPEE_MAX_LENGTH) 58 if (*ppos < 0 || *ppos >= HPEE_MAX_LENGTH)
59 return 0; 59 return 0;
60 60
61 count = *ppos + count < HPEE_MAX_LENGTH ? count : HPEE_MAX_LENGTH - *ppos; 61 count = *ppos + count < HPEE_MAX_LENGTH ? count : HPEE_MAX_LENGTH - *ppos;
diff --git a/drivers/parisc/hppb.c b/drivers/parisc/hppb.c
index 13856415b432..815db175d427 100644
--- a/drivers/parisc/hppb.c
+++ b/drivers/parisc/hppb.c
@@ -62,7 +62,8 @@ static int hppb_probe(struct parisc_device *dev)
62 } 62 }
63 card = card->next; 63 card = card->next;
64 } 64 }
65 printk(KERN_INFO "Found GeckoBoa at 0x%x\n", dev->hpa.start); 65 printk(KERN_INFO "Found GeckoBoa at 0x%llx\n",
66 (unsigned long long) dev->hpa.start);
66 67
67 card->hpa = dev->hpa.start; 68 card->hpa = dev->hpa.start;
68 card->mmio_region.name = "HP-PB Bus"; 69 card->mmio_region.name = "HP-PB Bus";
@@ -73,8 +74,10 @@ static int hppb_probe(struct parisc_device *dev)
73 74
74 status = ccio_request_resource(dev, &card->mmio_region); 75 status = ccio_request_resource(dev, &card->mmio_region);
75 if(status < 0) { 76 if(status < 0) {
76 printk(KERN_ERR "%s: failed to claim HP-PB bus space (%08x, %08x)\n", 77 printk(KERN_ERR "%s: failed to claim HP-PB "
77 __FILE__, card->mmio_region.start, card->mmio_region.end); 78 "bus space (0x%08llx, 0x%08llx)\n",
79 __FILE__, (unsigned long long) card->mmio_region.start,
80 (unsigned long long) card->mmio_region.end);
78 } 81 }
79 82
80 return 0; 83 return 0;
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c
index ede614616f8e..3aeb3279c92a 100644
--- a/drivers/parisc/lba_pci.c
+++ b/drivers/parisc/lba_pci.c
@@ -992,7 +992,7 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev)
992 return; 992 return;
993 993
994 io_pdc_cell = kzalloc(sizeof(pdc_pat_cell_mod_maddr_block_t), GFP_KERNEL); 994 io_pdc_cell = kzalloc(sizeof(pdc_pat_cell_mod_maddr_block_t), GFP_KERNEL);
995 if (!pa_pdc_cell) { 995 if (!io_pdc_cell) {
996 kfree(pa_pdc_cell); 996 kfree(pa_pdc_cell);
997 return; 997 return;
998 } 998 }
diff --git a/drivers/parisc/pdc_stable.c b/drivers/parisc/pdc_stable.c
index f9f9a5f1bbd0..13a64bc081b6 100644
--- a/drivers/parisc/pdc_stable.c
+++ b/drivers/parisc/pdc_stable.c
@@ -370,7 +370,7 @@ pdcspath_layer_read(struct pdcspath_entry *entry, char *buf)
370 if (!i) /* entry is not ready */ 370 if (!i) /* entry is not ready */
371 return -ENODATA; 371 return -ENODATA;
372 372
373 for (i = 0; devpath->layers[i] && (likely(i < 6)); i++) 373 for (i = 0; i < 6 && devpath->layers[i]; i++)
374 out += sprintf(out, "%u ", devpath->layers[i]); 374 out += sprintf(out, "%u ", devpath->layers[i]);
375 375
376 out += sprintf(out, "\n"); 376 out += sprintf(out, "\n");
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index a4494d78e7c2..8aebe1e9d3d6 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -90,11 +90,10 @@ static struct hotplug_slot_ops sn_hotplug_slot_ops = {
90 90
91static DEFINE_MUTEX(sn_hotplug_mutex); 91static DEFINE_MUTEX(sn_hotplug_mutex);
92 92
93static ssize_t path_show (struct hotplug_slot *bss_hotplug_slot, 93static ssize_t path_show(struct pci_slot *pci_slot, char *buf)
94 char *buf)
95{ 94{
96 int retval = -ENOENT; 95 int retval = -ENOENT;
97 struct slot *slot = bss_hotplug_slot->private; 96 struct slot *slot = pci_slot->hotplug->private;
98 97
99 if (!slot) 98 if (!slot)
100 return retval; 99 return retval;
@@ -103,7 +102,7 @@ static ssize_t path_show (struct hotplug_slot *bss_hotplug_slot,
103 return retval; 102 return retval;
104} 103}
105 104
106static struct hotplug_slot_attribute sn_slot_path_attr = __ATTR_RO(path); 105static struct pci_slot_attribute sn_slot_path_attr = __ATTR_RO(path);
107 106
108static int sn_pci_slot_valid(struct pci_bus *pci_bus, int device) 107static int sn_pci_slot_valid(struct pci_bus *pci_bus, int device)
109{ 108{
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index ebc9b8dca881..2314ad7ee5fe 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -1505,7 +1505,6 @@ static int domain_context_mapping_one(struct dmar_domain *domain, int segment,
1505 } 1505 }
1506 1506
1507 set_bit(num, iommu->domain_ids); 1507 set_bit(num, iommu->domain_ids);
1508 set_bit(iommu->seq_id, &domain->iommu_bmp);
1509 iommu->domains[num] = domain; 1508 iommu->domains[num] = domain;
1510 id = num; 1509 id = num;
1511 } 1510 }
@@ -1648,6 +1647,14 @@ static int domain_context_mapped(struct pci_dev *pdev)
1648 tmp->devfn); 1647 tmp->devfn);
1649} 1648}
1650 1649
1650/* Returns a number of VTD pages, but aligned to MM page size */
1651static inline unsigned long aligned_nrpages(unsigned long host_addr,
1652 size_t size)
1653{
1654 host_addr &= ~PAGE_MASK;
1655 return PAGE_ALIGN(host_addr + size) >> VTD_PAGE_SHIFT;
1656}
1657
1651static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, 1658static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
1652 struct scatterlist *sg, unsigned long phys_pfn, 1659 struct scatterlist *sg, unsigned long phys_pfn,
1653 unsigned long nr_pages, int prot) 1660 unsigned long nr_pages, int prot)
@@ -1675,7 +1682,7 @@ static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn,
1675 uint64_t tmp; 1682 uint64_t tmp;
1676 1683
1677 if (!sg_res) { 1684 if (!sg_res) {
1678 sg_res = (sg->offset + sg->length + VTD_PAGE_SIZE - 1) >> VTD_PAGE_SHIFT; 1685 sg_res = aligned_nrpages(sg->offset, sg->length);
1679 sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + sg->offset; 1686 sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + sg->offset;
1680 sg->dma_length = sg->length; 1687 sg->dma_length = sg->length;
1681 pteval = page_to_phys(sg_page(sg)) | prot; 1688 pteval = page_to_phys(sg_page(sg)) | prot;
@@ -2415,14 +2422,6 @@ error:
2415 return ret; 2422 return ret;
2416} 2423}
2417 2424
2418/* Returns a number of VTD pages, but aligned to MM page size */
2419static inline unsigned long aligned_nrpages(unsigned long host_addr,
2420 size_t size)
2421{
2422 host_addr &= ~PAGE_MASK;
2423 return PAGE_ALIGN(host_addr + size) >> VTD_PAGE_SHIFT;
2424}
2425
2426/* This takes a number of _MM_ pages, not VTD pages */ 2425/* This takes a number of _MM_ pages, not VTD pages */
2427static struct iova *intel_alloc_iova(struct device *dev, 2426static struct iova *intel_alloc_iova(struct device *dev,
2428 struct dmar_domain *domain, 2427 struct dmar_domain *domain,
@@ -2551,6 +2550,7 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr,
2551 int prot = 0; 2550 int prot = 0;
2552 int ret; 2551 int ret;
2553 struct intel_iommu *iommu; 2552 struct intel_iommu *iommu;
2553 unsigned long paddr_pfn = paddr >> PAGE_SHIFT;
2554 2554
2555 BUG_ON(dir == DMA_NONE); 2555 BUG_ON(dir == DMA_NONE);
2556 2556
@@ -2585,7 +2585,7 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr,
2585 * is not a big problem 2585 * is not a big problem
2586 */ 2586 */
2587 ret = domain_pfn_mapping(domain, mm_to_dma_pfn(iova->pfn_lo), 2587 ret = domain_pfn_mapping(domain, mm_to_dma_pfn(iova->pfn_lo),
2588 paddr >> VTD_PAGE_SHIFT, size, prot); 2588 mm_to_dma_pfn(paddr_pfn), size, prot);
2589 if (ret) 2589 if (ret)
2590 goto error; 2590 goto error;
2591 2591
@@ -2875,7 +2875,7 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int ne
2875 2875
2876 start_vpfn = mm_to_dma_pfn(iova->pfn_lo); 2876 start_vpfn = mm_to_dma_pfn(iova->pfn_lo);
2877 2877
2878 ret = domain_sg_mapping(domain, start_vpfn, sglist, mm_to_dma_pfn(size), prot); 2878 ret = domain_sg_mapping(domain, start_vpfn, sglist, size, prot);
2879 if (unlikely(ret)) { 2879 if (unlikely(ret)) {
2880 /* clear the page */ 2880 /* clear the page */
2881 dma_pte_clear_range(domain, start_vpfn, 2881 dma_pte_clear_range(domain, start_vpfn,
@@ -3408,6 +3408,7 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width)
3408 3408
3409 domain->iommu_count = 0; 3409 domain->iommu_count = 0;
3410 domain->iommu_coherency = 0; 3410 domain->iommu_coherency = 0;
3411 domain->iommu_snooping = 0;
3411 domain->max_addr = 0; 3412 domain->max_addr = 0;
3412 3413
3413 /* always allocate the top pgd */ 3414 /* always allocate the top pgd */
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index b711fb7181e2..1898c7b47907 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -100,16 +100,16 @@ int pci_claim_resource(struct pci_dev *dev, int resource)
100{ 100{
101 struct resource *res = &dev->resource[resource]; 101 struct resource *res = &dev->resource[resource];
102 struct resource *root; 102 struct resource *root;
103 char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";
104 int err; 103 int err;
105 104
106 root = pci_find_parent_resource(dev, res); 105 root = pci_find_parent_resource(dev, res);
107 106
108 err = -EINVAL; 107 err = -EINVAL;
109 if (root != NULL) 108 if (root != NULL)
110 err = insert_resource(root, res); 109 err = request_resource(root, res);
111 110
112 if (err) { 111 if (err) {
112 const char *dtype = resource < PCI_BRIDGE_RESOURCES ? "device" : "bridge";
113 dev_err(&dev->dev, "BAR %d: %s of %s %pR\n", 113 dev_err(&dev->dev, "BAR %d: %s of %s %pR\n",
114 resource, 114 resource,
115 root ? "address space collision on" : 115 root ? "address space collision on" :
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 46dad12f952f..77c6097ced80 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -277,31 +277,6 @@ config THINKPAD_ACPI_UNSAFE_LEDS
277 Say N here, unless you are building a kernel for your own 277 Say N here, unless you are building a kernel for your own
278 use, and need to control the important firmware LEDs. 278 use, and need to control the important firmware LEDs.
279 279
280config THINKPAD_ACPI_DOCK
281 bool "Legacy Docking Station Support"
282 depends on THINKPAD_ACPI
283 depends on ACPI_DOCK=n
284 default n
285 ---help---
286 Allows the thinkpad_acpi driver to handle docking station events.
287 This support was made obsolete by the generic ACPI docking station
288 support (CONFIG_ACPI_DOCK). It will allow locking and removing the
289 laptop from the docking station, but will not properly connect PCI
290 devices.
291
292 If you are not sure, say N here.
293
294config THINKPAD_ACPI_BAY
295 bool "Legacy Removable Bay Support"
296 depends on THINKPAD_ACPI
297 default y
298 ---help---
299 Allows the thinkpad_acpi driver to handle removable bays. It will
300 electrically disable the device in the bay, and also generate
301 notifications when the bay lever is ejected or inserted.
302
303 If you are not sure, say Y here.
304
305config THINKPAD_ACPI_VIDEO 280config THINKPAD_ACPI_VIDEO
306 bool "Video output control support" 281 bool "Video output control support"
307 depends on THINKPAD_ACPI 282 depends on THINKPAD_ACPI
diff --git a/drivers/platform/x86/acer-wmi.c b/drivers/platform/x86/acer-wmi.c
index be2fd6f91639..fb45f5ee8df1 100644
--- a/drivers/platform/x86/acer-wmi.c
+++ b/drivers/platform/x86/acer-wmi.c
@@ -973,7 +973,7 @@ static int acer_rfkill_set(void *data, bool blocked)
973{ 973{
974 acpi_status status; 974 acpi_status status;
975 u32 cap = (unsigned long)data; 975 u32 cap = (unsigned long)data;
976 status = set_u32(!!blocked, cap); 976 status = set_u32(!blocked, cap);
977 if (ACPI_FAILURE(status)) 977 if (ACPI_FAILURE(status))
978 return -ENODEV; 978 return -ENODEV;
979 return 0; 979 return 0;
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index ec560f16d720..222ffb892f22 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -143,6 +143,7 @@ struct eeepc_hotk {
143 struct rfkill *bluetooth_rfkill; 143 struct rfkill *bluetooth_rfkill;
144 struct rfkill *wwan3g_rfkill; 144 struct rfkill *wwan3g_rfkill;
145 struct hotplug_slot *hotplug_slot; 145 struct hotplug_slot *hotplug_slot;
146 struct work_struct hotplug_work;
146}; 147};
147 148
148/* The actual device the driver binds to */ 149/* The actual device the driver binds to */
@@ -660,7 +661,7 @@ static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot,
660 return 0; 661 return 0;
661} 662}
662 663
663static void eeepc_rfkill_hotplug(void) 664static void eeepc_hotplug_work(struct work_struct *work)
664{ 665{
665 struct pci_dev *dev; 666 struct pci_dev *dev;
666 struct pci_bus *bus = pci_find_bus(0, 1); 667 struct pci_bus *bus = pci_find_bus(0, 1);
@@ -701,7 +702,7 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data)
701 if (event != ACPI_NOTIFY_BUS_CHECK) 702 if (event != ACPI_NOTIFY_BUS_CHECK)
702 return; 703 return;
703 704
704 eeepc_rfkill_hotplug(); 705 schedule_work(&ehotk->hotplug_work);
705} 706}
706 707
707static void eeepc_hotk_notify(struct acpi_device *device, u32 event) 708static void eeepc_hotk_notify(struct acpi_device *device, u32 event)
@@ -892,7 +893,7 @@ static int eeepc_hotk_resume(struct acpi_device *device)
892 893
893 rfkill_set_sw_state(ehotk->wlan_rfkill, wlan != 1); 894 rfkill_set_sw_state(ehotk->wlan_rfkill, wlan != 1);
894 895
895 eeepc_rfkill_hotplug(); 896 schedule_work(&ehotk->hotplug_work);
896 } 897 }
897 898
898 if (ehotk->bluetooth_rfkill) 899 if (ehotk->bluetooth_rfkill)
@@ -1093,6 +1094,8 @@ static int eeepc_rfkill_init(struct device *dev)
1093{ 1094{
1094 int result = 0; 1095 int result = 0;
1095 1096
1097 INIT_WORK(&ehotk->hotplug_work, eeepc_hotplug_work);
1098
1096 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P6"); 1099 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P6");
1097 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P7"); 1100 eeepc_register_rfkill_notifier("\\_SB.PCI0.P0P7");
1098 1101
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index ca508564a181..a2ad53e15874 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -520,11 +520,13 @@ static int hp_wmi_resume_handler(struct platform_device *device)
520 * the input layer will only actually pass it on if the state 520 * the input layer will only actually pass it on if the state
521 * changed. 521 * changed.
522 */ 522 */
523 523 if (hp_wmi_input_dev) {
524 input_report_switch(hp_wmi_input_dev, SW_DOCK, hp_wmi_dock_state()); 524 input_report_switch(hp_wmi_input_dev, SW_DOCK,
525 input_report_switch(hp_wmi_input_dev, SW_TABLET_MODE, 525 hp_wmi_dock_state());
526 hp_wmi_tablet_state()); 526 input_report_switch(hp_wmi_input_dev, SW_TABLET_MODE,
527 input_sync(hp_wmi_input_dev); 527 hp_wmi_tablet_state());
528 input_sync(hp_wmi_input_dev);
529 }
528 530
529 return 0; 531 return 0;
530} 532}
diff --git a/drivers/platform/x86/thinkpad_acpi.c b/drivers/platform/x86/thinkpad_acpi.c
index a463fd72c495..e85600852502 100644
--- a/drivers/platform/x86/thinkpad_acpi.c
+++ b/drivers/platform/x86/thinkpad_acpi.c
@@ -239,12 +239,6 @@ struct ibm_init_struct {
239}; 239};
240 240
241static struct { 241static struct {
242#ifdef CONFIG_THINKPAD_ACPI_BAY
243 u32 bay_status:1;
244 u32 bay_eject:1;
245 u32 bay_status2:1;
246 u32 bay_eject2:1;
247#endif
248 u32 bluetooth:1; 242 u32 bluetooth:1;
249 u32 hotkey:1; 243 u32 hotkey:1;
250 u32 hotkey_mask:1; 244 u32 hotkey_mask:1;
@@ -589,18 +583,6 @@ static int acpi_ec_write(int i, u8 v)
589 return 1; 583 return 1;
590} 584}
591 585
592#if defined(CONFIG_THINKPAD_ACPI_DOCK) || defined(CONFIG_THINKPAD_ACPI_BAY)
593static int _sta(acpi_handle handle)
594{
595 int status;
596
597 if (!handle || !acpi_evalf(handle, &status, "_STA", "d"))
598 status = 0;
599
600 return status;
601}
602#endif
603
604static int issue_thinkpad_cmos_command(int cmos_cmd) 586static int issue_thinkpad_cmos_command(int cmos_cmd)
605{ 587{
606 if (!cmos_handle) 588 if (!cmos_handle)
@@ -784,6 +766,8 @@ static int dispatch_procfs_write(struct file *file,
784 766
785 if (!ibm || !ibm->write) 767 if (!ibm || !ibm->write)
786 return -EINVAL; 768 return -EINVAL;
769 if (count > PAGE_SIZE - 2)
770 return -EINVAL;
787 771
788 kernbuf = kmalloc(count + 2, GFP_KERNEL); 772 kernbuf = kmalloc(count + 2, GFP_KERNEL);
789 if (!kernbuf) 773 if (!kernbuf)
@@ -4442,293 +4426,6 @@ static struct ibm_struct light_driver_data = {
4442}; 4426};
4443 4427
4444/************************************************************************* 4428/*************************************************************************
4445 * Dock subdriver
4446 */
4447
4448#ifdef CONFIG_THINKPAD_ACPI_DOCK
4449
4450static void dock_notify(struct ibm_struct *ibm, u32 event);
4451static int dock_read(char *p);
4452static int dock_write(char *buf);
4453
4454TPACPI_HANDLE(dock, root, "\\_SB.GDCK", /* X30, X31, X40 */
4455 "\\_SB.PCI0.DOCK", /* 600e/x,770e,770x,A2xm/p,T20-22,X20-21 */
4456 "\\_SB.PCI0.PCI1.DOCK", /* all others */
4457 "\\_SB.PCI.ISA.SLCE", /* 570 */
4458 ); /* A21e,G4x,R30,R31,R32,R40,R40e,R50e */
4459
4460/* don't list other alternatives as we install a notify handler on the 570 */
4461TPACPI_HANDLE(pci, root, "\\_SB.PCI"); /* 570 */
4462
4463static const struct acpi_device_id ibm_pci_device_ids[] = {
4464 {PCI_ROOT_HID_STRING, 0},
4465 {"", 0},
4466};
4467
4468static struct tp_acpi_drv_struct ibm_dock_acpidriver[2] = {
4469 {
4470 .notify = dock_notify,
4471 .handle = &dock_handle,
4472 .type = ACPI_SYSTEM_NOTIFY,
4473 },
4474 {
4475 /* THIS ONE MUST NEVER BE USED FOR DRIVER AUTOLOADING.
4476 * We just use it to get notifications of dock hotplug
4477 * in very old thinkpads */
4478 .hid = ibm_pci_device_ids,
4479 .notify = dock_notify,
4480 .handle = &pci_handle,
4481 .type = ACPI_SYSTEM_NOTIFY,
4482 },
4483};
4484
4485static struct ibm_struct dock_driver_data[2] = {
4486 {
4487 .name = "dock",
4488 .read = dock_read,
4489 .write = dock_write,
4490 .acpi = &ibm_dock_acpidriver[0],
4491 },
4492 {
4493 .name = "dock",
4494 .acpi = &ibm_dock_acpidriver[1],
4495 },
4496};
4497
4498#define dock_docked() (_sta(dock_handle) & 1)
4499
4500static int __init dock_init(struct ibm_init_struct *iibm)
4501{
4502 vdbg_printk(TPACPI_DBG_INIT, "initializing dock subdriver\n");
4503
4504 TPACPI_ACPIHANDLE_INIT(dock);
4505
4506 vdbg_printk(TPACPI_DBG_INIT, "dock is %s\n",
4507 str_supported(dock_handle != NULL));
4508
4509 return (dock_handle)? 0 : 1;
4510}
4511
4512static int __init dock_init2(struct ibm_init_struct *iibm)
4513{
4514 int dock2_needed;
4515
4516 vdbg_printk(TPACPI_DBG_INIT, "initializing dock subdriver part 2\n");
4517
4518 if (dock_driver_data[0].flags.acpi_driver_registered &&
4519 dock_driver_data[0].flags.acpi_notify_installed) {
4520 TPACPI_ACPIHANDLE_INIT(pci);
4521 dock2_needed = (pci_handle != NULL);
4522 vdbg_printk(TPACPI_DBG_INIT,
4523 "dock PCI handler for the TP 570 is %s\n",
4524 str_supported(dock2_needed));
4525 } else {
4526 vdbg_printk(TPACPI_DBG_INIT,
4527 "dock subdriver part 2 not required\n");
4528 dock2_needed = 0;
4529 }
4530
4531 return (dock2_needed)? 0 : 1;
4532}
4533
4534static void dock_notify(struct ibm_struct *ibm, u32 event)
4535{
4536 int docked = dock_docked();
4537 int pci = ibm->acpi->hid && ibm->acpi->device &&
4538 acpi_match_device_ids(ibm->acpi->device, ibm_pci_device_ids);
4539 int data;
4540
4541 if (event == 1 && !pci) /* 570 */
4542 data = 1; /* button */
4543 else if (event == 1 && pci) /* 570 */
4544 data = 3; /* dock */
4545 else if (event == 3 && docked)
4546 data = 1; /* button */
4547 else if (event == 3 && !docked)
4548 data = 2; /* undock */
4549 else if (event == 0 && docked)
4550 data = 3; /* dock */
4551 else {
4552 printk(TPACPI_ERR "unknown dock event %d, status %d\n",
4553 event, _sta(dock_handle));
4554 data = 0; /* unknown */
4555 }
4556 acpi_bus_generate_proc_event(ibm->acpi->device, event, data);
4557 acpi_bus_generate_netlink_event(ibm->acpi->device->pnp.device_class,
4558 dev_name(&ibm->acpi->device->dev),
4559 event, data);
4560}
4561
4562static int dock_read(char *p)
4563{
4564 int len = 0;
4565 int docked = dock_docked();
4566
4567 if (!dock_handle)
4568 len += sprintf(p + len, "status:\t\tnot supported\n");
4569 else if (!docked)
4570 len += sprintf(p + len, "status:\t\tundocked\n");
4571 else {
4572 len += sprintf(p + len, "status:\t\tdocked\n");
4573 len += sprintf(p + len, "commands:\tdock, undock\n");
4574 }
4575
4576 return len;
4577}
4578
4579static int dock_write(char *buf)
4580{
4581 char *cmd;
4582
4583 if (!dock_docked())
4584 return -ENODEV;
4585
4586 while ((cmd = next_cmd(&buf))) {
4587 if (strlencmp(cmd, "undock") == 0) {
4588 if (!acpi_evalf(dock_handle, NULL, "_DCK", "vd", 0) ||
4589 !acpi_evalf(dock_handle, NULL, "_EJ0", "vd", 1))
4590 return -EIO;
4591 } else if (strlencmp(cmd, "dock") == 0) {
4592 if (!acpi_evalf(dock_handle, NULL, "_DCK", "vd", 1))
4593 return -EIO;
4594 } else
4595 return -EINVAL;
4596 }
4597
4598 return 0;
4599}
4600
4601#endif /* CONFIG_THINKPAD_ACPI_DOCK */
4602
4603/*************************************************************************
4604 * Bay subdriver
4605 */
4606
4607#ifdef CONFIG_THINKPAD_ACPI_BAY
4608
4609TPACPI_HANDLE(bay, root, "\\_SB.PCI.IDE.SECN.MAST", /* 570 */
4610 "\\_SB.PCI0.IDE0.IDES.IDSM", /* 600e/x, 770e, 770x */
4611 "\\_SB.PCI0.SATA.SCND.MSTR", /* T60, X60, Z60 */
4612 "\\_SB.PCI0.IDE0.SCND.MSTR", /* all others */
4613 ); /* A21e, R30, R31 */
4614TPACPI_HANDLE(bay_ej, bay, "_EJ3", /* 600e/x, A2xm/p, A3x */
4615 "_EJ0", /* all others */
4616 ); /* 570,A21e,G4x,R30,R31,R32,R40e,R50e */
4617TPACPI_HANDLE(bay2, root, "\\_SB.PCI0.IDE0.PRIM.SLAV", /* A3x, R32 */
4618 "\\_SB.PCI0.IDE0.IDEP.IDPS", /* 600e/x, 770e, 770x */
4619 ); /* all others */
4620TPACPI_HANDLE(bay2_ej, bay2, "_EJ3", /* 600e/x, 770e, A3x */
4621 "_EJ0", /* 770x */
4622 ); /* all others */
4623
4624static int __init bay_init(struct ibm_init_struct *iibm)
4625{
4626 vdbg_printk(TPACPI_DBG_INIT, "initializing bay subdriver\n");
4627
4628 TPACPI_ACPIHANDLE_INIT(bay);
4629 if (bay_handle)
4630 TPACPI_ACPIHANDLE_INIT(bay_ej);
4631 TPACPI_ACPIHANDLE_INIT(bay2);
4632 if (bay2_handle)
4633 TPACPI_ACPIHANDLE_INIT(bay2_ej);
4634
4635 tp_features.bay_status = bay_handle &&
4636 acpi_evalf(bay_handle, NULL, "_STA", "qv");
4637 tp_features.bay_status2 = bay2_handle &&
4638 acpi_evalf(bay2_handle, NULL, "_STA", "qv");
4639
4640 tp_features.bay_eject = bay_handle && bay_ej_handle &&
4641 (strlencmp(bay_ej_path, "_EJ0") == 0 || experimental);
4642 tp_features.bay_eject2 = bay2_handle && bay2_ej_handle &&
4643 (strlencmp(bay2_ej_path, "_EJ0") == 0 || experimental);
4644
4645 vdbg_printk(TPACPI_DBG_INIT,
4646 "bay 1: status %s, eject %s; bay 2: status %s, eject %s\n",
4647 str_supported(tp_features.bay_status),
4648 str_supported(tp_features.bay_eject),
4649 str_supported(tp_features.bay_status2),
4650 str_supported(tp_features.bay_eject2));
4651
4652 return (tp_features.bay_status || tp_features.bay_eject ||
4653 tp_features.bay_status2 || tp_features.bay_eject2)? 0 : 1;
4654}
4655
4656static void bay_notify(struct ibm_struct *ibm, u32 event)
4657{
4658 acpi_bus_generate_proc_event(ibm->acpi->device, event, 0);
4659 acpi_bus_generate_netlink_event(ibm->acpi->device->pnp.device_class,
4660 dev_name(&ibm->acpi->device->dev),
4661 event, 0);
4662}
4663
4664#define bay_occupied(b) (_sta(b##_handle) & 1)
4665
4666static int bay_read(char *p)
4667{
4668 int len = 0;
4669 int occupied = bay_occupied(bay);
4670 int occupied2 = bay_occupied(bay2);
4671 int eject, eject2;
4672
4673 len += sprintf(p + len, "status:\t\t%s\n",
4674 tp_features.bay_status ?
4675 (occupied ? "occupied" : "unoccupied") :
4676 "not supported");
4677 if (tp_features.bay_status2)
4678 len += sprintf(p + len, "status2:\t%s\n", occupied2 ?
4679 "occupied" : "unoccupied");
4680
4681 eject = tp_features.bay_eject && occupied;
4682 eject2 = tp_features.bay_eject2 && occupied2;
4683
4684 if (eject && eject2)
4685 len += sprintf(p + len, "commands:\teject, eject2\n");
4686 else if (eject)
4687 len += sprintf(p + len, "commands:\teject\n");
4688 else if (eject2)
4689 len += sprintf(p + len, "commands:\teject2\n");
4690
4691 return len;
4692}
4693
4694static int bay_write(char *buf)
4695{
4696 char *cmd;
4697
4698 if (!tp_features.bay_eject && !tp_features.bay_eject2)
4699 return -ENODEV;
4700
4701 while ((cmd = next_cmd(&buf))) {
4702 if (tp_features.bay_eject && strlencmp(cmd, "eject") == 0) {
4703 if (!acpi_evalf(bay_ej_handle, NULL, NULL, "vd", 1))
4704 return -EIO;
4705 } else if (tp_features.bay_eject2 &&
4706 strlencmp(cmd, "eject2") == 0) {
4707 if (!acpi_evalf(bay2_ej_handle, NULL, NULL, "vd", 1))
4708 return -EIO;
4709 } else
4710 return -EINVAL;
4711 }
4712
4713 return 0;
4714}
4715
4716static struct tp_acpi_drv_struct ibm_bay_acpidriver = {
4717 .notify = bay_notify,
4718 .handle = &bay_handle,
4719 .type = ACPI_SYSTEM_NOTIFY,
4720};
4721
4722static struct ibm_struct bay_driver_data = {
4723 .name = "bay",
4724 .read = bay_read,
4725 .write = bay_write,
4726 .acpi = &ibm_bay_acpidriver,
4727};
4728
4729#endif /* CONFIG_THINKPAD_ACPI_BAY */
4730
4731/*************************************************************************
4732 * CMOS subdriver 4429 * CMOS subdriver
4733 */ 4430 */
4734 4431
@@ -5945,14 +5642,48 @@ static struct backlight_ops ibm_backlight_data = {
5945 5642
5946/* --------------------------------------------------------------------- */ 5643/* --------------------------------------------------------------------- */
5947 5644
5645/*
5646 * These are only useful for models that have only one possibility
5647 * of GPU. If the BIOS model handles both ATI and Intel, don't use
5648 * these quirks.
5649 */
5650#define TPACPI_BRGHT_Q_NOEC 0x0001 /* Must NOT use EC HBRV */
5651#define TPACPI_BRGHT_Q_EC 0x0002 /* Should or must use EC HBRV */
5652#define TPACPI_BRGHT_Q_ASK 0x8000 /* Ask for user report */
5653
5654static const struct tpacpi_quirk brightness_quirk_table[] __initconst = {
5655 /* Models with ATI GPUs known to require ECNVRAM mode */
5656 TPACPI_Q_IBM('1', 'Y', TPACPI_BRGHT_Q_EC), /* T43/p ATI */
5657
5658 /* Models with ATI GPUs (waiting confirmation) */
5659 TPACPI_Q_IBM('1', 'R', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
5660 TPACPI_Q_IBM('1', 'Q', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
5661 TPACPI_Q_IBM('7', '6', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
5662 TPACPI_Q_IBM('7', '8', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_EC),
5663
5664 /* Models with Intel Extreme Graphics 2 (waiting confirmation) */
5665 TPACPI_Q_IBM('1', 'V', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC),
5666 TPACPI_Q_IBM('1', 'W', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC),
5667 TPACPI_Q_IBM('1', 'U', TPACPI_BRGHT_Q_ASK|TPACPI_BRGHT_Q_NOEC),
5668
5669 /* Models with Intel GMA900 */
5670 TPACPI_Q_IBM('7', '0', TPACPI_BRGHT_Q_NOEC), /* T43, R52 */
5671 TPACPI_Q_IBM('7', '4', TPACPI_BRGHT_Q_NOEC), /* X41 */
5672 TPACPI_Q_IBM('7', '5', TPACPI_BRGHT_Q_NOEC), /* X41 Tablet */
5673};
5674
5948static int __init brightness_init(struct ibm_init_struct *iibm) 5675static int __init brightness_init(struct ibm_init_struct *iibm)
5949{ 5676{
5950 int b; 5677 int b;
5678 unsigned long quirks;
5951 5679
5952 vdbg_printk(TPACPI_DBG_INIT, "initializing brightness subdriver\n"); 5680 vdbg_printk(TPACPI_DBG_INIT, "initializing brightness subdriver\n");
5953 5681
5954 mutex_init(&brightness_mutex); 5682 mutex_init(&brightness_mutex);
5955 5683
5684 quirks = tpacpi_check_quirks(brightness_quirk_table,
5685 ARRAY_SIZE(brightness_quirk_table));
5686
5956 /* 5687 /*
5957 * We always attempt to detect acpi support, so as to switch 5688 * We always attempt to detect acpi support, so as to switch
5958 * Lenovo Vista BIOS to ACPI brightness mode even if we are not 5689 * Lenovo Vista BIOS to ACPI brightness mode even if we are not
@@ -6009,23 +5740,13 @@ static int __init brightness_init(struct ibm_init_struct *iibm)
6009 /* TPACPI_BRGHT_MODE_AUTO not implemented yet, just use default */ 5740 /* TPACPI_BRGHT_MODE_AUTO not implemented yet, just use default */
6010 if (brightness_mode == TPACPI_BRGHT_MODE_AUTO || 5741 if (brightness_mode == TPACPI_BRGHT_MODE_AUTO ||
6011 brightness_mode == TPACPI_BRGHT_MODE_MAX) { 5742 brightness_mode == TPACPI_BRGHT_MODE_MAX) {
6012 if (thinkpad_id.vendor == PCI_VENDOR_ID_IBM) { 5743 if (quirks & TPACPI_BRGHT_Q_EC)
6013 /* 5744 brightness_mode = TPACPI_BRGHT_MODE_ECNVRAM;
6014 * IBM models that define HBRV probably have 5745 else
6015 * EC-based backlight level control
6016 */
6017 if (acpi_evalf(ec_handle, NULL, "HBRV", "qd"))
6018 /* T40-T43, R50-R52, R50e, R51e, X31-X41 */
6019 brightness_mode = TPACPI_BRGHT_MODE_ECNVRAM;
6020 else
6021 /* all other IBM ThinkPads */
6022 brightness_mode = TPACPI_BRGHT_MODE_UCMS_STEP;
6023 } else
6024 /* All Lenovo ThinkPads */
6025 brightness_mode = TPACPI_BRGHT_MODE_UCMS_STEP; 5746 brightness_mode = TPACPI_BRGHT_MODE_UCMS_STEP;
6026 5747
6027 dbg_printk(TPACPI_DBG_BRGHT, 5748 dbg_printk(TPACPI_DBG_BRGHT,
6028 "selected brightness_mode=%d\n", 5749 "driver auto-selected brightness_mode=%d\n",
6029 brightness_mode); 5750 brightness_mode);
6030 } 5751 }
6031 5752
@@ -6052,6 +5773,15 @@ static int __init brightness_init(struct ibm_init_struct *iibm)
6052 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_BRGHT, 5773 vdbg_printk(TPACPI_DBG_INIT | TPACPI_DBG_BRGHT,
6053 "brightness is supported\n"); 5774 "brightness is supported\n");
6054 5775
5776 if (quirks & TPACPI_BRGHT_Q_ASK) {
5777 printk(TPACPI_NOTICE
5778 "brightness: will use unverified default: "
5779 "brightness_mode=%d\n", brightness_mode);
5780 printk(TPACPI_NOTICE
5781 "brightness: please report to %s whether it works well "
5782 "or not on your ThinkPad\n", TPACPI_MAIL);
5783 }
5784
6055 ibm_backlight_device->props.max_brightness = 5785 ibm_backlight_device->props.max_brightness =
6056 (tp_features.bright_16levels)? 15 : 7; 5786 (tp_features.bright_16levels)? 15 : 7;
6057 ibm_backlight_device->props.brightness = b & TP_EC_BACKLIGHT_LVLMSK; 5787 ibm_backlight_device->props.brightness = b & TP_EC_BACKLIGHT_LVLMSK;
@@ -7854,22 +7584,6 @@ static struct ibm_init_struct ibms_init[] __initdata = {
7854 .init = light_init, 7584 .init = light_init,
7855 .data = &light_driver_data, 7585 .data = &light_driver_data,
7856 }, 7586 },
7857#ifdef CONFIG_THINKPAD_ACPI_DOCK
7858 {
7859 .init = dock_init,
7860 .data = &dock_driver_data[0],
7861 },
7862 {
7863 .init = dock_init2,
7864 .data = &dock_driver_data[1],
7865 },
7866#endif
7867#ifdef CONFIG_THINKPAD_ACPI_BAY
7868 {
7869 .init = bay_init,
7870 .data = &bay_driver_data,
7871 },
7872#endif
7873 { 7587 {
7874 .init = cmos_init, 7588 .init = cmos_init,
7875 .data = &cmos_driver_data, 7589 .data = &cmos_driver_data,
@@ -7968,12 +7682,6 @@ TPACPI_PARAM(hotkey);
7968TPACPI_PARAM(bluetooth); 7682TPACPI_PARAM(bluetooth);
7969TPACPI_PARAM(video); 7683TPACPI_PARAM(video);
7970TPACPI_PARAM(light); 7684TPACPI_PARAM(light);
7971#ifdef CONFIG_THINKPAD_ACPI_DOCK
7972TPACPI_PARAM(dock);
7973#endif
7974#ifdef CONFIG_THINKPAD_ACPI_BAY
7975TPACPI_PARAM(bay);
7976#endif /* CONFIG_THINKPAD_ACPI_BAY */
7977TPACPI_PARAM(cmos); 7685TPACPI_PARAM(cmos);
7978TPACPI_PARAM(led); 7686TPACPI_PARAM(led);
7979TPACPI_PARAM(beep); 7687TPACPI_PARAM(beep);
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index 7eda34838bfe..bdbc4f73fcdc 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -43,6 +43,13 @@ config BATTERY_DS2760
43 help 43 help
44 Say Y here to enable support for batteries with ds2760 chip. 44 Say Y here to enable support for batteries with ds2760 chip.
45 45
46config BATTERY_DS2782
47 tristate "DS2782 standalone gas-gauge"
48 depends on I2C
49 help
50 Say Y here to enable support for the DS2782 standalone battery
51 gas-gauge.
52
46config BATTERY_PMU 53config BATTERY_PMU
47 tristate "Apple PMU battery" 54 tristate "Apple PMU battery"
48 depends on PPC32 && ADB_PMU 55 depends on PPC32 && ADB_PMU
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index daf3179689aa..380d17c9ae29 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_APM_POWER) += apm_power.o
19obj-$(CONFIG_WM8350_POWER) += wm8350_power.o 19obj-$(CONFIG_WM8350_POWER) += wm8350_power.o
20 20
21obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o 21obj-$(CONFIG_BATTERY_DS2760) += ds2760_battery.o
22obj-$(CONFIG_BATTERY_DS2782) += ds2782_battery.o
22obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o 23obj-$(CONFIG_BATTERY_PMU) += pmu_battery.o
23obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o 24obj-$(CONFIG_BATTERY_OLPC) += olpc_battery.o
24obj-$(CONFIG_BATTERY_TOSA) += tosa_battery.o 25obj-$(CONFIG_BATTERY_TOSA) += tosa_battery.o
diff --git a/drivers/power/ds2782_battery.c b/drivers/power/ds2782_battery.c
new file mode 100644
index 000000000000..da14f374cb60
--- /dev/null
+++ b/drivers/power/ds2782_battery.c
@@ -0,0 +1,330 @@
1/*
2 * I2C client/driver for the Maxim/Dallas DS2782 Stand-Alone Fuel Gauge IC
3 *
4 * Copyright (C) 2009 Bluewater Systems Ltd
5 *
6 * Author: Ryan Mallon <ryan@bluewatersys.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 */
13
14#include <linux/kernel.h>
15#include <linux/module.h>
16#include <linux/types.h>
17#include <linux/errno.h>
18#include <linux/swab.h>
19#include <linux/i2c.h>
20#include <linux/idr.h>
21#include <linux/power_supply.h>
22
23#define DS2782_REG_RARC 0x06 /* Remaining active relative capacity */
24
25#define DS2782_REG_VOLT_MSB 0x0c
26#define DS2782_REG_TEMP_MSB 0x0a
27#define DS2782_REG_CURRENT_MSB 0x0e
28
29/* EEPROM Block */
30#define DS2782_REG_RSNSP 0x69 /* Sense resistor value */
31
32/* Current unit measurement in uA for a 1 milli-ohm sense resistor */
33#define DS2782_CURRENT_UNITS 1563
34
35#define to_ds2782_info(x) container_of(x, struct ds2782_info, battery)
36
37struct ds2782_info {
38 struct i2c_client *client;
39 struct power_supply battery;
40 int id;
41};
42
43static DEFINE_IDR(battery_id);
44static DEFINE_MUTEX(battery_lock);
45
46static inline int ds2782_read_reg(struct ds2782_info *info, int reg, u8 *val)
47{
48 int ret;
49
50 ret = i2c_smbus_read_byte_data(info->client, reg);
51 if (ret < 0) {
52 dev_err(&info->client->dev, "register read failed\n");
53 return ret;
54 }
55
56 *val = ret;
57 return 0;
58}
59
60static inline int ds2782_read_reg16(struct ds2782_info *info, int reg_msb,
61 s16 *val)
62{
63 int ret;
64
65 ret = swab16(i2c_smbus_read_word_data(info->client, reg_msb));
66 if (ret < 0) {
67 dev_err(&info->client->dev, "register read failed\n");
68 return ret;
69 }
70
71 *val = ret;
72 return 0;
73}
74
75static int ds2782_get_temp(struct ds2782_info *info, int *temp)
76{
77 s16 raw;
78 int err;
79
80 /*
81 * Temperature is measured in units of 0.125 degrees celcius, the
82 * power_supply class measures temperature in tenths of degrees
83 * celsius. The temperature value is stored as a 10 bit number, plus
84 * sign in the upper bits of a 16 bit register.
85 */
86 err = ds2782_read_reg16(info, DS2782_REG_TEMP_MSB, &raw);
87 if (err)
88 return err;
89 *temp = ((raw / 32) * 125) / 100;
90 return 0;
91}
92
93static int ds2782_get_current(struct ds2782_info *info, int *current_uA)
94{
95 int sense_res;
96 int err;
97 u8 sense_res_raw;
98 s16 raw;
99
100 /*
101 * The units of measurement for current are dependent on the value of
102 * the sense resistor.
103 */
104 err = ds2782_read_reg(info, DS2782_REG_RSNSP, &sense_res_raw);
105 if (err)
106 return err;
107 if (sense_res_raw == 0) {
108 dev_err(&info->client->dev, "sense resistor value is 0\n");
109 return -ENXIO;
110 }
111 sense_res = 1000 / sense_res_raw;
112
113 dev_dbg(&info->client->dev, "sense resistor = %d milli-ohms\n",
114 sense_res);
115 err = ds2782_read_reg16(info, DS2782_REG_CURRENT_MSB, &raw);
116 if (err)
117 return err;
118 *current_uA = raw * (DS2782_CURRENT_UNITS / sense_res);
119 return 0;
120}
121
122static int ds2782_get_voltage(struct ds2782_info *info, int *voltage_uA)
123{
124 s16 raw;
125 int err;
126
127 /*
128 * Voltage is measured in units of 4.88mV. The voltage is stored as
129 * a 10-bit number plus sign, in the upper bits of a 16-bit register
130 */
131 err = ds2782_read_reg16(info, DS2782_REG_VOLT_MSB, &raw);
132 if (err)
133 return err;
134 *voltage_uA = (raw / 32) * 4800;
135 return 0;
136}
137
138static int ds2782_get_capacity(struct ds2782_info *info, int *capacity)
139{
140 int err;
141 u8 raw;
142
143 err = ds2782_read_reg(info, DS2782_REG_RARC, &raw);
144 if (err)
145 return err;
146 *capacity = raw;
147 return raw;
148}
149
150static int ds2782_get_status(struct ds2782_info *info, int *status)
151{
152 int err;
153 int current_uA;
154 int capacity;
155
156 err = ds2782_get_current(info, &current_uA);
157 if (err)
158 return err;
159
160 err = ds2782_get_capacity(info, &capacity);
161 if (err)
162 return err;
163
164 if (capacity == 100)
165 *status = POWER_SUPPLY_STATUS_FULL;
166 else if (current_uA == 0)
167 *status = POWER_SUPPLY_STATUS_NOT_CHARGING;
168 else if (current_uA < 0)
169 *status = POWER_SUPPLY_STATUS_DISCHARGING;
170 else
171 *status = POWER_SUPPLY_STATUS_CHARGING;
172
173 return 0;
174}
175
176static int ds2782_battery_get_property(struct power_supply *psy,
177 enum power_supply_property prop,
178 union power_supply_propval *val)
179{
180 struct ds2782_info *info = to_ds2782_info(psy);
181 int ret;
182
183 switch (prop) {
184 case POWER_SUPPLY_PROP_STATUS:
185 ret = ds2782_get_status(info, &val->intval);
186 break;
187
188 case POWER_SUPPLY_PROP_CAPACITY:
189 ret = ds2782_get_capacity(info, &val->intval);
190 break;
191
192 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
193 ret = ds2782_get_voltage(info, &val->intval);
194 break;
195
196 case POWER_SUPPLY_PROP_CURRENT_NOW:
197 ret = ds2782_get_current(info, &val->intval);
198 break;
199
200 case POWER_SUPPLY_PROP_TEMP:
201 ret = ds2782_get_temp(info, &val->intval);
202 break;
203
204 default:
205 ret = -EINVAL;
206 }
207
208 return ret;
209}
210
211static enum power_supply_property ds2782_battery_props[] = {
212 POWER_SUPPLY_PROP_STATUS,
213 POWER_SUPPLY_PROP_CAPACITY,
214 POWER_SUPPLY_PROP_VOLTAGE_NOW,
215 POWER_SUPPLY_PROP_CURRENT_NOW,
216 POWER_SUPPLY_PROP_TEMP,
217};
218
219static void ds2782_power_supply_init(struct power_supply *battery)
220{
221 battery->type = POWER_SUPPLY_TYPE_BATTERY;
222 battery->properties = ds2782_battery_props;
223 battery->num_properties = ARRAY_SIZE(ds2782_battery_props);
224 battery->get_property = ds2782_battery_get_property;
225 battery->external_power_changed = NULL;
226}
227
228static int ds2782_battery_remove(struct i2c_client *client)
229{
230 struct ds2782_info *info = i2c_get_clientdata(client);
231
232 power_supply_unregister(&info->battery);
233 kfree(info->battery.name);
234
235 mutex_lock(&battery_lock);
236 idr_remove(&battery_id, info->id);
237 mutex_unlock(&battery_lock);
238
239 i2c_set_clientdata(client, info);
240
241 kfree(info);
242 return 0;
243}
244
245static int ds2782_battery_probe(struct i2c_client *client,
246 const struct i2c_device_id *id)
247{
248 struct ds2782_info *info;
249 int ret;
250 int num;
251
252 /* Get an ID for this battery */
253 ret = idr_pre_get(&battery_id, GFP_KERNEL);
254 if (ret == 0) {
255 ret = -ENOMEM;
256 goto fail_id;
257 }
258
259 mutex_lock(&battery_lock);
260 ret = idr_get_new(&battery_id, client, &num);
261 mutex_unlock(&battery_lock);
262 if (ret < 0)
263 goto fail_id;
264
265 info = kzalloc(sizeof(*info), GFP_KERNEL);
266 if (!info) {
267 ret = -ENOMEM;
268 goto fail_info;
269 }
270
271 info->battery.name = kasprintf(GFP_KERNEL, "ds2782-%d", num);
272 if (!info->battery.name) {
273 ret = -ENOMEM;
274 goto fail_name;
275 }
276
277 i2c_set_clientdata(client, info);
278 info->client = client;
279 ds2782_power_supply_init(&info->battery);
280
281 ret = power_supply_register(&client->dev, &info->battery);
282 if (ret) {
283 dev_err(&client->dev, "failed to register battery\n");
284 goto fail_register;
285 }
286
287 return 0;
288
289fail_register:
290 kfree(info->battery.name);
291fail_name:
292 i2c_set_clientdata(client, info);
293 kfree(info);
294fail_info:
295 mutex_lock(&battery_lock);
296 idr_remove(&battery_id, num);
297 mutex_unlock(&battery_lock);
298fail_id:
299 return ret;
300}
301
302static const struct i2c_device_id ds2782_id[] = {
303 {"ds2782", 0},
304 {},
305};
306
307static struct i2c_driver ds2782_battery_driver = {
308 .driver = {
309 .name = "ds2782-battery",
310 },
311 .probe = ds2782_battery_probe,
312 .remove = ds2782_battery_remove,
313 .id_table = ds2782_id,
314};
315
316static int __init ds2782_init(void)
317{
318 return i2c_add_driver(&ds2782_battery_driver);
319}
320module_init(ds2782_init);
321
322static void __exit ds2782_exit(void)
323{
324 i2c_del_driver(&ds2782_battery_driver);
325}
326module_exit(ds2782_exit);
327
328MODULE_AUTHOR("Ryan Mallon <ryan@bluewatersys.com>");
329MODULE_DESCRIPTION("Maxim/Dallas DS2782 Stand-Alone Fuel Gauage IC driver");
330MODULE_LICENSE("GPL");
diff --git a/drivers/power/olpc_battery.c b/drivers/power/olpc_battery.c
index 5fbca2681baa..58e419299cd6 100644
--- a/drivers/power/olpc_battery.c
+++ b/drivers/power/olpc_battery.c
@@ -8,6 +8,7 @@
8 * published by the Free Software Foundation. 8 * published by the Free Software Foundation.
9 */ 9 */
10 10
11#include <linux/kernel.h>
11#include <linux/module.h> 12#include <linux/module.h>
12#include <linux/err.h> 13#include <linux/err.h>
13#include <linux/platform_device.h> 14#include <linux/platform_device.h>
@@ -35,6 +36,7 @@
35#define BAT_STAT_AC 0x10 36#define BAT_STAT_AC 0x10
36#define BAT_STAT_CHARGING 0x20 37#define BAT_STAT_CHARGING 0x20
37#define BAT_STAT_DISCHARGING 0x40 38#define BAT_STAT_DISCHARGING 0x40
39#define BAT_STAT_TRICKLE 0x80
38 40
39#define BAT_ERR_INFOFAIL 0x02 41#define BAT_ERR_INFOFAIL 0x02
40#define BAT_ERR_OVERVOLTAGE 0x04 42#define BAT_ERR_OVERVOLTAGE 0x04
@@ -89,7 +91,7 @@ static char bat_serial[17]; /* Ick */
89static int olpc_bat_get_status(union power_supply_propval *val, uint8_t ec_byte) 91static int olpc_bat_get_status(union power_supply_propval *val, uint8_t ec_byte)
90{ 92{
91 if (olpc_platform_info.ecver > 0x44) { 93 if (olpc_platform_info.ecver > 0x44) {
92 if (ec_byte & BAT_STAT_CHARGING) 94 if (ec_byte & (BAT_STAT_CHARGING | BAT_STAT_TRICKLE))
93 val->intval = POWER_SUPPLY_STATUS_CHARGING; 95 val->intval = POWER_SUPPLY_STATUS_CHARGING;
94 else if (ec_byte & BAT_STAT_DISCHARGING) 96 else if (ec_byte & BAT_STAT_DISCHARGING)
95 val->intval = POWER_SUPPLY_STATUS_DISCHARGING; 97 val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
@@ -219,7 +221,8 @@ static int olpc_bat_get_property(struct power_supply *psy,
219 It doesn't matter though -- the EC will return the last-known 221 It doesn't matter though -- the EC will return the last-known
220 information, and it's as if we just ran that _little_ bit faster 222 information, and it's as if we just ran that _little_ bit faster
221 and managed to read it out before the battery went away. */ 223 and managed to read it out before the battery went away. */
222 if (!(ec_byte & BAT_STAT_PRESENT) && psp != POWER_SUPPLY_PROP_PRESENT) 224 if (!(ec_byte & (BAT_STAT_PRESENT | BAT_STAT_TRICKLE)) &&
225 psp != POWER_SUPPLY_PROP_PRESENT)
223 return -ENODEV; 226 return -ENODEV;
224 227
225 switch (psp) { 228 switch (psp) {
@@ -229,7 +232,8 @@ static int olpc_bat_get_property(struct power_supply *psy,
229 return ret; 232 return ret;
230 break; 233 break;
231 case POWER_SUPPLY_PROP_PRESENT: 234 case POWER_SUPPLY_PROP_PRESENT:
232 val->intval = !!(ec_byte & BAT_STAT_PRESENT); 235 val->intval = !!(ec_byte & (BAT_STAT_PRESENT |
236 BAT_STAT_TRICKLE));
233 break; 237 break;
234 238
235 case POWER_SUPPLY_PROP_HEALTH: 239 case POWER_SUPPLY_PROP_HEALTH:
@@ -334,21 +338,21 @@ static ssize_t olpc_bat_eeprom_read(struct kobject *kobj,
334 struct bin_attribute *attr, char *buf, loff_t off, size_t count) 338 struct bin_attribute *attr, char *buf, loff_t off, size_t count)
335{ 339{
336 uint8_t ec_byte; 340 uint8_t ec_byte;
337 int ret, end; 341 int ret;
342 int i;
338 343
339 if (off >= EEPROM_SIZE) 344 if (off >= EEPROM_SIZE)
340 return 0; 345 return 0;
341 if (off + count > EEPROM_SIZE) 346 if (off + count > EEPROM_SIZE)
342 count = EEPROM_SIZE - off; 347 count = EEPROM_SIZE - off;
343 348
344 end = EEPROM_START + off + count; 349 for (i = 0; i < count; i++) {
345 for (ec_byte = EEPROM_START + off; ec_byte < end; ec_byte++) { 350 ec_byte = EEPROM_START + off + i;
346 ret = olpc_ec_cmd(EC_BAT_EEPROM, &ec_byte, 1, 351 ret = olpc_ec_cmd(EC_BAT_EEPROM, &ec_byte, 1, &buf[i], 1);
347 &buf[ec_byte - EEPROM_START], 1);
348 if (ret) { 352 if (ret) {
349 printk(KERN_ERR "olpc-battery: EC command " 353 pr_err("olpc-battery: "
350 "EC_BAT_EEPROM @ 0x%x failed -" 354 "EC_BAT_EEPROM cmd @ 0x%x failed - %d!\n",
351 " %d!\n", ec_byte, ret); 355 ec_byte, ret);
352 return -EIO; 356 return -EIO;
353 } 357 }
354 } 358 }
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index 23e10b6263d6..f7a4701bf863 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -1174,23 +1174,34 @@ static struct platform_driver cmos_platform_driver = {
1174 } 1174 }
1175}; 1175};
1176 1176
1177#ifdef CONFIG_PNP
1178static bool pnp_driver_registered;
1179#endif
1180static bool platform_driver_registered;
1181
1177static int __init cmos_init(void) 1182static int __init cmos_init(void)
1178{ 1183{
1179 int retval = 0; 1184 int retval = 0;
1180 1185
1181#ifdef CONFIG_PNP 1186#ifdef CONFIG_PNP
1182 pnp_register_driver(&cmos_pnp_driver); 1187 retval = pnp_register_driver(&cmos_pnp_driver);
1188 if (retval == 0)
1189 pnp_driver_registered = true;
1183#endif 1190#endif
1184 1191
1185 if (!cmos_rtc.dev) 1192 if (!cmos_rtc.dev) {
1186 retval = platform_driver_probe(&cmos_platform_driver, 1193 retval = platform_driver_probe(&cmos_platform_driver,
1187 cmos_platform_probe); 1194 cmos_platform_probe);
1195 if (retval == 0)
1196 platform_driver_registered = true;
1197 }
1188 1198
1189 if (retval == 0) 1199 if (retval == 0)
1190 return 0; 1200 return 0;
1191 1201
1192#ifdef CONFIG_PNP 1202#ifdef CONFIG_PNP
1193 pnp_unregister_driver(&cmos_pnp_driver); 1203 if (pnp_driver_registered)
1204 pnp_unregister_driver(&cmos_pnp_driver);
1194#endif 1205#endif
1195 return retval; 1206 return retval;
1196} 1207}
@@ -1199,9 +1210,11 @@ module_init(cmos_init);
1199static void __exit cmos_exit(void) 1210static void __exit cmos_exit(void)
1200{ 1211{
1201#ifdef CONFIG_PNP 1212#ifdef CONFIG_PNP
1202 pnp_unregister_driver(&cmos_pnp_driver); 1213 if (pnp_driver_registered)
1214 pnp_unregister_driver(&cmos_pnp_driver);
1203#endif 1215#endif
1204 platform_driver_unregister(&cmos_platform_driver); 1216 if (platform_driver_registered)
1217 platform_driver_unregister(&cmos_platform_driver);
1205} 1218}
1206module_exit(cmos_exit); 1219module_exit(cmos_exit);
1207 1220
diff --git a/drivers/s390/crypto/ap_bus.c b/drivers/s390/crypto/ap_bus.c
index 727a809636d8..ed3dcdea7fe1 100644
--- a/drivers/s390/crypto/ap_bus.c
+++ b/drivers/s390/crypto/ap_bus.c
@@ -1145,12 +1145,17 @@ ap_config_timeout(unsigned long ptr)
1145 */ 1145 */
1146static inline void ap_schedule_poll_timer(void) 1146static inline void ap_schedule_poll_timer(void)
1147{ 1147{
1148 ktime_t hr_time;
1148 if (ap_using_interrupts() || ap_suspend_flag) 1149 if (ap_using_interrupts() || ap_suspend_flag)
1149 return; 1150 return;
1150 if (hrtimer_is_queued(&ap_poll_timer)) 1151 if (hrtimer_is_queued(&ap_poll_timer))
1151 return; 1152 return;
1152 hrtimer_start(&ap_poll_timer, ktime_set(0, poll_timeout), 1153 if (ktime_to_ns(hrtimer_expires_remaining(&ap_poll_timer)) <= 0) {
1153 HRTIMER_MODE_ABS); 1154 hr_time = ktime_set(0, poll_timeout);
1155 hrtimer_forward_now(&ap_poll_timer, hr_time);
1156 hrtimer_restart(&ap_poll_timer);
1157 }
1158 return;
1154} 1159}
1155 1160
1156/** 1161/**
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 8030e25152fb..c75d6f35cb5f 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -553,40 +553,35 @@ static void _zfcp_erp_unit_reopen_all(struct zfcp_port *port, int clear,
553 _zfcp_erp_unit_reopen(unit, clear, id, ref); 553 _zfcp_erp_unit_reopen(unit, clear, id, ref);
554} 554}
555 555
556static void zfcp_erp_strategy_followup_actions(struct zfcp_erp_action *act) 556static void zfcp_erp_strategy_followup_failed(struct zfcp_erp_action *act)
557{ 557{
558 struct zfcp_adapter *adapter = act->adapter;
559 struct zfcp_port *port = act->port;
560 struct zfcp_unit *unit = act->unit;
561 u32 status = act->status;
562
563 /* initiate follow-up actions depending on success of finished action */
564 switch (act->action) { 558 switch (act->action) {
565
566 case ZFCP_ERP_ACTION_REOPEN_ADAPTER: 559 case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
567 if (status == ZFCP_ERP_SUCCEEDED) 560 _zfcp_erp_adapter_reopen(act->adapter, 0, "ersff_1", NULL);
568 _zfcp_erp_port_reopen_all(adapter, 0, "ersfa_1", NULL);
569 else
570 _zfcp_erp_adapter_reopen(adapter, 0, "ersfa_2", NULL);
571 break; 561 break;
572
573 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED: 562 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
574 if (status == ZFCP_ERP_SUCCEEDED) 563 _zfcp_erp_port_forced_reopen(act->port, 0, "ersff_2", NULL);
575 _zfcp_erp_port_reopen(port, 0, "ersfa_3", NULL);
576 else
577 _zfcp_erp_adapter_reopen(adapter, 0, "ersfa_4", NULL);
578 break; 564 break;
579
580 case ZFCP_ERP_ACTION_REOPEN_PORT: 565 case ZFCP_ERP_ACTION_REOPEN_PORT:
581 if (status == ZFCP_ERP_SUCCEEDED) 566 _zfcp_erp_port_reopen(act->port, 0, "ersff_3", NULL);
582 _zfcp_erp_unit_reopen_all(port, 0, "ersfa_5", NULL);
583 else
584 _zfcp_erp_port_forced_reopen(port, 0, "ersfa_6", NULL);
585 break; 567 break;
586
587 case ZFCP_ERP_ACTION_REOPEN_UNIT: 568 case ZFCP_ERP_ACTION_REOPEN_UNIT:
588 if (status != ZFCP_ERP_SUCCEEDED) 569 _zfcp_erp_unit_reopen(act->unit, 0, "ersff_4", NULL);
589 _zfcp_erp_port_reopen(unit->port, 0, "ersfa_7", NULL); 570 break;
571 }
572}
573
574static void zfcp_erp_strategy_followup_success(struct zfcp_erp_action *act)
575{
576 switch (act->action) {
577 case ZFCP_ERP_ACTION_REOPEN_ADAPTER:
578 _zfcp_erp_port_reopen_all(act->adapter, 0, "ersfs_1", NULL);
579 break;
580 case ZFCP_ERP_ACTION_REOPEN_PORT_FORCED:
581 _zfcp_erp_port_reopen(act->port, 0, "ersfs_2", NULL);
582 break;
583 case ZFCP_ERP_ACTION_REOPEN_PORT:
584 _zfcp_erp_unit_reopen_all(act->port, 0, "ersfs_3", NULL);
590 break; 585 break;
591 } 586 }
592} 587}
@@ -801,7 +796,7 @@ static int zfcp_erp_port_forced_strategy(struct zfcp_erp_action *erp_action)
801 return ZFCP_ERP_FAILED; 796 return ZFCP_ERP_FAILED;
802 797
803 case ZFCP_ERP_STEP_PHYS_PORT_CLOSING: 798 case ZFCP_ERP_STEP_PHYS_PORT_CLOSING:
804 if (status & ZFCP_STATUS_PORT_PHYS_OPEN) 799 if (!(status & ZFCP_STATUS_PORT_PHYS_OPEN))
805 return ZFCP_ERP_SUCCEEDED; 800 return ZFCP_ERP_SUCCEEDED;
806 } 801 }
807 return ZFCP_ERP_FAILED; 802 return ZFCP_ERP_FAILED;
@@ -853,11 +848,17 @@ void zfcp_erp_port_strategy_open_lookup(struct work_struct *work)
853 gid_pn_work); 848 gid_pn_work);
854 849
855 retval = zfcp_fc_ns_gid_pn(&port->erp_action); 850 retval = zfcp_fc_ns_gid_pn(&port->erp_action);
856 if (retval == -ENOMEM) 851 if (!retval) {
857 zfcp_erp_notify(&port->erp_action, ZFCP_ERP_NOMEM); 852 port->erp_action.step = ZFCP_ERP_STEP_NAMESERVER_LOOKUP;
858 port->erp_action.step = ZFCP_ERP_STEP_NAMESERVER_LOOKUP; 853 goto out;
859 if (retval) 854 }
860 zfcp_erp_notify(&port->erp_action, ZFCP_ERP_FAILED); 855 if (retval == -ENOMEM) {
856 zfcp_erp_notify(&port->erp_action, ZFCP_STATUS_ERP_LOWMEM);
857 goto out;
858 }
859 /* all other error condtions */
860 zfcp_erp_notify(&port->erp_action, 0);
861out:
861 zfcp_port_put(port); 862 zfcp_port_put(port);
862} 863}
863 864
@@ -1289,7 +1290,10 @@ static int zfcp_erp_strategy(struct zfcp_erp_action *erp_action)
1289 retval = zfcp_erp_strategy_statechange(erp_action, retval); 1290 retval = zfcp_erp_strategy_statechange(erp_action, retval);
1290 if (retval == ZFCP_ERP_EXIT) 1291 if (retval == ZFCP_ERP_EXIT)
1291 goto unlock; 1292 goto unlock;
1292 zfcp_erp_strategy_followup_actions(erp_action); 1293 if (retval == ZFCP_ERP_SUCCEEDED)
1294 zfcp_erp_strategy_followup_success(erp_action);
1295 if (retval == ZFCP_ERP_FAILED)
1296 zfcp_erp_strategy_followup_failed(erp_action);
1293 1297
1294 unlock: 1298 unlock:
1295 write_unlock(&adapter->erp_lock); 1299 write_unlock(&adapter->erp_lock);
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index 2f0705d76b72..47daebfa7e59 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -79,11 +79,9 @@ static int zfcp_wka_port_get(struct zfcp_wka_port *wka_port)
79 79
80 mutex_unlock(&wka_port->mutex); 80 mutex_unlock(&wka_port->mutex);
81 81
82 wait_event_timeout( 82 wait_event(wka_port->completion_wq,
83 wka_port->completion_wq, 83 wka_port->status == ZFCP_WKA_PORT_ONLINE ||
84 wka_port->status == ZFCP_WKA_PORT_ONLINE || 84 wka_port->status == ZFCP_WKA_PORT_OFFLINE);
85 wka_port->status == ZFCP_WKA_PORT_OFFLINE,
86 HZ >> 1);
87 85
88 if (wka_port->status == ZFCP_WKA_PORT_ONLINE) { 86 if (wka_port->status == ZFCP_WKA_PORT_ONLINE) {
89 atomic_inc(&wka_port->refcount); 87 atomic_inc(&wka_port->refcount);
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index c57658f3d34f..47795fbf081f 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -670,8 +670,11 @@ static int zfcp_fsf_req_sbal_get(struct zfcp_adapter *adapter)
670 zfcp_fsf_sbal_check(adapter), 5 * HZ); 670 zfcp_fsf_sbal_check(adapter), 5 * HZ);
671 if (ret > 0) 671 if (ret > 0)
672 return 0; 672 return 0;
673 if (!ret) 673 if (!ret) {
674 atomic_inc(&adapter->qdio_outb_full); 674 atomic_inc(&adapter->qdio_outb_full);
675 /* assume hanging outbound queue, try queue recovery */
676 zfcp_erp_adapter_reopen(adapter, 0, "fsrsg_1", NULL);
677 }
675 678
676 spin_lock_bh(&adapter->req_q_lock); 679 spin_lock_bh(&adapter->req_q_lock);
677 return -EIO; 680 return -EIO;
@@ -722,7 +725,7 @@ static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_adapter *adapter,
722 req = zfcp_fsf_alloc_qtcb(pool); 725 req = zfcp_fsf_alloc_qtcb(pool);
723 726
724 if (unlikely(!req)) 727 if (unlikely(!req))
725 return ERR_PTR(-EIO); 728 return ERR_PTR(-ENOMEM);
726 729
727 if (adapter->req_no == 0) 730 if (adapter->req_no == 0)
728 adapter->req_no++; 731 adapter->req_no++;
@@ -1010,6 +1013,23 @@ skip_fsfstatus:
1010 send_ct->handler(send_ct->handler_data); 1013 send_ct->handler(send_ct->handler_data);
1011} 1014}
1012 1015
1016static void zfcp_fsf_setup_ct_els_unchained(struct qdio_buffer_element *sbale,
1017 struct scatterlist *sg_req,
1018 struct scatterlist *sg_resp)
1019{
1020 sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE_READ;
1021 sbale[2].addr = sg_virt(sg_req);
1022 sbale[2].length = sg_req->length;
1023 sbale[3].addr = sg_virt(sg_resp);
1024 sbale[3].length = sg_resp->length;
1025 sbale[3].flags |= SBAL_FLAGS_LAST_ENTRY;
1026}
1027
1028static int zfcp_fsf_one_sbal(struct scatterlist *sg)
1029{
1030 return sg_is_last(sg) && sg->length <= PAGE_SIZE;
1031}
1032
1013static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req, 1033static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req,
1014 struct scatterlist *sg_req, 1034 struct scatterlist *sg_req,
1015 struct scatterlist *sg_resp, 1035 struct scatterlist *sg_resp,
@@ -1020,30 +1040,30 @@ static int zfcp_fsf_setup_ct_els_sbals(struct zfcp_fsf_req *req,
1020 int bytes; 1040 int bytes;
1021 1041
1022 if (!(feat & FSF_FEATURE_ELS_CT_CHAINED_SBALS)) { 1042 if (!(feat & FSF_FEATURE_ELS_CT_CHAINED_SBALS)) {
1023 if (sg_req->length > PAGE_SIZE || sg_resp->length > PAGE_SIZE || 1043 if (!zfcp_fsf_one_sbal(sg_req) || !zfcp_fsf_one_sbal(sg_resp))
1024 !sg_is_last(sg_req) || !sg_is_last(sg_resp))
1025 return -EOPNOTSUPP; 1044 return -EOPNOTSUPP;
1026 1045
1027 sbale[0].flags |= SBAL_FLAGS0_TYPE_WRITE_READ; 1046 zfcp_fsf_setup_ct_els_unchained(sbale, sg_req, sg_resp);
1028 sbale[2].addr = sg_virt(sg_req); 1047 return 0;
1029 sbale[2].length = sg_req->length; 1048 }
1030 sbale[3].addr = sg_virt(sg_resp); 1049
1031 sbale[3].length = sg_resp->length; 1050 /* use single, unchained SBAL if it can hold the request */
1032 sbale[3].flags |= SBAL_FLAGS_LAST_ENTRY; 1051 if (zfcp_fsf_one_sbal(sg_req) && zfcp_fsf_one_sbal(sg_resp)) {
1052 zfcp_fsf_setup_ct_els_unchained(sbale, sg_req, sg_resp);
1033 return 0; 1053 return 0;
1034 } 1054 }
1035 1055
1036 bytes = zfcp_qdio_sbals_from_sg(req, SBAL_FLAGS0_TYPE_WRITE_READ, 1056 bytes = zfcp_qdio_sbals_from_sg(req, SBAL_FLAGS0_TYPE_WRITE_READ,
1037 sg_req, max_sbals); 1057 sg_req, max_sbals);
1038 if (bytes <= 0) 1058 if (bytes <= 0)
1039 return -ENOMEM; 1059 return -EIO;
1040 req->qtcb->bottom.support.req_buf_length = bytes; 1060 req->qtcb->bottom.support.req_buf_length = bytes;
1041 req->sbale_curr = ZFCP_LAST_SBALE_PER_SBAL; 1061 req->sbale_curr = ZFCP_LAST_SBALE_PER_SBAL;
1042 1062
1043 bytes = zfcp_qdio_sbals_from_sg(req, SBAL_FLAGS0_TYPE_WRITE_READ, 1063 bytes = zfcp_qdio_sbals_from_sg(req, SBAL_FLAGS0_TYPE_WRITE_READ,
1044 sg_resp, max_sbals); 1064 sg_resp, max_sbals);
1045 if (bytes <= 0) 1065 if (bytes <= 0)
1046 return -ENOMEM; 1066 return -EIO;
1047 req->qtcb->bottom.support.resp_buf_length = bytes; 1067 req->qtcb->bottom.support.resp_buf_length = bytes;
1048 1068
1049 return 0; 1069 return 0;
@@ -1607,10 +1627,10 @@ static void zfcp_fsf_open_wka_port_handler(struct zfcp_fsf_req *req)
1607 case FSF_ACCESS_DENIED: 1627 case FSF_ACCESS_DENIED:
1608 wka_port->status = ZFCP_WKA_PORT_OFFLINE; 1628 wka_port->status = ZFCP_WKA_PORT_OFFLINE;
1609 break; 1629 break;
1610 case FSF_PORT_ALREADY_OPEN:
1611 break;
1612 case FSF_GOOD: 1630 case FSF_GOOD:
1613 wka_port->handle = header->port_handle; 1631 wka_port->handle = header->port_handle;
1632 /* fall through */
1633 case FSF_PORT_ALREADY_OPEN:
1614 wka_port->status = ZFCP_WKA_PORT_ONLINE; 1634 wka_port->status = ZFCP_WKA_PORT_ONLINE;
1615 } 1635 }
1616out: 1636out:
@@ -1731,15 +1751,16 @@ static void zfcp_fsf_close_physical_port_handler(struct zfcp_fsf_req *req)
1731 zfcp_fsf_access_denied_port(req, port); 1751 zfcp_fsf_access_denied_port(req, port);
1732 break; 1752 break;
1733 case FSF_PORT_BOXED: 1753 case FSF_PORT_BOXED:
1734 zfcp_erp_port_boxed(port, "fscpph2", req);
1735 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
1736 ZFCP_STATUS_FSFREQ_RETRY;
1737 /* can't use generic zfcp_erp_modify_port_status because 1754 /* can't use generic zfcp_erp_modify_port_status because
1738 * ZFCP_STATUS_COMMON_OPEN must not be reset for the port */ 1755 * ZFCP_STATUS_COMMON_OPEN must not be reset for the port */
1739 atomic_clear_mask(ZFCP_STATUS_PORT_PHYS_OPEN, &port->status); 1756 atomic_clear_mask(ZFCP_STATUS_PORT_PHYS_OPEN, &port->status);
1740 list_for_each_entry(unit, &port->unit_list_head, list) 1757 list_for_each_entry(unit, &port->unit_list_head, list)
1741 atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN, 1758 atomic_clear_mask(ZFCP_STATUS_COMMON_OPEN,
1742 &unit->status); 1759 &unit->status);
1760 zfcp_erp_port_boxed(port, "fscpph2", req);
1761 req->status |= ZFCP_STATUS_FSFREQ_ERROR |
1762 ZFCP_STATUS_FSFREQ_RETRY;
1763
1743 break; 1764 break;
1744 case FSF_ADAPTER_STATUS_AVAILABLE: 1765 case FSF_ADAPTER_STATUS_AVAILABLE:
1745 switch (header->fsf_status_qual.word[0]) { 1766 switch (header->fsf_status_qual.word[0]) {
@@ -2541,7 +2562,6 @@ struct zfcp_fsf_req *zfcp_fsf_control_file(struct zfcp_adapter *adapter,
2541 bytes = zfcp_qdio_sbals_from_sg(req, direction, fsf_cfdc->sg, 2562 bytes = zfcp_qdio_sbals_from_sg(req, direction, fsf_cfdc->sg,
2542 FSF_MAX_SBALS_PER_REQ); 2563 FSF_MAX_SBALS_PER_REQ);
2543 if (bytes != ZFCP_CFDC_MAX_SIZE) { 2564 if (bytes != ZFCP_CFDC_MAX_SIZE) {
2544 retval = -ENOMEM;
2545 zfcp_fsf_req_free(req); 2565 zfcp_fsf_req_free(req);
2546 goto out; 2566 goto out;
2547 } 2567 }
diff --git a/drivers/s390/scsi/zfcp_scsi.c b/drivers/s390/scsi/zfcp_scsi.c
index 967ede73f4c5..6925a1784682 100644
--- a/drivers/s390/scsi/zfcp_scsi.c
+++ b/drivers/s390/scsi/zfcp_scsi.c
@@ -167,20 +167,21 @@ static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
167 struct zfcp_unit *unit = scpnt->device->hostdata; 167 struct zfcp_unit *unit = scpnt->device->hostdata;
168 struct zfcp_fsf_req *old_req, *abrt_req; 168 struct zfcp_fsf_req *old_req, *abrt_req;
169 unsigned long flags; 169 unsigned long flags;
170 unsigned long old_req_id = (unsigned long) scpnt->host_scribble; 170 unsigned long old_reqid = (unsigned long) scpnt->host_scribble;
171 int retval = SUCCESS; 171 int retval = SUCCESS;
172 int retry = 3; 172 int retry = 3;
173 char *dbf_tag;
173 174
174 /* avoid race condition between late normal completion and abort */ 175 /* avoid race condition between late normal completion and abort */
175 write_lock_irqsave(&adapter->abort_lock, flags); 176 write_lock_irqsave(&adapter->abort_lock, flags);
176 177
177 spin_lock(&adapter->req_list_lock); 178 spin_lock(&adapter->req_list_lock);
178 old_req = zfcp_reqlist_find(adapter, old_req_id); 179 old_req = zfcp_reqlist_find(adapter, old_reqid);
179 spin_unlock(&adapter->req_list_lock); 180 spin_unlock(&adapter->req_list_lock);
180 if (!old_req) { 181 if (!old_req) {
181 write_unlock_irqrestore(&adapter->abort_lock, flags); 182 write_unlock_irqrestore(&adapter->abort_lock, flags);
182 zfcp_scsi_dbf_event_abort("lte1", adapter, scpnt, NULL, 183 zfcp_scsi_dbf_event_abort("lte1", adapter, scpnt, NULL,
183 old_req_id); 184 old_reqid);
184 return FAILED; /* completion could be in progress */ 185 return FAILED; /* completion could be in progress */
185 } 186 }
186 old_req->data = NULL; 187 old_req->data = NULL;
@@ -189,7 +190,7 @@ static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
189 write_unlock_irqrestore(&adapter->abort_lock, flags); 190 write_unlock_irqrestore(&adapter->abort_lock, flags);
190 191
191 while (retry--) { 192 while (retry--) {
192 abrt_req = zfcp_fsf_abort_fcp_command(old_req_id, unit); 193 abrt_req = zfcp_fsf_abort_fcp_command(old_reqid, unit);
193 if (abrt_req) 194 if (abrt_req)
194 break; 195 break;
195 196
@@ -197,7 +198,7 @@ static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
197 if (!(atomic_read(&adapter->status) & 198 if (!(atomic_read(&adapter->status) &
198 ZFCP_STATUS_COMMON_RUNNING)) { 199 ZFCP_STATUS_COMMON_RUNNING)) {
199 zfcp_scsi_dbf_event_abort("nres", adapter, scpnt, NULL, 200 zfcp_scsi_dbf_event_abort("nres", adapter, scpnt, NULL,
200 old_req_id); 201 old_reqid);
201 return SUCCESS; 202 return SUCCESS;
202 } 203 }
203 } 204 }
@@ -208,13 +209,14 @@ static int zfcp_scsi_eh_abort_handler(struct scsi_cmnd *scpnt)
208 abrt_req->status & ZFCP_STATUS_FSFREQ_COMPLETED); 209 abrt_req->status & ZFCP_STATUS_FSFREQ_COMPLETED);
209 210
210 if (abrt_req->status & ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED) 211 if (abrt_req->status & ZFCP_STATUS_FSFREQ_ABORTSUCCEEDED)
211 zfcp_scsi_dbf_event_abort("okay", adapter, scpnt, abrt_req, 0); 212 dbf_tag = "okay";
212 else if (abrt_req->status & ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED) 213 else if (abrt_req->status & ZFCP_STATUS_FSFREQ_ABORTNOTNEEDED)
213 zfcp_scsi_dbf_event_abort("lte2", adapter, scpnt, abrt_req, 0); 214 dbf_tag = "lte2";
214 else { 215 else {
215 zfcp_scsi_dbf_event_abort("fail", adapter, scpnt, abrt_req, 0); 216 dbf_tag = "fail";
216 retval = FAILED; 217 retval = FAILED;
217 } 218 }
219 zfcp_scsi_dbf_event_abort(dbf_tag, adapter, scpnt, abrt_req, old_reqid);
218 zfcp_fsf_req_free(abrt_req); 220 zfcp_fsf_req_free(abrt_req);
219 return retval; 221 return retval;
220} 222}
@@ -534,6 +536,9 @@ static void zfcp_scsi_rport_register(struct zfcp_port *port)
534 struct fc_rport_identifiers ids; 536 struct fc_rport_identifiers ids;
535 struct fc_rport *rport; 537 struct fc_rport *rport;
536 538
539 if (port->rport)
540 return;
541
537 ids.node_name = port->wwnn; 542 ids.node_name = port->wwnn;
538 ids.port_name = port->wwpn; 543 ids.port_name = port->wwpn;
539 ids.port_id = port->d_id; 544 ids.port_id = port->d_id;
@@ -557,8 +562,10 @@ static void zfcp_scsi_rport_block(struct zfcp_port *port)
557{ 562{
558 struct fc_rport *rport = port->rport; 563 struct fc_rport *rport = port->rport;
559 564
560 if (rport) 565 if (rport) {
561 fc_remote_port_delete(rport); 566 fc_remote_port_delete(rport);
567 port->rport = NULL;
568 }
562} 569}
563 570
564void zfcp_scsi_schedule_rport_register(struct zfcp_port *port) 571void zfcp_scsi_schedule_rport_register(struct zfcp_port *port)
diff --git a/drivers/s390/scsi/zfcp_sysfs.c b/drivers/s390/scsi/zfcp_sysfs.c
index 3e51e64d1108..0fe5cce818cb 100644
--- a/drivers/s390/scsi/zfcp_sysfs.c
+++ b/drivers/s390/scsi/zfcp_sysfs.c
@@ -494,9 +494,14 @@ static ssize_t zfcp_sysfs_adapter_q_full_show(struct device *dev,
494 struct Scsi_Host *scsi_host = class_to_shost(dev); 494 struct Scsi_Host *scsi_host = class_to_shost(dev);
495 struct zfcp_adapter *adapter = 495 struct zfcp_adapter *adapter =
496 (struct zfcp_adapter *) scsi_host->hostdata[0]; 496 (struct zfcp_adapter *) scsi_host->hostdata[0];
497 u64 util;
498
499 spin_lock_bh(&adapter->qdio_stat_lock);
500 util = adapter->req_q_util;
501 spin_unlock_bh(&adapter->qdio_stat_lock);
497 502
498 return sprintf(buf, "%d %llu\n", atomic_read(&adapter->qdio_outb_full), 503 return sprintf(buf, "%d %llu\n", atomic_read(&adapter->qdio_outb_full),
499 (unsigned long long)adapter->req_q_util); 504 (unsigned long long)util);
500} 505}
501static DEVICE_ATTR(queue_full, S_IRUGO, zfcp_sysfs_adapter_q_full_show, NULL); 506static DEVICE_ATTR(queue_full, S_IRUGO, zfcp_sysfs_adapter_q_full_show, NULL);
502 507
diff --git a/drivers/scsi/libfc/fc_exch.c b/drivers/scsi/libfc/fc_exch.c
index 2bc22be5f849..145ab9ba55ea 100644
--- a/drivers/scsi/libfc/fc_exch.c
+++ b/drivers/scsi/libfc/fc_exch.c
@@ -415,9 +415,9 @@ static void fc_exch_timeout(struct work_struct *work)
415 e_stat = ep->esb_stat; 415 e_stat = ep->esb_stat;
416 if (e_stat & ESB_ST_COMPLETE) { 416 if (e_stat & ESB_ST_COMPLETE) {
417 ep->esb_stat = e_stat & ~ESB_ST_REC_QUAL; 417 ep->esb_stat = e_stat & ~ESB_ST_REC_QUAL;
418 spin_unlock_bh(&ep->ex_lock);
418 if (e_stat & ESB_ST_REC_QUAL) 419 if (e_stat & ESB_ST_REC_QUAL)
419 fc_exch_rrq(ep); 420 fc_exch_rrq(ep);
420 spin_unlock_bh(&ep->ex_lock);
421 goto done; 421 goto done;
422 } else { 422 } else {
423 resp = ep->resp; 423 resp = ep->resp;
@@ -1624,14 +1624,14 @@ static void fc_exch_rrq(struct fc_exch *ep)
1624 struct fc_lport *lp; 1624 struct fc_lport *lp;
1625 struct fc_els_rrq *rrq; 1625 struct fc_els_rrq *rrq;
1626 struct fc_frame *fp; 1626 struct fc_frame *fp;
1627 struct fc_seq *rrq_sp;
1628 u32 did; 1627 u32 did;
1629 1628
1630 lp = ep->lp; 1629 lp = ep->lp;
1631 1630
1632 fp = fc_frame_alloc(lp, sizeof(*rrq)); 1631 fp = fc_frame_alloc(lp, sizeof(*rrq));
1633 if (!fp) 1632 if (!fp)
1634 return; 1633 goto retry;
1634
1635 rrq = fc_frame_payload_get(fp, sizeof(*rrq)); 1635 rrq = fc_frame_payload_get(fp, sizeof(*rrq));
1636 memset(rrq, 0, sizeof(*rrq)); 1636 memset(rrq, 0, sizeof(*rrq));
1637 rrq->rrq_cmd = ELS_RRQ; 1637 rrq->rrq_cmd = ELS_RRQ;
@@ -1647,13 +1647,20 @@ static void fc_exch_rrq(struct fc_exch *ep)
1647 fc_host_port_id(lp->host), FC_TYPE_ELS, 1647 fc_host_port_id(lp->host), FC_TYPE_ELS,
1648 FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT, 0); 1648 FC_FC_FIRST_SEQ | FC_FC_END_SEQ | FC_FC_SEQ_INIT, 0);
1649 1649
1650 rrq_sp = fc_exch_seq_send(lp, fp, fc_exch_rrq_resp, NULL, ep, 1650 if (fc_exch_seq_send(lp, fp, fc_exch_rrq_resp, NULL, ep, lp->e_d_tov))
1651 lp->e_d_tov); 1651 return;
1652 if (!rrq_sp) { 1652
1653 ep->esb_stat |= ESB_ST_REC_QUAL; 1653retry:
1654 fc_exch_timer_set_locked(ep, ep->r_a_tov); 1654 spin_lock_bh(&ep->ex_lock);
1655 if (ep->state & (FC_EX_RST_CLEANUP | FC_EX_DONE)) {
1656 spin_unlock_bh(&ep->ex_lock);
1657 /* drop hold for rec qual */
1658 fc_exch_release(ep);
1655 return; 1659 return;
1656 } 1660 }
1661 ep->esb_stat |= ESB_ST_REC_QUAL;
1662 fc_exch_timer_set_locked(ep, ep->r_a_tov);
1663 spin_unlock_bh(&ep->ex_lock);
1657} 1664}
1658 1665
1659 1666
diff --git a/drivers/scsi/libiscsi.c b/drivers/scsi/libiscsi.c
index 716cc344c5df..a751f6230c22 100644
--- a/drivers/scsi/libiscsi.c
+++ b/drivers/scsi/libiscsi.c
@@ -1974,10 +1974,10 @@ int iscsi_eh_abort(struct scsi_cmnd *sc)
1974 * good and have never sent us a successful tmf response 1974 * good and have never sent us a successful tmf response
1975 * then sent more data for the cmd. 1975 * then sent more data for the cmd.
1976 */ 1976 */
1977 spin_lock(&session->lock); 1977 spin_lock_bh(&session->lock);
1978 fail_scsi_task(task, DID_ABORT); 1978 fail_scsi_task(task, DID_ABORT);
1979 conn->tmf_state = TMF_INITIAL; 1979 conn->tmf_state = TMF_INITIAL;
1980 spin_unlock(&session->lock); 1980 spin_unlock_bh(&session->lock);
1981 iscsi_start_tx(conn); 1981 iscsi_start_tx(conn);
1982 goto success_unlocked; 1982 goto success_unlocked;
1983 case TMF_TIMEDOUT: 1983 case TMF_TIMEDOUT:
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c
index 54fa1e42dc4d..b3381959acce 100644
--- a/drivers/scsi/libsas/sas_expander.c
+++ b/drivers/scsi/libsas/sas_expander.c
@@ -766,6 +766,7 @@ static int sas_ex_join_wide_port(struct domain_device *parent, int phy_id)
766 if (!memcmp(phy->attached_sas_addr, ephy->attached_sas_addr, 766 if (!memcmp(phy->attached_sas_addr, ephy->attached_sas_addr,
767 SAS_ADDR_SIZE) && ephy->port) { 767 SAS_ADDR_SIZE) && ephy->port) {
768 sas_port_add_phy(ephy->port, phy->phy); 768 sas_port_add_phy(ephy->port, phy->phy);
769 phy->port = ephy->port;
769 phy->phy_state = PHY_DEVICE_DISCOVERED; 770 phy->phy_state = PHY_DEVICE_DISCOVERED;
770 return 0; 771 return 0;
771 } 772 }
@@ -945,11 +946,21 @@ static int sas_ex_discover_dev(struct domain_device *dev, int phy_id)
945 if (ex->ex_phy[i].phy_state == PHY_VACANT || 946 if (ex->ex_phy[i].phy_state == PHY_VACANT ||
946 ex->ex_phy[i].phy_state == PHY_NOT_PRESENT) 947 ex->ex_phy[i].phy_state == PHY_NOT_PRESENT)
947 continue; 948 continue;
948 949 /*
950 * Due to races, the phy might not get added to the
951 * wide port, so we add the phy to the wide port here.
952 */
949 if (SAS_ADDR(ex->ex_phy[i].attached_sas_addr) == 953 if (SAS_ADDR(ex->ex_phy[i].attached_sas_addr) ==
950 SAS_ADDR(child->sas_addr)) 954 SAS_ADDR(child->sas_addr)) {
951 ex->ex_phy[i].phy_state= PHY_DEVICE_DISCOVERED; 955 ex->ex_phy[i].phy_state= PHY_DEVICE_DISCOVERED;
956 res = sas_ex_join_wide_port(dev, i);
957 if (!res)
958 SAS_DPRINTK("Attaching ex phy%d to wide port %016llx\n",
959 i, SAS_ADDR(ex->ex_phy[i].attached_sas_addr));
960
961 }
952 } 962 }
963 res = 0;
953 } 964 }
954 965
955 return res; 966 return res;
@@ -1598,7 +1609,7 @@ static int sas_get_phy_attached_sas_addr(struct domain_device *dev,
1598} 1609}
1599 1610
1600static int sas_find_bcast_phy(struct domain_device *dev, int *phy_id, 1611static int sas_find_bcast_phy(struct domain_device *dev, int *phy_id,
1601 int from_phy) 1612 int from_phy, bool update)
1602{ 1613{
1603 struct expander_device *ex = &dev->ex_dev; 1614 struct expander_device *ex = &dev->ex_dev;
1604 int res = 0; 1615 int res = 0;
@@ -1611,7 +1622,9 @@ static int sas_find_bcast_phy(struct domain_device *dev, int *phy_id,
1611 if (res) 1622 if (res)
1612 goto out; 1623 goto out;
1613 else if (phy_change_count != ex->ex_phy[i].phy_change_count) { 1624 else if (phy_change_count != ex->ex_phy[i].phy_change_count) {
1614 ex->ex_phy[i].phy_change_count = phy_change_count; 1625 if (update)
1626 ex->ex_phy[i].phy_change_count =
1627 phy_change_count;
1615 *phy_id = i; 1628 *phy_id = i;
1616 return 0; 1629 return 0;
1617 } 1630 }
@@ -1653,31 +1666,52 @@ out:
1653 kfree(rg_req); 1666 kfree(rg_req);
1654 return res; 1667 return res;
1655} 1668}
1669/**
1670 * sas_find_bcast_dev - find the device issue BROADCAST(CHANGE).
1671 * @dev:domain device to be detect.
1672 * @src_dev: the device which originated BROADCAST(CHANGE).
1673 *
1674 * Add self-configuration expander suport. Suppose two expander cascading,
1675 * when the first level expander is self-configuring, hotplug the disks in
1676 * second level expander, BROADCAST(CHANGE) will not only be originated
1677 * in the second level expander, but also be originated in the first level
1678 * expander (see SAS protocol SAS 2r-14, 7.11 for detail), it is to say,
1679 * expander changed count in two level expanders will all increment at least
1680 * once, but the phy which chang count has changed is the source device which
1681 * we concerned.
1682 */
1656 1683
1657static int sas_find_bcast_dev(struct domain_device *dev, 1684static int sas_find_bcast_dev(struct domain_device *dev,
1658 struct domain_device **src_dev) 1685 struct domain_device **src_dev)
1659{ 1686{
1660 struct expander_device *ex = &dev->ex_dev; 1687 struct expander_device *ex = &dev->ex_dev;
1661 int ex_change_count = -1; 1688 int ex_change_count = -1;
1689 int phy_id = -1;
1662 int res; 1690 int res;
1691 struct domain_device *ch;
1663 1692
1664 res = sas_get_ex_change_count(dev, &ex_change_count); 1693 res = sas_get_ex_change_count(dev, &ex_change_count);
1665 if (res) 1694 if (res)
1666 goto out; 1695 goto out;
1667 if (ex_change_count != -1 && 1696 if (ex_change_count != -1 && ex_change_count != ex->ex_change_count) {
1668 ex_change_count != ex->ex_change_count) { 1697 /* Just detect if this expander phys phy change count changed,
1669 *src_dev = dev; 1698 * in order to determine if this expander originate BROADCAST,
1670 ex->ex_change_count = ex_change_count; 1699 * and do not update phy change count field in our structure.
1671 } else { 1700 */
1672 struct domain_device *ch; 1701 res = sas_find_bcast_phy(dev, &phy_id, 0, false);
1673 1702 if (phy_id != -1) {
1674 list_for_each_entry(ch, &ex->children, siblings) { 1703 *src_dev = dev;
1675 if (ch->dev_type == EDGE_DEV || 1704 ex->ex_change_count = ex_change_count;
1676 ch->dev_type == FANOUT_DEV) { 1705 SAS_DPRINTK("Expander phy change count has changed\n");
1677 res = sas_find_bcast_dev(ch, src_dev); 1706 return res;
1678 if (src_dev) 1707 } else
1679 return res; 1708 SAS_DPRINTK("Expander phys DID NOT change\n");
1680 } 1709 }
1710 list_for_each_entry(ch, &ex->children, siblings) {
1711 if (ch->dev_type == EDGE_DEV || ch->dev_type == FANOUT_DEV) {
1712 res = sas_find_bcast_dev(ch, src_dev);
1713 if (src_dev)
1714 return res;
1681 } 1715 }
1682 } 1716 }
1683out: 1717out:
@@ -1700,24 +1734,26 @@ static void sas_unregister_ex_tree(struct domain_device *dev)
1700} 1734}
1701 1735
1702static void sas_unregister_devs_sas_addr(struct domain_device *parent, 1736static void sas_unregister_devs_sas_addr(struct domain_device *parent,
1703 int phy_id) 1737 int phy_id, bool last)
1704{ 1738{
1705 struct expander_device *ex_dev = &parent->ex_dev; 1739 struct expander_device *ex_dev = &parent->ex_dev;
1706 struct ex_phy *phy = &ex_dev->ex_phy[phy_id]; 1740 struct ex_phy *phy = &ex_dev->ex_phy[phy_id];
1707 struct domain_device *child, *n; 1741 struct domain_device *child, *n;
1708 1742 if (last) {
1709 list_for_each_entry_safe(child, n, &ex_dev->children, siblings) { 1743 list_for_each_entry_safe(child, n,
1710 if (SAS_ADDR(child->sas_addr) == 1744 &ex_dev->children, siblings) {
1711 SAS_ADDR(phy->attached_sas_addr)) { 1745 if (SAS_ADDR(child->sas_addr) ==
1712 if (child->dev_type == EDGE_DEV || 1746 SAS_ADDR(phy->attached_sas_addr)) {
1713 child->dev_type == FANOUT_DEV) 1747 if (child->dev_type == EDGE_DEV ||
1714 sas_unregister_ex_tree(child); 1748 child->dev_type == FANOUT_DEV)
1715 else 1749 sas_unregister_ex_tree(child);
1716 sas_unregister_dev(child); 1750 else
1717 break; 1751 sas_unregister_dev(child);
1752 break;
1753 }
1718 } 1754 }
1755 sas_disable_routing(parent, phy->attached_sas_addr);
1719 } 1756 }
1720 sas_disable_routing(parent, phy->attached_sas_addr);
1721 memset(phy->attached_sas_addr, 0, SAS_ADDR_SIZE); 1757 memset(phy->attached_sas_addr, 0, SAS_ADDR_SIZE);
1722 sas_port_delete_phy(phy->port, phy->phy); 1758 sas_port_delete_phy(phy->port, phy->phy);
1723 if (phy->port->num_phys == 0) 1759 if (phy->port->num_phys == 0)
@@ -1770,15 +1806,31 @@ static int sas_discover_new(struct domain_device *dev, int phy_id)
1770{ 1806{
1771 struct ex_phy *ex_phy = &dev->ex_dev.ex_phy[phy_id]; 1807 struct ex_phy *ex_phy = &dev->ex_dev.ex_phy[phy_id];
1772 struct domain_device *child; 1808 struct domain_device *child;
1773 int res; 1809 bool found = false;
1810 int res, i;
1774 1811
1775 SAS_DPRINTK("ex %016llx phy%d new device attached\n", 1812 SAS_DPRINTK("ex %016llx phy%d new device attached\n",
1776 SAS_ADDR(dev->sas_addr), phy_id); 1813 SAS_ADDR(dev->sas_addr), phy_id);
1777 res = sas_ex_phy_discover(dev, phy_id); 1814 res = sas_ex_phy_discover(dev, phy_id);
1778 if (res) 1815 if (res)
1779 goto out; 1816 goto out;
1817 /* to support the wide port inserted */
1818 for (i = 0; i < dev->ex_dev.num_phys; i++) {
1819 struct ex_phy *ex_phy_temp = &dev->ex_dev.ex_phy[i];
1820 if (i == phy_id)
1821 continue;
1822 if (SAS_ADDR(ex_phy_temp->attached_sas_addr) ==
1823 SAS_ADDR(ex_phy->attached_sas_addr)) {
1824 found = true;
1825 break;
1826 }
1827 }
1828 if (found) {
1829 sas_ex_join_wide_port(dev, phy_id);
1830 return 0;
1831 }
1780 res = sas_ex_discover_devices(dev, phy_id); 1832 res = sas_ex_discover_devices(dev, phy_id);
1781 if (res) 1833 if (!res)
1782 goto out; 1834 goto out;
1783 list_for_each_entry(child, &dev->ex_dev.children, siblings) { 1835 list_for_each_entry(child, &dev->ex_dev.children, siblings) {
1784 if (SAS_ADDR(child->sas_addr) == 1836 if (SAS_ADDR(child->sas_addr) ==
@@ -1793,7 +1845,7 @@ out:
1793 return res; 1845 return res;
1794} 1846}
1795 1847
1796static int sas_rediscover_dev(struct domain_device *dev, int phy_id) 1848static int sas_rediscover_dev(struct domain_device *dev, int phy_id, bool last)
1797{ 1849{
1798 struct expander_device *ex = &dev->ex_dev; 1850 struct expander_device *ex = &dev->ex_dev;
1799 struct ex_phy *phy = &ex->ex_phy[phy_id]; 1851 struct ex_phy *phy = &ex->ex_phy[phy_id];
@@ -1804,11 +1856,11 @@ static int sas_rediscover_dev(struct domain_device *dev, int phy_id)
1804 switch (res) { 1856 switch (res) {
1805 case SMP_RESP_NO_PHY: 1857 case SMP_RESP_NO_PHY:
1806 phy->phy_state = PHY_NOT_PRESENT; 1858 phy->phy_state = PHY_NOT_PRESENT;
1807 sas_unregister_devs_sas_addr(dev, phy_id); 1859 sas_unregister_devs_sas_addr(dev, phy_id, last);
1808 goto out; break; 1860 goto out; break;
1809 case SMP_RESP_PHY_VACANT: 1861 case SMP_RESP_PHY_VACANT:
1810 phy->phy_state = PHY_VACANT; 1862 phy->phy_state = PHY_VACANT;
1811 sas_unregister_devs_sas_addr(dev, phy_id); 1863 sas_unregister_devs_sas_addr(dev, phy_id, last);
1812 goto out; break; 1864 goto out; break;
1813 case SMP_RESP_FUNC_ACC: 1865 case SMP_RESP_FUNC_ACC:
1814 break; 1866 break;
@@ -1816,7 +1868,7 @@ static int sas_rediscover_dev(struct domain_device *dev, int phy_id)
1816 1868
1817 if (SAS_ADDR(attached_sas_addr) == 0) { 1869 if (SAS_ADDR(attached_sas_addr) == 0) {
1818 phy->phy_state = PHY_EMPTY; 1870 phy->phy_state = PHY_EMPTY;
1819 sas_unregister_devs_sas_addr(dev, phy_id); 1871 sas_unregister_devs_sas_addr(dev, phy_id, last);
1820 } else if (SAS_ADDR(attached_sas_addr) == 1872 } else if (SAS_ADDR(attached_sas_addr) ==
1821 SAS_ADDR(phy->attached_sas_addr)) { 1873 SAS_ADDR(phy->attached_sas_addr)) {
1822 SAS_DPRINTK("ex %016llx phy 0x%x broadcast flutter\n", 1874 SAS_DPRINTK("ex %016llx phy 0x%x broadcast flutter\n",
@@ -1828,12 +1880,27 @@ out:
1828 return res; 1880 return res;
1829} 1881}
1830 1882
1883/**
1884 * sas_rediscover - revalidate the domain.
1885 * @dev:domain device to be detect.
1886 * @phy_id: the phy id will be detected.
1887 *
1888 * NOTE: this process _must_ quit (return) as soon as any connection
1889 * errors are encountered. Connection recovery is done elsewhere.
1890 * Discover process only interrogates devices in order to discover the
1891 * domain.For plugging out, we un-register the device only when it is
1892 * the last phy in the port, for other phys in this port, we just delete it
1893 * from the port.For inserting, we do discovery when it is the
1894 * first phy,for other phys in this port, we add it to the port to
1895 * forming the wide-port.
1896 */
1831static int sas_rediscover(struct domain_device *dev, const int phy_id) 1897static int sas_rediscover(struct domain_device *dev, const int phy_id)
1832{ 1898{
1833 struct expander_device *ex = &dev->ex_dev; 1899 struct expander_device *ex = &dev->ex_dev;
1834 struct ex_phy *changed_phy = &ex->ex_phy[phy_id]; 1900 struct ex_phy *changed_phy = &ex->ex_phy[phy_id];
1835 int res = 0; 1901 int res = 0;
1836 int i; 1902 int i;
1903 bool last = true; /* is this the last phy of the port */
1837 1904
1838 SAS_DPRINTK("ex %016llx phy%d originated BROADCAST(CHANGE)\n", 1905 SAS_DPRINTK("ex %016llx phy%d originated BROADCAST(CHANGE)\n",
1839 SAS_ADDR(dev->sas_addr), phy_id); 1906 SAS_ADDR(dev->sas_addr), phy_id);
@@ -1848,13 +1915,13 @@ static int sas_rediscover(struct domain_device *dev, const int phy_id)
1848 SAS_ADDR(changed_phy->attached_sas_addr)) { 1915 SAS_ADDR(changed_phy->attached_sas_addr)) {
1849 SAS_DPRINTK("phy%d part of wide port with " 1916 SAS_DPRINTK("phy%d part of wide port with "
1850 "phy%d\n", phy_id, i); 1917 "phy%d\n", phy_id, i);
1851 goto out; 1918 last = false;
1919 break;
1852 } 1920 }
1853 } 1921 }
1854 res = sas_rediscover_dev(dev, phy_id); 1922 res = sas_rediscover_dev(dev, phy_id, last);
1855 } else 1923 } else
1856 res = sas_discover_new(dev, phy_id); 1924 res = sas_discover_new(dev, phy_id);
1857out:
1858 return res; 1925 return res;
1859} 1926}
1860 1927
@@ -1881,7 +1948,7 @@ int sas_ex_revalidate_domain(struct domain_device *port_dev)
1881 1948
1882 do { 1949 do {
1883 phy_id = -1; 1950 phy_id = -1;
1884 res = sas_find_bcast_phy(dev, &phy_id, i); 1951 res = sas_find_bcast_phy(dev, &phy_id, i, true);
1885 if (phy_id == -1) 1952 if (phy_id == -1)
1886 break; 1953 break;
1887 res = sas_rediscover(dev, phy_id); 1954 res = sas_rediscover(dev, phy_id);
diff --git a/drivers/scsi/libsas/sas_port.c b/drivers/scsi/libsas/sas_port.c
index e6ac59c023f1..fe8b74c706d2 100644
--- a/drivers/scsi/libsas/sas_port.c
+++ b/drivers/scsi/libsas/sas_port.c
@@ -56,7 +56,7 @@ static void sas_form_port(struct asd_sas_phy *phy)
56 } 56 }
57 } 57 }
58 58
59 /* find a port */ 59 /* see if the phy should be part of a wide port */
60 spin_lock_irqsave(&sas_ha->phy_port_lock, flags); 60 spin_lock_irqsave(&sas_ha->phy_port_lock, flags);
61 for (i = 0; i < sas_ha->num_phys; i++) { 61 for (i = 0; i < sas_ha->num_phys; i++) {
62 port = sas_ha->sas_port[i]; 62 port = sas_ha->sas_port[i];
@@ -69,12 +69,23 @@ static void sas_form_port(struct asd_sas_phy *phy)
69 SAS_DPRINTK("phy%d matched wide port%d\n", phy->id, 69 SAS_DPRINTK("phy%d matched wide port%d\n", phy->id,
70 port->id); 70 port->id);
71 break; 71 break;
72 } else if (*(u64 *) port->sas_addr == 0 && port->num_phys==0) {
73 memcpy(port->sas_addr, phy->sas_addr, SAS_ADDR_SIZE);
74 break;
75 } 72 }
76 spin_unlock(&port->phy_list_lock); 73 spin_unlock(&port->phy_list_lock);
77 } 74 }
75 /* The phy does not match any existing port, create a new one */
76 if (i == sas_ha->num_phys) {
77 for (i = 0; i < sas_ha->num_phys; i++) {
78 port = sas_ha->sas_port[i];
79 spin_lock(&port->phy_list_lock);
80 if (*(u64 *)port->sas_addr == 0
81 && port->num_phys == 0) {
82 memcpy(port->sas_addr, phy->sas_addr,
83 SAS_ADDR_SIZE);
84 break;
85 }
86 spin_unlock(&port->phy_list_lock);
87 }
88 }
78 89
79 if (i >= sas_ha->num_phys) { 90 if (i >= sas_ha->num_phys) {
80 printk(KERN_NOTICE "%s: couldn't find a free port, bug?\n", 91 printk(KERN_NOTICE "%s: couldn't find a free port, bug?\n",
diff --git a/drivers/scsi/qla4xxx/ql4_dbg.c b/drivers/scsi/qla4xxx/ql4_dbg.c
index fcc184cd066d..cbceb0ebabf7 100644
--- a/drivers/scsi/qla4xxx/ql4_dbg.c
+++ b/drivers/scsi/qla4xxx/ql4_dbg.c
@@ -15,19 +15,18 @@ void qla4xxx_dump_buffer(void *b, uint32_t size)
15 uint32_t cnt; 15 uint32_t cnt;
16 uint8_t *c = b; 16 uint8_t *c = b;
17 17
18 printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh " 18 printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh "
19 "Fh\n"); 19 "Fh\n");
20 printk("------------------------------------------------------------" 20 printk("------------------------------------------------------------"
21 "--\n"); 21 "--\n");
22 for (cnt = 0; cnt < size; cnt++, c++) { 22 for (cnt = 0; cnt < size; c++) {
23 printk(KERN_DEBUG "%02x", *c); 23 printk(KERN_INFO "%02x", *c);
24 if (!(cnt % 16)) 24 if (!(++cnt % 16))
25 printk(KERN_DEBUG "\n"); 25 printk(KERN_INFO "\n");
26 26
27 else 27 else
28 printk(KERN_DEBUG " "); 28 printk(KERN_INFO " ");
29 } 29 }
30 if (cnt % 16) 30 printk(KERN_INFO "\n");
31 printk(KERN_DEBUG "\n");
32} 31}
33 32
diff --git a/drivers/scsi/qla4xxx/ql4_def.h b/drivers/scsi/qla4xxx/ql4_def.h
index b586f27c3bd4..81b5f29254e2 100644
--- a/drivers/scsi/qla4xxx/ql4_def.h
+++ b/drivers/scsi/qla4xxx/ql4_def.h
@@ -100,7 +100,6 @@
100#define MAX_SRBS MAX_CMDS_TO_RISC 100#define MAX_SRBS MAX_CMDS_TO_RISC
101#define MBOX_AEN_REG_COUNT 5 101#define MBOX_AEN_REG_COUNT 5
102#define MAX_INIT_RETRIES 5 102#define MAX_INIT_RETRIES 5
103#define IOCB_HIWAT_CUSHION 16
104 103
105/* 104/*
106 * Buffer sizes 105 * Buffer sizes
@@ -184,6 +183,11 @@ struct srb {
184 uint16_t cc_stat; 183 uint16_t cc_stat;
185 u_long r_start; /* Time we recieve a cmd from OS */ 184 u_long r_start; /* Time we recieve a cmd from OS */
186 u_long u_start; /* Time when we handed the cmd to F/W */ 185 u_long u_start; /* Time when we handed the cmd to F/W */
186
187 /* Used for extended sense / status continuation */
188 uint8_t *req_sense_ptr;
189 uint16_t req_sense_len;
190 uint16_t reserved2;
187}; 191};
188 192
189/* 193/*
@@ -302,7 +306,6 @@ struct scsi_qla_host {
302 uint32_t tot_ddbs; 306 uint32_t tot_ddbs;
303 307
304 uint16_t iocb_cnt; 308 uint16_t iocb_cnt;
305 uint16_t iocb_hiwat;
306 309
307 /* SRB cache. */ 310 /* SRB cache. */
308#define SRB_MIN_REQ 128 311#define SRB_MIN_REQ 128
@@ -436,6 +439,8 @@ struct scsi_qla_host {
436 /* Map ddb_list entry by FW ddb index */ 439 /* Map ddb_list entry by FW ddb index */
437 struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES]; 440 struct ddb_entry *fw_ddb_index_map[MAX_DDB_ENTRIES];
438 441
442 /* Saved srb for status continuation entry processing */
443 struct srb *status_srb;
439}; 444};
440 445
441static inline int is_qla4010(struct scsi_qla_host *ha) 446static inline int is_qla4010(struct scsi_qla_host *ha)
diff --git a/drivers/scsi/qla4xxx/ql4_fw.h b/drivers/scsi/qla4xxx/ql4_fw.h
index 1b667a70cffa..9cd7a608df38 100644
--- a/drivers/scsi/qla4xxx/ql4_fw.h
+++ b/drivers/scsi/qla4xxx/ql4_fw.h
@@ -572,6 +572,7 @@ struct conn_event_log_entry {
572 *************************************************************************/ 572 *************************************************************************/
573#define IOCB_MAX_CDB_LEN 16 /* Bytes in a CBD */ 573#define IOCB_MAX_CDB_LEN 16 /* Bytes in a CBD */
574#define IOCB_MAX_SENSEDATA_LEN 32 /* Bytes of sense data */ 574#define IOCB_MAX_SENSEDATA_LEN 32 /* Bytes of sense data */
575#define IOCB_MAX_EXT_SENSEDATA_LEN 60 /* Bytes of extended sense data */
575 576
576/* IOCB header structure */ 577/* IOCB header structure */
577struct qla4_header { 578struct qla4_header {
@@ -733,6 +734,12 @@ struct status_entry {
733 734
734}; 735};
735 736
737/* Status Continuation entry */
738struct status_cont_entry {
739 struct qla4_header hdr; /* 00-03 */
740 uint8_t ext_sense_data[IOCB_MAX_EXT_SENSEDATA_LEN]; /* 04-63 */
741};
742
736struct passthru0 { 743struct passthru0 {
737 struct qla4_header hdr; /* 00-03 */ 744 struct qla4_header hdr; /* 00-03 */
738 uint32_t handle; /* 04-07 */ 745 uint32_t handle; /* 04-07 */
diff --git a/drivers/scsi/qla4xxx/ql4_iocb.c b/drivers/scsi/qla4xxx/ql4_iocb.c
index 912a67494adf..e0c32159749c 100644
--- a/drivers/scsi/qla4xxx/ql4_iocb.c
+++ b/drivers/scsi/qla4xxx/ql4_iocb.c
@@ -10,9 +10,42 @@
10#include "ql4_dbg.h" 10#include "ql4_dbg.h"
11#include "ql4_inline.h" 11#include "ql4_inline.h"
12 12
13
14#include <scsi/scsi_tcq.h> 13#include <scsi/scsi_tcq.h>
15 14
15static int
16qla4xxx_space_in_req_ring(struct scsi_qla_host *ha, uint16_t req_cnt)
17{
18 uint16_t cnt;
19
20 /* Calculate number of free request entries. */
21 if ((req_cnt + 2) >= ha->req_q_count) {
22 cnt = (uint16_t) le32_to_cpu(ha->shadow_regs->req_q_out);
23 if (ha->request_in < cnt)
24 ha->req_q_count = cnt - ha->request_in;
25 else
26 ha->req_q_count = REQUEST_QUEUE_DEPTH -
27 (ha->request_in - cnt);
28 }
29
30 /* Check if room for request in request ring. */
31 if ((req_cnt + 2) < ha->req_q_count)
32 return 1;
33 else
34 return 0;
35}
36
37static void qla4xxx_advance_req_ring_ptr(struct scsi_qla_host *ha)
38{
39 /* Advance request queue pointer */
40 if (ha->request_in == (REQUEST_QUEUE_DEPTH - 1)) {
41 ha->request_in = 0;
42 ha->request_ptr = ha->request_ring;
43 } else {
44 ha->request_in++;
45 ha->request_ptr++;
46 }
47}
48
16/** 49/**
17 * qla4xxx_get_req_pkt - returns a valid entry in request queue. 50 * qla4xxx_get_req_pkt - returns a valid entry in request queue.
18 * @ha: Pointer to host adapter structure. 51 * @ha: Pointer to host adapter structure.
@@ -26,35 +59,18 @@
26static int qla4xxx_get_req_pkt(struct scsi_qla_host *ha, 59static int qla4xxx_get_req_pkt(struct scsi_qla_host *ha,
27 struct queue_entry **queue_entry) 60 struct queue_entry **queue_entry)
28{ 61{
29 uint16_t request_in; 62 uint16_t req_cnt = 1;
30 uint8_t status = QLA_SUCCESS;
31
32 *queue_entry = ha->request_ptr;
33 63
34 /* get the latest request_in and request_out index */ 64 if (qla4xxx_space_in_req_ring(ha, req_cnt)) {
35 request_in = ha->request_in; 65 *queue_entry = ha->request_ptr;
36 ha->request_out = (uint16_t) le32_to_cpu(ha->shadow_regs->req_q_out);
37
38 /* Advance request queue pointer and check for queue full */
39 if (request_in == (REQUEST_QUEUE_DEPTH - 1)) {
40 request_in = 0;
41 ha->request_ptr = ha->request_ring;
42 } else {
43 request_in++;
44 ha->request_ptr++;
45 }
46
47 /* request queue is full, try again later */
48 if ((ha->iocb_cnt + 1) >= ha->iocb_hiwat) {
49 /* restore request pointer */
50 ha->request_ptr = *queue_entry;
51 status = QLA_ERROR;
52 } else {
53 ha->request_in = request_in;
54 memset(*queue_entry, 0, sizeof(**queue_entry)); 66 memset(*queue_entry, 0, sizeof(**queue_entry));
67
68 qla4xxx_advance_req_ring_ptr(ha);
69 ha->req_q_count -= req_cnt;
70 return QLA_SUCCESS;
55 } 71 }
56 72
57 return status; 73 return QLA_ERROR;
58} 74}
59 75
60/** 76/**
@@ -100,21 +116,14 @@ exit_send_marker:
100 return status; 116 return status;
101} 117}
102 118
103static struct continuation_t1_entry* qla4xxx_alloc_cont_entry( 119static struct continuation_t1_entry *
104 struct scsi_qla_host *ha) 120qla4xxx_alloc_cont_entry(struct scsi_qla_host *ha)
105{ 121{
106 struct continuation_t1_entry *cont_entry; 122 struct continuation_t1_entry *cont_entry;
107 123
108 cont_entry = (struct continuation_t1_entry *)ha->request_ptr; 124 cont_entry = (struct continuation_t1_entry *)ha->request_ptr;
109 125
110 /* Advance request queue pointer */ 126 qla4xxx_advance_req_ring_ptr(ha);
111 if (ha->request_in == (REQUEST_QUEUE_DEPTH - 1)) {
112 ha->request_in = 0;
113 ha->request_ptr = ha->request_ring;
114 } else {
115 ha->request_in++;
116 ha->request_ptr++;
117 }
118 127
119 /* Load packet defaults */ 128 /* Load packet defaults */
120 cont_entry->hdr.entryType = ET_CONTINUE; 129 cont_entry->hdr.entryType = ET_CONTINUE;
@@ -197,13 +206,10 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
197 struct scsi_cmnd *cmd = srb->cmd; 206 struct scsi_cmnd *cmd = srb->cmd;
198 struct ddb_entry *ddb_entry; 207 struct ddb_entry *ddb_entry;
199 struct command_t3_entry *cmd_entry; 208 struct command_t3_entry *cmd_entry;
200
201 int nseg; 209 int nseg;
202 uint16_t tot_dsds; 210 uint16_t tot_dsds;
203 uint16_t req_cnt; 211 uint16_t req_cnt;
204
205 unsigned long flags; 212 unsigned long flags;
206 uint16_t cnt;
207 uint32_t index; 213 uint32_t index;
208 char tag[2]; 214 char tag[2];
209 215
@@ -217,6 +223,19 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
217 223
218 index = (uint32_t)cmd->request->tag; 224 index = (uint32_t)cmd->request->tag;
219 225
226 /*
227 * Check to see if adapter is online before placing request on
228 * request queue. If a reset occurs and a request is in the queue,
229 * the firmware will still attempt to process the request, retrieving
230 * garbage for pointers.
231 */
232 if (!test_bit(AF_ONLINE, &ha->flags)) {
233 DEBUG2(printk("scsi%ld: %s: Adapter OFFLINE! "
234 "Do not issue command.\n",
235 ha->host_no, __func__));
236 goto queuing_error;
237 }
238
220 /* Calculate the number of request entries needed. */ 239 /* Calculate the number of request entries needed. */
221 nseg = scsi_dma_map(cmd); 240 nseg = scsi_dma_map(cmd);
222 if (nseg < 0) 241 if (nseg < 0)
@@ -224,17 +243,7 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
224 tot_dsds = nseg; 243 tot_dsds = nseg;
225 244
226 req_cnt = qla4xxx_calc_request_entries(tot_dsds); 245 req_cnt = qla4xxx_calc_request_entries(tot_dsds);
227 246 if (!qla4xxx_space_in_req_ring(ha, req_cnt))
228 if (ha->req_q_count < (req_cnt + 2)) {
229 cnt = (uint16_t) le32_to_cpu(ha->shadow_regs->req_q_out);
230 if (ha->request_in < cnt)
231 ha->req_q_count = cnt - ha->request_in;
232 else
233 ha->req_q_count = REQUEST_QUEUE_DEPTH -
234 (ha->request_in - cnt);
235 }
236
237 if (ha->req_q_count < (req_cnt + 2))
238 goto queuing_error; 247 goto queuing_error;
239 248
240 /* total iocbs active */ 249 /* total iocbs active */
@@ -286,32 +295,10 @@ int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb)
286 break; 295 break;
287 } 296 }
288 297
289 298 qla4xxx_advance_req_ring_ptr(ha);
290 /* Advance request queue pointer */
291 ha->request_in++;
292 if (ha->request_in == REQUEST_QUEUE_DEPTH) {
293 ha->request_in = 0;
294 ha->request_ptr = ha->request_ring;
295 } else
296 ha->request_ptr++;
297
298
299 qla4xxx_build_scsi_iocbs(srb, cmd_entry, tot_dsds); 299 qla4xxx_build_scsi_iocbs(srb, cmd_entry, tot_dsds);
300 wmb(); 300 wmb();
301 301
302 /*
303 * Check to see if adapter is online before placing request on
304 * request queue. If a reset occurs and a request is in the queue,
305 * the firmware will still attempt to process the request, retrieving
306 * garbage for pointers.
307 */
308 if (!test_bit(AF_ONLINE, &ha->flags)) {
309 DEBUG2(printk("scsi%ld: %s: Adapter OFFLINE! "
310 "Do not issue command.\n",
311 ha->host_no, __func__));
312 goto queuing_error;
313 }
314
315 srb->cmd->host_scribble = (unsigned char *)srb; 302 srb->cmd->host_scribble = (unsigned char *)srb;
316 303
317 /* update counters */ 304 /* update counters */
diff --git a/drivers/scsi/qla4xxx/ql4_isr.c b/drivers/scsi/qla4xxx/ql4_isr.c
index 799120fcb9be..8025ee16588e 100644
--- a/drivers/scsi/qla4xxx/ql4_isr.c
+++ b/drivers/scsi/qla4xxx/ql4_isr.c
@@ -11,6 +11,98 @@
11#include "ql4_inline.h" 11#include "ql4_inline.h"
12 12
13/** 13/**
14 * qla4xxx_copy_sense - copy sense data into cmd sense buffer
15 * @ha: Pointer to host adapter structure.
16 * @sts_entry: Pointer to status entry structure.
17 * @srb: Pointer to srb structure.
18 **/
19static void qla4xxx_copy_sense(struct scsi_qla_host *ha,
20 struct status_entry *sts_entry,
21 struct srb *srb)
22{
23 struct scsi_cmnd *cmd = srb->cmd;
24 uint16_t sense_len;
25
26 memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
27 sense_len = le16_to_cpu(sts_entry->senseDataByteCnt);
28 if (sense_len == 0)
29 return;
30
31 /* Save total available sense length,
32 * not to exceed cmd's sense buffer size */
33 sense_len = min_t(uint16_t, sense_len, SCSI_SENSE_BUFFERSIZE);
34 srb->req_sense_ptr = cmd->sense_buffer;
35 srb->req_sense_len = sense_len;
36
37 /* Copy sense from sts_entry pkt */
38 sense_len = min_t(uint16_t, sense_len, IOCB_MAX_SENSEDATA_LEN);
39 memcpy(cmd->sense_buffer, sts_entry->senseData, sense_len);
40
41 DEBUG2(printk(KERN_INFO "scsi%ld:%d:%d:%d: %s: sense key = %x, "
42 "ASL= %02x, ASC/ASCQ = %02x/%02x\n", ha->host_no,
43 cmd->device->channel, cmd->device->id,
44 cmd->device->lun, __func__,
45 sts_entry->senseData[2] & 0x0f,
46 sts_entry->senseData[7],
47 sts_entry->senseData[12],
48 sts_entry->senseData[13]));
49
50 DEBUG5(qla4xxx_dump_buffer(cmd->sense_buffer, sense_len));
51 srb->flags |= SRB_GOT_SENSE;
52
53 /* Update srb, in case a sts_cont pkt follows */
54 srb->req_sense_ptr += sense_len;
55 srb->req_sense_len -= sense_len;
56 if (srb->req_sense_len != 0)
57 ha->status_srb = srb;
58 else
59 ha->status_srb = NULL;
60}
61
62/**
63 * qla4xxx_status_cont_entry - Process a Status Continuations entry.
64 * @ha: SCSI driver HA context
65 * @sts_cont: Entry pointer
66 *
67 * Extended sense data.
68 */
69static void
70qla4xxx_status_cont_entry(struct scsi_qla_host *ha,
71 struct status_cont_entry *sts_cont)
72{
73 struct srb *srb = ha->status_srb;
74 struct scsi_cmnd *cmd;
75 uint8_t sense_len;
76
77 if (srb == NULL)
78 return;
79
80 cmd = srb->cmd;
81 if (cmd == NULL) {
82 DEBUG2(printk(KERN_INFO "scsi%ld: %s: Cmd already returned "
83 "back to OS srb=%p srb->state:%d\n", ha->host_no,
84 __func__, srb, srb->state));
85 ha->status_srb = NULL;
86 return;
87 }
88
89 /* Copy sense data. */
90 sense_len = min_t(uint16_t, srb->req_sense_len,
91 IOCB_MAX_EXT_SENSEDATA_LEN);
92 memcpy(srb->req_sense_ptr, sts_cont->ext_sense_data, sense_len);
93 DEBUG5(qla4xxx_dump_buffer(srb->req_sense_ptr, sense_len));
94
95 srb->req_sense_ptr += sense_len;
96 srb->req_sense_len -= sense_len;
97
98 /* Place command on done queue. */
99 if (srb->req_sense_len == 0) {
100 qla4xxx_srb_compl(ha, srb);
101 ha->status_srb = NULL;
102 }
103}
104
105/**
14 * qla4xxx_status_entry - processes status IOCBs 106 * qla4xxx_status_entry - processes status IOCBs
15 * @ha: Pointer to host adapter structure. 107 * @ha: Pointer to host adapter structure.
16 * @sts_entry: Pointer to status entry structure. 108 * @sts_entry: Pointer to status entry structure.
@@ -23,7 +115,6 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
23 struct srb *srb; 115 struct srb *srb;
24 struct ddb_entry *ddb_entry; 116 struct ddb_entry *ddb_entry;
25 uint32_t residual; 117 uint32_t residual;
26 uint16_t sensebytecnt;
27 118
28 srb = qla4xxx_del_from_active_array(ha, le32_to_cpu(sts_entry->handle)); 119 srb = qla4xxx_del_from_active_array(ha, le32_to_cpu(sts_entry->handle));
29 if (!srb) { 120 if (!srb) {
@@ -92,24 +183,7 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
92 break; 183 break;
93 184
94 /* Copy Sense Data into sense buffer. */ 185 /* Copy Sense Data into sense buffer. */
95 memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 186 qla4xxx_copy_sense(ha, sts_entry, srb);
96
97 sensebytecnt = le16_to_cpu(sts_entry->senseDataByteCnt);
98 if (sensebytecnt == 0)
99 break;
100
101 memcpy(cmd->sense_buffer, sts_entry->senseData,
102 min_t(uint16_t, sensebytecnt, SCSI_SENSE_BUFFERSIZE));
103
104 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: sense key = %x, "
105 "ASC/ASCQ = %02x/%02x\n", ha->host_no,
106 cmd->device->channel, cmd->device->id,
107 cmd->device->lun, __func__,
108 sts_entry->senseData[2] & 0x0f,
109 sts_entry->senseData[12],
110 sts_entry->senseData[13]));
111
112 srb->flags |= SRB_GOT_SENSE;
113 break; 187 break;
114 188
115 case SCS_INCOMPLETE: 189 case SCS_INCOMPLETE:
@@ -176,23 +250,7 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
176 break; 250 break;
177 251
178 /* Copy Sense Data into sense buffer. */ 252 /* Copy Sense Data into sense buffer. */
179 memset(cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); 253 qla4xxx_copy_sense(ha, sts_entry, srb);
180
181 sensebytecnt =
182 le16_to_cpu(sts_entry->senseDataByteCnt);
183 if (sensebytecnt == 0)
184 break;
185
186 memcpy(cmd->sense_buffer, sts_entry->senseData,
187 min_t(uint16_t, sensebytecnt, SCSI_SENSE_BUFFERSIZE));
188
189 DEBUG2(printk("scsi%ld:%d:%d:%d: %s: sense key = %x, "
190 "ASC/ASCQ = %02x/%02x\n", ha->host_no,
191 cmd->device->channel, cmd->device->id,
192 cmd->device->lun, __func__,
193 sts_entry->senseData[2] & 0x0f,
194 sts_entry->senseData[12],
195 sts_entry->senseData[13]));
196 } else { 254 } else {
197 /* 255 /*
198 * If RISC reports underrun and target does not 256 * If RISC reports underrun and target does not
@@ -268,9 +326,10 @@ static void qla4xxx_status_entry(struct scsi_qla_host *ha,
268 326
269status_entry_exit: 327status_entry_exit:
270 328
271 /* complete the request */ 329 /* complete the request, if not waiting for status_continuation pkt */
272 srb->cc_stat = sts_entry->completionStatus; 330 srb->cc_stat = sts_entry->completionStatus;
273 qla4xxx_srb_compl(ha, srb); 331 if (ha->status_srb == NULL)
332 qla4xxx_srb_compl(ha, srb);
274} 333}
275 334
276/** 335/**
@@ -305,10 +364,7 @@ static void qla4xxx_process_response_queue(struct scsi_qla_host * ha)
305 /* process entry */ 364 /* process entry */
306 switch (sts_entry->hdr.entryType) { 365 switch (sts_entry->hdr.entryType) {
307 case ET_STATUS: 366 case ET_STATUS:
308 /* 367 /* Common status */
309 * Common status - Single completion posted in single
310 * IOSB.
311 */
312 qla4xxx_status_entry(ha, sts_entry); 368 qla4xxx_status_entry(ha, sts_entry);
313 break; 369 break;
314 370
@@ -316,9 +372,8 @@ static void qla4xxx_process_response_queue(struct scsi_qla_host * ha)
316 break; 372 break;
317 373
318 case ET_STATUS_CONTINUATION: 374 case ET_STATUS_CONTINUATION:
319 /* Just throw away the status continuation entries */ 375 qla4xxx_status_cont_entry(ha,
320 DEBUG2(printk("scsi%ld: %s: Status Continuation entry " 376 (struct status_cont_entry *) sts_entry);
321 "- ignoring\n", ha->host_no, __func__));
322 break; 377 break;
323 378
324 case ET_COMMAND: 379 case ET_COMMAND:
diff --git a/drivers/scsi/qla4xxx/ql4_mbx.c b/drivers/scsi/qla4xxx/ql4_mbx.c
index 051b0f5e8c8e..09d6d4b76f39 100644
--- a/drivers/scsi/qla4xxx/ql4_mbx.c
+++ b/drivers/scsi/qla4xxx/ql4_mbx.c
@@ -385,16 +385,6 @@ int qla4xxx_get_firmware_status(struct scsi_qla_host * ha)
385 mbox_sts[0])); 385 mbox_sts[0]));
386 return QLA_ERROR; 386 return QLA_ERROR;
387 } 387 }
388
389 /* High-water mark of IOCBs */
390 ha->iocb_hiwat = mbox_sts[2];
391 if (ha->iocb_hiwat > IOCB_HIWAT_CUSHION)
392 ha->iocb_hiwat -= IOCB_HIWAT_CUSHION;
393 else
394 dev_info(&ha->pdev->dev, "WARNING!!! You have less than %d "
395 "firmware IOCBs available (%d).\n",
396 IOCB_HIWAT_CUSHION, ha->iocb_hiwat);
397
398 return QLA_SUCCESS; 388 return QLA_SUCCESS;
399} 389}
400 390
diff --git a/drivers/scsi/qla4xxx/ql4_os.c b/drivers/scsi/qla4xxx/ql4_os.c
index ec9da6ce8489..40e3cafb3a9c 100644
--- a/drivers/scsi/qla4xxx/ql4_os.c
+++ b/drivers/scsi/qla4xxx/ql4_os.c
@@ -66,6 +66,7 @@ static int qla4xxx_sess_get_param(struct iscsi_cls_session *sess,
66static int qla4xxx_host_get_param(struct Scsi_Host *shost, 66static int qla4xxx_host_get_param(struct Scsi_Host *shost,
67 enum iscsi_host_param param, char *buf); 67 enum iscsi_host_param param, char *buf);
68static void qla4xxx_recovery_timedout(struct iscsi_cls_session *session); 68static void qla4xxx_recovery_timedout(struct iscsi_cls_session *session);
69static enum blk_eh_timer_return qla4xxx_eh_cmd_timed_out(struct scsi_cmnd *sc);
69 70
70/* 71/*
71 * SCSI host template entry points 72 * SCSI host template entry points
@@ -89,6 +90,7 @@ static struct scsi_host_template qla4xxx_driver_template = {
89 .eh_device_reset_handler = qla4xxx_eh_device_reset, 90 .eh_device_reset_handler = qla4xxx_eh_device_reset,
90 .eh_target_reset_handler = qla4xxx_eh_target_reset, 91 .eh_target_reset_handler = qla4xxx_eh_target_reset,
91 .eh_host_reset_handler = qla4xxx_eh_host_reset, 92 .eh_host_reset_handler = qla4xxx_eh_host_reset,
93 .eh_timed_out = qla4xxx_eh_cmd_timed_out,
92 94
93 .slave_configure = qla4xxx_slave_configure, 95 .slave_configure = qla4xxx_slave_configure,
94 .slave_alloc = qla4xxx_slave_alloc, 96 .slave_alloc = qla4xxx_slave_alloc,
@@ -124,6 +126,21 @@ static struct iscsi_transport qla4xxx_iscsi_transport = {
124 126
125static struct scsi_transport_template *qla4xxx_scsi_transport; 127static struct scsi_transport_template *qla4xxx_scsi_transport;
126 128
129static enum blk_eh_timer_return qla4xxx_eh_cmd_timed_out(struct scsi_cmnd *sc)
130{
131 struct iscsi_cls_session *session;
132 struct ddb_entry *ddb_entry;
133
134 session = starget_to_session(scsi_target(sc->device));
135 ddb_entry = session->dd_data;
136
137 /* if we are not logged in then the LLD is going to clean up the cmd */
138 if (atomic_read(&ddb_entry->state) != DDB_STATE_ONLINE)
139 return BLK_EH_RESET_TIMER;
140 else
141 return BLK_EH_NOT_HANDLED;
142}
143
127static void qla4xxx_recovery_timedout(struct iscsi_cls_session *session) 144static void qla4xxx_recovery_timedout(struct iscsi_cls_session *session)
128{ 145{
129 struct ddb_entry *ddb_entry = session->dd_data; 146 struct ddb_entry *ddb_entry = session->dd_data;
@@ -904,18 +921,17 @@ static int qla4xxx_recover_adapter(struct scsi_qla_host *ha,
904 /* Flush any pending ddb changed AENs */ 921 /* Flush any pending ddb changed AENs */
905 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); 922 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS);
906 923
924 qla4xxx_flush_active_srbs(ha);
925
907 /* Reset the firmware. If successful, function 926 /* Reset the firmware. If successful, function
908 * returns with ISP interrupts enabled. 927 * returns with ISP interrupts enabled.
909 */ 928 */
910 if (status == QLA_SUCCESS) { 929 DEBUG2(printk("scsi%ld: %s - Performing soft reset..\n",
911 DEBUG2(printk("scsi%ld: %s - Performing soft reset..\n", 930 ha->host_no, __func__));
912 ha->host_no, __func__)); 931 if (ql4xxx_lock_drvr_wait(ha) == QLA_SUCCESS)
913 qla4xxx_flush_active_srbs(ha); 932 status = qla4xxx_soft_reset(ha);
914 if (ql4xxx_lock_drvr_wait(ha) == QLA_SUCCESS) 933 else
915 status = qla4xxx_soft_reset(ha); 934 status = QLA_ERROR;
916 else
917 status = QLA_ERROR;
918 }
919 935
920 /* Flush any pending ddb changed AENs */ 936 /* Flush any pending ddb changed AENs */
921 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); 937 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS);
@@ -1527,11 +1543,9 @@ static int qla4xxx_eh_device_reset(struct scsi_cmnd *cmd)
1527{ 1543{
1528 struct scsi_qla_host *ha = to_qla_host(cmd->device->host); 1544 struct scsi_qla_host *ha = to_qla_host(cmd->device->host);
1529 struct ddb_entry *ddb_entry = cmd->device->hostdata; 1545 struct ddb_entry *ddb_entry = cmd->device->hostdata;
1530 struct srb *sp;
1531 int ret = FAILED, stat; 1546 int ret = FAILED, stat;
1532 1547
1533 sp = (struct srb *) cmd->SCp.ptr; 1548 if (!ddb_entry)
1534 if (!sp || !ddb_entry)
1535 return ret; 1549 return ret;
1536 1550
1537 dev_info(&ha->pdev->dev, 1551 dev_info(&ha->pdev->dev,
@@ -1644,7 +1658,7 @@ static int qla4xxx_eh_host_reset(struct scsi_cmnd *cmd)
1644 ha = (struct scsi_qla_host *) cmd->device->host->hostdata; 1658 ha = (struct scsi_qla_host *) cmd->device->host->hostdata;
1645 1659
1646 dev_info(&ha->pdev->dev, 1660 dev_info(&ha->pdev->dev,
1647 "scsi(%ld:%d:%d:%d): ADAPTER RESET ISSUED.\n", ha->host_no, 1661 "scsi(%ld:%d:%d:%d): HOST RESET ISSUED.\n", ha->host_no,
1648 cmd->device->channel, cmd->device->id, cmd->device->lun); 1662 cmd->device->channel, cmd->device->id, cmd->device->lun);
1649 1663
1650 if (qla4xxx_wait_for_hba_online(ha) != QLA_SUCCESS) { 1664 if (qla4xxx_wait_for_hba_online(ha) != QLA_SUCCESS) {
diff --git a/drivers/scsi/qla4xxx/ql4_version.h b/drivers/scsi/qla4xxx/ql4_version.h
index ab984cb89cea..6980cb279c81 100644
--- a/drivers/scsi/qla4xxx/ql4_version.h
+++ b/drivers/scsi/qla4xxx/ql4_version.h
@@ -5,5 +5,5 @@
5 * See LICENSE.qla4xxx for copyright and licensing details. 5 * See LICENSE.qla4xxx for copyright and licensing details.
6 */ 6 */
7 7
8#define QLA4XXX_DRIVER_VERSION "5.01.00-k8" 8#define QLA4XXX_DRIVER_VERSION "5.01.00-k9"
9 9
diff --git a/drivers/scsi/scsi_transport_iscsi.c b/drivers/scsi/scsi_transport_iscsi.c
index 783e33c65eb7..b47240ca4b19 100644
--- a/drivers/scsi/scsi_transport_iscsi.c
+++ b/drivers/scsi/scsi_transport_iscsi.c
@@ -990,7 +990,7 @@ int iscsi_offload_mesg(struct Scsi_Host *shost,
990 struct iscsi_uevent *ev; 990 struct iscsi_uevent *ev;
991 int len = NLMSG_SPACE(sizeof(*ev) + data_size); 991 int len = NLMSG_SPACE(sizeof(*ev) + data_size);
992 992
993 skb = alloc_skb(len, GFP_NOIO); 993 skb = alloc_skb(len, GFP_ATOMIC);
994 if (!skb) { 994 if (!skb) {
995 printk(KERN_ERR "can not deliver iscsi offload message:OOM\n"); 995 printk(KERN_ERR "can not deliver iscsi offload message:OOM\n");
996 return -ENOMEM; 996 return -ENOMEM;
@@ -1012,7 +1012,7 @@ int iscsi_offload_mesg(struct Scsi_Host *shost,
1012 1012
1013 memcpy((char *)ev + sizeof(*ev), data, data_size); 1013 memcpy((char *)ev + sizeof(*ev), data, data_size);
1014 1014
1015 return iscsi_multicast_skb(skb, ISCSI_NL_GRP_UIP, GFP_NOIO); 1015 return iscsi_multicast_skb(skb, ISCSI_NL_GRP_UIP, GFP_ATOMIC);
1016} 1016}
1017EXPORT_SYMBOL_GPL(iscsi_offload_mesg); 1017EXPORT_SYMBOL_GPL(iscsi_offload_mesg);
1018 1018
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c
index 5616cd780ff3..b7b9fec67a98 100644
--- a/drivers/scsi/sd.c
+++ b/drivers/scsi/sd.c
@@ -1840,6 +1840,18 @@ static void sd_read_block_characteristics(struct scsi_disk *sdkp)
1840 kfree(buffer); 1840 kfree(buffer);
1841} 1841}
1842 1842
1843static int sd_try_extended_inquiry(struct scsi_device *sdp)
1844{
1845 /*
1846 * Although VPD inquiries can go to SCSI-2 type devices,
1847 * some USB ones crash on receiving them, and the pages
1848 * we currently ask for are for SPC-3 and beyond
1849 */
1850 if (sdp->scsi_level > SCSI_SPC_2)
1851 return 1;
1852 return 0;
1853}
1854
1843/** 1855/**
1844 * sd_revalidate_disk - called the first time a new disk is seen, 1856 * sd_revalidate_disk - called the first time a new disk is seen,
1845 * performs disk spin up, read_capacity, etc. 1857 * performs disk spin up, read_capacity, etc.
@@ -1877,8 +1889,12 @@ static int sd_revalidate_disk(struct gendisk *disk)
1877 */ 1889 */
1878 if (sdkp->media_present) { 1890 if (sdkp->media_present) {
1879 sd_read_capacity(sdkp, buffer); 1891 sd_read_capacity(sdkp, buffer);
1880 sd_read_block_limits(sdkp); 1892
1881 sd_read_block_characteristics(sdkp); 1893 if (sd_try_extended_inquiry(sdp)) {
1894 sd_read_block_limits(sdkp);
1895 sd_read_block_characteristics(sdkp);
1896 }
1897
1882 sd_read_write_protect_flag(sdkp, buffer); 1898 sd_read_write_protect_flag(sdkp, buffer);
1883 sd_read_cache_type(sdkp, buffer); 1899 sd_read_cache_type(sdkp, buffer);
1884 sd_read_app_tag_own(sdkp, buffer); 1900 sd_read_app_tag_own(sdkp, buffer);
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 338b15c0a548..607d43a31048 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -1551,6 +1551,7 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
1551 if (ret) 1551 if (ret)
1552 goto err_add_port; 1552 goto err_add_port;
1553 1553
1554#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
1554 if (atmel_is_console_port(&port->uart) 1555 if (atmel_is_console_port(&port->uart)
1555 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) { 1556 && ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
1556 /* 1557 /*
@@ -1559,6 +1560,7 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
1559 */ 1560 */
1560 clk_disable(port->clk); 1561 clk_disable(port->clk);
1561 } 1562 }
1563#endif
1562 1564
1563 device_init_wakeup(&pdev->dev, 1); 1565 device_init_wakeup(&pdev->dev, 1);
1564 platform_set_drvdata(pdev, port); 1566 platform_set_drvdata(pdev, port);
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index 141c0a3333ad..a9802e76b5fa 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -132,7 +132,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
132 memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) + 132 memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
133 L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize); 133 L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
134 if (is_con) { 134 if (is_con) {
135 mem_addr = alloc_bootmem(memsz); 135 mem_addr = kzalloc(memsz, GFP_NOWAIT);
136 dma_addr = virt_to_bus(mem_addr); 136 dma_addr = virt_to_bus(mem_addr);
137 } 137 }
138 else 138 else
diff --git a/drivers/serial/s3c2400.c b/drivers/serial/s3c2400.c
index fb00ed5296e6..fed1a9a1ffb4 100644
--- a/drivers/serial/s3c2400.c
+++ b/drivers/serial/s3c2400.c
@@ -76,7 +76,7 @@ static int s3c2400_serial_probe(struct platform_device *dev)
76 return s3c24xx_serial_probe(dev, &s3c2400_uart_inf); 76 return s3c24xx_serial_probe(dev, &s3c2400_uart_inf);
77} 77}
78 78
79static struct platform_driver s3c2400_serial_drv = { 79static struct platform_driver s3c2400_serial_driver = {
80 .probe = s3c2400_serial_probe, 80 .probe = s3c2400_serial_probe,
81 .remove = __devexit_p(s3c24xx_serial_remove), 81 .remove = __devexit_p(s3c24xx_serial_remove),
82 .driver = { 82 .driver = {
@@ -85,16 +85,16 @@ static struct platform_driver s3c2400_serial_drv = {
85 }, 85 },
86}; 86};
87 87
88s3c24xx_console_init(&s3c2400_serial_drv, &s3c2400_uart_inf); 88s3c24xx_console_init(&s3c2400_serial_driver, &s3c2400_uart_inf);
89 89
90static inline int s3c2400_serial_init(void) 90static inline int s3c2400_serial_init(void)
91{ 91{
92 return s3c24xx_serial_init(&s3c2400_serial_drv, &s3c2400_uart_inf); 92 return s3c24xx_serial_init(&s3c2400_serial_driver, &s3c2400_uart_inf);
93} 93}
94 94
95static inline void s3c2400_serial_exit(void) 95static inline void s3c2400_serial_exit(void)
96{ 96{
97 platform_driver_unregister(&s3c2400_serial_drv); 97 platform_driver_unregister(&s3c2400_serial_driver);
98} 98}
99 99
100module_init(s3c2400_serial_init); 100module_init(s3c2400_serial_init);
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c
index b5d7cbcba2ae..c99f0821cae3 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/serial/s3c2410.c
@@ -88,7 +88,7 @@ static int s3c2410_serial_probe(struct platform_device *dev)
88 return s3c24xx_serial_probe(dev, &s3c2410_uart_inf); 88 return s3c24xx_serial_probe(dev, &s3c2410_uart_inf);
89} 89}
90 90
91static struct platform_driver s3c2410_serial_drv = { 91static struct platform_driver s3c2410_serial_driver = {
92 .probe = s3c2410_serial_probe, 92 .probe = s3c2410_serial_probe,
93 .remove = __devexit_p(s3c24xx_serial_remove), 93 .remove = __devexit_p(s3c24xx_serial_remove),
94 .driver = { 94 .driver = {
@@ -97,16 +97,16 @@ static struct platform_driver s3c2410_serial_drv = {
97 }, 97 },
98}; 98};
99 99
100s3c24xx_console_init(&s3c2410_serial_drv, &s3c2410_uart_inf); 100s3c24xx_console_init(&s3c2410_serial_driver, &s3c2410_uart_inf);
101 101
102static int __init s3c2410_serial_init(void) 102static int __init s3c2410_serial_init(void)
103{ 103{
104 return s3c24xx_serial_init(&s3c2410_serial_drv, &s3c2410_uart_inf); 104 return s3c24xx_serial_init(&s3c2410_serial_driver, &s3c2410_uart_inf);
105} 105}
106 106
107static void __exit s3c2410_serial_exit(void) 107static void __exit s3c2410_serial_exit(void)
108{ 108{
109 platform_driver_unregister(&s3c2410_serial_drv); 109 platform_driver_unregister(&s3c2410_serial_driver);
110} 110}
111 111
112module_init(s3c2410_serial_init); 112module_init(s3c2410_serial_init);
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c
index 11dcb90bdfef..6e057d8809d3 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/serial/s3c2412.c
@@ -121,7 +121,7 @@ static int s3c2412_serial_probe(struct platform_device *dev)
121 return s3c24xx_serial_probe(dev, &s3c2412_uart_inf); 121 return s3c24xx_serial_probe(dev, &s3c2412_uart_inf);
122} 122}
123 123
124static struct platform_driver s3c2412_serial_drv = { 124static struct platform_driver s3c2412_serial_driver = {
125 .probe = s3c2412_serial_probe, 125 .probe = s3c2412_serial_probe,
126 .remove = __devexit_p(s3c24xx_serial_remove), 126 .remove = __devexit_p(s3c24xx_serial_remove),
127 .driver = { 127 .driver = {
@@ -130,16 +130,16 @@ static struct platform_driver s3c2412_serial_drv = {
130 }, 130 },
131}; 131};
132 132
133s3c24xx_console_init(&s3c2412_serial_drv, &s3c2412_uart_inf); 133s3c24xx_console_init(&s3c2412_serial_driver, &s3c2412_uart_inf);
134 134
135static inline int s3c2412_serial_init(void) 135static inline int s3c2412_serial_init(void)
136{ 136{
137 return s3c24xx_serial_init(&s3c2412_serial_drv, &s3c2412_uart_inf); 137 return s3c24xx_serial_init(&s3c2412_serial_driver, &s3c2412_uart_inf);
138} 138}
139 139
140static inline void s3c2412_serial_exit(void) 140static inline void s3c2412_serial_exit(void)
141{ 141{
142 platform_driver_unregister(&s3c2412_serial_drv); 142 platform_driver_unregister(&s3c2412_serial_driver);
143} 143}
144 144
145module_init(s3c2412_serial_init); 145module_init(s3c2412_serial_init);
diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c
index 06c5b0cc47a3..69ff5d340f04 100644
--- a/drivers/serial/s3c2440.c
+++ b/drivers/serial/s3c2440.c
@@ -151,7 +151,7 @@ static int s3c2440_serial_probe(struct platform_device *dev)
151 return s3c24xx_serial_probe(dev, &s3c2440_uart_inf); 151 return s3c24xx_serial_probe(dev, &s3c2440_uart_inf);
152} 152}
153 153
154static struct platform_driver s3c2440_serial_drv = { 154static struct platform_driver s3c2440_serial_driver = {
155 .probe = s3c2440_serial_probe, 155 .probe = s3c2440_serial_probe,
156 .remove = __devexit_p(s3c24xx_serial_remove), 156 .remove = __devexit_p(s3c24xx_serial_remove),
157 .driver = { 157 .driver = {
@@ -160,16 +160,16 @@ static struct platform_driver s3c2440_serial_drv = {
160 }, 160 },
161}; 161};
162 162
163s3c24xx_console_init(&s3c2440_serial_drv, &s3c2440_uart_inf); 163s3c24xx_console_init(&s3c2440_serial_driver, &s3c2440_uart_inf);
164 164
165static int __init s3c2440_serial_init(void) 165static int __init s3c2440_serial_init(void)
166{ 166{
167 return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf); 167 return s3c24xx_serial_init(&s3c2440_serial_driver, &s3c2440_uart_inf);
168} 168}
169 169
170static void __exit s3c2440_serial_exit(void) 170static void __exit s3c2440_serial_exit(void)
171{ 171{
172 platform_driver_unregister(&s3c2440_serial_drv); 172 platform_driver_unregister(&s3c2440_serial_driver);
173} 173}
174 174
175module_init(s3c2440_serial_init); 175module_init(s3c2440_serial_init);
diff --git a/drivers/serial/s3c24a0.c b/drivers/serial/s3c24a0.c
index 786a067d62ac..26c49e18bdd1 100644
--- a/drivers/serial/s3c24a0.c
+++ b/drivers/serial/s3c24a0.c
@@ -92,7 +92,7 @@ static int s3c24a0_serial_probe(struct platform_device *dev)
92 return s3c24xx_serial_probe(dev, &s3c24a0_uart_inf); 92 return s3c24xx_serial_probe(dev, &s3c24a0_uart_inf);
93} 93}
94 94
95static struct platform_driver s3c24a0_serial_drv = { 95static struct platform_driver s3c24a0_serial_driver = {
96 .probe = s3c24a0_serial_probe, 96 .probe = s3c24a0_serial_probe,
97 .remove = __devexit_p(s3c24xx_serial_remove), 97 .remove = __devexit_p(s3c24xx_serial_remove),
98 .driver = { 98 .driver = {
@@ -101,16 +101,16 @@ static struct platform_driver s3c24a0_serial_drv = {
101 }, 101 },
102}; 102};
103 103
104s3c24xx_console_init(&s3c24a0_serial_drv, &s3c24a0_uart_inf); 104s3c24xx_console_init(&s3c24a0_serial_driver, &s3c24a0_uart_inf);
105 105
106static int __init s3c24a0_serial_init(void) 106static int __init s3c24a0_serial_init(void)
107{ 107{
108 return s3c24xx_serial_init(&s3c24a0_serial_drv, &s3c24a0_uart_inf); 108 return s3c24xx_serial_init(&s3c24a0_serial_driver, &s3c24a0_uart_inf);
109} 109}
110 110
111static void __exit s3c24a0_serial_exit(void) 111static void __exit s3c24a0_serial_exit(void)
112{ 112{
113 platform_driver_unregister(&s3c24a0_serial_drv); 113 platform_driver_unregister(&s3c24a0_serial_driver);
114} 114}
115 115
116module_init(s3c24a0_serial_init); 116module_init(s3c24a0_serial_init);
diff --git a/drivers/serial/s3c6400.c b/drivers/serial/s3c6400.c
index 48f1a3781f0d..4be92ab50058 100644
--- a/drivers/serial/s3c6400.c
+++ b/drivers/serial/s3c6400.c
@@ -122,7 +122,7 @@ static int s3c6400_serial_probe(struct platform_device *dev)
122 return s3c24xx_serial_probe(dev, &s3c6400_uart_inf); 122 return s3c24xx_serial_probe(dev, &s3c6400_uart_inf);
123} 123}
124 124
125static struct platform_driver s3c6400_serial_drv = { 125static struct platform_driver s3c6400_serial_driver = {
126 .probe = s3c6400_serial_probe, 126 .probe = s3c6400_serial_probe,
127 .remove = __devexit_p(s3c24xx_serial_remove), 127 .remove = __devexit_p(s3c24xx_serial_remove),
128 .driver = { 128 .driver = {
@@ -131,16 +131,16 @@ static struct platform_driver s3c6400_serial_drv = {
131 }, 131 },
132}; 132};
133 133
134s3c24xx_console_init(&s3c6400_serial_drv, &s3c6400_uart_inf); 134s3c24xx_console_init(&s3c6400_serial_driver, &s3c6400_uart_inf);
135 135
136static int __init s3c6400_serial_init(void) 136static int __init s3c6400_serial_init(void)
137{ 137{
138 return s3c24xx_serial_init(&s3c6400_serial_drv, &s3c6400_uart_inf); 138 return s3c24xx_serial_init(&s3c6400_serial_driver, &s3c6400_uart_inf);
139} 139}
140 140
141static void __exit s3c6400_serial_exit(void) 141static void __exit s3c6400_serial_exit(void)
142{ 142{
143 platform_driver_unregister(&s3c6400_serial_drv); 143 platform_driver_unregister(&s3c6400_serial_driver);
144} 144}
145 145
146module_init(s3c6400_serial_init); 146module_init(s3c6400_serial_init);
diff --git a/drivers/serial/serial_ks8695.c b/drivers/serial/serial_ks8695.c
index 998e89dc5aaf..e0665630e4da 100644
--- a/drivers/serial/serial_ks8695.c
+++ b/drivers/serial/serial_ks8695.c
@@ -549,7 +549,7 @@ static struct uart_port ks8695uart_ports[SERIAL_KS8695_NR] = {
549 .mapbase = KS8695_UART_VA, 549 .mapbase = KS8695_UART_VA,
550 .iotype = SERIAL_IO_MEM, 550 .iotype = SERIAL_IO_MEM,
551 .irq = KS8695_IRQ_UART_TX, 551 .irq = KS8695_IRQ_UART_TX,
552 .uartclk = CLOCK_TICK_RATE * 16, 552 .uartclk = KS8695_CLOCK_RATE * 16,
553 .fifosize = 16, 553 .fifosize = 16,
554 .ops = &ks8695uart_pops, 554 .ops = &ks8695uart_pops,
555 .flags = ASYNC_BOOT_AUTOCONF, 555 .flags = ASYNC_BOOT_AUTOCONF,
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c
index eee4b6e0af2c..9b80ad36dbba 100644
--- a/drivers/spi/omap2_mcspi.c
+++ b/drivers/spi/omap2_mcspi.c
@@ -59,6 +59,8 @@
59 59
60/* per-register bitmasks: */ 60/* per-register bitmasks: */
61 61
62#define OMAP2_MCSPI_SYSCONFIG_SMARTIDLE (2 << 3)
63#define OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP (1 << 2)
62#define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0) 64#define OMAP2_MCSPI_SYSCONFIG_AUTOIDLE (1 << 0)
63#define OMAP2_MCSPI_SYSCONFIG_SOFTRESET (1 << 1) 65#define OMAP2_MCSPI_SYSCONFIG_SOFTRESET (1 << 1)
64 66
@@ -90,6 +92,7 @@
90 92
91#define OMAP2_MCSPI_CHCTRL_EN (1 << 0) 93#define OMAP2_MCSPI_CHCTRL_EN (1 << 0)
92 94
95#define OMAP2_MCSPI_WAKEUPENABLE_WKEN (1 << 0)
93 96
94/* We have 2 DMA channels per CS, one for RX and one for TX */ 97/* We have 2 DMA channels per CS, one for RX and one for TX */
95struct omap2_mcspi_dma { 98struct omap2_mcspi_dma {
@@ -269,7 +272,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
269 272
270 if (rx != NULL) { 273 if (rx != NULL) {
271 omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel, 274 omap_set_dma_transfer_params(mcspi_dma->dma_rx_channel,
272 data_type, element_count, 1, 275 data_type, element_count - 1, 1,
273 OMAP_DMA_SYNC_ELEMENT, 276 OMAP_DMA_SYNC_ELEMENT,
274 mcspi_dma->dma_rx_sync_dev, 1); 277 mcspi_dma->dma_rx_sync_dev, 1);
275 278
@@ -300,6 +303,25 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer)
300 if (rx != NULL) { 303 if (rx != NULL) {
301 wait_for_completion(&mcspi_dma->dma_rx_completion); 304 wait_for_completion(&mcspi_dma->dma_rx_completion);
302 dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE); 305 dma_unmap_single(NULL, xfer->rx_dma, count, DMA_FROM_DEVICE);
306 omap2_mcspi_set_enable(spi, 0);
307 if (likely(mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHSTAT0)
308 & OMAP2_MCSPI_CHSTAT_RXS)) {
309 u32 w;
310
311 w = mcspi_read_cs_reg(spi, OMAP2_MCSPI_RX0);
312 if (word_len <= 8)
313 ((u8 *)xfer->rx_buf)[element_count - 1] = w;
314 else if (word_len <= 16)
315 ((u16 *)xfer->rx_buf)[element_count - 1] = w;
316 else /* word_len <= 32 */
317 ((u32 *)xfer->rx_buf)[element_count - 1] = w;
318 } else {
319 dev_err(&spi->dev, "DMA RX last word empty");
320 count -= (word_len <= 8) ? 1 :
321 (word_len <= 16) ? 2 :
322 /* word_len <= 32 */ 4;
323 }
324 omap2_mcspi_set_enable(spi, 1);
303 } 325 }
304 return count; 326 return count;
305} 327}
@@ -873,8 +895,12 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi)
873 } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE)); 895 } while (!(tmp & OMAP2_MCSPI_SYSSTATUS_RESETDONE));
874 896
875 mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG, 897 mcspi_write_reg(master, OMAP2_MCSPI_SYSCONFIG,
876 /* (3 << 8) | (2 << 3) | */ 898 OMAP2_MCSPI_SYSCONFIG_AUTOIDLE |
877 OMAP2_MCSPI_SYSCONFIG_AUTOIDLE); 899 OMAP2_MCSPI_SYSCONFIG_ENAWAKEUP |
900 OMAP2_MCSPI_SYSCONFIG_SMARTIDLE);
901
902 mcspi_write_reg(master, OMAP2_MCSPI_WAKEUPENABLE,
903 OMAP2_MCSPI_WAKEUPENABLE_WKEN);
878 904
879 omap2_mcspi_set_master_mode(master); 905 omap2_mcspi_set_master_mode(master);
880 906
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 348bf61a8fec..975ecddbce30 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -103,8 +103,6 @@ source "drivers/staging/pohmelfs/Kconfig"
103 103
104source "drivers/staging/stlc45xx/Kconfig" 104source "drivers/staging/stlc45xx/Kconfig"
105 105
106source "drivers/staging/uc2322/Kconfig"
107
108source "drivers/staging/b3dfg/Kconfig" 106source "drivers/staging/b3dfg/Kconfig"
109 107
110source "drivers/staging/phison/Kconfig" 108source "drivers/staging/phison/Kconfig"
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 8d61d7b4debf..2241ae1b21ee 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -34,7 +34,6 @@ obj-$(CONFIG_ANDROID) += android/
34obj-$(CONFIG_DST) += dst/ 34obj-$(CONFIG_DST) += dst/
35obj-$(CONFIG_POHMELFS) += pohmelfs/ 35obj-$(CONFIG_POHMELFS) += pohmelfs/
36obj-$(CONFIG_STLC45XX) += stlc45xx/ 36obj-$(CONFIG_STLC45XX) += stlc45xx/
37obj-$(CONFIG_USB_SERIAL_ATEN2011) += uc2322/
38obj-$(CONFIG_B3DFG) += b3dfg/ 37obj-$(CONFIG_B3DFG) += b3dfg/
39obj-$(CONFIG_IDE_PHISON) += phison/ 38obj-$(CONFIG_IDE_PHISON) += phison/
40obj-$(CONFIG_PLAN9AUTH) += p9auth/ 39obj-$(CONFIG_PLAN9AUTH) += p9auth/
diff --git a/drivers/staging/android/lowmemorykiller.c b/drivers/staging/android/lowmemorykiller.c
index fe72240f5a9e..f934393f3959 100644
--- a/drivers/staging/android/lowmemorykiller.c
+++ b/drivers/staging/android/lowmemorykiller.c
@@ -96,19 +96,21 @@ static int lowmem_shrink(int nr_to_scan, gfp_t gfp_mask)
96 96
97 read_lock(&tasklist_lock); 97 read_lock(&tasklist_lock);
98 for_each_process(p) { 98 for_each_process(p) {
99 struct mm_struct *mm;
99 int oom_adj; 100 int oom_adj;
100 101
101 task_lock(p); 102 task_lock(p);
102 if (!p->mm) { 103 mm = p->mm;
104 if (!mm) {
103 task_unlock(p); 105 task_unlock(p);
104 continue; 106 continue;
105 } 107 }
106 oom_adj = p->oomkilladj; 108 oom_adj = mm->oom_adj;
107 if (oom_adj < min_adj) { 109 if (oom_adj < min_adj) {
108 task_unlock(p); 110 task_unlock(p);
109 continue; 111 continue;
110 } 112 }
111 tasksize = get_mm_rss(p->mm); 113 tasksize = get_mm_rss(mm);
112 task_unlock(p); 114 task_unlock(p);
113 if (tasksize <= 0) 115 if (tasksize <= 0)
114 continue; 116 continue;
diff --git a/drivers/staging/b3dfg/Kconfig b/drivers/staging/b3dfg/Kconfig
index 524231047de5..9e6573cf97d3 100644
--- a/drivers/staging/b3dfg/Kconfig
+++ b/drivers/staging/b3dfg/Kconfig
@@ -1,5 +1,6 @@
1config B3DFG 1config B3DFG
2 tristate "Brontes 3d Frame Framegrabber" 2 tristate "Brontes 3d Frame Framegrabber"
3 depends on PCI
3 default n 4 default n
4 ---help--- 5 ---help---
5 This driver provides support for the Brontes 3d Framegrabber 6 This driver provides support for the Brontes 3d Framegrabber
diff --git a/drivers/staging/heci/Kconfig b/drivers/staging/heci/Kconfig
index ae8d588d3a27..c7206f8bcd93 100644
--- a/drivers/staging/heci/Kconfig
+++ b/drivers/staging/heci/Kconfig
@@ -1,5 +1,6 @@
1config HECI 1config HECI
2 tristate "Intel Management Engine Interface (MEI) Support" 2 tristate "Intel Management Engine Interface (MEI) Support"
3 depends on PCI
3 ---help--- 4 ---help---
4 The Intel Management Engine Interface (Intel MEI) driver allows 5 The Intel Management Engine Interface (Intel MEI) driver allows
5 applications to access the Active Management Technology 6 applications to access the Active Management Technology
diff --git a/drivers/staging/rspiusb/rspiusb.c b/drivers/staging/rspiusb/rspiusb.c
index 2f8155c1968b..04e2f92c0f62 100644
--- a/drivers/staging/rspiusb/rspiusb.c
+++ b/drivers/staging/rspiusb/rspiusb.c
@@ -716,6 +716,8 @@ static int MapUserBuffer(struct ioctl_struct *io, struct device_extension *pdx)
716 pdx->PixelUrb[frameInfo][i]->transfer_flags = 716 pdx->PixelUrb[frameInfo][i]->transfer_flags =
717 URB_NO_TRANSFER_DMA_MAP | URB_NO_INTERRUPT; 717 URB_NO_TRANSFER_DMA_MAP | URB_NO_INTERRUPT;
718 } 718 }
719 if (i == 0)
720 return -EINVAL;
719 /* only interrupt when last URB completes */ 721 /* only interrupt when last URB completes */
720 pdx->PixelUrb[frameInfo][--i]->transfer_flags &= ~URB_NO_INTERRUPT; 722 pdx->PixelUrb[frameInfo][--i]->transfer_flags &= ~URB_NO_INTERRUPT;
721 pdx->pendedPixelUrbs[frameInfo] = 723 pdx->pendedPixelUrbs[frameInfo] =
diff --git a/drivers/staging/rt2860/rt_linux.h b/drivers/staging/rt2860/rt_linux.h
index 85175c182432..25b53ac3f820 100644
--- a/drivers/staging/rt2860/rt_linux.h
+++ b/drivers/staging/rt2860/rt_linux.h
@@ -43,9 +43,6 @@
43#include "rtmp_type.h" 43#include "rtmp_type.h"
44#include <linux/module.h> 44#include <linux/module.h>
45#include <linux/kernel.h> 45#include <linux/kernel.h>
46#if !defined(RT2860) && !defined(RT30xx)
47#include <linux/kthread.h>
48#endif
49 46
50#include <linux/spinlock.h> 47#include <linux/spinlock.h>
51#include <linux/init.h> 48#include <linux/init.h>
@@ -166,9 +163,7 @@ typedef int (*HARD_START_XMIT_FUNC)(struct sk_buff *skb, struct net_device *net_
166 163
167#ifndef RT30xx 164#ifndef RT30xx
168typedef struct pid * THREAD_PID; 165typedef struct pid * THREAD_PID;
169#ifdef RT2860
170#define THREAD_PID_INIT_VALUE NULL 166#define THREAD_PID_INIT_VALUE NULL
171#endif
172#define GET_PID(_v) find_get_pid(_v) 167#define GET_PID(_v) find_get_pid(_v)
173#define GET_PID_NUMBER(_v) pid_nr(_v) 168#define GET_PID_NUMBER(_v) pid_nr(_v)
174#define CHECK_PID_LEGALITY(_pid) if (pid_nr(_pid) >= 0) 169#define CHECK_PID_LEGALITY(_pid) if (pid_nr(_pid) >= 0)
@@ -188,12 +183,12 @@ struct os_cookie {
188 dma_addr_t pAd_pa; 183 dma_addr_t pAd_pa;
189#endif 184#endif
190#ifdef RT2870 185#ifdef RT2870
191 struct usb_device *pUsb_Dev; 186 struct usb_device *pUsb_Dev;
192 187
193#ifndef RT30xx 188#ifndef RT30xx
194 struct task_struct *MLMEThr_task; 189 THREAD_PID MLMEThr_pid;
195 struct task_struct *RTUSBCmdThr_task; 190 THREAD_PID RTUSBCmdThr_pid;
196 struct task_struct *TimerQThr_task; 191 THREAD_PID TimerQThr_pid;
197#endif 192#endif
198#ifdef RT30xx 193#ifdef RT30xx
199 struct pid *MLMEThr_pid; 194 struct pid *MLMEThr_pid;
diff --git a/drivers/staging/rt2870/2870_main_dev.c b/drivers/staging/rt2870/2870_main_dev.c
index dd01c64fbf61..a4e8696ca39c 100644
--- a/drivers/staging/rt2870/2870_main_dev.c
+++ b/drivers/staging/rt2870/2870_main_dev.c
@@ -235,7 +235,7 @@ INT MlmeThread(
235 DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__func__)); 235 DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__func__));
236 236
237#ifndef RT30xx 237#ifndef RT30xx
238 pObj->MLMEThr_task = NULL; 238 pObj->MLMEThr_pid = THREAD_PID_INIT_VALUE;
239#endif 239#endif
240#ifdef RT30xx 240#ifdef RT30xx
241 pObj->MLMEThr_pid = NULL; 241 pObj->MLMEThr_pid = NULL;
@@ -348,7 +348,7 @@ INT RTUSBCmdThread(
348 DBGPRINT(RT_DEBUG_TRACE,( "<---RTUSBCmdThread\n")); 348 DBGPRINT(RT_DEBUG_TRACE,( "<---RTUSBCmdThread\n"));
349 349
350#ifndef RT30xx 350#ifndef RT30xx
351 pObj->RTUSBCmdThr_task = NULL; 351 pObj->RTUSBCmdThr_pid = THREAD_PID_INIT_VALUE;
352#endif 352#endif
353#ifdef RT30xx 353#ifdef RT30xx
354 pObj->RTUSBCmdThr_pid = NULL; 354 pObj->RTUSBCmdThr_pid = NULL;
@@ -447,7 +447,7 @@ INT TimerQThread(
447 DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__func__)); 447 DBGPRINT(RT_DEBUG_TRACE,( "<---%s\n",__func__));
448 448
449#ifndef RT30xx 449#ifndef RT30xx
450 pObj->TimerQThr_task = NULL; 450 pObj->TimerQThr_pid = THREAD_PID_INIT_VALUE;
451#endif 451#endif
452#ifdef RT30xx 452#ifdef RT30xx
453 pObj->TimerQThr_pid = NULL; 453 pObj->TimerQThr_pid = NULL;
@@ -883,46 +883,69 @@ VOID RT28xxThreadTerminate(
883 883
884 // Terminate Threads 884 // Terminate Threads
885#ifndef RT30xx 885#ifndef RT30xx
886 BUG_ON(pObj->TimerQThr_task == NULL); 886 CHECK_PID_LEGALITY(pObj->TimerQThr_pid)
887 CHECK_PID_LEGALITY(task_pid(pObj->TimerQThr_task))
888 { 887 {
889 POS_COOKIE pObj = (POS_COOKIE)pAd->OS_Cookie; 888 POS_COOKIE pObj = (POS_COOKIE)pAd->OS_Cookie;
890 889
891 printk(KERN_DEBUG "Terminate the TimerQThr pid=%d!\n", 890 printk("Terminate the TimerQThr_pid=%d!\n", GET_PID_NUMBER(pObj->TimerQThr_pid));
892 pid_nr(task_pid(pObj->TimerQThr_task)));
893 mb(); 891 mb();
894 pAd->TimerFunc_kill = 1; 892 pAd->TimerFunc_kill = 1;
895 mb(); 893 mb();
896 kthread_stop(pObj->TimerQThr_task); 894 ret = KILL_THREAD_PID(pObj->TimerQThr_pid, SIGTERM, 1);
897 pObj->TimerQThr_task = NULL; 895 if (ret)
896 {
897 printk(KERN_WARNING "%s: unable to stop TimerQThread, pid=%d, ret=%d!\n",
898 pAd->net_dev->name, GET_PID_NUMBER(pObj->TimerQThr_pid), ret);
899 }
900 else
901 {
902 wait_for_completion(&pAd->TimerQComplete);
903 pObj->TimerQThr_pid = THREAD_PID_INIT_VALUE;
904 }
898 } 905 }
899 906
900 BUG_ON(pObj->MLMEThr_task == NULL); 907 CHECK_PID_LEGALITY(pObj->MLMEThr_pid)
901 CHECK_PID_LEGALITY(task_pid(pObj->MLMEThr_task))
902 { 908 {
903 printk(KERN_DEBUG "Terminate the MLMEThr pid=%d!\n", 909 printk("Terminate the MLMEThr_pid=%d!\n", GET_PID_NUMBER(pObj->MLMEThr_pid));
904 pid_nr(task_pid(pObj->MLMEThr_task)));
905 mb(); 910 mb();
906 pAd->mlme_kill = 1; 911 pAd->mlme_kill = 1;
907 //RT28XX_MLME_HANDLER(pAd); 912 //RT28XX_MLME_HANDLER(pAd);
908 mb(); 913 mb();
909 kthread_stop(pObj->MLMEThr_task); 914 ret = KILL_THREAD_PID(pObj->MLMEThr_pid, SIGTERM, 1);
910 pObj->MLMEThr_task = NULL; 915 if (ret)
916 {
917 printk (KERN_WARNING "%s: unable to Mlme thread, pid=%d, ret=%d!\n",
918 pAd->net_dev->name, GET_PID_NUMBER(pObj->MLMEThr_pid), ret);
919 }
920 else
921 {
922 //wait_for_completion (&pAd->notify);
923 wait_for_completion (&pAd->mlmeComplete);
924 pObj->MLMEThr_pid = THREAD_PID_INIT_VALUE;
925 }
911 } 926 }
912 927
913 BUG_ON(pObj->RTUSBCmdThr_task == NULL); 928 CHECK_PID_LEGALITY(pObj->RTUSBCmdThr_pid)
914 CHECK_PID_LEGALITY(task_pid(pObj->RTUSBCmdThr_task))
915 { 929 {
916 printk(KERN_DEBUG "Terminate the RTUSBCmdThr pid=%d!\n", 930 printk("Terminate the RTUSBCmdThr_pid=%d!\n", GET_PID_NUMBER(pObj->RTUSBCmdThr_pid));
917 pid_nr(task_pid(pObj->RTUSBCmdThr_task)));
918 mb(); 931 mb();
919 NdisAcquireSpinLock(&pAd->CmdQLock); 932 NdisAcquireSpinLock(&pAd->CmdQLock);
920 pAd->CmdQ.CmdQState = RT2870_THREAD_STOPED; 933 pAd->CmdQ.CmdQState = RT2870_THREAD_STOPED;
921 NdisReleaseSpinLock(&pAd->CmdQLock); 934 NdisReleaseSpinLock(&pAd->CmdQLock);
922 mb(); 935 mb();
923 //RTUSBCMDUp(pAd); 936 //RTUSBCMDUp(pAd);
924 kthread_stop(pObj->RTUSBCmdThr_task); 937 ret = KILL_THREAD_PID(pObj->RTUSBCmdThr_pid, SIGTERM, 1);
925 pObj->RTUSBCmdThr_task = NULL; 938 if (ret)
939 {
940 printk(KERN_WARNING "%s: unable to RTUSBCmd thread, pid=%d, ret=%d!\n",
941 pAd->net_dev->name, GET_PID_NUMBER(pObj->RTUSBCmdThr_pid), ret);
942 }
943 else
944 {
945 //wait_for_completion (&pAd->notify);
946 wait_for_completion (&pAd->CmdQComplete);
947 pObj->RTUSBCmdThr_pid = THREAD_PID_INIT_VALUE;
948 }
926 } 949 }
927#endif 950#endif
928#ifdef RT30xx 951#ifdef RT30xx
@@ -1045,7 +1068,7 @@ BOOLEAN RT28XXChipsetCheck(
1045 dev_p->descriptor.idProduct == rtusb_usb_id[i].idProduct) 1068 dev_p->descriptor.idProduct == rtusb_usb_id[i].idProduct)
1046 { 1069 {
1047#ifndef RT30xx 1070#ifndef RT30xx
1048 printk(KERN_DEBUG "rt2870: idVendor = 0x%x, idProduct = 0x%x\n", 1071 printk("rt2870: idVendor = 0x%x, idProduct = 0x%x\n",
1049#endif 1072#endif
1050#ifdef RT30xx 1073#ifdef RT30xx
1051 printk("rt2870: idVendor = 0x%x, idProduct = 0x%x\n", 1074 printk("rt2870: idVendor = 0x%x, idProduct = 0x%x\n",
diff --git a/drivers/staging/rt2870/common/2870_rtmp_init.c b/drivers/staging/rt2870/common/2870_rtmp_init.c
index 0f4c8af97e47..80909e9ab5ae 100644
--- a/drivers/staging/rt2870/common/2870_rtmp_init.c
+++ b/drivers/staging/rt2870/common/2870_rtmp_init.c
@@ -700,8 +700,8 @@ NDIS_STATUS AdapterBlockAllocateMemory(
700 usb_dev = pObj->pUsb_Dev; 700 usb_dev = pObj->pUsb_Dev;
701 701
702#ifndef RT30xx 702#ifndef RT30xx
703 pObj->MLMEThr_task = NULL; 703 pObj->MLMEThr_pid = THREAD_PID_INIT_VALUE;
704 pObj->RTUSBCmdThr_task = NULL; 704 pObj->RTUSBCmdThr_pid = THREAD_PID_INIT_VALUE;
705#endif 705#endif
706#ifdef RT30xx 706#ifdef RT30xx
707 pObj->MLMEThr_pid = NULL; 707 pObj->MLMEThr_pid = NULL;
@@ -743,7 +743,7 @@ NDIS_STATUS CreateThreads(
743 PRTMP_ADAPTER pAd = net_dev->ml_priv; 743 PRTMP_ADAPTER pAd = net_dev->ml_priv;
744 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; 744 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
745#ifndef RT30xx 745#ifndef RT30xx
746 struct task_struct *tsk; 746 pid_t pid_number = -1;
747#endif 747#endif
748#ifdef RT30xx 748#ifdef RT30xx
749 pid_t pid_number; 749 pid_t pid_number;
@@ -762,10 +762,10 @@ NDIS_STATUS CreateThreads(
762 762
763 // Creat MLME Thread 763 // Creat MLME Thread
764#ifndef RT30xx 764#ifndef RT30xx
765 pObj->MLMEThr_task = NULL; 765 pObj->MLMEThr_pid= THREAD_PID_INIT_VALUE;
766 tsk = kthread_run(MlmeThread, pAd, "%s", pAd->net_dev->name); 766 pid_number = kernel_thread(MlmeThread, pAd, CLONE_VM);
767 767 if (pid_number < 0)
768 if (IS_ERR(tsk)) { 768 {
769#endif 769#endif
770#ifdef RT30xx 770#ifdef RT30xx
771 pObj->MLMEThr_pid = NULL; 771 pObj->MLMEThr_pid = NULL;
@@ -778,7 +778,7 @@ NDIS_STATUS CreateThreads(
778 } 778 }
779 779
780#ifndef RT30xx 780#ifndef RT30xx
781 pObj->MLMEThr_task = tsk; 781 pObj->MLMEThr_pid = GET_PID(pid_number);
782#endif 782#endif
783#ifdef RT30xx 783#ifdef RT30xx
784 pObj->MLMEThr_pid = find_get_pid(pid_number); 784 pObj->MLMEThr_pid = find_get_pid(pid_number);
@@ -788,10 +788,9 @@ NDIS_STATUS CreateThreads(
788 788
789 // Creat Command Thread 789 // Creat Command Thread
790#ifndef RT30xx 790#ifndef RT30xx
791 pObj->RTUSBCmdThr_task = NULL; 791 pObj->RTUSBCmdThr_pid= THREAD_PID_INIT_VALUE;
792 tsk = kthread_run(RTUSBCmdThread, pAd, "%s", pAd->net_dev->name); 792 pid_number = kernel_thread(RTUSBCmdThread, pAd, CLONE_VM);
793 793 if (pid_number < 0)
794 if (IS_ERR(tsk) < 0)
795#endif 794#endif
796#ifdef RT30xx 795#ifdef RT30xx
797 pObj->RTUSBCmdThr_pid = NULL; 796 pObj->RTUSBCmdThr_pid = NULL;
@@ -804,7 +803,7 @@ NDIS_STATUS CreateThreads(
804 } 803 }
805 804
806#ifndef RT30xx 805#ifndef RT30xx
807 pObj->RTUSBCmdThr_task = tsk; 806 pObj->RTUSBCmdThr_pid = GET_PID(pid_number);
808#endif 807#endif
809#ifdef RT30xx 808#ifdef RT30xx
810 pObj->RTUSBCmdThr_pid = find_get_pid(pid_number); 809 pObj->RTUSBCmdThr_pid = find_get_pid(pid_number);
@@ -812,9 +811,9 @@ NDIS_STATUS CreateThreads(
812 wait_for_completion(&(pAd->CmdQComplete)); 811 wait_for_completion(&(pAd->CmdQComplete));
813 812
814#ifndef RT30xx 813#ifndef RT30xx
815 pObj->TimerQThr_task = NULL; 814 pObj->TimerQThr_pid= THREAD_PID_INIT_VALUE;
816 tsk = kthread_run(TimerQThread, pAd, "%s", pAd->net_dev->name); 815 pid_number = kernel_thread(TimerQThread, pAd, CLONE_VM);
817 if (IS_ERR(tsk) < 0) 816 if (pid_number < 0)
818#endif 817#endif
819#ifdef RT30xx 818#ifdef RT30xx
820 pObj->TimerQThr_pid = NULL; 819 pObj->TimerQThr_pid = NULL;
@@ -826,7 +825,7 @@ NDIS_STATUS CreateThreads(
826 return NDIS_STATUS_FAILURE; 825 return NDIS_STATUS_FAILURE;
827 } 826 }
828#ifndef RT30xx 827#ifndef RT30xx
829 pObj->TimerQThr_task = tsk; 828 pObj->TimerQThr_pid = GET_PID(pid_number);
830#endif 829#endif
831#ifdef RT30xx 830#ifdef RT30xx
832 pObj->TimerQThr_pid = find_get_pid(pid_number); 831 pObj->TimerQThr_pid = find_get_pid(pid_number);
diff --git a/drivers/staging/rt2870/common/rtusb_io.c b/drivers/staging/rt2870/common/rtusb_io.c
index fd1b0c18f2a0..704b5c2d5091 100644
--- a/drivers/staging/rt2870/common/rtusb_io.c
+++ b/drivers/staging/rt2870/common/rtusb_io.c
@@ -984,8 +984,7 @@ NDIS_STATUS RTUSBEnqueueCmdFromNdis(
984 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; 984 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie;
985 985
986#ifndef RT30xx 986#ifndef RT30xx
987 BUG_ON(pObj->RTUSBCmdThr_task == NULL); 987 CHECK_PID_LEGALITY(pObj->RTUSBCmdThr_pid)
988 CHECK_PID_LEGALITY(task_pid(pObj->RTUSBCmdThr_task))
989#endif 988#endif
990#ifdef RT30xx 989#ifdef RT30xx
991 if (pObj->RTUSBCmdThr_pid < 0) 990 if (pObj->RTUSBCmdThr_pid < 0)
diff --git a/drivers/staging/rt2870/rt2870.h b/drivers/staging/rt2870/rt2870.h
index 29e3b53e52a1..2b8872b2fd9d 100644
--- a/drivers/staging/rt2870/rt2870.h
+++ b/drivers/staging/rt2870/rt2870.h
@@ -79,6 +79,7 @@
79{ \ 79{ \
80 {USB_DEVICE(0x148F,0x2770)}, /* Ralink */ \ 80 {USB_DEVICE(0x148F,0x2770)}, /* Ralink */ \
81 {USB_DEVICE(0x1737,0x0071)}, /* Linksys WUSB600N */ \ 81 {USB_DEVICE(0x1737,0x0071)}, /* Linksys WUSB600N */ \
82 {USB_DEVICE(0x1737,0x0070)}, /* Linksys */ \
82 {USB_DEVICE(0x148F,0x2870)}, /* Ralink */ \ 83 {USB_DEVICE(0x148F,0x2870)}, /* Ralink */ \
83 {USB_DEVICE(0x148F,0x3070)}, /* Ralink */ \ 84 {USB_DEVICE(0x148F,0x3070)}, /* Ralink */ \
84 {USB_DEVICE(0x0B05,0x1731)}, /* Asus */ \ 85 {USB_DEVICE(0x0B05,0x1731)}, /* Asus */ \
@@ -93,12 +94,14 @@
93 {USB_DEVICE(0x14B2,0x3C06)}, /* Conceptronic */ \ 94 {USB_DEVICE(0x14B2,0x3C06)}, /* Conceptronic */ \
94 {USB_DEVICE(0x14B2,0x3C28)}, /* Conceptronic */ \ 95 {USB_DEVICE(0x14B2,0x3C28)}, /* Conceptronic */ \
95 {USB_DEVICE(0x2019,0xED06)}, /* Planex Communications, Inc. */ \ 96 {USB_DEVICE(0x2019,0xED06)}, /* Planex Communications, Inc. */ \
97 {USB_DEVICE(0x2019,0xED14)}, /* Planex Communications, Inc. */ \
96 {USB_DEVICE(0x2019,0xAB25)}, /* Planex Communications, Inc. RT3070 */ \ 98 {USB_DEVICE(0x2019,0xAB25)}, /* Planex Communications, Inc. RT3070 */ \
97 {USB_DEVICE(0x07D1,0x3C09)}, /* D-Link */ \ 99 {USB_DEVICE(0x07D1,0x3C09)}, /* D-Link */ \
98 {USB_DEVICE(0x07D1,0x3C11)}, /* D-Link */ \ 100 {USB_DEVICE(0x07D1,0x3C11)}, /* D-Link */ \
99 {USB_DEVICE(0x14B2,0x3C07)}, /* AL */ \ 101 {USB_DEVICE(0x14B2,0x3C07)}, /* AL */ \
100 {USB_DEVICE(0x14B2,0x3C12)}, /* AL */ \ 102 {USB_DEVICE(0x14B2,0x3C12)}, /* AL */ \
101 {USB_DEVICE(0x050D,0x8053)}, /* Belkin */ \ 103 {USB_DEVICE(0x050D,0x8053)}, /* Belkin */ \
104 {USB_DEVICE(0x050D,0x815C)}, /* Belkin */ \
102 {USB_DEVICE(0x14B2,0x3C23)}, /* Airlink */ \ 105 {USB_DEVICE(0x14B2,0x3C23)}, /* Airlink */ \
103 {USB_DEVICE(0x14B2,0x3C27)}, /* Airlink */ \ 106 {USB_DEVICE(0x14B2,0x3C27)}, /* Airlink */ \
104 {USB_DEVICE(0x07AA,0x002F)}, /* Corega */ \ 107 {USB_DEVICE(0x07AA,0x002F)}, /* Corega */ \
@@ -587,16 +590,14 @@ VOID RTUSBBulkRxComplete(purbb_t pUrb, struct pt_regs *pt_regs);
587#define RTUSBMlmeUp(pAd) \ 590#define RTUSBMlmeUp(pAd) \
588{ \ 591{ \
589 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; \ 592 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; \
590 BUG_ON(pObj->MLMEThr_task == NULL); \ 593 CHECK_PID_LEGALITY(pObj->MLMEThr_pid) \
591 CHECK_PID_LEGALITY(task_pid(pObj->MLMEThr_task)) \
592 up(&(pAd->mlme_semaphore)); \ 594 up(&(pAd->mlme_semaphore)); \
593} 595}
594 596
595#define RTUSBCMDUp(pAd) \ 597#define RTUSBCMDUp(pAd) \
596{ \ 598{ \
597 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; \ 599 POS_COOKIE pObj = (POS_COOKIE) pAd->OS_Cookie; \
598 BUG_ON(pObj->RTUSBCmdThr_task == NULL); \ 600 CHECK_PID_LEGALITY(pObj->RTUSBCmdThr_pid) \
599 CHECK_PID_LEGALITY(task_pid(pObj->RTUSBCmdThr_task)) \
600 up(&(pAd->RTUSBCmd_semaphore)); \ 601 up(&(pAd->RTUSBCmd_semaphore)); \
601} 602}
602#endif 603#endif
diff --git a/drivers/staging/rtl8192su/ieee80211.h b/drivers/staging/rtl8192su/ieee80211.h
index 0edb09a536f9..ea9739318037 100644
--- a/drivers/staging/rtl8192su/ieee80211.h
+++ b/drivers/staging/rtl8192su/ieee80211.h
@@ -2645,7 +2645,7 @@ extern int ieee80211_encrypt_fragment(
2645 struct sk_buff *frag, 2645 struct sk_buff *frag,
2646 int hdr_len); 2646 int hdr_len);
2647 2647
2648extern int ieee80211_xmit(struct sk_buff *skb, 2648extern int rtl8192_ieee80211_xmit(struct sk_buff *skb,
2649 struct net_device *dev); 2649 struct net_device *dev);
2650extern void ieee80211_txb_free(struct ieee80211_txb *); 2650extern void ieee80211_txb_free(struct ieee80211_txb *);
2651 2651
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211.h b/drivers/staging/rtl8192su/ieee80211/ieee80211.h
index 720bfcbfadc1..5e3a2cbed2b1 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211.h
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211.h
@@ -2645,7 +2645,7 @@ extern int ieee80211_encrypt_fragment(
2645 struct sk_buff *frag, 2645 struct sk_buff *frag,
2646 int hdr_len); 2646 int hdr_len);
2647 2647
2648extern int ieee80211_xmit(struct sk_buff *skb, 2648extern int rtl8192_ieee80211_xmit(struct sk_buff *skb,
2649 struct net_device *dev); 2649 struct net_device *dev);
2650extern void ieee80211_txb_free(struct ieee80211_txb *); 2650extern void ieee80211_txb_free(struct ieee80211_txb *);
2651 2651
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
index 7294572b990f..cba12b84be5c 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_tx.c
@@ -618,7 +618,7 @@ void ieee80211_query_seqnum(struct ieee80211_device*ieee, struct sk_buff* skb, u
618 } 618 }
619} 619}
620 620
621int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev) 621int rtl8192_ieee80211_xmit(struct sk_buff *skb, struct net_device *dev)
622{ 622{
623#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)) 623#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0))
624 struct ieee80211_device *ieee = netdev_priv(dev); 624 struct ieee80211_device *ieee = netdev_priv(dev);
@@ -943,5 +943,6 @@ int ieee80211_xmit(struct sk_buff *skb, struct net_device *dev)
943 return 1; 943 return 1;
944 944
945} 945}
946EXPORT_SYMBOL(rtl8192_ieee80211_xmit);
946 947
947EXPORT_SYMBOL(ieee80211_txb_free); 948EXPORT_SYMBOL(ieee80211_txb_free);
diff --git a/drivers/staging/rtl8192su/r8192U_core.c b/drivers/staging/rtl8192su/r8192U_core.c
index 4ab250743e81..70f81a8f1291 100644
--- a/drivers/staging/rtl8192su/r8192U_core.c
+++ b/drivers/staging/rtl8192su/r8192U_core.c
@@ -12142,7 +12142,7 @@ static const struct net_device_ops rtl8192_netdev_ops = {
12142 .ndo_set_mac_address = r8192_set_mac_adr, 12142 .ndo_set_mac_address = r8192_set_mac_adr,
12143 .ndo_validate_addr = eth_validate_addr, 12143 .ndo_validate_addr = eth_validate_addr,
12144 .ndo_change_mtu = eth_change_mtu, 12144 .ndo_change_mtu = eth_change_mtu,
12145 .ndo_start_xmit = ieee80211_xmit, 12145 .ndo_start_xmit = rtl8192_ieee80211_xmit,
12146}; 12146};
12147 12147
12148#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0) 12148#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,0)
diff --git a/drivers/staging/serqt_usb2/serqt_usb2.c b/drivers/staging/serqt_usb2/serqt_usb2.c
index a9bd4106beb7..0fdf8c6dc648 100644
--- a/drivers/staging/serqt_usb2/serqt_usb2.c
+++ b/drivers/staging/serqt_usb2/serqt_usb2.c
@@ -360,18 +360,18 @@ static void qt_read_bulk_callback(struct urb *urb)
360 if (port_paranoia_check(port, __func__) != 0) { 360 if (port_paranoia_check(port, __func__) != 0) {
361 dbg("%s - port_paranoia_check, exiting\n", __func__); 361 dbg("%s - port_paranoia_check, exiting\n", __func__);
362 qt_port->ReadBulkStopped = 1; 362 qt_port->ReadBulkStopped = 1;
363 return; 363 goto exit;
364 } 364 }
365 365
366 if (!serial) { 366 if (!serial) {
367 dbg("%s - bad serial pointer, exiting\n", __func__); 367 dbg("%s - bad serial pointer, exiting\n", __func__);
368 return; 368 goto exit;
369 } 369 }
370 if (qt_port->closePending == 1) { 370 if (qt_port->closePending == 1) {
371 /* Were closing , stop reading */ 371 /* Were closing , stop reading */
372 dbg("%s - (qt_port->closepending == 1\n", __func__); 372 dbg("%s - (qt_port->closepending == 1\n", __func__);
373 qt_port->ReadBulkStopped = 1; 373 qt_port->ReadBulkStopped = 1;
374 return; 374 goto exit;
375 } 375 }
376 376
377 /* 377 /*
@@ -381,7 +381,7 @@ static void qt_read_bulk_callback(struct urb *urb)
381 */ 381 */
382 if (qt_port->RxHolding == 1) { 382 if (qt_port->RxHolding == 1) {
383 qt_port->ReadBulkStopped = 1; 383 qt_port->ReadBulkStopped = 1;
384 return; 384 goto exit;
385 } 385 }
386 386
387 if (urb->status) { 387 if (urb->status) {
@@ -389,7 +389,7 @@ static void qt_read_bulk_callback(struct urb *urb)
389 389
390 dbg("%s - nonzero read bulk status received: %d\n", 390 dbg("%s - nonzero read bulk status received: %d\n",
391 __func__, urb->status); 391 __func__, urb->status);
392 return; 392 goto exit;
393 } 393 }
394 394
395 if (tty && RxCount) { 395 if (tty && RxCount) {
@@ -463,6 +463,8 @@ static void qt_read_bulk_callback(struct urb *urb)
463 } 463 }
464 464
465 schedule_work(&port->work); 465 schedule_work(&port->work);
466exit:
467 tty_kref_put(tty);
466} 468}
467 469
468/* 470/*
@@ -736,6 +738,11 @@ static int qt_startup(struct usb_serial *serial)
736 if (!qt_port) { 738 if (!qt_port) {
737 dbg("%s: kmalloc for quatech_port (%d) failed!.", 739 dbg("%s: kmalloc for quatech_port (%d) failed!.",
738 __func__, i); 740 __func__, i);
741 for(--i; i >= 0; i--) {
742 port = serial->port[i];
743 kfree(usb_get_serial_port_data(port));
744 usb_set_serial_port_data(port, NULL);
745 }
739 return -ENOMEM; 746 return -ENOMEM;
740 } 747 }
741 spin_lock_init(&qt_port->lock); 748 spin_lock_init(&qt_port->lock);
@@ -1041,7 +1048,7 @@ static void qt_block_until_empty(struct tty_struct *tty,
1041 } 1048 }
1042} 1049}
1043 1050
1044static void qt_close( struct usb_serial_port *port) 1051static void qt_close(struct usb_serial_port *port)
1045{ 1052{
1046 struct usb_serial *serial = port->serial; 1053 struct usb_serial *serial = port->serial;
1047 struct quatech_port *qt_port; 1054 struct quatech_port *qt_port;
@@ -1068,6 +1075,7 @@ static void qt_close( struct usb_serial_port *port)
1068 /* wait up to for transmitter to empty */ 1075 /* wait up to for transmitter to empty */
1069 if (serial->dev) 1076 if (serial->dev)
1070 qt_block_until_empty(tty, qt_port); 1077 qt_block_until_empty(tty, qt_port);
1078 tty_kref_put(tty);
1071 1079
1072 /* Close uart channel */ 1080 /* Close uart channel */
1073 status = qt_close_channel(serial, index); 1081 status = qt_close_channel(serial, index);
diff --git a/drivers/staging/uc2322/Kconfig b/drivers/staging/uc2322/Kconfig
deleted file mode 100644
index 2e0c6e79df2b..000000000000
--- a/drivers/staging/uc2322/Kconfig
+++ /dev/null
@@ -1,10 +0,0 @@
1config USB_SERIAL_ATEN2011
2 tristate "ATEN 2011 USB to serial device support"
3 depends on USB_SERIAL
4 default N
5 ---help---
6 Say Y here if you want to use a ATEN 2011 dual port USB to serial
7 adapter.
8
9 To compile this driver as a module, choose M here: the module will be
10 called aten2011.
diff --git a/drivers/staging/uc2322/Makefile b/drivers/staging/uc2322/Makefile
deleted file mode 100644
index 49c18d6e579f..000000000000
--- a/drivers/staging/uc2322/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-$(CONFIG_USB_SERIAL_ATEN2011) += aten2011.o
diff --git a/drivers/staging/uc2322/TODO b/drivers/staging/uc2322/TODO
deleted file mode 100644
index c189a64c4185..000000000000
--- a/drivers/staging/uc2322/TODO
+++ /dev/null
@@ -1,7 +0,0 @@
1TODO:
2 - checkpatch.pl cleanups
3 - remove dead and useless code (auditing the tty ioctls to
4 verify that they really are correct and needed.)
5
6Please send any patches to Greg Kroah-Hartman <greg@kroah.com> and
7Russell Lang <gsview@ghostgum.com.au>.
diff --git a/drivers/staging/uc2322/aten2011.c b/drivers/staging/uc2322/aten2011.c
deleted file mode 100644
index 39d0926d1a90..000000000000
--- a/drivers/staging/uc2322/aten2011.c
+++ /dev/null
@@ -1,2430 +0,0 @@
1/*
2 * Aten 2011 USB serial driver for 4 port devices
3 *
4 * Copyright (C) 2000 Inside Out Networks
5 * Copyright (C) 2001-2002, 2009 Greg Kroah-Hartman <greg@kroah.com>
6 * Copyright (C) 2009 Novell Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 */
14
15#include <linux/kernel.h>
16#include <linux/errno.h>
17#include <linux/init.h>
18#include <linux/slab.h>
19#include <linux/tty.h>
20#include <linux/tty_driver.h>
21#include <linux/tty_flip.h>
22#include <linux/module.h>
23#include <linux/serial.h>
24#include <linux/uaccess.h>
25#include <linux/usb.h>
26#include <linux/usb/serial.h>
27
28
29#define ZLP_REG1 0x3A /* Zero_Flag_Reg1 58 */
30#define ZLP_REG2 0x3B /* Zero_Flag_Reg2 59 */
31#define ZLP_REG3 0x3C /* Zero_Flag_Reg3 60 */
32#define ZLP_REG4 0x3D /* Zero_Flag_Reg4 61 */
33#define ZLP_REG5 0x3E /* Zero_Flag_Reg5 62 */
34
35/* Interrupt Rotinue Defines */
36#define SERIAL_IIR_RLS 0x06
37#define SERIAL_IIR_RDA 0x04
38#define SERIAL_IIR_CTI 0x0c
39#define SERIAL_IIR_THR 0x02
40#define SERIAL_IIR_MS 0x00
41
42/* Emulation of the bit mask on the LINE STATUS REGISTER. */
43#define SERIAL_LSR_DR 0x0001
44#define SERIAL_LSR_OE 0x0002
45#define SERIAL_LSR_PE 0x0004
46#define SERIAL_LSR_FE 0x0008
47#define SERIAL_LSR_BI 0x0010
48#define SERIAL_LSR_THRE 0x0020
49#define SERIAL_LSR_TEMT 0x0040
50#define SERIAL_LSR_FIFOERR 0x0080
51
52/* MSR bit defines(place holders) */
53#define ATEN_MSR_DELTA_CTS 0x10
54#define ATEN_MSR_DELTA_DSR 0x20
55#define ATEN_MSR_DELTA_RI 0x40
56#define ATEN_MSR_DELTA_CD 0x80
57
58/* Serial Port register Address */
59#define RECEIVE_BUFFER_REGISTER ((__u16)(0x00))
60#define TRANSMIT_HOLDING_REGISTER ((__u16)(0x00))
61#define INTERRUPT_ENABLE_REGISTER ((__u16)(0x01))
62#define INTERRUPT_IDENT_REGISTER ((__u16)(0x02))
63#define FIFO_CONTROL_REGISTER ((__u16)(0x02))
64#define LINE_CONTROL_REGISTER ((__u16)(0x03))
65#define MODEM_CONTROL_REGISTER ((__u16)(0x04))
66#define LINE_STATUS_REGISTER ((__u16)(0x05))
67#define MODEM_STATUS_REGISTER ((__u16)(0x06))
68#define SCRATCH_PAD_REGISTER ((__u16)(0x07))
69#define DIVISOR_LATCH_LSB ((__u16)(0x00))
70#define DIVISOR_LATCH_MSB ((__u16)(0x01))
71
72#define SP1_REGISTER ((__u16)(0x00))
73#define CONTROL1_REGISTER ((__u16)(0x01))
74#define CLK_MULTI_REGISTER ((__u16)(0x02))
75#define CLK_START_VALUE_REGISTER ((__u16)(0x03))
76#define DCR1_REGISTER ((__u16)(0x04))
77#define GPIO_REGISTER ((__u16)(0x07))
78
79#define SERIAL_LCR_DLAB ((__u16)(0x0080))
80
81/*
82 * URB POOL related defines
83 */
84#define NUM_URBS 16 /* URB Count */
85#define URB_TRANSFER_BUFFER_SIZE 32 /* URB Size */
86
87#define USB_VENDOR_ID_ATENINTL 0x0557
88#define ATENINTL_DEVICE_ID_2011 0x2011
89#define ATENINTL_DEVICE_ID_7820 0x7820
90
91static struct usb_device_id id_table[] = {
92 { USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_2011) },
93 { USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_7820) },
94 { } /* terminating entry */
95};
96MODULE_DEVICE_TABLE(usb, id_table);
97
98/* This structure holds all of the local port information */
99struct ATENINTL_port {
100 int port_num; /*Actual port number in the device(1,2,etc)*/
101 __u8 bulk_out_endpoint; /* the bulk out endpoint handle */
102 unsigned char *bulk_out_buffer; /* buffer used for the bulk out endpoint */
103 struct urb *write_urb; /* write URB for this port */
104 __u8 bulk_in_endpoint; /* the bulk in endpoint handle */
105 unsigned char *bulk_in_buffer; /* the buffer we use for the bulk in endpoint */
106 struct urb *read_urb; /* read URB for this port */
107 __u8 shadowLCR; /* last LCR value received */
108 __u8 shadowMCR; /* last MCR value received */
109 char open;
110 char chaseResponsePending;
111 wait_queue_head_t wait_chase; /* for handling sleeping while waiting for chase to finish */
112 wait_queue_head_t wait_command; /* for handling sleeping while waiting for command to finish */
113 struct async_icount icount;
114 struct usb_serial_port *port; /* loop back to the owner of this object */
115 /*Offsets*/
116 __u8 SpRegOffset;
117 __u8 ControlRegOffset;
118 __u8 DcrRegOffset;
119 /* for processing control URBS in interrupt context */
120 struct urb *control_urb;
121 char *ctrl_buf;
122 int MsrLsr;
123
124 struct urb *write_urb_pool[NUM_URBS];
125 /* we pass a pointer to this as the arguement sent to cypress_set_termios old_termios */
126 struct ktermios tmp_termios; /* stores the old termios settings */
127 spinlock_t lock; /* private lock */
128};
129
130/* This structure holds all of the individual serial device information */
131struct ATENINTL_serial {
132 __u8 interrupt_in_endpoint; /* the interrupt endpoint handle */
133 unsigned char *interrupt_in_buffer; /* the buffer we use for the interrupt endpoint */
134 struct urb *interrupt_read_urb; /* our interrupt urb */
135 __u8 bulk_in_endpoint; /* the bulk in endpoint handle */
136 unsigned char *bulk_in_buffer; /* the buffer we use for the bulk in endpoint */
137 struct urb *read_urb; /* our bulk read urb */
138 __u8 bulk_out_endpoint; /* the bulk out endpoint handle */
139 struct usb_serial *serial; /* loop back to the owner of this object */
140 int ATEN2011_spectrum_2or4ports; /* this says the number of ports in the device */
141 /* Indicates about the no.of opened ports of an individual USB-serial adapater. */
142 unsigned int NoOfOpenPorts;
143 /* a flag for Status endpoint polling */
144 unsigned char status_polling_started;
145};
146
147static void ATEN2011_set_termios(struct tty_struct *tty,
148 struct usb_serial_port *port,
149 struct ktermios *old_termios);
150static void ATEN2011_change_port_settings(struct tty_struct *tty,
151 struct ATENINTL_port *ATEN2011_port,
152 struct ktermios *old_termios);
153
154/*************************************
155 * Bit definitions for each register *
156 *************************************/
157#define LCR_BITS_5 0x00 /* 5 bits/char */
158#define LCR_BITS_6 0x01 /* 6 bits/char */
159#define LCR_BITS_7 0x02 /* 7 bits/char */
160#define LCR_BITS_8 0x03 /* 8 bits/char */
161#define LCR_BITS_MASK 0x03 /* Mask for bits/char field */
162
163#define LCR_STOP_1 0x00 /* 1 stop bit */
164#define LCR_STOP_1_5 0x04 /* 1.5 stop bits (if 5 bits/char) */
165#define LCR_STOP_2 0x04 /* 2 stop bits (if 6-8 bits/char) */
166#define LCR_STOP_MASK 0x04 /* Mask for stop bits field */
167
168#define LCR_PAR_NONE 0x00 /* No parity */
169#define LCR_PAR_ODD 0x08 /* Odd parity */
170#define LCR_PAR_EVEN 0x18 /* Even parity */
171#define LCR_PAR_MARK 0x28 /* Force parity bit to 1 */
172#define LCR_PAR_SPACE 0x38 /* Force parity bit to 0 */
173#define LCR_PAR_MASK 0x38 /* Mask for parity field */
174
175#define LCR_SET_BREAK 0x40 /* Set Break condition */
176#define LCR_DL_ENABLE 0x80 /* Enable access to divisor latch */
177
178#define MCR_DTR 0x01 /* Assert DTR */
179#define MCR_RTS 0x02 /* Assert RTS */
180#define MCR_OUT1 0x04 /* Loopback only: Sets state of RI */
181#define MCR_MASTER_IE 0x08 /* Enable interrupt outputs */
182#define MCR_LOOPBACK 0x10 /* Set internal (digital) loopback mode */
183#define MCR_XON_ANY 0x20 /* Enable any char to exit XOFF mode */
184
185#define ATEN2011_MSR_CTS 0x10 /* Current state of CTS */
186#define ATEN2011_MSR_DSR 0x20 /* Current state of DSR */
187#define ATEN2011_MSR_RI 0x40 /* Current state of RI */
188#define ATEN2011_MSR_CD 0x80 /* Current state of CD */
189
190
191static int debug;
192
193/*
194 * Version Information
195 */
196#define DRIVER_VERSION "2.0"
197#define DRIVER_DESC "ATENINTL 2011 USB Serial Adapter"
198
199/*
200 * Defines used for sending commands to port
201 */
202
203#define ATEN_WDR_TIMEOUT (50) /* default urb timeout */
204
205/* Requests */
206#define ATEN_RD_RTYPE 0xC0
207#define ATEN_WR_RTYPE 0x40
208#define ATEN_RDREQ 0x0D
209#define ATEN_WRREQ 0x0E
210#define ATEN_CTRL_TIMEOUT 500
211#define VENDOR_READ_LENGTH (0x01)
212
213/* set to 1 for RS485 mode and 0 for RS232 mode */
214/* FIXME make this somehow dynamic and not build time specific */
215static int RS485mode;
216
217static int set_reg_sync(struct usb_serial_port *port, __u16 reg, __u16 val)
218{
219 struct usb_device *dev = port->serial->dev;
220 val = val & 0x00ff;
221
222 dbg("%s: is %x, value %x", __func__, reg, val);
223
224 return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), ATEN_WRREQ,
225 ATEN_WR_RTYPE, val, reg, NULL, 0,
226 ATEN_WDR_TIMEOUT);
227}
228
229static int get_reg_sync(struct usb_serial_port *port, __u16 reg, __u16 *val)
230{
231 struct usb_device *dev = port->serial->dev;
232 int ret;
233
234 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), ATEN_RDREQ,
235 ATEN_RD_RTYPE, 0, reg, val, VENDOR_READ_LENGTH,
236 ATEN_WDR_TIMEOUT);
237 dbg("%s: offset is %x, return val %x", __func__, reg, *val);
238 *val = (*val) & 0x00ff;
239 return ret;
240}
241
242static int set_uart_reg(struct usb_serial_port *port, __u16 reg, __u16 val)
243{
244 struct usb_device *dev = port->serial->dev;
245 struct ATENINTL_serial *a_serial;
246 __u16 minor;
247
248 a_serial = usb_get_serial_data(port->serial);
249 minor = port->serial->minor;
250 if (minor == SERIAL_TTY_NO_MINOR)
251 minor = 0;
252 val = val & 0x00ff;
253
254 /*
255 * For the UART control registers,
256 * the application number need to be Or'ed
257 */
258 if (a_serial->ATEN2011_spectrum_2or4ports == 4)
259 val |= (((__u16)port->number - minor) + 1) << 8;
260 else {
261 if (((__u16) port->number - minor) == 0)
262 val |= (((__u16)port->number - minor) + 1) << 8;
263 else
264 val |= (((__u16)port->number - minor) + 2) << 8;
265 }
266 dbg("%s: application number is %x", __func__, val);
267
268 return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), ATEN_WRREQ,
269 ATEN_WR_RTYPE, val, reg, NULL, 0,
270 ATEN_WDR_TIMEOUT);
271}
272
273static int get_uart_reg(struct usb_serial_port *port, __u16 reg, __u16 *val)
274{
275 struct usb_device *dev = port->serial->dev;
276 int ret = 0;
277 __u16 wval;
278 struct ATENINTL_serial *a_serial;
279 __u16 minor = port->serial->minor;
280
281 a_serial = usb_get_serial_data(port->serial);
282 if (minor == SERIAL_TTY_NO_MINOR)
283 minor = 0;
284
285 /* wval is same as application number */
286 if (a_serial->ATEN2011_spectrum_2or4ports == 4)
287 wval = (((__u16)port->number - minor) + 1) << 8;
288 else {
289 if (((__u16) port->number - minor) == 0)
290 wval = (((__u16) port->number - minor) + 1) << 8;
291 else
292 wval = (((__u16) port->number - minor) + 2) << 8;
293 }
294 dbg("%s: application number is %x", __func__, wval);
295 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), ATEN_RDREQ,
296 ATEN_RD_RTYPE, wval, reg, val, VENDOR_READ_LENGTH,
297 ATEN_WDR_TIMEOUT);
298 *val = (*val) & 0x00ff;
299 return ret;
300}
301
302static int handle_newMsr(struct ATENINTL_port *port, __u8 newMsr)
303{
304 struct ATENINTL_port *ATEN2011_port;
305 struct async_icount *icount;
306 ATEN2011_port = port;
307 icount = &ATEN2011_port->icount;
308 if (newMsr &
309 (ATEN_MSR_DELTA_CTS | ATEN_MSR_DELTA_DSR | ATEN_MSR_DELTA_RI |
310 ATEN_MSR_DELTA_CD)) {
311 icount = &ATEN2011_port->icount;
312
313 /* update input line counters */
314 if (newMsr & ATEN_MSR_DELTA_CTS)
315 icount->cts++;
316 if (newMsr & ATEN_MSR_DELTA_DSR)
317 icount->dsr++;
318 if (newMsr & ATEN_MSR_DELTA_CD)
319 icount->dcd++;
320 if (newMsr & ATEN_MSR_DELTA_RI)
321 icount->rng++;
322 }
323
324 return 0;
325}
326
327static int handle_newLsr(struct ATENINTL_port *port, __u8 newLsr)
328{
329 struct async_icount *icount;
330
331 dbg("%s - %02x", __func__, newLsr);
332
333 if (newLsr & SERIAL_LSR_BI) {
334 /*
335 * Parity and Framing errors only count if they occur exclusive
336 * of a break being received.
337 */
338 newLsr &= (__u8) (SERIAL_LSR_OE | SERIAL_LSR_BI);
339 }
340
341 /* update input line counters */
342 icount = &port->icount;
343 if (newLsr & SERIAL_LSR_BI)
344 icount->brk++;
345 if (newLsr & SERIAL_LSR_OE)
346 icount->overrun++;
347 if (newLsr & SERIAL_LSR_PE)
348 icount->parity++;
349 if (newLsr & SERIAL_LSR_FE)
350 icount->frame++;
351
352 return 0;
353}
354
355static void ATEN2011_control_callback(struct urb *urb)
356{
357 unsigned char *data;
358 struct ATENINTL_port *ATEN2011_port;
359 __u8 regval = 0x0;
360
361 switch (urb->status) {
362 case 0:
363 /* success */
364 break;
365 case -ECONNRESET:
366 case -ENOENT:
367 case -ESHUTDOWN:
368 /* this urb is terminated, clean up */
369 dbg("%s - urb shutting down with status: %d", __func__,
370 urb->status);
371 return;
372 default:
373 dbg("%s - nonzero urb status received: %d", __func__,
374 urb->status);
375 goto exit;
376 }
377
378 ATEN2011_port = (struct ATENINTL_port *)urb->context;
379
380 dbg("%s urb buffer size is %d", __func__, urb->actual_length);
381 dbg("%s ATEN2011_port->MsrLsr is %d port %d", __func__,
382 ATEN2011_port->MsrLsr, ATEN2011_port->port_num);
383 data = urb->transfer_buffer;
384 regval = (__u8) data[0];
385 dbg("%s data is %x", __func__, regval);
386 if (ATEN2011_port->MsrLsr == 0)
387 handle_newMsr(ATEN2011_port, regval);
388 else if (ATEN2011_port->MsrLsr == 1)
389 handle_newLsr(ATEN2011_port, regval);
390
391exit:
392 return;
393}
394
395static int ATEN2011_get_reg(struct ATENINTL_port *ATEN, __u16 Wval, __u16 reg,
396 __u16 *val)
397{
398 struct usb_device *dev = ATEN->port->serial->dev;
399 struct usb_ctrlrequest *dr = NULL;
400 unsigned char *buffer = NULL;
401 int ret = 0;
402 buffer = (__u8 *) ATEN->ctrl_buf;
403
404 dr = (void *)(buffer + 2);
405 dr->bRequestType = ATEN_RD_RTYPE;
406 dr->bRequest = ATEN_RDREQ;
407 dr->wValue = cpu_to_le16(Wval);
408 dr->wIndex = cpu_to_le16(reg);
409 dr->wLength = cpu_to_le16(2);
410
411 usb_fill_control_urb(ATEN->control_urb, dev, usb_rcvctrlpipe(dev, 0),
412 (unsigned char *)dr, buffer, 2,
413 ATEN2011_control_callback, ATEN);
414 ATEN->control_urb->transfer_buffer_length = 2;
415 ret = usb_submit_urb(ATEN->control_urb, GFP_ATOMIC);
416 return ret;
417}
418
419static void ATEN2011_interrupt_callback(struct urb *urb)
420{
421 int result;
422 int length;
423 struct ATENINTL_port *ATEN2011_port;
424 struct ATENINTL_serial *ATEN2011_serial;
425 struct usb_serial *serial;
426 __u16 Data;
427 unsigned char *data;
428 __u8 sp[5], st;
429 int i;
430 __u16 wval;
431 int minor;
432
433 dbg("%s", " : Entering");
434
435 ATEN2011_serial = (struct ATENINTL_serial *)urb->context;
436
437 switch (urb->status) {
438 case 0:
439 /* success */
440 break;
441 case -ECONNRESET:
442 case -ENOENT:
443 case -ESHUTDOWN:
444 /* this urb is terminated, clean up */
445 dbg("%s - urb shutting down with status: %d", __func__,
446 urb->status);
447 return;
448 default:
449 dbg("%s - nonzero urb status received: %d", __func__,
450 urb->status);
451 goto exit;
452 }
453 length = urb->actual_length;
454 data = urb->transfer_buffer;
455
456 serial = ATEN2011_serial->serial;
457
458 /* ATENINTL get 5 bytes
459 * Byte 1 IIR Port 1 (port.number is 0)
460 * Byte 2 IIR Port 2 (port.number is 1)
461 * Byte 3 IIR Port 3 (port.number is 2)
462 * Byte 4 IIR Port 4 (port.number is 3)
463 * Byte 5 FIFO status for both */
464
465 if (length && length > 5) {
466 dbg("%s", "Wrong data !!!");
467 return;
468 }
469
470 /* MATRIX */
471 if (ATEN2011_serial->ATEN2011_spectrum_2or4ports == 4) {
472 sp[0] = (__u8) data[0];
473 sp[1] = (__u8) data[1];
474 sp[2] = (__u8) data[2];
475 sp[3] = (__u8) data[3];
476 st = (__u8) data[4];
477 } else {
478 sp[0] = (__u8) data[0];
479 sp[1] = (__u8) data[2];
480 /* sp[2]=(__u8)data[2]; */
481 /* sp[3]=(__u8)data[3]; */
482 st = (__u8) data[4];
483
484 }
485 for (i = 0; i < serial->num_ports; i++) {
486 ATEN2011_port = usb_get_serial_port_data(serial->port[i]);
487 minor = serial->minor;
488 if (minor == SERIAL_TTY_NO_MINOR)
489 minor = 0;
490 if ((ATEN2011_serial->ATEN2011_spectrum_2or4ports == 2)
491 && (i != 0))
492 wval =
493 (((__u16) serial->port[i]->number -
494 (__u16) (minor)) + 2) << 8;
495 else
496 wval =
497 (((__u16) serial->port[i]->number -
498 (__u16) (minor)) + 1) << 8;
499 if (ATEN2011_port->open != 0) {
500 if (sp[i] & 0x01) {
501 dbg("SP%d No Interrupt !!!", i);
502 } else {
503 switch (sp[i] & 0x0f) {
504 case SERIAL_IIR_RLS:
505 dbg("Serial Port %d: Receiver status error or address bit detected in 9-bit mode", i);
506 ATEN2011_port->MsrLsr = 1;
507 ATEN2011_get_reg(ATEN2011_port, wval,
508 LINE_STATUS_REGISTER,
509 &Data);
510 break;
511 case SERIAL_IIR_MS:
512 dbg("Serial Port %d: Modem status change", i);
513 ATEN2011_port->MsrLsr = 0;
514 ATEN2011_get_reg(ATEN2011_port, wval,
515 MODEM_STATUS_REGISTER,
516 &Data);
517 break;
518 }
519 }
520 }
521
522 }
523exit:
524 if (ATEN2011_serial->status_polling_started == 0)
525 return;
526
527 result = usb_submit_urb(urb, GFP_ATOMIC);
528 if (result) {
529 dev_err(&urb->dev->dev,
530 "%s - Error %d submitting interrupt urb\n",
531 __func__, result);
532 }
533
534 return;
535}
536
537static void ATEN2011_bulk_in_callback(struct urb *urb)
538{
539 int status;
540 unsigned char *data;
541 struct usb_serial *serial;
542 struct usb_serial_port *port;
543 struct ATENINTL_serial *ATEN2011_serial;
544 struct ATENINTL_port *ATEN2011_port;
545 struct tty_struct *tty;
546
547 if (urb->status) {
548 dbg("nonzero read bulk status received: %d", urb->status);
549 return;
550 }
551
552 ATEN2011_port = (struct ATENINTL_port *)urb->context;
553
554 port = (struct usb_serial_port *)ATEN2011_port->port;
555 serial = port->serial;
556
557 dbg("%s", "Entering...");
558
559 data = urb->transfer_buffer;
560 ATEN2011_serial = usb_get_serial_data(serial);
561
562 if (urb->actual_length) {
563 tty = tty_port_tty_get(&ATEN2011_port->port->port);
564 if (tty) {
565 tty_buffer_request_room(tty, urb->actual_length);
566 tty_insert_flip_string(tty, data, urb->actual_length);
567 tty_flip_buffer_push(tty);
568 tty_kref_put(tty);
569 }
570
571 ATEN2011_port->icount.rx += urb->actual_length;
572 dbg("ATEN2011_port->icount.rx is %d:",
573 ATEN2011_port->icount.rx);
574 }
575
576 if (!ATEN2011_port->read_urb) {
577 dbg("%s", "URB KILLED !!!");
578 return;
579 }
580
581 if (ATEN2011_port->read_urb->status != -EINPROGRESS) {
582 ATEN2011_port->read_urb->dev = serial->dev;
583
584 status = usb_submit_urb(ATEN2011_port->read_urb, GFP_ATOMIC);
585 if (status)
586 dbg("usb_submit_urb(read bulk) failed, status = %d", status);
587 }
588}
589
590static void ATEN2011_bulk_out_data_callback(struct urb *urb)
591{
592 struct ATENINTL_port *ATEN2011_port;
593 struct tty_struct *tty;
594
595 if (urb->status) {
596 dbg("nonzero write bulk status received:%d", urb->status);
597 return;
598 }
599
600 ATEN2011_port = (struct ATENINTL_port *)urb->context;
601
602 dbg("%s", "Entering .........");
603
604 tty = tty_port_tty_get(&ATEN2011_port->port->port);
605
606 if (tty && ATEN2011_port->open)
607 /* tell the tty driver that something has changed */
608 tty_wakeup(tty);
609
610 /* schedule_work(&ATEN2011_port->port->work); */
611 tty_kref_put(tty);
612
613}
614
615#ifdef ATENSerialProbe
616static int ATEN2011_serial_probe(struct usb_serial *serial,
617 const struct usb_device_id *id)
618{
619
620 /*need to implement the mode_reg reading and updating\
621 structures usb_serial_ device_type\
622 (i.e num_ports, num_bulkin,bulkout etc) */
623 /* Also we can update the changes attach */
624 return 1;
625}
626#endif
627
628static int ATEN2011_open(struct tty_struct *tty, struct usb_serial_port *port,
629 struct file *filp)
630{
631 int response;
632 int j;
633 struct usb_serial *serial;
634 struct urb *urb;
635 __u16 Data;
636 int status;
637 struct ATENINTL_serial *ATEN2011_serial;
638 struct ATENINTL_port *ATEN2011_port;
639 struct ktermios tmp_termios;
640 int minor;
641
642 serial = port->serial;
643
644 ATEN2011_port = usb_get_serial_port_data(port);
645
646 if (ATEN2011_port == NULL)
647 return -ENODEV;
648
649 ATEN2011_serial = usb_get_serial_data(serial);
650 if (ATEN2011_serial == NULL)
651 return -ENODEV;
652
653 /* increment the number of opened ports counter here */
654 ATEN2011_serial->NoOfOpenPorts++;
655
656 usb_clear_halt(serial->dev, port->write_urb->pipe);
657 usb_clear_halt(serial->dev, port->read_urb->pipe);
658
659 /* Initialising the write urb pool */
660 for (j = 0; j < NUM_URBS; ++j) {
661 urb = usb_alloc_urb(0, GFP_ATOMIC);
662 ATEN2011_port->write_urb_pool[j] = urb;
663
664 if (urb == NULL) {
665 err("No more urbs???");
666 continue;
667 }
668
669 urb->transfer_buffer = NULL;
670 urb->transfer_buffer =
671 kmalloc(URB_TRANSFER_BUFFER_SIZE, GFP_KERNEL);
672 if (!urb->transfer_buffer) {
673 err("%s-out of memory for urb buffers.", __func__);
674 continue;
675 }
676 }
677
678/*****************************************************************************
679 * Initialize ATEN2011 -- Write Init values to corresponding Registers
680 *
681 * Register Index
682 * 1 : IER
683 * 2 : FCR
684 * 3 : LCR
685 * 4 : MCR
686 *
687 * 0x08 : SP1/2 Control Reg
688 *****************************************************************************/
689
690/* NEED to check the fallowing Block */
691
692 Data = 0x0;
693 status = get_reg_sync(port, ATEN2011_port->SpRegOffset, &Data);
694 if (status < 0) {
695 dbg("Reading Spreg failed");
696 return -1;
697 }
698 Data |= 0x80;
699 status = set_reg_sync(port, ATEN2011_port->SpRegOffset, Data);
700 if (status < 0) {
701 dbg("writing Spreg failed");
702 return -1;
703 }
704
705 Data &= ~0x80;
706 status = set_reg_sync(port, ATEN2011_port->SpRegOffset, Data);
707 if (status < 0) {
708 dbg("writing Spreg failed");
709 return -1;
710 }
711
712/* End of block to be checked */
713/**************************CHECK***************************/
714
715 if (RS485mode == 0)
716 Data = 0xC0;
717 else
718 Data = 0x00;
719 status = set_uart_reg(port, SCRATCH_PAD_REGISTER, Data);
720 if (status < 0) {
721 dbg("Writing SCRATCH_PAD_REGISTER failed status-0x%x", status);
722 return -1;
723 } else
724 dbg("SCRATCH_PAD_REGISTER Writing success status%d", status);
725
726/**************************CHECK***************************/
727
728 Data = 0x0;
729 status = get_reg_sync(port, ATEN2011_port->ControlRegOffset, &Data);
730 if (status < 0) {
731 dbg("Reading Controlreg failed");
732 return -1;
733 }
734 Data |= 0x08; /* Driver done bit */
735 Data |= 0x20; /* rx_disable */
736 status = 0;
737 status =
738 set_reg_sync(port, ATEN2011_port->ControlRegOffset, Data);
739 if (status < 0) {
740 dbg("writing Controlreg failed");
741 return -1;
742 }
743 /*
744 * do register settings here
745 * Set all regs to the device default values.
746 * First Disable all interrupts.
747 */
748
749 Data = 0x00;
750 status = set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
751 if (status < 0) {
752 dbg("disableing interrupts failed");
753 return -1;
754 }
755 /* Set FIFO_CONTROL_REGISTER to the default value */
756 Data = 0x00;
757 status = set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
758 if (status < 0) {
759 dbg("Writing FIFO_CONTROL_REGISTER failed");
760 return -1;
761 }
762
763 Data = 0xcf; /* chk */
764 status = set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
765 if (status < 0) {
766 dbg("Writing FIFO_CONTROL_REGISTER failed");
767 return -1;
768 }
769
770 Data = 0x03; /* LCR_BITS_8 */
771 status = set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
772 ATEN2011_port->shadowLCR = Data;
773
774 Data = 0x0b; /* MCR_DTR|MCR_RTS|MCR_MASTER_IE */
775 status = set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
776 ATEN2011_port->shadowMCR = Data;
777
778#ifdef Check
779 Data = 0x00;
780 status = get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
781 ATEN2011_port->shadowLCR = Data;
782
783 Data |= SERIAL_LCR_DLAB; /* data latch enable in LCR 0x80 */
784 status = set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
785
786 Data = 0x0c;
787 status = set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
788
789 Data = 0x0;
790 status = set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
791
792 Data = 0x00;
793 status = get_uart_reg(port, LINE_CONTROL_REGISTER, &Data);
794
795/* Data = ATEN2011_port->shadowLCR; */ /* data latch disable */
796 Data = Data & ~SERIAL_LCR_DLAB;
797 status = set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
798 ATEN2011_port->shadowLCR = Data;
799#endif
800 /* clearing Bulkin and Bulkout Fifo */
801 Data = 0x0;
802 status = get_reg_sync(port, ATEN2011_port->SpRegOffset, &Data);
803
804 Data = Data | 0x0c;
805 status = set_reg_sync(port, ATEN2011_port->SpRegOffset, Data);
806
807 Data = Data & ~0x0c;
808 status = set_reg_sync(port, ATEN2011_port->SpRegOffset, Data);
809 /* Finally enable all interrupts */
810 Data = 0x0;
811 Data = 0x0c;
812 status = set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
813
814 /* clearing rx_disable */
815 Data = 0x0;
816 status = get_reg_sync(port, ATEN2011_port->ControlRegOffset, &Data);
817 Data = Data & ~0x20;
818 status = set_reg_sync(port, ATEN2011_port->ControlRegOffset, Data);
819
820 /* rx_negate */
821 Data = 0x0;
822 status = get_reg_sync(port, ATEN2011_port->ControlRegOffset, &Data);
823 Data = Data | 0x10;
824 status = 0;
825 status = set_reg_sync(port, ATEN2011_port->ControlRegOffset, Data);
826
827 /*
828 * Check to see if we've set up our endpoint info yet
829 * (can't set it up in ATEN2011_startup as the structures
830 * were not set up at that time.)
831 */
832 if (ATEN2011_serial->NoOfOpenPorts == 1) {
833 /* start the status polling here */
834 ATEN2011_serial->status_polling_started = 1;
835 /* If not yet set, Set here */
836 ATEN2011_serial->interrupt_in_buffer =
837 serial->port[0]->interrupt_in_buffer;
838 ATEN2011_serial->interrupt_in_endpoint =
839 serial->port[0]->interrupt_in_endpointAddress;
840 ATEN2011_serial->interrupt_read_urb =
841 serial->port[0]->interrupt_in_urb;
842
843 /* set up interrupt urb */
844 usb_fill_int_urb(ATEN2011_serial->interrupt_read_urb,
845 serial->dev,
846 usb_rcvintpipe(serial->dev,
847 ATEN2011_serial->
848 interrupt_in_endpoint),
849 ATEN2011_serial->interrupt_in_buffer,
850 ATEN2011_serial->interrupt_read_urb->
851 transfer_buffer_length,
852 ATEN2011_interrupt_callback, ATEN2011_serial,
853 ATEN2011_serial->interrupt_read_urb->interval);
854
855 /* start interrupt read for ATEN2011 *
856 * will continue as long as ATEN2011 is connected */
857
858 response =
859 usb_submit_urb(ATEN2011_serial->interrupt_read_urb,
860 GFP_KERNEL);
861 if (response) {
862 dbg("%s - Error %d submitting interrupt urb",
863 __func__, response);
864 }
865
866 }
867
868 /*
869 * See if we've set up our endpoint info yet
870 * (can't set it up in ATEN2011_startup as the
871 * structures were not set up at that time.)
872 */
873
874 dbg("port number is %d", port->number);
875 dbg("serial number is %d", port->serial->minor);
876 dbg("Bulkin endpoint is %d", port->bulk_in_endpointAddress);
877 dbg("BulkOut endpoint is %d", port->bulk_out_endpointAddress);
878 dbg("Interrupt endpoint is %d",
879 port->interrupt_in_endpointAddress);
880 dbg("port's number in the device is %d", ATEN2011_port->port_num);
881 ATEN2011_port->bulk_in_buffer = port->bulk_in_buffer;
882 ATEN2011_port->bulk_in_endpoint = port->bulk_in_endpointAddress;
883 ATEN2011_port->read_urb = port->read_urb;
884 ATEN2011_port->bulk_out_endpoint = port->bulk_out_endpointAddress;
885
886 minor = port->serial->minor;
887 if (minor == SERIAL_TTY_NO_MINOR)
888 minor = 0;
889
890 /* set up our bulk in urb */
891 if ((ATEN2011_serial->ATEN2011_spectrum_2or4ports == 2)
892 && (((__u16) port->number - (__u16) (minor)) != 0)) {
893 usb_fill_bulk_urb(ATEN2011_port->read_urb, serial->dev,
894 usb_rcvbulkpipe(serial->dev,
895 (port->
896 bulk_in_endpointAddress +
897 2)), port->bulk_in_buffer,
898 ATEN2011_port->read_urb->
899 transfer_buffer_length,
900 ATEN2011_bulk_in_callback, ATEN2011_port);
901 } else
902 usb_fill_bulk_urb(ATEN2011_port->read_urb,
903 serial->dev,
904 usb_rcvbulkpipe(serial->dev,
905 port->
906 bulk_in_endpointAddress),
907 port->bulk_in_buffer,
908 ATEN2011_port->read_urb->
909 transfer_buffer_length,
910 ATEN2011_bulk_in_callback, ATEN2011_port);
911
912 dbg("ATEN2011_open: bulkin endpoint is %d",
913 port->bulk_in_endpointAddress);
914 response = usb_submit_urb(ATEN2011_port->read_urb, GFP_KERNEL);
915 if (response) {
916 err("%s - Error %d submitting control urb", __func__,
917 response);
918 }
919
920 /* initialize our wait queues */
921 init_waitqueue_head(&ATEN2011_port->wait_chase);
922 init_waitqueue_head(&ATEN2011_port->wait_command);
923
924 /* initialize our icount structure */
925 memset(&(ATEN2011_port->icount), 0x00, sizeof(ATEN2011_port->icount));
926
927 /* initialize our port settings */
928 ATEN2011_port->shadowMCR = MCR_MASTER_IE; /* Must set to enable ints! */
929 ATEN2011_port->chaseResponsePending = 0;
930 /* send a open port command */
931 ATEN2011_port->open = 1;
932 /* ATEN2011_change_port_settings(ATEN2011_port,old_termios); */
933 /* Setup termios */
934 ATEN2011_set_termios(tty, port, &tmp_termios);
935 ATEN2011_port->icount.tx = 0;
936 ATEN2011_port->icount.rx = 0;
937
938 dbg("usb_serial serial:%x ATEN2011_port:%x\nATEN2011_serial:%x usb_serial_port port:%x",
939 (unsigned int)serial, (unsigned int)ATEN2011_port,
940 (unsigned int)ATEN2011_serial, (unsigned int)port);
941
942 return 0;
943
944}
945
946static int ATEN2011_chars_in_buffer(struct tty_struct *tty)
947{
948 struct usb_serial_port *port = tty->driver_data;
949 int i;
950 int chars = 0;
951 struct ATENINTL_port *ATEN2011_port;
952
953 /* dbg("%s"," ATEN2011_chars_in_buffer:entering ..........."); */
954
955 ATEN2011_port = usb_get_serial_port_data(port);
956 if (ATEN2011_port == NULL) {
957 dbg("%s", "ATEN2011_break:leaving ...........");
958 return -1;
959 }
960
961 for (i = 0; i < NUM_URBS; ++i)
962 if (ATEN2011_port->write_urb_pool[i]->status == -EINPROGRESS)
963 chars += URB_TRANSFER_BUFFER_SIZE;
964
965 dbg("%s - returns %d", __func__, chars);
966 return chars;
967
968}
969
970static void ATEN2011_block_until_tx_empty(struct tty_struct *tty,
971 struct ATENINTL_port *ATEN2011_port)
972{
973 int timeout = HZ / 10;
974 int wait = 30;
975 int count;
976
977 while (1) {
978 count = ATEN2011_chars_in_buffer(tty);
979
980 /* Check for Buffer status */
981 if (count <= 0)
982 return;
983
984 /* Block the thread for a while */
985 interruptible_sleep_on_timeout(&ATEN2011_port->wait_chase,
986 timeout);
987
988 /* No activity.. count down section */
989 wait--;
990 if (wait == 0) {
991 dbg("%s - TIMEOUT", __func__);
992 return;
993 } else {
994 /* Reset timout value back to seconds */
995 wait = 30;
996 }
997 }
998}
999
1000static void ATEN2011_close(struct tty_struct *tty, struct usb_serial_port *port,
1001 struct file *filp)
1002{
1003 struct usb_serial *serial;
1004 struct ATENINTL_serial *ATEN2011_serial;
1005 struct ATENINTL_port *ATEN2011_port;
1006 int no_urbs;
1007 __u16 Data;
1008
1009 dbg("%s", "ATEN2011_close:entering...");
1010 serial = port->serial;
1011
1012 /* take the Adpater and port's private data */
1013 ATEN2011_serial = usb_get_serial_data(serial);
1014 ATEN2011_port = usb_get_serial_port_data(port);
1015 if ((ATEN2011_serial == NULL) || (ATEN2011_port == NULL))
1016 return;
1017
1018 if (serial->dev) {
1019 /* flush and block(wait) until tx is empty */
1020 ATEN2011_block_until_tx_empty(tty, ATEN2011_port);
1021 }
1022 /* kill the ports URB's */
1023 for (no_urbs = 0; no_urbs < NUM_URBS; no_urbs++)
1024 usb_kill_urb(ATEN2011_port->write_urb_pool[no_urbs]);
1025 /* Freeing Write URBs */
1026 for (no_urbs = 0; no_urbs < NUM_URBS; ++no_urbs) {
1027 kfree(ATEN2011_port->write_urb_pool[no_urbs]->transfer_buffer);
1028 usb_free_urb(ATEN2011_port->write_urb_pool[no_urbs]);
1029 }
1030 /* While closing port, shutdown all bulk read, write *
1031 * and interrupt read if they exists */
1032 if (serial->dev) {
1033 if (ATEN2011_port->write_urb) {
1034 dbg("%s", "Shutdown bulk write");
1035 usb_kill_urb(ATEN2011_port->write_urb);
1036 }
1037 if (ATEN2011_port->read_urb) {
1038 dbg("%s", "Shutdown bulk read");
1039 usb_kill_urb(ATEN2011_port->read_urb);
1040 }
1041 if ((&ATEN2011_port->control_urb)) {
1042 dbg("%s", "Shutdown control read");
1043 /* usb_kill_urb (ATEN2011_port->control_urb); */
1044
1045 }
1046 }
1047 /* if(ATEN2011_port->ctrl_buf != NULL) */
1048 /* kfree(ATEN2011_port->ctrl_buf); */
1049 /* decrement the no.of open ports counter of an individual USB-serial adapter. */
1050 ATEN2011_serial->NoOfOpenPorts--;
1051 dbg("NoOfOpenPorts in close%d:in port%d",
1052 ATEN2011_serial->NoOfOpenPorts, port->number);
1053 if (ATEN2011_serial->NoOfOpenPorts == 0) {
1054 /* stop the stus polling here */
1055 ATEN2011_serial->status_polling_started = 0;
1056 if (ATEN2011_serial->interrupt_read_urb) {
1057 dbg("%s", "Shutdown interrupt_read_urb");
1058 /* ATEN2011_serial->interrupt_in_buffer=NULL; */
1059 /* usb_kill_urb (ATEN2011_serial->interrupt_read_urb); */
1060 }
1061 }
1062 if (ATEN2011_port->write_urb) {
1063 /* if this urb had a transfer buffer already (old tx) free it */
1064 kfree(ATEN2011_port->write_urb->transfer_buffer);
1065 usb_free_urb(ATEN2011_port->write_urb);
1066 }
1067
1068 /* clear the MCR & IER */
1069 Data = 0x00;
1070 set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1071 Data = 0x00;
1072 set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1073
1074 ATEN2011_port->open = 0;
1075 dbg("%s", "Leaving ............");
1076
1077}
1078
1079static void ATEN2011_block_until_chase_response(struct tty_struct *tty,
1080 struct ATENINTL_port
1081 *ATEN2011_port)
1082{
1083 int timeout = 1 * HZ;
1084 int wait = 10;
1085 int count;
1086
1087 while (1) {
1088 count = ATEN2011_chars_in_buffer(tty);
1089
1090 /* Check for Buffer status */
1091 if (count <= 0) {
1092 ATEN2011_port->chaseResponsePending = 0;
1093 return;
1094 }
1095
1096 /* Block the thread for a while */
1097 interruptible_sleep_on_timeout(&ATEN2011_port->wait_chase,
1098 timeout);
1099 /* No activity.. count down section */
1100 wait--;
1101 if (wait == 0) {
1102 dbg("%s - TIMEOUT", __func__);
1103 return;
1104 } else {
1105 /* Reset timout value back to seconds */
1106 wait = 10;
1107 }
1108 }
1109
1110}
1111
1112static void ATEN2011_break(struct tty_struct *tty, int break_state)
1113{
1114 struct usb_serial_port *port = tty->driver_data;
1115 unsigned char data;
1116 struct usb_serial *serial;
1117 struct ATENINTL_serial *ATEN2011_serial;
1118 struct ATENINTL_port *ATEN2011_port;
1119
1120 dbg("%s", "Entering ...........");
1121 dbg("ATEN2011_break: Start");
1122
1123 serial = port->serial;
1124
1125 ATEN2011_serial = usb_get_serial_data(serial);
1126 ATEN2011_port = usb_get_serial_port_data(port);
1127
1128 if ((ATEN2011_serial == NULL) || (ATEN2011_port == NULL))
1129 return;
1130
1131 /* flush and chase */
1132 ATEN2011_port->chaseResponsePending = 1;
1133
1134 if (serial->dev) {
1135 /* flush and block until tx is empty */
1136 ATEN2011_block_until_chase_response(tty, ATEN2011_port);
1137 }
1138
1139 if (break_state == -1)
1140 data = ATEN2011_port->shadowLCR | LCR_SET_BREAK;
1141 else
1142 data = ATEN2011_port->shadowLCR & ~LCR_SET_BREAK;
1143
1144 ATEN2011_port->shadowLCR = data;
1145 dbg("ATEN2011_break ATEN2011_port->shadowLCR is %x",
1146 ATEN2011_port->shadowLCR);
1147 set_uart_reg(port, LINE_CONTROL_REGISTER, ATEN2011_port->shadowLCR);
1148
1149 return;
1150}
1151
1152static int ATEN2011_write_room(struct tty_struct *tty)
1153{
1154 struct usb_serial_port *port = tty->driver_data;
1155 int i;
1156 int room = 0;
1157 struct ATENINTL_port *ATEN2011_port;
1158
1159 ATEN2011_port = usb_get_serial_port_data(port);
1160 if (ATEN2011_port == NULL) {
1161 dbg("%s", "ATEN2011_break:leaving ...........");
1162 return -1;
1163 }
1164
1165 for (i = 0; i < NUM_URBS; ++i)
1166 if (ATEN2011_port->write_urb_pool[i]->status != -EINPROGRESS)
1167 room += URB_TRANSFER_BUFFER_SIZE;
1168
1169 dbg("%s - returns %d", __func__, room);
1170 return room;
1171
1172}
1173
1174static int ATEN2011_write(struct tty_struct *tty, struct usb_serial_port *port,
1175 const unsigned char *data, int count)
1176{
1177 int status;
1178 int i;
1179 int bytes_sent = 0;
1180 int transfer_size;
1181 int minor;
1182
1183 struct ATENINTL_port *ATEN2011_port;
1184 struct usb_serial *serial;
1185 struct ATENINTL_serial *ATEN2011_serial;
1186 struct urb *urb;
1187 const unsigned char *current_position = data;
1188 unsigned char *data1;
1189 dbg("%s", "entering ...........");
1190
1191 serial = port->serial;
1192
1193 ATEN2011_port = usb_get_serial_port_data(port);
1194 if (ATEN2011_port == NULL) {
1195 dbg("%s", "ATEN2011_port is NULL");
1196 return -1;
1197 }
1198
1199 ATEN2011_serial = usb_get_serial_data(serial);
1200 if (ATEN2011_serial == NULL) {
1201 dbg("%s", "ATEN2011_serial is NULL");
1202 return -1;
1203 }
1204
1205 /* try to find a free urb in the list */
1206 urb = NULL;
1207
1208 for (i = 0; i < NUM_URBS; ++i) {
1209 if (ATEN2011_port->write_urb_pool[i]->status != -EINPROGRESS) {
1210 urb = ATEN2011_port->write_urb_pool[i];
1211 dbg("URB:%d", i);
1212 break;
1213 }
1214 }
1215
1216 if (urb == NULL) {
1217 dbg("%s - no more free urbs", __func__);
1218 goto exit;
1219 }
1220
1221 if (urb->transfer_buffer == NULL) {
1222 urb->transfer_buffer =
1223 kmalloc(URB_TRANSFER_BUFFER_SIZE, GFP_KERNEL);
1224
1225 if (urb->transfer_buffer == NULL) {
1226 err("%s no more kernel memory...", __func__);
1227 goto exit;
1228 }
1229 }
1230 transfer_size = min(count, URB_TRANSFER_BUFFER_SIZE);
1231
1232 memcpy(urb->transfer_buffer, current_position, transfer_size);
1233 /* usb_serial_debug_data (__FILE__, __func__, transfer_size, urb->transfer_buffer); */
1234
1235 /* fill urb with data and submit */
1236 minor = port->serial->minor;
1237 if (minor == SERIAL_TTY_NO_MINOR)
1238 minor = 0;
1239 if ((ATEN2011_serial->ATEN2011_spectrum_2or4ports == 2)
1240 && (((__u16) port->number - (__u16) (minor)) != 0)) {
1241 usb_fill_bulk_urb(urb, ATEN2011_serial->serial->dev,
1242 usb_sndbulkpipe(ATEN2011_serial->serial->dev,
1243 (port->
1244 bulk_out_endpointAddress) +
1245 2), urb->transfer_buffer,
1246 transfer_size,
1247 ATEN2011_bulk_out_data_callback,
1248 ATEN2011_port);
1249 } else
1250
1251 usb_fill_bulk_urb(urb,
1252 ATEN2011_serial->serial->dev,
1253 usb_sndbulkpipe(ATEN2011_serial->serial->dev,
1254 port->
1255 bulk_out_endpointAddress),
1256 urb->transfer_buffer, transfer_size,
1257 ATEN2011_bulk_out_data_callback,
1258 ATEN2011_port);
1259
1260 data1 = urb->transfer_buffer;
1261 dbg("bulkout endpoint is %d", port->bulk_out_endpointAddress);
1262 /* for(i=0;i < urb->actual_length;i++) */
1263 /* dbg("Data is %c ",data1[i]); */
1264
1265 /* send it down the pipe */
1266 status = usb_submit_urb(urb, GFP_ATOMIC);
1267
1268 if (status) {
1269 err("%s - usb_submit_urb(write bulk) failed with status = %d",
1270 __func__, status);
1271 bytes_sent = status;
1272 goto exit;
1273 }
1274 bytes_sent = transfer_size;
1275 ATEN2011_port->icount.tx += transfer_size;
1276 dbg("ATEN2011_port->icount.tx is %d:", ATEN2011_port->icount.tx);
1277
1278exit:
1279 return bytes_sent;
1280}
1281
1282static void ATEN2011_throttle(struct tty_struct *tty)
1283{
1284 struct usb_serial_port *port = tty->driver_data;
1285 struct ATENINTL_port *ATEN2011_port;
1286 int status;
1287
1288 dbg("- port %d", port->number);
1289
1290 ATEN2011_port = usb_get_serial_port_data(port);
1291
1292 if (ATEN2011_port == NULL)
1293 return;
1294
1295 if (!ATEN2011_port->open) {
1296 dbg("%s", "port not opened");
1297 return;
1298 }
1299
1300 dbg("%s", "Entering .......... ");
1301
1302 if (!tty) {
1303 dbg("%s - no tty available", __func__);
1304 return;
1305 }
1306
1307 /* if we are implementing XON/XOFF, send the stop character */
1308 if (I_IXOFF(tty)) {
1309 unsigned char stop_char = STOP_CHAR(tty);
1310 status = ATEN2011_write(tty, port, &stop_char, 1);
1311 if (status <= 0)
1312 return;
1313 }
1314
1315 /* if we are implementing RTS/CTS, toggle that line */
1316 if (tty->termios->c_cflag & CRTSCTS) {
1317 ATEN2011_port->shadowMCR &= ~MCR_RTS;
1318 status = set_uart_reg(port, MODEM_CONTROL_REGISTER,
1319 ATEN2011_port->shadowMCR);
1320 if (status < 0)
1321 return;
1322 }
1323
1324 return;
1325}
1326
1327static void ATEN2011_unthrottle(struct tty_struct *tty)
1328{
1329 struct usb_serial_port *port = tty->driver_data;
1330 int status;
1331 struct ATENINTL_port *ATEN2011_port = usb_get_serial_port_data(port);
1332
1333 if (ATEN2011_port == NULL)
1334 return;
1335
1336 if (!ATEN2011_port->open) {
1337 dbg("%s - port not opened", __func__);
1338 return;
1339 }
1340
1341 dbg("%s", "Entering .......... ");
1342
1343 if (!tty) {
1344 dbg("%s - no tty available", __func__);
1345 return;
1346 }
1347
1348 /* if we are implementing XON/XOFF, send the start character */
1349 if (I_IXOFF(tty)) {
1350 unsigned char start_char = START_CHAR(tty);
1351 status = ATEN2011_write(tty, port, &start_char, 1);
1352 if (status <= 0)
1353 return;
1354 }
1355
1356 /* if we are implementing RTS/CTS, toggle that line */
1357 if (tty->termios->c_cflag & CRTSCTS) {
1358 ATEN2011_port->shadowMCR |= MCR_RTS;
1359 status = set_uart_reg(port, MODEM_CONTROL_REGISTER,
1360 ATEN2011_port->shadowMCR);
1361 if (status < 0)
1362 return;
1363 }
1364
1365 return;
1366}
1367
1368static int ATEN2011_tiocmget(struct tty_struct *tty, struct file *file)
1369{
1370 struct usb_serial_port *port = tty->driver_data;
1371 struct ATENINTL_port *ATEN2011_port;
1372 unsigned int result;
1373 __u16 msr;
1374 __u16 mcr;
1375 /* unsigned int mcr; */
1376 int status = 0;
1377 ATEN2011_port = usb_get_serial_port_data(port);
1378
1379 dbg("%s - port %d", __func__, port->number);
1380
1381 if (ATEN2011_port == NULL)
1382 return -ENODEV;
1383
1384 status = get_uart_reg(port, MODEM_STATUS_REGISTER, &msr);
1385 status = get_uart_reg(port, MODEM_CONTROL_REGISTER, &mcr);
1386 /* mcr = ATEN2011_port->shadowMCR; */
1387 /* COMMENT2: the Fallowing three line are commented for updating only MSR values */
1388 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0)
1389 | ((mcr & MCR_RTS) ? TIOCM_RTS : 0)
1390 | ((mcr & MCR_LOOPBACK) ? TIOCM_LOOP : 0)
1391 | ((msr & ATEN2011_MSR_CTS) ? TIOCM_CTS : 0)
1392 | ((msr & ATEN2011_MSR_CD) ? TIOCM_CAR : 0)
1393 | ((msr & ATEN2011_MSR_RI) ? TIOCM_RI : 0)
1394 | ((msr & ATEN2011_MSR_DSR) ? TIOCM_DSR : 0);
1395
1396 dbg("%s - 0x%04X", __func__, result);
1397
1398 return result;
1399}
1400
1401static int ATEN2011_tiocmset(struct tty_struct *tty, struct file *file,
1402 unsigned int set, unsigned int clear)
1403{
1404 struct usb_serial_port *port = tty->driver_data;
1405 struct ATENINTL_port *ATEN2011_port;
1406 unsigned int mcr;
1407 unsigned int status;
1408
1409 dbg("%s - port %d", __func__, port->number);
1410
1411 ATEN2011_port = usb_get_serial_port_data(port);
1412
1413 if (ATEN2011_port == NULL)
1414 return -ENODEV;
1415
1416 mcr = ATEN2011_port->shadowMCR;
1417 if (clear & TIOCM_RTS)
1418 mcr &= ~MCR_RTS;
1419 if (clear & TIOCM_DTR)
1420 mcr &= ~MCR_DTR;
1421 if (clear & TIOCM_LOOP)
1422 mcr &= ~MCR_LOOPBACK;
1423
1424 if (set & TIOCM_RTS)
1425 mcr |= MCR_RTS;
1426 if (set & TIOCM_DTR)
1427 mcr |= MCR_DTR;
1428 if (set & TIOCM_LOOP)
1429 mcr |= MCR_LOOPBACK;
1430
1431 ATEN2011_port->shadowMCR = mcr;
1432
1433 status = set_uart_reg(port, MODEM_CONTROL_REGISTER, mcr);
1434 if (status < 0) {
1435 dbg("setting MODEM_CONTROL_REGISTER Failed");
1436 return -1;
1437 }
1438
1439 return 0;
1440}
1441
1442static void ATEN2011_set_termios(struct tty_struct *tty,
1443 struct usb_serial_port *port,
1444 struct ktermios *old_termios)
1445{
1446 int status;
1447 unsigned int cflag;
1448 struct usb_serial *serial;
1449 struct ATENINTL_port *ATEN2011_port;
1450
1451 dbg("ATEN2011_set_termios: START");
1452
1453 serial = port->serial;
1454
1455 ATEN2011_port = usb_get_serial_port_data(port);
1456
1457 if (ATEN2011_port == NULL)
1458 return;
1459
1460 if (!ATEN2011_port->open) {
1461 dbg("%s - port not opened", __func__);
1462 return;
1463 }
1464
1465 dbg("%s", "setting termios - ");
1466
1467 cflag = tty->termios->c_cflag;
1468
1469 dbg("%s - cflag %08x iflag %08x", __func__,
1470 tty->termios->c_cflag, RELEVANT_IFLAG(tty->termios->c_iflag));
1471
1472 if (old_termios) {
1473 dbg("%s - old clfag %08x old iflag %08x", __func__,
1474 old_termios->c_cflag, RELEVANT_IFLAG(old_termios->c_iflag));
1475 }
1476
1477 dbg("%s - port %d", __func__, port->number);
1478
1479 /* change the port settings to the new ones specified */
1480
1481 ATEN2011_change_port_settings(tty, ATEN2011_port, old_termios);
1482
1483 if (!ATEN2011_port->read_urb) {
1484 dbg("%s", "URB KILLED !!!!!");
1485 return;
1486 }
1487
1488 if (ATEN2011_port->read_urb->status != -EINPROGRESS) {
1489 ATEN2011_port->read_urb->dev = serial->dev;
1490 status = usb_submit_urb(ATEN2011_port->read_urb, GFP_ATOMIC);
1491 if (status) {
1492 dbg
1493 (" usb_submit_urb(read bulk) failed, status = %d",
1494 status);
1495 }
1496 }
1497 return;
1498}
1499
1500static int get_lsr_info(struct tty_struct *tty,
1501 struct ATENINTL_port *ATEN2011_port,
1502 unsigned int __user *value)
1503{
1504 int count;
1505 unsigned int result = 0;
1506
1507 count = ATEN2011_chars_in_buffer(tty);
1508 if (count == 0) {
1509 dbg("%s -- Empty", __func__);
1510 result = TIOCSER_TEMT;
1511 }
1512
1513 if (copy_to_user(value, &result, sizeof(int)))
1514 return -EFAULT;
1515 return 0;
1516}
1517
1518static int get_number_bytes_avail(struct tty_struct *tty,
1519 struct ATENINTL_port *ATEN2011_port,
1520 unsigned int __user *value)
1521{
1522 unsigned int result = 0;
1523
1524 if (!tty)
1525 return -ENOIOCTLCMD;
1526
1527 result = tty->read_cnt;
1528
1529 dbg("%s(%d) = %d", __func__, ATEN2011_port->port->number, result);
1530 if (copy_to_user(value, &result, sizeof(int)))
1531 return -EFAULT;
1532
1533 return -ENOIOCTLCMD;
1534}
1535
1536static int set_modem_info(struct ATENINTL_port *ATEN2011_port, unsigned int cmd,
1537 unsigned int __user *value)
1538{
1539 unsigned int mcr;
1540 unsigned int arg;
1541 __u16 Data;
1542 int status;
1543 struct usb_serial_port *port;
1544
1545 if (ATEN2011_port == NULL)
1546 return -1;
1547
1548 port = (struct usb_serial_port *)ATEN2011_port->port;
1549
1550 mcr = ATEN2011_port->shadowMCR;
1551
1552 if (copy_from_user(&arg, value, sizeof(int)))
1553 return -EFAULT;
1554
1555 switch (cmd) {
1556 case TIOCMBIS:
1557 if (arg & TIOCM_RTS)
1558 mcr |= MCR_RTS;
1559 if (arg & TIOCM_DTR)
1560 mcr |= MCR_RTS;
1561 if (arg & TIOCM_LOOP)
1562 mcr |= MCR_LOOPBACK;
1563 break;
1564
1565 case TIOCMBIC:
1566 if (arg & TIOCM_RTS)
1567 mcr &= ~MCR_RTS;
1568 if (arg & TIOCM_DTR)
1569 mcr &= ~MCR_RTS;
1570 if (arg & TIOCM_LOOP)
1571 mcr &= ~MCR_LOOPBACK;
1572 break;
1573
1574 case TIOCMSET:
1575 /* turn off the RTS and DTR and LOOPBACK
1576 * and then only turn on what was asked to */
1577 mcr &= ~(MCR_RTS | MCR_DTR | MCR_LOOPBACK);
1578 mcr |= ((arg & TIOCM_RTS) ? MCR_RTS : 0);
1579 mcr |= ((arg & TIOCM_DTR) ? MCR_DTR : 0);
1580 mcr |= ((arg & TIOCM_LOOP) ? MCR_LOOPBACK : 0);
1581 break;
1582 }
1583
1584 ATEN2011_port->shadowMCR = mcr;
1585
1586 Data = ATEN2011_port->shadowMCR;
1587 status = set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1588 if (status < 0) {
1589 dbg("setting MODEM_CONTROL_REGISTER Failed");
1590 return -1;
1591 }
1592
1593 return 0;
1594}
1595
1596static int get_modem_info(struct ATENINTL_port *ATEN2011_port,
1597 unsigned int __user *value)
1598{
1599 unsigned int result = 0;
1600 __u16 msr;
1601 unsigned int mcr = ATEN2011_port->shadowMCR;
1602 int status;
1603
1604 status = get_uart_reg(ATEN2011_port->port, MODEM_STATUS_REGISTER, &msr);
1605 result = ((mcr & MCR_DTR) ? TIOCM_DTR : 0) /* 0x002 */
1606 |((mcr & MCR_RTS) ? TIOCM_RTS : 0) /* 0x004 */
1607 |((msr & ATEN2011_MSR_CTS) ? TIOCM_CTS : 0) /* 0x020 */
1608 |((msr & ATEN2011_MSR_CD) ? TIOCM_CAR : 0) /* 0x040 */
1609 |((msr & ATEN2011_MSR_RI) ? TIOCM_RI : 0) /* 0x080 */
1610 |((msr & ATEN2011_MSR_DSR) ? TIOCM_DSR : 0); /* 0x100 */
1611
1612 dbg("%s -- %x", __func__, result);
1613
1614 if (copy_to_user(value, &result, sizeof(int)))
1615 return -EFAULT;
1616 return 0;
1617}
1618
1619static int get_serial_info(struct ATENINTL_port *ATEN2011_port,
1620 struct serial_struct __user *retinfo)
1621{
1622 struct serial_struct tmp;
1623
1624 if (ATEN2011_port == NULL)
1625 return -1;
1626
1627 if (!retinfo)
1628 return -EFAULT;
1629
1630 memset(&tmp, 0, sizeof(tmp));
1631
1632 tmp.type = PORT_16550A;
1633 tmp.line = ATEN2011_port->port->serial->minor;
1634 if (tmp.line == SERIAL_TTY_NO_MINOR)
1635 tmp.line = 0;
1636 tmp.port = ATEN2011_port->port->number;
1637 tmp.irq = 0;
1638 tmp.flags = ASYNC_SKIP_TEST | ASYNC_AUTO_IRQ;
1639 tmp.xmit_fifo_size = NUM_URBS * URB_TRANSFER_BUFFER_SIZE;
1640 tmp.baud_base = 9600;
1641 tmp.close_delay = 5 * HZ;
1642 tmp.closing_wait = 30 * HZ;
1643
1644 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1645 return -EFAULT;
1646 return 0;
1647}
1648
1649static int ATEN2011_ioctl(struct tty_struct *tty, struct file *file,
1650 unsigned int cmd, unsigned long arg)
1651{
1652 struct usb_serial_port *port = tty->driver_data;
1653 struct ATENINTL_port *ATEN2011_port;
1654 struct async_icount cnow;
1655 struct async_icount cprev;
1656 struct serial_icounter_struct icount;
1657 int ATENret = 0;
1658 unsigned int __user *user_arg = (unsigned int __user *)arg;
1659
1660 ATEN2011_port = usb_get_serial_port_data(port);
1661
1662 if (ATEN2011_port == NULL)
1663 return -1;
1664
1665 dbg("%s - port %d, cmd = 0x%x", __func__, port->number, cmd);
1666
1667 switch (cmd) {
1668 /* return number of bytes available */
1669
1670 case TIOCINQ:
1671 dbg("%s (%d) TIOCINQ", __func__, port->number);
1672 return get_number_bytes_avail(tty, ATEN2011_port, user_arg);
1673 break;
1674
1675 case TIOCOUTQ:
1676 dbg("%s (%d) TIOCOUTQ", __func__, port->number);
1677 return put_user(ATEN2011_chars_in_buffer(tty), user_arg);
1678 break;
1679
1680 case TIOCSERGETLSR:
1681 dbg("%s (%d) TIOCSERGETLSR", __func__, port->number);
1682 return get_lsr_info(tty, ATEN2011_port, user_arg);
1683 return 0;
1684
1685 case TIOCMBIS:
1686 case TIOCMBIC:
1687 case TIOCMSET:
1688 dbg("%s (%d) TIOCMSET/TIOCMBIC/TIOCMSET", __func__,
1689 port->number);
1690 ATENret = set_modem_info(ATEN2011_port, cmd, user_arg);
1691 return ATENret;
1692
1693 case TIOCMGET:
1694 dbg("%s (%d) TIOCMGET", __func__, port->number);
1695 return get_modem_info(ATEN2011_port, user_arg);
1696
1697 case TIOCGSERIAL:
1698 dbg("%s (%d) TIOCGSERIAL", __func__, port->number);
1699 return get_serial_info(ATEN2011_port,
1700 (struct serial_struct __user *)arg);
1701
1702 case TIOCSSERIAL:
1703 dbg("%s (%d) TIOCSSERIAL", __func__, port->number);
1704 break;
1705
1706 case TIOCMIWAIT:
1707 dbg("%s (%d) TIOCMIWAIT", __func__, port->number);
1708 cprev = ATEN2011_port->icount;
1709 while (1) {
1710 /* see if a signal did it */
1711 if (signal_pending(current))
1712 return -ERESTARTSYS;
1713 cnow = ATEN2011_port->icount;
1714 if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
1715 cnow.dcd == cprev.dcd && cnow.cts == cprev.cts)
1716 return -EIO; /* no change => error */
1717 if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1718 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1719 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1720 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) {
1721 return 0;
1722 }
1723 cprev = cnow;
1724 }
1725 /* NOTREACHED */
1726 break;
1727
1728 case TIOCGICOUNT:
1729 cnow = ATEN2011_port->icount;
1730 icount.cts = cnow.cts;
1731 icount.dsr = cnow.dsr;
1732 icount.rng = cnow.rng;
1733 icount.dcd = cnow.dcd;
1734 icount.rx = cnow.rx;
1735 icount.tx = cnow.tx;
1736 icount.frame = cnow.frame;
1737 icount.overrun = cnow.overrun;
1738 icount.parity = cnow.parity;
1739 icount.brk = cnow.brk;
1740 icount.buf_overrun = cnow.buf_overrun;
1741
1742 dbg("%s (%d) TIOCGICOUNT RX=%d, TX=%d", __func__,
1743 port->number, icount.rx, icount.tx);
1744 if (copy_to_user((void __user *)arg, &icount, sizeof(icount)))
1745 return -EFAULT;
1746 return 0;
1747
1748 default:
1749 break;
1750 }
1751
1752 return -ENOIOCTLCMD;
1753}
1754
1755static int ATEN2011_calc_baud_rate_divisor(int baudRate, int *divisor,
1756 __u16 *clk_sel_val)
1757{
1758 dbg("%s - %d", __func__, baudRate);
1759
1760 if (baudRate <= 115200) {
1761 *divisor = 115200 / baudRate;
1762 *clk_sel_val = 0x0;
1763 }
1764 if ((baudRate > 115200) && (baudRate <= 230400)) {
1765 *divisor = 230400 / baudRate;
1766 *clk_sel_val = 0x10;
1767 } else if ((baudRate > 230400) && (baudRate <= 403200)) {
1768 *divisor = 403200 / baudRate;
1769 *clk_sel_val = 0x20;
1770 } else if ((baudRate > 403200) && (baudRate <= 460800)) {
1771 *divisor = 460800 / baudRate;
1772 *clk_sel_val = 0x30;
1773 } else if ((baudRate > 460800) && (baudRate <= 806400)) {
1774 *divisor = 806400 / baudRate;
1775 *clk_sel_val = 0x40;
1776 } else if ((baudRate > 806400) && (baudRate <= 921600)) {
1777 *divisor = 921600 / baudRate;
1778 *clk_sel_val = 0x50;
1779 } else if ((baudRate > 921600) && (baudRate <= 1572864)) {
1780 *divisor = 1572864 / baudRate;
1781 *clk_sel_val = 0x60;
1782 } else if ((baudRate > 1572864) && (baudRate <= 3145728)) {
1783 *divisor = 3145728 / baudRate;
1784 *clk_sel_val = 0x70;
1785 }
1786 return 0;
1787}
1788
1789static int ATEN2011_send_cmd_write_baud_rate(struct ATENINTL_port
1790 *ATEN2011_port, int baudRate)
1791{
1792 int divisor = 0;
1793 int status;
1794 __u16 Data;
1795 unsigned char number;
1796 __u16 clk_sel_val;
1797 struct usb_serial_port *port;
1798 int minor;
1799
1800 if (ATEN2011_port == NULL)
1801 return -1;
1802
1803 port = (struct usb_serial_port *)ATEN2011_port->port;
1804
1805 dbg("%s", "Entering .......... ");
1806
1807 minor = ATEN2011_port->port->serial->minor;
1808 if (minor == SERIAL_TTY_NO_MINOR)
1809 minor = 0;
1810 number = ATEN2011_port->port->number - minor;
1811
1812 dbg("%s - port = %d, baud = %d", __func__,
1813 ATEN2011_port->port->number, baudRate);
1814 /* reset clk_uart_sel in spregOffset */
1815 if (baudRate > 115200) {
1816#ifdef HW_flow_control
1817 /*
1818 * NOTE: need to see the pther register to modify
1819 * setting h/w flow control bit to 1;
1820 */
1821 /* Data = ATEN2011_port->shadowMCR; */
1822 Data = 0x2b;
1823 ATEN2011_port->shadowMCR = Data;
1824 status = set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1825 if (status < 0) {
1826 dbg("Writing spreg failed in set_serial_baud");
1827 return -1;
1828 }
1829#endif
1830
1831 } else {
1832#ifdef HW_flow_control
1833 /* setting h/w flow control bit to 0; */
1834 /* Data = ATEN2011_port->shadowMCR; */
1835 Data = 0xb;
1836 ATEN2011_port->shadowMCR = Data;
1837 status = set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
1838 if (status < 0) {
1839 dbg("Writing spreg failed in set_serial_baud");
1840 return -1;
1841 }
1842#endif
1843
1844 }
1845
1846 if (1) /* baudRate <= 115200) */ {
1847 clk_sel_val = 0x0;
1848 Data = 0x0;
1849 status =
1850 ATEN2011_calc_baud_rate_divisor(baudRate, &divisor,
1851 &clk_sel_val);
1852 status = get_reg_sync(port, ATEN2011_port->SpRegOffset, &Data);
1853 if (status < 0) {
1854 dbg("reading spreg failed in set_serial_baud");
1855 return -1;
1856 }
1857 Data = (Data & 0x8f) | clk_sel_val;
1858 status = set_reg_sync(port, ATEN2011_port->SpRegOffset, Data);
1859 if (status < 0) {
1860 dbg("Writing spreg failed in set_serial_baud");
1861 return -1;
1862 }
1863 /* Calculate the Divisor */
1864
1865 if (status) {
1866 err("%s - bad baud rate", __func__);
1867 dbg("%s", "bad baud rate");
1868 return status;
1869 }
1870 /* Enable access to divisor latch */
1871 Data = ATEN2011_port->shadowLCR | SERIAL_LCR_DLAB;
1872 ATEN2011_port->shadowLCR = Data;
1873 set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1874
1875 /* Write the divisor */
1876 Data = (unsigned char)(divisor & 0xff);
1877 dbg("set_serial_baud Value to write DLL is %x", Data);
1878 set_uart_reg(port, DIVISOR_LATCH_LSB, Data);
1879
1880 Data = (unsigned char)((divisor & 0xff00) >> 8);
1881 dbg("set_serial_baud Value to write DLM is %x", Data);
1882 set_uart_reg(port, DIVISOR_LATCH_MSB, Data);
1883
1884 /* Disable access to divisor latch */
1885 Data = ATEN2011_port->shadowLCR & ~SERIAL_LCR_DLAB;
1886 ATEN2011_port->shadowLCR = Data;
1887 set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
1888
1889 }
1890
1891 return status;
1892}
1893
1894static void ATEN2011_change_port_settings(struct tty_struct *tty,
1895 struct ATENINTL_port *ATEN2011_port,
1896 struct ktermios *old_termios)
1897{
1898 int baud;
1899 unsigned cflag;
1900 unsigned iflag;
1901 __u8 lData;
1902 __u8 lParity;
1903 __u8 lStop;
1904 int status;
1905 __u16 Data;
1906 struct usb_serial_port *port;
1907 struct usb_serial *serial;
1908
1909 if (ATEN2011_port == NULL)
1910 return;
1911
1912 port = (struct usb_serial_port *)ATEN2011_port->port;
1913
1914 serial = port->serial;
1915
1916 dbg("%s - port %d", __func__, ATEN2011_port->port->number);
1917
1918 if (!ATEN2011_port->open) {
1919 dbg("%s - port not opened", __func__);
1920 return;
1921 }
1922
1923 if ((!tty) || (!tty->termios)) {
1924 dbg("%s - no tty structures", __func__);
1925 return;
1926 }
1927
1928 dbg("%s", "Entering .......... ");
1929
1930 lData = LCR_BITS_8;
1931 lStop = LCR_STOP_1;
1932 lParity = LCR_PAR_NONE;
1933
1934 cflag = tty->termios->c_cflag;
1935 iflag = tty->termios->c_iflag;
1936
1937 /* Change the number of bits */
1938
1939 /* COMMENT1: the below Line"if(cflag & CSIZE)" is added for the errors we get for serial loop data test i.e serial_loopback.pl -v */
1940 /* if(cflag & CSIZE) */
1941 {
1942 switch (cflag & CSIZE) {
1943 case CS5:
1944 lData = LCR_BITS_5;
1945 break;
1946
1947 case CS6:
1948 lData = LCR_BITS_6;
1949 break;
1950
1951 case CS7:
1952 lData = LCR_BITS_7;
1953 break;
1954 default:
1955 case CS8:
1956 lData = LCR_BITS_8;
1957 break;
1958 }
1959 }
1960 /* Change the Parity bit */
1961 if (cflag & PARENB) {
1962 if (cflag & PARODD) {
1963 lParity = LCR_PAR_ODD;
1964 dbg("%s - parity = odd", __func__);
1965 } else {
1966 lParity = LCR_PAR_EVEN;
1967 dbg("%s - parity = even", __func__);
1968 }
1969
1970 } else {
1971 dbg("%s - parity = none", __func__);
1972 }
1973
1974 if (cflag & CMSPAR)
1975 lParity = lParity | 0x20;
1976
1977 /* Change the Stop bit */
1978 if (cflag & CSTOPB) {
1979 lStop = LCR_STOP_2;
1980 dbg("%s - stop bits = 2", __func__);
1981 } else {
1982 lStop = LCR_STOP_1;
1983 dbg("%s - stop bits = 1", __func__);
1984 }
1985
1986 /* Update the LCR with the correct value */
1987 ATEN2011_port->shadowLCR &=
1988 ~(LCR_BITS_MASK | LCR_STOP_MASK | LCR_PAR_MASK);
1989 ATEN2011_port->shadowLCR |= (lData | lParity | lStop);
1990
1991 dbg
1992 ("ATEN2011_change_port_settings ATEN2011_port->shadowLCR is %x",
1993 ATEN2011_port->shadowLCR);
1994 /* Disable Interrupts */
1995 Data = 0x00;
1996 set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
1997
1998 Data = 0x00;
1999 set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
2000
2001 Data = 0xcf;
2002 set_uart_reg(port, FIFO_CONTROL_REGISTER, Data);
2003
2004 /* Send the updated LCR value to the ATEN2011 */
2005 Data = ATEN2011_port->shadowLCR;
2006
2007 set_uart_reg(port, LINE_CONTROL_REGISTER, Data);
2008
2009 Data = 0x00b;
2010 ATEN2011_port->shadowMCR = Data;
2011 set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
2012 Data = 0x00b;
2013 set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
2014
2015 /* set up the MCR register and send it to the ATEN2011 */
2016
2017 ATEN2011_port->shadowMCR = MCR_MASTER_IE;
2018 if (cflag & CBAUD)
2019 ATEN2011_port->shadowMCR |= (MCR_DTR | MCR_RTS);
2020
2021 if (cflag & CRTSCTS)
2022 ATEN2011_port->shadowMCR |= (MCR_XON_ANY);
2023 else
2024 ATEN2011_port->shadowMCR &= ~(MCR_XON_ANY);
2025
2026 Data = ATEN2011_port->shadowMCR;
2027 set_uart_reg(port, MODEM_CONTROL_REGISTER, Data);
2028
2029 /* Determine divisor based on baud rate */
2030 baud = tty_get_baud_rate(tty);
2031
2032 if (!baud) {
2033 /* pick a default, any default... */
2034 dbg("%s", "Picked default baud...");
2035 baud = 9600;
2036 }
2037
2038 dbg("%s - baud rate = %d", __func__, baud);
2039 status = ATEN2011_send_cmd_write_baud_rate(ATEN2011_port, baud);
2040
2041 /* Enable Interrupts */
2042 Data = 0x0c;
2043 set_uart_reg(port, INTERRUPT_ENABLE_REGISTER, Data);
2044
2045 if (ATEN2011_port->read_urb->status != -EINPROGRESS) {
2046 ATEN2011_port->read_urb->dev = serial->dev;
2047
2048 status = usb_submit_urb(ATEN2011_port->read_urb, GFP_ATOMIC);
2049
2050 if (status) {
2051 dbg
2052 (" usb_submit_urb(read bulk) failed, status = %d",
2053 status);
2054 }
2055 }
2056 dbg
2057 ("ATEN2011_change_port_settings ATEN2011_port->shadowLCR is End %x",
2058 ATEN2011_port->shadowLCR);
2059
2060 return;
2061}
2062
2063static int ATEN2011_calc_num_ports(struct usb_serial *serial)
2064{
2065
2066 __u16 Data = 0x00;
2067 int ret = 0;
2068 int ATEN2011_2or4ports;
2069 ret = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
2070 ATEN_RDREQ, ATEN_RD_RTYPE, 0, GPIO_REGISTER,
2071 &Data, VENDOR_READ_LENGTH, ATEN_WDR_TIMEOUT);
2072
2073/* ghostgum: here is where the problem appears to bet */
2074/* Which of the following are needed? */
2075/* Greg used the serial->type->num_ports=2 */
2076/* But the code in the ATEN2011_open relies on serial->num_ports=2 */
2077 if ((Data & 0x01) == 0) {
2078 ATEN2011_2or4ports = 2;
2079 serial->type->num_ports = 2;
2080 serial->num_ports = 2;
2081 }
2082 /* else if(serial->interface->cur_altsetting->desc.bNumEndpoints == 9) */
2083 else {
2084 ATEN2011_2or4ports = 4;
2085 serial->type->num_ports = 4;
2086 serial->num_ports = 4;
2087
2088 }
2089
2090 return ATEN2011_2or4ports;
2091}
2092
2093static int ATEN2011_startup(struct usb_serial *serial)
2094{
2095 struct ATENINTL_serial *ATEN2011_serial;
2096 struct ATENINTL_port *ATEN2011_port;
2097 struct usb_device *dev;
2098 int i, status;
2099 int minor;
2100
2101 __u16 Data;
2102 dbg("%s", " ATEN2011_startup :entering..........");
2103
2104 if (!serial) {
2105 dbg("%s", "Invalid Handler");
2106 return -1;
2107 }
2108
2109 dev = serial->dev;
2110
2111 dbg("%s", "Entering...");
2112
2113 /* create our private serial structure */
2114 ATEN2011_serial = kzalloc(sizeof(struct ATENINTL_serial), GFP_KERNEL);
2115 if (ATEN2011_serial == NULL) {
2116 err("%s - Out of memory", __func__);
2117 return -ENOMEM;
2118 }
2119
2120 /* resetting the private structure field values to zero */
2121 memset(ATEN2011_serial, 0, sizeof(struct ATENINTL_serial));
2122
2123 ATEN2011_serial->serial = serial;
2124 /* initilize status polling flag to 0 */
2125 ATEN2011_serial->status_polling_started = 0;
2126
2127 usb_set_serial_data(serial, ATEN2011_serial);
2128 ATEN2011_serial->ATEN2011_spectrum_2or4ports =
2129 ATEN2011_calc_num_ports(serial);
2130 /* we set up the pointers to the endpoints in the ATEN2011_open *
2131 * function, as the structures aren't created yet. */
2132
2133 /* set up port private structures */
2134 for (i = 0; i < serial->num_ports; ++i) {
2135 ATEN2011_port =
2136 kmalloc(sizeof(struct ATENINTL_port), GFP_KERNEL);
2137 if (ATEN2011_port == NULL) {
2138 err("%s - Out of memory", __func__);
2139 usb_set_serial_data(serial, NULL);
2140 kfree(ATEN2011_serial);
2141 return -ENOMEM;
2142 }
2143 memset(ATEN2011_port, 0, sizeof(struct ATENINTL_port));
2144
2145 /*
2146 * Initialize all port interrupt end point to port 0
2147 * int endpoint. Our device has only one interrupt end point
2148 * comman to all port
2149 */
2150 /* serial->port[i]->interrupt_in_endpointAddress = serial->port[0]->interrupt_in_endpointAddress; */
2151
2152 ATEN2011_port->port = serial->port[i];
2153 usb_set_serial_port_data(serial->port[i], ATEN2011_port);
2154
2155 minor = serial->port[i]->serial->minor;
2156 if (minor == SERIAL_TTY_NO_MINOR)
2157 minor = 0;
2158 ATEN2011_port->port_num =
2159 ((serial->port[i]->number - minor) + 1);
2160
2161 if (ATEN2011_port->port_num == 1) {
2162 ATEN2011_port->SpRegOffset = 0x0;
2163 ATEN2011_port->ControlRegOffset = 0x1;
2164 ATEN2011_port->DcrRegOffset = 0x4;
2165 } else if ((ATEN2011_port->port_num == 2)
2166 && (ATEN2011_serial->ATEN2011_spectrum_2or4ports ==
2167 4)) {
2168 ATEN2011_port->SpRegOffset = 0x8;
2169 ATEN2011_port->ControlRegOffset = 0x9;
2170 ATEN2011_port->DcrRegOffset = 0x16;
2171 } else if ((ATEN2011_port->port_num == 2)
2172 && (ATEN2011_serial->ATEN2011_spectrum_2or4ports ==
2173 2)) {
2174 ATEN2011_port->SpRegOffset = 0xa;
2175 ATEN2011_port->ControlRegOffset = 0xb;
2176 ATEN2011_port->DcrRegOffset = 0x19;
2177 } else if ((ATEN2011_port->port_num == 3)
2178 && (ATEN2011_serial->ATEN2011_spectrum_2or4ports ==
2179 4)) {
2180 ATEN2011_port->SpRegOffset = 0xa;
2181 ATEN2011_port->ControlRegOffset = 0xb;
2182 ATEN2011_port->DcrRegOffset = 0x19;
2183 } else if ((ATEN2011_port->port_num == 4)
2184 && (ATEN2011_serial->ATEN2011_spectrum_2or4ports ==
2185 4)) {
2186 ATEN2011_port->SpRegOffset = 0xc;
2187 ATEN2011_port->ControlRegOffset = 0xd;
2188 ATEN2011_port->DcrRegOffset = 0x1c;
2189 }
2190
2191 usb_set_serial_port_data(serial->port[i], ATEN2011_port);
2192
2193 /* enable rx_disable bit in control register */
2194
2195 status = get_reg_sync(serial->port[i],
2196 ATEN2011_port->ControlRegOffset, &Data);
2197 if (status < 0) {
2198 dbg("Reading ControlReg failed status-0x%x",
2199 status);
2200 break;
2201 } else
2202 dbg
2203 ("ControlReg Reading success val is %x, status%d",
2204 Data, status);
2205 Data |= 0x08; /* setting driver done bit */
2206 Data |= 0x04; /* sp1_bit to have cts change reflect in modem status reg */
2207
2208 /* Data |= 0x20; */ /* rx_disable bit */
2209 status = set_reg_sync(serial->port[i],
2210 ATEN2011_port->ControlRegOffset, Data);
2211 if (status < 0) {
2212 dbg
2213 ("Writing ControlReg failed(rx_disable) status-0x%x",
2214 status);
2215 break;
2216 } else
2217 dbg
2218 ("ControlReg Writing success(rx_disable) status%d",
2219 status);
2220
2221 /*
2222 * Write default values in DCR (i.e 0x01 in DCR0, 0x05 in DCR2
2223 * and 0x24 in DCR3
2224 */
2225 Data = 0x01;
2226 status = set_reg_sync(serial->port[i],
2227 (__u16)(ATEN2011_port->DcrRegOffset + 0),
2228 Data);
2229 if (status < 0) {
2230 dbg("Writing DCR0 failed status-0x%x", status);
2231 break;
2232 } else
2233 dbg("DCR0 Writing success status%d", status);
2234
2235 Data = 0x05;
2236 status = set_reg_sync(serial->port[i],
2237 (__u16)(ATEN2011_port->DcrRegOffset + 1),
2238 Data);
2239 if (status < 0) {
2240 dbg("Writing DCR1 failed status-0x%x", status);
2241 break;
2242 } else
2243 dbg("DCR1 Writing success status%d", status);
2244
2245 Data = 0x24;
2246 status = set_reg_sync(serial->port[i],
2247 (__u16)(ATEN2011_port->DcrRegOffset + 2),
2248 Data);
2249 if (status < 0) {
2250 dbg("Writing DCR2 failed status-0x%x", status);
2251 break;
2252 } else
2253 dbg("DCR2 Writing success status%d", status);
2254
2255 /* write values in clkstart0x0 and clkmulti 0x20 */
2256 Data = 0x0;
2257 status = set_reg_sync(serial->port[i], CLK_START_VALUE_REGISTER,
2258 Data);
2259 if (status < 0) {
2260 dbg
2261 ("Writing CLK_START_VALUE_REGISTER failed status-0x%x",
2262 status);
2263 break;
2264 } else
2265 dbg
2266 ("CLK_START_VALUE_REGISTER Writing success status%d",
2267 status);
2268
2269 Data = 0x20;
2270 status = set_reg_sync(serial->port[i], CLK_MULTI_REGISTER,
2271 Data);
2272 if (status < 0) {
2273 dbg
2274 ("Writing CLK_MULTI_REGISTER failed status-0x%x",
2275 status);
2276 break;
2277 } else
2278 dbg("CLK_MULTI_REGISTER Writing success status%d",
2279 status);
2280
2281 /* Zero Length flag register */
2282 if ((ATEN2011_port->port_num != 1)
2283 && (ATEN2011_serial->ATEN2011_spectrum_2or4ports == 2)) {
2284
2285 Data = 0xff;
2286 status = set_reg_sync(serial->port[i],
2287 (__u16)(ZLP_REG1 + ((__u16)ATEN2011_port->port_num)),
2288 Data);
2289 dbg("ZLIP offset%x",
2290 (__u16) (ZLP_REG1 +
2291 ((__u16) ATEN2011_port->port_num)));
2292 if (status < 0) {
2293 dbg
2294 ("Writing ZLP_REG%d failed status-0x%x",
2295 i + 2, status);
2296 break;
2297 } else
2298 dbg("ZLP_REG%d Writing success status%d",
2299 i + 2, status);
2300 } else {
2301 Data = 0xff;
2302 status = set_reg_sync(serial->port[i],
2303 (__u16)(ZLP_REG1 + ((__u16)ATEN2011_port->port_num) - 0x1),
2304 Data);
2305 dbg("ZLIP offset%x",
2306 (__u16) (ZLP_REG1 +
2307 ((__u16) ATEN2011_port->port_num) -
2308 0x1));
2309 if (status < 0) {
2310 dbg
2311 ("Writing ZLP_REG%d failed status-0x%x",
2312 i + 1, status);
2313 break;
2314 } else
2315 dbg("ZLP_REG%d Writing success status%d",
2316 i + 1, status);
2317
2318 }
2319 ATEN2011_port->control_urb = usb_alloc_urb(0, GFP_ATOMIC);
2320 ATEN2011_port->ctrl_buf = kmalloc(16, GFP_KERNEL);
2321
2322 }
2323
2324 /* Zero Length flag enable */
2325 Data = 0x0f;
2326 status = set_reg_sync(serial->port[0], ZLP_REG5, Data);
2327 if (status < 0) {
2328 dbg("Writing ZLP_REG5 failed status-0x%x", status);
2329 return -1;
2330 } else
2331 dbg("ZLP_REG5 Writing success status%d", status);
2332
2333 /* setting configuration feature to one */
2334 usb_control_msg(serial->dev, usb_sndctrlpipe(serial->dev, 0),
2335 (__u8) 0x03, 0x00, 0x01, 0x00, NULL, 0x00, 5 * HZ);
2336 return 0;
2337}
2338
2339static void ATEN2011_release(struct usb_serial *serial)
2340{
2341 int i;
2342 struct ATENINTL_port *ATEN2011_port;
2343
2344 /* check for the ports to be closed,close the ports and disconnect */
2345
2346 /* free private structure allocated for serial port *
2347 * stop reads and writes on all ports */
2348
2349 for (i = 0; i < serial->num_ports; ++i) {
2350 ATEN2011_port = usb_get_serial_port_data(serial->port[i]);
2351 kfree(ATEN2011_port->ctrl_buf);
2352 usb_kill_urb(ATEN2011_port->control_urb);
2353 kfree(ATEN2011_port);
2354 usb_set_serial_port_data(serial->port[i], NULL);
2355 }
2356
2357 /* free private structure allocated for serial device */
2358
2359 kfree(usb_get_serial_data(serial));
2360 usb_set_serial_data(serial, NULL);
2361}
2362
2363static struct usb_serial_driver aten_serial_driver = {
2364 .driver = {
2365 .owner = THIS_MODULE,
2366 .name = "aten2011",
2367 },
2368 .description = DRIVER_DESC,
2369 .id_table = id_table,
2370 .open = ATEN2011_open,
2371 .close = ATEN2011_close,
2372 .write = ATEN2011_write,
2373 .write_room = ATEN2011_write_room,
2374 .chars_in_buffer = ATEN2011_chars_in_buffer,
2375 .throttle = ATEN2011_throttle,
2376 .unthrottle = ATEN2011_unthrottle,
2377 .calc_num_ports = ATEN2011_calc_num_ports,
2378
2379 .ioctl = ATEN2011_ioctl,
2380 .set_termios = ATEN2011_set_termios,
2381 .break_ctl = ATEN2011_break,
2382 .tiocmget = ATEN2011_tiocmget,
2383 .tiocmset = ATEN2011_tiocmset,
2384 .attach = ATEN2011_startup,
2385 .release = ATEN2011_release,
2386 .read_bulk_callback = ATEN2011_bulk_in_callback,
2387 .read_int_callback = ATEN2011_interrupt_callback,
2388};
2389
2390static struct usb_driver aten_driver = {
2391 .name = "aten2011",
2392 .probe = usb_serial_probe,
2393 .disconnect = usb_serial_disconnect,
2394 .id_table = id_table,
2395};
2396
2397static int __init aten_init(void)
2398{
2399 int retval;
2400
2401 /* Register with the usb serial */
2402 retval = usb_serial_register(&aten_serial_driver);
2403 if (retval)
2404 return retval;
2405
2406 printk(KERN_INFO KBUILD_MODNAME ":"
2407 DRIVER_DESC " " DRIVER_VERSION "\n");
2408
2409 /* Register with the usb */
2410 retval = usb_register(&aten_driver);
2411 if (retval)
2412 usb_serial_deregister(&aten_serial_driver);
2413
2414 return retval;
2415}
2416
2417static void __exit aten_exit(void)
2418{
2419 usb_deregister(&aten_driver);
2420 usb_serial_deregister(&aten_serial_driver);
2421}
2422
2423module_init(aten_init);
2424module_exit(aten_exit);
2425
2426/* Module information */
2427MODULE_DESCRIPTION(DRIVER_DESC);
2428MODULE_LICENSE("GPL");
2429
2430MODULE_PARM_DESC(debug, "Debug enabled or not");
diff --git a/drivers/staging/udlfb/udlfb.c b/drivers/staging/udlfb/udlfb.c
index 0ab9d15f3439..f5416af1e902 100644
--- a/drivers/staging/udlfb/udlfb.c
+++ b/drivers/staging/udlfb/udlfb.c
@@ -21,6 +21,7 @@
21#include <linux/mm.h> 21#include <linux/mm.h>
22#include <linux/fb.h> 22#include <linux/fb.h>
23#include <linux/mutex.h> 23#include <linux/mutex.h>
24#include <linux/vmalloc.h>
24 25
25#include "udlfb.h" 26#include "udlfb.h"
26 27
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index e1f89416ef8c..2bfc41ece0e1 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -387,7 +387,6 @@ static void acm_rx_tasklet(unsigned long _acm)
387 struct acm_ru *rcv; 387 struct acm_ru *rcv;
388 unsigned long flags; 388 unsigned long flags;
389 unsigned char throttled; 389 unsigned char throttled;
390 struct usb_host_endpoint *ep;
391 390
392 dbg("Entering acm_rx_tasklet"); 391 dbg("Entering acm_rx_tasklet");
393 392
@@ -463,14 +462,12 @@ urbs:
463 462
464 rcv->buffer = buf; 463 rcv->buffer = buf;
465 464
466 ep = (usb_pipein(acm->rx_endpoint) ? acm->dev->ep_in : acm->dev->ep_out) 465 if (acm->is_int_ep)
467 [usb_pipeendpoint(acm->rx_endpoint)];
468 if (usb_endpoint_xfer_int(&ep->desc))
469 usb_fill_int_urb(rcv->urb, acm->dev, 466 usb_fill_int_urb(rcv->urb, acm->dev,
470 acm->rx_endpoint, 467 acm->rx_endpoint,
471 buf->base, 468 buf->base,
472 acm->readsize, 469 acm->readsize,
473 acm_read_bulk, rcv, ep->desc.bInterval); 470 acm_read_bulk, rcv, acm->bInterval);
474 else 471 else
475 usb_fill_bulk_urb(rcv->urb, acm->dev, 472 usb_fill_bulk_urb(rcv->urb, acm->dev,
476 acm->rx_endpoint, 473 acm->rx_endpoint,
@@ -1183,6 +1180,9 @@ made_compressed_probe:
1183 spin_lock_init(&acm->read_lock); 1180 spin_lock_init(&acm->read_lock);
1184 mutex_init(&acm->mutex); 1181 mutex_init(&acm->mutex);
1185 acm->rx_endpoint = usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress); 1182 acm->rx_endpoint = usb_rcvbulkpipe(usb_dev, epread->bEndpointAddress);
1183 acm->is_int_ep = usb_endpoint_xfer_int(epread);
1184 if (acm->is_int_ep)
1185 acm->bInterval = epread->bInterval;
1186 tty_port_init(&acm->port); 1186 tty_port_init(&acm->port);
1187 acm->port.ops = &acm_port_ops; 1187 acm->port.ops = &acm_port_ops;
1188 1188
diff --git a/drivers/usb/class/cdc-acm.h b/drivers/usb/class/cdc-acm.h
index 1602324808ba..c4a0ee8ffccf 100644
--- a/drivers/usb/class/cdc-acm.h
+++ b/drivers/usb/class/cdc-acm.h
@@ -126,6 +126,8 @@ struct acm {
126 unsigned int ctrl_caps; /* control capabilities from the class specific header */ 126 unsigned int ctrl_caps; /* control capabilities from the class specific header */
127 unsigned int susp_count; /* number of suspended interfaces */ 127 unsigned int susp_count; /* number of suspended interfaces */
128 int combined_interfaces:1; /* control and data collapsed */ 128 int combined_interfaces:1; /* control and data collapsed */
129 int is_int_ep:1; /* interrupt endpoints contrary to spec used */
130 u8 bInterval;
129 struct acm_wb *delayed_wb; /* write queued for a device about to be woken */ 131 struct acm_wb *delayed_wb; /* write queued for a device about to be woken */
130}; 132};
131 133
diff --git a/drivers/usb/core/config.c b/drivers/usb/core/config.c
index 24dfb33f90cb..a16c538d0132 100644
--- a/drivers/usb/core/config.c
+++ b/drivers/usb/core/config.c
@@ -80,38 +80,18 @@ static int usb_parse_ss_endpoint_companion(struct device *ddev, int cfgno,
80 int max_tx; 80 int max_tx;
81 int i; 81 int i;
82 82
83 /* Allocate space for the SS endpoint companion descriptor */
84 ep->ss_ep_comp = kzalloc(sizeof(struct usb_host_ss_ep_comp),
85 GFP_KERNEL);
86 if (!ep->ss_ep_comp)
87 return -ENOMEM;
88 desc = (struct usb_ss_ep_comp_descriptor *) buffer; 83 desc = (struct usb_ss_ep_comp_descriptor *) buffer;
89 if (desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP) { 84 if (desc->bDescriptorType != USB_DT_SS_ENDPOINT_COMP) {
90 dev_warn(ddev, "No SuperSpeed endpoint companion for config %d " 85 dev_warn(ddev, "No SuperSpeed endpoint companion for config %d "
91 " interface %d altsetting %d ep %d: " 86 " interface %d altsetting %d ep %d: "
92 "using minimum values\n", 87 "using minimum values\n",
93 cfgno, inum, asnum, ep->desc.bEndpointAddress); 88 cfgno, inum, asnum, ep->desc.bEndpointAddress);
94 ep->ss_ep_comp->desc.bLength = USB_DT_SS_EP_COMP_SIZE;
95 ep->ss_ep_comp->desc.bDescriptorType = USB_DT_SS_ENDPOINT_COMP;
96 ep->ss_ep_comp->desc.bMaxBurst = 0;
97 /*
98 * Leave bmAttributes as zero, which will mean no streams for
99 * bulk, and isoc won't support multiple bursts of packets.
100 * With bursts of only one packet, and a Mult of 1, the max
101 * amount of data moved per endpoint service interval is one
102 * packet.
103 */
104 if (usb_endpoint_xfer_isoc(&ep->desc) ||
105 usb_endpoint_xfer_int(&ep->desc))
106 ep->ss_ep_comp->desc.wBytesPerInterval =
107 ep->desc.wMaxPacketSize;
108 /* 89 /*
109 * The next descriptor is for an Endpoint or Interface, 90 * The next descriptor is for an Endpoint or Interface,
110 * no extra descriptors to copy into the companion structure, 91 * no extra descriptors to copy into the companion structure,
111 * and we didn't eat up any of the buffer. 92 * and we didn't eat up any of the buffer.
112 */ 93 */
113 retval = 0; 94 return 0;
114 goto valid;
115 } 95 }
116 memcpy(&ep->ss_ep_comp->desc, desc, USB_DT_SS_EP_COMP_SIZE); 96 memcpy(&ep->ss_ep_comp->desc, desc, USB_DT_SS_EP_COMP_SIZE);
117 desc = &ep->ss_ep_comp->desc; 97 desc = &ep->ss_ep_comp->desc;
@@ -320,6 +300,28 @@ static int usb_parse_endpoint(struct device *ddev, int cfgno, int inum,
320 buffer += i; 300 buffer += i;
321 size -= i; 301 size -= i;
322 302
303 /* Allocate space for the SS endpoint companion descriptor */
304 endpoint->ss_ep_comp = kzalloc(sizeof(struct usb_host_ss_ep_comp),
305 GFP_KERNEL);
306 if (!endpoint->ss_ep_comp)
307 return -ENOMEM;
308
309 /* Fill in some default values (may be overwritten later) */
310 endpoint->ss_ep_comp->desc.bLength = USB_DT_SS_EP_COMP_SIZE;
311 endpoint->ss_ep_comp->desc.bDescriptorType = USB_DT_SS_ENDPOINT_COMP;
312 endpoint->ss_ep_comp->desc.bMaxBurst = 0;
313 /*
314 * Leave bmAttributes as zero, which will mean no streams for
315 * bulk, and isoc won't support multiple bursts of packets.
316 * With bursts of only one packet, and a Mult of 1, the max
317 * amount of data moved per endpoint service interval is one
318 * packet.
319 */
320 if (usb_endpoint_xfer_isoc(&endpoint->desc) ||
321 usb_endpoint_xfer_int(&endpoint->desc))
322 endpoint->ss_ep_comp->desc.wBytesPerInterval =
323 endpoint->desc.wMaxPacketSize;
324
323 if (size > 0) { 325 if (size > 0) {
324 retval = usb_parse_ss_endpoint_companion(ddev, cfgno, 326 retval = usb_parse_ss_endpoint_companion(ddev, cfgno,
325 inum, asnum, endpoint, num_ep, buffer, 327 inum, asnum, endpoint, num_ep, buffer,
@@ -329,6 +331,10 @@ static int usb_parse_endpoint(struct device *ddev, int cfgno, int inum,
329 retval = buffer - buffer0; 331 retval = buffer - buffer0;
330 } 332 }
331 } else { 333 } else {
334 dev_warn(ddev, "config %d interface %d altsetting %d "
335 "endpoint 0x%X has no "
336 "SuperSpeed companion descriptor\n",
337 cfgno, inum, asnum, d->bEndpointAddress);
332 retval = buffer - buffer0; 338 retval = buffer - buffer0;
333 } 339 }
334 } else { 340 } else {
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index 38b8bce782d6..4247eccf858c 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -595,7 +595,7 @@ static int usbdev_open(struct inode *inode, struct file *file)
595 if (!ps) 595 if (!ps)
596 goto out; 596 goto out;
597 597
598 ret = -ENOENT; 598 ret = -ENODEV;
599 599
600 /* usbdev device-node */ 600 /* usbdev device-node */
601 if (imajor(inode) == USB_DEVICE_MAJOR) 601 if (imajor(inode) == USB_DEVICE_MAJOR)
@@ -1321,7 +1321,8 @@ static int get_urb32(struct usbdevfs_urb *kurb,
1321 struct usbdevfs_urb32 __user *uurb) 1321 struct usbdevfs_urb32 __user *uurb)
1322{ 1322{
1323 __u32 uptr; 1323 __u32 uptr;
1324 if (get_user(kurb->type, &uurb->type) || 1324 if (!access_ok(VERIFY_READ, uurb, sizeof(*uurb)) ||
1325 __get_user(kurb->type, &uurb->type) ||
1325 __get_user(kurb->endpoint, &uurb->endpoint) || 1326 __get_user(kurb->endpoint, &uurb->endpoint) ||
1326 __get_user(kurb->status, &uurb->status) || 1327 __get_user(kurb->status, &uurb->status) ||
1327 __get_user(kurb->flags, &uurb->flags) || 1328 __get_user(kurb->flags, &uurb->flags) ||
@@ -1536,8 +1537,9 @@ static int proc_ioctl_compat(struct dev_state *ps, compat_uptr_t arg)
1536 u32 udata; 1537 u32 udata;
1537 1538
1538 uioc = compat_ptr((long)arg); 1539 uioc = compat_ptr((long)arg);
1539 if (get_user(ctrl.ifno, &uioc->ifno) || 1540 if (!access_ok(VERIFY_READ, uioc, sizeof(*uioc)) ||
1540 get_user(ctrl.ioctl_code, &uioc->ioctl_code) || 1541 __get_user(ctrl.ifno, &uioc->ifno) ||
1542 __get_user(ctrl.ioctl_code, &uioc->ioctl_code) ||
1541 __get_user(udata, &uioc->data)) 1543 __get_user(udata, &uioc->data))
1542 return -EFAULT; 1544 return -EFAULT;
1543 ctrl.data = compat_ptr(udata); 1545 ctrl.data = compat_ptr(udata);
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 7d03549c3339..11c627ce6022 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -903,7 +903,8 @@ static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
903 /* already started */ 903 /* already started */
904 break; 904 break;
905 case QH_STATE_IDLE: 905 case QH_STATE_IDLE:
906 WARN_ON(1); 906 /* QH might be waiting for a Clear-TT-Buffer */
907 qh_completions(ehci, qh);
907 break; 908 break;
908 } 909 }
909 break; 910 break;
diff --git a/drivers/usb/host/ehci-orion.c b/drivers/usb/host/ehci-orion.c
index dc2ac613a9d1..1d283e1b2b8d 100644
--- a/drivers/usb/host/ehci-orion.c
+++ b/drivers/usb/host/ehci-orion.c
@@ -105,6 +105,7 @@ static int ehci_orion_setup(struct usb_hcd *hcd)
105 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 105 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
106 int retval; 106 int retval;
107 107
108 ehci_reset(ehci);
108 retval = ehci_halt(ehci); 109 retval = ehci_halt(ehci);
109 if (retval) 110 if (retval)
110 return retval; 111 return retval;
@@ -118,7 +119,6 @@ static int ehci_orion_setup(struct usb_hcd *hcd)
118 119
119 hcd->has_tt = 1; 120 hcd->has_tt = 1;
120 121
121 ehci_reset(ehci);
122 ehci_port_power(ehci, 0); 122 ehci_port_power(ehci, 0);
123 123
124 return retval; 124 return retval;
diff --git a/drivers/usb/host/ehci-q.c b/drivers/usb/host/ehci-q.c
index 9a1384747f3b..7673554fa64d 100644
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -375,12 +375,11 @@ qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
375 */ 375 */
376 if ((token & QTD_STS_XACT) && 376 if ((token & QTD_STS_XACT) &&
377 QTD_CERR(token) == 0 && 377 QTD_CERR(token) == 0 &&
378 --qh->xacterrs > 0 && 378 ++qh->xacterrs < QH_XACTERR_MAX &&
379 !urb->unlinked) { 379 !urb->unlinked) {
380 ehci_dbg(ehci, 380 ehci_dbg(ehci,
381 "detected XactErr len %zu/%zu retry %d\n", 381 "detected XactErr len %zu/%zu retry %d\n",
382 qtd->length - QTD_LENGTH(token), qtd->length, 382 qtd->length - QTD_LENGTH(token), qtd->length, qh->xacterrs);
383 QH_XACTERR_MAX - qh->xacterrs);
384 383
385 /* reset the token in the qtd and the 384 /* reset the token in the qtd and the
386 * qh overlay (which still contains 385 * qh overlay (which still contains
@@ -494,7 +493,7 @@ halt:
494 last = qtd; 493 last = qtd;
495 494
496 /* reinit the xacterr counter for the next qtd */ 495 /* reinit the xacterr counter for the next qtd */
497 qh->xacterrs = QH_XACTERR_MAX; 496 qh->xacterrs = 0;
498 } 497 }
499 498
500 /* last urb's completion might still need calling */ 499 /* last urb's completion might still need calling */
@@ -940,7 +939,8 @@ static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
940 head->qh_next.qh = qh; 939 head->qh_next.qh = qh;
941 head->hw_next = dma; 940 head->hw_next = dma;
942 941
943 qh->xacterrs = QH_XACTERR_MAX; 942 qh_get(qh);
943 qh->xacterrs = 0;
944 qh->qh_state = QH_STATE_LINKED; 944 qh->qh_state = QH_STATE_LINKED;
945 /* qtd completions reported later by interrupt */ 945 /* qtd completions reported later by interrupt */
946} 946}
@@ -1080,7 +1080,7 @@ submit_async (
1080 * the HC and TT handle it when the TT has a buffer ready. 1080 * the HC and TT handle it when the TT has a buffer ready.
1081 */ 1081 */
1082 if (likely (qh->qh_state == QH_STATE_IDLE)) 1082 if (likely (qh->qh_state == QH_STATE_IDLE))
1083 qh_link_async (ehci, qh_get (qh)); 1083 qh_link_async(ehci, qh);
1084 done: 1084 done:
1085 spin_unlock_irqrestore (&ehci->lock, flags); 1085 spin_unlock_irqrestore (&ehci->lock, flags);
1086 if (unlikely (qh == NULL)) 1086 if (unlikely (qh == NULL))
@@ -1115,8 +1115,6 @@ static void end_unlink_async (struct ehci_hcd *ehci)
1115 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state)) 1115 && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
1116 qh_link_async (ehci, qh); 1116 qh_link_async (ehci, qh);
1117 else { 1117 else {
1118 qh_put (qh); // refcount from async list
1119
1120 /* it's not free to turn the async schedule on/off; leave it 1118 /* it's not free to turn the async schedule on/off; leave it
1121 * active but idle for a while once it empties. 1119 * active but idle for a while once it empties.
1122 */ 1120 */
@@ -1124,6 +1122,7 @@ static void end_unlink_async (struct ehci_hcd *ehci)
1124 && ehci->async->qh_next.qh == NULL) 1122 && ehci->async->qh_next.qh == NULL)
1125 timer_action (ehci, TIMER_ASYNC_OFF); 1123 timer_action (ehci, TIMER_ASYNC_OFF);
1126 } 1124 }
1125 qh_put(qh); /* refcount from async list */
1127 1126
1128 if (next) { 1127 if (next) {
1129 ehci->reclaim = NULL; 1128 ehci->reclaim = NULL;
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index 74f7f83b29ad..edd61ee90323 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -542,6 +542,7 @@ static int qh_link_periodic (struct ehci_hcd *ehci, struct ehci_qh *qh)
542 } 542 }
543 } 543 }
544 qh->qh_state = QH_STATE_LINKED; 544 qh->qh_state = QH_STATE_LINKED;
545 qh->xacterrs = 0;
545 qh_get (qh); 546 qh_get (qh);
546 547
547 /* update per-qh bandwidth for usbfs */ 548 /* update per-qh bandwidth for usbfs */
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c
index f3aaba35e912..83cbecd2a1ed 100644
--- a/drivers/usb/host/ohci-omap.c
+++ b/drivers/usb/host/ohci-omap.c
@@ -282,6 +282,7 @@ static int ohci_omap_init(struct usb_hcd *hcd)
282static void ohci_omap_stop(struct usb_hcd *hcd) 282static void ohci_omap_stop(struct usb_hcd *hcd)
283{ 283{
284 dev_dbg(hcd->self.controller, "stopping USB Controller\n"); 284 dev_dbg(hcd->self.controller, "stopping USB Controller\n");
285 ohci_stop(hcd);
285 omap_ohci_clock_power(0); 286 omap_ohci_clock_power(0);
286} 287}
287 288
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c
index 2501c571f855..705e34324156 100644
--- a/drivers/usb/host/xhci-dbg.c
+++ b/drivers/usb/host/xhci-dbg.c
@@ -173,6 +173,7 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int
173{ 173{
174 void *addr; 174 void *addr;
175 u32 temp; 175 u32 temp;
176 u64 temp_64;
176 177
177 addr = &ir_set->irq_pending; 178 addr = &ir_set->irq_pending;
178 temp = xhci_readl(xhci, addr); 179 temp = xhci_readl(xhci, addr);
@@ -200,25 +201,15 @@ void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int
200 xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n", 201 xhci_dbg(xhci, " WARN: %p: ir_set.rsvd = 0x%x\n",
201 addr, (unsigned int)temp); 202 addr, (unsigned int)temp);
202 203
203 addr = &ir_set->erst_base[0]; 204 addr = &ir_set->erst_base;
204 temp = xhci_readl(xhci, addr); 205 temp_64 = xhci_read_64(xhci, addr);
205 xhci_dbg(xhci, " %p: ir_set.erst_base[0] = 0x%x\n", 206 xhci_dbg(xhci, " %p: ir_set.erst_base = @%08llx\n",
206 addr, (unsigned int) temp); 207 addr, temp_64);
207
208 addr = &ir_set->erst_base[1];
209 temp = xhci_readl(xhci, addr);
210 xhci_dbg(xhci, " %p: ir_set.erst_base[1] = 0x%x\n",
211 addr, (unsigned int) temp);
212 208
213 addr = &ir_set->erst_dequeue[0]; 209 addr = &ir_set->erst_dequeue;
214 temp = xhci_readl(xhci, addr); 210 temp_64 = xhci_read_64(xhci, addr);
215 xhci_dbg(xhci, " %p: ir_set.erst_dequeue[0] = 0x%x\n", 211 xhci_dbg(xhci, " %p: ir_set.erst_dequeue = @%08llx\n",
216 addr, (unsigned int) temp); 212 addr, temp_64);
217
218 addr = &ir_set->erst_dequeue[1];
219 temp = xhci_readl(xhci, addr);
220 xhci_dbg(xhci, " %p: ir_set.erst_dequeue[1] = 0x%x\n",
221 addr, (unsigned int) temp);
222} 213}
223 214
224void xhci_print_run_regs(struct xhci_hcd *xhci) 215void xhci_print_run_regs(struct xhci_hcd *xhci)
@@ -268,8 +259,7 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
268 xhci_dbg(xhci, "Link TRB:\n"); 259 xhci_dbg(xhci, "Link TRB:\n");
269 xhci_print_trb_offsets(xhci, trb); 260 xhci_print_trb_offsets(xhci, trb);
270 261
271 address = trb->link.segment_ptr[0] + 262 address = trb->link.segment_ptr;
272 (((u64) trb->link.segment_ptr[1]) << 32);
273 xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address); 263 xhci_dbg(xhci, "Next ring segment DMA address = 0x%llx\n", address);
274 264
275 xhci_dbg(xhci, "Interrupter target = 0x%x\n", 265 xhci_dbg(xhci, "Interrupter target = 0x%x\n",
@@ -282,8 +272,7 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
282 (unsigned int) (trb->link.control & TRB_NO_SNOOP)); 272 (unsigned int) (trb->link.control & TRB_NO_SNOOP));
283 break; 273 break;
284 case TRB_TYPE(TRB_TRANSFER): 274 case TRB_TYPE(TRB_TRANSFER):
285 address = trb->trans_event.buffer[0] + 275 address = trb->trans_event.buffer;
286 (((u64) trb->trans_event.buffer[1]) << 32);
287 /* 276 /*
288 * FIXME: look at flags to figure out if it's an address or if 277 * FIXME: look at flags to figure out if it's an address or if
289 * the data is directly in the buffer field. 278 * the data is directly in the buffer field.
@@ -291,8 +280,7 @@ void xhci_debug_trb(struct xhci_hcd *xhci, union xhci_trb *trb)
291 xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address); 280 xhci_dbg(xhci, "DMA address or buffer contents= %llu\n", address);
292 break; 281 break;
293 case TRB_TYPE(TRB_COMPLETION): 282 case TRB_TYPE(TRB_COMPLETION):
294 address = trb->event_cmd.cmd_trb[0] + 283 address = trb->event_cmd.cmd_trb;
295 (((u64) trb->event_cmd.cmd_trb[1]) << 32);
296 xhci_dbg(xhci, "Command TRB pointer = %llu\n", address); 284 xhci_dbg(xhci, "Command TRB pointer = %llu\n", address);
297 xhci_dbg(xhci, "Completion status = %u\n", 285 xhci_dbg(xhci, "Completion status = %u\n",
298 (unsigned int) GET_COMP_CODE(trb->event_cmd.status)); 286 (unsigned int) GET_COMP_CODE(trb->event_cmd.status));
@@ -328,8 +316,8 @@ void xhci_debug_segment(struct xhci_hcd *xhci, struct xhci_segment *seg)
328 for (i = 0; i < TRBS_PER_SEGMENT; ++i) { 316 for (i = 0; i < TRBS_PER_SEGMENT; ++i) {
329 trb = &seg->trbs[i]; 317 trb = &seg->trbs[i];
330 xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", addr, 318 xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", addr,
331 (unsigned int) trb->link.segment_ptr[0], 319 lower_32_bits(trb->link.segment_ptr),
332 (unsigned int) trb->link.segment_ptr[1], 320 upper_32_bits(trb->link.segment_ptr),
333 (unsigned int) trb->link.intr_target, 321 (unsigned int) trb->link.intr_target,
334 (unsigned int) trb->link.control); 322 (unsigned int) trb->link.control);
335 addr += sizeof(*trb); 323 addr += sizeof(*trb);
@@ -386,8 +374,8 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
386 entry = &erst->entries[i]; 374 entry = &erst->entries[i];
387 xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n", 375 xhci_dbg(xhci, "@%08x %08x %08x %08x %08x\n",
388 (unsigned int) addr, 376 (unsigned int) addr,
389 (unsigned int) entry->seg_addr[0], 377 lower_32_bits(entry->seg_addr),
390 (unsigned int) entry->seg_addr[1], 378 upper_32_bits(entry->seg_addr),
391 (unsigned int) entry->seg_size, 379 (unsigned int) entry->seg_size,
392 (unsigned int) entry->rsvd); 380 (unsigned int) entry->rsvd);
393 addr += sizeof(*entry); 381 addr += sizeof(*entry);
@@ -396,90 +384,147 @@ void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst)
396 384
397void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci) 385void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci)
398{ 386{
399 u32 val; 387 u64 val;
400 388
401 val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]); 389 val = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
402 xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = 0x%x\n", val); 390 xhci_dbg(xhci, "// xHC command ring deq ptr low bits + flags = @%08x\n",
403 val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[1]); 391 lower_32_bits(val));
404 xhci_dbg(xhci, "// xHC command ring deq ptr high bits = 0x%x\n", val); 392 xhci_dbg(xhci, "// xHC command ring deq ptr high bits = @%08x\n",
393 upper_32_bits(val));
405} 394}
406 395
407void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_addr_t dma, unsigned int last_ep) 396/* Print the last 32 bytes for 64-byte contexts */
397static void dbg_rsvd64(struct xhci_hcd *xhci, u64 *ctx, dma_addr_t dma)
398{
399 int i;
400 for (i = 0; i < 4; ++i) {
401 xhci_dbg(xhci, "@%p (virt) @%08llx "
402 "(dma) %#08llx - rsvd64[%d]\n",
403 &ctx[4 + i], (unsigned long long)dma,
404 ctx[4 + i], i);
405 dma += 8;
406 }
407}
408
409void xhci_dbg_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx)
408{ 410{
409 int i, j;
410 int last_ep_ctx = 31;
411 /* Fields are 32 bits wide, DMA addresses are in bytes */ 411 /* Fields are 32 bits wide, DMA addresses are in bytes */
412 int field_size = 32 / 8; 412 int field_size = 32 / 8;
413 int i;
413 414
414 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - drop flags\n", 415 struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx);
415 &ctx->drop_flags, (unsigned long long)dma, 416 dma_addr_t dma = ctx->dma + ((unsigned long)slot_ctx - (unsigned long)ctx);
416 ctx->drop_flags); 417 int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
417 dma += field_size;
418 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - add flags\n",
419 &ctx->add_flags, (unsigned long long)dma,
420 ctx->add_flags);
421 dma += field_size;
422 for (i = 0; i > 6; ++i) {
423 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
424 &ctx->rsvd[i], (unsigned long long)dma,
425 ctx->rsvd[i], i);
426 dma += field_size;
427 }
428 418
429 xhci_dbg(xhci, "Slot Context:\n"); 419 xhci_dbg(xhci, "Slot Context:\n");
430 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info\n", 420 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info\n",
431 &ctx->slot.dev_info, 421 &slot_ctx->dev_info,
432 (unsigned long long)dma, ctx->slot.dev_info); 422 (unsigned long long)dma, slot_ctx->dev_info);
433 dma += field_size; 423 dma += field_size;
434 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info2\n", 424 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_info2\n",
435 &ctx->slot.dev_info2, 425 &slot_ctx->dev_info2,
436 (unsigned long long)dma, ctx->slot.dev_info2); 426 (unsigned long long)dma, slot_ctx->dev_info2);
437 dma += field_size; 427 dma += field_size;
438 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tt_info\n", 428 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tt_info\n",
439 &ctx->slot.tt_info, 429 &slot_ctx->tt_info,
440 (unsigned long long)dma, ctx->slot.tt_info); 430 (unsigned long long)dma, slot_ctx->tt_info);
441 dma += field_size; 431 dma += field_size;
442 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_state\n", 432 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - dev_state\n",
443 &ctx->slot.dev_state, 433 &slot_ctx->dev_state,
444 (unsigned long long)dma, ctx->slot.dev_state); 434 (unsigned long long)dma, slot_ctx->dev_state);
445 dma += field_size; 435 dma += field_size;
446 for (i = 0; i > 4; ++i) { 436 for (i = 0; i < 4; ++i) {
447 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", 437 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
448 &ctx->slot.reserved[i], (unsigned long long)dma, 438 &slot_ctx->reserved[i], (unsigned long long)dma,
449 ctx->slot.reserved[i], i); 439 slot_ctx->reserved[i], i);
450 dma += field_size; 440 dma += field_size;
451 } 441 }
452 442
443 if (csz)
444 dbg_rsvd64(xhci, (u64 *)slot_ctx, dma);
445}
446
447void xhci_dbg_ep_ctx(struct xhci_hcd *xhci,
448 struct xhci_container_ctx *ctx,
449 unsigned int last_ep)
450{
451 int i, j;
452 int last_ep_ctx = 31;
453 /* Fields are 32 bits wide, DMA addresses are in bytes */
454 int field_size = 32 / 8;
455 int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
456
453 if (last_ep < 31) 457 if (last_ep < 31)
454 last_ep_ctx = last_ep + 1; 458 last_ep_ctx = last_ep + 1;
455 for (i = 0; i < last_ep_ctx; ++i) { 459 for (i = 0; i < last_ep_ctx; ++i) {
460 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, ctx, i);
461 dma_addr_t dma = ctx->dma +
462 ((unsigned long)ep_ctx - (unsigned long)ctx);
463
456 xhci_dbg(xhci, "Endpoint %02d Context:\n", i); 464 xhci_dbg(xhci, "Endpoint %02d Context:\n", i);
457 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n", 465 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info\n",
458 &ctx->ep[i].ep_info, 466 &ep_ctx->ep_info,
459 (unsigned long long)dma, ctx->ep[i].ep_info); 467 (unsigned long long)dma, ep_ctx->ep_info);
460 dma += field_size; 468 dma += field_size;
461 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info2\n", 469 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - ep_info2\n",
462 &ctx->ep[i].ep_info2, 470 &ep_ctx->ep_info2,
463 (unsigned long long)dma, ctx->ep[i].ep_info2); 471 (unsigned long long)dma, ep_ctx->ep_info2);
464 dma += field_size;
465 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[0]\n",
466 &ctx->ep[i].deq[0],
467 (unsigned long long)dma, ctx->ep[i].deq[0]);
468 dma += field_size;
469 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - deq[1]\n",
470 &ctx->ep[i].deq[1],
471 (unsigned long long)dma, ctx->ep[i].deq[1]);
472 dma += field_size; 472 dma += field_size;
473 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08llx - deq\n",
474 &ep_ctx->deq,
475 (unsigned long long)dma, ep_ctx->deq);
476 dma += 2*field_size;
473 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n", 477 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - tx_info\n",
474 &ctx->ep[i].tx_info, 478 &ep_ctx->tx_info,
475 (unsigned long long)dma, ctx->ep[i].tx_info); 479 (unsigned long long)dma, ep_ctx->tx_info);
476 dma += field_size; 480 dma += field_size;
477 for (j = 0; j < 3; ++j) { 481 for (j = 0; j < 3; ++j) {
478 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n", 482 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd[%d]\n",
479 &ctx->ep[i].reserved[j], 483 &ep_ctx->reserved[j],
480 (unsigned long long)dma, 484 (unsigned long long)dma,
481 ctx->ep[i].reserved[j], j); 485 ep_ctx->reserved[j], j);
486 dma += field_size;
487 }
488
489 if (csz)
490 dbg_rsvd64(xhci, (u64 *)ep_ctx, dma);
491 }
492}
493
494void xhci_dbg_ctx(struct xhci_hcd *xhci,
495 struct xhci_container_ctx *ctx,
496 unsigned int last_ep)
497{
498 int i;
499 /* Fields are 32 bits wide, DMA addresses are in bytes */
500 int field_size = 32 / 8;
501 struct xhci_slot_ctx *slot_ctx;
502 dma_addr_t dma = ctx->dma;
503 int csz = HCC_64BYTE_CONTEXT(xhci->hcc_params);
504
505 if (ctx->type == XHCI_CTX_TYPE_INPUT) {
506 struct xhci_input_control_ctx *ctrl_ctx =
507 xhci_get_input_control_ctx(xhci, ctx);
508 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - drop flags\n",
509 &ctrl_ctx->drop_flags, (unsigned long long)dma,
510 ctrl_ctx->drop_flags);
511 dma += field_size;
512 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - add flags\n",
513 &ctrl_ctx->add_flags, (unsigned long long)dma,
514 ctrl_ctx->add_flags);
515 dma += field_size;
516 for (i = 0; i < 6; ++i) {
517 xhci_dbg(xhci, "@%p (virt) @%08llx (dma) %#08x - rsvd2[%d]\n",
518 &ctrl_ctx->rsvd2[i], (unsigned long long)dma,
519 ctrl_ctx->rsvd2[i], i);
482 dma += field_size; 520 dma += field_size;
483 } 521 }
522
523 if (csz)
524 dbg_rsvd64(xhci, (u64 *)ctrl_ctx, dma);
484 } 525 }
526
527 slot_ctx = xhci_get_slot_ctx(xhci, ctx);
528 xhci_dbg_slot_ctx(xhci, ctx);
529 xhci_dbg_ep_ctx(xhci, ctx, last_ep);
485} 530}
diff --git a/drivers/usb/host/xhci-hcd.c b/drivers/usb/host/xhci-hcd.c
index dba3e07ccd09..816c39caca1c 100644
--- a/drivers/usb/host/xhci-hcd.c
+++ b/drivers/usb/host/xhci-hcd.c
@@ -103,7 +103,10 @@ int xhci_reset(struct xhci_hcd *xhci)
103 u32 state; 103 u32 state;
104 104
105 state = xhci_readl(xhci, &xhci->op_regs->status); 105 state = xhci_readl(xhci, &xhci->op_regs->status);
106 BUG_ON((state & STS_HALT) == 0); 106 if ((state & STS_HALT) == 0) {
107 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
108 return 0;
109 }
107 110
108 xhci_dbg(xhci, "// Reset the HC\n"); 111 xhci_dbg(xhci, "// Reset the HC\n");
109 command = xhci_readl(xhci, &xhci->op_regs->command); 112 command = xhci_readl(xhci, &xhci->op_regs->command);
@@ -226,6 +229,7 @@ int xhci_init(struct usb_hcd *hcd)
226static void xhci_work(struct xhci_hcd *xhci) 229static void xhci_work(struct xhci_hcd *xhci)
227{ 230{
228 u32 temp; 231 u32 temp;
232 u64 temp_64;
229 233
230 /* 234 /*
231 * Clear the op reg interrupt status first, 235 * Clear the op reg interrupt status first,
@@ -248,9 +252,9 @@ static void xhci_work(struct xhci_hcd *xhci)
248 /* FIXME this should be a delayed service routine that clears the EHB */ 252 /* FIXME this should be a delayed service routine that clears the EHB */
249 xhci_handle_event(xhci); 253 xhci_handle_event(xhci);
250 254
251 /* Clear the event handler busy flag; the event ring should be empty. */ 255 /* Clear the event handler busy flag (RW1C); the event ring should be empty. */
252 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); 256 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
253 xhci_writel(xhci, temp & ~ERST_EHB, &xhci->ir_set->erst_dequeue[0]); 257 xhci_write_64(xhci, temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue);
254 /* Flush posted writes -- FIXME is this necessary? */ 258 /* Flush posted writes -- FIXME is this necessary? */
255 xhci_readl(xhci, &xhci->ir_set->irq_pending); 259 xhci_readl(xhci, &xhci->ir_set->irq_pending);
256} 260}
@@ -266,19 +270,34 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd)
266{ 270{
267 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 271 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
268 u32 temp, temp2; 272 u32 temp, temp2;
273 union xhci_trb *trb;
269 274
270 spin_lock(&xhci->lock); 275 spin_lock(&xhci->lock);
276 trb = xhci->event_ring->dequeue;
271 /* Check if the xHC generated the interrupt, or the irq is shared */ 277 /* Check if the xHC generated the interrupt, or the irq is shared */
272 temp = xhci_readl(xhci, &xhci->op_regs->status); 278 temp = xhci_readl(xhci, &xhci->op_regs->status);
273 temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending); 279 temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
280 if (temp == 0xffffffff && temp2 == 0xffffffff)
281 goto hw_died;
282
274 if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) { 283 if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
275 spin_unlock(&xhci->lock); 284 spin_unlock(&xhci->lock);
276 return IRQ_NONE; 285 return IRQ_NONE;
277 } 286 }
287 xhci_dbg(xhci, "op reg status = %08x\n", temp);
288 xhci_dbg(xhci, "ir set irq_pending = %08x\n", temp2);
289 xhci_dbg(xhci, "Event ring dequeue ptr:\n");
290 xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n",
291 (unsigned long long)xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb),
292 lower_32_bits(trb->link.segment_ptr),
293 upper_32_bits(trb->link.segment_ptr),
294 (unsigned int) trb->link.intr_target,
295 (unsigned int) trb->link.control);
278 296
279 if (temp & STS_FATAL) { 297 if (temp & STS_FATAL) {
280 xhci_warn(xhci, "WARNING: Host System Error\n"); 298 xhci_warn(xhci, "WARNING: Host System Error\n");
281 xhci_halt(xhci); 299 xhci_halt(xhci);
300hw_died:
282 xhci_to_hcd(xhci)->state = HC_STATE_HALT; 301 xhci_to_hcd(xhci)->state = HC_STATE_HALT;
283 spin_unlock(&xhci->lock); 302 spin_unlock(&xhci->lock);
284 return -ESHUTDOWN; 303 return -ESHUTDOWN;
@@ -295,6 +314,7 @@ void xhci_event_ring_work(unsigned long arg)
295{ 314{
296 unsigned long flags; 315 unsigned long flags;
297 int temp; 316 int temp;
317 u64 temp_64;
298 struct xhci_hcd *xhci = (struct xhci_hcd *) arg; 318 struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
299 int i, j; 319 int i, j;
300 320
@@ -311,9 +331,9 @@ void xhci_event_ring_work(unsigned long arg)
311 xhci_dbg(xhci, "Event ring:\n"); 331 xhci_dbg(xhci, "Event ring:\n");
312 xhci_debug_segment(xhci, xhci->event_ring->deq_seg); 332 xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
313 xhci_dbg_ring_ptrs(xhci, xhci->event_ring); 333 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
314 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); 334 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
315 temp &= ERST_PTR_MASK; 335 temp_64 &= ~ERST_PTR_MASK;
316 xhci_dbg(xhci, "ERST deq = 0x%x\n", temp); 336 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
317 xhci_dbg(xhci, "Command ring:\n"); 337 xhci_dbg(xhci, "Command ring:\n");
318 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg); 338 xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
319 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring); 339 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
@@ -356,6 +376,7 @@ void xhci_event_ring_work(unsigned long arg)
356int xhci_run(struct usb_hcd *hcd) 376int xhci_run(struct usb_hcd *hcd)
357{ 377{
358 u32 temp; 378 u32 temp;
379 u64 temp_64;
359 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 380 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
360 void (*doorbell)(struct xhci_hcd *) = NULL; 381 void (*doorbell)(struct xhci_hcd *) = NULL;
361 382
@@ -382,6 +403,20 @@ int xhci_run(struct usb_hcd *hcd)
382 add_timer(&xhci->event_ring_timer); 403 add_timer(&xhci->event_ring_timer);
383#endif 404#endif
384 405
406 xhci_dbg(xhci, "Command ring memory map follows:\n");
407 xhci_debug_ring(xhci, xhci->cmd_ring);
408 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
409 xhci_dbg_cmd_ptrs(xhci);
410
411 xhci_dbg(xhci, "ERST memory map follows:\n");
412 xhci_dbg_erst(xhci, &xhci->erst);
413 xhci_dbg(xhci, "Event ring:\n");
414 xhci_debug_ring(xhci, xhci->event_ring);
415 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
416 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
417 temp_64 &= ~ERST_PTR_MASK;
418 xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
419
385 xhci_dbg(xhci, "// Set the interrupt modulation register\n"); 420 xhci_dbg(xhci, "// Set the interrupt modulation register\n");
386 temp = xhci_readl(xhci, &xhci->ir_set->irq_control); 421 temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
387 temp &= ~ER_IRQ_INTERVAL_MASK; 422 temp &= ~ER_IRQ_INTERVAL_MASK;
@@ -406,22 +441,6 @@ int xhci_run(struct usb_hcd *hcd)
406 if (NUM_TEST_NOOPS > 0) 441 if (NUM_TEST_NOOPS > 0)
407 doorbell = xhci_setup_one_noop(xhci); 442 doorbell = xhci_setup_one_noop(xhci);
408 443
409 xhci_dbg(xhci, "Command ring memory map follows:\n");
410 xhci_debug_ring(xhci, xhci->cmd_ring);
411 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
412 xhci_dbg_cmd_ptrs(xhci);
413
414 xhci_dbg(xhci, "ERST memory map follows:\n");
415 xhci_dbg_erst(xhci, &xhci->erst);
416 xhci_dbg(xhci, "Event ring:\n");
417 xhci_debug_ring(xhci, xhci->event_ring);
418 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
419 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]);
420 temp &= ERST_PTR_MASK;
421 xhci_dbg(xhci, "ERST deq = 0x%x\n", temp);
422 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[1]);
423 xhci_dbg(xhci, "ERST deq upper = 0x%x\n", temp);
424
425 temp = xhci_readl(xhci, &xhci->op_regs->command); 444 temp = xhci_readl(xhci, &xhci->op_regs->command);
426 temp |= (CMD_RUN); 445 temp |= (CMD_RUN);
427 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n", 446 xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
@@ -601,10 +620,13 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
601 goto exit; 620 goto exit;
602 } 621 }
603 if (usb_endpoint_xfer_control(&urb->ep->desc)) 622 if (usb_endpoint_xfer_control(&urb->ep->desc))
604 ret = xhci_queue_ctrl_tx(xhci, mem_flags, urb, 623 /* We have a spinlock and interrupts disabled, so we must pass
624 * atomic context to this function, which may allocate memory.
625 */
626 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
605 slot_id, ep_index); 627 slot_id, ep_index);
606 else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) 628 else if (usb_endpoint_xfer_bulk(&urb->ep->desc))
607 ret = xhci_queue_bulk_tx(xhci, mem_flags, urb, 629 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
608 slot_id, ep_index); 630 slot_id, ep_index);
609 else 631 else
610 ret = -EINVAL; 632 ret = -EINVAL;
@@ -661,8 +683,12 @@ int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
661 goto done; 683 goto done;
662 684
663 xhci_dbg(xhci, "Cancel URB %p\n", urb); 685 xhci_dbg(xhci, "Cancel URB %p\n", urb);
686 xhci_dbg(xhci, "Event ring:\n");
687 xhci_debug_ring(xhci, xhci->event_ring);
664 ep_index = xhci_get_endpoint_index(&urb->ep->desc); 688 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
665 ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index]; 689 ep_ring = xhci->devs[urb->dev->slot_id]->ep_rings[ep_index];
690 xhci_dbg(xhci, "Endpoint ring:\n");
691 xhci_debug_ring(xhci, ep_ring);
666 td = (struct xhci_td *) urb->hcpriv; 692 td = (struct xhci_td *) urb->hcpriv;
667 693
668 ep_ring->cancels_pending++; 694 ep_ring->cancels_pending++;
@@ -696,7 +722,9 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
696 struct usb_host_endpoint *ep) 722 struct usb_host_endpoint *ep)
697{ 723{
698 struct xhci_hcd *xhci; 724 struct xhci_hcd *xhci;
699 struct xhci_device_control *in_ctx; 725 struct xhci_container_ctx *in_ctx, *out_ctx;
726 struct xhci_input_control_ctx *ctrl_ctx;
727 struct xhci_slot_ctx *slot_ctx;
700 unsigned int last_ctx; 728 unsigned int last_ctx;
701 unsigned int ep_index; 729 unsigned int ep_index;
702 struct xhci_ep_ctx *ep_ctx; 730 struct xhci_ep_ctx *ep_ctx;
@@ -724,31 +752,34 @@ int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
724 } 752 }
725 753
726 in_ctx = xhci->devs[udev->slot_id]->in_ctx; 754 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
755 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
756 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
727 ep_index = xhci_get_endpoint_index(&ep->desc); 757 ep_index = xhci_get_endpoint_index(&ep->desc);
728 ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index]; 758 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
729 /* If the HC already knows the endpoint is disabled, 759 /* If the HC already knows the endpoint is disabled,
730 * or the HCD has noted it is disabled, ignore this request 760 * or the HCD has noted it is disabled, ignore this request
731 */ 761 */
732 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED || 762 if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
733 in_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) { 763 ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
734 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n", 764 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
735 __func__, ep); 765 __func__, ep);
736 return 0; 766 return 0;
737 } 767 }
738 768
739 in_ctx->drop_flags |= drop_flag; 769 ctrl_ctx->drop_flags |= drop_flag;
740 new_drop_flags = in_ctx->drop_flags; 770 new_drop_flags = ctrl_ctx->drop_flags;
741 771
742 in_ctx->add_flags = ~drop_flag; 772 ctrl_ctx->add_flags = ~drop_flag;
743 new_add_flags = in_ctx->add_flags; 773 new_add_flags = ctrl_ctx->add_flags;
744 774
745 last_ctx = xhci_last_valid_endpoint(in_ctx->add_flags); 775 last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
776 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
746 /* Update the last valid endpoint context, if we deleted the last one */ 777 /* Update the last valid endpoint context, if we deleted the last one */
747 if ((in_ctx->slot.dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) { 778 if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
748 in_ctx->slot.dev_info &= ~LAST_CTX_MASK; 779 slot_ctx->dev_info &= ~LAST_CTX_MASK;
749 in_ctx->slot.dev_info |= LAST_CTX(last_ctx); 780 slot_ctx->dev_info |= LAST_CTX(last_ctx);
750 } 781 }
751 new_slot_info = in_ctx->slot.dev_info; 782 new_slot_info = slot_ctx->dev_info;
752 783
753 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep); 784 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
754 785
@@ -778,17 +809,22 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
778 struct usb_host_endpoint *ep) 809 struct usb_host_endpoint *ep)
779{ 810{
780 struct xhci_hcd *xhci; 811 struct xhci_hcd *xhci;
781 struct xhci_device_control *in_ctx; 812 struct xhci_container_ctx *in_ctx, *out_ctx;
782 unsigned int ep_index; 813 unsigned int ep_index;
783 struct xhci_ep_ctx *ep_ctx; 814 struct xhci_ep_ctx *ep_ctx;
815 struct xhci_slot_ctx *slot_ctx;
816 struct xhci_input_control_ctx *ctrl_ctx;
784 u32 added_ctxs; 817 u32 added_ctxs;
785 unsigned int last_ctx; 818 unsigned int last_ctx;
786 u32 new_add_flags, new_drop_flags, new_slot_info; 819 u32 new_add_flags, new_drop_flags, new_slot_info;
787 int ret = 0; 820 int ret = 0;
788 821
789 ret = xhci_check_args(hcd, udev, ep, 1, __func__); 822 ret = xhci_check_args(hcd, udev, ep, 1, __func__);
790 if (ret <= 0) 823 if (ret <= 0) {
824 /* So we won't queue a reset ep command for a root hub */
825 ep->hcpriv = NULL;
791 return ret; 826 return ret;
827 }
792 xhci = hcd_to_xhci(hcd); 828 xhci = hcd_to_xhci(hcd);
793 829
794 added_ctxs = xhci_get_endpoint_flag(&ep->desc); 830 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
@@ -810,12 +846,14 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
810 } 846 }
811 847
812 in_ctx = xhci->devs[udev->slot_id]->in_ctx; 848 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
849 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
850 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
813 ep_index = xhci_get_endpoint_index(&ep->desc); 851 ep_index = xhci_get_endpoint_index(&ep->desc);
814 ep_ctx = &xhci->devs[udev->slot_id]->out_ctx->ep[ep_index]; 852 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
815 /* If the HCD has already noted the endpoint is enabled, 853 /* If the HCD has already noted the endpoint is enabled,
816 * ignore this request. 854 * ignore this request.
817 */ 855 */
818 if (in_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) { 856 if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
819 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n", 857 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
820 __func__, ep); 858 __func__, ep);
821 return 0; 859 return 0;
@@ -833,8 +871,8 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
833 return -ENOMEM; 871 return -ENOMEM;
834 } 872 }
835 873
836 in_ctx->add_flags |= added_ctxs; 874 ctrl_ctx->add_flags |= added_ctxs;
837 new_add_flags = in_ctx->add_flags; 875 new_add_flags = ctrl_ctx->add_flags;
838 876
839 /* If xhci_endpoint_disable() was called for this endpoint, but the 877 /* If xhci_endpoint_disable() was called for this endpoint, but the
840 * xHC hasn't been notified yet through the check_bandwidth() call, 878 * xHC hasn't been notified yet through the check_bandwidth() call,
@@ -842,14 +880,18 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
842 * descriptors. We must drop and re-add this endpoint, so we leave the 880 * descriptors. We must drop and re-add this endpoint, so we leave the
843 * drop flags alone. 881 * drop flags alone.
844 */ 882 */
845 new_drop_flags = in_ctx->drop_flags; 883 new_drop_flags = ctrl_ctx->drop_flags;
846 884
885 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
847 /* Update the last valid endpoint context, if we just added one past */ 886 /* Update the last valid endpoint context, if we just added one past */
848 if ((in_ctx->slot.dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) { 887 if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
849 in_ctx->slot.dev_info &= ~LAST_CTX_MASK; 888 slot_ctx->dev_info &= ~LAST_CTX_MASK;
850 in_ctx->slot.dev_info |= LAST_CTX(last_ctx); 889 slot_ctx->dev_info |= LAST_CTX(last_ctx);
851 } 890 }
852 new_slot_info = in_ctx->slot.dev_info; 891 new_slot_info = slot_ctx->dev_info;
892
893 /* Store the usb_device pointer for later use */
894 ep->hcpriv = udev;
853 895
854 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n", 896 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
855 (unsigned int) ep->desc.bEndpointAddress, 897 (unsigned int) ep->desc.bEndpointAddress,
@@ -860,9 +902,11 @@ int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
860 return 0; 902 return 0;
861} 903}
862 904
863static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev) 905static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
864{ 906{
907 struct xhci_input_control_ctx *ctrl_ctx;
865 struct xhci_ep_ctx *ep_ctx; 908 struct xhci_ep_ctx *ep_ctx;
909 struct xhci_slot_ctx *slot_ctx;
866 int i; 910 int i;
867 911
868 /* When a device's add flag and drop flag are zero, any subsequent 912 /* When a device's add flag and drop flag are zero, any subsequent
@@ -870,17 +914,18 @@ static void xhci_zero_in_ctx(struct xhci_virt_device *virt_dev)
870 * untouched. Make sure we don't leave any old state in the input 914 * untouched. Make sure we don't leave any old state in the input
871 * endpoint contexts. 915 * endpoint contexts.
872 */ 916 */
873 virt_dev->in_ctx->drop_flags = 0; 917 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
874 virt_dev->in_ctx->add_flags = 0; 918 ctrl_ctx->drop_flags = 0;
875 virt_dev->in_ctx->slot.dev_info &= ~LAST_CTX_MASK; 919 ctrl_ctx->add_flags = 0;
920 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
921 slot_ctx->dev_info &= ~LAST_CTX_MASK;
876 /* Endpoint 0 is always valid */ 922 /* Endpoint 0 is always valid */
877 virt_dev->in_ctx->slot.dev_info |= LAST_CTX(1); 923 slot_ctx->dev_info |= LAST_CTX(1);
878 for (i = 1; i < 31; ++i) { 924 for (i = 1; i < 31; ++i) {
879 ep_ctx = &virt_dev->in_ctx->ep[i]; 925 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
880 ep_ctx->ep_info = 0; 926 ep_ctx->ep_info = 0;
881 ep_ctx->ep_info2 = 0; 927 ep_ctx->ep_info2 = 0;
882 ep_ctx->deq[0] = 0; 928 ep_ctx->deq = 0;
883 ep_ctx->deq[1] = 0;
884 ep_ctx->tx_info = 0; 929 ep_ctx->tx_info = 0;
885 } 930 }
886} 931}
@@ -903,6 +948,8 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
903 unsigned long flags; 948 unsigned long flags;
904 struct xhci_hcd *xhci; 949 struct xhci_hcd *xhci;
905 struct xhci_virt_device *virt_dev; 950 struct xhci_virt_device *virt_dev;
951 struct xhci_input_control_ctx *ctrl_ctx;
952 struct xhci_slot_ctx *slot_ctx;
906 953
907 ret = xhci_check_args(hcd, udev, NULL, 0, __func__); 954 ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
908 if (ret <= 0) 955 if (ret <= 0)
@@ -918,16 +965,18 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
918 virt_dev = xhci->devs[udev->slot_id]; 965 virt_dev = xhci->devs[udev->slot_id];
919 966
920 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */ 967 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
921 virt_dev->in_ctx->add_flags |= SLOT_FLAG; 968 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
922 virt_dev->in_ctx->add_flags &= ~EP0_FLAG; 969 ctrl_ctx->add_flags |= SLOT_FLAG;
923 virt_dev->in_ctx->drop_flags &= ~SLOT_FLAG; 970 ctrl_ctx->add_flags &= ~EP0_FLAG;
924 virt_dev->in_ctx->drop_flags &= ~EP0_FLAG; 971 ctrl_ctx->drop_flags &= ~SLOT_FLAG;
972 ctrl_ctx->drop_flags &= ~EP0_FLAG;
925 xhci_dbg(xhci, "New Input Control Context:\n"); 973 xhci_dbg(xhci, "New Input Control Context:\n");
926 xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 974 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
927 LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info)); 975 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
976 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
928 977
929 spin_lock_irqsave(&xhci->lock, flags); 978 spin_lock_irqsave(&xhci->lock, flags);
930 ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx_dma, 979 ret = xhci_queue_configure_endpoint(xhci, virt_dev->in_ctx->dma,
931 udev->slot_id); 980 udev->slot_id);
932 if (ret < 0) { 981 if (ret < 0) {
933 spin_unlock_irqrestore(&xhci->lock, flags); 982 spin_unlock_irqrestore(&xhci->lock, flags);
@@ -982,10 +1031,10 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
982 } 1031 }
983 1032
984 xhci_dbg(xhci, "Output context after successful config ep cmd:\n"); 1033 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
985 xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, 1034 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
986 LAST_CTX_TO_EP_NUM(virt_dev->in_ctx->slot.dev_info)); 1035 LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
987 1036
988 xhci_zero_in_ctx(virt_dev); 1037 xhci_zero_in_ctx(xhci, virt_dev);
989 /* Free any old rings */ 1038 /* Free any old rings */
990 for (i = 1; i < 31; ++i) { 1039 for (i = 1; i < 31; ++i) {
991 if (virt_dev->new_ep_rings[i]) { 1040 if (virt_dev->new_ep_rings[i]) {
@@ -1023,7 +1072,67 @@ void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
1023 virt_dev->new_ep_rings[i] = NULL; 1072 virt_dev->new_ep_rings[i] = NULL;
1024 } 1073 }
1025 } 1074 }
1026 xhci_zero_in_ctx(virt_dev); 1075 xhci_zero_in_ctx(xhci, virt_dev);
1076}
1077
1078/* Deal with stalled endpoints. The core should have sent the control message
1079 * to clear the halt condition. However, we need to make the xHCI hardware
1080 * reset its sequence number, since a device will expect a sequence number of
1081 * zero after the halt condition is cleared.
1082 * Context: in_interrupt
1083 */
1084void xhci_endpoint_reset(struct usb_hcd *hcd,
1085 struct usb_host_endpoint *ep)
1086{
1087 struct xhci_hcd *xhci;
1088 struct usb_device *udev;
1089 unsigned int ep_index;
1090 unsigned long flags;
1091 int ret;
1092 struct xhci_dequeue_state deq_state;
1093 struct xhci_ring *ep_ring;
1094
1095 xhci = hcd_to_xhci(hcd);
1096 udev = (struct usb_device *) ep->hcpriv;
1097 /* Called with a root hub endpoint (or an endpoint that wasn't added
1098 * with xhci_add_endpoint()
1099 */
1100 if (!ep->hcpriv)
1101 return;
1102 ep_index = xhci_get_endpoint_index(&ep->desc);
1103 ep_ring = xhci->devs[udev->slot_id]->ep_rings[ep_index];
1104 if (!ep_ring->stopped_td) {
1105 xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
1106 ep->desc.bEndpointAddress);
1107 return;
1108 }
1109
1110 xhci_dbg(xhci, "Queueing reset endpoint command\n");
1111 spin_lock_irqsave(&xhci->lock, flags);
1112 ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
1113 /*
1114 * Can't change the ring dequeue pointer until it's transitioned to the
1115 * stopped state, which is only upon a successful reset endpoint
1116 * command. Better hope that last command worked!
1117 */
1118 if (!ret) {
1119 xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
1120 /* We need to move the HW's dequeue pointer past this TD,
1121 * or it will attempt to resend it on the next doorbell ring.
1122 */
1123 xhci_find_new_dequeue_state(xhci, udev->slot_id,
1124 ep_index, ep_ring->stopped_td, &deq_state);
1125 xhci_dbg(xhci, "Queueing new dequeue state\n");
1126 xhci_queue_new_dequeue_state(xhci, ep_ring,
1127 udev->slot_id,
1128 ep_index, &deq_state);
1129 kfree(ep_ring->stopped_td);
1130 xhci_ring_cmd_db(xhci);
1131 }
1132 spin_unlock_irqrestore(&xhci->lock, flags);
1133
1134 if (ret)
1135 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
1027} 1136}
1028 1137
1029/* 1138/*
@@ -1120,7 +1229,9 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
1120 struct xhci_virt_device *virt_dev; 1229 struct xhci_virt_device *virt_dev;
1121 int ret = 0; 1230 int ret = 0;
1122 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 1231 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1123 u32 temp; 1232 struct xhci_slot_ctx *slot_ctx;
1233 struct xhci_input_control_ctx *ctrl_ctx;
1234 u64 temp_64;
1124 1235
1125 if (!udev->slot_id) { 1236 if (!udev->slot_id) {
1126 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id); 1237 xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
@@ -1133,10 +1244,12 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
1133 if (!udev->config) 1244 if (!udev->config)
1134 xhci_setup_addressable_virt_dev(xhci, udev); 1245 xhci_setup_addressable_virt_dev(xhci, udev);
1135 /* Otherwise, assume the core has the device configured how it wants */ 1246 /* Otherwise, assume the core has the device configured how it wants */
1247 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
1248 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
1136 1249
1137 spin_lock_irqsave(&xhci->lock, flags); 1250 spin_lock_irqsave(&xhci->lock, flags);
1138 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx_dma, 1251 ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
1139 udev->slot_id); 1252 udev->slot_id);
1140 if (ret) { 1253 if (ret) {
1141 spin_unlock_irqrestore(&xhci->lock, flags); 1254 spin_unlock_irqrestore(&xhci->lock, flags);
1142 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n"); 1255 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
@@ -1176,41 +1289,37 @@ int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
1176 default: 1289 default:
1177 xhci_err(xhci, "ERROR: unexpected command completion " 1290 xhci_err(xhci, "ERROR: unexpected command completion "
1178 "code 0x%x.\n", virt_dev->cmd_status); 1291 "code 0x%x.\n", virt_dev->cmd_status);
1292 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
1293 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
1179 ret = -EINVAL; 1294 ret = -EINVAL;
1180 break; 1295 break;
1181 } 1296 }
1182 if (ret) { 1297 if (ret) {
1183 return ret; 1298 return ret;
1184 } 1299 }
1185 temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[0]); 1300 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
1186 xhci_dbg(xhci, "Op regs DCBAA ptr[0] = %#08x\n", temp); 1301 xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
1187 temp = xhci_readl(xhci, &xhci->op_regs->dcbaa_ptr[1]); 1302 xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
1188 xhci_dbg(xhci, "Op regs DCBAA ptr[1] = %#08x\n", temp);
1189 xhci_dbg(xhci, "Slot ID %d dcbaa entry[0] @%p = %#08x\n",
1190 udev->slot_id,
1191 &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id],
1192 xhci->dcbaa->dev_context_ptrs[2*udev->slot_id]);
1193 xhci_dbg(xhci, "Slot ID %d dcbaa entry[1] @%p = %#08x\n",
1194 udev->slot_id, 1303 udev->slot_id,
1195 &xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1], 1304 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
1196 xhci->dcbaa->dev_context_ptrs[2*udev->slot_id+1]); 1305 (unsigned long long)
1306 xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
1197 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n", 1307 xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
1198 (unsigned long long)virt_dev->out_ctx_dma); 1308 (unsigned long long)virt_dev->out_ctx->dma);
1199 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id); 1309 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
1200 xhci_dbg_ctx(xhci, virt_dev->in_ctx, virt_dev->in_ctx_dma, 2); 1310 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
1201 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id); 1311 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
1202 xhci_dbg_ctx(xhci, virt_dev->out_ctx, virt_dev->out_ctx_dma, 2); 1312 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
1203 /* 1313 /*
1204 * USB core uses address 1 for the roothubs, so we add one to the 1314 * USB core uses address 1 for the roothubs, so we add one to the
1205 * address given back to us by the HC. 1315 * address given back to us by the HC.
1206 */ 1316 */
1207 udev->devnum = (virt_dev->out_ctx->slot.dev_state & DEV_ADDR_MASK) + 1; 1317 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
1318 udev->devnum = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
1208 /* Zero the input context control for later use */ 1319 /* Zero the input context control for later use */
1209 virt_dev->in_ctx->add_flags = 0; 1320 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1210 virt_dev->in_ctx->drop_flags = 0; 1321 ctrl_ctx->add_flags = 0;
1211 /* Mirror flags in the output context for future ep enable/disable */ 1322 ctrl_ctx->drop_flags = 0;
1212 virt_dev->out_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
1213 virt_dev->out_ctx->drop_flags = 0;
1214 1323
1215 xhci_dbg(xhci, "Device address = %d\n", udev->devnum); 1324 xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
1216 /* XXX Meh, not sure if anyone else but choose_address uses this. */ 1325 /* XXX Meh, not sure if anyone else but choose_address uses this. */
@@ -1252,7 +1361,6 @@ static int __init xhci_hcd_init(void)
1252 /* xhci_device_control has eight fields, and also 1361 /* xhci_device_control has eight fields, and also
1253 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx 1362 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
1254 */ 1363 */
1255 BUILD_BUG_ON(sizeof(struct xhci_device_control) != (8+8+8*31)*32/8);
1256 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8); 1364 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
1257 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8); 1365 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
1258 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8); 1366 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index c8a72de1c508..e6b9a1c6002d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -88,7 +88,7 @@ static void xhci_link_segments(struct xhci_hcd *xhci, struct xhci_segment *prev,
88 return; 88 return;
89 prev->next = next; 89 prev->next = next;
90 if (link_trbs) { 90 if (link_trbs) {
91 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr[0] = next->dma; 91 prev->trbs[TRBS_PER_SEGMENT-1].link.segment_ptr = next->dma;
92 92
93 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */ 93 /* Set the last TRB in the segment to have a TRB type ID of Link TRB */
94 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control; 94 val = prev->trbs[TRBS_PER_SEGMENT-1].link.control;
@@ -189,6 +189,63 @@ fail:
189 return 0; 189 return 0;
190} 190}
191 191
192#define CTX_SIZE(_hcc) (HCC_64BYTE_CONTEXT(_hcc) ? 64 : 32)
193
194struct xhci_container_ctx *xhci_alloc_container_ctx(struct xhci_hcd *xhci,
195 int type, gfp_t flags)
196{
197 struct xhci_container_ctx *ctx = kzalloc(sizeof(*ctx), flags);
198 if (!ctx)
199 return NULL;
200
201 BUG_ON((type != XHCI_CTX_TYPE_DEVICE) && (type != XHCI_CTX_TYPE_INPUT));
202 ctx->type = type;
203 ctx->size = HCC_64BYTE_CONTEXT(xhci->hcc_params) ? 2048 : 1024;
204 if (type == XHCI_CTX_TYPE_INPUT)
205 ctx->size += CTX_SIZE(xhci->hcc_params);
206
207 ctx->bytes = dma_pool_alloc(xhci->device_pool, flags, &ctx->dma);
208 memset(ctx->bytes, 0, ctx->size);
209 return ctx;
210}
211
212void xhci_free_container_ctx(struct xhci_hcd *xhci,
213 struct xhci_container_ctx *ctx)
214{
215 dma_pool_free(xhci->device_pool, ctx->bytes, ctx->dma);
216 kfree(ctx);
217}
218
219struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci,
220 struct xhci_container_ctx *ctx)
221{
222 BUG_ON(ctx->type != XHCI_CTX_TYPE_INPUT);
223 return (struct xhci_input_control_ctx *)ctx->bytes;
224}
225
226struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci,
227 struct xhci_container_ctx *ctx)
228{
229 if (ctx->type == XHCI_CTX_TYPE_DEVICE)
230 return (struct xhci_slot_ctx *)ctx->bytes;
231
232 return (struct xhci_slot_ctx *)
233 (ctx->bytes + CTX_SIZE(xhci->hcc_params));
234}
235
236struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci,
237 struct xhci_container_ctx *ctx,
238 unsigned int ep_index)
239{
240 /* increment ep index by offset of start of ep ctx array */
241 ep_index++;
242 if (ctx->type == XHCI_CTX_TYPE_INPUT)
243 ep_index++;
244
245 return (struct xhci_ep_ctx *)
246 (ctx->bytes + (ep_index * CTX_SIZE(xhci->hcc_params)));
247}
248
192/* All the xhci_tds in the ring's TD list should be freed at this point */ 249/* All the xhci_tds in the ring's TD list should be freed at this point */
193void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id) 250void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
194{ 251{
@@ -200,8 +257,7 @@ void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
200 return; 257 return;
201 258
202 dev = xhci->devs[slot_id]; 259 dev = xhci->devs[slot_id];
203 xhci->dcbaa->dev_context_ptrs[2*slot_id] = 0; 260 xhci->dcbaa->dev_context_ptrs[slot_id] = 0;
204 xhci->dcbaa->dev_context_ptrs[2*slot_id + 1] = 0;
205 if (!dev) 261 if (!dev)
206 return; 262 return;
207 263
@@ -210,11 +266,10 @@ void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
210 xhci_ring_free(xhci, dev->ep_rings[i]); 266 xhci_ring_free(xhci, dev->ep_rings[i]);
211 267
212 if (dev->in_ctx) 268 if (dev->in_ctx)
213 dma_pool_free(xhci->device_pool, 269 xhci_free_container_ctx(xhci, dev->in_ctx);
214 dev->in_ctx, dev->in_ctx_dma);
215 if (dev->out_ctx) 270 if (dev->out_ctx)
216 dma_pool_free(xhci->device_pool, 271 xhci_free_container_ctx(xhci, dev->out_ctx);
217 dev->out_ctx, dev->out_ctx_dma); 272
218 kfree(xhci->devs[slot_id]); 273 kfree(xhci->devs[slot_id]);
219 xhci->devs[slot_id] = 0; 274 xhci->devs[slot_id] = 0;
220} 275}
@@ -222,7 +277,6 @@ void xhci_free_virt_device(struct xhci_hcd *xhci, int slot_id)
222int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id, 277int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
223 struct usb_device *udev, gfp_t flags) 278 struct usb_device *udev, gfp_t flags)
224{ 279{
225 dma_addr_t dma;
226 struct xhci_virt_device *dev; 280 struct xhci_virt_device *dev;
227 281
228 /* Slot ID 0 is reserved */ 282 /* Slot ID 0 is reserved */
@@ -236,23 +290,21 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
236 return 0; 290 return 0;
237 dev = xhci->devs[slot_id]; 291 dev = xhci->devs[slot_id];
238 292
239 /* Allocate the (output) device context that will be used in the HC */ 293 /* Allocate the (output) device context that will be used in the HC. */
240 dev->out_ctx = dma_pool_alloc(xhci->device_pool, flags, &dma); 294 dev->out_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_DEVICE, flags);
241 if (!dev->out_ctx) 295 if (!dev->out_ctx)
242 goto fail; 296 goto fail;
243 dev->out_ctx_dma = dma; 297
244 xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id, 298 xhci_dbg(xhci, "Slot %d output ctx = 0x%llx (dma)\n", slot_id,
245 (unsigned long long)dma); 299 (unsigned long long)dev->out_ctx->dma);
246 memset(dev->out_ctx, 0, sizeof(*dev->out_ctx));
247 300
248 /* Allocate the (input) device context for address device command */ 301 /* Allocate the (input) device context for address device command */
249 dev->in_ctx = dma_pool_alloc(xhci->device_pool, flags, &dma); 302 dev->in_ctx = xhci_alloc_container_ctx(xhci, XHCI_CTX_TYPE_INPUT, flags);
250 if (!dev->in_ctx) 303 if (!dev->in_ctx)
251 goto fail; 304 goto fail;
252 dev->in_ctx_dma = dma; 305
253 xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id, 306 xhci_dbg(xhci, "Slot %d input ctx = 0x%llx (dma)\n", slot_id,
254 (unsigned long long)dma); 307 (unsigned long long)dev->in_ctx->dma);
255 memset(dev->in_ctx, 0, sizeof(*dev->in_ctx));
256 308
257 /* Allocate endpoint 0 ring */ 309 /* Allocate endpoint 0 ring */
258 dev->ep_rings[0] = xhci_ring_alloc(xhci, 1, true, flags); 310 dev->ep_rings[0] = xhci_ring_alloc(xhci, 1, true, flags);
@@ -261,17 +313,12 @@ int xhci_alloc_virt_device(struct xhci_hcd *xhci, int slot_id,
261 313
262 init_completion(&dev->cmd_completion); 314 init_completion(&dev->cmd_completion);
263 315
264 /* 316 /* Point to output device context in dcbaa. */
265 * Point to output device context in dcbaa; skip the output control 317 xhci->dcbaa->dev_context_ptrs[slot_id] = dev->out_ctx->dma;
266 * context, which is eight 32 bit fields (or 32 bytes long)
267 */
268 xhci->dcbaa->dev_context_ptrs[2*slot_id] =
269 (u32) dev->out_ctx_dma + (32);
270 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n", 318 xhci_dbg(xhci, "Set slot id %d dcbaa entry %p to 0x%llx\n",
271 slot_id, 319 slot_id,
272 &xhci->dcbaa->dev_context_ptrs[2*slot_id], 320 &xhci->dcbaa->dev_context_ptrs[slot_id],
273 (unsigned long long)dev->out_ctx_dma); 321 (unsigned long long) xhci->dcbaa->dev_context_ptrs[slot_id]);
274 xhci->dcbaa->dev_context_ptrs[2*slot_id + 1] = 0;
275 322
276 return 1; 323 return 1;
277fail: 324fail:
@@ -285,6 +332,8 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
285 struct xhci_virt_device *dev; 332 struct xhci_virt_device *dev;
286 struct xhci_ep_ctx *ep0_ctx; 333 struct xhci_ep_ctx *ep0_ctx;
287 struct usb_device *top_dev; 334 struct usb_device *top_dev;
335 struct xhci_slot_ctx *slot_ctx;
336 struct xhci_input_control_ctx *ctrl_ctx;
288 337
289 dev = xhci->devs[udev->slot_id]; 338 dev = xhci->devs[udev->slot_id];
290 /* Slot ID 0 is reserved */ 339 /* Slot ID 0 is reserved */
@@ -293,27 +342,29 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
293 udev->slot_id); 342 udev->slot_id);
294 return -EINVAL; 343 return -EINVAL;
295 } 344 }
296 ep0_ctx = &dev->in_ctx->ep[0]; 345 ep0_ctx = xhci_get_ep_ctx(xhci, dev->in_ctx, 0);
346 ctrl_ctx = xhci_get_input_control_ctx(xhci, dev->in_ctx);
347 slot_ctx = xhci_get_slot_ctx(xhci, dev->in_ctx);
297 348
298 /* 2) New slot context and endpoint 0 context are valid*/ 349 /* 2) New slot context and endpoint 0 context are valid*/
299 dev->in_ctx->add_flags = SLOT_FLAG | EP0_FLAG; 350 ctrl_ctx->add_flags = SLOT_FLAG | EP0_FLAG;
300 351
301 /* 3) Only the control endpoint is valid - one endpoint context */ 352 /* 3) Only the control endpoint is valid - one endpoint context */
302 dev->in_ctx->slot.dev_info |= LAST_CTX(1); 353 slot_ctx->dev_info |= LAST_CTX(1);
303 354
304 switch (udev->speed) { 355 switch (udev->speed) {
305 case USB_SPEED_SUPER: 356 case USB_SPEED_SUPER:
306 dev->in_ctx->slot.dev_info |= (u32) udev->route; 357 slot_ctx->dev_info |= (u32) udev->route;
307 dev->in_ctx->slot.dev_info |= (u32) SLOT_SPEED_SS; 358 slot_ctx->dev_info |= (u32) SLOT_SPEED_SS;
308 break; 359 break;
309 case USB_SPEED_HIGH: 360 case USB_SPEED_HIGH:
310 dev->in_ctx->slot.dev_info |= (u32) SLOT_SPEED_HS; 361 slot_ctx->dev_info |= (u32) SLOT_SPEED_HS;
311 break; 362 break;
312 case USB_SPEED_FULL: 363 case USB_SPEED_FULL:
313 dev->in_ctx->slot.dev_info |= (u32) SLOT_SPEED_FS; 364 slot_ctx->dev_info |= (u32) SLOT_SPEED_FS;
314 break; 365 break;
315 case USB_SPEED_LOW: 366 case USB_SPEED_LOW:
316 dev->in_ctx->slot.dev_info |= (u32) SLOT_SPEED_LS; 367 slot_ctx->dev_info |= (u32) SLOT_SPEED_LS;
317 break; 368 break;
318 case USB_SPEED_VARIABLE: 369 case USB_SPEED_VARIABLE:
319 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n"); 370 xhci_dbg(xhci, "FIXME xHCI doesn't support wireless speeds\n");
@@ -327,7 +378,7 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
327 for (top_dev = udev; top_dev->parent && top_dev->parent->parent; 378 for (top_dev = udev; top_dev->parent && top_dev->parent->parent;
328 top_dev = top_dev->parent) 379 top_dev = top_dev->parent)
329 /* Found device below root hub */; 380 /* Found device below root hub */;
330 dev->in_ctx->slot.dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum); 381 slot_ctx->dev_info2 |= (u32) ROOT_HUB_PORT(top_dev->portnum);
331 xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum); 382 xhci_dbg(xhci, "Set root hub portnum to %d\n", top_dev->portnum);
332 383
333 /* Is this a LS/FS device under a HS hub? */ 384 /* Is this a LS/FS device under a HS hub? */
@@ -337,8 +388,8 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
337 */ 388 */
338 if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) && 389 if ((udev->speed == USB_SPEED_LOW || udev->speed == USB_SPEED_FULL) &&
339 udev->tt) { 390 udev->tt) {
340 dev->in_ctx->slot.tt_info = udev->tt->hub->slot_id; 391 slot_ctx->tt_info = udev->tt->hub->slot_id;
341 dev->in_ctx->slot.tt_info |= udev->ttport << 8; 392 slot_ctx->tt_info |= udev->ttport << 8;
342 } 393 }
343 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt); 394 xhci_dbg(xhci, "udev->tt = %p\n", udev->tt);
344 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport); 395 xhci_dbg(xhci, "udev->ttport = 0x%x\n", udev->ttport);
@@ -360,10 +411,9 @@ int xhci_setup_addressable_virt_dev(struct xhci_hcd *xhci, struct usb_device *ud
360 ep0_ctx->ep_info2 |= MAX_BURST(0); 411 ep0_ctx->ep_info2 |= MAX_BURST(0);
361 ep0_ctx->ep_info2 |= ERROR_COUNT(3); 412 ep0_ctx->ep_info2 |= ERROR_COUNT(3);
362 413
363 ep0_ctx->deq[0] = 414 ep0_ctx->deq =
364 dev->ep_rings[0]->first_seg->dma; 415 dev->ep_rings[0]->first_seg->dma;
365 ep0_ctx->deq[0] |= dev->ep_rings[0]->cycle_state; 416 ep0_ctx->deq |= dev->ep_rings[0]->cycle_state;
366 ep0_ctx->deq[1] = 0;
367 417
368 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */ 418 /* Steps 7 and 8 were done in xhci_alloc_virt_device() */
369 419
@@ -470,25 +520,26 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
470 unsigned int max_burst; 520 unsigned int max_burst;
471 521
472 ep_index = xhci_get_endpoint_index(&ep->desc); 522 ep_index = xhci_get_endpoint_index(&ep->desc);
473 ep_ctx = &virt_dev->in_ctx->ep[ep_index]; 523 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
474 524
475 /* Set up the endpoint ring */ 525 /* Set up the endpoint ring */
476 virt_dev->new_ep_rings[ep_index] = xhci_ring_alloc(xhci, 1, true, mem_flags); 526 virt_dev->new_ep_rings[ep_index] = xhci_ring_alloc(xhci, 1, true, mem_flags);
477 if (!virt_dev->new_ep_rings[ep_index]) 527 if (!virt_dev->new_ep_rings[ep_index])
478 return -ENOMEM; 528 return -ENOMEM;
479 ep_ring = virt_dev->new_ep_rings[ep_index]; 529 ep_ring = virt_dev->new_ep_rings[ep_index];
480 ep_ctx->deq[0] = ep_ring->first_seg->dma | ep_ring->cycle_state; 530 ep_ctx->deq = ep_ring->first_seg->dma | ep_ring->cycle_state;
481 ep_ctx->deq[1] = 0;
482 531
483 ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep); 532 ep_ctx->ep_info = xhci_get_endpoint_interval(udev, ep);
484 533
485 /* FIXME dig Mult and streams info out of ep companion desc */ 534 /* FIXME dig Mult and streams info out of ep companion desc */
486 535
487 /* Allow 3 retries for everything but isoc */ 536 /* Allow 3 retries for everything but isoc;
537 * error count = 0 means infinite retries.
538 */
488 if (!usb_endpoint_xfer_isoc(&ep->desc)) 539 if (!usb_endpoint_xfer_isoc(&ep->desc))
489 ep_ctx->ep_info2 = ERROR_COUNT(3); 540 ep_ctx->ep_info2 = ERROR_COUNT(3);
490 else 541 else
491 ep_ctx->ep_info2 = ERROR_COUNT(0); 542 ep_ctx->ep_info2 = ERROR_COUNT(1);
492 543
493 ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep); 544 ep_ctx->ep_info2 |= xhci_get_endpoint_type(udev, ep);
494 545
@@ -498,7 +549,12 @@ int xhci_endpoint_init(struct xhci_hcd *xhci,
498 max_packet = ep->desc.wMaxPacketSize; 549 max_packet = ep->desc.wMaxPacketSize;
499 ep_ctx->ep_info2 |= MAX_PACKET(max_packet); 550 ep_ctx->ep_info2 |= MAX_PACKET(max_packet);
500 /* dig out max burst from ep companion desc */ 551 /* dig out max burst from ep companion desc */
501 max_packet = ep->ss_ep_comp->desc.bMaxBurst; 552 if (!ep->ss_ep_comp) {
553 xhci_warn(xhci, "WARN no SS endpoint companion descriptor.\n");
554 max_packet = 0;
555 } else {
556 max_packet = ep->ss_ep_comp->desc.bMaxBurst;
557 }
502 ep_ctx->ep_info2 |= MAX_BURST(max_packet); 558 ep_ctx->ep_info2 |= MAX_BURST(max_packet);
503 break; 559 break;
504 case USB_SPEED_HIGH: 560 case USB_SPEED_HIGH:
@@ -531,18 +587,114 @@ void xhci_endpoint_zero(struct xhci_hcd *xhci,
531 struct xhci_ep_ctx *ep_ctx; 587 struct xhci_ep_ctx *ep_ctx;
532 588
533 ep_index = xhci_get_endpoint_index(&ep->desc); 589 ep_index = xhci_get_endpoint_index(&ep->desc);
534 ep_ctx = &virt_dev->in_ctx->ep[ep_index]; 590 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, ep_index);
535 591
536 ep_ctx->ep_info = 0; 592 ep_ctx->ep_info = 0;
537 ep_ctx->ep_info2 = 0; 593 ep_ctx->ep_info2 = 0;
538 ep_ctx->deq[0] = 0; 594 ep_ctx->deq = 0;
539 ep_ctx->deq[1] = 0;
540 ep_ctx->tx_info = 0; 595 ep_ctx->tx_info = 0;
541 /* Don't free the endpoint ring until the set interface or configuration 596 /* Don't free the endpoint ring until the set interface or configuration
542 * request succeeds. 597 * request succeeds.
543 */ 598 */
544} 599}
545 600
601/* Set up the scratchpad buffer array and scratchpad buffers, if needed. */
602static int scratchpad_alloc(struct xhci_hcd *xhci, gfp_t flags)
603{
604 int i;
605 struct device *dev = xhci_to_hcd(xhci)->self.controller;
606 int num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
607
608 xhci_dbg(xhci, "Allocating %d scratchpad buffers\n", num_sp);
609
610 if (!num_sp)
611 return 0;
612
613 xhci->scratchpad = kzalloc(sizeof(*xhci->scratchpad), flags);
614 if (!xhci->scratchpad)
615 goto fail_sp;
616
617 xhci->scratchpad->sp_array =
618 pci_alloc_consistent(to_pci_dev(dev),
619 num_sp * sizeof(u64),
620 &xhci->scratchpad->sp_dma);
621 if (!xhci->scratchpad->sp_array)
622 goto fail_sp2;
623
624 xhci->scratchpad->sp_buffers = kzalloc(sizeof(void *) * num_sp, flags);
625 if (!xhci->scratchpad->sp_buffers)
626 goto fail_sp3;
627
628 xhci->scratchpad->sp_dma_buffers =
629 kzalloc(sizeof(dma_addr_t) * num_sp, flags);
630
631 if (!xhci->scratchpad->sp_dma_buffers)
632 goto fail_sp4;
633
634 xhci->dcbaa->dev_context_ptrs[0] = xhci->scratchpad->sp_dma;
635 for (i = 0; i < num_sp; i++) {
636 dma_addr_t dma;
637 void *buf = pci_alloc_consistent(to_pci_dev(dev),
638 xhci->page_size, &dma);
639 if (!buf)
640 goto fail_sp5;
641
642 xhci->scratchpad->sp_array[i] = dma;
643 xhci->scratchpad->sp_buffers[i] = buf;
644 xhci->scratchpad->sp_dma_buffers[i] = dma;
645 }
646
647 return 0;
648
649 fail_sp5:
650 for (i = i - 1; i >= 0; i--) {
651 pci_free_consistent(to_pci_dev(dev), xhci->page_size,
652 xhci->scratchpad->sp_buffers[i],
653 xhci->scratchpad->sp_dma_buffers[i]);
654 }
655 kfree(xhci->scratchpad->sp_dma_buffers);
656
657 fail_sp4:
658 kfree(xhci->scratchpad->sp_buffers);
659
660 fail_sp3:
661 pci_free_consistent(to_pci_dev(dev), num_sp * sizeof(u64),
662 xhci->scratchpad->sp_array,
663 xhci->scratchpad->sp_dma);
664
665 fail_sp2:
666 kfree(xhci->scratchpad);
667 xhci->scratchpad = NULL;
668
669 fail_sp:
670 return -ENOMEM;
671}
672
673static void scratchpad_free(struct xhci_hcd *xhci)
674{
675 int num_sp;
676 int i;
677 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
678
679 if (!xhci->scratchpad)
680 return;
681
682 num_sp = HCS_MAX_SCRATCHPAD(xhci->hcs_params2);
683
684 for (i = 0; i < num_sp; i++) {
685 pci_free_consistent(pdev, xhci->page_size,
686 xhci->scratchpad->sp_buffers[i],
687 xhci->scratchpad->sp_dma_buffers[i]);
688 }
689 kfree(xhci->scratchpad->sp_dma_buffers);
690 kfree(xhci->scratchpad->sp_buffers);
691 pci_free_consistent(pdev, num_sp * sizeof(u64),
692 xhci->scratchpad->sp_array,
693 xhci->scratchpad->sp_dma);
694 kfree(xhci->scratchpad);
695 xhci->scratchpad = NULL;
696}
697
546void xhci_mem_cleanup(struct xhci_hcd *xhci) 698void xhci_mem_cleanup(struct xhci_hcd *xhci)
547{ 699{
548 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller); 700 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
@@ -551,10 +703,8 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
551 703
552 /* Free the Event Ring Segment Table and the actual Event Ring */ 704 /* Free the Event Ring Segment Table and the actual Event Ring */
553 xhci_writel(xhci, 0, &xhci->ir_set->erst_size); 705 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
554 xhci_writel(xhci, 0, &xhci->ir_set->erst_base[0]); 706 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
555 xhci_writel(xhci, 0, &xhci->ir_set->erst_base[1]); 707 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
556 xhci_writel(xhci, 0, &xhci->ir_set->erst_dequeue[0]);
557 xhci_writel(xhci, 0, &xhci->ir_set->erst_dequeue[1]);
558 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); 708 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
559 if (xhci->erst.entries) 709 if (xhci->erst.entries)
560 pci_free_consistent(pdev, size, 710 pci_free_consistent(pdev, size,
@@ -566,8 +716,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
566 xhci->event_ring = NULL; 716 xhci->event_ring = NULL;
567 xhci_dbg(xhci, "Freed event ring\n"); 717 xhci_dbg(xhci, "Freed event ring\n");
568 718
569 xhci_writel(xhci, 0, &xhci->op_regs->cmd_ring[0]); 719 xhci_write_64(xhci, 0, &xhci->op_regs->cmd_ring);
570 xhci_writel(xhci, 0, &xhci->op_regs->cmd_ring[1]);
571 if (xhci->cmd_ring) 720 if (xhci->cmd_ring)
572 xhci_ring_free(xhci, xhci->cmd_ring); 721 xhci_ring_free(xhci, xhci->cmd_ring);
573 xhci->cmd_ring = NULL; 722 xhci->cmd_ring = NULL;
@@ -586,8 +735,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
586 xhci->device_pool = NULL; 735 xhci->device_pool = NULL;
587 xhci_dbg(xhci, "Freed device context pool\n"); 736 xhci_dbg(xhci, "Freed device context pool\n");
588 737
589 xhci_writel(xhci, 0, &xhci->op_regs->dcbaa_ptr[0]); 738 xhci_write_64(xhci, 0, &xhci->op_regs->dcbaa_ptr);
590 xhci_writel(xhci, 0, &xhci->op_regs->dcbaa_ptr[1]);
591 if (xhci->dcbaa) 739 if (xhci->dcbaa)
592 pci_free_consistent(pdev, sizeof(*xhci->dcbaa), 740 pci_free_consistent(pdev, sizeof(*xhci->dcbaa),
593 xhci->dcbaa, xhci->dcbaa->dma); 741 xhci->dcbaa, xhci->dcbaa->dma);
@@ -595,6 +743,7 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
595 743
596 xhci->page_size = 0; 744 xhci->page_size = 0;
597 xhci->page_shift = 0; 745 xhci->page_shift = 0;
746 scratchpad_free(xhci);
598} 747}
599 748
600int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 749int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
@@ -602,6 +751,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
602 dma_addr_t dma; 751 dma_addr_t dma;
603 struct device *dev = xhci_to_hcd(xhci)->self.controller; 752 struct device *dev = xhci_to_hcd(xhci)->self.controller;
604 unsigned int val, val2; 753 unsigned int val, val2;
754 u64 val_64;
605 struct xhci_segment *seg; 755 struct xhci_segment *seg;
606 u32 page_size; 756 u32 page_size;
607 int i; 757 int i;
@@ -647,8 +797,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
647 xhci->dcbaa->dma = dma; 797 xhci->dcbaa->dma = dma;
648 xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n", 798 xhci_dbg(xhci, "// Device context base array address = 0x%llx (DMA), %p (virt)\n",
649 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa); 799 (unsigned long long)xhci->dcbaa->dma, xhci->dcbaa);
650 xhci_writel(xhci, dma, &xhci->op_regs->dcbaa_ptr[0]); 800 xhci_write_64(xhci, dma, &xhci->op_regs->dcbaa_ptr);
651 xhci_writel(xhci, (u32) 0, &xhci->op_regs->dcbaa_ptr[1]);
652 801
653 /* 802 /*
654 * Initialize the ring segment pool. The ring must be a contiguous 803 * Initialize the ring segment pool. The ring must be a contiguous
@@ -658,11 +807,10 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
658 */ 807 */
659 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev, 808 xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
660 SEGMENT_SIZE, 64, xhci->page_size); 809 SEGMENT_SIZE, 64, xhci->page_size);
810
661 /* See Table 46 and Note on Figure 55 */ 811 /* See Table 46 and Note on Figure 55 */
662 /* FIXME support 64-byte contexts */
663 xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev, 812 xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
664 sizeof(struct xhci_device_control), 813 2112, 64, xhci->page_size);
665 64, xhci->page_size);
666 if (!xhci->segment_pool || !xhci->device_pool) 814 if (!xhci->segment_pool || !xhci->device_pool)
667 goto fail; 815 goto fail;
668 816
@@ -675,14 +823,12 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
675 (unsigned long long)xhci->cmd_ring->first_seg->dma); 823 (unsigned long long)xhci->cmd_ring->first_seg->dma);
676 824
677 /* Set the address in the Command Ring Control register */ 825 /* Set the address in the Command Ring Control register */
678 val = xhci_readl(xhci, &xhci->op_regs->cmd_ring[0]); 826 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
679 val = (val & ~CMD_RING_ADDR_MASK) | 827 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
680 (xhci->cmd_ring->first_seg->dma & CMD_RING_ADDR_MASK) | 828 (xhci->cmd_ring->first_seg->dma & (u64) ~CMD_RING_RSVD_BITS) |
681 xhci->cmd_ring->cycle_state; 829 xhci->cmd_ring->cycle_state;
682 xhci_dbg(xhci, "// Setting command ring address low bits to 0x%x\n", val); 830 xhci_dbg(xhci, "// Setting command ring address to 0x%x\n", val);
683 xhci_writel(xhci, val, &xhci->op_regs->cmd_ring[0]); 831 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
684 xhci_dbg(xhci, "// Setting command ring address high bits to 0x0\n");
685 xhci_writel(xhci, (u32) 0, &xhci->op_regs->cmd_ring[1]);
686 xhci_dbg_cmd_ptrs(xhci); 832 xhci_dbg_cmd_ptrs(xhci);
687 833
688 val = xhci_readl(xhci, &xhci->cap_regs->db_off); 834 val = xhci_readl(xhci, &xhci->cap_regs->db_off);
@@ -722,8 +868,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
722 /* set ring base address and size for each segment table entry */ 868 /* set ring base address and size for each segment table entry */
723 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) { 869 for (val = 0, seg = xhci->event_ring->first_seg; val < ERST_NUM_SEGS; val++) {
724 struct xhci_erst_entry *entry = &xhci->erst.entries[val]; 870 struct xhci_erst_entry *entry = &xhci->erst.entries[val];
725 entry->seg_addr[0] = seg->dma; 871 entry->seg_addr = seg->dma;
726 entry->seg_addr[1] = 0;
727 entry->seg_size = TRBS_PER_SEGMENT; 872 entry->seg_size = TRBS_PER_SEGMENT;
728 entry->rsvd = 0; 873 entry->rsvd = 0;
729 seg = seg->next; 874 seg = seg->next;
@@ -741,11 +886,10 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
741 /* set the segment table base address */ 886 /* set the segment table base address */
742 xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n", 887 xhci_dbg(xhci, "// Set ERST base address for ir_set 0 = 0x%llx\n",
743 (unsigned long long)xhci->erst.erst_dma_addr); 888 (unsigned long long)xhci->erst.erst_dma_addr);
744 val = xhci_readl(xhci, &xhci->ir_set->erst_base[0]); 889 val_64 = xhci_read_64(xhci, &xhci->ir_set->erst_base);
745 val &= ERST_PTR_MASK; 890 val_64 &= ERST_PTR_MASK;
746 val |= (xhci->erst.erst_dma_addr & ~ERST_PTR_MASK); 891 val_64 |= (xhci->erst.erst_dma_addr & (u64) ~ERST_PTR_MASK);
747 xhci_writel(xhci, val, &xhci->ir_set->erst_base[0]); 892 xhci_write_64(xhci, val_64, &xhci->ir_set->erst_base);
748 xhci_writel(xhci, 0, &xhci->ir_set->erst_base[1]);
749 893
750 /* Set the event ring dequeue address */ 894 /* Set the event ring dequeue address */
751 xhci_set_hc_event_deq(xhci); 895 xhci_set_hc_event_deq(xhci);
@@ -761,7 +905,11 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
761 for (i = 0; i < MAX_HC_SLOTS; ++i) 905 for (i = 0; i < MAX_HC_SLOTS; ++i)
762 xhci->devs[i] = 0; 906 xhci->devs[i] = 0;
763 907
908 if (scratchpad_alloc(xhci, flags))
909 goto fail;
910
764 return 0; 911 return 0;
912
765fail: 913fail:
766 xhci_warn(xhci, "Couldn't initialize memory\n"); 914 xhci_warn(xhci, "Couldn't initialize memory\n");
767 xhci_mem_cleanup(xhci); 915 xhci_mem_cleanup(xhci);
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 1462709e26c0..592fe7e623f7 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -117,6 +117,7 @@ static const struct hc_driver xhci_pci_hc_driver = {
117 .free_dev = xhci_free_dev, 117 .free_dev = xhci_free_dev,
118 .add_endpoint = xhci_add_endpoint, 118 .add_endpoint = xhci_add_endpoint,
119 .drop_endpoint = xhci_drop_endpoint, 119 .drop_endpoint = xhci_drop_endpoint,
120 .endpoint_reset = xhci_endpoint_reset,
120 .check_bandwidth = xhci_check_bandwidth, 121 .check_bandwidth = xhci_check_bandwidth,
121 .reset_bandwidth = xhci_reset_bandwidth, 122 .reset_bandwidth = xhci_reset_bandwidth,
122 .address_device = xhci_address_device, 123 .address_device = xhci_address_device,
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 02d81985c454..aa88a067148b 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -135,6 +135,7 @@ static void next_trb(struct xhci_hcd *xhci,
135static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer) 135static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer)
136{ 136{
137 union xhci_trb *next = ++(ring->dequeue); 137 union xhci_trb *next = ++(ring->dequeue);
138 unsigned long long addr;
138 139
139 ring->deq_updates++; 140 ring->deq_updates++;
140 /* Update the dequeue pointer further if that was a link TRB or we're at 141 /* Update the dequeue pointer further if that was a link TRB or we're at
@@ -152,6 +153,13 @@ static void inc_deq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer
152 ring->dequeue = ring->deq_seg->trbs; 153 ring->dequeue = ring->deq_seg->trbs;
153 next = ring->dequeue; 154 next = ring->dequeue;
154 } 155 }
156 addr = (unsigned long long) xhci_trb_virt_to_dma(ring->deq_seg, ring->dequeue);
157 if (ring == xhci->event_ring)
158 xhci_dbg(xhci, "Event ring deq = 0x%llx (DMA)\n", addr);
159 else if (ring == xhci->cmd_ring)
160 xhci_dbg(xhci, "Command ring deq = 0x%llx (DMA)\n", addr);
161 else
162 xhci_dbg(xhci, "Ring deq = 0x%llx (DMA)\n", addr);
155} 163}
156 164
157/* 165/*
@@ -171,6 +179,7 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer
171{ 179{
172 u32 chain; 180 u32 chain;
173 union xhci_trb *next; 181 union xhci_trb *next;
182 unsigned long long addr;
174 183
175 chain = ring->enqueue->generic.field[3] & TRB_CHAIN; 184 chain = ring->enqueue->generic.field[3] & TRB_CHAIN;
176 next = ++(ring->enqueue); 185 next = ++(ring->enqueue);
@@ -204,6 +213,13 @@ static void inc_enq(struct xhci_hcd *xhci, struct xhci_ring *ring, bool consumer
204 ring->enqueue = ring->enq_seg->trbs; 213 ring->enqueue = ring->enq_seg->trbs;
205 next = ring->enqueue; 214 next = ring->enqueue;
206 } 215 }
216 addr = (unsigned long long) xhci_trb_virt_to_dma(ring->enq_seg, ring->enqueue);
217 if (ring == xhci->event_ring)
218 xhci_dbg(xhci, "Event ring enq = 0x%llx (DMA)\n", addr);
219 else if (ring == xhci->cmd_ring)
220 xhci_dbg(xhci, "Command ring enq = 0x%llx (DMA)\n", addr);
221 else
222 xhci_dbg(xhci, "Ring enq = 0x%llx (DMA)\n", addr);
207} 223}
208 224
209/* 225/*
@@ -237,7 +253,7 @@ static int room_on_ring(struct xhci_hcd *xhci, struct xhci_ring *ring,
237 253
238void xhci_set_hc_event_deq(struct xhci_hcd *xhci) 254void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
239{ 255{
240 u32 temp; 256 u64 temp;
241 dma_addr_t deq; 257 dma_addr_t deq;
242 258
243 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, 259 deq = xhci_trb_virt_to_dma(xhci->event_ring->deq_seg,
@@ -246,13 +262,15 @@ void xhci_set_hc_event_deq(struct xhci_hcd *xhci)
246 xhci_warn(xhci, "WARN something wrong with SW event ring " 262 xhci_warn(xhci, "WARN something wrong with SW event ring "
247 "dequeue ptr.\n"); 263 "dequeue ptr.\n");
248 /* Update HC event ring dequeue pointer */ 264 /* Update HC event ring dequeue pointer */
249 temp = xhci_readl(xhci, &xhci->ir_set->erst_dequeue[0]); 265 temp = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
250 temp &= ERST_PTR_MASK; 266 temp &= ERST_PTR_MASK;
251 if (!in_interrupt()) 267 /* Don't clear the EHB bit (which is RW1C) because
252 xhci_dbg(xhci, "// Write event ring dequeue pointer\n"); 268 * there might be more events to service.
253 xhci_writel(xhci, 0, &xhci->ir_set->erst_dequeue[1]); 269 */
254 xhci_writel(xhci, (deq & ~ERST_PTR_MASK) | temp, 270 temp &= ~ERST_EHB;
255 &xhci->ir_set->erst_dequeue[0]); 271 xhci_dbg(xhci, "// Write event ring dequeue pointer, preserving EHB bit\n");
272 xhci_write_64(xhci, ((u64) deq & (u64) ~ERST_PTR_MASK) | temp,
273 &xhci->ir_set->erst_dequeue);
256} 274}
257 275
258/* Ring the host controller doorbell after placing a command on the ring */ 276/* Ring the host controller doorbell after placing a command on the ring */
@@ -279,7 +297,8 @@ static void ring_ep_doorbell(struct xhci_hcd *xhci,
279 /* Don't ring the doorbell for this endpoint if there are pending 297 /* Don't ring the doorbell for this endpoint if there are pending
280 * cancellations because the we don't want to interrupt processing. 298 * cancellations because the we don't want to interrupt processing.
281 */ 299 */
282 if (!ep_ring->cancels_pending && !(ep_ring->state & SET_DEQ_PENDING)) { 300 if (!ep_ring->cancels_pending && !(ep_ring->state & SET_DEQ_PENDING)
301 && !(ep_ring->state & EP_HALTED)) {
283 field = xhci_readl(xhci, db_addr) & DB_MASK; 302 field = xhci_readl(xhci, db_addr) & DB_MASK;
284 xhci_writel(xhci, field | EPI_TO_DB(ep_index), db_addr); 303 xhci_writel(xhci, field | EPI_TO_DB(ep_index), db_addr);
285 /* Flush PCI posted writes - FIXME Matthew Wilcox says this 304 /* Flush PCI posted writes - FIXME Matthew Wilcox says this
@@ -316,12 +335,6 @@ static struct xhci_segment *find_trb_seg(
316 return cur_seg; 335 return cur_seg;
317} 336}
318 337
319struct dequeue_state {
320 struct xhci_segment *new_deq_seg;
321 union xhci_trb *new_deq_ptr;
322 int new_cycle_state;
323};
324
325/* 338/*
326 * Move the xHC's endpoint ring dequeue pointer past cur_td. 339 * Move the xHC's endpoint ring dequeue pointer past cur_td.
327 * Record the new state of the xHC's endpoint ring dequeue segment, 340 * Record the new state of the xHC's endpoint ring dequeue segment,
@@ -336,24 +349,30 @@ struct dequeue_state {
336 * - Finally we move the dequeue state one TRB further, toggling the cycle bit 349 * - Finally we move the dequeue state one TRB further, toggling the cycle bit
337 * if we've moved it past a link TRB with the toggle cycle bit set. 350 * if we've moved it past a link TRB with the toggle cycle bit set.
338 */ 351 */
339static void find_new_dequeue_state(struct xhci_hcd *xhci, 352void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
340 unsigned int slot_id, unsigned int ep_index, 353 unsigned int slot_id, unsigned int ep_index,
341 struct xhci_td *cur_td, struct dequeue_state *state) 354 struct xhci_td *cur_td, struct xhci_dequeue_state *state)
342{ 355{
343 struct xhci_virt_device *dev = xhci->devs[slot_id]; 356 struct xhci_virt_device *dev = xhci->devs[slot_id];
344 struct xhci_ring *ep_ring = dev->ep_rings[ep_index]; 357 struct xhci_ring *ep_ring = dev->ep_rings[ep_index];
345 struct xhci_generic_trb *trb; 358 struct xhci_generic_trb *trb;
359 struct xhci_ep_ctx *ep_ctx;
360 dma_addr_t addr;
346 361
347 state->new_cycle_state = 0; 362 state->new_cycle_state = 0;
363 xhci_dbg(xhci, "Finding segment containing stopped TRB.\n");
348 state->new_deq_seg = find_trb_seg(cur_td->start_seg, 364 state->new_deq_seg = find_trb_seg(cur_td->start_seg,
349 ep_ring->stopped_trb, 365 ep_ring->stopped_trb,
350 &state->new_cycle_state); 366 &state->new_cycle_state);
351 if (!state->new_deq_seg) 367 if (!state->new_deq_seg)
352 BUG(); 368 BUG();
353 /* Dig out the cycle state saved by the xHC during the stop ep cmd */ 369 /* Dig out the cycle state saved by the xHC during the stop ep cmd */
354 state->new_cycle_state = 0x1 & dev->out_ctx->ep[ep_index].deq[0]; 370 xhci_dbg(xhci, "Finding endpoint context\n");
371 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
372 state->new_cycle_state = 0x1 & ep_ctx->deq;
355 373
356 state->new_deq_ptr = cur_td->last_trb; 374 state->new_deq_ptr = cur_td->last_trb;
375 xhci_dbg(xhci, "Finding segment containing last TRB in TD.\n");
357 state->new_deq_seg = find_trb_seg(state->new_deq_seg, 376 state->new_deq_seg = find_trb_seg(state->new_deq_seg,
358 state->new_deq_ptr, 377 state->new_deq_ptr,
359 &state->new_cycle_state); 378 &state->new_cycle_state);
@@ -367,6 +386,12 @@ static void find_new_dequeue_state(struct xhci_hcd *xhci,
367 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr); 386 next_trb(xhci, ep_ring, &state->new_deq_seg, &state->new_deq_ptr);
368 387
369 /* Don't update the ring cycle state for the producer (us). */ 388 /* Don't update the ring cycle state for the producer (us). */
389 xhci_dbg(xhci, "New dequeue segment = %p (virtual)\n",
390 state->new_deq_seg);
391 addr = xhci_trb_virt_to_dma(state->new_deq_seg, state->new_deq_ptr);
392 xhci_dbg(xhci, "New dequeue pointer = 0x%llx (DMA)\n",
393 (unsigned long long) addr);
394 xhci_dbg(xhci, "Setting dequeue pointer in internal ring state.\n");
370 ep_ring->dequeue = state->new_deq_ptr; 395 ep_ring->dequeue = state->new_deq_ptr;
371 ep_ring->deq_seg = state->new_deq_seg; 396 ep_ring->deq_seg = state->new_deq_seg;
372} 397}
@@ -416,6 +441,30 @@ static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
416 unsigned int ep_index, struct xhci_segment *deq_seg, 441 unsigned int ep_index, struct xhci_segment *deq_seg,
417 union xhci_trb *deq_ptr, u32 cycle_state); 442 union xhci_trb *deq_ptr, u32 cycle_state);
418 443
444void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
445 struct xhci_ring *ep_ring, unsigned int slot_id,
446 unsigned int ep_index, struct xhci_dequeue_state *deq_state)
447{
448 xhci_dbg(xhci, "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), "
449 "new deq ptr = %p (0x%llx dma), new cycle = %u\n",
450 deq_state->new_deq_seg,
451 (unsigned long long)deq_state->new_deq_seg->dma,
452 deq_state->new_deq_ptr,
453 (unsigned long long)xhci_trb_virt_to_dma(deq_state->new_deq_seg, deq_state->new_deq_ptr),
454 deq_state->new_cycle_state);
455 queue_set_tr_deq(xhci, slot_id, ep_index,
456 deq_state->new_deq_seg,
457 deq_state->new_deq_ptr,
458 (u32) deq_state->new_cycle_state);
459 /* Stop the TD queueing code from ringing the doorbell until
460 * this command completes. The HC won't set the dequeue pointer
461 * if the ring is running, and ringing the doorbell starts the
462 * ring running.
463 */
464 ep_ring->state |= SET_DEQ_PENDING;
465 xhci_ring_cmd_db(xhci);
466}
467
419/* 468/*
420 * When we get a command completion for a Stop Endpoint Command, we need to 469 * When we get a command completion for a Stop Endpoint Command, we need to
421 * unlink any cancelled TDs from the ring. There are two ways to do that: 470 * unlink any cancelled TDs from the ring. There are two ways to do that:
@@ -436,7 +485,7 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci,
436 struct xhci_td *cur_td = 0; 485 struct xhci_td *cur_td = 0;
437 struct xhci_td *last_unlinked_td; 486 struct xhci_td *last_unlinked_td;
438 487
439 struct dequeue_state deq_state; 488 struct xhci_dequeue_state deq_state;
440#ifdef CONFIG_USB_HCD_STAT 489#ifdef CONFIG_USB_HCD_STAT
441 ktime_t stop_time = ktime_get(); 490 ktime_t stop_time = ktime_get();
442#endif 491#endif
@@ -464,7 +513,7 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci,
464 * move the xHC endpoint ring dequeue pointer past this TD. 513 * move the xHC endpoint ring dequeue pointer past this TD.
465 */ 514 */
466 if (cur_td == ep_ring->stopped_td) 515 if (cur_td == ep_ring->stopped_td)
467 find_new_dequeue_state(xhci, slot_id, ep_index, cur_td, 516 xhci_find_new_dequeue_state(xhci, slot_id, ep_index, cur_td,
468 &deq_state); 517 &deq_state);
469 else 518 else
470 td_to_noop(xhci, ep_ring, cur_td); 519 td_to_noop(xhci, ep_ring, cur_td);
@@ -480,24 +529,8 @@ static void handle_stopped_endpoint(struct xhci_hcd *xhci,
480 529
481 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */ 530 /* If necessary, queue a Set Transfer Ring Dequeue Pointer command */
482 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) { 531 if (deq_state.new_deq_ptr && deq_state.new_deq_seg) {
483 xhci_dbg(xhci, "Set TR Deq Ptr cmd, new deq seg = %p (0x%llx dma), " 532 xhci_queue_new_dequeue_state(xhci, ep_ring,
484 "new deq ptr = %p (0x%llx dma), new cycle = %u\n", 533 slot_id, ep_index, &deq_state);
485 deq_state.new_deq_seg,
486 (unsigned long long)deq_state.new_deq_seg->dma,
487 deq_state.new_deq_ptr,
488 (unsigned long long)xhci_trb_virt_to_dma(deq_state.new_deq_seg, deq_state.new_deq_ptr),
489 deq_state.new_cycle_state);
490 queue_set_tr_deq(xhci, slot_id, ep_index,
491 deq_state.new_deq_seg,
492 deq_state.new_deq_ptr,
493 (u32) deq_state.new_cycle_state);
494 /* Stop the TD queueing code from ringing the doorbell until
495 * this command completes. The HC won't set the dequeue pointer
496 * if the ring is running, and ringing the doorbell starts the
497 * ring running.
498 */
499 ep_ring->state |= SET_DEQ_PENDING;
500 xhci_ring_cmd_db(xhci);
501 } else { 534 } else {
502 /* Otherwise just ring the doorbell to restart the ring */ 535 /* Otherwise just ring the doorbell to restart the ring */
503 ring_ep_doorbell(xhci, slot_id, ep_index); 536 ring_ep_doorbell(xhci, slot_id, ep_index);
@@ -551,11 +584,15 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
551 unsigned int ep_index; 584 unsigned int ep_index;
552 struct xhci_ring *ep_ring; 585 struct xhci_ring *ep_ring;
553 struct xhci_virt_device *dev; 586 struct xhci_virt_device *dev;
587 struct xhci_ep_ctx *ep_ctx;
588 struct xhci_slot_ctx *slot_ctx;
554 589
555 slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]); 590 slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]);
556 ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]); 591 ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]);
557 dev = xhci->devs[slot_id]; 592 dev = xhci->devs[slot_id];
558 ep_ring = dev->ep_rings[ep_index]; 593 ep_ring = dev->ep_rings[ep_index];
594 ep_ctx = xhci_get_ep_ctx(xhci, dev->out_ctx, ep_index);
595 slot_ctx = xhci_get_slot_ctx(xhci, dev->out_ctx);
559 596
560 if (GET_COMP_CODE(event->status) != COMP_SUCCESS) { 597 if (GET_COMP_CODE(event->status) != COMP_SUCCESS) {
561 unsigned int ep_state; 598 unsigned int ep_state;
@@ -569,9 +606,9 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
569 case COMP_CTX_STATE: 606 case COMP_CTX_STATE:
570 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due " 607 xhci_warn(xhci, "WARN Set TR Deq Ptr cmd failed due "
571 "to incorrect slot or ep state.\n"); 608 "to incorrect slot or ep state.\n");
572 ep_state = dev->out_ctx->ep[ep_index].ep_info; 609 ep_state = ep_ctx->ep_info;
573 ep_state &= EP_STATE_MASK; 610 ep_state &= EP_STATE_MASK;
574 slot_state = dev->out_ctx->slot.dev_state; 611 slot_state = slot_ctx->dev_state;
575 slot_state = GET_SLOT_STATE(slot_state); 612 slot_state = GET_SLOT_STATE(slot_state);
576 xhci_dbg(xhci, "Slot state = %u, EP state = %u\n", 613 xhci_dbg(xhci, "Slot state = %u, EP state = %u\n",
577 slot_state, ep_state); 614 slot_state, ep_state);
@@ -593,16 +630,33 @@ static void handle_set_deq_completion(struct xhci_hcd *xhci,
593 * cancelling URBs, which might not be an error... 630 * cancelling URBs, which might not be an error...
594 */ 631 */
595 } else { 632 } else {
596 xhci_dbg(xhci, "Successful Set TR Deq Ptr cmd, deq[0] = 0x%x, " 633 xhci_dbg(xhci, "Successful Set TR Deq Ptr cmd, deq = @%08llx\n",
597 "deq[1] = 0x%x.\n", 634 ep_ctx->deq);
598 dev->out_ctx->ep[ep_index].deq[0],
599 dev->out_ctx->ep[ep_index].deq[1]);
600 } 635 }
601 636
602 ep_ring->state &= ~SET_DEQ_PENDING; 637 ep_ring->state &= ~SET_DEQ_PENDING;
603 ring_ep_doorbell(xhci, slot_id, ep_index); 638 ring_ep_doorbell(xhci, slot_id, ep_index);
604} 639}
605 640
641static void handle_reset_ep_completion(struct xhci_hcd *xhci,
642 struct xhci_event_cmd *event,
643 union xhci_trb *trb)
644{
645 int slot_id;
646 unsigned int ep_index;
647
648 slot_id = TRB_TO_SLOT_ID(trb->generic.field[3]);
649 ep_index = TRB_TO_EP_INDEX(trb->generic.field[3]);
650 /* This command will only fail if the endpoint wasn't halted,
651 * but we don't care.
652 */
653 xhci_dbg(xhci, "Ignoring reset ep completion code of %u\n",
654 (unsigned int) GET_COMP_CODE(event->status));
655
656 /* Clear our internal halted state and restart the ring */
657 xhci->devs[slot_id]->ep_rings[ep_index]->state &= ~EP_HALTED;
658 ring_ep_doorbell(xhci, slot_id, ep_index);
659}
606 660
607static void handle_cmd_completion(struct xhci_hcd *xhci, 661static void handle_cmd_completion(struct xhci_hcd *xhci,
608 struct xhci_event_cmd *event) 662 struct xhci_event_cmd *event)
@@ -611,7 +665,7 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
611 u64 cmd_dma; 665 u64 cmd_dma;
612 dma_addr_t cmd_dequeue_dma; 666 dma_addr_t cmd_dequeue_dma;
613 667
614 cmd_dma = (((u64) event->cmd_trb[1]) << 32) + event->cmd_trb[0]; 668 cmd_dma = event->cmd_trb;
615 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg, 669 cmd_dequeue_dma = xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
616 xhci->cmd_ring->dequeue); 670 xhci->cmd_ring->dequeue);
617 /* Is the command ring deq ptr out of sync with the deq seg ptr? */ 671 /* Is the command ring deq ptr out of sync with the deq seg ptr? */
@@ -653,6 +707,9 @@ static void handle_cmd_completion(struct xhci_hcd *xhci,
653 case TRB_TYPE(TRB_CMD_NOOP): 707 case TRB_TYPE(TRB_CMD_NOOP):
654 ++xhci->noops_handled; 708 ++xhci->noops_handled;
655 break; 709 break;
710 case TRB_TYPE(TRB_RESET_EP):
711 handle_reset_ep_completion(xhci, event, xhci->cmd_ring->dequeue);
712 break;
656 default: 713 default:
657 /* Skip over unknown commands on the event ring */ 714 /* Skip over unknown commands on the event ring */
658 xhci->error_bitmask |= 1 << 6; 715 xhci->error_bitmask |= 1 << 6;
@@ -756,7 +813,9 @@ static int handle_tx_event(struct xhci_hcd *xhci,
756 union xhci_trb *event_trb; 813 union xhci_trb *event_trb;
757 struct urb *urb = 0; 814 struct urb *urb = 0;
758 int status = -EINPROGRESS; 815 int status = -EINPROGRESS;
816 struct xhci_ep_ctx *ep_ctx;
759 817
818 xhci_dbg(xhci, "In %s\n", __func__);
760 xdev = xhci->devs[TRB_TO_SLOT_ID(event->flags)]; 819 xdev = xhci->devs[TRB_TO_SLOT_ID(event->flags)];
761 if (!xdev) { 820 if (!xdev) {
762 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n"); 821 xhci_err(xhci, "ERROR Transfer event pointed to bad slot\n");
@@ -765,17 +824,17 @@ static int handle_tx_event(struct xhci_hcd *xhci,
765 824
766 /* Endpoint ID is 1 based, our index is zero based */ 825 /* Endpoint ID is 1 based, our index is zero based */
767 ep_index = TRB_TO_EP_ID(event->flags) - 1; 826 ep_index = TRB_TO_EP_ID(event->flags) - 1;
827 xhci_dbg(xhci, "%s - ep index = %d\n", __func__, ep_index);
768 ep_ring = xdev->ep_rings[ep_index]; 828 ep_ring = xdev->ep_rings[ep_index];
769 if (!ep_ring || (xdev->out_ctx->ep[ep_index].ep_info & EP_STATE_MASK) == EP_STATE_DISABLED) { 829 ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
830 if (!ep_ring || (ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED) {
770 xhci_err(xhci, "ERROR Transfer event pointed to disabled endpoint\n"); 831 xhci_err(xhci, "ERROR Transfer event pointed to disabled endpoint\n");
771 return -ENODEV; 832 return -ENODEV;
772 } 833 }
773 834
774 event_dma = event->buffer[0]; 835 event_dma = event->buffer;
775 if (event->buffer[1] != 0)
776 xhci_warn(xhci, "WARN ignoring upper 32-bits of 64-bit TRB dma address\n");
777
778 /* This TRB should be in the TD at the head of this ring's TD list */ 836 /* This TRB should be in the TD at the head of this ring's TD list */
837 xhci_dbg(xhci, "%s - checking for list empty\n", __func__);
779 if (list_empty(&ep_ring->td_list)) { 838 if (list_empty(&ep_ring->td_list)) {
780 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n", 839 xhci_warn(xhci, "WARN Event TRB for slot %d ep %d with no TDs queued?\n",
781 TRB_TO_SLOT_ID(event->flags), ep_index); 840 TRB_TO_SLOT_ID(event->flags), ep_index);
@@ -785,11 +844,14 @@ static int handle_tx_event(struct xhci_hcd *xhci,
785 urb = NULL; 844 urb = NULL;
786 goto cleanup; 845 goto cleanup;
787 } 846 }
847 xhci_dbg(xhci, "%s - getting list entry\n", __func__);
788 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list); 848 td = list_entry(ep_ring->td_list.next, struct xhci_td, td_list);
789 849
790 /* Is this a TRB in the currently executing TD? */ 850 /* Is this a TRB in the currently executing TD? */
851 xhci_dbg(xhci, "%s - looking for TD\n", __func__);
791 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue, 852 event_seg = trb_in_td(ep_ring->deq_seg, ep_ring->dequeue,
792 td->last_trb, event_dma); 853 td->last_trb, event_dma);
854 xhci_dbg(xhci, "%s - found event_seg = %p\n", __func__, event_seg);
793 if (!event_seg) { 855 if (!event_seg) {
794 /* HC is busted, give up! */ 856 /* HC is busted, give up! */
795 xhci_err(xhci, "ERROR Transfer event TRB DMA ptr not part of current TD\n"); 857 xhci_err(xhci, "ERROR Transfer event TRB DMA ptr not part of current TD\n");
@@ -798,10 +860,10 @@ static int handle_tx_event(struct xhci_hcd *xhci,
798 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) / sizeof(*event_trb)]; 860 event_trb = &event_seg->trbs[(event_dma - event_seg->dma) / sizeof(*event_trb)];
799 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n", 861 xhci_dbg(xhci, "Event TRB with TRB type ID %u\n",
800 (unsigned int) (event->flags & TRB_TYPE_BITMASK)>>10); 862 (unsigned int) (event->flags & TRB_TYPE_BITMASK)>>10);
801 xhci_dbg(xhci, "Offset 0x00 (buffer[0]) = 0x%x\n", 863 xhci_dbg(xhci, "Offset 0x00 (buffer lo) = 0x%x\n",
802 (unsigned int) event->buffer[0]); 864 lower_32_bits(event->buffer));
803 xhci_dbg(xhci, "Offset 0x04 (buffer[0]) = 0x%x\n", 865 xhci_dbg(xhci, "Offset 0x04 (buffer hi) = 0x%x\n",
804 (unsigned int) event->buffer[1]); 866 upper_32_bits(event->buffer));
805 xhci_dbg(xhci, "Offset 0x08 (transfer length) = 0x%x\n", 867 xhci_dbg(xhci, "Offset 0x08 (transfer length) = 0x%x\n",
806 (unsigned int) event->transfer_len); 868 (unsigned int) event->transfer_len);
807 xhci_dbg(xhci, "Offset 0x0C (flags) = 0x%x\n", 869 xhci_dbg(xhci, "Offset 0x0C (flags) = 0x%x\n",
@@ -823,6 +885,7 @@ static int handle_tx_event(struct xhci_hcd *xhci,
823 break; 885 break;
824 case COMP_STALL: 886 case COMP_STALL:
825 xhci_warn(xhci, "WARN: Stalled endpoint\n"); 887 xhci_warn(xhci, "WARN: Stalled endpoint\n");
888 ep_ring->state |= EP_HALTED;
826 status = -EPIPE; 889 status = -EPIPE;
827 break; 890 break;
828 case COMP_TRB_ERR: 891 case COMP_TRB_ERR:
@@ -833,6 +896,10 @@ static int handle_tx_event(struct xhci_hcd *xhci,
833 xhci_warn(xhci, "WARN: transfer error on endpoint\n"); 896 xhci_warn(xhci, "WARN: transfer error on endpoint\n");
834 status = -EPROTO; 897 status = -EPROTO;
835 break; 898 break;
899 case COMP_BABBLE:
900 xhci_warn(xhci, "WARN: babble error on endpoint\n");
901 status = -EOVERFLOW;
902 break;
836 case COMP_DB_ERR: 903 case COMP_DB_ERR:
837 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n"); 904 xhci_warn(xhci, "WARN: HC couldn't access mem fast enough\n");
838 status = -ENOSR; 905 status = -ENOSR;
@@ -874,15 +941,26 @@ static int handle_tx_event(struct xhci_hcd *xhci,
874 if (event_trb != ep_ring->dequeue) { 941 if (event_trb != ep_ring->dequeue) {
875 /* The event was for the status stage */ 942 /* The event was for the status stage */
876 if (event_trb == td->last_trb) { 943 if (event_trb == td->last_trb) {
877 td->urb->actual_length = 944 if (td->urb->actual_length != 0) {
878 td->urb->transfer_buffer_length; 945 /* Don't overwrite a previously set error code */
946 if (status == -EINPROGRESS || status == 0)
947 /* Did we already see a short data stage? */
948 status = -EREMOTEIO;
949 } else {
950 td->urb->actual_length =
951 td->urb->transfer_buffer_length;
952 }
879 } else { 953 } else {
880 /* Maybe the event was for the data stage? */ 954 /* Maybe the event was for the data stage? */
881 if (GET_COMP_CODE(event->transfer_len) != COMP_STOP_INVAL) 955 if (GET_COMP_CODE(event->transfer_len) != COMP_STOP_INVAL) {
882 /* We didn't stop on a link TRB in the middle */ 956 /* We didn't stop on a link TRB in the middle */
883 td->urb->actual_length = 957 td->urb->actual_length =
884 td->urb->transfer_buffer_length - 958 td->urb->transfer_buffer_length -
885 TRB_LEN(event->transfer_len); 959 TRB_LEN(event->transfer_len);
960 xhci_dbg(xhci, "Waiting for status stage event\n");
961 urb = NULL;
962 goto cleanup;
963 }
886 } 964 }
887 } 965 }
888 } else { 966 } else {
@@ -929,16 +1007,20 @@ static int handle_tx_event(struct xhci_hcd *xhci,
929 TRB_LEN(event->transfer_len)); 1007 TRB_LEN(event->transfer_len));
930 td->urb->actual_length = 0; 1008 td->urb->actual_length = 0;
931 } 1009 }
932 if (td->urb->transfer_flags & URB_SHORT_NOT_OK) 1010 /* Don't overwrite a previously set error code */
933 status = -EREMOTEIO; 1011 if (status == -EINPROGRESS) {
934 else 1012 if (td->urb->transfer_flags & URB_SHORT_NOT_OK)
935 status = 0; 1013 status = -EREMOTEIO;
1014 else
1015 status = 0;
1016 }
936 } else { 1017 } else {
937 td->urb->actual_length = td->urb->transfer_buffer_length; 1018 td->urb->actual_length = td->urb->transfer_buffer_length;
938 /* Ignore a short packet completion if the 1019 /* Ignore a short packet completion if the
939 * untransferred length was zero. 1020 * untransferred length was zero.
940 */ 1021 */
941 status = 0; 1022 if (status == -EREMOTEIO)
1023 status = 0;
942 } 1024 }
943 } else { 1025 } else {
944 /* Slow path - walk the list, starting from the dequeue 1026 /* Slow path - walk the list, starting from the dequeue
@@ -965,19 +1047,30 @@ static int handle_tx_event(struct xhci_hcd *xhci,
965 TRB_LEN(event->transfer_len); 1047 TRB_LEN(event->transfer_len);
966 } 1048 }
967 } 1049 }
968 /* The Endpoint Stop Command completion will take care of
969 * any stopped TDs. A stopped TD may be restarted, so don't update the
970 * ring dequeue pointer or take this TD off any lists yet.
971 */
972 if (GET_COMP_CODE(event->transfer_len) == COMP_STOP_INVAL || 1050 if (GET_COMP_CODE(event->transfer_len) == COMP_STOP_INVAL ||
973 GET_COMP_CODE(event->transfer_len) == COMP_STOP) { 1051 GET_COMP_CODE(event->transfer_len) == COMP_STOP) {
1052 /* The Endpoint Stop Command completion will take care of any
1053 * stopped TDs. A stopped TD may be restarted, so don't update
1054 * the ring dequeue pointer or take this TD off any lists yet.
1055 */
974 ep_ring->stopped_td = td; 1056 ep_ring->stopped_td = td;
975 ep_ring->stopped_trb = event_trb; 1057 ep_ring->stopped_trb = event_trb;
976 } else { 1058 } else {
977 /* Update ring dequeue pointer */ 1059 if (GET_COMP_CODE(event->transfer_len) == COMP_STALL) {
978 while (ep_ring->dequeue != td->last_trb) 1060 /* The transfer is completed from the driver's
1061 * perspective, but we need to issue a set dequeue
1062 * command for this stalled endpoint to move the dequeue
1063 * pointer past the TD. We can't do that here because
1064 * the halt condition must be cleared first.
1065 */
1066 ep_ring->stopped_td = td;
1067 ep_ring->stopped_trb = event_trb;
1068 } else {
1069 /* Update ring dequeue pointer */
1070 while (ep_ring->dequeue != td->last_trb)
1071 inc_deq(xhci, ep_ring, false);
979 inc_deq(xhci, ep_ring, false); 1072 inc_deq(xhci, ep_ring, false);
980 inc_deq(xhci, ep_ring, false); 1073 }
981 1074
982 /* Clean up the endpoint's TD list */ 1075 /* Clean up the endpoint's TD list */
983 urb = td->urb; 1076 urb = td->urb;
@@ -987,7 +1080,10 @@ static int handle_tx_event(struct xhci_hcd *xhci,
987 list_del(&td->cancelled_td_list); 1080 list_del(&td->cancelled_td_list);
988 ep_ring->cancels_pending--; 1081 ep_ring->cancels_pending--;
989 } 1082 }
990 kfree(td); 1083 /* Leave the TD around for the reset endpoint function to use */
1084 if (GET_COMP_CODE(event->transfer_len) != COMP_STALL) {
1085 kfree(td);
1086 }
991 urb->hcpriv = NULL; 1087 urb->hcpriv = NULL;
992 } 1088 }
993cleanup: 1089cleanup:
@@ -997,6 +1093,8 @@ cleanup:
997 /* FIXME for multi-TD URBs (who have buffers bigger than 64MB) */ 1093 /* FIXME for multi-TD URBs (who have buffers bigger than 64MB) */
998 if (urb) { 1094 if (urb) {
999 usb_hcd_unlink_urb_from_ep(xhci_to_hcd(xhci), urb); 1095 usb_hcd_unlink_urb_from_ep(xhci_to_hcd(xhci), urb);
1096 xhci_dbg(xhci, "Giveback URB %p, len = %d, status = %d\n",
1097 urb, td->urb->actual_length, status);
1000 spin_unlock(&xhci->lock); 1098 spin_unlock(&xhci->lock);
1001 usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, status); 1099 usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, status);
1002 spin_lock(&xhci->lock); 1100 spin_lock(&xhci->lock);
@@ -1014,6 +1112,7 @@ void xhci_handle_event(struct xhci_hcd *xhci)
1014 int update_ptrs = 1; 1112 int update_ptrs = 1;
1015 int ret; 1113 int ret;
1016 1114
1115 xhci_dbg(xhci, "In %s\n", __func__);
1017 if (!xhci->event_ring || !xhci->event_ring->dequeue) { 1116 if (!xhci->event_ring || !xhci->event_ring->dequeue) {
1018 xhci->error_bitmask |= 1 << 1; 1117 xhci->error_bitmask |= 1 << 1;
1019 return; 1118 return;
@@ -1026,18 +1125,25 @@ void xhci_handle_event(struct xhci_hcd *xhci)
1026 xhci->error_bitmask |= 1 << 2; 1125 xhci->error_bitmask |= 1 << 2;
1027 return; 1126 return;
1028 } 1127 }
1128 xhci_dbg(xhci, "%s - OS owns TRB\n", __func__);
1029 1129
1030 /* FIXME: Handle more event types. */ 1130 /* FIXME: Handle more event types. */
1031 switch ((event->event_cmd.flags & TRB_TYPE_BITMASK)) { 1131 switch ((event->event_cmd.flags & TRB_TYPE_BITMASK)) {
1032 case TRB_TYPE(TRB_COMPLETION): 1132 case TRB_TYPE(TRB_COMPLETION):
1133 xhci_dbg(xhci, "%s - calling handle_cmd_completion\n", __func__);
1033 handle_cmd_completion(xhci, &event->event_cmd); 1134 handle_cmd_completion(xhci, &event->event_cmd);
1135 xhci_dbg(xhci, "%s - returned from handle_cmd_completion\n", __func__);
1034 break; 1136 break;
1035 case TRB_TYPE(TRB_PORT_STATUS): 1137 case TRB_TYPE(TRB_PORT_STATUS):
1138 xhci_dbg(xhci, "%s - calling handle_port_status\n", __func__);
1036 handle_port_status(xhci, event); 1139 handle_port_status(xhci, event);
1140 xhci_dbg(xhci, "%s - returned from handle_port_status\n", __func__);
1037 update_ptrs = 0; 1141 update_ptrs = 0;
1038 break; 1142 break;
1039 case TRB_TYPE(TRB_TRANSFER): 1143 case TRB_TYPE(TRB_TRANSFER):
1144 xhci_dbg(xhci, "%s - calling handle_tx_event\n", __func__);
1040 ret = handle_tx_event(xhci, &event->trans_event); 1145 ret = handle_tx_event(xhci, &event->trans_event);
1146 xhci_dbg(xhci, "%s - returned from handle_tx_event\n", __func__);
1041 if (ret < 0) 1147 if (ret < 0)
1042 xhci->error_bitmask |= 1 << 9; 1148 xhci->error_bitmask |= 1 << 9;
1043 else 1149 else
@@ -1093,13 +1199,13 @@ static int prepare_ring(struct xhci_hcd *xhci, struct xhci_ring *ep_ring,
1093 */ 1199 */
1094 xhci_warn(xhci, "WARN urb submitted to disabled ep\n"); 1200 xhci_warn(xhci, "WARN urb submitted to disabled ep\n");
1095 return -ENOENT; 1201 return -ENOENT;
1096 case EP_STATE_HALTED:
1097 case EP_STATE_ERROR: 1202 case EP_STATE_ERROR:
1098 xhci_warn(xhci, "WARN waiting for halt or error on ep " 1203 xhci_warn(xhci, "WARN waiting for error on ep to be cleared\n");
1099 "to be cleared\n");
1100 /* FIXME event handling code for error needs to clear it */ 1204 /* FIXME event handling code for error needs to clear it */
1101 /* XXX not sure if this should be -ENOENT or not */ 1205 /* XXX not sure if this should be -ENOENT or not */
1102 return -EINVAL; 1206 return -EINVAL;
1207 case EP_STATE_HALTED:
1208 xhci_dbg(xhci, "WARN halted endpoint, queueing URB anyway.\n");
1103 case EP_STATE_STOPPED: 1209 case EP_STATE_STOPPED:
1104 case EP_STATE_RUNNING: 1210 case EP_STATE_RUNNING:
1105 break; 1211 break;
@@ -1128,9 +1234,9 @@ static int prepare_transfer(struct xhci_hcd *xhci,
1128 gfp_t mem_flags) 1234 gfp_t mem_flags)
1129{ 1235{
1130 int ret; 1236 int ret;
1131 1237 struct xhci_ep_ctx *ep_ctx = xhci_get_ep_ctx(xhci, xdev->out_ctx, ep_index);
1132 ret = prepare_ring(xhci, xdev->ep_rings[ep_index], 1238 ret = prepare_ring(xhci, xdev->ep_rings[ep_index],
1133 xdev->out_ctx->ep[ep_index].ep_info & EP_STATE_MASK, 1239 ep_ctx->ep_info & EP_STATE_MASK,
1134 num_trbs, mem_flags); 1240 num_trbs, mem_flags);
1135 if (ret) 1241 if (ret)
1136 return ret; 1242 return ret;
@@ -1285,6 +1391,7 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
1285 /* Queue the first TRB, even if it's zero-length */ 1391 /* Queue the first TRB, even if it's zero-length */
1286 do { 1392 do {
1287 u32 field = 0; 1393 u32 field = 0;
1394 u32 length_field = 0;
1288 1395
1289 /* Don't change the cycle bit of the first TRB until later */ 1396 /* Don't change the cycle bit of the first TRB until later */
1290 if (first_trb) 1397 if (first_trb)
@@ -1314,10 +1421,13 @@ static int queue_bulk_sg_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
1314 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1), 1421 (unsigned int) (addr + TRB_MAX_BUFF_SIZE) & ~(TRB_MAX_BUFF_SIZE - 1),
1315 (unsigned int) addr + trb_buff_len); 1422 (unsigned int) addr + trb_buff_len);
1316 } 1423 }
1424 length_field = TRB_LEN(trb_buff_len) |
1425 TD_REMAINDER(urb->transfer_buffer_length - running_total) |
1426 TRB_INTR_TARGET(0);
1317 queue_trb(xhci, ep_ring, false, 1427 queue_trb(xhci, ep_ring, false,
1318 (u32) addr, 1428 lower_32_bits(addr),
1319 (u32) ((u64) addr >> 32), 1429 upper_32_bits(addr),
1320 TRB_LEN(trb_buff_len) | TRB_INTR_TARGET(0), 1430 length_field,
1321 /* We always want to know if the TRB was short, 1431 /* We always want to know if the TRB was short,
1322 * or we won't get an event when it completes. 1432 * or we won't get an event when it completes.
1323 * (Unless we use event data TRBs, which are a 1433 * (Unless we use event data TRBs, which are a
@@ -1365,7 +1475,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
1365 struct xhci_generic_trb *start_trb; 1475 struct xhci_generic_trb *start_trb;
1366 bool first_trb; 1476 bool first_trb;
1367 int start_cycle; 1477 int start_cycle;
1368 u32 field; 1478 u32 field, length_field;
1369 1479
1370 int running_total, trb_buff_len, ret; 1480 int running_total, trb_buff_len, ret;
1371 u64 addr; 1481 u64 addr;
@@ -1443,10 +1553,13 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
1443 td->last_trb = ep_ring->enqueue; 1553 td->last_trb = ep_ring->enqueue;
1444 field |= TRB_IOC; 1554 field |= TRB_IOC;
1445 } 1555 }
1556 length_field = TRB_LEN(trb_buff_len) |
1557 TD_REMAINDER(urb->transfer_buffer_length - running_total) |
1558 TRB_INTR_TARGET(0);
1446 queue_trb(xhci, ep_ring, false, 1559 queue_trb(xhci, ep_ring, false,
1447 (u32) addr, 1560 lower_32_bits(addr),
1448 (u32) ((u64) addr >> 32), 1561 upper_32_bits(addr),
1449 TRB_LEN(trb_buff_len) | TRB_INTR_TARGET(0), 1562 length_field,
1450 /* We always want to know if the TRB was short, 1563 /* We always want to know if the TRB was short,
1451 * or we won't get an event when it completes. 1564 * or we won't get an event when it completes.
1452 * (Unless we use event data TRBs, which are a 1565 * (Unless we use event data TRBs, which are a
@@ -1478,7 +1591,7 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
1478 struct usb_ctrlrequest *setup; 1591 struct usb_ctrlrequest *setup;
1479 struct xhci_generic_trb *start_trb; 1592 struct xhci_generic_trb *start_trb;
1480 int start_cycle; 1593 int start_cycle;
1481 u32 field; 1594 u32 field, length_field;
1482 struct xhci_td *td; 1595 struct xhci_td *td;
1483 1596
1484 ep_ring = xhci->devs[slot_id]->ep_rings[ep_index]; 1597 ep_ring = xhci->devs[slot_id]->ep_rings[ep_index];
@@ -1528,13 +1641,16 @@ int xhci_queue_ctrl_tx(struct xhci_hcd *xhci, gfp_t mem_flags,
1528 1641
1529 /* If there's data, queue data TRBs */ 1642 /* If there's data, queue data TRBs */
1530 field = 0; 1643 field = 0;
1644 length_field = TRB_LEN(urb->transfer_buffer_length) |
1645 TD_REMAINDER(urb->transfer_buffer_length) |
1646 TRB_INTR_TARGET(0);
1531 if (urb->transfer_buffer_length > 0) { 1647 if (urb->transfer_buffer_length > 0) {
1532 if (setup->bRequestType & USB_DIR_IN) 1648 if (setup->bRequestType & USB_DIR_IN)
1533 field |= TRB_DIR_IN; 1649 field |= TRB_DIR_IN;
1534 queue_trb(xhci, ep_ring, false, 1650 queue_trb(xhci, ep_ring, false,
1535 lower_32_bits(urb->transfer_dma), 1651 lower_32_bits(urb->transfer_dma),
1536 upper_32_bits(urb->transfer_dma), 1652 upper_32_bits(urb->transfer_dma),
1537 TRB_LEN(urb->transfer_buffer_length) | TRB_INTR_TARGET(0), 1653 length_field,
1538 /* Event on short tx */ 1654 /* Event on short tx */
1539 field | TRB_ISP | TRB_TYPE(TRB_DATA) | ep_ring->cycle_state); 1655 field | TRB_ISP | TRB_TYPE(TRB_DATA) | ep_ring->cycle_state);
1540 } 1656 }
@@ -1603,7 +1719,8 @@ int xhci_queue_slot_control(struct xhci_hcd *xhci, u32 trb_type, u32 slot_id)
1603int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, 1719int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
1604 u32 slot_id) 1720 u32 slot_id)
1605{ 1721{
1606 return queue_command(xhci, in_ctx_ptr, 0, 0, 1722 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
1723 upper_32_bits(in_ctx_ptr), 0,
1607 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id)); 1724 TRB_TYPE(TRB_ADDR_DEV) | SLOT_ID_FOR_TRB(slot_id));
1608} 1725}
1609 1726
@@ -1611,7 +1728,8 @@ int xhci_queue_address_device(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
1611int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, 1728int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
1612 u32 slot_id) 1729 u32 slot_id)
1613{ 1730{
1614 return queue_command(xhci, in_ctx_ptr, 0, 0, 1731 return queue_command(xhci, lower_32_bits(in_ctx_ptr),
1732 upper_32_bits(in_ctx_ptr), 0,
1615 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id)); 1733 TRB_TYPE(TRB_CONFIG_EP) | SLOT_ID_FOR_TRB(slot_id));
1616} 1734}
1617 1735
@@ -1639,10 +1757,23 @@ static int queue_set_tr_deq(struct xhci_hcd *xhci, int slot_id,
1639 u32 type = TRB_TYPE(TRB_SET_DEQ); 1757 u32 type = TRB_TYPE(TRB_SET_DEQ);
1640 1758
1641 addr = xhci_trb_virt_to_dma(deq_seg, deq_ptr); 1759 addr = xhci_trb_virt_to_dma(deq_seg, deq_ptr);
1642 if (addr == 0) 1760 if (addr == 0) {
1643 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n"); 1761 xhci_warn(xhci, "WARN Cannot submit Set TR Deq Ptr\n");
1644 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n", 1762 xhci_warn(xhci, "WARN deq seg = %p, deq pt = %p\n",
1645 deq_seg, deq_ptr); 1763 deq_seg, deq_ptr);
1646 return queue_command(xhci, (u32) addr | cycle_state, 0, 0, 1764 return 0;
1765 }
1766 return queue_command(xhci, lower_32_bits(addr) | cycle_state,
1767 upper_32_bits(addr), 0,
1647 trb_slot_id | trb_ep_index | type); 1768 trb_slot_id | trb_ep_index | type);
1648} 1769}
1770
1771int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id,
1772 unsigned int ep_index)
1773{
1774 u32 trb_slot_id = SLOT_ID_FOR_TRB(slot_id);
1775 u32 trb_ep_index = EP_ID_FOR_TRB(ep_index);
1776 u32 type = TRB_TYPE(TRB_RESET_EP);
1777
1778 return queue_command(xhci, 0, 0, 0, trb_slot_id | trb_ep_index | type);
1779}
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 8936eeb5588b..d31d32206ba3 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -25,6 +25,7 @@
25 25
26#include <linux/usb.h> 26#include <linux/usb.h>
27#include <linux/timer.h> 27#include <linux/timer.h>
28#include <linux/kernel.h>
28 29
29#include "../core/hcd.h" 30#include "../core/hcd.h"
30/* Code sharing between pci-quirks and xhci hcd */ 31/* Code sharing between pci-quirks and xhci hcd */
@@ -42,14 +43,6 @@
42 * xHCI register interface. 43 * xHCI register interface.
43 * This corresponds to the eXtensible Host Controller Interface (xHCI) 44 * This corresponds to the eXtensible Host Controller Interface (xHCI)
44 * Revision 0.95 specification 45 * Revision 0.95 specification
45 *
46 * Registers should always be accessed with double word or quad word accesses.
47 *
48 * Some xHCI implementations may support 64-bit address pointers. Registers
49 * with 64-bit address pointers should be written to with dword accesses by
50 * writing the low dword first (ptr[0]), then the high dword (ptr[1]) second.
51 * xHCI implementations that do not support 64-bit address pointers will ignore
52 * the high dword, and write order is irrelevant.
53 */ 46 */
54 47
55/** 48/**
@@ -96,6 +89,7 @@ struct xhci_cap_regs {
96#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf) 89#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf)
97/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */ 90/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
98/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */ 91/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */
92#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f)
99 93
100/* HCSPARAMS3 - hcs_params3 - bitmasks */ 94/* HCSPARAMS3 - hcs_params3 - bitmasks */
101/* bits 0:7, Max U1 to U0 latency for the roothub ports */ 95/* bits 0:7, Max U1 to U0 latency for the roothub ports */
@@ -166,10 +160,10 @@ struct xhci_op_regs {
166 u32 reserved1; 160 u32 reserved1;
167 u32 reserved2; 161 u32 reserved2;
168 u32 dev_notification; 162 u32 dev_notification;
169 u32 cmd_ring[2]; 163 u64 cmd_ring;
170 /* rsvd: offset 0x20-2F */ 164 /* rsvd: offset 0x20-2F */
171 u32 reserved3[4]; 165 u32 reserved3[4];
172 u32 dcbaa_ptr[2]; 166 u64 dcbaa_ptr;
173 u32 config_reg; 167 u32 config_reg;
174 /* rsvd: offset 0x3C-3FF */ 168 /* rsvd: offset 0x3C-3FF */
175 u32 reserved4[241]; 169 u32 reserved4[241];
@@ -254,7 +248,7 @@ struct xhci_op_regs {
254#define CMD_RING_RUNNING (1 << 3) 248#define CMD_RING_RUNNING (1 << 3)
255/* bits 4:5 reserved and should be preserved */ 249/* bits 4:5 reserved and should be preserved */
256/* Command Ring pointer - bit mask for the lower 32 bits. */ 250/* Command Ring pointer - bit mask for the lower 32 bits. */
257#define CMD_RING_ADDR_MASK (0xffffffc0) 251#define CMD_RING_RSVD_BITS (0x3f)
258 252
259/* CONFIG - Configure Register - config_reg bitmasks */ 253/* CONFIG - Configure Register - config_reg bitmasks */
260/* bits 0:7 - maximum number of device slots enabled (NumSlotsEn) */ 254/* bits 0:7 - maximum number of device slots enabled (NumSlotsEn) */
@@ -382,8 +376,8 @@ struct xhci_intr_reg {
382 u32 irq_control; 376 u32 irq_control;
383 u32 erst_size; 377 u32 erst_size;
384 u32 rsvd; 378 u32 rsvd;
385 u32 erst_base[2]; 379 u64 erst_base;
386 u32 erst_dequeue[2]; 380 u64 erst_dequeue;
387}; 381};
388 382
389/* irq_pending bitmasks */ 383/* irq_pending bitmasks */
@@ -453,6 +447,27 @@ struct xhci_doorbell_array {
453 447
454 448
455/** 449/**
450 * struct xhci_container_ctx
451 * @type: Type of context. Used to calculated offsets to contained contexts.
452 * @size: Size of the context data
453 * @bytes: The raw context data given to HW
454 * @dma: dma address of the bytes
455 *
456 * Represents either a Device or Input context. Holds a pointer to the raw
457 * memory used for the context (bytes) and dma address of it (dma).
458 */
459struct xhci_container_ctx {
460 unsigned type;
461#define XHCI_CTX_TYPE_DEVICE 0x1
462#define XHCI_CTX_TYPE_INPUT 0x2
463
464 int size;
465
466 u8 *bytes;
467 dma_addr_t dma;
468};
469
470/**
456 * struct xhci_slot_ctx 471 * struct xhci_slot_ctx
457 * @dev_info: Route string, device speed, hub info, and last valid endpoint 472 * @dev_info: Route string, device speed, hub info, and last valid endpoint
458 * @dev_info2: Max exit latency for device number, root hub port number 473 * @dev_info2: Max exit latency for device number, root hub port number
@@ -538,7 +553,7 @@ struct xhci_slot_ctx {
538struct xhci_ep_ctx { 553struct xhci_ep_ctx {
539 u32 ep_info; 554 u32 ep_info;
540 u32 ep_info2; 555 u32 ep_info2;
541 u32 deq[2]; 556 u64 deq;
542 u32 tx_info; 557 u32 tx_info;
543 /* offset 0x14 - 0x1f reserved for HC internal use */ 558 /* offset 0x14 - 0x1f reserved for HC internal use */
544 u32 reserved[3]; 559 u32 reserved[3];
@@ -589,18 +604,16 @@ struct xhci_ep_ctx {
589 604
590 605
591/** 606/**
592 * struct xhci_device_control 607 * struct xhci_input_control_context
593 * Input/Output context; see section 6.2.5. 608 * Input control context; see section 6.2.5.
594 * 609 *
595 * @drop_context: set the bit of the endpoint context you want to disable 610 * @drop_context: set the bit of the endpoint context you want to disable
596 * @add_context: set the bit of the endpoint context you want to enable 611 * @add_context: set the bit of the endpoint context you want to enable
597 */ 612 */
598struct xhci_device_control { 613struct xhci_input_control_ctx {
599 u32 drop_flags; 614 u32 drop_flags;
600 u32 add_flags; 615 u32 add_flags;
601 u32 rsvd[6]; 616 u32 rsvd2[6];
602 struct xhci_slot_ctx slot;
603 struct xhci_ep_ctx ep[31];
604}; 617};
605 618
606/* drop context bitmasks */ 619/* drop context bitmasks */
@@ -608,7 +621,6 @@ struct xhci_device_control {
608/* add context bitmasks */ 621/* add context bitmasks */
609#define ADD_EP(x) (0x1 << x) 622#define ADD_EP(x) (0x1 << x)
610 623
611
612struct xhci_virt_device { 624struct xhci_virt_device {
613 /* 625 /*
614 * Commands to the hardware are passed an "input context" that 626 * Commands to the hardware are passed an "input context" that
@@ -618,11 +630,10 @@ struct xhci_virt_device {
618 * track of input and output contexts separately because 630 * track of input and output contexts separately because
619 * these commands might fail and we don't trust the hardware. 631 * these commands might fail and we don't trust the hardware.
620 */ 632 */
621 struct xhci_device_control *out_ctx; 633 struct xhci_container_ctx *out_ctx;
622 dma_addr_t out_ctx_dma;
623 /* Used for addressing devices and configuration changes */ 634 /* Used for addressing devices and configuration changes */
624 struct xhci_device_control *in_ctx; 635 struct xhci_container_ctx *in_ctx;
625 dma_addr_t in_ctx_dma; 636
626 /* FIXME when stream support is added */ 637 /* FIXME when stream support is added */
627 struct xhci_ring *ep_rings[31]; 638 struct xhci_ring *ep_rings[31];
628 /* Temporary storage in case the configure endpoint command fails and we 639 /* Temporary storage in case the configure endpoint command fails and we
@@ -641,7 +652,7 @@ struct xhci_virt_device {
641 */ 652 */
642struct xhci_device_context_array { 653struct xhci_device_context_array {
643 /* 64-bit device addresses; we only write 32-bit addresses */ 654 /* 64-bit device addresses; we only write 32-bit addresses */
644 u32 dev_context_ptrs[2*MAX_HC_SLOTS]; 655 u64 dev_context_ptrs[MAX_HC_SLOTS];
645 /* private xHCD pointers */ 656 /* private xHCD pointers */
646 dma_addr_t dma; 657 dma_addr_t dma;
647}; 658};
@@ -654,7 +665,7 @@ struct xhci_device_context_array {
654 665
655struct xhci_stream_ctx { 666struct xhci_stream_ctx {
656 /* 64-bit stream ring address, cycle state, and stream type */ 667 /* 64-bit stream ring address, cycle state, and stream type */
657 u32 stream_ring[2]; 668 u64 stream_ring;
658 /* offset 0x14 - 0x1f reserved for HC internal use */ 669 /* offset 0x14 - 0x1f reserved for HC internal use */
659 u32 reserved[2]; 670 u32 reserved[2];
660}; 671};
@@ -662,7 +673,7 @@ struct xhci_stream_ctx {
662 673
663struct xhci_transfer_event { 674struct xhci_transfer_event {
664 /* 64-bit buffer address, or immediate data */ 675 /* 64-bit buffer address, or immediate data */
665 u32 buffer[2]; 676 u64 buffer;
666 u32 transfer_len; 677 u32 transfer_len;
667 /* This field is interpreted differently based on the type of TRB */ 678 /* This field is interpreted differently based on the type of TRB */
668 u32 flags; 679 u32 flags;
@@ -744,7 +755,7 @@ struct xhci_transfer_event {
744 755
745struct xhci_link_trb { 756struct xhci_link_trb {
746 /* 64-bit segment pointer*/ 757 /* 64-bit segment pointer*/
747 u32 segment_ptr[2]; 758 u64 segment_ptr;
748 u32 intr_target; 759 u32 intr_target;
749 u32 control; 760 u32 control;
750}; 761};
@@ -755,7 +766,7 @@ struct xhci_link_trb {
755/* Command completion event TRB */ 766/* Command completion event TRB */
756struct xhci_event_cmd { 767struct xhci_event_cmd {
757 /* Pointer to command TRB, or the value passed by the event data trb */ 768 /* Pointer to command TRB, or the value passed by the event data trb */
758 u32 cmd_trb[2]; 769 u64 cmd_trb;
759 u32 status; 770 u32 status;
760 u32 flags; 771 u32 flags;
761}; 772};
@@ -848,8 +859,8 @@ union xhci_trb {
848#define TRB_CONFIG_EP 12 859#define TRB_CONFIG_EP 12
849/* Evaluate Context Command */ 860/* Evaluate Context Command */
850#define TRB_EVAL_CONTEXT 13 861#define TRB_EVAL_CONTEXT 13
851/* Reset Transfer Ring Command */ 862/* Reset Endpoint Command */
852#define TRB_RESET_RING 14 863#define TRB_RESET_EP 14
853/* Stop Transfer Ring Command */ 864/* Stop Transfer Ring Command */
854#define TRB_STOP_RING 15 865#define TRB_STOP_RING 15
855/* Set Transfer Ring Dequeue Pointer Command */ 866/* Set Transfer Ring Dequeue Pointer Command */
@@ -929,6 +940,7 @@ struct xhci_ring {
929 unsigned int cancels_pending; 940 unsigned int cancels_pending;
930 unsigned int state; 941 unsigned int state;
931#define SET_DEQ_PENDING (1 << 0) 942#define SET_DEQ_PENDING (1 << 0)
943#define EP_HALTED (1 << 1)
932 /* The TRB that was last reported in a stopped endpoint ring */ 944 /* The TRB that was last reported in a stopped endpoint ring */
933 union xhci_trb *stopped_trb; 945 union xhci_trb *stopped_trb;
934 struct xhci_td *stopped_td; 946 struct xhci_td *stopped_td;
@@ -940,9 +952,15 @@ struct xhci_ring {
940 u32 cycle_state; 952 u32 cycle_state;
941}; 953};
942 954
955struct xhci_dequeue_state {
956 struct xhci_segment *new_deq_seg;
957 union xhci_trb *new_deq_ptr;
958 int new_cycle_state;
959};
960
943struct xhci_erst_entry { 961struct xhci_erst_entry {
944 /* 64-bit event ring segment address */ 962 /* 64-bit event ring segment address */
945 u32 seg_addr[2]; 963 u64 seg_addr;
946 u32 seg_size; 964 u32 seg_size;
947 /* Set to zero */ 965 /* Set to zero */
948 u32 rsvd; 966 u32 rsvd;
@@ -957,6 +975,13 @@ struct xhci_erst {
957 unsigned int erst_size; 975 unsigned int erst_size;
958}; 976};
959 977
978struct xhci_scratchpad {
979 u64 *sp_array;
980 dma_addr_t sp_dma;
981 void **sp_buffers;
982 dma_addr_t *sp_dma_buffers;
983};
984
960/* 985/*
961 * Each segment table entry is 4*32bits long. 1K seems like an ok size: 986 * Each segment table entry is 4*32bits long. 1K seems like an ok size:
962 * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table, 987 * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table,
@@ -1011,6 +1036,9 @@ struct xhci_hcd {
1011 struct xhci_ring *cmd_ring; 1036 struct xhci_ring *cmd_ring;
1012 struct xhci_ring *event_ring; 1037 struct xhci_ring *event_ring;
1013 struct xhci_erst erst; 1038 struct xhci_erst erst;
1039 /* Scratchpad */
1040 struct xhci_scratchpad *scratchpad;
1041
1014 /* slot enabling and address device helpers */ 1042 /* slot enabling and address device helpers */
1015 struct completion addr_dev; 1043 struct completion addr_dev;
1016 int slot_id; 1044 int slot_id;
@@ -1071,13 +1099,43 @@ static inline unsigned int xhci_readl(const struct xhci_hcd *xhci,
1071static inline void xhci_writel(struct xhci_hcd *xhci, 1099static inline void xhci_writel(struct xhci_hcd *xhci,
1072 const unsigned int val, __u32 __iomem *regs) 1100 const unsigned int val, __u32 __iomem *regs)
1073{ 1101{
1074 if (!in_interrupt()) 1102 xhci_dbg(xhci,
1075 xhci_dbg(xhci, 1103 "`MEM_WRITE_DWORD(3'b000, 32'h%p, 32'h%0x, 4'hf);\n",
1076 "`MEM_WRITE_DWORD(3'b000, 32'h%p, 32'h%0x, 4'hf);\n", 1104 regs, val);
1077 regs, val);
1078 writel(val, regs); 1105 writel(val, regs);
1079} 1106}
1080 1107
1108/*
1109 * Registers should always be accessed with double word or quad word accesses.
1110 *
1111 * Some xHCI implementations may support 64-bit address pointers. Registers
1112 * with 64-bit address pointers should be written to with dword accesses by
1113 * writing the low dword first (ptr[0]), then the high dword (ptr[1]) second.
1114 * xHCI implementations that do not support 64-bit address pointers will ignore
1115 * the high dword, and write order is irrelevant.
1116 */
1117static inline u64 xhci_read_64(const struct xhci_hcd *xhci,
1118 __u64 __iomem *regs)
1119{
1120 __u32 __iomem *ptr = (__u32 __iomem *) regs;
1121 u64 val_lo = readl(ptr);
1122 u64 val_hi = readl(ptr + 1);
1123 return val_lo + (val_hi << 32);
1124}
1125static inline void xhci_write_64(struct xhci_hcd *xhci,
1126 const u64 val, __u64 __iomem *regs)
1127{
1128 __u32 __iomem *ptr = (__u32 __iomem *) regs;
1129 u32 val_lo = lower_32_bits(val);
1130 u32 val_hi = upper_32_bits(val);
1131
1132 xhci_dbg(xhci,
1133 "`MEM_WRITE_DWORD(3'b000, 64'h%p, 64'h%0lx, 4'hf);\n",
1134 regs, (long unsigned int) val);
1135 writel(val_lo, ptr);
1136 writel(val_hi, ptr + 1);
1137}
1138
1081/* xHCI debugging */ 1139/* xHCI debugging */
1082void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num); 1140void xhci_print_ir_set(struct xhci_hcd *xhci, struct xhci_intr_reg *ir_set, int set_num);
1083void xhci_print_registers(struct xhci_hcd *xhci); 1141void xhci_print_registers(struct xhci_hcd *xhci);
@@ -1090,7 +1148,7 @@ void xhci_debug_ring(struct xhci_hcd *xhci, struct xhci_ring *ring);
1090void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst); 1148void xhci_dbg_erst(struct xhci_hcd *xhci, struct xhci_erst *erst);
1091void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci); 1149void xhci_dbg_cmd_ptrs(struct xhci_hcd *xhci);
1092void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring); 1150void xhci_dbg_ring_ptrs(struct xhci_hcd *xhci, struct xhci_ring *ring);
1093void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_device_control *ctx, dma_addr_t dma, unsigned int last_ep); 1151void xhci_dbg_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx, unsigned int last_ep);
1094 1152
1095/* xHCI memory managment */ 1153/* xHCI memory managment */
1096void xhci_mem_cleanup(struct xhci_hcd *xhci); 1154void xhci_mem_cleanup(struct xhci_hcd *xhci);
@@ -1128,6 +1186,7 @@ int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags);
1128int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status); 1186int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status);
1129int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep); 1187int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep);
1130int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep); 1188int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev, struct usb_host_endpoint *ep);
1189void xhci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep);
1131int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev); 1190int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
1132void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev); 1191void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev);
1133 1192
@@ -1148,10 +1207,23 @@ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb,
1148 int slot_id, unsigned int ep_index); 1207 int slot_id, unsigned int ep_index);
1149int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr, 1208int xhci_queue_configure_endpoint(struct xhci_hcd *xhci, dma_addr_t in_ctx_ptr,
1150 u32 slot_id); 1209 u32 slot_id);
1210int xhci_queue_reset_ep(struct xhci_hcd *xhci, int slot_id,
1211 unsigned int ep_index);
1212void xhci_find_new_dequeue_state(struct xhci_hcd *xhci,
1213 unsigned int slot_id, unsigned int ep_index,
1214 struct xhci_td *cur_td, struct xhci_dequeue_state *state);
1215void xhci_queue_new_dequeue_state(struct xhci_hcd *xhci,
1216 struct xhci_ring *ep_ring, unsigned int slot_id,
1217 unsigned int ep_index, struct xhci_dequeue_state *deq_state);
1151 1218
1152/* xHCI roothub code */ 1219/* xHCI roothub code */
1153int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, 1220int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex,
1154 char *buf, u16 wLength); 1221 char *buf, u16 wLength);
1155int xhci_hub_status_data(struct usb_hcd *hcd, char *buf); 1222int xhci_hub_status_data(struct usb_hcd *hcd, char *buf);
1156 1223
1224/* xHCI contexts */
1225struct xhci_input_control_ctx *xhci_get_input_control_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx);
1226struct xhci_slot_ctx *xhci_get_slot_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx);
1227struct xhci_ep_ctx *xhci_get_ep_ctx(struct xhci_hcd *xhci, struct xhci_container_ctx *ctx, unsigned int ep_index);
1228
1157#endif /* __LINUX_XHCI_HCD_H */ 1229#endif /* __LINUX_XHCI_HCD_H */
diff --git a/drivers/usb/misc/Kconfig b/drivers/usb/misc/Kconfig
index a68d91a11bee..abe3aa67ed00 100644
--- a/drivers/usb/misc/Kconfig
+++ b/drivers/usb/misc/Kconfig
@@ -220,7 +220,7 @@ config USB_IOWARRIOR
220 220
221config USB_TEST 221config USB_TEST
222 tristate "USB testing driver" 222 tristate "USB testing driver"
223 depends on USB && USB_DEVICEFS 223 depends on USB
224 help 224 help
225 This driver is for testing host controller software. It is used 225 This driver is for testing host controller software. It is used
226 with specialized device firmware for regression and stress testing, 226 with specialized device firmware for regression and stress testing,
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 70073b157f0a..803adcb5ac1d 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -12,6 +12,7 @@ config USB_MUSB_HDRC
12 depends on !SUPERH 12 depends on !SUPERH
13 select NOP_USB_XCEIV if ARCH_DAVINCI 13 select NOP_USB_XCEIV if ARCH_DAVINCI
14 select TWL4030_USB if MACH_OMAP_3430SDP 14 select TWL4030_USB if MACH_OMAP_3430SDP
15 select NOP_USB_XCEIV if MACH_OMAP3EVM
15 select USB_OTG_UTILS 16 select USB_OTG_UTILS
16 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)' 17 tristate 'Inventra Highspeed Dual Role Controller (TI, ADI, ...)'
17 help 18 help
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index 554a414f65d1..c7c1ca0494cd 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1326,7 +1326,6 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb)
1326 int i; 1326 int i;
1327 1327
1328 /* log core options (read using indexed model) */ 1328 /* log core options (read using indexed model) */
1329 musb_ep_select(mbase, 0);
1330 reg = musb_read_configdata(mbase); 1329 reg = musb_read_configdata(mbase);
1331 1330
1332 strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8"); 1331 strcpy(aInfo, (reg & MUSB_CONFIGDATA_UTMIDW) ? "UTMI-16" : "UTMI-8");
@@ -1990,7 +1989,7 @@ bad_config:
1990 if (status < 0) 1989 if (status < 0)
1991 goto fail2; 1990 goto fail2;
1992 1991
1993#ifdef CONFIG_USB_OTG 1992#ifdef CONFIG_USB_MUSB_OTG
1994 setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb); 1993 setup_timer(&musb->otg_timer, musb_otg_timer_func, (unsigned long) musb);
1995#endif 1994#endif
1996 1995
diff --git a/drivers/usb/musb/musb_gadget_ep0.c b/drivers/usb/musb/musb_gadget_ep0.c
index 40ed50ecedff..7a6778675ad3 100644
--- a/drivers/usb/musb/musb_gadget_ep0.c
+++ b/drivers/usb/musb/musb_gadget_ep0.c
@@ -407,7 +407,7 @@ stall:
407 csr |= MUSB_RXCSR_P_SENDSTALL 407 csr |= MUSB_RXCSR_P_SENDSTALL
408 | MUSB_RXCSR_FLUSHFIFO 408 | MUSB_RXCSR_FLUSHFIFO
409 | MUSB_RXCSR_CLRDATATOG 409 | MUSB_RXCSR_CLRDATATOG
410 | MUSB_TXCSR_P_WZC_BITS; 410 | MUSB_RXCSR_P_WZC_BITS;
411 musb_writew(regs, MUSB_RXCSR, 411 musb_writew(regs, MUSB_RXCSR,
412 csr); 412 csr);
413 } 413 }
diff --git a/drivers/usb/musb/musb_regs.h b/drivers/usb/musb/musb_regs.h
index de3b2f18db44..fbfd3fd9ce1f 100644
--- a/drivers/usb/musb/musb_regs.h
+++ b/drivers/usb/musb/musb_regs.h
@@ -323,6 +323,7 @@ static inline void musb_write_rxfifoadd(void __iomem *mbase, u16 c_off)
323 323
324static inline u8 musb_read_configdata(void __iomem *mbase) 324static inline u8 musb_read_configdata(void __iomem *mbase)
325{ 325{
326 musb_writeb(mbase, MUSB_INDEX, 0);
326 return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA); 327 return musb_readb(mbase, 0x10 + MUSB_CONFIGDATA);
327} 328}
328 329
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index e9a40b820fd4..985cbcf48bda 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -80,6 +80,7 @@ static struct usb_device_id id_table [] = {
80 { USB_DEVICE(0x10C4, 0x80F6) }, /* Suunto sports instrument */ 80 { USB_DEVICE(0x10C4, 0x80F6) }, /* Suunto sports instrument */
81 { USB_DEVICE(0x10C4, 0x8115) }, /* Arygon NFC/Mifare Reader */ 81 { USB_DEVICE(0x10C4, 0x8115) }, /* Arygon NFC/Mifare Reader */
82 { USB_DEVICE(0x10C4, 0x813D) }, /* Burnside Telecom Deskmobile */ 82 { USB_DEVICE(0x10C4, 0x813D) }, /* Burnside Telecom Deskmobile */
83 { USB_DEVICE(0x10C4, 0x813F) }, /* Tams Master Easy Control */
83 { USB_DEVICE(0x10C4, 0x814A) }, /* West Mountain Radio RIGblaster P&P */ 84 { USB_DEVICE(0x10C4, 0x814A) }, /* West Mountain Radio RIGblaster P&P */
84 { USB_DEVICE(0x10C4, 0x814B) }, /* West Mountain Radio RIGtalk */ 85 { USB_DEVICE(0x10C4, 0x814B) }, /* West Mountain Radio RIGtalk */
85 { USB_DEVICE(0x10C4, 0x815E) }, /* Helicomm IP-Link 1220-DVM */ 86 { USB_DEVICE(0x10C4, 0x815E) }, /* Helicomm IP-Link 1220-DVM */
@@ -96,7 +97,9 @@ static struct usb_device_id id_table [] = {
96 { USB_DEVICE(0x10c4, 0x8293) }, /* Telegesys ETRX2USB */ 97 { USB_DEVICE(0x10c4, 0x8293) }, /* Telegesys ETRX2USB */
97 { USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */ 98 { USB_DEVICE(0x10C4, 0x82F9) }, /* Procyon AVS */
98 { USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */ 99 { USB_DEVICE(0x10C4, 0x8341) }, /* Siemens MC35PU GPRS Modem */
100 { USB_DEVICE(0x10C4, 0x8382) }, /* Cygnal Integrated Products, Inc. */
99 { USB_DEVICE(0x10C4, 0x83A8) }, /* Amber Wireless AMB2560 */ 101 { USB_DEVICE(0x10C4, 0x83A8) }, /* Amber Wireless AMB2560 */
102 { USB_DEVICE(0x10C4, 0x8411) }, /* Kyocera GPS Module */
100 { USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */ 103 { USB_DEVICE(0x10C4, 0x846E) }, /* BEI USB Sensor Interface (VCP) */
101 { USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */ 104 { USB_DEVICE(0x10C4, 0xEA60) }, /* Silicon Labs factory default */
102 { USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */ 105 { USB_DEVICE(0x10C4, 0xEA61) }, /* Silicon Labs factory default */
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 60c64cc5be2a..8fec5d4455c9 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -698,6 +698,10 @@ static struct usb_device_id id_table_combined [] = {
698 { USB_DEVICE(MARVELL_VID, MARVELL_SHEEVAPLUG_PID), 698 { USB_DEVICE(MARVELL_VID, MARVELL_SHEEVAPLUG_PID),
699 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 699 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
700 { USB_DEVICE(LARSENBRUSGAARD_VID, LB_ALTITRACK_PID) }, 700 { USB_DEVICE(LARSENBRUSGAARD_VID, LB_ALTITRACK_PID) },
701 { USB_DEVICE(GN_OTOMETRICS_VID, AURICAL_USB_PID) },
702 { USB_DEVICE(BAYER_VID, BAYER_CONTOUR_CABLE_PID) },
703 { USB_DEVICE(FTDI_VID, MARVELL_OPENRD_PID),
704 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
701 { }, /* Optional parameter entry */ 705 { }, /* Optional parameter entry */
702 { } /* Terminating entry */ 706 { } /* Terminating entry */
703}; 707};
diff --git a/drivers/usb/serial/ftdi_sio.h b/drivers/usb/serial/ftdi_sio.h
index c9fbd7415092..8c92b88166ae 100644
--- a/drivers/usb/serial/ftdi_sio.h
+++ b/drivers/usb/serial/ftdi_sio.h
@@ -947,6 +947,27 @@
947#define FTDI_TURTELIZER_PID 0xBDC8 /* JTAG/RS-232 adapter by egnite GmBH */ 947#define FTDI_TURTELIZER_PID 0xBDC8 /* JTAG/RS-232 adapter by egnite GmBH */
948 948
949/* 949/*
950 * GN Otometrics (http://www.otometrics.com)
951 * Submitted by Ville Sundberg.
952 */
953#define GN_OTOMETRICS_VID 0x0c33 /* Vendor ID */
954#define AURICAL_USB_PID 0x0010 /* Aurical USB Audiometer */
955
956/*
957 * Bayer Ascensia Contour blood glucose meter USB-converter cable.
958 * http://winglucofacts.com/cables/
959 */
960#define BAYER_VID 0x1A79
961#define BAYER_CONTOUR_CABLE_PID 0x6001
962
963/*
964 * Marvell OpenRD Base, Client
965 * http://www.open-rd.org
966 * OpenRD Base, Client use VID 0x0403
967 */
968#define MARVELL_OPENRD_PID 0x9e90
969
970/*
950 * BmRequestType: 1100 0000b 971 * BmRequestType: 1100 0000b
951 * bRequest: FTDI_E2_READ 972 * bRequest: FTDI_E2_READ
952 * wValue: 0 973 * wValue: 0
diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c
index c31940a307f8..270009afdf77 100644
--- a/drivers/usb/serial/mos7840.c
+++ b/drivers/usb/serial/mos7840.c
@@ -124,10 +124,13 @@
124#define BANDB_DEVICE_ID_USOPTL4_4 0xAC44 124#define BANDB_DEVICE_ID_USOPTL4_4 0xAC44
125#define BANDB_DEVICE_ID_USOPTL4_2 0xAC42 125#define BANDB_DEVICE_ID_USOPTL4_2 0xAC42
126 126
127/* This driver also supports the ATEN UC2324 device since it is mos7840 based 127/* This driver also supports
128 * - if I knew the device id it would also support the ATEN UC2322 */ 128 * ATEN UC2324 device using Moschip MCS7840
129 * ATEN UC2322 device using Moschip MCS7820
130 */
129#define USB_VENDOR_ID_ATENINTL 0x0557 131#define USB_VENDOR_ID_ATENINTL 0x0557
130#define ATENINTL_DEVICE_ID_UC2324 0x2011 132#define ATENINTL_DEVICE_ID_UC2324 0x2011
133#define ATENINTL_DEVICE_ID_UC2322 0x7820
131 134
132/* Interrupt Routine Defines */ 135/* Interrupt Routine Defines */
133 136
@@ -177,6 +180,7 @@ static struct usb_device_id moschip_port_id_table[] = {
177 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)}, 180 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
178 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)}, 181 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)},
179 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)}, 182 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)},
183 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)},
180 {} /* terminating entry */ 184 {} /* terminating entry */
181}; 185};
182 186
@@ -186,6 +190,7 @@ static __devinitdata struct usb_device_id moschip_id_table_combined[] = {
186 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)}, 190 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_4)},
187 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)}, 191 {USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USOPTL4_2)},
188 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)}, 192 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2324)},
193 {USB_DEVICE(USB_VENDOR_ID_ATENINTL, ATENINTL_DEVICE_ID_UC2322)},
189 {} /* terminating entry */ 194 {} /* terminating entry */
190}; 195};
191 196
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 98262dd552bb..c784ddbe7b61 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -66,8 +66,10 @@ static int option_tiocmget(struct tty_struct *tty, struct file *file);
66static int option_tiocmset(struct tty_struct *tty, struct file *file, 66static int option_tiocmset(struct tty_struct *tty, struct file *file,
67 unsigned int set, unsigned int clear); 67 unsigned int set, unsigned int clear);
68static int option_send_setup(struct usb_serial_port *port); 68static int option_send_setup(struct usb_serial_port *port);
69#ifdef CONFIG_PM
69static int option_suspend(struct usb_serial *serial, pm_message_t message); 70static int option_suspend(struct usb_serial *serial, pm_message_t message);
70static int option_resume(struct usb_serial *serial); 71static int option_resume(struct usb_serial *serial);
72#endif
71 73
72/* Vendor and product IDs */ 74/* Vendor and product IDs */
73#define OPTION_VENDOR_ID 0x0AF0 75#define OPTION_VENDOR_ID 0x0AF0
@@ -205,6 +207,7 @@ static int option_resume(struct usb_serial *serial);
205#define NOVATELWIRELESS_PRODUCT_MC727 0x4100 207#define NOVATELWIRELESS_PRODUCT_MC727 0x4100
206#define NOVATELWIRELESS_PRODUCT_MC950D 0x4400 208#define NOVATELWIRELESS_PRODUCT_MC950D 0x4400
207#define NOVATELWIRELESS_PRODUCT_U727 0x5010 209#define NOVATELWIRELESS_PRODUCT_U727 0x5010
210#define NOVATELWIRELESS_PRODUCT_MC727_NEW 0x5100
208#define NOVATELWIRELESS_PRODUCT_MC760 0x6000 211#define NOVATELWIRELESS_PRODUCT_MC760 0x6000
209#define NOVATELWIRELESS_PRODUCT_OVMC760 0x6002 212#define NOVATELWIRELESS_PRODUCT_OVMC760 0x6002
210 213
@@ -259,11 +262,6 @@ static int option_resume(struct usb_serial *serial);
259#define AXESSTEL_VENDOR_ID 0x1726 262#define AXESSTEL_VENDOR_ID 0x1726
260#define AXESSTEL_PRODUCT_MV110H 0x1000 263#define AXESSTEL_PRODUCT_MV110H 0x1000
261 264
262#define ONDA_VENDOR_ID 0x19d2
263#define ONDA_PRODUCT_MSA501HS 0x0001
264#define ONDA_PRODUCT_ET502HS 0x0002
265#define ONDA_PRODUCT_MT503HS 0x2000
266
267#define BANDRICH_VENDOR_ID 0x1A8D 265#define BANDRICH_VENDOR_ID 0x1A8D
268#define BANDRICH_PRODUCT_C100_1 0x1002 266#define BANDRICH_PRODUCT_C100_1 0x1002
269#define BANDRICH_PRODUCT_C100_2 0x1003 267#define BANDRICH_PRODUCT_C100_2 0x1003
@@ -301,6 +299,7 @@ static int option_resume(struct usb_serial *serial);
301#define ZTE_PRODUCT_MF628 0x0015 299#define ZTE_PRODUCT_MF628 0x0015
302#define ZTE_PRODUCT_MF626 0x0031 300#define ZTE_PRODUCT_MF626 0x0031
303#define ZTE_PRODUCT_CDMA_TECH 0xfffe 301#define ZTE_PRODUCT_CDMA_TECH 0xfffe
302#define ZTE_PRODUCT_AC8710 0xfff1
304 303
305#define BENQ_VENDOR_ID 0x04a5 304#define BENQ_VENDOR_ID 0x04a5
306#define BENQ_PRODUCT_H10 0x4068 305#define BENQ_PRODUCT_H10 0x4068
@@ -322,6 +321,11 @@ static int option_resume(struct usb_serial *serial);
322#define ALINK_VENDOR_ID 0x1e0e 321#define ALINK_VENDOR_ID 0x1e0e
323#define ALINK_PRODUCT_3GU 0x9200 322#define ALINK_PRODUCT_3GU 0x9200
324 323
324/* ALCATEL PRODUCTS */
325#define ALCATEL_VENDOR_ID 0x1bbb
326#define ALCATEL_PRODUCT_X060S 0x0000
327
328
325static struct usb_device_id option_ids[] = { 329static struct usb_device_id option_ids[] = {
326 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) }, 330 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
327 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) }, 331 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) },
@@ -438,6 +442,7 @@ static struct usb_device_id option_ids[] = {
438 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_EU870D) }, /* Novatel EU850D/EU860D/EU870D */ 442 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_EU870D) }, /* Novatel EU850D/EU860D/EU870D */
439 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC950D) }, /* Novatel MC930D/MC950D */ 443 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC950D) }, /* Novatel MC930D/MC950D */
440 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC727) }, /* Novatel MC727/U727/USB727 */ 444 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC727) }, /* Novatel MC727/U727/USB727 */
445 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC727_NEW) }, /* Novatel MC727/U727/USB727 refresh */
441 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_U727) }, /* Novatel MC727/U727/USB727 */ 446 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_U727) }, /* Novatel MC727/U727/USB727 */
442 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC760) }, /* Novatel MC760/U760/USB760 */ 447 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_MC760) }, /* Novatel MC760/U760/USB760 */
443 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_OVMC760) }, /* Novatel Ovation MC760 */ 448 { USB_DEVICE(NOVATELWIRELESS_VENDOR_ID, NOVATELWIRELESS_PRODUCT_OVMC760) }, /* Novatel Ovation MC760 */
@@ -474,42 +479,6 @@ static struct usb_device_id option_ids[] = {
474 { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_500A) }, 479 { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_500A) },
475 { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_620UW) }, 480 { USB_DEVICE(ANYDATA_VENDOR_ID, ANYDATA_PRODUCT_ADU_620UW) },
476 { USB_DEVICE(AXESSTEL_VENDOR_ID, AXESSTEL_PRODUCT_MV110H) }, 481 { USB_DEVICE(AXESSTEL_VENDOR_ID, AXESSTEL_PRODUCT_MV110H) },
477 { USB_DEVICE(ONDA_VENDOR_ID, ONDA_PRODUCT_MSA501HS) },
478 { USB_DEVICE(ONDA_VENDOR_ID, ONDA_PRODUCT_ET502HS) },
479 { USB_DEVICE(ONDA_VENDOR_ID, 0x0003) },
480 { USB_DEVICE(ONDA_VENDOR_ID, 0x0004) },
481 { USB_DEVICE(ONDA_VENDOR_ID, 0x0005) },
482 { USB_DEVICE(ONDA_VENDOR_ID, 0x0006) },
483 { USB_DEVICE(ONDA_VENDOR_ID, 0x0007) },
484 { USB_DEVICE(ONDA_VENDOR_ID, 0x0008) },
485 { USB_DEVICE(ONDA_VENDOR_ID, 0x0009) },
486 { USB_DEVICE(ONDA_VENDOR_ID, 0x000a) },
487 { USB_DEVICE(ONDA_VENDOR_ID, 0x000b) },
488 { USB_DEVICE(ONDA_VENDOR_ID, 0x000c) },
489 { USB_DEVICE(ONDA_VENDOR_ID, 0x000d) },
490 { USB_DEVICE(ONDA_VENDOR_ID, 0x000e) },
491 { USB_DEVICE(ONDA_VENDOR_ID, 0x000f) },
492 { USB_DEVICE(ONDA_VENDOR_ID, 0x0010) },
493 { USB_DEVICE(ONDA_VENDOR_ID, 0x0011) },
494 { USB_DEVICE(ONDA_VENDOR_ID, 0x0012) },
495 { USB_DEVICE(ONDA_VENDOR_ID, 0x0013) },
496 { USB_DEVICE(ONDA_VENDOR_ID, 0x0014) },
497 { USB_DEVICE(ONDA_VENDOR_ID, 0x0015) },
498 { USB_DEVICE(ONDA_VENDOR_ID, 0x0016) },
499 { USB_DEVICE(ONDA_VENDOR_ID, 0x0017) },
500 { USB_DEVICE(ONDA_VENDOR_ID, 0x0018) },
501 { USB_DEVICE(ONDA_VENDOR_ID, 0x0019) },
502 { USB_DEVICE(ONDA_VENDOR_ID, 0x0020) },
503 { USB_DEVICE(ONDA_VENDOR_ID, 0x0021) },
504 { USB_DEVICE(ONDA_VENDOR_ID, 0x0022) },
505 { USB_DEVICE(ONDA_VENDOR_ID, 0x0023) },
506 { USB_DEVICE(ONDA_VENDOR_ID, 0x0024) },
507 { USB_DEVICE(ONDA_VENDOR_ID, 0x0025) },
508 { USB_DEVICE(ONDA_VENDOR_ID, 0x0026) },
509 { USB_DEVICE(ONDA_VENDOR_ID, 0x0027) },
510 { USB_DEVICE(ONDA_VENDOR_ID, 0x0028) },
511 { USB_DEVICE(ONDA_VENDOR_ID, 0x0029) },
512 { USB_DEVICE(ONDA_VENDOR_ID, ONDA_PRODUCT_MT503HS) },
513 { USB_DEVICE(YISO_VENDOR_ID, YISO_PRODUCT_U893) }, 482 { USB_DEVICE(YISO_VENDOR_ID, YISO_PRODUCT_U893) },
514 { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_C100_1) }, 483 { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_C100_1) },
515 { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_C100_2) }, 484 { USB_DEVICE(BANDRICH_VENDOR_ID, BANDRICH_PRODUCT_C100_2) },
@@ -534,10 +503,75 @@ static struct usb_device_id option_ids[] = {
534 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */ 503 { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x6613)}, /* Onda H600/ZTE MF330 */
535 { USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */ 504 { USB_DEVICE(MAXON_VENDOR_ID, 0x6280) }, /* BP3-USB & BP3-EXT HSDPA */
536 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) }, 505 { USB_DEVICE(TELIT_VENDOR_ID, TELIT_PRODUCT_UC864E) },
537 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622) }, 506 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF622, 0xff, 0xff, 0xff) }, /* ZTE WCDMA products */
538 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF626) }, 507 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0002, 0xff, 0xff, 0xff) },
539 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_MF628) }, 508 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0003, 0xff, 0xff, 0xff) },
540 { USB_DEVICE(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH) }, 509 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0004, 0xff, 0xff, 0xff) },
510 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0005, 0xff, 0xff, 0xff) },
511 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0006, 0xff, 0xff, 0xff) },
512 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0007, 0xff, 0xff, 0xff) },
513 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0008, 0xff, 0xff, 0xff) },
514 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0009, 0xff, 0xff, 0xff) },
515 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x000a, 0xff, 0xff, 0xff) },
516 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x000b, 0xff, 0xff, 0xff) },
517 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x000c, 0xff, 0xff, 0xff) },
518 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x000d, 0xff, 0xff, 0xff) },
519 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x000e, 0xff, 0xff, 0xff) },
520 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x000f, 0xff, 0xff, 0xff) },
521 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0010, 0xff, 0xff, 0xff) },
522 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0011, 0xff, 0xff, 0xff) },
523 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0012, 0xff, 0xff, 0xff) },
524 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0013, 0xff, 0xff, 0xff) },
525 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF628, 0xff, 0xff, 0xff) },
526 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0016, 0xff, 0xff, 0xff) },
527 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0017, 0xff, 0xff, 0xff) },
528 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0018, 0xff, 0xff, 0xff) },
529 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0019, 0xff, 0xff, 0xff) },
530 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0020, 0xff, 0xff, 0xff) },
531 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0021, 0xff, 0xff, 0xff) },
532 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0022, 0xff, 0xff, 0xff) },
533 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0023, 0xff, 0xff, 0xff) },
534 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0024, 0xff, 0xff, 0xff) },
535 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0025, 0xff, 0xff, 0xff) },
536 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0026, 0xff, 0xff, 0xff) },
537 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0028, 0xff, 0xff, 0xff) },
538 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0029, 0xff, 0xff, 0xff) },
539 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0030, 0xff, 0xff, 0xff) },
540 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_MF626, 0xff, 0xff, 0xff) },
541 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0032, 0xff, 0xff, 0xff) },
542 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0033, 0xff, 0xff, 0xff) },
543 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0037, 0xff, 0xff, 0xff) },
544 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0039, 0xff, 0xff, 0xff) },
545 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0042, 0xff, 0xff, 0xff) },
546 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0043, 0xff, 0xff, 0xff) },
547 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0048, 0xff, 0xff, 0xff) },
548 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0049, 0xff, 0xff, 0xff) },
549 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0051, 0xff, 0xff, 0xff) },
550 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0052, 0xff, 0xff, 0xff) },
551 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0054, 0xff, 0xff, 0xff) },
552 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0055, 0xff, 0xff, 0xff) },
553 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0057, 0xff, 0xff, 0xff) },
554 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0058, 0xff, 0xff, 0xff) },
555 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0061, 0xff, 0xff, 0xff) },
556 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0062, 0xff, 0xff, 0xff) },
557 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0063, 0xff, 0xff, 0xff) },
558 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0064, 0xff, 0xff, 0xff) },
559 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0066, 0xff, 0xff, 0xff) },
560 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0069, 0xff, 0xff, 0xff) },
561 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0076, 0xff, 0xff, 0xff) },
562 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0078, 0xff, 0xff, 0xff) },
563 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0082, 0xff, 0xff, 0xff) },
564 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0086, 0xff, 0xff, 0xff) },
565 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff, 0xff, 0xff) },
566 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) },
567 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0014, 0xff, 0xff, 0xff) }, /* ZTE CDMA products */
568 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0027, 0xff, 0xff, 0xff) },
569 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0059, 0xff, 0xff, 0xff) },
570 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0060, 0xff, 0xff, 0xff) },
571 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0070, 0xff, 0xff, 0xff) },
572 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0073, 0xff, 0xff, 0xff) },
573 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH, 0xff, 0xff, 0xff) },
574 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710, 0xff, 0xff, 0xff) },
541 { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, 575 { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) },
542 { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, 576 { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) },
543 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) }, 577 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) },
@@ -547,6 +581,7 @@ static struct usb_device_id option_ids[] = {
547 { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */ 581 { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */
548 { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) }, 582 { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) },
549 { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, 583 { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) },
584 { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) },
550 { } /* Terminating entry */ 585 { } /* Terminating entry */
551}; 586};
552MODULE_DEVICE_TABLE(usb, option_ids); 587MODULE_DEVICE_TABLE(usb, option_ids);
@@ -555,8 +590,10 @@ static struct usb_driver option_driver = {
555 .name = "option", 590 .name = "option",
556 .probe = usb_serial_probe, 591 .probe = usb_serial_probe,
557 .disconnect = usb_serial_disconnect, 592 .disconnect = usb_serial_disconnect,
593#ifdef CONFIG_PM
558 .suspend = usb_serial_suspend, 594 .suspend = usb_serial_suspend,
559 .resume = usb_serial_resume, 595 .resume = usb_serial_resume,
596#endif
560 .id_table = option_ids, 597 .id_table = option_ids,
561 .no_dynamic_id = 1, 598 .no_dynamic_id = 1,
562}; 599};
@@ -588,8 +625,10 @@ static struct usb_serial_driver option_1port_device = {
588 .disconnect = option_disconnect, 625 .disconnect = option_disconnect,
589 .release = option_release, 626 .release = option_release,
590 .read_int_callback = option_instat_callback, 627 .read_int_callback = option_instat_callback,
628#ifdef CONFIG_PM
591 .suspend = option_suspend, 629 .suspend = option_suspend,
592 .resume = option_resume, 630 .resume = option_resume,
631#endif
593}; 632};
594 633
595static int debug; 634static int debug;
@@ -831,7 +870,6 @@ static void option_instat_callback(struct urb *urb)
831 int status = urb->status; 870 int status = urb->status;
832 struct usb_serial_port *port = urb->context; 871 struct usb_serial_port *port = urb->context;
833 struct option_port_private *portdata = usb_get_serial_port_data(port); 872 struct option_port_private *portdata = usb_get_serial_port_data(port);
834 struct usb_serial *serial = port->serial;
835 873
836 dbg("%s", __func__); 874 dbg("%s", __func__);
837 dbg("%s: urb %p port %p has data %p", __func__, urb, port, portdata); 875 dbg("%s: urb %p port %p has data %p", __func__, urb, port, portdata);
@@ -927,7 +965,6 @@ static int option_open(struct tty_struct *tty,
927 struct usb_serial_port *port, struct file *filp) 965 struct usb_serial_port *port, struct file *filp)
928{ 966{
929 struct option_port_private *portdata; 967 struct option_port_private *portdata;
930 struct usb_serial *serial = port->serial;
931 int i, err; 968 int i, err;
932 struct urb *urb; 969 struct urb *urb;
933 970
@@ -1187,6 +1224,7 @@ static void option_release(struct usb_serial *serial)
1187 } 1224 }
1188} 1225}
1189 1226
1227#ifdef CONFIG_PM
1190static int option_suspend(struct usb_serial *serial, pm_message_t message) 1228static int option_suspend(struct usb_serial *serial, pm_message_t message)
1191{ 1229{
1192 dbg("%s entered", __func__); 1230 dbg("%s entered", __func__);
@@ -1245,6 +1283,7 @@ static int option_resume(struct usb_serial *serial)
1245 } 1283 }
1246 return 0; 1284 return 0;
1247} 1285}
1286#endif
1248 1287
1249MODULE_AUTHOR(DRIVER_AUTHOR); 1288MODULE_AUTHOR(DRIVER_AUTHOR);
1250MODULE_DESCRIPTION(DRIVER_DESC); 1289MODULE_DESCRIPTION(DRIVER_DESC);
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 7d15bfa7c2db..3e86815b2705 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -95,6 +95,7 @@ static struct usb_device_id id_table [] = {
95 { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) }, 95 { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) },
96 { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) }, 96 { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) },
97 { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) }, 97 { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) },
98 { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) },
98 { } /* Terminating entry */ 99 { } /* Terminating entry */
99}; 100};
100 101
diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h
index 12aac7d2462d..ee9505e1dd92 100644
--- a/drivers/usb/serial/pl2303.h
+++ b/drivers/usb/serial/pl2303.h
@@ -126,3 +126,7 @@
126/* Cressi Edy (diving computer) PC interface */ 126/* Cressi Edy (diving computer) PC interface */
127#define CRESSI_VENDOR_ID 0x04b8 127#define CRESSI_VENDOR_ID 0x04b8
128#define CRESSI_EDY_PRODUCT_ID 0x0521 128#define CRESSI_EDY_PRODUCT_ID 0x0521
129
130/* Sony, USB data cable for CMD-Jxx mobile phones */
131#define SONY_VENDOR_ID 0x054c
132#define SONY_QN3USB_PRODUCT_ID 0x0437
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index bd7581b3a48a..99188c92068b 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -32,6 +32,7 @@
32#include <linux/mutex.h> 32#include <linux/mutex.h>
33#include <linux/list.h> 33#include <linux/list.h>
34#include <linux/uaccess.h> 34#include <linux/uaccess.h>
35#include <linux/serial.h>
35#include <linux/usb.h> 36#include <linux/usb.h>
36#include <linux/usb/serial.h> 37#include <linux/usb/serial.h>
37#include "pl2303.h" 38#include "pl2303.h"
@@ -184,6 +185,7 @@ static int serial_open (struct tty_struct *tty, struct file *filp)
184 struct usb_serial_port *port; 185 struct usb_serial_port *port;
185 unsigned int portNumber; 186 unsigned int portNumber;
186 int retval = 0; 187 int retval = 0;
188 int first = 0;
187 189
188 dbg("%s", __func__); 190 dbg("%s", __func__);
189 191
@@ -223,7 +225,7 @@ static int serial_open (struct tty_struct *tty, struct file *filp)
223 225
224 /* If the console is attached, the device is already open */ 226 /* If the console is attached, the device is already open */
225 if (port->port.count == 1 && !port->console) { 227 if (port->port.count == 1 && !port->console) {
226 228 first = 1;
227 /* lock this module before we call it 229 /* lock this module before we call it
228 * this may fail, which means we must bail out, 230 * this may fail, which means we must bail out,
229 * safe because we are called with BKL held */ 231 * safe because we are called with BKL held */
@@ -246,13 +248,21 @@ static int serial_open (struct tty_struct *tty, struct file *filp)
246 if (retval) 248 if (retval)
247 goto bailout_interface_put; 249 goto bailout_interface_put;
248 mutex_unlock(&serial->disc_mutex); 250 mutex_unlock(&serial->disc_mutex);
251 set_bit(ASYNCB_INITIALIZED, &port->port.flags);
249 } 252 }
250 mutex_unlock(&port->mutex); 253 mutex_unlock(&port->mutex);
251 /* Now do the correct tty layer semantics */ 254 /* Now do the correct tty layer semantics */
252 retval = tty_port_block_til_ready(&port->port, tty, filp); 255 retval = tty_port_block_til_ready(&port->port, tty, filp);
253 if (retval == 0) 256 if (retval == 0) {
257 if (!first)
258 usb_serial_put(serial);
254 return 0; 259 return 0;
255 260 }
261 mutex_lock(&port->mutex);
262 if (first == 0)
263 goto bailout_mutex_unlock;
264 /* Undo the initial port actions */
265 mutex_lock(&serial->disc_mutex);
256bailout_interface_put: 266bailout_interface_put:
257 usb_autopm_put_interface(serial->interface); 267 usb_autopm_put_interface(serial->interface);
258bailout_module_put: 268bailout_module_put:
@@ -340,6 +350,22 @@ static void serial_close(struct tty_struct *tty, struct file *filp)
340 350
341 dbg("%s - port %d", __func__, port->number); 351 dbg("%s - port %d", __func__, port->number);
342 352
353 /* FIXME:
354 This leaves a very narrow race. Really we should do the
355 serial_do_free() on tty->shutdown(), but tty->shutdown can
356 be called from IRQ context and serial_do_free can sleep.
357
358 The right fix is probably to make the tty free (which is rare)
359 and thus tty->shutdown() occur via a work queue and simplify all
360 the drivers that use it.
361 */
362 if (tty_hung_up_p(filp)) {
363 /* serial_hangup already called serial_down at this point.
364 Another user may have already reopened the port but
365 serial_do_free is refcounted */
366 serial_do_free(port);
367 return;
368 }
343 369
344 if (tty_port_close_start(&port->port, tty, filp) == 0) 370 if (tty_port_close_start(&port->port, tty, filp) == 0)
345 return; 371 return;
@@ -355,7 +381,8 @@ static void serial_hangup(struct tty_struct *tty)
355 struct usb_serial_port *port = tty->driver_data; 381 struct usb_serial_port *port = tty->driver_data;
356 serial_do_down(port); 382 serial_do_down(port);
357 tty_port_hangup(&port->port); 383 tty_port_hangup(&port->port);
358 serial_do_free(port); 384 /* We must not free port yet - the USB serial layer depends on it's
385 continued existence */
359} 386}
360 387
361static int serial_write(struct tty_struct *tty, const unsigned char *buf, 388static int serial_write(struct tty_struct *tty, const unsigned char *buf,
@@ -394,7 +421,6 @@ static int serial_chars_in_buffer(struct tty_struct *tty)
394 struct usb_serial_port *port = tty->driver_data; 421 struct usb_serial_port *port = tty->driver_data;
395 dbg("%s = port %d", __func__, port->number); 422 dbg("%s = port %d", __func__, port->number);
396 423
397 WARN_ON(!port->port.count);
398 /* if the device was unplugged then any remaining characters 424 /* if the device was unplugged then any remaining characters
399 fell out of the connector ;) */ 425 fell out of the connector ;) */
400 if (port->serial->disconnected) 426 if (port->serial->disconnected)
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
index fcb320217218..e20dc525d177 100644
--- a/drivers/usb/storage/transport.c
+++ b/drivers/usb/storage/transport.c
@@ -961,7 +961,7 @@ int usb_stor_Bulk_max_lun(struct us_data *us)
961 US_BULK_GET_MAX_LUN, 961 US_BULK_GET_MAX_LUN,
962 USB_DIR_IN | USB_TYPE_CLASS | 962 USB_DIR_IN | USB_TYPE_CLASS |
963 USB_RECIP_INTERFACE, 963 USB_RECIP_INTERFACE,
964 0, us->ifnum, us->iobuf, 1, HZ); 964 0, us->ifnum, us->iobuf, 1, 10*HZ);
965 965
966 US_DEBUGP("GetMaxLUN command result is %d, data is %d\n", 966 US_DEBUGP("GetMaxLUN command result is %d, data is %d\n",
967 result, us->iobuf[0]); 967 result, us->iobuf[0]);
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h
index 1b9c5dd0fb27..7477d411959f 100644
--- a/drivers/usb/storage/unusual_devs.h
+++ b/drivers/usb/storage/unusual_devs.h
@@ -838,6 +838,13 @@ UNUSUAL_DEV( 0x066f, 0x8000, 0x0001, 0x0001,
838 US_SC_DEVICE, US_PR_DEVICE, NULL, 838 US_SC_DEVICE, US_PR_DEVICE, NULL,
839 US_FL_FIX_CAPACITY ), 839 US_FL_FIX_CAPACITY ),
840 840
841/* Reported by Rogerio Brito <rbrito@ime.usp.br> */
842UNUSUAL_DEV( 0x067b, 0x2317, 0x0001, 0x001,
843 "Prolific Technology, Inc.",
844 "Mass Storage Device",
845 US_SC_DEVICE, US_PR_DEVICE, NULL,
846 US_FL_NOT_LOCKABLE ),
847
841/* Reported by Richard -=[]=- <micro_flyer@hotmail.com> */ 848/* Reported by Richard -=[]=- <micro_flyer@hotmail.com> */
842/* Change to bcdDeviceMin (0x0100 to 0x0001) reported by 849/* Change to bcdDeviceMin (0x0100 to 0x0001) reported by
843 * Thomas Bartosik <tbartdev@gmx-topmail.de> */ 850 * Thomas Bartosik <tbartdev@gmx-topmail.de> */
diff --git a/drivers/video/backlight/jornada720_bl.c b/drivers/video/backlight/jornada720_bl.c
index c3ebb6b41ce1..7aed2565c1bd 100644
--- a/drivers/video/backlight/jornada720_bl.c
+++ b/drivers/video/backlight/jornada720_bl.c
@@ -72,7 +72,7 @@ static int jornada_bl_update_status(struct backlight_device *bd)
72 if (jornada_ssp_byte(SETBRIGHTNESS) != TXDUMMY) { 72 if (jornada_ssp_byte(SETBRIGHTNESS) != TXDUMMY) {
73 printk(KERN_INFO "bl : failed to set brightness\n"); 73 printk(KERN_INFO "bl : failed to set brightness\n");
74 ret = -ETIMEDOUT; 74 ret = -ETIMEDOUT;
75 goto out 75 goto out;
76 } 76 }
77 77
78 /* at this point we expect that the mcu has accepted 78 /* at this point we expect that the mcu has accepted
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 471a9a60376a..3a44695b9c09 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -1082,7 +1082,6 @@ static void fbcon_init(struct vc_data *vc, int init)
1082 new_rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres); 1082 new_rows = FBCON_SWAP(ops->rotate, info->var.yres, info->var.xres);
1083 new_cols /= vc->vc_font.width; 1083 new_cols /= vc->vc_font.width;
1084 new_rows /= vc->vc_font.height; 1084 new_rows /= vc->vc_font.height;
1085 vc_resize(vc, new_cols, new_rows);
1086 1085
1087 /* 1086 /*
1088 * We must always set the mode. The mode of the previous console 1087 * We must always set the mode. The mode of the previous console
@@ -1111,10 +1110,11 @@ static void fbcon_init(struct vc_data *vc, int init)
1111 * vc_{cols,rows}, but we must not set those if we are only 1110 * vc_{cols,rows}, but we must not set those if we are only
1112 * resizing the console. 1111 * resizing the console.
1113 */ 1112 */
1114 if (!init) { 1113 if (init) {
1115 vc->vc_cols = new_cols; 1114 vc->vc_cols = new_cols;
1116 vc->vc_rows = new_rows; 1115 vc->vc_rows = new_rows;
1117 } 1116 } else
1117 vc_resize(vc, new_cols, new_rows);
1118 1118
1119 if (logo) 1119 if (logo)
1120 fbcon_prepare_logo(vc, info, cols, rows, new_cols, new_rows); 1120 fbcon_prepare_logo(vc, info, cols, rows, new_cols, new_rows);
diff --git a/drivers/video/console/fbcon_rotate.h b/drivers/video/console/fbcon_rotate.h
index 75be5ce53dc5..e233444cda66 100644
--- a/drivers/video/console/fbcon_rotate.h
+++ b/drivers/video/console/fbcon_rotate.h
@@ -45,7 +45,7 @@ static inline void rotate_ud(const char *in, char *out, u32 width, u32 height)
45 width = (width + 7) & ~7; 45 width = (width + 7) & ~7;
46 46
47 for (i = 0; i < height; i++) { 47 for (i = 0; i < height; i++) {
48 for (j = 0; j < width; j++) { 48 for (j = 0; j < width - shift; j++) {
49 if (pattern_test_bit(j, i, width, in)) 49 if (pattern_test_bit(j, i, width, in))
50 pattern_set_bit(width - (1 + j + shift), 50 pattern_set_bit(width - (1 + j + shift),
51 height - (1 + i), 51 height - (1 + i),
diff --git a/drivers/video/console/sticore.c b/drivers/video/console/sticore.c
index ef7870f5ea08..857b3668b3ba 100644
--- a/drivers/video/console/sticore.c
+++ b/drivers/video/console/sticore.c
@@ -957,9 +957,14 @@ static int __devinit sticore_pci_init(struct pci_dev *pd,
957#ifdef CONFIG_PCI 957#ifdef CONFIG_PCI
958 unsigned long fb_base, rom_base; 958 unsigned long fb_base, rom_base;
959 unsigned int fb_len, rom_len; 959 unsigned int fb_len, rom_len;
960 int err;
960 struct sti_struct *sti; 961 struct sti_struct *sti;
961 962
962 pci_enable_device(pd); 963 err = pci_enable_device(pd);
964 if (err < 0) {
965 dev_err(&pd->dev, "Cannot enable PCI device\n");
966 return err;
967 }
963 968
964 fb_base = pci_resource_start(pd, 0); 969 fb_base = pci_resource_start(pd, 0);
965 fb_len = pci_resource_len(pd, 0); 970 fb_len = pci_resource_len(pd, 0);
@@ -1048,7 +1053,7 @@ static void __devinit sti_init_roms(void)
1048 1053
1049 /* Register drivers for native & PCI cards */ 1054 /* Register drivers for native & PCI cards */
1050 register_parisc_driver(&pa_sti_driver); 1055 register_parisc_driver(&pa_sti_driver);
1051 pci_register_driver(&pci_sti_driver); 1056 WARN_ON(pci_register_driver(&pci_sti_driver));
1052 1057
1053 /* if we didn't find the given default sti, take the first one */ 1058 /* if we didn't find the given default sti, take the first one */
1054 if (!default_sti) 1059 if (!default_sti)
diff --git a/drivers/video/mx3fb.c b/drivers/video/mx3fb.c
index f8778cde2183..054ef29be479 100644
--- a/drivers/video/mx3fb.c
+++ b/drivers/video/mx3fb.c
@@ -669,7 +669,8 @@ static uint32_t bpp_to_pixfmt(int bpp)
669} 669}
670 670
671static int mx3fb_blank(int blank, struct fb_info *fbi); 671static int mx3fb_blank(int blank, struct fb_info *fbi);
672static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len); 672static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len,
673 bool lock);
673static int mx3fb_unmap_video_memory(struct fb_info *fbi); 674static int mx3fb_unmap_video_memory(struct fb_info *fbi);
674 675
675/** 676/**
@@ -711,12 +712,7 @@ static void mx3fb_dma_done(void *arg)
711 complete(&mx3_fbi->flip_cmpl); 712 complete(&mx3_fbi->flip_cmpl);
712} 713}
713 714
714/** 715static int __set_par(struct fb_info *fbi, bool lock)
715 * mx3fb_set_par() - set framebuffer parameters and change the operating mode.
716 * @fbi: framebuffer information pointer.
717 * @return: 0 on success or negative error code on failure.
718 */
719static int mx3fb_set_par(struct fb_info *fbi)
720{ 716{
721 u32 mem_len; 717 u32 mem_len;
722 struct ipu_di_signal_cfg sig_cfg; 718 struct ipu_di_signal_cfg sig_cfg;
@@ -727,10 +723,6 @@ static int mx3fb_set_par(struct fb_info *fbi)
727 struct idmac_video_param *video = &ichan->params.video; 723 struct idmac_video_param *video = &ichan->params.video;
728 struct scatterlist *sg = mx3_fbi->sg; 724 struct scatterlist *sg = mx3_fbi->sg;
729 725
730 dev_dbg(mx3fb->dev, "%s [%c]\n", __func__, list_empty(&ichan->queue) ? '-' : '+');
731
732 mutex_lock(&mx3_fbi->mutex);
733
734 /* Total cleanup */ 726 /* Total cleanup */
735 if (mx3_fbi->txd) 727 if (mx3_fbi->txd)
736 sdc_disable_channel(mx3_fbi); 728 sdc_disable_channel(mx3_fbi);
@@ -742,10 +734,8 @@ static int mx3fb_set_par(struct fb_info *fbi)
742 if (fbi->fix.smem_start) 734 if (fbi->fix.smem_start)
743 mx3fb_unmap_video_memory(fbi); 735 mx3fb_unmap_video_memory(fbi);
744 736
745 if (mx3fb_map_video_memory(fbi, mem_len) < 0) { 737 if (mx3fb_map_video_memory(fbi, mem_len, lock) < 0)
746 mutex_unlock(&mx3_fbi->mutex);
747 return -ENOMEM; 738 return -ENOMEM;
748 }
749 } 739 }
750 740
751 sg_init_table(&sg[0], 1); 741 sg_init_table(&sg[0], 1);
@@ -791,7 +781,6 @@ static int mx3fb_set_par(struct fb_info *fbi)
791 fbi->var.vsync_len, 781 fbi->var.vsync_len,
792 fbi->var.lower_margin + 782 fbi->var.lower_margin +
793 fbi->var.vsync_len, sig_cfg) != 0) { 783 fbi->var.vsync_len, sig_cfg) != 0) {
794 mutex_unlock(&mx3_fbi->mutex);
795 dev_err(fbi->device, 784 dev_err(fbi->device,
796 "mx3fb: Error initializing panel.\n"); 785 "mx3fb: Error initializing panel.\n");
797 return -EINVAL; 786 return -EINVAL;
@@ -810,9 +799,30 @@ static int mx3fb_set_par(struct fb_info *fbi)
810 if (mx3_fbi->blank == FB_BLANK_UNBLANK) 799 if (mx3_fbi->blank == FB_BLANK_UNBLANK)
811 sdc_enable_channel(mx3_fbi); 800 sdc_enable_channel(mx3_fbi);
812 801
802 return 0;
803}
804
805/**
806 * mx3fb_set_par() - set framebuffer parameters and change the operating mode.
807 * @fbi: framebuffer information pointer.
808 * @return: 0 on success or negative error code on failure.
809 */
810static int mx3fb_set_par(struct fb_info *fbi)
811{
812 struct mx3fb_info *mx3_fbi = fbi->par;
813 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
814 struct idmac_channel *ichan = mx3_fbi->idmac_channel;
815 int ret;
816
817 dev_dbg(mx3fb->dev, "%s [%c]\n", __func__, list_empty(&ichan->queue) ? '-' : '+');
818
819 mutex_lock(&mx3_fbi->mutex);
820
821 ret = __set_par(fbi, true);
822
813 mutex_unlock(&mx3_fbi->mutex); 823 mutex_unlock(&mx3_fbi->mutex);
814 824
815 return 0; 825 return ret;
816} 826}
817 827
818/** 828/**
@@ -966,21 +976,11 @@ static int mx3fb_setcolreg(unsigned int regno, unsigned int red,
966 return ret; 976 return ret;
967} 977}
968 978
969/** 979static void __blank(int blank, struct fb_info *fbi)
970 * mx3fb_blank() - blank the display.
971 */
972static int mx3fb_blank(int blank, struct fb_info *fbi)
973{ 980{
974 struct mx3fb_info *mx3_fbi = fbi->par; 981 struct mx3fb_info *mx3_fbi = fbi->par;
975 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb; 982 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
976 983
977 dev_dbg(fbi->device, "%s, blank = %d, base %p, len %u\n", __func__,
978 blank, fbi->screen_base, fbi->fix.smem_len);
979
980 if (mx3_fbi->blank == blank)
981 return 0;
982
983 mutex_lock(&mx3_fbi->mutex);
984 mx3_fbi->blank = blank; 984 mx3_fbi->blank = blank;
985 985
986 switch (blank) { 986 switch (blank) {
@@ -999,6 +999,23 @@ static int mx3fb_blank(int blank, struct fb_info *fbi)
999 sdc_set_brightness(mx3fb, mx3fb->backlight_level); 999 sdc_set_brightness(mx3fb, mx3fb->backlight_level);
1000 break; 1000 break;
1001 } 1001 }
1002}
1003
1004/**
1005 * mx3fb_blank() - blank the display.
1006 */
1007static int mx3fb_blank(int blank, struct fb_info *fbi)
1008{
1009 struct mx3fb_info *mx3_fbi = fbi->par;
1010
1011 dev_dbg(fbi->device, "%s, blank = %d, base %p, len %u\n", __func__,
1012 blank, fbi->screen_base, fbi->fix.smem_len);
1013
1014 if (mx3_fbi->blank == blank)
1015 return 0;
1016
1017 mutex_lock(&mx3_fbi->mutex);
1018 __blank(blank, fbi);
1002 mutex_unlock(&mx3_fbi->mutex); 1019 mutex_unlock(&mx3_fbi->mutex);
1003 1020
1004 return 0; 1021 return 0;
@@ -1198,6 +1215,7 @@ static int mx3fb_resume(struct platform_device *pdev)
1198 * mx3fb_map_video_memory() - allocates the DRAM memory for the frame buffer. 1215 * mx3fb_map_video_memory() - allocates the DRAM memory for the frame buffer.
1199 * @fbi: framebuffer information pointer 1216 * @fbi: framebuffer information pointer
1200 * @mem_len: length of mapped memory 1217 * @mem_len: length of mapped memory
1218 * @lock: do not lock during initialisation
1201 * @return: Error code indicating success or failure 1219 * @return: Error code indicating success or failure
1202 * 1220 *
1203 * This buffer is remapped into a non-cached, non-buffered, memory region to 1221 * This buffer is remapped into a non-cached, non-buffered, memory region to
@@ -1205,7 +1223,8 @@ static int mx3fb_resume(struct platform_device *pdev)
1205 * area is remapped, all virtual memory access to the video memory should occur 1223 * area is remapped, all virtual memory access to the video memory should occur
1206 * at the new region. 1224 * at the new region.
1207 */ 1225 */
1208static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len) 1226static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len,
1227 bool lock)
1209{ 1228{
1210 int retval = 0; 1229 int retval = 0;
1211 dma_addr_t addr; 1230 dma_addr_t addr;
@@ -1221,10 +1240,12 @@ static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len)
1221 goto err0; 1240 goto err0;
1222 } 1241 }
1223 1242
1224 mutex_lock(&fbi->mm_lock); 1243 if (lock)
1244 mutex_lock(&fbi->mm_lock);
1225 fbi->fix.smem_start = addr; 1245 fbi->fix.smem_start = addr;
1226 fbi->fix.smem_len = mem_len; 1246 fbi->fix.smem_len = mem_len;
1227 mutex_unlock(&fbi->mm_lock); 1247 if (lock)
1248 mutex_unlock(&fbi->mm_lock);
1228 1249
1229 dev_dbg(fbi->device, "allocated fb @ p=0x%08x, v=0x%p, size=%d.\n", 1250 dev_dbg(fbi->device, "allocated fb @ p=0x%08x, v=0x%p, size=%d.\n",
1230 (uint32_t) fbi->fix.smem_start, fbi->screen_base, fbi->fix.smem_len); 1251 (uint32_t) fbi->fix.smem_start, fbi->screen_base, fbi->fix.smem_len);
@@ -1365,6 +1386,11 @@ static int init_fb_chan(struct mx3fb_data *mx3fb, struct idmac_channel *ichan)
1365 init_completion(&mx3fbi->flip_cmpl); 1386 init_completion(&mx3fbi->flip_cmpl);
1366 disable_irq(ichan->eof_irq); 1387 disable_irq(ichan->eof_irq);
1367 dev_dbg(mx3fb->dev, "disabling irq %d\n", ichan->eof_irq); 1388 dev_dbg(mx3fb->dev, "disabling irq %d\n", ichan->eof_irq);
1389 ret = __set_par(fbi, false);
1390 if (ret < 0)
1391 goto esetpar;
1392
1393 __blank(FB_BLANK_UNBLANK, fbi);
1368 1394
1369 dev_info(dev, "registered, using mode %s\n", fb_mode); 1395 dev_info(dev, "registered, using mode %s\n", fb_mode);
1370 1396
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c
index bb63c07e13de..5a72083dc67c 100644
--- a/drivers/video/s3c-fb.c
+++ b/drivers/video/s3c-fb.c
@@ -964,7 +964,7 @@ static int __devexit s3c_fb_remove(struct platform_device *pdev)
964 struct s3c_fb *sfb = platform_get_drvdata(pdev); 964 struct s3c_fb *sfb = platform_get_drvdata(pdev);
965 int win; 965 int win;
966 966
967 for (win = 0; win <= S3C_FB_MAX_WIN; win++) 967 for (win = 0; win < S3C_FB_MAX_WIN; win++)
968 if (sfb->windows[win]) 968 if (sfb->windows[win])
969 s3c_fb_release_win(sfb, sfb->windows[win]); 969 s3c_fb_release_win(sfb, sfb->windows[win]);
970 970
@@ -988,7 +988,7 @@ static int s3c_fb_suspend(struct platform_device *pdev, pm_message_t state)
988 struct s3c_fb_win *win; 988 struct s3c_fb_win *win;
989 int win_no; 989 int win_no;
990 990
991 for (win_no = S3C_FB_MAX_WIN; win_no >= 0; win_no--) { 991 for (win_no = S3C_FB_MAX_WIN - 1; win_no >= 0; win_no--) {
992 win = sfb->windows[win_no]; 992 win = sfb->windows[win_no];
993 if (!win) 993 if (!win)
994 continue; 994 continue;
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index fcd53ceb88fa..c8960003f47d 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -2407,14 +2407,14 @@ int viafb_setmode(int vmode_index, int hor_res, int ver_res, int video_bpp,
2407 viafb_dvi_set_mode(viafb_get_mode_index 2407 viafb_dvi_set_mode(viafb_get_mode_index
2408 (viaparinfo->tmds_setting_info->h_active, 2408 (viaparinfo->tmds_setting_info->h_active,
2409 viaparinfo->tmds_setting_info-> 2409 viaparinfo->tmds_setting_info->
2410 v_active, 1), 2410 v_active),
2411 video_bpp1, viaparinfo-> 2411 video_bpp1, viaparinfo->
2412 tmds_setting_info->iga_path); 2412 tmds_setting_info->iga_path);
2413 } else { 2413 } else {
2414 viafb_dvi_set_mode(viafb_get_mode_index 2414 viafb_dvi_set_mode(viafb_get_mode_index
2415 (viaparinfo->tmds_setting_info->h_active, 2415 (viaparinfo->tmds_setting_info->h_active,
2416 viaparinfo-> 2416 viaparinfo->
2417 tmds_setting_info->v_active, 0), 2417 tmds_setting_info->v_active),
2418 video_bpp, viaparinfo-> 2418 video_bpp, viaparinfo->
2419 tmds_setting_info->iga_path); 2419 tmds_setting_info->iga_path);
2420 } 2420 }
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 6c7290a6a447..78c6b3387947 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -580,10 +580,7 @@ static void load_lcd_k400_patch_tbl(int set_hres, int set_vres,
580 int reg_num = 0; 580 int reg_num = 0;
581 struct io_reg *lcd_patch_reg = NULL; 581 struct io_reg *lcd_patch_reg = NULL;
582 582
583 if (viaparinfo->lvds_setting_info->iga_path == IGA2) 583 vmode_index = viafb_get_mode_index(set_hres, set_vres);
584 vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
585 else
586 vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
587 switch (panel_id) { 584 switch (panel_id) {
588 /* LCD 800x600 */ 585 /* LCD 800x600 */
589 case LCD_PANEL_ID1_800X600: 586 case LCD_PANEL_ID1_800X600:
@@ -761,10 +758,7 @@ static void load_lcd_p880_patch_tbl(int set_hres, int set_vres,
761 int reg_num = 0; 758 int reg_num = 0;
762 struct io_reg *lcd_patch_reg = NULL; 759 struct io_reg *lcd_patch_reg = NULL;
763 760
764 if (viaparinfo->lvds_setting_info->iga_path == IGA2) 761 vmode_index = viafb_get_mode_index(set_hres, set_vres);
765 vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
766 else
767 vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
768 762
769 switch (panel_id) { 763 switch (panel_id) {
770 case LCD_PANEL_ID5_1400X1050: 764 case LCD_PANEL_ID5_1400X1050:
@@ -832,10 +826,7 @@ static void load_lcd_patch_regs(int set_hres, int set_vres,
832{ 826{
833 int vmode_index; 827 int vmode_index;
834 828
835 if (viaparinfo->lvds_setting_info->iga_path == IGA2) 829 vmode_index = viafb_get_mode_index(set_hres, set_vres);
836 vmode_index = viafb_get_mode_index(set_hres, set_vres, 1);
837 else
838 vmode_index = viafb_get_mode_index(set_hres, set_vres, 0);
839 830
840 viafb_unlock_crt(); 831 viafb_unlock_crt();
841 832
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index a0fec298216e..72833f3334b5 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -32,7 +32,6 @@ static u32 pseudo_pal[17];
32/* video mode */ 32/* video mode */
33static char *viafb_mode = "640x480"; 33static char *viafb_mode = "640x480";
34static char *viafb_mode1 = "640x480"; 34static char *viafb_mode1 = "640x480";
35static int viafb_resMode = VIA_RES_640X480;
36 35
37/* Added for specifying active devices.*/ 36/* Added for specifying active devices.*/
38char *viafb_active_dev = ""; 37char *viafb_active_dev = "";
@@ -56,47 +55,47 @@ static void viafb_get_video_device(u32 *video_dev_info);
56 55
57/* Mode information */ 56/* Mode information */
58static const struct viafb_modeinfo viafb_modentry[] = { 57static const struct viafb_modeinfo viafb_modentry[] = {
59 {480, 640, VIA_RES_480X640, "480x640"}, 58 {480, 640, VIA_RES_480X640},
60 {640, 480, VIA_RES_640X480, "640x480"}, 59 {640, 480, VIA_RES_640X480},
61 {800, 480, VIA_RES_800X480, "800x480"}, 60 {800, 480, VIA_RES_800X480},
62 {800, 600, VIA_RES_800X600, "800x600"}, 61 {800, 600, VIA_RES_800X600},
63 {1024, 768, VIA_RES_1024X768, "1024x768"}, 62 {1024, 768, VIA_RES_1024X768},
64 {1152, 864, VIA_RES_1152X864, "1152x864"}, 63 {1152, 864, VIA_RES_1152X864},
65 {1280, 1024, VIA_RES_1280X1024, "1280x1024"}, 64 {1280, 1024, VIA_RES_1280X1024},
66 {1600, 1200, VIA_RES_1600X1200, "1600x1200"}, 65 {1600, 1200, VIA_RES_1600X1200},
67 {1440, 1050, VIA_RES_1440X1050, "1440x1050"}, 66 {1440, 1050, VIA_RES_1440X1050},
68 {1280, 768, VIA_RES_1280X768, "1280x768"}, 67 {1280, 768, VIA_RES_1280X768,},
69 {1280, 800, VIA_RES_1280X800, "1280x800"}, 68 {1280, 800, VIA_RES_1280X800},
70 {1280, 960, VIA_RES_1280X960, "1280x960"}, 69 {1280, 960, VIA_RES_1280X960},
71 {1920, 1440, VIA_RES_1920X1440, "1920x1440"}, 70 {1920, 1440, VIA_RES_1920X1440},
72 {848, 480, VIA_RES_848X480, "848x480"}, 71 {848, 480, VIA_RES_848X480},
73 {1400, 1050, VIA_RES_1400X1050, "1400x1050"}, 72 {1400, 1050, VIA_RES_1400X1050},
74 {720, 480, VIA_RES_720X480, "720x480"}, 73 {720, 480, VIA_RES_720X480},
75 {720, 576, VIA_RES_720X576, "720x576"}, 74 {720, 576, VIA_RES_720X576},
76 {1024, 512, VIA_RES_1024X512, "1024x512"}, 75 {1024, 512, VIA_RES_1024X512},
77 {1024, 576, VIA_RES_1024X576, "1024x576"}, 76 {1024, 576, VIA_RES_1024X576},
78 {1024, 600, VIA_RES_1024X600, "1024x600"}, 77 {1024, 600, VIA_RES_1024X600},
79 {1280, 720, VIA_RES_1280X720, "1280x720"}, 78 {1280, 720, VIA_RES_1280X720},
80 {1920, 1080, VIA_RES_1920X1080, "1920x1080"}, 79 {1920, 1080, VIA_RES_1920X1080},
81 {1366, 768, VIA_RES_1368X768, "1368x768"}, 80 {1366, 768, VIA_RES_1368X768},
82 {1680, 1050, VIA_RES_1680X1050, "1680x1050"}, 81 {1680, 1050, VIA_RES_1680X1050},
83 {960, 600, VIA_RES_960X600, "960x600"}, 82 {960, 600, VIA_RES_960X600},
84 {1000, 600, VIA_RES_1000X600, "1000x600"}, 83 {1000, 600, VIA_RES_1000X600},
85 {1024, 576, VIA_RES_1024X576, "1024x576"}, 84 {1024, 576, VIA_RES_1024X576},
86 {1024, 600, VIA_RES_1024X600, "1024x600"}, 85 {1024, 600, VIA_RES_1024X600},
87 {1088, 612, VIA_RES_1088X612, "1088x612"}, 86 {1088, 612, VIA_RES_1088X612},
88 {1152, 720, VIA_RES_1152X720, "1152x720"}, 87 {1152, 720, VIA_RES_1152X720},
89 {1200, 720, VIA_RES_1200X720, "1200x720"}, 88 {1200, 720, VIA_RES_1200X720},
90 {1280, 600, VIA_RES_1280X600, "1280x600"}, 89 {1280, 600, VIA_RES_1280X600},
91 {1360, 768, VIA_RES_1360X768, "1360x768"}, 90 {1360, 768, VIA_RES_1360X768},
92 {1440, 900, VIA_RES_1440X900, "1440x900"}, 91 {1440, 900, VIA_RES_1440X900},
93 {1600, 900, VIA_RES_1600X900, "1600x900"}, 92 {1600, 900, VIA_RES_1600X900},
94 {1600, 1024, VIA_RES_1600X1024, "1600x1024"}, 93 {1600, 1024, VIA_RES_1600X1024},
95 {1792, 1344, VIA_RES_1792X1344, "1792x1344"}, 94 {1792, 1344, VIA_RES_1792X1344},
96 {1856, 1392, VIA_RES_1856X1392, "1856x1392"}, 95 {1856, 1392, VIA_RES_1856X1392},
97 {1920, 1200, VIA_RES_1920X1200, "1920x1200"}, 96 {1920, 1200, VIA_RES_1920X1200},
98 {2048, 1536, VIA_RES_2048X1536, "2048x1536"}, 97 {2048, 1536, VIA_RES_2048X1536},
99 {0, 0, VIA_RES_INVALID, "640x480"} 98 {0, 0, VIA_RES_INVALID}
100}; 99};
101 100
102static struct fb_ops viafb_ops; 101static struct fb_ops viafb_ops;
@@ -177,7 +176,7 @@ static int viafb_check_var(struct fb_var_screeninfo *var,
177 if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE) 176 if (var->vmode & FB_VMODE_INTERLACED || var->vmode & FB_VMODE_DOUBLE)
178 return -EINVAL; 177 return -EINVAL;
179 178
180 vmode_index = viafb_get_mode_index(var->xres, var->yres, 0); 179 vmode_index = viafb_get_mode_index(var->xres, var->yres);
181 if (vmode_index == VIA_RES_INVALID) { 180 if (vmode_index == VIA_RES_INVALID) {
182 DEBUG_MSG(KERN_INFO 181 DEBUG_MSG(KERN_INFO
183 "viafb: Mode %dx%dx%d not supported!!\n", 182 "viafb: Mode %dx%dx%d not supported!!\n",
@@ -233,14 +232,14 @@ static int viafb_set_par(struct fb_info *info)
233 viafb_update_device_setting(info->var.xres, info->var.yres, 232 viafb_update_device_setting(info->var.xres, info->var.yres,
234 info->var.bits_per_pixel, viafb_refresh, 0); 233 info->var.bits_per_pixel, viafb_refresh, 0);
235 234
236 vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres, 0); 235 vmode_index = viafb_get_mode_index(info->var.xres, info->var.yres);
237 236
238 if (viafb_SAMM_ON == 1) { 237 if (viafb_SAMM_ON == 1) {
239 DEBUG_MSG(KERN_INFO 238 DEBUG_MSG(KERN_INFO
240 "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n", 239 "viafb_second_xres = %d, viafb_second_yres = %d, bpp = %d\n",
241 viafb_second_xres, viafb_second_yres, viafb_bpp1); 240 viafb_second_xres, viafb_second_yres, viafb_bpp1);
242 vmode_index1 = viafb_get_mode_index(viafb_second_xres, 241 vmode_index1 = viafb_get_mode_index(viafb_second_xres,
243 viafb_second_yres, 1); 242 viafb_second_yres);
244 DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n", 243 DEBUG_MSG(KERN_INFO "->viafb_SAMM_ON: index=%d\n",
245 vmode_index1); 244 vmode_index1);
246 245
@@ -1262,7 +1261,7 @@ static int viafb_sync(struct fb_info *info)
1262 return 0; 1261 return 0;
1263} 1262}
1264 1263
1265int viafb_get_mode_index(int hres, int vres, int flag) 1264int viafb_get_mode_index(int hres, int vres)
1266{ 1265{
1267 u32 i; 1266 u32 i;
1268 DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n"); 1267 DEBUG_MSG(KERN_INFO "viafb_get_mode_index!\n");
@@ -1272,13 +1271,7 @@ int viafb_get_mode_index(int hres, int vres, int flag)
1272 viafb_modentry[i].yres == vres) 1271 viafb_modentry[i].yres == vres)
1273 break; 1272 break;
1274 1273
1275 viafb_resMode = viafb_modentry[i].mode_index; 1274 return viafb_modentry[i].mode_index;
1276 if (flag)
1277 viafb_mode1 = viafb_modentry[i].mode_res;
1278 else
1279 viafb_mode = viafb_modentry[i].mode_res;
1280
1281 return viafb_resMode;
1282} 1275}
1283 1276
1284static void check_available_device_to_enable(int device_id) 1277static void check_available_device_to_enable(int device_id)
@@ -2199,7 +2192,7 @@ static int __devinit via_pci_probe(void)
2199 strict_strtoul(tmpc, 0, &default_xres); 2192 strict_strtoul(tmpc, 0, &default_xres);
2200 strict_strtoul(tmpm, 0, &default_yres); 2193 strict_strtoul(tmpm, 0, &default_yres);
2201 2194
2202 vmode_index = viafb_get_mode_index(default_xres, default_yres, 0); 2195 vmode_index = viafb_get_mode_index(default_xres, default_yres);
2203 DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index); 2196 DEBUG_MSG(KERN_INFO "0->index=%d\n", vmode_index);
2204 2197
2205 if (viafb_SAMM_ON == 1) { 2198 if (viafb_SAMM_ON == 1) {
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h
index a4158e872878..227b000feb38 100644
--- a/drivers/video/via/viafbdev.h
+++ b/drivers/video/via/viafbdev.h
@@ -81,7 +81,6 @@ struct viafb_modeinfo {
81 u32 xres; 81 u32 xres;
82 u32 yres; 82 u32 yres;
83 int mode_index; 83 int mode_index;
84 char *mode_res;
85}; 84};
86extern unsigned int viafb_second_virtual_yres; 85extern unsigned int viafb_second_virtual_yres;
87extern unsigned int viafb_second_virtual_xres; 86extern unsigned int viafb_second_virtual_xres;
@@ -102,7 +101,7 @@ extern int strict_strtoul(const char *cp, unsigned int base,
102void viafb_memory_pitch_patch(struct fb_info *info); 101void viafb_memory_pitch_patch(struct fb_info *info);
103void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh, 102void viafb_fill_var_timing_info(struct fb_var_screeninfo *var, int refresh,
104 int mode_index); 103 int mode_index);
105int viafb_get_mode_index(int hres, int vres, int flag); 104int viafb_get_mode_index(int hres, int vres);
106u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information 105u8 viafb_gpio_i2c_read_lvds(struct lvds_setting_information
107 *plvds_setting_info, struct lvds_chip_information 106 *plvds_setting_info, struct lvds_chip_information
108 *plvds_chip_info, u8 index); 107 *plvds_chip_info, u8 index);
diff --git a/drivers/virtio/virtio_pci.c b/drivers/virtio/virtio_pci.c
index bcec78ffc765..248e00ec4dc1 100644
--- a/drivers/virtio/virtio_pci.c
+++ b/drivers/virtio/virtio_pci.c
@@ -52,8 +52,10 @@ struct virtio_pci_device
52 char (*msix_names)[256]; 52 char (*msix_names)[256];
53 /* Number of available vectors */ 53 /* Number of available vectors */
54 unsigned msix_vectors; 54 unsigned msix_vectors;
55 /* Vectors allocated */ 55 /* Vectors allocated, excluding per-vq vectors if any */
56 unsigned msix_used_vectors; 56 unsigned msix_used_vectors;
57 /* Whether we have vector per vq */
58 bool per_vq_vectors;
57}; 59};
58 60
59/* Constants for MSI-X */ 61/* Constants for MSI-X */
@@ -258,7 +260,6 @@ static void vp_free_vectors(struct virtio_device *vdev)
258 260
259 for (i = 0; i < vp_dev->msix_used_vectors; ++i) 261 for (i = 0; i < vp_dev->msix_used_vectors; ++i)
260 free_irq(vp_dev->msix_entries[i].vector, vp_dev); 262 free_irq(vp_dev->msix_entries[i].vector, vp_dev);
261 vp_dev->msix_used_vectors = 0;
262 263
263 if (vp_dev->msix_enabled) { 264 if (vp_dev->msix_enabled) {
264 /* Disable the vector used for configuration */ 265 /* Disable the vector used for configuration */
@@ -267,80 +268,77 @@ static void vp_free_vectors(struct virtio_device *vdev)
267 /* Flush the write out to device */ 268 /* Flush the write out to device */
268 ioread16(vp_dev->ioaddr + VIRTIO_MSI_CONFIG_VECTOR); 269 ioread16(vp_dev->ioaddr + VIRTIO_MSI_CONFIG_VECTOR);
269 270
270 vp_dev->msix_enabled = 0;
271 pci_disable_msix(vp_dev->pci_dev); 271 pci_disable_msix(vp_dev->pci_dev);
272 vp_dev->msix_enabled = 0;
273 vp_dev->msix_vectors = 0;
272 } 274 }
273}
274 275
275static int vp_enable_msix(struct pci_dev *dev, struct msix_entry *entries, 276 vp_dev->msix_used_vectors = 0;
276 int *options, int noptions) 277 kfree(vp_dev->msix_names);
277{ 278 vp_dev->msix_names = NULL;
278 int i; 279 kfree(vp_dev->msix_entries);
279 for (i = 0; i < noptions; ++i) 280 vp_dev->msix_entries = NULL;
280 if (!pci_enable_msix(dev, entries, options[i]))
281 return options[i];
282 return -EBUSY;
283} 281}
284 282
285static int vp_request_vectors(struct virtio_device *vdev, unsigned max_vqs) 283static int vp_request_vectors(struct virtio_device *vdev, int nvectors,
284 bool per_vq_vectors)
286{ 285{
287 struct virtio_pci_device *vp_dev = to_vp_device(vdev); 286 struct virtio_pci_device *vp_dev = to_vp_device(vdev);
288 const char *name = dev_name(&vp_dev->vdev.dev); 287 const char *name = dev_name(&vp_dev->vdev.dev);
289 unsigned i, v; 288 unsigned i, v;
290 int err = -ENOMEM; 289 int err = -ENOMEM;
291 /* We want at most one vector per queue and one for config changes. 290
292 * Fallback to separate vectors for config and a shared for queues. 291 if (!nvectors) {
293 * Finally fall back to regular interrupts. */ 292 /* Can't allocate MSI-X vectors, use regular interrupt */
294 int options[] = { max_vqs + 1, 2 }; 293 vp_dev->msix_vectors = 0;
295 int nvectors = max(options[0], options[1]); 294 err = request_irq(vp_dev->pci_dev->irq, vp_interrupt,
295 IRQF_SHARED, name, vp_dev);
296 if (err)
297 return err;
298 vp_dev->intx_enabled = 1;
299 return 0;
300 }
296 301
297 vp_dev->msix_entries = kmalloc(nvectors * sizeof *vp_dev->msix_entries, 302 vp_dev->msix_entries = kmalloc(nvectors * sizeof *vp_dev->msix_entries,
298 GFP_KERNEL); 303 GFP_KERNEL);
299 if (!vp_dev->msix_entries) 304 if (!vp_dev->msix_entries)
300 goto error_entries; 305 goto error;
301 vp_dev->msix_names = kmalloc(nvectors * sizeof *vp_dev->msix_names, 306 vp_dev->msix_names = kmalloc(nvectors * sizeof *vp_dev->msix_names,
302 GFP_KERNEL); 307 GFP_KERNEL);
303 if (!vp_dev->msix_names) 308 if (!vp_dev->msix_names)
304 goto error_names; 309 goto error;
305 310
306 for (i = 0; i < nvectors; ++i) 311 for (i = 0; i < nvectors; ++i)
307 vp_dev->msix_entries[i].entry = i; 312 vp_dev->msix_entries[i].entry = i;
308 313
309 err = vp_enable_msix(vp_dev->pci_dev, vp_dev->msix_entries, 314 err = pci_enable_msix(vp_dev->pci_dev, vp_dev->msix_entries, nvectors);
310 options, ARRAY_SIZE(options)); 315 if (err > 0)
311 if (err < 0) { 316 err = -ENOSPC;
312 /* Can't allocate enough MSI-X vectors, use regular interrupt */ 317 if (err)
313 vp_dev->msix_vectors = 0; 318 goto error;
314 err = request_irq(vp_dev->pci_dev->irq, vp_interrupt, 319 vp_dev->msix_vectors = nvectors;
315 IRQF_SHARED, name, vp_dev); 320 vp_dev->msix_enabled = 1;
316 if (err) 321
317 goto error_irq; 322 /* Set the vector used for configuration */
318 vp_dev->intx_enabled = 1; 323 v = vp_dev->msix_used_vectors;
319 } else { 324 snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names,
320 vp_dev->msix_vectors = err; 325 "%s-config", name);
321 vp_dev->msix_enabled = 1; 326 err = request_irq(vp_dev->msix_entries[v].vector,
322 327 vp_config_changed, 0, vp_dev->msix_names[v],
323 /* Set the vector used for configuration */ 328 vp_dev);
324 v = vp_dev->msix_used_vectors; 329 if (err)
325 snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names, 330 goto error;
326 "%s-config", name); 331 ++vp_dev->msix_used_vectors;
327 err = request_irq(vp_dev->msix_entries[v].vector, 332
328 vp_config_changed, 0, vp_dev->msix_names[v], 333 iowrite16(v, vp_dev->ioaddr + VIRTIO_MSI_CONFIG_VECTOR);
329 vp_dev); 334 /* Verify we had enough resources to assign the vector */
330 if (err) 335 v = ioread16(vp_dev->ioaddr + VIRTIO_MSI_CONFIG_VECTOR);
331 goto error_irq; 336 if (v == VIRTIO_MSI_NO_VECTOR) {
332 ++vp_dev->msix_used_vectors; 337 err = -EBUSY;
333 338 goto error;
334 iowrite16(v, vp_dev->ioaddr + VIRTIO_MSI_CONFIG_VECTOR);
335 /* Verify we had enough resources to assign the vector */
336 v = ioread16(vp_dev->ioaddr + VIRTIO_MSI_CONFIG_VECTOR);
337 if (v == VIRTIO_MSI_NO_VECTOR) {
338 err = -EBUSY;
339 goto error_irq;
340 }
341 } 339 }
342 340
343 if (vp_dev->msix_vectors && vp_dev->msix_vectors != max_vqs + 1) { 341 if (!per_vq_vectors) {
344 /* Shared vector for all VQs */ 342 /* Shared vector for all VQs */
345 v = vp_dev->msix_used_vectors; 343 v = vp_dev->msix_used_vectors;
346 snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names, 344 snprintf(vp_dev->msix_names[v], sizeof *vp_dev->msix_names,
@@ -349,28 +347,25 @@ static int vp_request_vectors(struct virtio_device *vdev, unsigned max_vqs)
349 vp_vring_interrupt, 0, vp_dev->msix_names[v], 347 vp_vring_interrupt, 0, vp_dev->msix_names[v],
350 vp_dev); 348 vp_dev);
351 if (err) 349 if (err)
352 goto error_irq; 350 goto error;
353 ++vp_dev->msix_used_vectors; 351 ++vp_dev->msix_used_vectors;
354 } 352 }
355 return 0; 353 return 0;
356error_irq: 354error:
357 vp_free_vectors(vdev); 355 vp_free_vectors(vdev);
358 kfree(vp_dev->msix_names);
359error_names:
360 kfree(vp_dev->msix_entries);
361error_entries:
362 return err; 356 return err;
363} 357}
364 358
365static struct virtqueue *vp_find_vq(struct virtio_device *vdev, unsigned index, 359static struct virtqueue *vp_find_vq(struct virtio_device *vdev, unsigned index,
366 void (*callback)(struct virtqueue *vq), 360 void (*callback)(struct virtqueue *vq),
367 const char *name) 361 const char *name,
362 u16 vector)
368{ 363{
369 struct virtio_pci_device *vp_dev = to_vp_device(vdev); 364 struct virtio_pci_device *vp_dev = to_vp_device(vdev);
370 struct virtio_pci_vq_info *info; 365 struct virtio_pci_vq_info *info;
371 struct virtqueue *vq; 366 struct virtqueue *vq;
372 unsigned long flags, size; 367 unsigned long flags, size;
373 u16 num, vector; 368 u16 num;
374 int err; 369 int err;
375 370
376 /* Select the queue we're interested in */ 371 /* Select the queue we're interested in */
@@ -389,7 +384,7 @@ static struct virtqueue *vp_find_vq(struct virtio_device *vdev, unsigned index,
389 384
390 info->queue_index = index; 385 info->queue_index = index;
391 info->num = num; 386 info->num = num;
392 info->vector = VIRTIO_MSI_NO_VECTOR; 387 info->vector = vector;
393 388
394 size = PAGE_ALIGN(vring_size(num, VIRTIO_PCI_VRING_ALIGN)); 389 size = PAGE_ALIGN(vring_size(num, VIRTIO_PCI_VRING_ALIGN));
395 info->queue = alloc_pages_exact(size, GFP_KERNEL|__GFP_ZERO); 390 info->queue = alloc_pages_exact(size, GFP_KERNEL|__GFP_ZERO);
@@ -413,22 +408,7 @@ static struct virtqueue *vp_find_vq(struct virtio_device *vdev, unsigned index,
413 vq->priv = info; 408 vq->priv = info;
414 info->vq = vq; 409 info->vq = vq;
415 410
416 /* allocate per-vq vector if available and necessary */ 411 if (vector != VIRTIO_MSI_NO_VECTOR) {
417 if (callback && vp_dev->msix_used_vectors < vp_dev->msix_vectors) {
418 vector = vp_dev->msix_used_vectors;
419 snprintf(vp_dev->msix_names[vector], sizeof *vp_dev->msix_names,
420 "%s-%s", dev_name(&vp_dev->vdev.dev), name);
421 err = request_irq(vp_dev->msix_entries[vector].vector,
422 vring_interrupt, 0,
423 vp_dev->msix_names[vector], vq);
424 if (err)
425 goto out_request_irq;
426 info->vector = vector;
427 ++vp_dev->msix_used_vectors;
428 } else
429 vector = VP_MSIX_VQ_VECTOR;
430
431 if (callback && vp_dev->msix_enabled) {
432 iowrite16(vector, vp_dev->ioaddr + VIRTIO_MSI_QUEUE_VECTOR); 412 iowrite16(vector, vp_dev->ioaddr + VIRTIO_MSI_QUEUE_VECTOR);
433 vector = ioread16(vp_dev->ioaddr + VIRTIO_MSI_QUEUE_VECTOR); 413 vector = ioread16(vp_dev->ioaddr + VIRTIO_MSI_QUEUE_VECTOR);
434 if (vector == VIRTIO_MSI_NO_VECTOR) { 414 if (vector == VIRTIO_MSI_NO_VECTOR) {
@@ -444,11 +424,6 @@ static struct virtqueue *vp_find_vq(struct virtio_device *vdev, unsigned index,
444 return vq; 424 return vq;
445 425
446out_assign: 426out_assign:
447 if (info->vector != VIRTIO_MSI_NO_VECTOR) {
448 free_irq(vp_dev->msix_entries[info->vector].vector, vq);
449 --vp_dev->msix_used_vectors;
450 }
451out_request_irq:
452 vring_del_virtqueue(vq); 427 vring_del_virtqueue(vq);
453out_activate_queue: 428out_activate_queue:
454 iowrite32(0, vp_dev->ioaddr + VIRTIO_PCI_QUEUE_PFN); 429 iowrite32(0, vp_dev->ioaddr + VIRTIO_PCI_QUEUE_PFN);
@@ -462,12 +437,13 @@ static void vp_del_vq(struct virtqueue *vq)
462{ 437{
463 struct virtio_pci_device *vp_dev = to_vp_device(vq->vdev); 438 struct virtio_pci_device *vp_dev = to_vp_device(vq->vdev);
464 struct virtio_pci_vq_info *info = vq->priv; 439 struct virtio_pci_vq_info *info = vq->priv;
465 unsigned long size; 440 unsigned long flags, size;
466 441
467 iowrite16(info->queue_index, vp_dev->ioaddr + VIRTIO_PCI_QUEUE_SEL); 442 spin_lock_irqsave(&vp_dev->lock, flags);
443 list_del(&info->node);
444 spin_unlock_irqrestore(&vp_dev->lock, flags);
468 445
469 if (info->vector != VIRTIO_MSI_NO_VECTOR) 446 iowrite16(info->queue_index, vp_dev->ioaddr + VIRTIO_PCI_QUEUE_SEL);
470 free_irq(vp_dev->msix_entries[info->vector].vector, vq);
471 447
472 if (vp_dev->msix_enabled) { 448 if (vp_dev->msix_enabled) {
473 iowrite16(VIRTIO_MSI_NO_VECTOR, 449 iowrite16(VIRTIO_MSI_NO_VECTOR,
@@ -489,36 +465,62 @@ static void vp_del_vq(struct virtqueue *vq)
489/* the config->del_vqs() implementation */ 465/* the config->del_vqs() implementation */
490static void vp_del_vqs(struct virtio_device *vdev) 466static void vp_del_vqs(struct virtio_device *vdev)
491{ 467{
468 struct virtio_pci_device *vp_dev = to_vp_device(vdev);
492 struct virtqueue *vq, *n; 469 struct virtqueue *vq, *n;
470 struct virtio_pci_vq_info *info;
493 471
494 list_for_each_entry_safe(vq, n, &vdev->vqs, list) 472 list_for_each_entry_safe(vq, n, &vdev->vqs, list) {
473 info = vq->priv;
474 if (vp_dev->per_vq_vectors)
475 free_irq(vp_dev->msix_entries[info->vector].vector, vq);
495 vp_del_vq(vq); 476 vp_del_vq(vq);
477 }
478 vp_dev->per_vq_vectors = false;
496 479
497 vp_free_vectors(vdev); 480 vp_free_vectors(vdev);
498} 481}
499 482
500/* the config->find_vqs() implementation */ 483static int vp_try_to_find_vqs(struct virtio_device *vdev, unsigned nvqs,
501static int vp_find_vqs(struct virtio_device *vdev, unsigned nvqs, 484 struct virtqueue *vqs[],
502 struct virtqueue *vqs[], 485 vq_callback_t *callbacks[],
503 vq_callback_t *callbacks[], 486 const char *names[],
504 const char *names[]) 487 int nvectors,
488 bool per_vq_vectors)
505{ 489{
506 int vectors = 0; 490 struct virtio_pci_device *vp_dev = to_vp_device(vdev);
507 int i, err; 491 u16 vector;
508 492 int i, err, allocated_vectors;
509 /* How many vectors would we like? */
510 for (i = 0; i < nvqs; ++i)
511 if (callbacks[i])
512 ++vectors;
513 493
514 err = vp_request_vectors(vdev, vectors); 494 err = vp_request_vectors(vdev, nvectors, per_vq_vectors);
515 if (err) 495 if (err)
516 goto error_request; 496 goto error_request;
517 497
498 vp_dev->per_vq_vectors = per_vq_vectors;
499 allocated_vectors = vp_dev->msix_used_vectors;
518 for (i = 0; i < nvqs; ++i) { 500 for (i = 0; i < nvqs; ++i) {
519 vqs[i] = vp_find_vq(vdev, i, callbacks[i], names[i]); 501 if (!callbacks[i] || !vp_dev->msix_enabled)
520 if (IS_ERR(vqs[i])) 502 vector = VIRTIO_MSI_NO_VECTOR;
503 else if (vp_dev->per_vq_vectors)
504 vector = allocated_vectors++;
505 else
506 vector = VP_MSIX_VQ_VECTOR;
507 vqs[i] = vp_find_vq(vdev, i, callbacks[i], names[i], vector);
508 if (IS_ERR(vqs[i])) {
509 err = PTR_ERR(vqs[i]);
521 goto error_find; 510 goto error_find;
511 }
512 /* allocate per-vq irq if available and necessary */
513 if (vp_dev->per_vq_vectors && vector != VIRTIO_MSI_NO_VECTOR) {
514 snprintf(vp_dev->msix_names[vector], sizeof *vp_dev->msix_names,
515 "%s-%s", dev_name(&vp_dev->vdev.dev), names[i]);
516 err = request_irq(vp_dev->msix_entries[vector].vector,
517 vring_interrupt, 0,
518 vp_dev->msix_names[vector], vqs[i]);
519 if (err) {
520 vp_del_vq(vqs[i]);
521 goto error_find;
522 }
523 }
522 } 524 }
523 return 0; 525 return 0;
524 526
@@ -526,7 +528,37 @@ error_find:
526 vp_del_vqs(vdev); 528 vp_del_vqs(vdev);
527 529
528error_request: 530error_request:
529 return PTR_ERR(vqs[i]); 531 return err;
532}
533
534/* the config->find_vqs() implementation */
535static int vp_find_vqs(struct virtio_device *vdev, unsigned nvqs,
536 struct virtqueue *vqs[],
537 vq_callback_t *callbacks[],
538 const char *names[])
539{
540 int vectors = 0;
541 int i, uninitialized_var(err);
542
543 /* How many vectors would we like? */
544 for (i = 0; i < nvqs; ++i)
545 if (callbacks[i])
546 ++vectors;
547
548 /* We want at most one vector per queue and one for config changes. */
549 err = vp_try_to_find_vqs(vdev, nvqs, vqs, callbacks, names,
550 vectors + 1, true);
551 if (!err)
552 return 0;
553 /* Fallback to separate vectors for config and a shared for queues. */
554 err = vp_try_to_find_vqs(vdev, nvqs, vqs, callbacks, names,
555 2, false);
556 if (!err)
557 return 0;
558 /* Finally fall back to regular interrupts. */
559 err = vp_try_to_find_vqs(vdev, nvqs, vqs, callbacks, names,
560 0, false);
561 return err;
530} 562}
531 563
532static struct virtio_config_ops virtio_pci_config_ops = { 564static struct virtio_config_ops virtio_pci_config_ops = {
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c
index a7e3b706b9d3..0d92969404c3 100644
--- a/drivers/w1/masters/omap_hdq.c
+++ b/drivers/w1/masters/omap_hdq.c
@@ -687,6 +687,7 @@ static int omap_hdq_remove(struct platform_device *pdev)
687 687
688 if (hdq_data->hdq_usecount) { 688 if (hdq_data->hdq_usecount) {
689 dev_dbg(&pdev->dev, "removed when use count is not zero\n"); 689 dev_dbg(&pdev->dev, "removed when use count is not zero\n");
690 mutex_unlock(&hdq_data->hdq_mutex);
690 return -EBUSY; 691 return -EBUSY;
691 } 692 }
692 693
diff --git a/drivers/watchdog/coh901327_wdt.c b/drivers/watchdog/coh901327_wdt.c
index fecb307d28e9..aec7cefdef21 100644
--- a/drivers/watchdog/coh901327_wdt.c
+++ b/drivers/watchdog/coh901327_wdt.c
@@ -18,6 +18,7 @@
18#include <linux/bitops.h> 18#include <linux/bitops.h>
19#include <linux/uaccess.h> 19#include <linux/uaccess.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/delay.h>
21 22
22#define DRV_NAME "WDOG COH 901 327" 23#define DRV_NAME "WDOG COH 901 327"
23 24
@@ -92,6 +93,8 @@ static struct clk *clk;
92static void coh901327_enable(u16 timeout) 93static void coh901327_enable(u16 timeout)
93{ 94{
94 u16 val; 95 u16 val;
96 unsigned long freq;
97 unsigned long delay_ns;
95 98
96 clk_enable(clk); 99 clk_enable(clk);
97 /* Restart timer if it is disabled */ 100 /* Restart timer if it is disabled */
@@ -102,6 +105,14 @@ static void coh901327_enable(u16 timeout)
102 /* Acknowledge any pending interrupt so it doesn't just fire off */ 105 /* Acknowledge any pending interrupt so it doesn't just fire off */
103 writew(U300_WDOG_IER_WILL_BARK_IRQ_ACK_ENABLE, 106 writew(U300_WDOG_IER_WILL_BARK_IRQ_ACK_ENABLE,
104 virtbase + U300_WDOG_IER); 107 virtbase + U300_WDOG_IER);
108 /*
109 * The interrupt is cleared in the 32 kHz clock domain.
110 * Wait 3 32 kHz cycles for it to take effect
111 */
112 freq = clk_get_rate(clk);
113 delay_ns = (1000000000 + freq - 1) / freq; /* Freq to ns and round up */
114 delay_ns = 3 * delay_ns; /* Wait 3 cycles */
115 ndelay(delay_ns);
105 /* Enable the watchdog interrupt */ 116 /* Enable the watchdog interrupt */
106 writew(U300_WDOG_IMR_WILL_BARK_IRQ_ENABLE, virtbase + U300_WDOG_IMR); 117 writew(U300_WDOG_IMR_WILL_BARK_IRQ_ENABLE, virtbase + U300_WDOG_IMR);
107 /* Activate the watchdog timer */ 118 /* Activate the watchdog timer */
diff --git a/drivers/watchdog/ks8695_wdt.c b/drivers/watchdog/ks8695_wdt.c
index 00b03eb43bf0..e1c82769b08e 100644
--- a/drivers/watchdog/ks8695_wdt.c
+++ b/drivers/watchdog/ks8695_wdt.c
@@ -66,7 +66,7 @@ static inline void ks8695_wdt_stop(void)
66static inline void ks8695_wdt_start(void) 66static inline void ks8695_wdt_start(void)
67{ 67{
68 unsigned long tmcon; 68 unsigned long tmcon;
69 unsigned long tval = wdt_time * CLOCK_TICK_RATE; 69 unsigned long tval = wdt_time * KS8695_CLOCK_RATE;
70 70
71 spin_lock(&ks8695_lock); 71 spin_lock(&ks8695_lock);
72 /* disable timer0 */ 72 /* disable timer0 */
@@ -103,7 +103,7 @@ static inline void ks8695_wdt_reload(void)
103static int ks8695_wdt_settimeout(int new_time) 103static int ks8695_wdt_settimeout(int new_time)
104{ 104{
105 /* 105 /*
106 * All counting occurs at SLOW_CLOCK / 128 = 0.256 Hz 106 * All counting occurs at KS8695_CLOCK_RATE / 128 = 0.256 Hz
107 * 107 *
108 * Since WDV is a 16-bit counter, the maximum period is 108 * Since WDV is a 16-bit counter, the maximum period is
109 * 65536 / 0.256 = 256 seconds. 109 * 65536 / 0.256 = 256 seconds.