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authorSergei Shtylyov <sshtylyov@ru.mvista.com>2010-12-28 14:54:54 -0500
committerJeff Garzik <jgarzik@redhat.com>2011-01-07 22:33:27 -0500
commitdfc7e3e37d4a22ed5fd3f6e8c9842cb1246fee4f (patch)
tree79afe7d5a7a3c99b68c894a3fadcea6f187e0869 /drivers
parent0ca646db68d1bd7184dfc41362d0dd9d56c0e57e (diff)
pata_hpt3x2n: calculate average f_CNT
Allow hpt3x2n_pci_clock() to calculate the average f_CNT register value iff HighPoint BIOS hasn't saved one, just like the 'pata_hpt37x' driver (reading the full 16-bit register, unlike what that driver does), so that this driver would work correctly on e.g. non-x86 machine with 66 MHz PCI. I'm not sure why Alan has only done this in one driver and not the other... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/ata/pata_hpt3x2n.c17
1 files changed, 14 insertions, 3 deletions
diff --git a/drivers/ata/pata_hpt3x2n.c b/drivers/ata/pata_hpt3x2n.c
index 87b735a45935..809a4b4e88ab 100644
--- a/drivers/ata/pata_hpt3x2n.c
+++ b/drivers/ata/pata_hpt3x2n.c
@@ -25,7 +25,7 @@
25#include <linux/libata.h> 25#include <linux/libata.h>
26 26
27#define DRV_NAME "pata_hpt3x2n" 27#define DRV_NAME "pata_hpt3x2n"
28#define DRV_VERSION "0.3.11" 28#define DRV_VERSION "0.3.12"
29 29
30enum { 30enum {
31 HPT_PCI_FAST = (1 << 31), 31 HPT_PCI_FAST = (1 << 31),
@@ -413,8 +413,19 @@ static int hpt3x2n_pci_clock(struct pci_dev *pdev)
413 413
414 fcnt = inl(iobase + 0x90); /* Not PCI readable for some chips */ 414 fcnt = inl(iobase + 0x90); /* Not PCI readable for some chips */
415 if ((fcnt >> 12) != 0xABCDE) { 415 if ((fcnt >> 12) != 0xABCDE) {
416 printk(KERN_WARNING "hpt3xn: BIOS clock data not set.\n"); 416 int i;
417 return 33; /* Not BIOS set */ 417 u16 sr;
418 u32 total = 0;
419
420 printk(KERN_WARNING "pata_hpt3x2n: BIOS clock data not set.\n");
421
422 /* This is the process the HPT371 BIOS is reported to use */
423 for (i = 0; i < 128; i++) {
424 pci_read_config_word(pdev, 0x78, &sr);
425 total += sr & 0x1FF;
426 udelay(15);
427 }
428 fcnt = total / 128;
418 } 429 }
419 fcnt &= 0x1FF; 430 fcnt &= 0x1FF;
420 431