diff options
author | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-06 11:10:55 -0500 |
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committer | Linus Torvalds <torvalds@woody.osdl.org> | 2006-12-06 11:10:55 -0500 |
commit | dd6a7c19e4630f635467246a81b8e0cc818c05e6 (patch) | |
tree | 8fc93cdef4070183cbd3fa06019c84728380b389 /drivers | |
parent | dd8856bda5f1308beb113281b248683992998a9e (diff) | |
parent | ea0f8feaa041f3ccec3d6b8ee51325b177daef06 (diff) |
Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (43 commits)
sh: sh775x/titan fixes for irq header changes.
sh: update r7780rp defconfig.
sh: compile fixes for header cleanup.
sh: Fixup pte_mkhuge() build failure.
sh: set KBUILD_IMAGE to something sensible.
sh: show held locks in stack trace with lockdep.
sh: platform_pata support for R7780RP
sh: stacktrace/lockdep/irqflags tracing support.
sh: Fixup movli.l/movco.l atomic ops for gcc4.
sh: dyntick infrastructure.
sh: Clock framework tidying.
sh: Turn off IRQs around get_timer_offset() calls.
sh: Get the PGD right in oops case with 64-bit PTEs.
sh: Fix store queue bitmap end.
sh: More flexible + SH7780 earlyprintk SCIF support.
sh: Fixup various PAGE_SIZE == 4096 assumptions.
sh: Fixup 4K irq stacks.
sh: dma-api channel capability extensions.
sh: Drop name overload in dma-sh.
sh: Make dma-isa depend on ISA_DMA_API.
...
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/sh-sci.c | 6 | ||||
-rw-r--r-- | drivers/serial/sh-sci.h | 37 |
2 files changed, 40 insertions, 3 deletions
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index cfcc3caf49d8..3b5f19ec2126 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -775,7 +775,7 @@ static int sci_notifier(struct notifier_block *self, | |||
775 | * | 775 | * |
776 | * Clean this up later.. | 776 | * Clean this up later.. |
777 | */ | 777 | */ |
778 | clk = clk_get("module_clk"); | 778 | clk = clk_get(NULL, "module_clk"); |
779 | port->uartclk = clk_get_rate(clk) * 16; | 779 | port->uartclk = clk_get_rate(clk) * 16; |
780 | clk_put(clk); | 780 | clk_put(clk); |
781 | } | 781 | } |
@@ -960,7 +960,7 @@ static void sci_set_termios(struct uart_port *port, struct termios *termios, | |||
960 | default: | 960 | default: |
961 | { | 961 | { |
962 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) | 962 | #if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64) |
963 | struct clk *clk = clk_get("module_clk"); | 963 | struct clk *clk = clk_get(NULL, "module_clk"); |
964 | t = SCBRR_VALUE(baud, clk_get_rate(clk)); | 964 | t = SCBRR_VALUE(baud, clk_get_rate(clk)); |
965 | clk_put(clk); | 965 | clk_put(clk); |
966 | #else | 966 | #else |
@@ -1128,7 +1128,7 @@ static void __init sci_init_ports(void) | |||
1128 | * XXX: We should use a proper SCI/SCIF clock | 1128 | * XXX: We should use a proper SCI/SCIF clock |
1129 | */ | 1129 | */ |
1130 | { | 1130 | { |
1131 | struct clk *clk = clk_get("module_clk"); | 1131 | struct clk *clk = clk_get(NULL, "module_clk"); |
1132 | sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; | 1132 | sci_ports[i].port.uartclk = clk_get_rate(clk) * 16; |
1133 | clk_put(clk); | 1133 | clk_put(clk); |
1134 | } | 1134 | } |
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h index 7ee992146ae9..e4557cc4f74b 100644 --- a/drivers/serial/sh-sci.h +++ b/drivers/serial/sh-sci.h | |||
@@ -133,6 +133,20 @@ | |||
133 | # define SCIF_ORER 0x0001 /* Overrun error bit */ | 133 | # define SCIF_ORER 0x0001 /* Overrun error bit */ |
134 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | 134 | # define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ |
135 | # define SCIF_ONLY | 135 | # define SCIF_ONLY |
136 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) | ||
137 | # define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ | ||
138 | # define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ | ||
139 | # define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ | ||
140 | # define SCSPTR3 0xfffe9820 /* 16 bit SCIF */ | ||
141 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
142 | # define SCIF_ONLY | ||
143 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | ||
144 | # define SCSPTR0 0xf8400020 /* 16 bit SCIF */ | ||
145 | # define SCSPTR1 0xf8410020 /* 16 bit SCIF */ | ||
146 | # define SCSPTR2 0xf8420020 /* 16 bit SCIF */ | ||
147 | # define SCIF_ORER 0x0001 /* overrun error bit */ | ||
148 | # define SCSCR_INIT(port) 0x38 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ | ||
149 | # define SCIF_ONLY | ||
136 | #else | 150 | #else |
137 | # error CPU subtype not defined | 151 | # error CPU subtype not defined |
138 | #endif | 152 | #endif |
@@ -365,6 +379,7 @@ SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8) | |||
365 | SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) | 379 | SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) |
366 | SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) | 380 | SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) |
367 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) | 381 | #if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780) |
382 | SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) | ||
368 | SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) | 383 | SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16) |
369 | SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) | 384 | SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16) |
370 | SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) | 385 | SCIF_FNS(SCSPTR, 0, 0, 0x24, 16) |
@@ -544,6 +559,28 @@ static inline int sci_rxd_in(struct uart_port *port) | |||
544 | if (port->mapbase == 0xffe10000) | 559 | if (port->mapbase == 0xffe10000) |
545 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | 560 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ |
546 | } | 561 | } |
562 | #elif defined(CONFIG_CPU_SUBTYPE_SH7206) | ||
563 | static inline int sci_rxd_in(struct uart_port *port) | ||
564 | { | ||
565 | if (port->mapbase == 0xfffe8000) | ||
566 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | ||
567 | if (port->mapbase == 0xfffe8800) | ||
568 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | ||
569 | if (port->mapbase == 0xfffe9000) | ||
570 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | ||
571 | if (port->mapbase == 0xfffe9800) | ||
572 | return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */ | ||
573 | } | ||
574 | #elif defined(CONFIG_CPU_SUBTYPE_SH7619) | ||
575 | static inline int sci_rxd_in(struct uart_port *port) | ||
576 | { | ||
577 | if (port->mapbase == 0xf8400000) | ||
578 | return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */ | ||
579 | if (port->mapbase == 0xf8410000) | ||
580 | return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */ | ||
581 | if (port->mapbase == 0xf8420000) | ||
582 | return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */ | ||
583 | } | ||
547 | #endif | 584 | #endif |
548 | 585 | ||
549 | /* | 586 | /* |