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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-12-09 01:10:22 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-12-09 01:10:22 -0500
commit8c82da5e2495589b7b70a43789e7cbd61a486ed0 (patch)
treefdde7380d2584d0297898373831f26cd5208cabd /drivers
parent51badebdcf394cc5fd574a524b55b3f6085e5e9c (diff)
parent6d5355998a757a16815d58da4a739b15a6efbfba (diff)
Merge commit 'gcl/next' into next
Diffstat (limited to 'drivers')
-rw-r--r--drivers/mmc/host/of_mmc_spi.c2
-rw-r--r--drivers/spi/Kconfig8
-rw-r--r--drivers/spi/Makefile1
-rw-r--r--drivers/spi/mpc52xx_psc_spi.c25
-rw-r--r--drivers/spi/mpc52xx_spi.c520
-rw-r--r--drivers/spi/xilinx_spi.c3
-rw-r--r--drivers/watchdog/Kconfig4
-rw-r--r--drivers/watchdog/Makefile1
-rw-r--r--drivers/watchdog/mpc5200_wdt.c293
9 files changed, 553 insertions, 304 deletions
diff --git a/drivers/mmc/host/of_mmc_spi.c b/drivers/mmc/host/of_mmc_spi.c
index 0c44d560bf1a..0c7a63c1f12f 100644
--- a/drivers/mmc/host/of_mmc_spi.c
+++ b/drivers/mmc/host/of_mmc_spi.c
@@ -22,6 +22,8 @@
22#include <linux/mmc/core.h> 22#include <linux/mmc/core.h>
23#include <linux/mmc/host.h> 23#include <linux/mmc/host.h>
24 24
25MODULE_LICENSE("GPL");
26
25enum { 27enum {
26 CD_GPIO = 0, 28 CD_GPIO = 0,
27 WP_GPIO, 29 WP_GPIO,
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 94058c62620a..28fce65b8594 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -133,6 +133,14 @@ config SPI_LM70_LLP
133 which interfaces to an LM70 temperature sensor using 133 which interfaces to an LM70 temperature sensor using
134 a parallel port. 134 a parallel port.
135 135
136config SPI_MPC52xx
137 tristate "Freescale MPC52xx SPI (non-PSC) controller support"
138 depends on PPC_MPC52xx && SPI
139 select SPI_MASTER_OF
140 help
141 This drivers supports the MPC52xx SPI controller in master SPI
142 mode.
143
136config SPI_MPC52xx_PSC 144config SPI_MPC52xx_PSC
137 tristate "Freescale MPC52xx PSC SPI controller" 145 tristate "Freescale MPC52xx PSC SPI controller"
138 depends on PPC_MPC52xx && EXPERIMENTAL 146 depends on PPC_MPC52xx && EXPERIMENTAL
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 21a118269cac..e3f092a9afa5 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_SPI_OMAP24XX) += omap2_mcspi.o
25obj-$(CONFIG_SPI_ORION) += orion_spi.o 25obj-$(CONFIG_SPI_ORION) += orion_spi.o
26obj-$(CONFIG_SPI_PL022) += amba-pl022.o 26obj-$(CONFIG_SPI_PL022) += amba-pl022.o
27obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o 27obj-$(CONFIG_SPI_MPC52xx_PSC) += mpc52xx_psc_spi.o
28obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o
28obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o 29obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o
29obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o 30obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o
30obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o 31obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o
diff --git a/drivers/spi/mpc52xx_psc_spi.c b/drivers/spi/mpc52xx_psc_spi.c
index 1b74d5ca03f3..f50c81df336a 100644
--- a/drivers/spi/mpc52xx_psc_spi.c
+++ b/drivers/spi/mpc52xx_psc_spi.c
@@ -17,6 +17,7 @@
17#include <linux/errno.h> 17#include <linux/errno.h>
18#include <linux/interrupt.h> 18#include <linux/interrupt.h>
19#include <linux/of_platform.h> 19#include <linux/of_platform.h>
20#include <linux/of_spi.h>
20#include <linux/workqueue.h> 21#include <linux/workqueue.h>
21#include <linux/completion.h> 22#include <linux/completion.h>
22#include <linux/io.h> 23#include <linux/io.h>
@@ -313,11 +314,13 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
313 struct mpc52xx_psc __iomem *psc = mps->psc; 314 struct mpc52xx_psc __iomem *psc = mps->psc;
314 struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo; 315 struct mpc52xx_psc_fifo __iomem *fifo = mps->fifo;
315 u32 mclken_div; 316 u32 mclken_div;
316 int ret = 0; 317 int ret;
317 318
318 /* default sysclk is 512MHz */ 319 /* default sysclk is 512MHz */
319 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK; 320 mclken_div = (mps->sysclk ? mps->sysclk : 512000000) / MCLK;
320 mpc52xx_set_psc_clkdiv(psc_id, mclken_div); 321 ret = mpc52xx_set_psc_clkdiv(psc_id, mclken_div);
322 if (ret)
323 return ret;
321 324
322 /* Reset the PSC into a known state */ 325 /* Reset the PSC into a known state */
323 out_8(&psc->command, MPC52xx_PSC_RST_RX); 326 out_8(&psc->command, MPC52xx_PSC_RST_RX);
@@ -341,7 +344,7 @@ static int mpc52xx_psc_spi_port_config(int psc_id, struct mpc52xx_psc_spi *mps)
341 344
342 mps->bits_per_word = 8; 345 mps->bits_per_word = 8;
343 346
344 return ret; 347 return 0;
345} 348}
346 349
347static irqreturn_t mpc52xx_psc_spi_isr(int irq, void *dev_id) 350static irqreturn_t mpc52xx_psc_spi_isr(int irq, void *dev_id)
@@ -410,8 +413,10 @@ static int __init mpc52xx_psc_spi_do_probe(struct device *dev, u32 regaddr,
410 goto free_master; 413 goto free_master;
411 414
412 ret = mpc52xx_psc_spi_port_config(master->bus_num, mps); 415 ret = mpc52xx_psc_spi_port_config(master->bus_num, mps);
413 if (ret < 0) 416 if (ret < 0) {
417 dev_err(dev, "can't configure PSC! Is it capable of SPI?\n");
414 goto free_irq; 418 goto free_irq;
419 }
415 420
416 spin_lock_init(&mps->lock); 421 spin_lock_init(&mps->lock);
417 init_completion(&mps->done); 422 init_completion(&mps->done);
@@ -464,10 +469,11 @@ static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
464 const u32 *regaddr_p; 469 const u32 *regaddr_p;
465 u64 regaddr64, size64; 470 u64 regaddr64, size64;
466 s16 id = -1; 471 s16 id = -1;
472 int rc;
467 473
468 regaddr_p = of_get_address(op->node, 0, &size64, NULL); 474 regaddr_p = of_get_address(op->node, 0, &size64, NULL);
469 if (!regaddr_p) { 475 if (!regaddr_p) {
470 printk(KERN_ERR "Invalid PSC address\n"); 476 dev_err(&op->dev, "Invalid PSC address\n");
471 return -EINVAL; 477 return -EINVAL;
472 } 478 }
473 regaddr64 = of_translate_address(op->node, regaddr_p); 479 regaddr64 = of_translate_address(op->node, regaddr_p);
@@ -478,15 +484,18 @@ static int __init mpc52xx_psc_spi_of_probe(struct of_device *op,
478 484
479 psc_nump = of_get_property(op->node, "cell-index", NULL); 485 psc_nump = of_get_property(op->node, "cell-index", NULL);
480 if (!psc_nump || *psc_nump > 5) { 486 if (!psc_nump || *psc_nump > 5) {
481 printk(KERN_ERR "mpc52xx_psc_spi: Device node %s has invalid " 487 dev_err(&op->dev, "Invalid cell-index property\n");
482 "cell-index property\n", op->node->full_name);
483 return -EINVAL; 488 return -EINVAL;
484 } 489 }
485 id = *psc_nump + 1; 490 id = *psc_nump + 1;
486 } 491 }
487 492
488 return mpc52xx_psc_spi_do_probe(&op->dev, (u32)regaddr64, (u32)size64, 493 rc = mpc52xx_psc_spi_do_probe(&op->dev, (u32)regaddr64, (u32)size64,
489 irq_of_parse_and_map(op->node, 0), id); 494 irq_of_parse_and_map(op->node, 0), id);
495 if (rc == 0)
496 of_register_spi_devices(dev_get_drvdata(&op->dev), op->node);
497
498 return rc;
490} 499}
491 500
492static int __exit mpc52xx_psc_spi_of_remove(struct of_device *op) 501static int __exit mpc52xx_psc_spi_of_remove(struct of_device *op)
diff --git a/drivers/spi/mpc52xx_spi.c b/drivers/spi/mpc52xx_spi.c
new file mode 100644
index 000000000000..ef8379b2c172
--- /dev/null
+++ b/drivers/spi/mpc52xx_spi.c
@@ -0,0 +1,520 @@
1/*
2 * MPC52xx SPI bus driver.
3 *
4 * Copyright (C) 2008 Secret Lab Technologies Ltd.
5 *
6 * This file is released under the GPLv2
7 *
8 * This is the driver for the MPC5200's dedicated SPI controller.
9 *
10 * Note: this driver does not support the MPC5200 PSC in SPI mode. For
11 * that driver see drivers/spi/mpc52xx_psc_spi.c
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/of_platform.h>
18#include <linux/interrupt.h>
19#include <linux/delay.h>
20#include <linux/spi/spi.h>
21#include <linux/spi/mpc52xx_spi.h>
22#include <linux/of_spi.h>
23#include <linux/io.h>
24#include <asm/time.h>
25#include <asm/mpc52xx.h>
26
27MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
28MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
29MODULE_LICENSE("GPL");
30
31/* Register offsets */
32#define SPI_CTRL1 0x00
33#define SPI_CTRL1_SPIE (1 << 7)
34#define SPI_CTRL1_SPE (1 << 6)
35#define SPI_CTRL1_MSTR (1 << 4)
36#define SPI_CTRL1_CPOL (1 << 3)
37#define SPI_CTRL1_CPHA (1 << 2)
38#define SPI_CTRL1_SSOE (1 << 1)
39#define SPI_CTRL1_LSBFE (1 << 0)
40
41#define SPI_CTRL2 0x01
42#define SPI_BRR 0x04
43
44#define SPI_STATUS 0x05
45#define SPI_STATUS_SPIF (1 << 7)
46#define SPI_STATUS_WCOL (1 << 6)
47#define SPI_STATUS_MODF (1 << 4)
48
49#define SPI_DATA 0x09
50#define SPI_PORTDATA 0x0d
51#define SPI_DATADIR 0x10
52
53/* FSM state return values */
54#define FSM_STOP 0 /* Nothing more for the state machine to */
55 /* do. If something interesting happens */
56 /* then and IRQ will be received */
57#define FSM_POLL 1 /* need to poll for completion, an IRQ is */
58 /* not expected */
59#define FSM_CONTINUE 2 /* Keep iterating the state machine */
60
61/* Driver internal data */
62struct mpc52xx_spi {
63 struct spi_master *master;
64 u32 sysclk;
65 void __iomem *regs;
66 int irq0; /* MODF irq */
67 int irq1; /* SPIF irq */
68 int ipb_freq;
69
70 /* Statistics */
71 int msg_count;
72 int wcol_count;
73 int wcol_ticks;
74 u32 wcol_tx_timestamp;
75 int modf_count;
76 int byte_count;
77
78 struct list_head queue; /* queue of pending messages */
79 spinlock_t lock;
80 struct work_struct work;
81
82
83 /* Details of current transfer (length, and buffer pointers) */
84 struct spi_message *message; /* current message */
85 struct spi_transfer *transfer; /* current transfer */
86 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
87 int len;
88 int timestamp;
89 u8 *rx_buf;
90 const u8 *tx_buf;
91 int cs_change;
92};
93
94/*
95 * CS control function
96 */
97static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
98{
99 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
100}
101
102/*
103 * Start a new transfer. This is called both by the idle state
104 * for the first transfer in a message, and by the wait state when the
105 * previous transfer in a message is complete.
106 */
107static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
108{
109 ms->rx_buf = ms->transfer->rx_buf;
110 ms->tx_buf = ms->transfer->tx_buf;
111 ms->len = ms->transfer->len;
112
113 /* Activate the chip select */
114 if (ms->cs_change)
115 mpc52xx_spi_chipsel(ms, 1);
116 ms->cs_change = ms->transfer->cs_change;
117
118 /* Write out the first byte */
119 ms->wcol_tx_timestamp = get_tbl();
120 if (ms->tx_buf)
121 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
122 else
123 out_8(ms->regs + SPI_DATA, 0);
124}
125
126/* Forward declaration of state handlers */
127static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
128 u8 status, u8 data);
129static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
130 u8 status, u8 data);
131
132/*
133 * IDLE state
134 *
135 * No transfers are in progress; if another transfer is pending then retrieve
136 * it and kick it off. Otherwise, stop processing the state machine
137 */
138static int
139mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
140{
141 struct spi_device *spi;
142 int spr, sppr;
143 u8 ctrl1;
144
145 if (status && (irq != NO_IRQ))
146 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
147 status);
148
149 /* Check if there is another transfer waiting. */
150 if (list_empty(&ms->queue))
151 return FSM_STOP;
152
153 /* get the head of the queue */
154 ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
155 list_del_init(&ms->message->queue);
156
157 /* Setup the controller parameters */
158 ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
159 spi = ms->message->spi;
160 if (spi->mode & SPI_CPHA)
161 ctrl1 |= SPI_CTRL1_CPHA;
162 if (spi->mode & SPI_CPOL)
163 ctrl1 |= SPI_CTRL1_CPOL;
164 if (spi->mode & SPI_LSB_FIRST)
165 ctrl1 |= SPI_CTRL1_LSBFE;
166 out_8(ms->regs + SPI_CTRL1, ctrl1);
167
168 /* Setup the controller speed */
169 /* minimum divider is '2'. Also, add '1' to force rounding the
170 * divider up. */
171 sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
172 spr = 0;
173 if (sppr < 1)
174 sppr = 1;
175 while (((sppr - 1) & ~0x7) != 0) {
176 sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
177 spr++;
178 }
179 sppr--; /* sppr quantity in register is offset by 1 */
180 if (spr > 7) {
181 /* Don't overrun limits of SPI baudrate register */
182 spr = 7;
183 sppr = 7;
184 }
185 out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
186
187 ms->cs_change = 1;
188 ms->transfer = container_of(ms->message->transfers.next,
189 struct spi_transfer, transfer_list);
190
191 mpc52xx_spi_start_transfer(ms);
192 ms->state = mpc52xx_spi_fsmstate_transfer;
193
194 return FSM_CONTINUE;
195}
196
197/*
198 * TRANSFER state
199 *
200 * In the middle of a transfer. If the SPI core has completed processing
201 * a byte, then read out the received data and write out the next byte
202 * (unless this transfer is finished; in which case go on to the wait
203 * state)
204 */
205static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
206 u8 status, u8 data)
207{
208 if (!status)
209 return ms->irq0 ? FSM_STOP : FSM_POLL;
210
211 if (status & SPI_STATUS_WCOL) {
212 /* The SPI controller is stoopid. At slower speeds, it may
213 * raise the SPIF flag before the state machine is actually
214 * finished, which causes a collision (internal to the state
215 * machine only). The manual recommends inserting a delay
216 * between receiving the interrupt and sending the next byte,
217 * but it can also be worked around simply by retrying the
218 * transfer which is what we do here. */
219 ms->wcol_count++;
220 ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
221 ms->wcol_tx_timestamp = get_tbl();
222 data = 0;
223 if (ms->tx_buf)
224 data = *(ms->tx_buf-1);
225 out_8(ms->regs + SPI_DATA, data); /* try again */
226 return FSM_CONTINUE;
227 } else if (status & SPI_STATUS_MODF) {
228 ms->modf_count++;
229 dev_err(&ms->master->dev, "mode fault\n");
230 mpc52xx_spi_chipsel(ms, 0);
231 ms->message->status = -EIO;
232 ms->message->complete(ms->message->context);
233 ms->state = mpc52xx_spi_fsmstate_idle;
234 return FSM_CONTINUE;
235 }
236
237 /* Read data out of the spi device */
238 ms->byte_count++;
239 if (ms->rx_buf)
240 *ms->rx_buf++ = data;
241
242 /* Is the transfer complete? */
243 ms->len--;
244 if (ms->len == 0) {
245 ms->timestamp = get_tbl();
246 ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
247 ms->state = mpc52xx_spi_fsmstate_wait;
248 return FSM_CONTINUE;
249 }
250
251 /* Write out the next byte */
252 ms->wcol_tx_timestamp = get_tbl();
253 if (ms->tx_buf)
254 out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
255 else
256 out_8(ms->regs + SPI_DATA, 0);
257
258 return FSM_CONTINUE;
259}
260
261/*
262 * WAIT state
263 *
264 * A transfer has completed; need to wait for the delay period to complete
265 * before starting the next transfer
266 */
267static int
268mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
269{
270 if (status && irq)
271 dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
272 status);
273
274 if (((int)get_tbl()) - ms->timestamp < 0)
275 return FSM_POLL;
276
277 ms->message->actual_length += ms->transfer->len;
278
279 /* Check if there is another transfer in this message. If there
280 * aren't then deactivate CS, notify sender, and drop back to idle
281 * to start the next message. */
282 if (ms->transfer->transfer_list.next == &ms->message->transfers) {
283 ms->msg_count++;
284 mpc52xx_spi_chipsel(ms, 0);
285 ms->message->status = 0;
286 ms->message->complete(ms->message->context);
287 ms->state = mpc52xx_spi_fsmstate_idle;
288 return FSM_CONTINUE;
289 }
290
291 /* There is another transfer; kick it off */
292
293 if (ms->cs_change)
294 mpc52xx_spi_chipsel(ms, 0);
295
296 ms->transfer = container_of(ms->transfer->transfer_list.next,
297 struct spi_transfer, transfer_list);
298 mpc52xx_spi_start_transfer(ms);
299 ms->state = mpc52xx_spi_fsmstate_transfer;
300 return FSM_CONTINUE;
301}
302
303/**
304 * mpc52xx_spi_fsm_process - Finite State Machine iteration function
305 * @irq: irq number that triggered the FSM or 0 for polling
306 * @ms: pointer to mpc52xx_spi driver data
307 */
308static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
309{
310 int rc = FSM_CONTINUE;
311 u8 status, data;
312
313 while (rc == FSM_CONTINUE) {
314 /* Interrupt cleared by read of STATUS followed by
315 * read of DATA registers */
316 status = in_8(ms->regs + SPI_STATUS);
317 data = in_8(ms->regs + SPI_DATA);
318 rc = ms->state(irq, ms, status, data);
319 }
320
321 if (rc == FSM_POLL)
322 schedule_work(&ms->work);
323}
324
325/**
326 * mpc52xx_spi_irq - IRQ handler
327 */
328static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
329{
330 struct mpc52xx_spi *ms = _ms;
331 spin_lock(&ms->lock);
332 mpc52xx_spi_fsm_process(irq, ms);
333 spin_unlock(&ms->lock);
334 return IRQ_HANDLED;
335}
336
337/**
338 * mpc52xx_spi_wq - Workqueue function for polling the state machine
339 */
340static void mpc52xx_spi_wq(struct work_struct *work)
341{
342 struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
343 unsigned long flags;
344
345 spin_lock_irqsave(&ms->lock, flags);
346 mpc52xx_spi_fsm_process(0, ms);
347 spin_unlock_irqrestore(&ms->lock, flags);
348}
349
350/*
351 * spi_master ops
352 */
353
354static int mpc52xx_spi_setup(struct spi_device *spi)
355{
356 if (spi->bits_per_word % 8)
357 return -EINVAL;
358
359 if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
360 return -EINVAL;
361
362 if (spi->chip_select >= spi->master->num_chipselect)
363 return -EINVAL;
364
365 return 0;
366}
367
368static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
369{
370 struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
371 unsigned long flags;
372
373 m->actual_length = 0;
374 m->status = -EINPROGRESS;
375
376 spin_lock_irqsave(&ms->lock, flags);
377 list_add_tail(&m->queue, &ms->queue);
378 spin_unlock_irqrestore(&ms->lock, flags);
379 schedule_work(&ms->work);
380
381 return 0;
382}
383
384/*
385 * OF Platform Bus Binding
386 */
387static int __devinit mpc52xx_spi_probe(struct of_device *op,
388 const struct of_device_id *match)
389{
390 struct spi_master *master;
391 struct mpc52xx_spi *ms;
392 void __iomem *regs;
393 int rc;
394
395 /* MMIO registers */
396 dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
397 regs = of_iomap(op->node, 0);
398 if (!regs)
399 return -ENODEV;
400
401 /* initialize the device */
402 out_8(regs+SPI_CTRL1, SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR);
403 out_8(regs + SPI_CTRL2, 0x0);
404 out_8(regs + SPI_DATADIR, 0xe); /* Set output pins */
405 out_8(regs + SPI_PORTDATA, 0x8); /* Deassert /SS signal */
406
407 /* Clear the status register and re-read it to check for a MODF
408 * failure. This driver cannot currently handle multiple masters
409 * on the SPI bus. This fault will also occur if the SPI signals
410 * are not connected to any pins (port_config setting) */
411 in_8(regs + SPI_STATUS);
412 in_8(regs + SPI_DATA);
413 if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
414 dev_err(&op->dev, "mode fault; is port_config correct?\n");
415 rc = -EIO;
416 goto err_init;
417 }
418
419 dev_dbg(&op->dev, "allocating spi_master struct\n");
420 master = spi_alloc_master(&op->dev, sizeof *ms);
421 if (!master) {
422 rc = -ENOMEM;
423 goto err_alloc;
424 }
425 master->bus_num = -1;
426 master->num_chipselect = 1;
427 master->setup = mpc52xx_spi_setup;
428 master->transfer = mpc52xx_spi_transfer;
429 dev_set_drvdata(&op->dev, master);
430
431 ms = spi_master_get_devdata(master);
432 ms->master = master;
433 ms->regs = regs;
434 ms->irq0 = irq_of_parse_and_map(op->node, 0);
435 ms->irq1 = irq_of_parse_and_map(op->node, 1);
436 ms->state = mpc52xx_spi_fsmstate_idle;
437 ms->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
438 spin_lock_init(&ms->lock);
439 INIT_LIST_HEAD(&ms->queue);
440 INIT_WORK(&ms->work, mpc52xx_spi_wq);
441
442 /* Decide if interrupts can be used */
443 if (ms->irq0 && ms->irq1) {
444 rc = request_irq(ms->irq0, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
445 "mpc5200-spi-modf", ms);
446 rc |= request_irq(ms->irq1, mpc52xx_spi_irq, IRQF_SAMPLE_RANDOM,
447 "mpc5200-spi-spiF", ms);
448 if (rc) {
449 free_irq(ms->irq0, ms);
450 free_irq(ms->irq1, ms);
451 ms->irq0 = ms->irq1 = 0;
452 }
453 } else {
454 /* operate in polled mode */
455 ms->irq0 = ms->irq1 = 0;
456 }
457
458 if (!ms->irq0)
459 dev_info(&op->dev, "using polled mode\n");
460
461 dev_dbg(&op->dev, "registering spi_master struct\n");
462 rc = spi_register_master(master);
463 if (rc)
464 goto err_register;
465
466 of_register_spi_devices(master, op->node);
467 dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
468
469 return rc;
470
471 err_register:
472 dev_err(&ms->master->dev, "initialization failed\n");
473 spi_master_put(master);
474 err_alloc:
475 err_init:
476 iounmap(regs);
477 return rc;
478}
479
480static int __devexit mpc52xx_spi_remove(struct of_device *op)
481{
482 struct spi_master *master = dev_get_drvdata(&op->dev);
483 struct mpc52xx_spi *ms = spi_master_get_devdata(master);
484
485 free_irq(ms->irq0, ms);
486 free_irq(ms->irq1, ms);
487
488 spi_unregister_master(master);
489 spi_master_put(master);
490 iounmap(ms->regs);
491
492 return 0;
493}
494
495static struct of_device_id mpc52xx_spi_match[] __devinitdata = {
496 { .compatible = "fsl,mpc5200-spi", },
497 {}
498};
499MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
500
501static struct of_platform_driver mpc52xx_spi_of_driver = {
502 .owner = THIS_MODULE,
503 .name = "mpc52xx-spi",
504 .match_table = mpc52xx_spi_match,
505 .probe = mpc52xx_spi_probe,
506 .remove = __exit_p(mpc52xx_spi_remove),
507};
508
509static int __init mpc52xx_spi_init(void)
510{
511 return of_register_platform_driver(&mpc52xx_spi_of_driver);
512}
513module_init(mpc52xx_spi_init);
514
515static void __exit mpc52xx_spi_exit(void)
516{
517 of_unregister_platform_driver(&mpc52xx_spi_of_driver);
518}
519module_exit(mpc52xx_spi_exit);
520
diff --git a/drivers/spi/xilinx_spi.c b/drivers/spi/xilinx_spi.c
index 46b8c5c2f45e..5a143b9f6361 100644
--- a/drivers/spi/xilinx_spi.c
+++ b/drivers/spi/xilinx_spi.c
@@ -148,7 +148,8 @@ static int xilinx_spi_setup_transfer(struct spi_device *spi,
148{ 148{
149 u8 bits_per_word; 149 u8 bits_per_word;
150 150
151 bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word; 151 bits_per_word = (t && t->bits_per_word)
152 ? t->bits_per_word : spi->bits_per_word;
152 if (bits_per_word != 8) { 153 if (bits_per_word != 8) {
153 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", 154 dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n",
154 __func__, bits_per_word); 155 __func__, bits_per_word);
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 3711b888d482..d958b76430a2 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -861,8 +861,10 @@ config GEF_WDT
861 Watchdog timer found in a number of GE Fanuc single board computers. 861 Watchdog timer found in a number of GE Fanuc single board computers.
862 862
863config MPC5200_WDT 863config MPC5200_WDT
864 tristate "MPC5200 Watchdog Timer" 864 bool "MPC52xx Watchdog Timer"
865 depends on PPC_MPC52xx 865 depends on PPC_MPC52xx
866 help
867 Use General Purpose Timer (GPT) 0 on the MPC5200 as Watchdog.
866 868
867config 8xxx_WDT 869config 8xxx_WDT
868 tristate "MPC8xxx Platform Watchdog Timer" 870 tristate "MPC8xxx Platform Watchdog Timer"
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index 699199b1baa6..89c045dc468e 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -118,7 +118,6 @@ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
118 118
119# POWERPC Architecture 119# POWERPC Architecture
120obj-$(CONFIG_GEF_WDT) += gef_wdt.o 120obj-$(CONFIG_GEF_WDT) += gef_wdt.o
121obj-$(CONFIG_MPC5200_WDT) += mpc5200_wdt.o
122obj-$(CONFIG_8xxx_WDT) += mpc8xxx_wdt.o 121obj-$(CONFIG_8xxx_WDT) += mpc8xxx_wdt.o
123obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o 122obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o
124obj-$(CONFIG_PIKA_WDT) += pika_wdt.o 123obj-$(CONFIG_PIKA_WDT) += pika_wdt.o
diff --git a/drivers/watchdog/mpc5200_wdt.c b/drivers/watchdog/mpc5200_wdt.c
deleted file mode 100644
index fa9c47ce0ae7..000000000000
--- a/drivers/watchdog/mpc5200_wdt.c
+++ /dev/null
@@ -1,293 +0,0 @@
1#include <linux/init.h>
2#include <linux/module.h>
3#include <linux/miscdevice.h>
4#include <linux/watchdog.h>
5#include <linux/io.h>
6#include <linux/spinlock.h>
7#include <linux/of_platform.h>
8#include <linux/uaccess.h>
9#include <asm/mpc52xx.h>
10
11
12#define GPT_MODE_WDT (1 << 15)
13#define GPT_MODE_CE (1 << 12)
14#define GPT_MODE_MS_TIMER (0x4)
15
16
17struct mpc5200_wdt {
18 unsigned count; /* timer ticks before watchdog kicks in */
19 long ipb_freq;
20 struct miscdevice miscdev;
21 struct resource mem;
22 struct mpc52xx_gpt __iomem *regs;
23 spinlock_t io_lock;
24};
25
26/* is_active stores wether or not the /dev/watchdog device is opened */
27static unsigned long is_active;
28
29/* misc devices don't provide a way, to get back to 'dev' or 'miscdev' from
30 * file operations, which sucks. But there can be max 1 watchdog anyway, so...
31 */
32static struct mpc5200_wdt *wdt_global;
33
34
35/* helper to calculate timeout in timer counts */
36static void mpc5200_wdt_set_timeout(struct mpc5200_wdt *wdt, int timeout)
37{
38 /* use biggest prescaler of 64k */
39 wdt->count = (wdt->ipb_freq + 0xffff) / 0x10000 * timeout;
40
41 if (wdt->count > 0xffff)
42 wdt->count = 0xffff;
43}
44/* return timeout in seconds (calculated from timer count) */
45static int mpc5200_wdt_get_timeout(struct mpc5200_wdt *wdt)
46{
47 return wdt->count * 0x10000 / wdt->ipb_freq;
48}
49
50
51/* watchdog operations */
52static int mpc5200_wdt_start(struct mpc5200_wdt *wdt)
53{
54 spin_lock(&wdt->io_lock);
55 /* disable */
56 out_be32(&wdt->regs->mode, 0);
57 /* set timeout, with maximum prescaler */
58 out_be32(&wdt->regs->count, 0x0 | wdt->count);
59 /* enable watchdog */
60 out_be32(&wdt->regs->mode, GPT_MODE_CE | GPT_MODE_WDT |
61 GPT_MODE_MS_TIMER);
62 spin_unlock(&wdt->io_lock);
63
64 return 0;
65}
66static int mpc5200_wdt_ping(struct mpc5200_wdt *wdt)
67{
68 spin_lock(&wdt->io_lock);
69 /* writing A5 to OCPW resets the watchdog */
70 out_be32(&wdt->regs->mode, 0xA5000000 |
71 (0xffffff & in_be32(&wdt->regs->mode)));
72 spin_unlock(&wdt->io_lock);
73 return 0;
74}
75static int mpc5200_wdt_stop(struct mpc5200_wdt *wdt)
76{
77 spin_lock(&wdt->io_lock);
78 /* disable */
79 out_be32(&wdt->regs->mode, 0);
80 spin_unlock(&wdt->io_lock);
81 return 0;
82}
83
84
85/* file operations */
86static ssize_t mpc5200_wdt_write(struct file *file, const char __user *data,
87 size_t len, loff_t *ppos)
88{
89 struct mpc5200_wdt *wdt = file->private_data;
90 mpc5200_wdt_ping(wdt);
91 return 0;
92}
93static struct watchdog_info mpc5200_wdt_info = {
94 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
95 .identity = "mpc5200 watchdog on GPT0",
96};
97static long mpc5200_wdt_ioctl(struct file *file, unsigned int cmd,
98 unsigned long arg)
99{
100 struct mpc5200_wdt *wdt = file->private_data;
101 int __user *data = (int __user *)arg;
102 int timeout;
103 int ret = 0;
104
105 switch (cmd) {
106 case WDIOC_GETSUPPORT:
107 ret = copy_to_user(data, &mpc5200_wdt_info,
108 sizeof(mpc5200_wdt_info));
109 if (ret)
110 ret = -EFAULT;
111 break;
112
113 case WDIOC_GETSTATUS:
114 case WDIOC_GETBOOTSTATUS:
115 ret = put_user(0, data);
116 break;
117
118 case WDIOC_KEEPALIVE:
119 mpc5200_wdt_ping(wdt);
120 break;
121
122 case WDIOC_SETTIMEOUT:
123 ret = get_user(timeout, data);
124 if (ret)
125 break;
126 mpc5200_wdt_set_timeout(wdt, timeout);
127 mpc5200_wdt_start(wdt);
128 /* fall through and return the timeout */
129
130 case WDIOC_GETTIMEOUT:
131 timeout = mpc5200_wdt_get_timeout(wdt);
132 ret = put_user(timeout, data);
133 break;
134
135 default:
136 ret = -ENOTTY;
137 }
138 return ret;
139}
140
141static int mpc5200_wdt_open(struct inode *inode, struct file *file)
142{
143 /* /dev/watchdog can only be opened once */
144 if (test_and_set_bit(0, &is_active))
145 return -EBUSY;
146
147 /* Set and activate the watchdog */
148 mpc5200_wdt_set_timeout(wdt_global, 30);
149 mpc5200_wdt_start(wdt_global);
150 file->private_data = wdt_global;
151 return nonseekable_open(inode, file);
152}
153static int mpc5200_wdt_release(struct inode *inode, struct file *file)
154{
155#if WATCHDOG_NOWAYOUT == 0
156 struct mpc5200_wdt *wdt = file->private_data;
157 mpc5200_wdt_stop(wdt);
158 wdt->count = 0; /* == disabled */
159#endif
160 clear_bit(0, &is_active);
161 return 0;
162}
163
164static const struct file_operations mpc5200_wdt_fops = {
165 .owner = THIS_MODULE,
166 .write = mpc5200_wdt_write,
167 .unlocked_ioctl = mpc5200_wdt_ioctl,
168 .open = mpc5200_wdt_open,
169 .release = mpc5200_wdt_release,
170};
171
172/* module operations */
173static int mpc5200_wdt_probe(struct of_device *op,
174 const struct of_device_id *match)
175{
176 struct mpc5200_wdt *wdt;
177 int err;
178 const void *has_wdt;
179 int size;
180
181 has_wdt = of_get_property(op->node, "has-wdt", NULL);
182 if (!has_wdt)
183 has_wdt = of_get_property(op->node, "fsl,has-wdt", NULL);
184 if (!has_wdt)
185 return -ENODEV;
186
187 wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
188 if (!wdt)
189 return -ENOMEM;
190
191 wdt->ipb_freq = mpc5xxx_get_bus_frequency(op->node);
192
193 err = of_address_to_resource(op->node, 0, &wdt->mem);
194 if (err)
195 goto out_free;
196 size = wdt->mem.end - wdt->mem.start + 1;
197 if (!request_mem_region(wdt->mem.start, size, "mpc5200_wdt")) {
198 err = -ENODEV;
199 goto out_free;
200 }
201 wdt->regs = ioremap(wdt->mem.start, size);
202 if (!wdt->regs) {
203 err = -ENODEV;
204 goto out_release;
205 }
206
207 dev_set_drvdata(&op->dev, wdt);
208 spin_lock_init(&wdt->io_lock);
209
210 wdt->miscdev = (struct miscdevice) {
211 .minor = WATCHDOG_MINOR,
212 .name = "watchdog",
213 .fops = &mpc5200_wdt_fops,
214 .parent = &op->dev,
215 };
216 wdt_global = wdt;
217 err = misc_register(&wdt->miscdev);
218 if (!err)
219 return 0;
220
221 iounmap(wdt->regs);
222out_release:
223 release_mem_region(wdt->mem.start, size);
224out_free:
225 kfree(wdt);
226 return err;
227}
228
229static int mpc5200_wdt_remove(struct of_device *op)
230{
231 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
232
233 mpc5200_wdt_stop(wdt);
234 misc_deregister(&wdt->miscdev);
235 iounmap(wdt->regs);
236 release_mem_region(wdt->mem.start, wdt->mem.end - wdt->mem.start + 1);
237 kfree(wdt);
238
239 return 0;
240}
241static int mpc5200_wdt_suspend(struct of_device *op, pm_message_t state)
242{
243 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
244 mpc5200_wdt_stop(wdt);
245 return 0;
246}
247static int mpc5200_wdt_resume(struct of_device *op)
248{
249 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
250 if (wdt->count)
251 mpc5200_wdt_start(wdt);
252 return 0;
253}
254static int mpc5200_wdt_shutdown(struct of_device *op)
255{
256 struct mpc5200_wdt *wdt = dev_get_drvdata(&op->dev);
257 mpc5200_wdt_stop(wdt);
258 return 0;
259}
260
261static struct of_device_id mpc5200_wdt_match[] = {
262 { .compatible = "mpc5200-gpt", },
263 { .compatible = "fsl,mpc5200-gpt", },
264 {},
265};
266static struct of_platform_driver mpc5200_wdt_driver = {
267 .owner = THIS_MODULE,
268 .name = "mpc5200-gpt-wdt",
269 .match_table = mpc5200_wdt_match,
270 .probe = mpc5200_wdt_probe,
271 .remove = mpc5200_wdt_remove,
272 .suspend = mpc5200_wdt_suspend,
273 .resume = mpc5200_wdt_resume,
274 .shutdown = mpc5200_wdt_shutdown,
275};
276
277
278static int __init mpc5200_wdt_init(void)
279{
280 return of_register_platform_driver(&mpc5200_wdt_driver);
281}
282
283static void __exit mpc5200_wdt_exit(void)
284{
285 of_unregister_platform_driver(&mpc5200_wdt_driver);
286}
287
288module_init(mpc5200_wdt_init);
289module_exit(mpc5200_wdt_exit);
290
291MODULE_AUTHOR("Domen Puncer <domen.puncer@telargo.com>");
292MODULE_LICENSE("Dual BSD/GPL");
293MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);