diff options
author | Ondrej Zajicek <santiago@crfreenet.org> | 2007-05-08 03:39:24 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-08 14:15:32 -0400 |
commit | 249bdbbf0dbab5554a4bfe55639e324d4758da96 (patch) | |
tree | 9c29295b115f83908814b35447ac5965b22a2fe4 /drivers | |
parent | 4941cb7a18fd84d4d8cd097d2beada3c79c8f781 (diff) |
s3fb: driver fixes
This fixes broken fbcon on Virge VX in 24 bpp mode, and contains several
other small updates.
Signed-off-by: Ondrej Zajicek <santiago@crfreenet.org>
Signed-off-by: Antonino Daplas <adaplas@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/video/s3fb.c | 21 |
1 files changed, 10 insertions, 11 deletions
diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c index 2a8d7d3338d5..dfa717b5b63a 100644 --- a/drivers/video/s3fb.c +++ b/drivers/video/s3fb.c | |||
@@ -65,7 +65,7 @@ static const struct svga_fb_format s3fb_formats[] = { | |||
65 | 65 | ||
66 | 66 | ||
67 | static const struct svga_pll s3_pll = {3, 129, 3, 33, 0, 3, | 67 | static const struct svga_pll s3_pll = {3, 129, 3, 33, 0, 3, |
68 | 60000, 240000, 14318}; | 68 | 35000, 240000, 14318}; |
69 | 69 | ||
70 | static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512}; | 70 | static const int s3_memsizes[] = {4096, 0, 3072, 8192, 2048, 6144, 1024, 512}; |
71 | 71 | ||
@@ -331,8 +331,13 @@ static void s3_set_pixclock(struct fb_info *info, u32 pixclock) | |||
331 | { | 331 | { |
332 | u16 m, n, r; | 332 | u16 m, n, r; |
333 | u8 regval; | 333 | u8 regval; |
334 | int rv; | ||
334 | 335 | ||
335 | svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node); | 336 | rv = svga_compute_pll(&s3_pll, 1000000000 / pixclock, &m, &n, &r, info->node); |
337 | if (rv < 0) { | ||
338 | printk(KERN_ERR "fb%d: cannot set requested pixclock, keeping old value\n", info->node); | ||
339 | return; | ||
340 | } | ||
336 | 341 | ||
337 | /* Set VGA misc register */ | 342 | /* Set VGA misc register */ |
338 | regval = vga_r(NULL, VGA_MIS_R); | 343 | regval = vga_r(NULL, VGA_MIS_R); |
@@ -710,7 +715,7 @@ static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
710 | break; | 715 | break; |
711 | case 16: | 716 | case 16: |
712 | if (regno >= 16) | 717 | if (regno >= 16) |
713 | return -EINVAL; | 718 | return 0; |
714 | 719 | ||
715 | if (fb->var.green.length == 5) | 720 | if (fb->var.green.length == 5) |
716 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | | 721 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xF800) >> 1) | |
@@ -723,9 +728,9 @@ static int s3fb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, | |||
723 | case 24: | 728 | case 24: |
724 | case 32: | 729 | case 32: |
725 | if (regno >= 16) | 730 | if (regno >= 16) |
726 | return -EINVAL; | 731 | return 0; |
727 | 732 | ||
728 | ((u32*)fb->pseudo_palette)[regno] = ((transp & 0xFF00) << 16) | ((red & 0xFF00) << 8) | | 733 | ((u32*)fb->pseudo_palette)[regno] = ((red & 0xFF00) << 8) | |
729 | (green & 0xFF00) | ((blue & 0xFF00) >> 8); | 734 | (green & 0xFF00) | ((blue & 0xFF00) >> 8); |
730 | break; | 735 | break; |
731 | default: | 736 | default: |
@@ -778,12 +783,6 @@ static int s3fb_pan_display(struct fb_var_screeninfo *var, struct fb_info *info) | |||
778 | 783 | ||
779 | unsigned int offset; | 784 | unsigned int offset; |
780 | 785 | ||
781 | /* Validate the offsets */ | ||
782 | if ((var->xoffset + var->xres) > var->xres_virtual) | ||
783 | return -EINVAL; | ||
784 | if ((var->yoffset + var->yres) > var->yres_virtual) | ||
785 | return -EINVAL; | ||
786 | |||
787 | /* Calculate the offset */ | 786 | /* Calculate the offset */ |
788 | if (var->bits_per_pixel == 0) { | 787 | if (var->bits_per_pixel == 0) { |
789 | offset = (var->yoffset / 16) * (var->xres_virtual / 2) + (var->xoffset / 2); | 788 | offset = (var->yoffset / 16) * (var->xres_virtual / 2) + (var->xoffset / 2); |