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authorMatt Carlson <mcarlson@broadcom.com>2010-02-17 10:16:59 -0500
committerDavid S. Miller <davem@davemloft.net>2010-02-17 20:27:37 -0500
commit144170635b543ceadfe6ba907ac496b40795764e (patch)
tree553d18fa3542a852f512f7f9138616de4e88b002 /drivers
parentb474eca74cf647df0a7fd56bc975ee4a812741b7 (diff)
tg3: Rename TG3_FLG3_RGMII_STD_IBND_DISABLE
The STD part of this preprocessor definition is a bit of a misnomer. This flag is a coarse control of the RGMII inband status facilities. This patch renames the definition to be more accurate. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/tg3.c12
-rw-r--r--drivers/net/tg3.h4
2 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index c9974a7697c9..09e3af0d1743 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -984,7 +984,7 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
984 return; 984 return;
985 } 985 }
986 986
987 if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)) 987 if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_INBAND_DISABLE))
988 val |= MAC_PHYCFG2_EMODE_MASK_MASK | 988 val |= MAC_PHYCFG2_EMODE_MASK_MASK |
989 MAC_PHYCFG2_FMODE_MASK_MASK | 989 MAC_PHYCFG2_FMODE_MASK_MASK |
990 MAC_PHYCFG2_GMODE_MASK_MASK | 990 MAC_PHYCFG2_GMODE_MASK_MASK |
@@ -997,7 +997,7 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
997 val = tr32(MAC_PHYCFG1); 997 val = tr32(MAC_PHYCFG1);
998 val &= ~(MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK | 998 val &= ~(MAC_PHYCFG1_RXCLK_TO_MASK | MAC_PHYCFG1_TXCLK_TO_MASK |
999 MAC_PHYCFG1_RGMII_EXT_RX_DEC | MAC_PHYCFG1_RGMII_SND_STAT_EN); 999 MAC_PHYCFG1_RGMII_EXT_RX_DEC | MAC_PHYCFG1_RGMII_SND_STAT_EN);
1000 if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)) { 1000 if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_INBAND_DISABLE)) {
1001 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN) 1001 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
1002 val |= MAC_PHYCFG1_RGMII_EXT_RX_DEC; 1002 val |= MAC_PHYCFG1_RGMII_EXT_RX_DEC;
1003 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_TX_EN) 1003 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_TX_EN)
@@ -1015,7 +1015,7 @@ static void tg3_mdio_config_5785(struct tg3 *tp)
1015 MAC_RGMII_MODE_TX_ENABLE | 1015 MAC_RGMII_MODE_TX_ENABLE |
1016 MAC_RGMII_MODE_TX_LOWPWR | 1016 MAC_RGMII_MODE_TX_LOWPWR |
1017 MAC_RGMII_MODE_TX_RESET); 1017 MAC_RGMII_MODE_TX_RESET);
1018 if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)) { 1018 if (!(tp->tg3_flags3 & TG3_FLG3_RGMII_INBAND_DISABLE)) {
1019 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN) 1019 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
1020 val |= MAC_RGMII_MODE_RX_INT_B | 1020 val |= MAC_RGMII_MODE_RX_INT_B |
1021 MAC_RGMII_MODE_RX_QUALITY | 1021 MAC_RGMII_MODE_RX_QUALITY |
@@ -1125,7 +1125,7 @@ static int tg3_mdio_init(struct tg3 *tp)
1125 PHY_BRCM_RX_REFCLK_UNUSED | 1125 PHY_BRCM_RX_REFCLK_UNUSED |
1126 PHY_BRCM_DIS_TXCRXC_NOENRGY | 1126 PHY_BRCM_DIS_TXCRXC_NOENRGY |
1127 PHY_BRCM_AUTO_PWRDWN_ENABLE; 1127 PHY_BRCM_AUTO_PWRDWN_ENABLE;
1128 if (tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE) 1128 if (tp->tg3_flags3 & TG3_FLG3_RGMII_INBAND_DISABLE)
1129 phydev->dev_flags |= PHY_BRCM_STD_IBND_DISABLE; 1129 phydev->dev_flags |= PHY_BRCM_STD_IBND_DISABLE;
1130 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN) 1130 if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
1131 phydev->dev_flags |= PHY_BRCM_EXT_IBND_RX_ENABLE; 1131 phydev->dev_flags |= PHY_BRCM_EXT_IBND_RX_ENABLE;
@@ -12365,8 +12365,8 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
12365 tp->tg3_flags |= TG3_FLAG_ASPM_WORKAROUND; 12365 tp->tg3_flags |= TG3_FLAG_ASPM_WORKAROUND;
12366 } 12366 }
12367 12367
12368 if (cfg4 & NIC_SRAM_RGMII_STD_IBND_DISABLE) 12368 if (cfg4 & NIC_SRAM_RGMII_INBAND_DISABLE)
12369 tp->tg3_flags3 |= TG3_FLG3_RGMII_STD_IBND_DISABLE; 12369 tp->tg3_flags3 |= TG3_FLG3_RGMII_INBAND_DISABLE;
12370 if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_RX_EN) 12370 if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_RX_EN)
12371 tp->tg3_flags3 |= TG3_FLG3_RGMII_EXT_IBND_RX_EN; 12371 tp->tg3_flags3 |= TG3_FLG3_RGMII_EXT_IBND_RX_EN;
12372 if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_TX_EN) 12372 if (cfg4 & NIC_SRAM_RGMII_EXT_IBND_TX_EN)
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index ffc12b1cb388..d2712c5b78ec 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1979,7 +1979,7 @@
1979 1979
1980#define NIC_SRAM_DATA_CFG_4 0x00000d60 1980#define NIC_SRAM_DATA_CFG_4 0x00000d60
1981#define NIC_SRAM_GMII_MODE 0x00000002 1981#define NIC_SRAM_GMII_MODE 0x00000002
1982#define NIC_SRAM_RGMII_STD_IBND_DISABLE 0x00000004 1982#define NIC_SRAM_RGMII_INBAND_DISABLE 0x00000004
1983#define NIC_SRAM_RGMII_EXT_IBND_RX_EN 0x00000008 1983#define NIC_SRAM_RGMII_EXT_IBND_RX_EN 0x00000008
1984#define NIC_SRAM_RGMII_EXT_IBND_TX_EN 0x00000010 1984#define NIC_SRAM_RGMII_EXT_IBND_TX_EN 0x00000010
1985 1985
@@ -2825,7 +2825,7 @@ struct tg3 {
2825#define TG3_FLG3_USE_PHYLIB 0x00000010 2825#define TG3_FLG3_USE_PHYLIB 0x00000010
2826#define TG3_FLG3_MDIOBUS_INITED 0x00000020 2826#define TG3_FLG3_MDIOBUS_INITED 0x00000020
2827#define TG3_FLG3_PHY_CONNECTED 0x00000080 2827#define TG3_FLG3_PHY_CONNECTED 0x00000080
2828#define TG3_FLG3_RGMII_STD_IBND_DISABLE 0x00000100 2828#define TG3_FLG3_RGMII_INBAND_DISABLE 0x00000100
2829#define TG3_FLG3_RGMII_EXT_IBND_RX_EN 0x00000200 2829#define TG3_FLG3_RGMII_EXT_IBND_RX_EN 0x00000200
2830#define TG3_FLG3_RGMII_EXT_IBND_TX_EN 0x00000400 2830#define TG3_FLG3_RGMII_EXT_IBND_TX_EN 0x00000400
2831#define TG3_FLG3_CLKREQ_BUG 0x00000800 2831#define TG3_FLG3_CLKREQ_BUG 0x00000800