diff options
author | Joe Perches <joe@perches.com> | 2008-04-28 05:14:02 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-28 11:58:29 -0400 |
commit | 0fab6de09c71a976e5d765e1ff548b14be385153 (patch) | |
tree | 74782032b89218366fc999f570c01e7d6a105be6 /drivers | |
parent | 7a63ce5a1f2fde5ae737f059e2714e441447120c (diff) |
synclink drivers bool conversion
Remove more TRUE/FALSE defines and uses
Remove == TRUE tests
Convert BOOLEAN to bool
Convert int to bool where appropriate
Signed-off-by: Joe Perches <joe@perches.com>
Acked-by: Paul Fulghum <paulkf@microgate.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/char/pcmcia/synclink_cs.c | 125 | ||||
-rw-r--r-- | drivers/char/synclink.c | 258 | ||||
-rw-r--r-- | drivers/char/synclink_gt.c | 102 | ||||
-rw-r--r-- | drivers/char/synclinkmp.c | 157 |
4 files changed, 319 insertions, 323 deletions
diff --git a/drivers/char/pcmcia/synclink_cs.c b/drivers/char/pcmcia/synclink_cs.c index 4e84d233e5a2..583356426dfb 100644 --- a/drivers/char/pcmcia/synclink_cs.c +++ b/drivers/char/pcmcia/synclink_cs.c | |||
@@ -189,20 +189,20 @@ typedef struct _mgslpc_info { | |||
189 | 189 | ||
190 | u32 pending_bh; | 190 | u32 pending_bh; |
191 | 191 | ||
192 | int bh_running; | 192 | bool bh_running; |
193 | int bh_requested; | 193 | bool bh_requested; |
194 | 194 | ||
195 | int dcd_chkcount; /* check counts to prevent */ | 195 | int dcd_chkcount; /* check counts to prevent */ |
196 | int cts_chkcount; /* too many IRQs if a signal */ | 196 | int cts_chkcount; /* too many IRQs if a signal */ |
197 | int dsr_chkcount; /* is floating */ | 197 | int dsr_chkcount; /* is floating */ |
198 | int ri_chkcount; | 198 | int ri_chkcount; |
199 | 199 | ||
200 | int rx_enabled; | 200 | bool rx_enabled; |
201 | int rx_overflow; | 201 | bool rx_overflow; |
202 | 202 | ||
203 | int tx_enabled; | 203 | bool tx_enabled; |
204 | int tx_active; | 204 | bool tx_active; |
205 | int tx_aborting; | 205 | bool tx_aborting; |
206 | u32 idle_mode; | 206 | u32 idle_mode; |
207 | 207 | ||
208 | int if_mode; /* serial interface selection (RS-232, v.35 etc) */ | 208 | int if_mode; /* serial interface selection (RS-232, v.35 etc) */ |
@@ -216,12 +216,12 @@ typedef struct _mgslpc_info { | |||
216 | 216 | ||
217 | unsigned char serial_signals; /* current serial signal states */ | 217 | unsigned char serial_signals; /* current serial signal states */ |
218 | 218 | ||
219 | char irq_occurred; /* for diagnostics use */ | 219 | bool irq_occurred; /* for diagnostics use */ |
220 | char testing_irq; | 220 | char testing_irq; |
221 | unsigned int init_error; /* startup error (DIAGS) */ | 221 | unsigned int init_error; /* startup error (DIAGS) */ |
222 | 222 | ||
223 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; | 223 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; |
224 | BOOLEAN drop_rts_on_tx_done; | 224 | bool drop_rts_on_tx_done; |
225 | 225 | ||
226 | struct _input_signal_events input_signal_events; | 226 | struct _input_signal_events input_signal_events; |
227 | 227 | ||
@@ -402,8 +402,8 @@ static void hdlcdev_exit(MGSLPC_INFO *info); | |||
402 | 402 | ||
403 | static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit); | 403 | static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit); |
404 | 404 | ||
405 | static BOOLEAN register_test(MGSLPC_INFO *info); | 405 | static bool register_test(MGSLPC_INFO *info); |
406 | static BOOLEAN irq_test(MGSLPC_INFO *info); | 406 | static bool irq_test(MGSLPC_INFO *info); |
407 | static int adapter_test(MGSLPC_INFO *info); | 407 | static int adapter_test(MGSLPC_INFO *info); |
408 | 408 | ||
409 | static int claim_resources(MGSLPC_INFO *info); | 409 | static int claim_resources(MGSLPC_INFO *info); |
@@ -411,7 +411,7 @@ static void release_resources(MGSLPC_INFO *info); | |||
411 | static void mgslpc_add_device(MGSLPC_INFO *info); | 411 | static void mgslpc_add_device(MGSLPC_INFO *info); |
412 | static void mgslpc_remove_device(MGSLPC_INFO *info); | 412 | static void mgslpc_remove_device(MGSLPC_INFO *info); |
413 | 413 | ||
414 | static int rx_get_frame(MGSLPC_INFO *info); | 414 | static bool rx_get_frame(MGSLPC_INFO *info); |
415 | static void rx_reset_buffers(MGSLPC_INFO *info); | 415 | static void rx_reset_buffers(MGSLPC_INFO *info); |
416 | static int rx_alloc_buffers(MGSLPC_INFO *info); | 416 | static int rx_alloc_buffers(MGSLPC_INFO *info); |
417 | static void rx_free_buffers(MGSLPC_INFO *info); | 417 | static void rx_free_buffers(MGSLPC_INFO *info); |
@@ -719,7 +719,7 @@ static int mgslpc_resume(struct pcmcia_device *link) | |||
719 | } | 719 | } |
720 | 720 | ||
721 | 721 | ||
722 | static inline int mgslpc_paranoia_check(MGSLPC_INFO *info, | 722 | static inline bool mgslpc_paranoia_check(MGSLPC_INFO *info, |
723 | char *name, const char *routine) | 723 | char *name, const char *routine) |
724 | { | 724 | { |
725 | #ifdef MGSLPC_PARANOIA_CHECK | 725 | #ifdef MGSLPC_PARANOIA_CHECK |
@@ -730,17 +730,17 @@ static inline int mgslpc_paranoia_check(MGSLPC_INFO *info, | |||
730 | 730 | ||
731 | if (!info) { | 731 | if (!info) { |
732 | printk(badinfo, name, routine); | 732 | printk(badinfo, name, routine); |
733 | return 1; | 733 | return true; |
734 | } | 734 | } |
735 | if (info->magic != MGSLPC_MAGIC) { | 735 | if (info->magic != MGSLPC_MAGIC) { |
736 | printk(badmagic, name, routine); | 736 | printk(badmagic, name, routine); |
737 | return 1; | 737 | return true; |
738 | } | 738 | } |
739 | #else | 739 | #else |
740 | if (!info) | 740 | if (!info) |
741 | return 1; | 741 | return true; |
742 | #endif | 742 | #endif |
743 | return 0; | 743 | return false; |
744 | } | 744 | } |
745 | 745 | ||
746 | 746 | ||
@@ -752,16 +752,16 @@ static inline int mgslpc_paranoia_check(MGSLPC_INFO *info, | |||
752 | #define CMD_TXEOM BIT1 // transmit end message | 752 | #define CMD_TXEOM BIT1 // transmit end message |
753 | #define CMD_TXRESET BIT0 // transmit reset | 753 | #define CMD_TXRESET BIT0 // transmit reset |
754 | 754 | ||
755 | static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel) | 755 | static bool wait_command_complete(MGSLPC_INFO *info, unsigned char channel) |
756 | { | 756 | { |
757 | int i = 0; | 757 | int i = 0; |
758 | /* wait for command completion */ | 758 | /* wait for command completion */ |
759 | while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) { | 759 | while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) { |
760 | udelay(1); | 760 | udelay(1); |
761 | if (i++ == 1000) | 761 | if (i++ == 1000) |
762 | return FALSE; | 762 | return false; |
763 | } | 763 | } |
764 | return TRUE; | 764 | return true; |
765 | } | 765 | } |
766 | 766 | ||
767 | static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) | 767 | static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd) |
@@ -825,8 +825,8 @@ static int bh_action(MGSLPC_INFO *info) | |||
825 | 825 | ||
826 | if (!rc) { | 826 | if (!rc) { |
827 | /* Mark BH routine as complete */ | 827 | /* Mark BH routine as complete */ |
828 | info->bh_running = 0; | 828 | info->bh_running = false; |
829 | info->bh_requested = 0; | 829 | info->bh_requested = false; |
830 | } | 830 | } |
831 | 831 | ||
832 | spin_unlock_irqrestore(&info->lock,flags); | 832 | spin_unlock_irqrestore(&info->lock,flags); |
@@ -846,7 +846,7 @@ static void bh_handler(struct work_struct *work) | |||
846 | printk( "%s(%d):bh_handler(%s) entry\n", | 846 | printk( "%s(%d):bh_handler(%s) entry\n", |
847 | __FILE__,__LINE__,info->device_name); | 847 | __FILE__,__LINE__,info->device_name); |
848 | 848 | ||
849 | info->bh_running = 1; | 849 | info->bh_running = true; |
850 | 850 | ||
851 | while((action = bh_action(info)) != 0) { | 851 | while((action = bh_action(info)) != 0) { |
852 | 852 | ||
@@ -913,7 +913,7 @@ static void rx_ready_hdlc(MGSLPC_INFO *info, int eom) | |||
913 | /* no more free buffers */ | 913 | /* no more free buffers */ |
914 | issue_command(info, CHA, CMD_RXRESET); | 914 | issue_command(info, CHA, CMD_RXRESET); |
915 | info->pending_bh |= BH_RECEIVE; | 915 | info->pending_bh |= BH_RECEIVE; |
916 | info->rx_overflow = 1; | 916 | info->rx_overflow = true; |
917 | info->icount.buf_overrun++; | 917 | info->icount.buf_overrun++; |
918 | return; | 918 | return; |
919 | } | 919 | } |
@@ -1032,8 +1032,8 @@ static void tx_done(MGSLPC_INFO *info) | |||
1032 | if (!info->tx_active) | 1032 | if (!info->tx_active) |
1033 | return; | 1033 | return; |
1034 | 1034 | ||
1035 | info->tx_active = 0; | 1035 | info->tx_active = false; |
1036 | info->tx_aborting = 0; | 1036 | info->tx_aborting = false; |
1037 | 1037 | ||
1038 | if (info->params.mode == MGSL_MODE_ASYNC) | 1038 | if (info->params.mode == MGSL_MODE_ASYNC) |
1039 | return; | 1039 | return; |
@@ -1047,7 +1047,7 @@ static void tx_done(MGSLPC_INFO *info) | |||
1047 | info->serial_signals &= ~SerialSignal_RTS; | 1047 | info->serial_signals &= ~SerialSignal_RTS; |
1048 | set_signals(info); | 1048 | set_signals(info); |
1049 | } | 1049 | } |
1050 | info->drop_rts_on_tx_done = 0; | 1050 | info->drop_rts_on_tx_done = false; |
1051 | } | 1051 | } |
1052 | 1052 | ||
1053 | #if SYNCLINK_GENERIC_HDLC | 1053 | #if SYNCLINK_GENERIC_HDLC |
@@ -1081,7 +1081,7 @@ static void tx_ready(MGSLPC_INFO *info) | |||
1081 | return; | 1081 | return; |
1082 | } | 1082 | } |
1083 | if (!info->tx_count) | 1083 | if (!info->tx_count) |
1084 | info->tx_active = 0; | 1084 | info->tx_active = false; |
1085 | } | 1085 | } |
1086 | 1086 | ||
1087 | if (!info->tx_count) | 1087 | if (!info->tx_count) |
@@ -1261,7 +1261,7 @@ static irqreturn_t mgslpc_isr(int dummy, void *dev_id) | |||
1261 | { | 1261 | { |
1262 | isr = read_reg16(info, CHA + ISR); | 1262 | isr = read_reg16(info, CHA + ISR); |
1263 | if (isr & IRQ_TIMER) { | 1263 | if (isr & IRQ_TIMER) { |
1264 | info->irq_occurred = 1; | 1264 | info->irq_occurred = true; |
1265 | irq_disable(info, CHA, IRQ_TIMER); | 1265 | irq_disable(info, CHA, IRQ_TIMER); |
1266 | } | 1266 | } |
1267 | 1267 | ||
@@ -1318,7 +1318,7 @@ static irqreturn_t mgslpc_isr(int dummy, void *dev_id) | |||
1318 | printk("%s(%d):%s queueing bh task.\n", | 1318 | printk("%s(%d):%s queueing bh task.\n", |
1319 | __FILE__,__LINE__,info->device_name); | 1319 | __FILE__,__LINE__,info->device_name); |
1320 | schedule_work(&info->task); | 1320 | schedule_work(&info->task); |
1321 | info->bh_requested = 1; | 1321 | info->bh_requested = true; |
1322 | } | 1322 | } |
1323 | 1323 | ||
1324 | spin_unlock(&info->lock); | 1324 | spin_unlock(&info->lock); |
@@ -1990,7 +1990,7 @@ static int tx_abort(MGSLPC_INFO * info) | |||
1990 | * This results in underrun and abort transmission. | 1990 | * This results in underrun and abort transmission. |
1991 | */ | 1991 | */ |
1992 | info->tx_count = info->tx_put = info->tx_get = 0; | 1992 | info->tx_count = info->tx_put = info->tx_get = 0; |
1993 | info->tx_aborting = TRUE; | 1993 | info->tx_aborting = true; |
1994 | } | 1994 | } |
1995 | spin_unlock_irqrestore(&info->lock,flags); | 1995 | spin_unlock_irqrestore(&info->lock,flags); |
1996 | return 0; | 1996 | return 0; |
@@ -2589,7 +2589,8 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2589 | { | 2589 | { |
2590 | DECLARE_WAITQUEUE(wait, current); | 2590 | DECLARE_WAITQUEUE(wait, current); |
2591 | int retval; | 2591 | int retval; |
2592 | int do_clocal = 0, extra_count = 0; | 2592 | bool do_clocal = false; |
2593 | bool extra_count = false; | ||
2593 | unsigned long flags; | 2594 | unsigned long flags; |
2594 | 2595 | ||
2595 | if (debug_level >= DEBUG_LEVEL_INFO) | 2596 | if (debug_level >= DEBUG_LEVEL_INFO) |
@@ -2604,7 +2605,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2604 | } | 2605 | } |
2605 | 2606 | ||
2606 | if (tty->termios->c_cflag & CLOCAL) | 2607 | if (tty->termios->c_cflag & CLOCAL) |
2607 | do_clocal = 1; | 2608 | do_clocal = true; |
2608 | 2609 | ||
2609 | /* Wait for carrier detect and the line to become | 2610 | /* Wait for carrier detect and the line to become |
2610 | * free (i.e., not in use by the callout). While we are in | 2611 | * free (i.e., not in use by the callout). While we are in |
@@ -2622,7 +2623,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
2622 | 2623 | ||
2623 | spin_lock_irqsave(&info->lock, flags); | 2624 | spin_lock_irqsave(&info->lock, flags); |
2624 | if (!tty_hung_up_p(filp)) { | 2625 | if (!tty_hung_up_p(filp)) { |
2625 | extra_count = 1; | 2626 | extra_count = true; |
2626 | info->count--; | 2627 | info->count--; |
2627 | } | 2628 | } |
2628 | spin_unlock_irqrestore(&info->lock, flags); | 2629 | spin_unlock_irqrestore(&info->lock, flags); |
@@ -3493,8 +3494,8 @@ static void rx_stop(MGSLPC_INFO *info) | |||
3493 | /* MODE:03 RAC Receiver Active, 0=inactive */ | 3494 | /* MODE:03 RAC Receiver Active, 0=inactive */ |
3494 | clear_reg_bits(info, CHA + MODE, BIT3); | 3495 | clear_reg_bits(info, CHA + MODE, BIT3); |
3495 | 3496 | ||
3496 | info->rx_enabled = 0; | 3497 | info->rx_enabled = false; |
3497 | info->rx_overflow = 0; | 3498 | info->rx_overflow = false; |
3498 | } | 3499 | } |
3499 | 3500 | ||
3500 | static void rx_start(MGSLPC_INFO *info) | 3501 | static void rx_start(MGSLPC_INFO *info) |
@@ -3504,13 +3505,13 @@ static void rx_start(MGSLPC_INFO *info) | |||
3504 | __FILE__,__LINE__, info->device_name ); | 3505 | __FILE__,__LINE__, info->device_name ); |
3505 | 3506 | ||
3506 | rx_reset_buffers(info); | 3507 | rx_reset_buffers(info); |
3507 | info->rx_enabled = 0; | 3508 | info->rx_enabled = false; |
3508 | info->rx_overflow = 0; | 3509 | info->rx_overflow = false; |
3509 | 3510 | ||
3510 | /* MODE:03 RAC Receiver Active, 1=active */ | 3511 | /* MODE:03 RAC Receiver Active, 1=active */ |
3511 | set_reg_bits(info, CHA + MODE, BIT3); | 3512 | set_reg_bits(info, CHA + MODE, BIT3); |
3512 | 3513 | ||
3513 | info->rx_enabled = 1; | 3514 | info->rx_enabled = true; |
3514 | } | 3515 | } |
3515 | 3516 | ||
3516 | static void tx_start(MGSLPC_INFO *info) | 3517 | static void tx_start(MGSLPC_INFO *info) |
@@ -3523,24 +3524,24 @@ static void tx_start(MGSLPC_INFO *info) | |||
3523 | /* If auto RTS enabled and RTS is inactive, then assert */ | 3524 | /* If auto RTS enabled and RTS is inactive, then assert */ |
3524 | /* RTS and set a flag indicating that the driver should */ | 3525 | /* RTS and set a flag indicating that the driver should */ |
3525 | /* negate RTS when the transmission completes. */ | 3526 | /* negate RTS when the transmission completes. */ |
3526 | info->drop_rts_on_tx_done = 0; | 3527 | info->drop_rts_on_tx_done = false; |
3527 | 3528 | ||
3528 | if (info->params.flags & HDLC_FLAG_AUTO_RTS) { | 3529 | if (info->params.flags & HDLC_FLAG_AUTO_RTS) { |
3529 | get_signals(info); | 3530 | get_signals(info); |
3530 | if (!(info->serial_signals & SerialSignal_RTS)) { | 3531 | if (!(info->serial_signals & SerialSignal_RTS)) { |
3531 | info->serial_signals |= SerialSignal_RTS; | 3532 | info->serial_signals |= SerialSignal_RTS; |
3532 | set_signals(info); | 3533 | set_signals(info); |
3533 | info->drop_rts_on_tx_done = 1; | 3534 | info->drop_rts_on_tx_done = true; |
3534 | } | 3535 | } |
3535 | } | 3536 | } |
3536 | 3537 | ||
3537 | if (info->params.mode == MGSL_MODE_ASYNC) { | 3538 | if (info->params.mode == MGSL_MODE_ASYNC) { |
3538 | if (!info->tx_active) { | 3539 | if (!info->tx_active) { |
3539 | info->tx_active = 1; | 3540 | info->tx_active = true; |
3540 | tx_ready(info); | 3541 | tx_ready(info); |
3541 | } | 3542 | } |
3542 | } else { | 3543 | } else { |
3543 | info->tx_active = 1; | 3544 | info->tx_active = true; |
3544 | tx_ready(info); | 3545 | tx_ready(info); |
3545 | mod_timer(&info->tx_timer, jiffies + | 3546 | mod_timer(&info->tx_timer, jiffies + |
3546 | msecs_to_jiffies(5000)); | 3547 | msecs_to_jiffies(5000)); |
@@ -3548,7 +3549,7 @@ static void tx_start(MGSLPC_INFO *info) | |||
3548 | } | 3549 | } |
3549 | 3550 | ||
3550 | if (!info->tx_enabled) | 3551 | if (!info->tx_enabled) |
3551 | info->tx_enabled = 1; | 3552 | info->tx_enabled = true; |
3552 | } | 3553 | } |
3553 | 3554 | ||
3554 | static void tx_stop(MGSLPC_INFO *info) | 3555 | static void tx_stop(MGSLPC_INFO *info) |
@@ -3559,8 +3560,8 @@ static void tx_stop(MGSLPC_INFO *info) | |||
3559 | 3560 | ||
3560 | del_timer(&info->tx_timer); | 3561 | del_timer(&info->tx_timer); |
3561 | 3562 | ||
3562 | info->tx_enabled = 0; | 3563 | info->tx_enabled = false; |
3563 | info->tx_active = 0; | 3564 | info->tx_active = false; |
3564 | } | 3565 | } |
3565 | 3566 | ||
3566 | /* Reset the adapter to a known state and prepare it for further use. | 3567 | /* Reset the adapter to a known state and prepare it for further use. |
@@ -3860,19 +3861,19 @@ static void rx_reset_buffers(MGSLPC_INFO *info) | |||
3860 | /* Attempt to return a received HDLC frame | 3861 | /* Attempt to return a received HDLC frame |
3861 | * Only frames received without errors are returned. | 3862 | * Only frames received without errors are returned. |
3862 | * | 3863 | * |
3863 | * Returns 1 if frame returned, otherwise 0 | 3864 | * Returns true if frame returned, otherwise false |
3864 | */ | 3865 | */ |
3865 | static int rx_get_frame(MGSLPC_INFO *info) | 3866 | static bool rx_get_frame(MGSLPC_INFO *info) |
3866 | { | 3867 | { |
3867 | unsigned short status; | 3868 | unsigned short status; |
3868 | RXBUF *buf; | 3869 | RXBUF *buf; |
3869 | unsigned int framesize = 0; | 3870 | unsigned int framesize = 0; |
3870 | unsigned long flags; | 3871 | unsigned long flags; |
3871 | struct tty_struct *tty = info->tty; | 3872 | struct tty_struct *tty = info->tty; |
3872 | int return_frame = 0; | 3873 | bool return_frame = false; |
3873 | 3874 | ||
3874 | if (info->rx_frame_count == 0) | 3875 | if (info->rx_frame_count == 0) |
3875 | return 0; | 3876 | return false; |
3876 | 3877 | ||
3877 | buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size)); | 3878 | buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size)); |
3878 | 3879 | ||
@@ -3891,7 +3892,7 @@ static int rx_get_frame(MGSLPC_INFO *info) | |||
3891 | else if (!(status & BIT5)) { | 3892 | else if (!(status & BIT5)) { |
3892 | info->icount.rxcrc++; | 3893 | info->icount.rxcrc++; |
3893 | if (info->params.crc_type & HDLC_CRC_RETURN_EX) | 3894 | if (info->params.crc_type & HDLC_CRC_RETURN_EX) |
3894 | return_frame = 1; | 3895 | return_frame = true; |
3895 | } | 3896 | } |
3896 | framesize = 0; | 3897 | framesize = 0; |
3897 | #if SYNCLINK_GENERIC_HDLC | 3898 | #if SYNCLINK_GENERIC_HDLC |
@@ -3902,7 +3903,7 @@ static int rx_get_frame(MGSLPC_INFO *info) | |||
3902 | } | 3903 | } |
3903 | #endif | 3904 | #endif |
3904 | } else | 3905 | } else |
3905 | return_frame = 1; | 3906 | return_frame = true; |
3906 | 3907 | ||
3907 | if (return_frame) | 3908 | if (return_frame) |
3908 | framesize = buf->count; | 3909 | framesize = buf->count; |
@@ -3945,16 +3946,16 @@ static int rx_get_frame(MGSLPC_INFO *info) | |||
3945 | info->rx_get = 0; | 3946 | info->rx_get = 0; |
3946 | spin_unlock_irqrestore(&info->lock,flags); | 3947 | spin_unlock_irqrestore(&info->lock,flags); |
3947 | 3948 | ||
3948 | return 1; | 3949 | return true; |
3949 | } | 3950 | } |
3950 | 3951 | ||
3951 | static BOOLEAN register_test(MGSLPC_INFO *info) | 3952 | static bool register_test(MGSLPC_INFO *info) |
3952 | { | 3953 | { |
3953 | static unsigned char patterns[] = | 3954 | static unsigned char patterns[] = |
3954 | { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f }; | 3955 | { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f }; |
3955 | static unsigned int count = ARRAY_SIZE(patterns); | 3956 | static unsigned int count = ARRAY_SIZE(patterns); |
3956 | unsigned int i; | 3957 | unsigned int i; |
3957 | BOOLEAN rc = TRUE; | 3958 | bool rc = true; |
3958 | unsigned long flags; | 3959 | unsigned long flags; |
3959 | 3960 | ||
3960 | spin_lock_irqsave(&info->lock,flags); | 3961 | spin_lock_irqsave(&info->lock,flags); |
@@ -3965,7 +3966,7 @@ static BOOLEAN register_test(MGSLPC_INFO *info) | |||
3965 | write_reg(info, XAD2, patterns[(i + 1) % count]); | 3966 | write_reg(info, XAD2, patterns[(i + 1) % count]); |
3966 | if ((read_reg(info, XAD1) != patterns[i]) || | 3967 | if ((read_reg(info, XAD1) != patterns[i]) || |
3967 | (read_reg(info, XAD2) != patterns[(i + 1) % count])) { | 3968 | (read_reg(info, XAD2) != patterns[(i + 1) % count])) { |
3968 | rc = FALSE; | 3969 | rc = false; |
3969 | break; | 3970 | break; |
3970 | } | 3971 | } |
3971 | } | 3972 | } |
@@ -3974,7 +3975,7 @@ static BOOLEAN register_test(MGSLPC_INFO *info) | |||
3974 | return rc; | 3975 | return rc; |
3975 | } | 3976 | } |
3976 | 3977 | ||
3977 | static BOOLEAN irq_test(MGSLPC_INFO *info) | 3978 | static bool irq_test(MGSLPC_INFO *info) |
3978 | { | 3979 | { |
3979 | unsigned long end_time; | 3980 | unsigned long end_time; |
3980 | unsigned long flags; | 3981 | unsigned long flags; |
@@ -3982,10 +3983,10 @@ static BOOLEAN irq_test(MGSLPC_INFO *info) | |||
3982 | spin_lock_irqsave(&info->lock,flags); | 3983 | spin_lock_irqsave(&info->lock,flags); |
3983 | reset_device(info); | 3984 | reset_device(info); |
3984 | 3985 | ||
3985 | info->testing_irq = TRUE; | 3986 | info->testing_irq = true; |
3986 | hdlc_mode(info); | 3987 | hdlc_mode(info); |
3987 | 3988 | ||
3988 | info->irq_occurred = FALSE; | 3989 | info->irq_occurred = false; |
3989 | 3990 | ||
3990 | /* init hdlc mode */ | 3991 | /* init hdlc mode */ |
3991 | 3992 | ||
@@ -4000,13 +4001,13 @@ static BOOLEAN irq_test(MGSLPC_INFO *info) | |||
4000 | msleep_interruptible(10); | 4001 | msleep_interruptible(10); |
4001 | } | 4002 | } |
4002 | 4003 | ||
4003 | info->testing_irq = FALSE; | 4004 | info->testing_irq = false; |
4004 | 4005 | ||
4005 | spin_lock_irqsave(&info->lock,flags); | 4006 | spin_lock_irqsave(&info->lock,flags); |
4006 | reset_device(info); | 4007 | reset_device(info); |
4007 | spin_unlock_irqrestore(&info->lock,flags); | 4008 | spin_unlock_irqrestore(&info->lock,flags); |
4008 | 4009 | ||
4009 | return info->irq_occurred ? TRUE : FALSE; | 4010 | return info->irq_occurred; |
4010 | } | 4011 | } |
4011 | 4012 | ||
4012 | static int adapter_test(MGSLPC_INFO *info) | 4013 | static int adapter_test(MGSLPC_INFO *info) |
@@ -4079,7 +4080,7 @@ static void tx_timeout(unsigned long context) | |||
4079 | info->icount.txtimeout++; | 4080 | info->icount.txtimeout++; |
4080 | } | 4081 | } |
4081 | spin_lock_irqsave(&info->lock,flags); | 4082 | spin_lock_irqsave(&info->lock,flags); |
4082 | info->tx_active = 0; | 4083 | info->tx_active = false; |
4083 | info->tx_count = info->tx_put = info->tx_get = 0; | 4084 | info->tx_count = info->tx_put = info->tx_get = 0; |
4084 | 4085 | ||
4085 | spin_unlock_irqrestore(&info->lock,flags); | 4086 | spin_unlock_irqrestore(&info->lock,flags); |
diff --git a/drivers/char/synclink.c b/drivers/char/synclink.c index a3237d48a584..fadab1d9510f 100644 --- a/drivers/char/synclink.c +++ b/drivers/char/synclink.c | |||
@@ -218,9 +218,9 @@ struct mgsl_struct { | |||
218 | 218 | ||
219 | u32 pending_bh; | 219 | u32 pending_bh; |
220 | 220 | ||
221 | int bh_running; /* Protection from multiple */ | 221 | bool bh_running; /* Protection from multiple */ |
222 | int isr_overflow; | 222 | int isr_overflow; |
223 | int bh_requested; | 223 | bool bh_requested; |
224 | 224 | ||
225 | int dcd_chkcount; /* check counts to prevent */ | 225 | int dcd_chkcount; /* check counts to prevent */ |
226 | int cts_chkcount; /* too many IRQs if a signal */ | 226 | int cts_chkcount; /* too many IRQs if a signal */ |
@@ -250,12 +250,12 @@ struct mgsl_struct { | |||
250 | int tx_holding_count; /* number of tx holding buffers waiting */ | 250 | int tx_holding_count; /* number of tx holding buffers waiting */ |
251 | struct tx_holding_buffer tx_holding_buffers[MAX_TX_HOLDING_BUFFERS]; | 251 | struct tx_holding_buffer tx_holding_buffers[MAX_TX_HOLDING_BUFFERS]; |
252 | 252 | ||
253 | int rx_enabled; | 253 | bool rx_enabled; |
254 | int rx_overflow; | 254 | bool rx_overflow; |
255 | int rx_rcc_underrun; | 255 | bool rx_rcc_underrun; |
256 | 256 | ||
257 | int tx_enabled; | 257 | bool tx_enabled; |
258 | int tx_active; | 258 | bool tx_active; |
259 | u32 idle_mode; | 259 | u32 idle_mode; |
260 | 260 | ||
261 | u16 cmr_value; | 261 | u16 cmr_value; |
@@ -269,14 +269,14 @@ struct mgsl_struct { | |||
269 | 269 | ||
270 | unsigned int io_base; /* base I/O address of adapter */ | 270 | unsigned int io_base; /* base I/O address of adapter */ |
271 | unsigned int io_addr_size; /* size of the I/O address range */ | 271 | unsigned int io_addr_size; /* size of the I/O address range */ |
272 | int io_addr_requested; /* nonzero if I/O address requested */ | 272 | bool io_addr_requested; /* true if I/O address requested */ |
273 | 273 | ||
274 | unsigned int irq_level; /* interrupt level */ | 274 | unsigned int irq_level; /* interrupt level */ |
275 | unsigned long irq_flags; | 275 | unsigned long irq_flags; |
276 | int irq_requested; /* nonzero if IRQ requested */ | 276 | bool irq_requested; /* true if IRQ requested */ |
277 | 277 | ||
278 | unsigned int dma_level; /* DMA channel */ | 278 | unsigned int dma_level; /* DMA channel */ |
279 | int dma_requested; /* nonzero if dma channel requested */ | 279 | bool dma_requested; /* true if dma channel requested */ |
280 | 280 | ||
281 | u16 mbre_bit; | 281 | u16 mbre_bit; |
282 | u16 loopback_bits; | 282 | u16 loopback_bits; |
@@ -286,27 +286,27 @@ struct mgsl_struct { | |||
286 | 286 | ||
287 | unsigned char serial_signals; /* current serial signal states */ | 287 | unsigned char serial_signals; /* current serial signal states */ |
288 | 288 | ||
289 | int irq_occurred; /* for diagnostics use */ | 289 | bool irq_occurred; /* for diagnostics use */ |
290 | unsigned int init_error; /* Initialization startup error (DIAGS) */ | 290 | unsigned int init_error; /* Initialization startup error (DIAGS) */ |
291 | int fDiagnosticsmode; /* Driver in Diagnostic mode? (DIAGS) */ | 291 | int fDiagnosticsmode; /* Driver in Diagnostic mode? (DIAGS) */ |
292 | 292 | ||
293 | u32 last_mem_alloc; | 293 | u32 last_mem_alloc; |
294 | unsigned char* memory_base; /* shared memory address (PCI only) */ | 294 | unsigned char* memory_base; /* shared memory address (PCI only) */ |
295 | u32 phys_memory_base; | 295 | u32 phys_memory_base; |
296 | int shared_mem_requested; | 296 | bool shared_mem_requested; |
297 | 297 | ||
298 | unsigned char* lcr_base; /* local config registers (PCI only) */ | 298 | unsigned char* lcr_base; /* local config registers (PCI only) */ |
299 | u32 phys_lcr_base; | 299 | u32 phys_lcr_base; |
300 | u32 lcr_offset; | 300 | u32 lcr_offset; |
301 | int lcr_mem_requested; | 301 | bool lcr_mem_requested; |
302 | 302 | ||
303 | u32 misc_ctrl_value; | 303 | u32 misc_ctrl_value; |
304 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; | 304 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; |
305 | char char_buf[MAX_ASYNC_BUFFER_SIZE]; | 305 | char char_buf[MAX_ASYNC_BUFFER_SIZE]; |
306 | BOOLEAN drop_rts_on_tx_done; | 306 | bool drop_rts_on_tx_done; |
307 | 307 | ||
308 | BOOLEAN loopmode_insert_requested; | 308 | bool loopmode_insert_requested; |
309 | BOOLEAN loopmode_send_done_requested; | 309 | bool loopmode_send_done_requested; |
310 | 310 | ||
311 | struct _input_signal_events input_signal_events; | 311 | struct _input_signal_events input_signal_events; |
312 | 312 | ||
@@ -752,10 +752,10 @@ static void mgsl_trace_block(struct mgsl_struct *info,const char* data, int coun | |||
752 | /* | 752 | /* |
753 | * Adapter diagnostic routines | 753 | * Adapter diagnostic routines |
754 | */ | 754 | */ |
755 | static BOOLEAN mgsl_register_test( struct mgsl_struct *info ); | 755 | static bool mgsl_register_test( struct mgsl_struct *info ); |
756 | static BOOLEAN mgsl_irq_test( struct mgsl_struct *info ); | 756 | static bool mgsl_irq_test( struct mgsl_struct *info ); |
757 | static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ); | 757 | static bool mgsl_dma_test( struct mgsl_struct *info ); |
758 | static BOOLEAN mgsl_memory_test( struct mgsl_struct *info ); | 758 | static bool mgsl_memory_test( struct mgsl_struct *info ); |
759 | static int mgsl_adapter_test( struct mgsl_struct *info ); | 759 | static int mgsl_adapter_test( struct mgsl_struct *info ); |
760 | 760 | ||
761 | /* | 761 | /* |
@@ -770,8 +770,8 @@ static struct mgsl_struct* mgsl_allocate_device(void); | |||
770 | * DMA buffer manupulation functions. | 770 | * DMA buffer manupulation functions. |
771 | */ | 771 | */ |
772 | static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned int EndIndex ); | 772 | static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned int EndIndex ); |
773 | static int mgsl_get_rx_frame( struct mgsl_struct *info ); | 773 | static bool mgsl_get_rx_frame( struct mgsl_struct *info ); |
774 | static int mgsl_get_raw_rx_frame( struct mgsl_struct *info ); | 774 | static bool mgsl_get_raw_rx_frame( struct mgsl_struct *info ); |
775 | static void mgsl_reset_rx_dma_buffers( struct mgsl_struct *info ); | 775 | static void mgsl_reset_rx_dma_buffers( struct mgsl_struct *info ); |
776 | static void mgsl_reset_tx_dma_buffers( struct mgsl_struct *info ); | 776 | static void mgsl_reset_tx_dma_buffers( struct mgsl_struct *info ); |
777 | static int num_free_tx_dma_buffers(struct mgsl_struct *info); | 777 | static int num_free_tx_dma_buffers(struct mgsl_struct *info); |
@@ -791,7 +791,7 @@ static int mgsl_alloc_intermediate_rxbuffer_memory(struct mgsl_struct *info); | |||
791 | static void mgsl_free_intermediate_rxbuffer_memory(struct mgsl_struct *info); | 791 | static void mgsl_free_intermediate_rxbuffer_memory(struct mgsl_struct *info); |
792 | static int mgsl_alloc_intermediate_txbuffer_memory(struct mgsl_struct *info); | 792 | static int mgsl_alloc_intermediate_txbuffer_memory(struct mgsl_struct *info); |
793 | static void mgsl_free_intermediate_txbuffer_memory(struct mgsl_struct *info); | 793 | static void mgsl_free_intermediate_txbuffer_memory(struct mgsl_struct *info); |
794 | static int load_next_tx_holding_buffer(struct mgsl_struct *info); | 794 | static bool load_next_tx_holding_buffer(struct mgsl_struct *info); |
795 | static int save_tx_buffer_request(struct mgsl_struct *info,const char *Buffer, unsigned int BufferSize); | 795 | static int save_tx_buffer_request(struct mgsl_struct *info,const char *Buffer, unsigned int BufferSize); |
796 | 796 | ||
797 | /* | 797 | /* |
@@ -847,7 +847,7 @@ static int mgsl_wait_event(struct mgsl_struct * info, int __user *mask); | |||
847 | static int mgsl_loopmode_send_done( struct mgsl_struct * info ); | 847 | static int mgsl_loopmode_send_done( struct mgsl_struct * info ); |
848 | 848 | ||
849 | /* set non-zero on successful registration with PCI subsystem */ | 849 | /* set non-zero on successful registration with PCI subsystem */ |
850 | static int pci_registered; | 850 | static bool pci_registered; |
851 | 851 | ||
852 | /* | 852 | /* |
853 | * Global linked list of SyncLink devices | 853 | * Global linked list of SyncLink devices |
@@ -1054,8 +1054,8 @@ static int mgsl_bh_action(struct mgsl_struct *info) | |||
1054 | 1054 | ||
1055 | if (!rc) { | 1055 | if (!rc) { |
1056 | /* Mark BH routine as complete */ | 1056 | /* Mark BH routine as complete */ |
1057 | info->bh_running = 0; | 1057 | info->bh_running = false; |
1058 | info->bh_requested = 0; | 1058 | info->bh_requested = false; |
1059 | } | 1059 | } |
1060 | 1060 | ||
1061 | spin_unlock_irqrestore(&info->irq_spinlock,flags); | 1061 | spin_unlock_irqrestore(&info->irq_spinlock,flags); |
@@ -1079,7 +1079,7 @@ static void mgsl_bh_handler(struct work_struct *work) | |||
1079 | printk( "%s(%d):mgsl_bh_handler(%s) entry\n", | 1079 | printk( "%s(%d):mgsl_bh_handler(%s) entry\n", |
1080 | __FILE__,__LINE__,info->device_name); | 1080 | __FILE__,__LINE__,info->device_name); |
1081 | 1081 | ||
1082 | info->bh_running = 1; | 1082 | info->bh_running = true; |
1083 | 1083 | ||
1084 | while((action = mgsl_bh_action(info)) != 0) { | 1084 | while((action = mgsl_bh_action(info)) != 0) { |
1085 | 1085 | ||
@@ -1113,7 +1113,7 @@ static void mgsl_bh_handler(struct work_struct *work) | |||
1113 | 1113 | ||
1114 | static void mgsl_bh_receive(struct mgsl_struct *info) | 1114 | static void mgsl_bh_receive(struct mgsl_struct *info) |
1115 | { | 1115 | { |
1116 | int (*get_rx_frame)(struct mgsl_struct *info) = | 1116 | bool (*get_rx_frame)(struct mgsl_struct *info) = |
1117 | (info->params.mode == MGSL_MODE_HDLC ? mgsl_get_rx_frame : mgsl_get_raw_rx_frame); | 1117 | (info->params.mode == MGSL_MODE_HDLC ? mgsl_get_rx_frame : mgsl_get_raw_rx_frame); |
1118 | 1118 | ||
1119 | if ( debug_level >= DEBUG_LEVEL_BH ) | 1119 | if ( debug_level >= DEBUG_LEVEL_BH ) |
@@ -1187,7 +1187,7 @@ static void mgsl_isr_receive_status( struct mgsl_struct *info ) | |||
1187 | usc_loopmode_active(info) ) | 1187 | usc_loopmode_active(info) ) |
1188 | { | 1188 | { |
1189 | ++info->icount.rxabort; | 1189 | ++info->icount.rxabort; |
1190 | info->loopmode_insert_requested = FALSE; | 1190 | info->loopmode_insert_requested = false; |
1191 | 1191 | ||
1192 | /* clear CMR:13 to start echoing RxD to TxD */ | 1192 | /* clear CMR:13 to start echoing RxD to TxD */ |
1193 | info->cmr_value &= ~BIT13; | 1193 | info->cmr_value &= ~BIT13; |
@@ -1257,7 +1257,7 @@ static void mgsl_isr_transmit_status( struct mgsl_struct *info ) | |||
1257 | else | 1257 | else |
1258 | info->icount.txunder++; | 1258 | info->icount.txunder++; |
1259 | 1259 | ||
1260 | info->tx_active = 0; | 1260 | info->tx_active = false; |
1261 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | 1261 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
1262 | del_timer(&info->tx_timer); | 1262 | del_timer(&info->tx_timer); |
1263 | 1263 | ||
@@ -1267,7 +1267,7 @@ static void mgsl_isr_transmit_status( struct mgsl_struct *info ) | |||
1267 | info->serial_signals &= ~SerialSignal_RTS; | 1267 | info->serial_signals &= ~SerialSignal_RTS; |
1268 | usc_set_serial_signals( info ); | 1268 | usc_set_serial_signals( info ); |
1269 | } | 1269 | } |
1270 | info->drop_rts_on_tx_done = 0; | 1270 | info->drop_rts_on_tx_done = false; |
1271 | } | 1271 | } |
1272 | 1272 | ||
1273 | #if SYNCLINK_GENERIC_HDLC | 1273 | #if SYNCLINK_GENERIC_HDLC |
@@ -1403,7 +1403,7 @@ static void mgsl_isr_io_pin( struct mgsl_struct *info ) | |||
1403 | usc_OutReg( info, SICR, | 1403 | usc_OutReg( info, SICR, |
1404 | (unsigned short)(usc_InReg(info,SICR) & ~(SICR_TXC_ACTIVE+SICR_TXC_INACTIVE)) ); | 1404 | (unsigned short)(usc_InReg(info,SICR) & ~(SICR_TXC_ACTIVE+SICR_TXC_INACTIVE)) ); |
1405 | usc_UnlatchIostatusBits( info, MISCSTATUS_TXC_LATCHED ); | 1405 | usc_UnlatchIostatusBits( info, MISCSTATUS_TXC_LATCHED ); |
1406 | info->irq_occurred = 1; | 1406 | info->irq_occurred = true; |
1407 | } | 1407 | } |
1408 | 1408 | ||
1409 | } /* end of mgsl_isr_io_pin() */ | 1409 | } /* end of mgsl_isr_io_pin() */ |
@@ -1431,7 +1431,7 @@ static void mgsl_isr_transmit_data( struct mgsl_struct *info ) | |||
1431 | if ( info->xmit_cnt ) | 1431 | if ( info->xmit_cnt ) |
1432 | usc_load_txfifo( info ); | 1432 | usc_load_txfifo( info ); |
1433 | else | 1433 | else |
1434 | info->tx_active = 0; | 1434 | info->tx_active = false; |
1435 | 1435 | ||
1436 | if (info->xmit_cnt < WAKEUP_CHARS) | 1436 | if (info->xmit_cnt < WAKEUP_CHARS) |
1437 | info->pending_bh |= BH_TRANSMIT; | 1437 | info->pending_bh |= BH_TRANSMIT; |
@@ -1568,7 +1568,7 @@ static void mgsl_isr_misc( struct mgsl_struct *info ) | |||
1568 | 1568 | ||
1569 | /* schedule BH handler to restart receiver */ | 1569 | /* schedule BH handler to restart receiver */ |
1570 | info->pending_bh |= BH_RECEIVE; | 1570 | info->pending_bh |= BH_RECEIVE; |
1571 | info->rx_rcc_underrun = 1; | 1571 | info->rx_rcc_underrun = true; |
1572 | } | 1572 | } |
1573 | 1573 | ||
1574 | usc_ClearIrqPendingBits( info, MISC ); | 1574 | usc_ClearIrqPendingBits( info, MISC ); |
@@ -1626,7 +1626,7 @@ static void mgsl_isr_receive_dma( struct mgsl_struct *info ) | |||
1626 | info->pending_bh |= BH_RECEIVE; | 1626 | info->pending_bh |= BH_RECEIVE; |
1627 | 1627 | ||
1628 | if ( status & BIT3 ) { | 1628 | if ( status & BIT3 ) { |
1629 | info->rx_overflow = 1; | 1629 | info->rx_overflow = true; |
1630 | info->icount.buf_overrun++; | 1630 | info->icount.buf_overrun++; |
1631 | } | 1631 | } |
1632 | 1632 | ||
@@ -1745,7 +1745,7 @@ static irqreturn_t mgsl_interrupt(int dummy, void *dev_id) | |||
1745 | printk("%s(%d):%s queueing bh task.\n", | 1745 | printk("%s(%d):%s queueing bh task.\n", |
1746 | __FILE__,__LINE__,info->device_name); | 1746 | __FILE__,__LINE__,info->device_name); |
1747 | schedule_work(&info->task); | 1747 | schedule_work(&info->task); |
1748 | info->bh_requested = 1; | 1748 | info->bh_requested = true; |
1749 | } | 1749 | } |
1750 | 1750 | ||
1751 | spin_unlock(&info->irq_spinlock); | 1751 | spin_unlock(&info->irq_spinlock); |
@@ -3303,7 +3303,8 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp, | |||
3303 | { | 3303 | { |
3304 | DECLARE_WAITQUEUE(wait, current); | 3304 | DECLARE_WAITQUEUE(wait, current); |
3305 | int retval; | 3305 | int retval; |
3306 | int do_clocal = 0, extra_count = 0; | 3306 | bool do_clocal = false; |
3307 | bool extra_count = false; | ||
3307 | unsigned long flags; | 3308 | unsigned long flags; |
3308 | 3309 | ||
3309 | if (debug_level >= DEBUG_LEVEL_INFO) | 3310 | if (debug_level >= DEBUG_LEVEL_INFO) |
@@ -3317,7 +3318,7 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp, | |||
3317 | } | 3318 | } |
3318 | 3319 | ||
3319 | if (tty->termios->c_cflag & CLOCAL) | 3320 | if (tty->termios->c_cflag & CLOCAL) |
3320 | do_clocal = 1; | 3321 | do_clocal = true; |
3321 | 3322 | ||
3322 | /* Wait for carrier detect and the line to become | 3323 | /* Wait for carrier detect and the line to become |
3323 | * free (i.e., not in use by the callout). While we are in | 3324 | * free (i.e., not in use by the callout). While we are in |
@@ -3335,7 +3336,7 @@ static int block_til_ready(struct tty_struct *tty, struct file * filp, | |||
3335 | 3336 | ||
3336 | spin_lock_irqsave(&info->irq_spinlock, flags); | 3337 | spin_lock_irqsave(&info->irq_spinlock, flags); |
3337 | if (!tty_hung_up_p(filp)) { | 3338 | if (!tty_hung_up_p(filp)) { |
3338 | extra_count = 1; | 3339 | extra_count = true; |
3339 | info->count--; | 3340 | info->count--; |
3340 | } | 3341 | } |
3341 | spin_unlock_irqrestore(&info->irq_spinlock, flags); | 3342 | spin_unlock_irqrestore(&info->irq_spinlock, flags); |
@@ -4043,13 +4044,13 @@ static void mgsl_free_intermediate_txbuffer_memory(struct mgsl_struct *info) | |||
4043 | * | 4044 | * |
4044 | * info pointer to device instance data | 4045 | * info pointer to device instance data |
4045 | * | 4046 | * |
4046 | * Return Value: 1 if next buffered tx request loaded | 4047 | * Return Value: true if next buffered tx request loaded |
4047 | * into adapter's tx dma buffer, | 4048 | * into adapter's tx dma buffer, |
4048 | * 0 otherwise | 4049 | * false otherwise |
4049 | */ | 4050 | */ |
4050 | static int load_next_tx_holding_buffer(struct mgsl_struct *info) | 4051 | static bool load_next_tx_holding_buffer(struct mgsl_struct *info) |
4051 | { | 4052 | { |
4052 | int ret = 0; | 4053 | bool ret = false; |
4053 | 4054 | ||
4054 | if ( info->tx_holding_count ) { | 4055 | if ( info->tx_holding_count ) { |
4055 | /* determine if we have enough tx dma buffers | 4056 | /* determine if we have enough tx dma buffers |
@@ -4073,7 +4074,7 @@ static int load_next_tx_holding_buffer(struct mgsl_struct *info) | |||
4073 | /* restart transmit timer */ | 4074 | /* restart transmit timer */ |
4074 | mod_timer(&info->tx_timer, jiffies + msecs_to_jiffies(5000)); | 4075 | mod_timer(&info->tx_timer, jiffies + msecs_to_jiffies(5000)); |
4075 | 4076 | ||
4076 | ret = 1; | 4077 | ret = true; |
4077 | } | 4078 | } |
4078 | } | 4079 | } |
4079 | 4080 | ||
@@ -4119,7 +4120,7 @@ static int mgsl_claim_resources(struct mgsl_struct *info) | |||
4119 | __FILE__,__LINE__,info->device_name, info->io_base); | 4120 | __FILE__,__LINE__,info->device_name, info->io_base); |
4120 | return -ENODEV; | 4121 | return -ENODEV; |
4121 | } | 4122 | } |
4122 | info->io_addr_requested = 1; | 4123 | info->io_addr_requested = true; |
4123 | 4124 | ||
4124 | if ( request_irq(info->irq_level,mgsl_interrupt,info->irq_flags, | 4125 | if ( request_irq(info->irq_level,mgsl_interrupt,info->irq_flags, |
4125 | info->device_name, info ) < 0 ) { | 4126 | info->device_name, info ) < 0 ) { |
@@ -4127,7 +4128,7 @@ static int mgsl_claim_resources(struct mgsl_struct *info) | |||
4127 | __FILE__,__LINE__,info->device_name, info->irq_level ); | 4128 | __FILE__,__LINE__,info->device_name, info->irq_level ); |
4128 | goto errout; | 4129 | goto errout; |
4129 | } | 4130 | } |
4130 | info->irq_requested = 1; | 4131 | info->irq_requested = true; |
4131 | 4132 | ||
4132 | if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { | 4133 | if ( info->bus_type == MGSL_BUS_TYPE_PCI ) { |
4133 | if (request_mem_region(info->phys_memory_base,0x40000,"synclink") == NULL) { | 4134 | if (request_mem_region(info->phys_memory_base,0x40000,"synclink") == NULL) { |
@@ -4135,13 +4136,13 @@ static int mgsl_claim_resources(struct mgsl_struct *info) | |||
4135 | __FILE__,__LINE__,info->device_name, info->phys_memory_base); | 4136 | __FILE__,__LINE__,info->device_name, info->phys_memory_base); |
4136 | goto errout; | 4137 | goto errout; |
4137 | } | 4138 | } |
4138 | info->shared_mem_requested = 1; | 4139 | info->shared_mem_requested = true; |
4139 | if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclink") == NULL) { | 4140 | if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclink") == NULL) { |
4140 | printk( "%s(%d):lcr mem addr conflict device %s Addr=%08X\n", | 4141 | printk( "%s(%d):lcr mem addr conflict device %s Addr=%08X\n", |
4141 | __FILE__,__LINE__,info->device_name, info->phys_lcr_base + info->lcr_offset); | 4142 | __FILE__,__LINE__,info->device_name, info->phys_lcr_base + info->lcr_offset); |
4142 | goto errout; | 4143 | goto errout; |
4143 | } | 4144 | } |
4144 | info->lcr_mem_requested = 1; | 4145 | info->lcr_mem_requested = true; |
4145 | 4146 | ||
4146 | info->memory_base = ioremap(info->phys_memory_base,0x40000); | 4147 | info->memory_base = ioremap(info->phys_memory_base,0x40000); |
4147 | if (!info->memory_base) { | 4148 | if (!info->memory_base) { |
@@ -4172,7 +4173,7 @@ static int mgsl_claim_resources(struct mgsl_struct *info) | |||
4172 | mgsl_release_resources( info ); | 4173 | mgsl_release_resources( info ); |
4173 | return -ENODEV; | 4174 | return -ENODEV; |
4174 | } | 4175 | } |
4175 | info->dma_requested = 1; | 4176 | info->dma_requested = true; |
4176 | 4177 | ||
4177 | /* ISA adapter uses bus master DMA */ | 4178 | /* ISA adapter uses bus master DMA */ |
4178 | set_dma_mode(info->dma_level,DMA_MODE_CASCADE); | 4179 | set_dma_mode(info->dma_level,DMA_MODE_CASCADE); |
@@ -4200,12 +4201,12 @@ static void mgsl_release_resources(struct mgsl_struct *info) | |||
4200 | 4201 | ||
4201 | if ( info->irq_requested ) { | 4202 | if ( info->irq_requested ) { |
4202 | free_irq(info->irq_level, info); | 4203 | free_irq(info->irq_level, info); |
4203 | info->irq_requested = 0; | 4204 | info->irq_requested = false; |
4204 | } | 4205 | } |
4205 | if ( info->dma_requested ) { | 4206 | if ( info->dma_requested ) { |
4206 | disable_dma(info->dma_level); | 4207 | disable_dma(info->dma_level); |
4207 | free_dma(info->dma_level); | 4208 | free_dma(info->dma_level); |
4208 | info->dma_requested = 0; | 4209 | info->dma_requested = false; |
4209 | } | 4210 | } |
4210 | mgsl_free_dma_buffers(info); | 4211 | mgsl_free_dma_buffers(info); |
4211 | mgsl_free_intermediate_rxbuffer_memory(info); | 4212 | mgsl_free_intermediate_rxbuffer_memory(info); |
@@ -4213,15 +4214,15 @@ static void mgsl_release_resources(struct mgsl_struct *info) | |||
4213 | 4214 | ||
4214 | if ( info->io_addr_requested ) { | 4215 | if ( info->io_addr_requested ) { |
4215 | release_region(info->io_base,info->io_addr_size); | 4216 | release_region(info->io_base,info->io_addr_size); |
4216 | info->io_addr_requested = 0; | 4217 | info->io_addr_requested = false; |
4217 | } | 4218 | } |
4218 | if ( info->shared_mem_requested ) { | 4219 | if ( info->shared_mem_requested ) { |
4219 | release_mem_region(info->phys_memory_base,0x40000); | 4220 | release_mem_region(info->phys_memory_base,0x40000); |
4220 | info->shared_mem_requested = 0; | 4221 | info->shared_mem_requested = false; |
4221 | } | 4222 | } |
4222 | if ( info->lcr_mem_requested ) { | 4223 | if ( info->lcr_mem_requested ) { |
4223 | release_mem_region(info->phys_lcr_base + info->lcr_offset,128); | 4224 | release_mem_region(info->phys_lcr_base + info->lcr_offset,128); |
4224 | info->lcr_mem_requested = 0; | 4225 | info->lcr_mem_requested = false; |
4225 | } | 4226 | } |
4226 | if (info->memory_base){ | 4227 | if (info->memory_base){ |
4227 | iounmap(info->memory_base); | 4228 | iounmap(info->memory_base); |
@@ -4486,7 +4487,7 @@ static int __init synclink_init(void) | |||
4486 | if ((rc = pci_register_driver(&synclink_pci_driver)) < 0) | 4487 | if ((rc = pci_register_driver(&synclink_pci_driver)) < 0) |
4487 | printk("%s:failed to register PCI driver, error=%d\n",__FILE__,rc); | 4488 | printk("%s:failed to register PCI driver, error=%d\n",__FILE__,rc); |
4488 | else | 4489 | else |
4489 | pci_registered = 1; | 4490 | pci_registered = true; |
4490 | 4491 | ||
4491 | if ((rc = mgsl_init_tty()) < 0) | 4492 | if ((rc = mgsl_init_tty()) < 0) |
4492 | goto error; | 4493 | goto error; |
@@ -4679,7 +4680,7 @@ static u16 usc_InReg( struct mgsl_struct *info, u16 RegAddr ) | |||
4679 | static void usc_set_sdlc_mode( struct mgsl_struct *info ) | 4680 | static void usc_set_sdlc_mode( struct mgsl_struct *info ) |
4680 | { | 4681 | { |
4681 | u16 RegValue; | 4682 | u16 RegValue; |
4682 | int PreSL1660; | 4683 | bool PreSL1660; |
4683 | 4684 | ||
4684 | /* | 4685 | /* |
4685 | * determine if the IUSC on the adapter is pre-SL1660. If | 4686 | * determine if the IUSC on the adapter is pre-SL1660. If |
@@ -4692,11 +4693,7 @@ static void usc_set_sdlc_mode( struct mgsl_struct *info ) | |||
4692 | */ | 4693 | */ |
4693 | usc_OutReg(info,TMCR,0x1f); | 4694 | usc_OutReg(info,TMCR,0x1f); |
4694 | RegValue=usc_InReg(info,TMDR); | 4695 | RegValue=usc_InReg(info,TMDR); |
4695 | if ( RegValue == IUSC_PRE_SL1660 ) | 4696 | PreSL1660 = (RegValue == IUSC_PRE_SL1660); |
4696 | PreSL1660 = 1; | ||
4697 | else | ||
4698 | PreSL1660 = 0; | ||
4699 | |||
4700 | 4697 | ||
4701 | if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) | 4698 | if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) |
4702 | { | 4699 | { |
@@ -5382,9 +5379,9 @@ static void usc_process_rxoverrun_sync( struct mgsl_struct *info ) | |||
5382 | int start_index; | 5379 | int start_index; |
5383 | int end_index; | 5380 | int end_index; |
5384 | int frame_start_index; | 5381 | int frame_start_index; |
5385 | int start_of_frame_found = FALSE; | 5382 | bool start_of_frame_found = false; |
5386 | int end_of_frame_found = FALSE; | 5383 | bool end_of_frame_found = false; |
5387 | int reprogram_dma = FALSE; | 5384 | bool reprogram_dma = false; |
5388 | 5385 | ||
5389 | DMABUFFERENTRY *buffer_list = info->rx_buffer_list; | 5386 | DMABUFFERENTRY *buffer_list = info->rx_buffer_list; |
5390 | u32 phys_addr; | 5387 | u32 phys_addr; |
@@ -5410,9 +5407,9 @@ static void usc_process_rxoverrun_sync( struct mgsl_struct *info ) | |||
5410 | 5407 | ||
5411 | if ( !start_of_frame_found ) | 5408 | if ( !start_of_frame_found ) |
5412 | { | 5409 | { |
5413 | start_of_frame_found = TRUE; | 5410 | start_of_frame_found = true; |
5414 | frame_start_index = end_index; | 5411 | frame_start_index = end_index; |
5415 | end_of_frame_found = FALSE; | 5412 | end_of_frame_found = false; |
5416 | } | 5413 | } |
5417 | 5414 | ||
5418 | if ( buffer_list[end_index].status ) | 5415 | if ( buffer_list[end_index].status ) |
@@ -5423,8 +5420,8 @@ static void usc_process_rxoverrun_sync( struct mgsl_struct *info ) | |||
5423 | /* We want to leave the buffers for this frame intact. */ | 5420 | /* We want to leave the buffers for this frame intact. */ |
5424 | /* Move on to next possible frame. */ | 5421 | /* Move on to next possible frame. */ |
5425 | 5422 | ||
5426 | start_of_frame_found = FALSE; | 5423 | start_of_frame_found = false; |
5427 | end_of_frame_found = TRUE; | 5424 | end_of_frame_found = true; |
5428 | } | 5425 | } |
5429 | 5426 | ||
5430 | /* advance to next buffer entry in linked list */ | 5427 | /* advance to next buffer entry in linked list */ |
@@ -5439,8 +5436,8 @@ static void usc_process_rxoverrun_sync( struct mgsl_struct *info ) | |||
5439 | /* completely screwed, reset all receive buffers! */ | 5436 | /* completely screwed, reset all receive buffers! */ |
5440 | mgsl_reset_rx_dma_buffers( info ); | 5437 | mgsl_reset_rx_dma_buffers( info ); |
5441 | frame_start_index = 0; | 5438 | frame_start_index = 0; |
5442 | start_of_frame_found = FALSE; | 5439 | start_of_frame_found = false; |
5443 | reprogram_dma = TRUE; | 5440 | reprogram_dma = true; |
5444 | break; | 5441 | break; |
5445 | } | 5442 | } |
5446 | } | 5443 | } |
@@ -5466,7 +5463,7 @@ static void usc_process_rxoverrun_sync( struct mgsl_struct *info ) | |||
5466 | 5463 | ||
5467 | } while( start_index != end_index ); | 5464 | } while( start_index != end_index ); |
5468 | 5465 | ||
5469 | reprogram_dma = TRUE; | 5466 | reprogram_dma = true; |
5470 | } | 5467 | } |
5471 | 5468 | ||
5472 | if ( reprogram_dma ) | 5469 | if ( reprogram_dma ) |
@@ -5536,9 +5533,9 @@ static void usc_stop_receiver( struct mgsl_struct *info ) | |||
5536 | usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); | 5533 | usc_OutReg( info, CCSR, (u16)(usc_InReg(info,CCSR) | BIT13) ); |
5537 | usc_RTCmd( info, RTCmd_PurgeRxFifo ); | 5534 | usc_RTCmd( info, RTCmd_PurgeRxFifo ); |
5538 | 5535 | ||
5539 | info->rx_enabled = 0; | 5536 | info->rx_enabled = false; |
5540 | info->rx_overflow = 0; | 5537 | info->rx_overflow = false; |
5541 | info->rx_rcc_underrun = 0; | 5538 | info->rx_rcc_underrun = false; |
5542 | 5539 | ||
5543 | } /* end of stop_receiver() */ | 5540 | } /* end of stop_receiver() */ |
5544 | 5541 | ||
@@ -5601,7 +5598,7 @@ static void usc_start_receiver( struct mgsl_struct *info ) | |||
5601 | 5598 | ||
5602 | usc_OutReg( info, CCSR, 0x1020 ); | 5599 | usc_OutReg( info, CCSR, 0x1020 ); |
5603 | 5600 | ||
5604 | info->rx_enabled = 1; | 5601 | info->rx_enabled = true; |
5605 | 5602 | ||
5606 | } /* end of usc_start_receiver() */ | 5603 | } /* end of usc_start_receiver() */ |
5607 | 5604 | ||
@@ -5628,14 +5625,14 @@ static void usc_start_transmitter( struct mgsl_struct *info ) | |||
5628 | /* RTS and set a flag indicating that the driver should */ | 5625 | /* RTS and set a flag indicating that the driver should */ |
5629 | /* negate RTS when the transmission completes. */ | 5626 | /* negate RTS when the transmission completes. */ |
5630 | 5627 | ||
5631 | info->drop_rts_on_tx_done = 0; | 5628 | info->drop_rts_on_tx_done = false; |
5632 | 5629 | ||
5633 | if ( info->params.flags & HDLC_FLAG_AUTO_RTS ) { | 5630 | if ( info->params.flags & HDLC_FLAG_AUTO_RTS ) { |
5634 | usc_get_serial_signals( info ); | 5631 | usc_get_serial_signals( info ); |
5635 | if ( !(info->serial_signals & SerialSignal_RTS) ) { | 5632 | if ( !(info->serial_signals & SerialSignal_RTS) ) { |
5636 | info->serial_signals |= SerialSignal_RTS; | 5633 | info->serial_signals |= SerialSignal_RTS; |
5637 | usc_set_serial_signals( info ); | 5634 | usc_set_serial_signals( info ); |
5638 | info->drop_rts_on_tx_done = 1; | 5635 | info->drop_rts_on_tx_done = true; |
5639 | } | 5636 | } |
5640 | } | 5637 | } |
5641 | 5638 | ||
@@ -5699,11 +5696,11 @@ static void usc_start_transmitter( struct mgsl_struct *info ) | |||
5699 | mod_timer(&info->tx_timer, jiffies + | 5696 | mod_timer(&info->tx_timer, jiffies + |
5700 | msecs_to_jiffies(5000)); | 5697 | msecs_to_jiffies(5000)); |
5701 | } | 5698 | } |
5702 | info->tx_active = 1; | 5699 | info->tx_active = true; |
5703 | } | 5700 | } |
5704 | 5701 | ||
5705 | if ( !info->tx_enabled ) { | 5702 | if ( !info->tx_enabled ) { |
5706 | info->tx_enabled = 1; | 5703 | info->tx_enabled = true; |
5707 | if ( info->params.flags & HDLC_FLAG_AUTO_CTS ) | 5704 | if ( info->params.flags & HDLC_FLAG_AUTO_CTS ) |
5708 | usc_EnableTransmitter(info,ENABLE_AUTO_CTS); | 5705 | usc_EnableTransmitter(info,ENABLE_AUTO_CTS); |
5709 | else | 5706 | else |
@@ -5735,8 +5732,8 @@ static void usc_stop_transmitter( struct mgsl_struct *info ) | |||
5735 | usc_DmaCmd( info, DmaCmd_ResetTxChannel ); | 5732 | usc_DmaCmd( info, DmaCmd_ResetTxChannel ); |
5736 | usc_RTCmd( info, RTCmd_PurgeTxFifo ); | 5733 | usc_RTCmd( info, RTCmd_PurgeTxFifo ); |
5737 | 5734 | ||
5738 | info->tx_enabled = 0; | 5735 | info->tx_enabled = false; |
5739 | info->tx_active = 0; | 5736 | info->tx_active = false; |
5740 | 5737 | ||
5741 | } /* end of usc_stop_transmitter() */ | 5738 | } /* end of usc_stop_transmitter() */ |
5742 | 5739 | ||
@@ -6520,7 +6517,7 @@ static void mgsl_reset_rx_dma_buffers( struct mgsl_struct *info ) | |||
6520 | */ | 6517 | */ |
6521 | static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned int EndIndex ) | 6518 | static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int StartIndex, unsigned int EndIndex ) |
6522 | { | 6519 | { |
6523 | int Done = 0; | 6520 | bool Done = false; |
6524 | DMABUFFERENTRY *pBufEntry; | 6521 | DMABUFFERENTRY *pBufEntry; |
6525 | unsigned int Index; | 6522 | unsigned int Index; |
6526 | 6523 | ||
@@ -6534,7 +6531,7 @@ static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int S | |||
6534 | 6531 | ||
6535 | if ( Index == EndIndex ) { | 6532 | if ( Index == EndIndex ) { |
6536 | /* This is the last buffer of the frame! */ | 6533 | /* This is the last buffer of the frame! */ |
6537 | Done = 1; | 6534 | Done = true; |
6538 | } | 6535 | } |
6539 | 6536 | ||
6540 | /* reset current buffer for reuse */ | 6537 | /* reset current buffer for reuse */ |
@@ -6559,18 +6556,18 @@ static void mgsl_free_rx_frame_buffers( struct mgsl_struct *info, unsigned int S | |||
6559 | * receive DMA buffers. Only frames received without errors are returned. | 6556 | * receive DMA buffers. Only frames received without errors are returned. |
6560 | * | 6557 | * |
6561 | * Arguments: info pointer to device extension | 6558 | * Arguments: info pointer to device extension |
6562 | * Return Value: 1 if frame returned, otherwise 0 | 6559 | * Return Value: true if frame returned, otherwise false |
6563 | */ | 6560 | */ |
6564 | static int mgsl_get_rx_frame(struct mgsl_struct *info) | 6561 | static bool mgsl_get_rx_frame(struct mgsl_struct *info) |
6565 | { | 6562 | { |
6566 | unsigned int StartIndex, EndIndex; /* index of 1st and last buffers of Rx frame */ | 6563 | unsigned int StartIndex, EndIndex; /* index of 1st and last buffers of Rx frame */ |
6567 | unsigned short status; | 6564 | unsigned short status; |
6568 | DMABUFFERENTRY *pBufEntry; | 6565 | DMABUFFERENTRY *pBufEntry; |
6569 | unsigned int framesize = 0; | 6566 | unsigned int framesize = 0; |
6570 | int ReturnCode = 0; | 6567 | bool ReturnCode = false; |
6571 | unsigned long flags; | 6568 | unsigned long flags; |
6572 | struct tty_struct *tty = info->tty; | 6569 | struct tty_struct *tty = info->tty; |
6573 | int return_frame = 0; | 6570 | bool return_frame = false; |
6574 | 6571 | ||
6575 | /* | 6572 | /* |
6576 | * current_rx_buffer points to the 1st buffer of the next available | 6573 | * current_rx_buffer points to the 1st buffer of the next available |
@@ -6629,7 +6626,7 @@ static int mgsl_get_rx_frame(struct mgsl_struct *info) | |||
6629 | else { | 6626 | else { |
6630 | info->icount.rxcrc++; | 6627 | info->icount.rxcrc++; |
6631 | if ( info->params.crc_type & HDLC_CRC_RETURN_EX ) | 6628 | if ( info->params.crc_type & HDLC_CRC_RETURN_EX ) |
6632 | return_frame = 1; | 6629 | return_frame = true; |
6633 | } | 6630 | } |
6634 | framesize = 0; | 6631 | framesize = 0; |
6635 | #if SYNCLINK_GENERIC_HDLC | 6632 | #if SYNCLINK_GENERIC_HDLC |
@@ -6640,7 +6637,7 @@ static int mgsl_get_rx_frame(struct mgsl_struct *info) | |||
6640 | } | 6637 | } |
6641 | #endif | 6638 | #endif |
6642 | } else | 6639 | } else |
6643 | return_frame = 1; | 6640 | return_frame = true; |
6644 | 6641 | ||
6645 | if ( return_frame ) { | 6642 | if ( return_frame ) { |
6646 | /* receive frame has no errors, get frame size. | 6643 | /* receive frame has no errors, get frame size. |
@@ -6719,7 +6716,7 @@ static int mgsl_get_rx_frame(struct mgsl_struct *info) | |||
6719 | /* Free the buffers used by this frame. */ | 6716 | /* Free the buffers used by this frame. */ |
6720 | mgsl_free_rx_frame_buffers( info, StartIndex, EndIndex ); | 6717 | mgsl_free_rx_frame_buffers( info, StartIndex, EndIndex ); |
6721 | 6718 | ||
6722 | ReturnCode = 1; | 6719 | ReturnCode = true; |
6723 | 6720 | ||
6724 | Cleanup: | 6721 | Cleanup: |
6725 | 6722 | ||
@@ -6758,15 +6755,15 @@ Cleanup: | |||
6758 | * last Rx DMA buffer and return that last portion of the frame. | 6755 | * last Rx DMA buffer and return that last portion of the frame. |
6759 | * | 6756 | * |
6760 | * Arguments: info pointer to device extension | 6757 | * Arguments: info pointer to device extension |
6761 | * Return Value: 1 if frame returned, otherwise 0 | 6758 | * Return Value: true if frame returned, otherwise false |
6762 | */ | 6759 | */ |
6763 | static int mgsl_get_raw_rx_frame(struct mgsl_struct *info) | 6760 | static bool mgsl_get_raw_rx_frame(struct mgsl_struct *info) |
6764 | { | 6761 | { |
6765 | unsigned int CurrentIndex, NextIndex; | 6762 | unsigned int CurrentIndex, NextIndex; |
6766 | unsigned short status; | 6763 | unsigned short status; |
6767 | DMABUFFERENTRY *pBufEntry; | 6764 | DMABUFFERENTRY *pBufEntry; |
6768 | unsigned int framesize = 0; | 6765 | unsigned int framesize = 0; |
6769 | int ReturnCode = 0; | 6766 | bool ReturnCode = false; |
6770 | unsigned long flags; | 6767 | unsigned long flags; |
6771 | struct tty_struct *tty = info->tty; | 6768 | struct tty_struct *tty = info->tty; |
6772 | 6769 | ||
@@ -6891,7 +6888,7 @@ static int mgsl_get_raw_rx_frame(struct mgsl_struct *info) | |||
6891 | /* Free the buffers used by this frame. */ | 6888 | /* Free the buffers used by this frame. */ |
6892 | mgsl_free_rx_frame_buffers( info, CurrentIndex, CurrentIndex ); | 6889 | mgsl_free_rx_frame_buffers( info, CurrentIndex, CurrentIndex ); |
6893 | 6890 | ||
6894 | ReturnCode = 1; | 6891 | ReturnCode = true; |
6895 | } | 6892 | } |
6896 | 6893 | ||
6897 | 6894 | ||
@@ -7000,15 +6997,15 @@ static void mgsl_load_tx_dma_buffer(struct mgsl_struct *info, | |||
7000 | * Performs a register test of the 16C32. | 6997 | * Performs a register test of the 16C32. |
7001 | * | 6998 | * |
7002 | * Arguments: info pointer to device instance data | 6999 | * Arguments: info pointer to device instance data |
7003 | * Return Value: TRUE if test passed, otherwise FALSE | 7000 | * Return Value: true if test passed, otherwise false |
7004 | */ | 7001 | */ |
7005 | static BOOLEAN mgsl_register_test( struct mgsl_struct *info ) | 7002 | static bool mgsl_register_test( struct mgsl_struct *info ) |
7006 | { | 7003 | { |
7007 | static unsigned short BitPatterns[] = | 7004 | static unsigned short BitPatterns[] = |
7008 | { 0x0000, 0xffff, 0xaaaa, 0x5555, 0x1234, 0x6969, 0x9696, 0x0f0f }; | 7005 | { 0x0000, 0xffff, 0xaaaa, 0x5555, 0x1234, 0x6969, 0x9696, 0x0f0f }; |
7009 | static unsigned int Patterncount = ARRAY_SIZE(BitPatterns); | 7006 | static unsigned int Patterncount = ARRAY_SIZE(BitPatterns); |
7010 | unsigned int i; | 7007 | unsigned int i; |
7011 | BOOLEAN rc = TRUE; | 7008 | bool rc = true; |
7012 | unsigned long flags; | 7009 | unsigned long flags; |
7013 | 7010 | ||
7014 | spin_lock_irqsave(&info->irq_spinlock,flags); | 7011 | spin_lock_irqsave(&info->irq_spinlock,flags); |
@@ -7019,10 +7016,10 @@ static BOOLEAN mgsl_register_test( struct mgsl_struct *info ) | |||
7019 | if ( (usc_InReg( info, SICR ) != 0) || | 7016 | if ( (usc_InReg( info, SICR ) != 0) || |
7020 | (usc_InReg( info, IVR ) != 0) || | 7017 | (usc_InReg( info, IVR ) != 0) || |
7021 | (usc_InDmaReg( info, DIVR ) != 0) ){ | 7018 | (usc_InDmaReg( info, DIVR ) != 0) ){ |
7022 | rc = FALSE; | 7019 | rc = false; |
7023 | } | 7020 | } |
7024 | 7021 | ||
7025 | if ( rc == TRUE ){ | 7022 | if ( rc ){ |
7026 | /* Write bit patterns to various registers but do it out of */ | 7023 | /* Write bit patterns to various registers but do it out of */ |
7027 | /* sync, then read back and verify values. */ | 7024 | /* sync, then read back and verify values. */ |
7028 | 7025 | ||
@@ -7040,7 +7037,7 @@ static BOOLEAN mgsl_register_test( struct mgsl_struct *info ) | |||
7040 | (usc_InReg( info, RCLR ) != BitPatterns[(i+3)%Patterncount]) || | 7037 | (usc_InReg( info, RCLR ) != BitPatterns[(i+3)%Patterncount]) || |
7041 | (usc_InReg( info, RSR ) != BitPatterns[(i+4)%Patterncount]) || | 7038 | (usc_InReg( info, RSR ) != BitPatterns[(i+4)%Patterncount]) || |
7042 | (usc_InDmaReg( info, TBCR ) != BitPatterns[(i+5)%Patterncount]) ){ | 7039 | (usc_InDmaReg( info, TBCR ) != BitPatterns[(i+5)%Patterncount]) ){ |
7043 | rc = FALSE; | 7040 | rc = false; |
7044 | break; | 7041 | break; |
7045 | } | 7042 | } |
7046 | } | 7043 | } |
@@ -7056,9 +7053,9 @@ static BOOLEAN mgsl_register_test( struct mgsl_struct *info ) | |||
7056 | /* mgsl_irq_test() Perform interrupt test of the 16C32. | 7053 | /* mgsl_irq_test() Perform interrupt test of the 16C32. |
7057 | * | 7054 | * |
7058 | * Arguments: info pointer to device instance data | 7055 | * Arguments: info pointer to device instance data |
7059 | * Return Value: TRUE if test passed, otherwise FALSE | 7056 | * Return Value: true if test passed, otherwise false |
7060 | */ | 7057 | */ |
7061 | static BOOLEAN mgsl_irq_test( struct mgsl_struct *info ) | 7058 | static bool mgsl_irq_test( struct mgsl_struct *info ) |
7062 | { | 7059 | { |
7063 | unsigned long EndTime; | 7060 | unsigned long EndTime; |
7064 | unsigned long flags; | 7061 | unsigned long flags; |
@@ -7068,10 +7065,10 @@ static BOOLEAN mgsl_irq_test( struct mgsl_struct *info ) | |||
7068 | 7065 | ||
7069 | /* | 7066 | /* |
7070 | * Setup 16C32 to interrupt on TxC pin (14MHz clock) transition. | 7067 | * Setup 16C32 to interrupt on TxC pin (14MHz clock) transition. |
7071 | * The ISR sets irq_occurred to 1. | 7068 | * The ISR sets irq_occurred to true. |
7072 | */ | 7069 | */ |
7073 | 7070 | ||
7074 | info->irq_occurred = FALSE; | 7071 | info->irq_occurred = false; |
7075 | 7072 | ||
7076 | /* Enable INTEN gate for ISA adapter (Port 6, Bit12) */ | 7073 | /* Enable INTEN gate for ISA adapter (Port 6, Bit12) */ |
7077 | /* Enable INTEN (Port 6, Bit12) */ | 7074 | /* Enable INTEN (Port 6, Bit12) */ |
@@ -7097,10 +7094,7 @@ static BOOLEAN mgsl_irq_test( struct mgsl_struct *info ) | |||
7097 | usc_reset(info); | 7094 | usc_reset(info); |
7098 | spin_unlock_irqrestore(&info->irq_spinlock,flags); | 7095 | spin_unlock_irqrestore(&info->irq_spinlock,flags); |
7099 | 7096 | ||
7100 | if ( !info->irq_occurred ) | 7097 | return info->irq_occurred; |
7101 | return FALSE; | ||
7102 | else | ||
7103 | return TRUE; | ||
7104 | 7098 | ||
7105 | } /* end of mgsl_irq_test() */ | 7099 | } /* end of mgsl_irq_test() */ |
7106 | 7100 | ||
@@ -7111,16 +7105,16 @@ static BOOLEAN mgsl_irq_test( struct mgsl_struct *info ) | |||
7111 | * using single buffer DMA mode. | 7105 | * using single buffer DMA mode. |
7112 | * | 7106 | * |
7113 | * Arguments: info pointer to device instance data | 7107 | * Arguments: info pointer to device instance data |
7114 | * Return Value: TRUE if test passed, otherwise FALSE | 7108 | * Return Value: true if test passed, otherwise false |
7115 | */ | 7109 | */ |
7116 | static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | 7110 | static bool mgsl_dma_test( struct mgsl_struct *info ) |
7117 | { | 7111 | { |
7118 | unsigned short FifoLevel; | 7112 | unsigned short FifoLevel; |
7119 | unsigned long phys_addr; | 7113 | unsigned long phys_addr; |
7120 | unsigned int FrameSize; | 7114 | unsigned int FrameSize; |
7121 | unsigned int i; | 7115 | unsigned int i; |
7122 | char *TmpPtr; | 7116 | char *TmpPtr; |
7123 | BOOLEAN rc = TRUE; | 7117 | bool rc = true; |
7124 | unsigned short status=0; | 7118 | unsigned short status=0; |
7125 | unsigned long EndTime; | 7119 | unsigned long EndTime; |
7126 | unsigned long flags; | 7120 | unsigned long flags; |
@@ -7233,7 +7227,7 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7233 | 7227 | ||
7234 | for(;;) { | 7228 | for(;;) { |
7235 | if (time_after(jiffies, EndTime)) { | 7229 | if (time_after(jiffies, EndTime)) { |
7236 | rc = FALSE; | 7230 | rc = false; |
7237 | break; | 7231 | break; |
7238 | } | 7232 | } |
7239 | 7233 | ||
@@ -7289,7 +7283,7 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7289 | 7283 | ||
7290 | for(;;) { | 7284 | for(;;) { |
7291 | if (time_after(jiffies, EndTime)) { | 7285 | if (time_after(jiffies, EndTime)) { |
7292 | rc = FALSE; | 7286 | rc = false; |
7293 | break; | 7287 | break; |
7294 | } | 7288 | } |
7295 | 7289 | ||
@@ -7309,7 +7303,7 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7309 | } | 7303 | } |
7310 | 7304 | ||
7311 | 7305 | ||
7312 | if ( rc == TRUE ) | 7306 | if ( rc ) |
7313 | { | 7307 | { |
7314 | /* Enable 16C32 transmitter. */ | 7308 | /* Enable 16C32 transmitter. */ |
7315 | 7309 | ||
@@ -7337,7 +7331,7 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7337 | 7331 | ||
7338 | while ( !(status & (BIT6+BIT5+BIT4+BIT2+BIT1)) ) { | 7332 | while ( !(status & (BIT6+BIT5+BIT4+BIT2+BIT1)) ) { |
7339 | if (time_after(jiffies, EndTime)) { | 7333 | if (time_after(jiffies, EndTime)) { |
7340 | rc = FALSE; | 7334 | rc = false; |
7341 | break; | 7335 | break; |
7342 | } | 7336 | } |
7343 | 7337 | ||
@@ -7348,13 +7342,13 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7348 | } | 7342 | } |
7349 | 7343 | ||
7350 | 7344 | ||
7351 | if ( rc == TRUE ){ | 7345 | if ( rc ){ |
7352 | /* CHECK FOR TRANSMIT ERRORS */ | 7346 | /* CHECK FOR TRANSMIT ERRORS */ |
7353 | if ( status & (BIT5 + BIT1) ) | 7347 | if ( status & (BIT5 + BIT1) ) |
7354 | rc = FALSE; | 7348 | rc = false; |
7355 | } | 7349 | } |
7356 | 7350 | ||
7357 | if ( rc == TRUE ) { | 7351 | if ( rc ) { |
7358 | /* WAIT FOR RECEIVE COMPLETE */ | 7352 | /* WAIT FOR RECEIVE COMPLETE */ |
7359 | 7353 | ||
7360 | /* Wait 100ms */ | 7354 | /* Wait 100ms */ |
@@ -7364,7 +7358,7 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7364 | status=info->rx_buffer_list[0].status; | 7358 | status=info->rx_buffer_list[0].status; |
7365 | while ( status == 0 ) { | 7359 | while ( status == 0 ) { |
7366 | if (time_after(jiffies, EndTime)) { | 7360 | if (time_after(jiffies, EndTime)) { |
7367 | rc = FALSE; | 7361 | rc = false; |
7368 | break; | 7362 | break; |
7369 | } | 7363 | } |
7370 | status=info->rx_buffer_list[0].status; | 7364 | status=info->rx_buffer_list[0].status; |
@@ -7372,17 +7366,17 @@ static BOOLEAN mgsl_dma_test( struct mgsl_struct *info ) | |||
7372 | } | 7366 | } |
7373 | 7367 | ||
7374 | 7368 | ||
7375 | if ( rc == TRUE ) { | 7369 | if ( rc ) { |
7376 | /* CHECK FOR RECEIVE ERRORS */ | 7370 | /* CHECK FOR RECEIVE ERRORS */ |
7377 | status = info->rx_buffer_list[0].status; | 7371 | status = info->rx_buffer_list[0].status; |
7378 | 7372 | ||
7379 | if ( status & (BIT8 + BIT3 + BIT1) ) { | 7373 | if ( status & (BIT8 + BIT3 + BIT1) ) { |
7380 | /* receive error has occurred */ | 7374 | /* receive error has occurred */ |
7381 | rc = FALSE; | 7375 | rc = false; |
7382 | } else { | 7376 | } else { |
7383 | if ( memcmp( info->tx_buffer_list[0].virt_addr , | 7377 | if ( memcmp( info->tx_buffer_list[0].virt_addr , |
7384 | info->rx_buffer_list[0].virt_addr, FrameSize ) ){ | 7378 | info->rx_buffer_list[0].virt_addr, FrameSize ) ){ |
7385 | rc = FALSE; | 7379 | rc = false; |
7386 | } | 7380 | } |
7387 | } | 7381 | } |
7388 | } | 7382 | } |
@@ -7445,9 +7439,9 @@ static int mgsl_adapter_test( struct mgsl_struct *info ) | |||
7445 | * Test the shared memory on a PCI adapter. | 7439 | * Test the shared memory on a PCI adapter. |
7446 | * | 7440 | * |
7447 | * Arguments: info pointer to device instance data | 7441 | * Arguments: info pointer to device instance data |
7448 | * Return Value: TRUE if test passed, otherwise FALSE | 7442 | * Return Value: true if test passed, otherwise false |
7449 | */ | 7443 | */ |
7450 | static BOOLEAN mgsl_memory_test( struct mgsl_struct *info ) | 7444 | static bool mgsl_memory_test( struct mgsl_struct *info ) |
7451 | { | 7445 | { |
7452 | static unsigned long BitPatterns[] = | 7446 | static unsigned long BitPatterns[] = |
7453 | { 0x0, 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999, 0xffffffff, 0x12345678 }; | 7447 | { 0x0, 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999, 0xffffffff, 0x12345678 }; |
@@ -7457,7 +7451,7 @@ static BOOLEAN mgsl_memory_test( struct mgsl_struct *info ) | |||
7457 | unsigned long * TestAddr; | 7451 | unsigned long * TestAddr; |
7458 | 7452 | ||
7459 | if ( info->bus_type != MGSL_BUS_TYPE_PCI ) | 7453 | if ( info->bus_type != MGSL_BUS_TYPE_PCI ) |
7460 | return TRUE; | 7454 | return true; |
7461 | 7455 | ||
7462 | TestAddr = (unsigned long *)info->memory_base; | 7456 | TestAddr = (unsigned long *)info->memory_base; |
7463 | 7457 | ||
@@ -7466,7 +7460,7 @@ static BOOLEAN mgsl_memory_test( struct mgsl_struct *info ) | |||
7466 | for ( i = 0 ; i < Patterncount ; i++ ) { | 7460 | for ( i = 0 ; i < Patterncount ; i++ ) { |
7467 | *TestAddr = BitPatterns[i]; | 7461 | *TestAddr = BitPatterns[i]; |
7468 | if ( *TestAddr != BitPatterns[i] ) | 7462 | if ( *TestAddr != BitPatterns[i] ) |
7469 | return FALSE; | 7463 | return false; |
7470 | } | 7464 | } |
7471 | 7465 | ||
7472 | /* Test address lines with incrementing pattern over */ | 7466 | /* Test address lines with incrementing pattern over */ |
@@ -7481,13 +7475,13 @@ static BOOLEAN mgsl_memory_test( struct mgsl_struct *info ) | |||
7481 | 7475 | ||
7482 | for ( i = 0 ; i < TestLimit ; i++ ) { | 7476 | for ( i = 0 ; i < TestLimit ; i++ ) { |
7483 | if ( *TestAddr != i * 4 ) | 7477 | if ( *TestAddr != i * 4 ) |
7484 | return FALSE; | 7478 | return false; |
7485 | TestAddr++; | 7479 | TestAddr++; |
7486 | } | 7480 | } |
7487 | 7481 | ||
7488 | memset( info->memory_base, 0, SHARED_MEM_ADDRESS_SIZE ); | 7482 | memset( info->memory_base, 0, SHARED_MEM_ADDRESS_SIZE ); |
7489 | 7483 | ||
7490 | return TRUE; | 7484 | return true; |
7491 | 7485 | ||
7492 | } /* End Of mgsl_memory_test() */ | 7486 | } /* End Of mgsl_memory_test() */ |
7493 | 7487 | ||
@@ -7604,7 +7598,7 @@ static void mgsl_tx_timeout(unsigned long context) | |||
7604 | info->icount.txtimeout++; | 7598 | info->icount.txtimeout++; |
7605 | } | 7599 | } |
7606 | spin_lock_irqsave(&info->irq_spinlock,flags); | 7600 | spin_lock_irqsave(&info->irq_spinlock,flags); |
7607 | info->tx_active = 0; | 7601 | info->tx_active = false; |
7608 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | 7602 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
7609 | 7603 | ||
7610 | if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) | 7604 | if ( info->params.flags & HDLC_FLAG_HDLC_LOOPMODE ) |
@@ -7632,7 +7626,7 @@ static int mgsl_loopmode_send_done( struct mgsl_struct * info ) | |||
7632 | spin_lock_irqsave(&info->irq_spinlock,flags); | 7626 | spin_lock_irqsave(&info->irq_spinlock,flags); |
7633 | if (info->params.flags & HDLC_FLAG_HDLC_LOOPMODE) { | 7627 | if (info->params.flags & HDLC_FLAG_HDLC_LOOPMODE) { |
7634 | if (info->tx_active) | 7628 | if (info->tx_active) |
7635 | info->loopmode_send_done_requested = TRUE; | 7629 | info->loopmode_send_done_requested = true; |
7636 | else | 7630 | else |
7637 | usc_loopmode_send_done(info); | 7631 | usc_loopmode_send_done(info); |
7638 | } | 7632 | } |
@@ -7646,7 +7640,7 @@ static int mgsl_loopmode_send_done( struct mgsl_struct * info ) | |||
7646 | */ | 7640 | */ |
7647 | static void usc_loopmode_send_done( struct mgsl_struct * info ) | 7641 | static void usc_loopmode_send_done( struct mgsl_struct * info ) |
7648 | { | 7642 | { |
7649 | info->loopmode_send_done_requested = FALSE; | 7643 | info->loopmode_send_done_requested = false; |
7650 | /* clear CMR:13 to 0 to start echoing RxData to TxData */ | 7644 | /* clear CMR:13 to 0 to start echoing RxData to TxData */ |
7651 | info->cmr_value &= ~BIT13; | 7645 | info->cmr_value &= ~BIT13; |
7652 | usc_OutReg(info, CMR, info->cmr_value); | 7646 | usc_OutReg(info, CMR, info->cmr_value); |
@@ -7668,7 +7662,7 @@ static void usc_loopmode_cancel_transmit( struct mgsl_struct * info ) | |||
7668 | */ | 7662 | */ |
7669 | static void usc_loopmode_insert_request( struct mgsl_struct * info ) | 7663 | static void usc_loopmode_insert_request( struct mgsl_struct * info ) |
7670 | { | 7664 | { |
7671 | info->loopmode_insert_requested = TRUE; | 7665 | info->loopmode_insert_requested = true; |
7672 | 7666 | ||
7673 | /* enable RxAbort irq. On next RxAbort, clear CMR:13 to | 7667 | /* enable RxAbort irq. On next RxAbort, clear CMR:13 to |
7674 | * begin repeating TxData on RxData (complete insertion) | 7668 | * begin repeating TxData on RxData (complete insertion) |
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c index 3c89266c8255..f3d8d72e5ea4 100644 --- a/drivers/char/synclink_gt.c +++ b/drivers/char/synclink_gt.c | |||
@@ -117,7 +117,7 @@ static struct pci_driver pci_driver = { | |||
117 | .remove = __devexit_p(remove_one), | 117 | .remove = __devexit_p(remove_one), |
118 | }; | 118 | }; |
119 | 119 | ||
120 | static int pci_registered; | 120 | static bool pci_registered; |
121 | 121 | ||
122 | /* | 122 | /* |
123 | * module configuration and status | 123 | * module configuration and status |
@@ -289,12 +289,12 @@ struct slgt_info { | |||
289 | 289 | ||
290 | struct work_struct task; | 290 | struct work_struct task; |
291 | u32 pending_bh; | 291 | u32 pending_bh; |
292 | int bh_requested; | 292 | bool bh_requested; |
293 | int bh_running; | 293 | bool bh_running; |
294 | 294 | ||
295 | int isr_overflow; | 295 | int isr_overflow; |
296 | int irq_requested; /* nonzero if IRQ requested */ | 296 | bool irq_requested; /* true if IRQ requested */ |
297 | int irq_occurred; /* for diagnostics use */ | 297 | bool irq_occurred; /* for diagnostics use */ |
298 | 298 | ||
299 | /* device configuration */ | 299 | /* device configuration */ |
300 | 300 | ||
@@ -304,7 +304,7 @@ struct slgt_info { | |||
304 | 304 | ||
305 | unsigned char __iomem * reg_addr; /* memory mapped registers address */ | 305 | unsigned char __iomem * reg_addr; /* memory mapped registers address */ |
306 | u32 phys_reg_addr; | 306 | u32 phys_reg_addr; |
307 | int reg_addr_requested; | 307 | bool reg_addr_requested; |
308 | 308 | ||
309 | MGSL_PARAMS params; /* communications parameters */ | 309 | MGSL_PARAMS params; /* communications parameters */ |
310 | u32 idle_mode; | 310 | u32 idle_mode; |
@@ -315,11 +315,11 @@ struct slgt_info { | |||
315 | 315 | ||
316 | /* device status */ | 316 | /* device status */ |
317 | 317 | ||
318 | int rx_enabled; | 318 | bool rx_enabled; |
319 | int rx_restart; | 319 | bool rx_restart; |
320 | 320 | ||
321 | int tx_enabled; | 321 | bool tx_enabled; |
322 | int tx_active; | 322 | bool tx_active; |
323 | 323 | ||
324 | unsigned char signals; /* serial signal states */ | 324 | unsigned char signals; /* serial signal states */ |
325 | int init_error; /* initialization error */ | 325 | int init_error; /* initialization error */ |
@@ -329,7 +329,7 @@ struct slgt_info { | |||
329 | 329 | ||
330 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; | 330 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; |
331 | char char_buf[MAX_ASYNC_BUFFER_SIZE]; | 331 | char char_buf[MAX_ASYNC_BUFFER_SIZE]; |
332 | BOOLEAN drop_rts_on_tx_done; | 332 | bool drop_rts_on_tx_done; |
333 | struct _input_signal_events input_signal_events; | 333 | struct _input_signal_events input_signal_events; |
334 | 334 | ||
335 | int dcd_chkcount; /* check counts to prevent */ | 335 | int dcd_chkcount; /* check counts to prevent */ |
@@ -467,8 +467,8 @@ static void rx_start(struct slgt_info *info); | |||
467 | static void reset_rbufs(struct slgt_info *info); | 467 | static void reset_rbufs(struct slgt_info *info); |
468 | static void free_rbufs(struct slgt_info *info, unsigned int first, unsigned int last); | 468 | static void free_rbufs(struct slgt_info *info, unsigned int first, unsigned int last); |
469 | static void rdma_reset(struct slgt_info *info); | 469 | static void rdma_reset(struct slgt_info *info); |
470 | static int rx_get_frame(struct slgt_info *info); | 470 | static bool rx_get_frame(struct slgt_info *info); |
471 | static int rx_get_buf(struct slgt_info *info); | 471 | static bool rx_get_buf(struct slgt_info *info); |
472 | 472 | ||
473 | static void tx_start(struct slgt_info *info); | 473 | static void tx_start(struct slgt_info *info); |
474 | static void tx_stop(struct slgt_info *info); | 474 | static void tx_stop(struct slgt_info *info); |
@@ -1968,8 +1968,8 @@ static int bh_action(struct slgt_info *info) | |||
1968 | rc = BH_STATUS; | 1968 | rc = BH_STATUS; |
1969 | } else { | 1969 | } else { |
1970 | /* Mark BH routine as complete */ | 1970 | /* Mark BH routine as complete */ |
1971 | info->bh_running = 0; | 1971 | info->bh_running = false; |
1972 | info->bh_requested = 0; | 1972 | info->bh_requested = false; |
1973 | rc = 0; | 1973 | rc = 0; |
1974 | } | 1974 | } |
1975 | 1975 | ||
@@ -1988,7 +1988,7 @@ static void bh_handler(struct work_struct *work) | |||
1988 | 1988 | ||
1989 | if (!info) | 1989 | if (!info) |
1990 | return; | 1990 | return; |
1991 | info->bh_running = 1; | 1991 | info->bh_running = true; |
1992 | 1992 | ||
1993 | while((action = bh_action(info))) { | 1993 | while((action = bh_action(info))) { |
1994 | switch (action) { | 1994 | switch (action) { |
@@ -2158,7 +2158,7 @@ static void isr_serial(struct slgt_info *info) | |||
2158 | 2158 | ||
2159 | wr_reg16(info, SSR, status); /* clear pending */ | 2159 | wr_reg16(info, SSR, status); /* clear pending */ |
2160 | 2160 | ||
2161 | info->irq_occurred = 1; | 2161 | info->irq_occurred = true; |
2162 | 2162 | ||
2163 | if (info->params.mode == MGSL_MODE_ASYNC) { | 2163 | if (info->params.mode == MGSL_MODE_ASYNC) { |
2164 | if (status & IRQ_TXIDLE) { | 2164 | if (status & IRQ_TXIDLE) { |
@@ -2225,7 +2225,7 @@ static void isr_rdma(struct slgt_info *info) | |||
2225 | 2225 | ||
2226 | if (status & (BIT5 + BIT4)) { | 2226 | if (status & (BIT5 + BIT4)) { |
2227 | DBGISR(("%s isr_rdma rx_restart=1\n", info->device_name)); | 2227 | DBGISR(("%s isr_rdma rx_restart=1\n", info->device_name)); |
2228 | info->rx_restart = 1; | 2228 | info->rx_restart = true; |
2229 | } | 2229 | } |
2230 | info->pending_bh |= BH_RECEIVE; | 2230 | info->pending_bh |= BH_RECEIVE; |
2231 | } | 2231 | } |
@@ -2276,14 +2276,14 @@ static void isr_txeom(struct slgt_info *info, unsigned short status) | |||
2276 | info->icount.txok++; | 2276 | info->icount.txok++; |
2277 | } | 2277 | } |
2278 | 2278 | ||
2279 | info->tx_active = 0; | 2279 | info->tx_active = false; |
2280 | info->tx_count = 0; | 2280 | info->tx_count = 0; |
2281 | 2281 | ||
2282 | del_timer(&info->tx_timer); | 2282 | del_timer(&info->tx_timer); |
2283 | 2283 | ||
2284 | if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done) { | 2284 | if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done) { |
2285 | info->signals &= ~SerialSignal_RTS; | 2285 | info->signals &= ~SerialSignal_RTS; |
2286 | info->drop_rts_on_tx_done = 0; | 2286 | info->drop_rts_on_tx_done = false; |
2287 | set_signals(info); | 2287 | set_signals(info); |
2288 | } | 2288 | } |
2289 | 2289 | ||
@@ -2337,7 +2337,7 @@ static irqreturn_t slgt_interrupt(int dummy, void *dev_id) | |||
2337 | 2337 | ||
2338 | while((gsr = rd_reg32(info, GSR) & 0xffffff00)) { | 2338 | while((gsr = rd_reg32(info, GSR) & 0xffffff00)) { |
2339 | DBGISR(("%s gsr=%08x\n", info->device_name, gsr)); | 2339 | DBGISR(("%s gsr=%08x\n", info->device_name, gsr)); |
2340 | info->irq_occurred = 1; | 2340 | info->irq_occurred = true; |
2341 | for(i=0; i < info->port_count ; i++) { | 2341 | for(i=0; i < info->port_count ; i++) { |
2342 | if (info->port_array[i] == NULL) | 2342 | if (info->port_array[i] == NULL) |
2343 | continue; | 2343 | continue; |
@@ -2374,7 +2374,7 @@ static irqreturn_t slgt_interrupt(int dummy, void *dev_id) | |||
2374 | !port->bh_requested) { | 2374 | !port->bh_requested) { |
2375 | DBGISR(("%s bh queued\n", port->device_name)); | 2375 | DBGISR(("%s bh queued\n", port->device_name)); |
2376 | schedule_work(&port->task); | 2376 | schedule_work(&port->task); |
2377 | port->bh_requested = 1; | 2377 | port->bh_requested = true; |
2378 | } | 2378 | } |
2379 | } | 2379 | } |
2380 | 2380 | ||
@@ -3110,7 +3110,8 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
3110 | { | 3110 | { |
3111 | DECLARE_WAITQUEUE(wait, current); | 3111 | DECLARE_WAITQUEUE(wait, current); |
3112 | int retval; | 3112 | int retval; |
3113 | int do_clocal = 0, extra_count = 0; | 3113 | bool do_clocal = false; |
3114 | bool extra_count = false; | ||
3114 | unsigned long flags; | 3115 | unsigned long flags; |
3115 | 3116 | ||
3116 | DBGINFO(("%s block_til_ready\n", tty->driver->name)); | 3117 | DBGINFO(("%s block_til_ready\n", tty->driver->name)); |
@@ -3122,7 +3123,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
3122 | } | 3123 | } |
3123 | 3124 | ||
3124 | if (tty->termios->c_cflag & CLOCAL) | 3125 | if (tty->termios->c_cflag & CLOCAL) |
3125 | do_clocal = 1; | 3126 | do_clocal = true; |
3126 | 3127 | ||
3127 | /* Wait for carrier detect and the line to become | 3128 | /* Wait for carrier detect and the line to become |
3128 | * free (i.e., not in use by the callout). While we are in | 3129 | * free (i.e., not in use by the callout). While we are in |
@@ -3136,7 +3137,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
3136 | 3137 | ||
3137 | spin_lock_irqsave(&info->lock, flags); | 3138 | spin_lock_irqsave(&info->lock, flags); |
3138 | if (!tty_hung_up_p(filp)) { | 3139 | if (!tty_hung_up_p(filp)) { |
3139 | extra_count = 1; | 3140 | extra_count = true; |
3140 | info->count--; | 3141 | info->count--; |
3141 | } | 3142 | } |
3142 | spin_unlock_irqrestore(&info->lock, flags); | 3143 | spin_unlock_irqrestore(&info->lock, flags); |
@@ -3321,7 +3322,7 @@ static int claim_resources(struct slgt_info *info) | |||
3321 | goto errout; | 3322 | goto errout; |
3322 | } | 3323 | } |
3323 | else | 3324 | else |
3324 | info->reg_addr_requested = 1; | 3325 | info->reg_addr_requested = true; |
3325 | 3326 | ||
3326 | info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE); | 3327 | info->reg_addr = ioremap(info->phys_reg_addr, SLGT_REG_SIZE); |
3327 | if (!info->reg_addr) { | 3328 | if (!info->reg_addr) { |
@@ -3341,12 +3342,12 @@ static void release_resources(struct slgt_info *info) | |||
3341 | { | 3342 | { |
3342 | if (info->irq_requested) { | 3343 | if (info->irq_requested) { |
3343 | free_irq(info->irq_level, info); | 3344 | free_irq(info->irq_level, info); |
3344 | info->irq_requested = 0; | 3345 | info->irq_requested = false; |
3345 | } | 3346 | } |
3346 | 3347 | ||
3347 | if (info->reg_addr_requested) { | 3348 | if (info->reg_addr_requested) { |
3348 | release_mem_region(info->phys_reg_addr, SLGT_REG_SIZE); | 3349 | release_mem_region(info->phys_reg_addr, SLGT_REG_SIZE); |
3349 | info->reg_addr_requested = 0; | 3350 | info->reg_addr_requested = false; |
3350 | } | 3351 | } |
3351 | 3352 | ||
3352 | if (info->reg_addr) { | 3353 | if (info->reg_addr) { |
@@ -3511,7 +3512,7 @@ static void device_init(int adapter_num, struct pci_dev *pdev) | |||
3511 | port_array[0]->device_name, | 3512 | port_array[0]->device_name, |
3512 | port_array[0]->irq_level)); | 3513 | port_array[0]->irq_level)); |
3513 | } else { | 3514 | } else { |
3514 | port_array[0]->irq_requested = 1; | 3515 | port_array[0]->irq_requested = true; |
3515 | adapter_test(port_array[0]); | 3516 | adapter_test(port_array[0]); |
3516 | for (i=1 ; i < port_count ; i++) { | 3517 | for (i=1 ; i < port_count ; i++) { |
3517 | port_array[i]->init_error = port_array[0]->init_error; | 3518 | port_array[i]->init_error = port_array[0]->init_error; |
@@ -3654,7 +3655,7 @@ static int __init slgt_init(void) | |||
3654 | printk("%s pci_register_driver error=%d\n", driver_name, rc); | 3655 | printk("%s pci_register_driver error=%d\n", driver_name, rc); |
3655 | goto error; | 3656 | goto error; |
3656 | } | 3657 | } |
3657 | pci_registered = 1; | 3658 | pci_registered = true; |
3658 | 3659 | ||
3659 | if (!slgt_device_list) | 3660 | if (!slgt_device_list) |
3660 | printk("%s no devices found\n",driver_name); | 3661 | printk("%s no devices found\n",driver_name); |
@@ -3812,8 +3813,8 @@ static void rx_stop(struct slgt_info *info) | |||
3812 | 3813 | ||
3813 | rdma_reset(info); | 3814 | rdma_reset(info); |
3814 | 3815 | ||
3815 | info->rx_enabled = 0; | 3816 | info->rx_enabled = false; |
3816 | info->rx_restart = 0; | 3817 | info->rx_restart = false; |
3817 | } | 3818 | } |
3818 | 3819 | ||
3819 | static void rx_start(struct slgt_info *info) | 3820 | static void rx_start(struct slgt_info *info) |
@@ -3849,8 +3850,8 @@ static void rx_start(struct slgt_info *info) | |||
3849 | /* enable receiver */ | 3850 | /* enable receiver */ |
3850 | wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1)); | 3851 | wr_reg16(info, RCR, (unsigned short)(rd_reg16(info, RCR) | BIT1)); |
3851 | 3852 | ||
3852 | info->rx_restart = 0; | 3853 | info->rx_restart = false; |
3853 | info->rx_enabled = 1; | 3854 | info->rx_enabled = true; |
3854 | } | 3855 | } |
3855 | 3856 | ||
3856 | static void tx_start(struct slgt_info *info) | 3857 | static void tx_start(struct slgt_info *info) |
@@ -3858,11 +3859,11 @@ static void tx_start(struct slgt_info *info) | |||
3858 | if (!info->tx_enabled) { | 3859 | if (!info->tx_enabled) { |
3859 | wr_reg16(info, TCR, | 3860 | wr_reg16(info, TCR, |
3860 | (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2)); | 3861 | (unsigned short)((rd_reg16(info, TCR) | BIT1) & ~BIT2)); |
3861 | info->tx_enabled = TRUE; | 3862 | info->tx_enabled = true; |
3862 | } | 3863 | } |
3863 | 3864 | ||
3864 | if (info->tx_count) { | 3865 | if (info->tx_count) { |
3865 | info->drop_rts_on_tx_done = 0; | 3866 | info->drop_rts_on_tx_done = false; |
3866 | 3867 | ||
3867 | if (info->params.mode != MGSL_MODE_ASYNC) { | 3868 | if (info->params.mode != MGSL_MODE_ASYNC) { |
3868 | if (info->params.flags & HDLC_FLAG_AUTO_RTS) { | 3869 | if (info->params.flags & HDLC_FLAG_AUTO_RTS) { |
@@ -3870,7 +3871,7 @@ static void tx_start(struct slgt_info *info) | |||
3870 | if (!(info->signals & SerialSignal_RTS)) { | 3871 | if (!(info->signals & SerialSignal_RTS)) { |
3871 | info->signals |= SerialSignal_RTS; | 3872 | info->signals |= SerialSignal_RTS; |
3872 | set_signals(info); | 3873 | set_signals(info); |
3873 | info->drop_rts_on_tx_done = 1; | 3874 | info->drop_rts_on_tx_done = true; |
3874 | } | 3875 | } |
3875 | } | 3876 | } |
3876 | 3877 | ||
@@ -3888,7 +3889,7 @@ static void tx_start(struct slgt_info *info) | |||
3888 | wr_reg16(info, SSR, IRQ_TXIDLE); | 3889 | wr_reg16(info, SSR, IRQ_TXIDLE); |
3889 | } | 3890 | } |
3890 | tdma_start(info); | 3891 | tdma_start(info); |
3891 | info->tx_active = 1; | 3892 | info->tx_active = true; |
3892 | } | 3893 | } |
3893 | } | 3894 | } |
3894 | 3895 | ||
@@ -3949,8 +3950,8 @@ static void tx_stop(struct slgt_info *info) | |||
3949 | 3950 | ||
3950 | reset_tbufs(info); | 3951 | reset_tbufs(info); |
3951 | 3952 | ||
3952 | info->tx_enabled = 0; | 3953 | info->tx_enabled = false; |
3953 | info->tx_active = 0; | 3954 | info->tx_active = false; |
3954 | } | 3955 | } |
3955 | 3956 | ||
3956 | static void reset_port(struct slgt_info *info) | 3957 | static void reset_port(struct slgt_info *info) |
@@ -4470,14 +4471,13 @@ static void reset_rbufs(struct slgt_info *info) | |||
4470 | /* | 4471 | /* |
4471 | * pass receive HDLC frame to upper layer | 4472 | * pass receive HDLC frame to upper layer |
4472 | * | 4473 | * |
4473 | * return 1 if frame available, otherwise 0 | 4474 | * return true if frame available, otherwise false |
4474 | */ | 4475 | */ |
4475 | static int rx_get_frame(struct slgt_info *info) | 4476 | static bool rx_get_frame(struct slgt_info *info) |
4476 | { | 4477 | { |
4477 | unsigned int start, end; | 4478 | unsigned int start, end; |
4478 | unsigned short status; | 4479 | unsigned short status; |
4479 | unsigned int framesize = 0; | 4480 | unsigned int framesize = 0; |
4480 | int rc = 0; | ||
4481 | unsigned long flags; | 4481 | unsigned long flags; |
4482 | struct tty_struct *tty = info->tty; | 4482 | struct tty_struct *tty = info->tty; |
4483 | unsigned char addr_field = 0xff; | 4483 | unsigned char addr_field = 0xff; |
@@ -4601,23 +4601,23 @@ check_again: | |||
4601 | } | 4601 | } |
4602 | } | 4602 | } |
4603 | free_rbufs(info, start, end); | 4603 | free_rbufs(info, start, end); |
4604 | rc = 1; | 4604 | return true; |
4605 | 4605 | ||
4606 | cleanup: | 4606 | cleanup: |
4607 | return rc; | 4607 | return false; |
4608 | } | 4608 | } |
4609 | 4609 | ||
4610 | /* | 4610 | /* |
4611 | * pass receive buffer (RAW synchronous mode) to tty layer | 4611 | * pass receive buffer (RAW synchronous mode) to tty layer |
4612 | * return 1 if buffer available, otherwise 0 | 4612 | * return true if buffer available, otherwise false |
4613 | */ | 4613 | */ |
4614 | static int rx_get_buf(struct slgt_info *info) | 4614 | static bool rx_get_buf(struct slgt_info *info) |
4615 | { | 4615 | { |
4616 | unsigned int i = info->rbuf_current; | 4616 | unsigned int i = info->rbuf_current; |
4617 | unsigned int count; | 4617 | unsigned int count; |
4618 | 4618 | ||
4619 | if (!desc_complete(info->rbufs[i])) | 4619 | if (!desc_complete(info->rbufs[i])) |
4620 | return 0; | 4620 | return false; |
4621 | count = desc_count(info->rbufs[i]); | 4621 | count = desc_count(info->rbufs[i]); |
4622 | switch(info->params.mode) { | 4622 | switch(info->params.mode) { |
4623 | case MGSL_MODE_MONOSYNC: | 4623 | case MGSL_MODE_MONOSYNC: |
@@ -4633,7 +4633,7 @@ static int rx_get_buf(struct slgt_info *info) | |||
4633 | ldisc_receive_buf(info->tty, info->rbufs[i].buf, | 4633 | ldisc_receive_buf(info->tty, info->rbufs[i].buf, |
4634 | info->flag_buf, count); | 4634 | info->flag_buf, count); |
4635 | free_rbufs(info, i, i); | 4635 | free_rbufs(info, i, i); |
4636 | return 1; | 4636 | return true; |
4637 | } | 4637 | } |
4638 | 4638 | ||
4639 | static void reset_tbufs(struct slgt_info *info) | 4639 | static void reset_tbufs(struct slgt_info *info) |
@@ -4758,7 +4758,7 @@ static int irq_test(struct slgt_info *info) | |||
4758 | 4758 | ||
4759 | /* assume failure */ | 4759 | /* assume failure */ |
4760 | info->init_error = DiagStatus_IrqFailure; | 4760 | info->init_error = DiagStatus_IrqFailure; |
4761 | info->irq_occurred = FALSE; | 4761 | info->irq_occurred = false; |
4762 | 4762 | ||
4763 | spin_unlock_irqrestore(&info->lock, flags); | 4763 | spin_unlock_irqrestore(&info->lock, flags); |
4764 | 4764 | ||
@@ -4891,7 +4891,7 @@ static void tx_timeout(unsigned long context) | |||
4891 | info->icount.txtimeout++; | 4891 | info->icount.txtimeout++; |
4892 | } | 4892 | } |
4893 | spin_lock_irqsave(&info->lock,flags); | 4893 | spin_lock_irqsave(&info->lock,flags); |
4894 | info->tx_active = 0; | 4894 | info->tx_active = false; |
4895 | info->tx_count = 0; | 4895 | info->tx_count = 0; |
4896 | spin_unlock_irqrestore(&info->lock,flags); | 4896 | spin_unlock_irqrestore(&info->lock,flags); |
4897 | 4897 | ||
diff --git a/drivers/char/synclinkmp.c b/drivers/char/synclinkmp.c index c96062ea72b4..66e8082aff7b 100644 --- a/drivers/char/synclinkmp.c +++ b/drivers/char/synclinkmp.c | |||
@@ -188,9 +188,9 @@ typedef struct _synclinkmp_info { | |||
188 | 188 | ||
189 | u32 pending_bh; | 189 | u32 pending_bh; |
190 | 190 | ||
191 | int bh_running; /* Protection from multiple */ | 191 | bool bh_running; /* Protection from multiple */ |
192 | int isr_overflow; | 192 | int isr_overflow; |
193 | int bh_requested; | 193 | bool bh_requested; |
194 | 194 | ||
195 | int dcd_chkcount; /* check counts to prevent */ | 195 | int dcd_chkcount; /* check counts to prevent */ |
196 | int cts_chkcount; /* too many IRQs if a signal */ | 196 | int cts_chkcount; /* too many IRQs if a signal */ |
@@ -213,11 +213,11 @@ typedef struct _synclinkmp_info { | |||
213 | unsigned char *tmp_rx_buf; | 213 | unsigned char *tmp_rx_buf; |
214 | unsigned int tmp_rx_buf_count; | 214 | unsigned int tmp_rx_buf_count; |
215 | 215 | ||
216 | int rx_enabled; | 216 | bool rx_enabled; |
217 | int rx_overflow; | 217 | bool rx_overflow; |
218 | 218 | ||
219 | int tx_enabled; | 219 | bool tx_enabled; |
220 | int tx_active; | 220 | bool tx_active; |
221 | u32 idle_mode; | 221 | u32 idle_mode; |
222 | 222 | ||
223 | unsigned char ie0_value; | 223 | unsigned char ie0_value; |
@@ -238,13 +238,13 @@ typedef struct _synclinkmp_info { | |||
238 | 238 | ||
239 | unsigned int irq_level; /* interrupt level */ | 239 | unsigned int irq_level; /* interrupt level */ |
240 | unsigned long irq_flags; | 240 | unsigned long irq_flags; |
241 | int irq_requested; /* nonzero if IRQ requested */ | 241 | bool irq_requested; /* true if IRQ requested */ |
242 | 242 | ||
243 | MGSL_PARAMS params; /* communications parameters */ | 243 | MGSL_PARAMS params; /* communications parameters */ |
244 | 244 | ||
245 | unsigned char serial_signals; /* current serial signal states */ | 245 | unsigned char serial_signals; /* current serial signal states */ |
246 | 246 | ||
247 | int irq_occurred; /* for diagnostics use */ | 247 | bool irq_occurred; /* for diagnostics use */ |
248 | unsigned int init_error; /* Initialization startup error */ | 248 | unsigned int init_error; /* Initialization startup error */ |
249 | 249 | ||
250 | u32 last_mem_alloc; | 250 | u32 last_mem_alloc; |
@@ -255,7 +255,7 @@ typedef struct _synclinkmp_info { | |||
255 | unsigned char* sca_base; /* HD64570 SCA Memory address */ | 255 | unsigned char* sca_base; /* HD64570 SCA Memory address */ |
256 | u32 phys_sca_base; | 256 | u32 phys_sca_base; |
257 | u32 sca_offset; | 257 | u32 sca_offset; |
258 | int sca_base_requested; | 258 | bool sca_base_requested; |
259 | 259 | ||
260 | unsigned char* lcr_base; /* local config registers (PCI only) */ | 260 | unsigned char* lcr_base; /* local config registers (PCI only) */ |
261 | u32 phys_lcr_base; | 261 | u32 phys_lcr_base; |
@@ -265,12 +265,12 @@ typedef struct _synclinkmp_info { | |||
265 | unsigned char* statctrl_base; /* status/control register memory */ | 265 | unsigned char* statctrl_base; /* status/control register memory */ |
266 | u32 phys_statctrl_base; | 266 | u32 phys_statctrl_base; |
267 | u32 statctrl_offset; | 267 | u32 statctrl_offset; |
268 | int sca_statctrl_requested; | 268 | bool sca_statctrl_requested; |
269 | 269 | ||
270 | u32 misc_ctrl_value; | 270 | u32 misc_ctrl_value; |
271 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; | 271 | char flag_buf[MAX_ASYNC_BUFFER_SIZE]; |
272 | char char_buf[MAX_ASYNC_BUFFER_SIZE]; | 272 | char char_buf[MAX_ASYNC_BUFFER_SIZE]; |
273 | BOOLEAN drop_rts_on_tx_done; | 273 | bool drop_rts_on_tx_done; |
274 | 274 | ||
275 | struct _input_signal_events input_signal_events; | 275 | struct _input_signal_events input_signal_events; |
276 | 276 | ||
@@ -571,12 +571,12 @@ static void shutdown(SLMP_INFO *info); | |||
571 | static void program_hw(SLMP_INFO *info); | 571 | static void program_hw(SLMP_INFO *info); |
572 | static void change_params(SLMP_INFO *info); | 572 | static void change_params(SLMP_INFO *info); |
573 | 573 | ||
574 | static int init_adapter(SLMP_INFO *info); | 574 | static bool init_adapter(SLMP_INFO *info); |
575 | static int register_test(SLMP_INFO *info); | 575 | static bool register_test(SLMP_INFO *info); |
576 | static int irq_test(SLMP_INFO *info); | 576 | static bool irq_test(SLMP_INFO *info); |
577 | static int loopback_test(SLMP_INFO *info); | 577 | static bool loopback_test(SLMP_INFO *info); |
578 | static int adapter_test(SLMP_INFO *info); | 578 | static int adapter_test(SLMP_INFO *info); |
579 | static int memory_test(SLMP_INFO *info); | 579 | static bool memory_test(SLMP_INFO *info); |
580 | 580 | ||
581 | static void reset_adapter(SLMP_INFO *info); | 581 | static void reset_adapter(SLMP_INFO *info); |
582 | static void reset_port(SLMP_INFO *info); | 582 | static void reset_port(SLMP_INFO *info); |
@@ -587,7 +587,7 @@ static void rx_stop(SLMP_INFO *info); | |||
587 | static void rx_start(SLMP_INFO *info); | 587 | static void rx_start(SLMP_INFO *info); |
588 | static void rx_reset_buffers(SLMP_INFO *info); | 588 | static void rx_reset_buffers(SLMP_INFO *info); |
589 | static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last); | 589 | static void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last); |
590 | static int rx_get_frame(SLMP_INFO *info); | 590 | static bool rx_get_frame(SLMP_INFO *info); |
591 | 591 | ||
592 | static void tx_start(SLMP_INFO *info); | 592 | static void tx_start(SLMP_INFO *info); |
593 | static void tx_stop(SLMP_INFO *info); | 593 | static void tx_stop(SLMP_INFO *info); |
@@ -2044,8 +2044,8 @@ int bh_action(SLMP_INFO *info) | |||
2044 | 2044 | ||
2045 | if (!rc) { | 2045 | if (!rc) { |
2046 | /* Mark BH routine as complete */ | 2046 | /* Mark BH routine as complete */ |
2047 | info->bh_running = 0; | 2047 | info->bh_running = false; |
2048 | info->bh_requested = 0; | 2048 | info->bh_requested = false; |
2049 | } | 2049 | } |
2050 | 2050 | ||
2051 | spin_unlock_irqrestore(&info->lock,flags); | 2051 | spin_unlock_irqrestore(&info->lock,flags); |
@@ -2067,7 +2067,7 @@ void bh_handler(struct work_struct *work) | |||
2067 | printk( "%s(%d):%s bh_handler() entry\n", | 2067 | printk( "%s(%d):%s bh_handler() entry\n", |
2068 | __FILE__,__LINE__,info->device_name); | 2068 | __FILE__,__LINE__,info->device_name); |
2069 | 2069 | ||
2070 | info->bh_running = 1; | 2070 | info->bh_running = true; |
2071 | 2071 | ||
2072 | while((action = bh_action(info)) != 0) { | 2072 | while((action = bh_action(info)) != 0) { |
2073 | 2073 | ||
@@ -2152,7 +2152,7 @@ void isr_timer(SLMP_INFO * info) | |||
2152 | */ | 2152 | */ |
2153 | write_reg(info, (unsigned char)(timer + TMCS), 0); | 2153 | write_reg(info, (unsigned char)(timer + TMCS), 0); |
2154 | 2154 | ||
2155 | info->irq_occurred = TRUE; | 2155 | info->irq_occurred = true; |
2156 | 2156 | ||
2157 | if ( debug_level >= DEBUG_LEVEL_ISR ) | 2157 | if ( debug_level >= DEBUG_LEVEL_ISR ) |
2158 | printk("%s(%d):%s isr_timer()\n", | 2158 | printk("%s(%d):%s isr_timer()\n", |
@@ -2232,7 +2232,7 @@ void isr_rxrdy(SLMP_INFO * info) | |||
2232 | while((status = read_reg(info,CST0)) & BIT0) | 2232 | while((status = read_reg(info,CST0)) & BIT0) |
2233 | { | 2233 | { |
2234 | int flag = 0; | 2234 | int flag = 0; |
2235 | int over = 0; | 2235 | bool over = false; |
2236 | DataByte = read_reg(info,TRB); | 2236 | DataByte = read_reg(info,TRB); |
2237 | 2237 | ||
2238 | icount->rx++; | 2238 | icount->rx++; |
@@ -2265,7 +2265,7 @@ void isr_rxrdy(SLMP_INFO * info) | |||
2265 | * reported immediately, and doesn't | 2265 | * reported immediately, and doesn't |
2266 | * affect the current character | 2266 | * affect the current character |
2267 | */ | 2267 | */ |
2268 | over = 1; | 2268 | over = true; |
2269 | } | 2269 | } |
2270 | } | 2270 | } |
2271 | } /* end of if (error) */ | 2271 | } /* end of if (error) */ |
@@ -2318,14 +2318,14 @@ static void isr_txeom(SLMP_INFO * info, unsigned char status) | |||
2318 | info->icount.txok++; | 2318 | info->icount.txok++; |
2319 | } | 2319 | } |
2320 | 2320 | ||
2321 | info->tx_active = 0; | 2321 | info->tx_active = false; |
2322 | info->tx_count = info->tx_put = info->tx_get = 0; | 2322 | info->tx_count = info->tx_put = info->tx_get = 0; |
2323 | 2323 | ||
2324 | del_timer(&info->tx_timer); | 2324 | del_timer(&info->tx_timer); |
2325 | 2325 | ||
2326 | if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done ) { | 2326 | if (info->params.mode != MGSL_MODE_ASYNC && info->drop_rts_on_tx_done ) { |
2327 | info->serial_signals &= ~SerialSignal_RTS; | 2327 | info->serial_signals &= ~SerialSignal_RTS; |
2328 | info->drop_rts_on_tx_done = 0; | 2328 | info->drop_rts_on_tx_done = false; |
2329 | set_signals(info); | 2329 | set_signals(info); |
2330 | } | 2330 | } |
2331 | 2331 | ||
@@ -2398,7 +2398,7 @@ void isr_txrdy(SLMP_INFO * info) | |||
2398 | if ( info->tx_count ) | 2398 | if ( info->tx_count ) |
2399 | tx_load_fifo( info ); | 2399 | tx_load_fifo( info ); |
2400 | else { | 2400 | else { |
2401 | info->tx_active = 0; | 2401 | info->tx_active = false; |
2402 | info->ie0_value &= ~TXRDYE; | 2402 | info->ie0_value &= ~TXRDYE; |
2403 | write_reg(info, IE0, info->ie0_value); | 2403 | write_reg(info, IE0, info->ie0_value); |
2404 | } | 2404 | } |
@@ -2438,7 +2438,7 @@ void isr_rxdmaerror(SLMP_INFO * info) | |||
2438 | printk("%s(%d):%s isr_rxdmaerror(), status=%02x\n", | 2438 | printk("%s(%d):%s isr_rxdmaerror(), status=%02x\n", |
2439 | __FILE__,__LINE__,info->device_name,status); | 2439 | __FILE__,__LINE__,info->device_name,status); |
2440 | 2440 | ||
2441 | info->rx_overflow = TRUE; | 2441 | info->rx_overflow = true; |
2442 | info->pending_bh |= BH_RECEIVE; | 2442 | info->pending_bh |= BH_RECEIVE; |
2443 | } | 2443 | } |
2444 | 2444 | ||
@@ -2691,7 +2691,7 @@ static irqreturn_t synclinkmp_interrupt(int dummy, void *dev_id) | |||
2691 | printk("%s(%d):%s queueing bh task.\n", | 2691 | printk("%s(%d):%s queueing bh task.\n", |
2692 | __FILE__,__LINE__,port->device_name); | 2692 | __FILE__,__LINE__,port->device_name); |
2693 | schedule_work(&port->task); | 2693 | schedule_work(&port->task); |
2694 | port->bh_requested = 1; | 2694 | port->bh_requested = true; |
2695 | } | 2695 | } |
2696 | } | 2696 | } |
2697 | 2697 | ||
@@ -3320,7 +3320,8 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
3320 | { | 3320 | { |
3321 | DECLARE_WAITQUEUE(wait, current); | 3321 | DECLARE_WAITQUEUE(wait, current); |
3322 | int retval; | 3322 | int retval; |
3323 | int do_clocal = 0, extra_count = 0; | 3323 | bool do_clocal = false; |
3324 | bool extra_count = false; | ||
3324 | unsigned long flags; | 3325 | unsigned long flags; |
3325 | 3326 | ||
3326 | if (debug_level >= DEBUG_LEVEL_INFO) | 3327 | if (debug_level >= DEBUG_LEVEL_INFO) |
@@ -3335,7 +3336,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
3335 | } | 3336 | } |
3336 | 3337 | ||
3337 | if (tty->termios->c_cflag & CLOCAL) | 3338 | if (tty->termios->c_cflag & CLOCAL) |
3338 | do_clocal = 1; | 3339 | do_clocal = true; |
3339 | 3340 | ||
3340 | /* Wait for carrier detect and the line to become | 3341 | /* Wait for carrier detect and the line to become |
3341 | * free (i.e., not in use by the callout). While we are in | 3342 | * free (i.e., not in use by the callout). While we are in |
@@ -3353,7 +3354,7 @@ static int block_til_ready(struct tty_struct *tty, struct file *filp, | |||
3353 | 3354 | ||
3354 | spin_lock_irqsave(&info->lock, flags); | 3355 | spin_lock_irqsave(&info->lock, flags); |
3355 | if (!tty_hung_up_p(filp)) { | 3356 | if (!tty_hung_up_p(filp)) { |
3356 | extra_count = 1; | 3357 | extra_count = true; |
3357 | info->count--; | 3358 | info->count--; |
3358 | } | 3359 | } |
3359 | spin_unlock_irqrestore(&info->lock, flags); | 3360 | spin_unlock_irqrestore(&info->lock, flags); |
@@ -3596,7 +3597,7 @@ int claim_resources(SLMP_INFO *info) | |||
3596 | goto errout; | 3597 | goto errout; |
3597 | } | 3598 | } |
3598 | else | 3599 | else |
3599 | info->shared_mem_requested = 1; | 3600 | info->shared_mem_requested = true; |
3600 | 3601 | ||
3601 | if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclinkmp") == NULL) { | 3602 | if (request_mem_region(info->phys_lcr_base + info->lcr_offset,128,"synclinkmp") == NULL) { |
3602 | printk( "%s(%d):%s lcr mem addr conflict, Addr=%08X\n", | 3603 | printk( "%s(%d):%s lcr mem addr conflict, Addr=%08X\n", |
@@ -3605,7 +3606,7 @@ int claim_resources(SLMP_INFO *info) | |||
3605 | goto errout; | 3606 | goto errout; |
3606 | } | 3607 | } |
3607 | else | 3608 | else |
3608 | info->lcr_mem_requested = 1; | 3609 | info->lcr_mem_requested = true; |
3609 | 3610 | ||
3610 | if (request_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE,"synclinkmp") == NULL) { | 3611 | if (request_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE,"synclinkmp") == NULL) { |
3611 | printk( "%s(%d):%s sca mem addr conflict, Addr=%08X\n", | 3612 | printk( "%s(%d):%s sca mem addr conflict, Addr=%08X\n", |
@@ -3614,7 +3615,7 @@ int claim_resources(SLMP_INFO *info) | |||
3614 | goto errout; | 3615 | goto errout; |
3615 | } | 3616 | } |
3616 | else | 3617 | else |
3617 | info->sca_base_requested = 1; | 3618 | info->sca_base_requested = true; |
3618 | 3619 | ||
3619 | if (request_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE,"synclinkmp") == NULL) { | 3620 | if (request_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE,"synclinkmp") == NULL) { |
3620 | printk( "%s(%d):%s stat/ctrl mem addr conflict, Addr=%08X\n", | 3621 | printk( "%s(%d):%s stat/ctrl mem addr conflict, Addr=%08X\n", |
@@ -3623,7 +3624,7 @@ int claim_resources(SLMP_INFO *info) | |||
3623 | goto errout; | 3624 | goto errout; |
3624 | } | 3625 | } |
3625 | else | 3626 | else |
3626 | info->sca_statctrl_requested = 1; | 3627 | info->sca_statctrl_requested = true; |
3627 | 3628 | ||
3628 | info->memory_base = ioremap(info->phys_memory_base,SCA_MEM_SIZE); | 3629 | info->memory_base = ioremap(info->phys_memory_base,SCA_MEM_SIZE); |
3629 | if (!info->memory_base) { | 3630 | if (!info->memory_base) { |
@@ -3682,24 +3683,24 @@ void release_resources(SLMP_INFO *info) | |||
3682 | 3683 | ||
3683 | if ( info->irq_requested ) { | 3684 | if ( info->irq_requested ) { |
3684 | free_irq(info->irq_level, info); | 3685 | free_irq(info->irq_level, info); |
3685 | info->irq_requested = 0; | 3686 | info->irq_requested = false; |
3686 | } | 3687 | } |
3687 | 3688 | ||
3688 | if ( info->shared_mem_requested ) { | 3689 | if ( info->shared_mem_requested ) { |
3689 | release_mem_region(info->phys_memory_base,SCA_MEM_SIZE); | 3690 | release_mem_region(info->phys_memory_base,SCA_MEM_SIZE); |
3690 | info->shared_mem_requested = 0; | 3691 | info->shared_mem_requested = false; |
3691 | } | 3692 | } |
3692 | if ( info->lcr_mem_requested ) { | 3693 | if ( info->lcr_mem_requested ) { |
3693 | release_mem_region(info->phys_lcr_base + info->lcr_offset,128); | 3694 | release_mem_region(info->phys_lcr_base + info->lcr_offset,128); |
3694 | info->lcr_mem_requested = 0; | 3695 | info->lcr_mem_requested = false; |
3695 | } | 3696 | } |
3696 | if ( info->sca_base_requested ) { | 3697 | if ( info->sca_base_requested ) { |
3697 | release_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE); | 3698 | release_mem_region(info->phys_sca_base + info->sca_offset,SCA_BASE_SIZE); |
3698 | info->sca_base_requested = 0; | 3699 | info->sca_base_requested = false; |
3699 | } | 3700 | } |
3700 | if ( info->sca_statctrl_requested ) { | 3701 | if ( info->sca_statctrl_requested ) { |
3701 | release_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE); | 3702 | release_mem_region(info->phys_statctrl_base + info->statctrl_offset,SCA_REG_SIZE); |
3702 | info->sca_statctrl_requested = 0; | 3703 | info->sca_statctrl_requested = false; |
3703 | } | 3704 | } |
3704 | 3705 | ||
3705 | if (info->memory_base){ | 3706 | if (info->memory_base){ |
@@ -3902,7 +3903,7 @@ void device_init(int adapter_num, struct pci_dev *pdev) | |||
3902 | port_array[0]->irq_level ); | 3903 | port_array[0]->irq_level ); |
3903 | } | 3904 | } |
3904 | else { | 3905 | else { |
3905 | port_array[0]->irq_requested = 1; | 3906 | port_array[0]->irq_requested = true; |
3906 | adapter_test(port_array[0]); | 3907 | adapter_test(port_array[0]); |
3907 | } | 3908 | } |
3908 | } | 3909 | } |
@@ -4155,8 +4156,8 @@ void rx_stop(SLMP_INFO *info) | |||
4155 | write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */ | 4156 | write_reg(info, RXDMA + DCMD, SWABORT); /* reset/init Rx DMA */ |
4156 | write_reg(info, RXDMA + DIR, 0); /* disable Rx DMA interrupts */ | 4157 | write_reg(info, RXDMA + DIR, 0); /* disable Rx DMA interrupts */ |
4157 | 4158 | ||
4158 | info->rx_enabled = 0; | 4159 | info->rx_enabled = false; |
4159 | info->rx_overflow = 0; | 4160 | info->rx_overflow = false; |
4160 | } | 4161 | } |
4161 | 4162 | ||
4162 | /* enable the receiver | 4163 | /* enable the receiver |
@@ -4211,8 +4212,8 @@ void rx_start(SLMP_INFO *info) | |||
4211 | 4212 | ||
4212 | write_reg(info, CMD, RXENABLE); | 4213 | write_reg(info, CMD, RXENABLE); |
4213 | 4214 | ||
4214 | info->rx_overflow = FALSE; | 4215 | info->rx_overflow = false; |
4215 | info->rx_enabled = 1; | 4216 | info->rx_enabled = true; |
4216 | } | 4217 | } |
4217 | 4218 | ||
4218 | /* Enable the transmitter and send a transmit frame if | 4219 | /* Enable the transmitter and send a transmit frame if |
@@ -4227,7 +4228,7 @@ void tx_start(SLMP_INFO *info) | |||
4227 | if (!info->tx_enabled ) { | 4228 | if (!info->tx_enabled ) { |
4228 | write_reg(info, CMD, TXRESET); | 4229 | write_reg(info, CMD, TXRESET); |
4229 | write_reg(info, CMD, TXENABLE); | 4230 | write_reg(info, CMD, TXENABLE); |
4230 | info->tx_enabled = TRUE; | 4231 | info->tx_enabled = true; |
4231 | } | 4232 | } |
4232 | 4233 | ||
4233 | if ( info->tx_count ) { | 4234 | if ( info->tx_count ) { |
@@ -4236,7 +4237,7 @@ void tx_start(SLMP_INFO *info) | |||
4236 | /* RTS and set a flag indicating that the driver should */ | 4237 | /* RTS and set a flag indicating that the driver should */ |
4237 | /* negate RTS when the transmission completes. */ | 4238 | /* negate RTS when the transmission completes. */ |
4238 | 4239 | ||
4239 | info->drop_rts_on_tx_done = 0; | 4240 | info->drop_rts_on_tx_done = false; |
4240 | 4241 | ||
4241 | if (info->params.mode != MGSL_MODE_ASYNC) { | 4242 | if (info->params.mode != MGSL_MODE_ASYNC) { |
4242 | 4243 | ||
@@ -4245,7 +4246,7 @@ void tx_start(SLMP_INFO *info) | |||
4245 | if ( !(info->serial_signals & SerialSignal_RTS) ) { | 4246 | if ( !(info->serial_signals & SerialSignal_RTS) ) { |
4246 | info->serial_signals |= SerialSignal_RTS; | 4247 | info->serial_signals |= SerialSignal_RTS; |
4247 | set_signals( info ); | 4248 | set_signals( info ); |
4248 | info->drop_rts_on_tx_done = 1; | 4249 | info->drop_rts_on_tx_done = true; |
4249 | } | 4250 | } |
4250 | } | 4251 | } |
4251 | 4252 | ||
@@ -4282,7 +4283,7 @@ void tx_start(SLMP_INFO *info) | |||
4282 | write_reg(info, IE0, info->ie0_value); | 4283 | write_reg(info, IE0, info->ie0_value); |
4283 | } | 4284 | } |
4284 | 4285 | ||
4285 | info->tx_active = 1; | 4286 | info->tx_active = true; |
4286 | } | 4287 | } |
4287 | } | 4288 | } |
4288 | 4289 | ||
@@ -4308,8 +4309,8 @@ void tx_stop( SLMP_INFO *info ) | |||
4308 | info->ie0_value &= ~TXRDYE; | 4309 | info->ie0_value &= ~TXRDYE; |
4309 | write_reg(info, IE0, info->ie0_value); /* disable tx data interrupts */ | 4310 | write_reg(info, IE0, info->ie0_value); /* disable tx data interrupts */ |
4310 | 4311 | ||
4311 | info->tx_enabled = 0; | 4312 | info->tx_enabled = false; |
4312 | info->tx_active = 0; | 4313 | info->tx_active = false; |
4313 | } | 4314 | } |
4314 | 4315 | ||
4315 | /* Fill the transmit FIFO until the FIFO is full or | 4316 | /* Fill the transmit FIFO until the FIFO is full or |
@@ -4832,14 +4833,14 @@ void rx_reset_buffers(SLMP_INFO *info) | |||
4832 | */ | 4833 | */ |
4833 | void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last) | 4834 | void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int last) |
4834 | { | 4835 | { |
4835 | int done = 0; | 4836 | bool done = false; |
4836 | 4837 | ||
4837 | while(!done) { | 4838 | while(!done) { |
4838 | /* reset current buffer for reuse */ | 4839 | /* reset current buffer for reuse */ |
4839 | info->rx_buf_list[first].status = 0xff; | 4840 | info->rx_buf_list[first].status = 0xff; |
4840 | 4841 | ||
4841 | if (first == last) { | 4842 | if (first == last) { |
4842 | done = 1; | 4843 | done = true; |
4843 | /* set new last rx descriptor address */ | 4844 | /* set new last rx descriptor address */ |
4844 | write_reg16(info, RXDMA + EDA, info->rx_buf_list_ex[first].phys_entry); | 4845 | write_reg16(info, RXDMA + EDA, info->rx_buf_list_ex[first].phys_entry); |
4845 | } | 4846 | } |
@@ -4856,14 +4857,14 @@ void rx_free_frame_buffers(SLMP_INFO *info, unsigned int first, unsigned int las | |||
4856 | /* Return a received frame from the receive DMA buffers. | 4857 | /* Return a received frame from the receive DMA buffers. |
4857 | * Only frames received without errors are returned. | 4858 | * Only frames received without errors are returned. |
4858 | * | 4859 | * |
4859 | * Return Value: 1 if frame returned, otherwise 0 | 4860 | * Return Value: true if frame returned, otherwise false |
4860 | */ | 4861 | */ |
4861 | int rx_get_frame(SLMP_INFO *info) | 4862 | bool rx_get_frame(SLMP_INFO *info) |
4862 | { | 4863 | { |
4863 | unsigned int StartIndex, EndIndex; /* index of 1st and last buffers of Rx frame */ | 4864 | unsigned int StartIndex, EndIndex; /* index of 1st and last buffers of Rx frame */ |
4864 | unsigned short status; | 4865 | unsigned short status; |
4865 | unsigned int framesize = 0; | 4866 | unsigned int framesize = 0; |
4866 | int ReturnCode = 0; | 4867 | bool ReturnCode = false; |
4867 | unsigned long flags; | 4868 | unsigned long flags; |
4868 | struct tty_struct *tty = info->tty; | 4869 | struct tty_struct *tty = info->tty; |
4869 | unsigned char addr_field = 0xff; | 4870 | unsigned char addr_field = 0xff; |
@@ -5014,7 +5015,7 @@ CheckAgain: | |||
5014 | /* Free the buffers used by this frame. */ | 5015 | /* Free the buffers used by this frame. */ |
5015 | rx_free_frame_buffers( info, StartIndex, EndIndex ); | 5016 | rx_free_frame_buffers( info, StartIndex, EndIndex ); |
5016 | 5017 | ||
5017 | ReturnCode = 1; | 5018 | ReturnCode = true; |
5018 | 5019 | ||
5019 | Cleanup: | 5020 | Cleanup: |
5020 | if ( info->rx_enabled && info->rx_overflow ) { | 5021 | if ( info->rx_enabled && info->rx_overflow ) { |
@@ -5073,12 +5074,12 @@ void tx_load_dma_buffer(SLMP_INFO *info, const char *buf, unsigned int count) | |||
5073 | info->last_tx_buf = ++i; | 5074 | info->last_tx_buf = ++i; |
5074 | } | 5075 | } |
5075 | 5076 | ||
5076 | int register_test(SLMP_INFO *info) | 5077 | bool register_test(SLMP_INFO *info) |
5077 | { | 5078 | { |
5078 | static unsigned char testval[] = {0x00, 0xff, 0xaa, 0x55, 0x69, 0x96}; | 5079 | static unsigned char testval[] = {0x00, 0xff, 0xaa, 0x55, 0x69, 0x96}; |
5079 | static unsigned int count = ARRAY_SIZE(testval); | 5080 | static unsigned int count = ARRAY_SIZE(testval); |
5080 | unsigned int i; | 5081 | unsigned int i; |
5081 | int rc = TRUE; | 5082 | bool rc = true; |
5082 | unsigned long flags; | 5083 | unsigned long flags; |
5083 | 5084 | ||
5084 | spin_lock_irqsave(&info->lock,flags); | 5085 | spin_lock_irqsave(&info->lock,flags); |
@@ -5101,7 +5102,7 @@ int register_test(SLMP_INFO *info) | |||
5101 | (read_reg(info, SA0) != testval[(i+2)%count]) || | 5102 | (read_reg(info, SA0) != testval[(i+2)%count]) || |
5102 | (read_reg(info, SA1) != testval[(i+3)%count]) ) | 5103 | (read_reg(info, SA1) != testval[(i+3)%count]) ) |
5103 | { | 5104 | { |
5104 | rc = FALSE; | 5105 | rc = false; |
5105 | break; | 5106 | break; |
5106 | } | 5107 | } |
5107 | } | 5108 | } |
@@ -5112,7 +5113,7 @@ int register_test(SLMP_INFO *info) | |||
5112 | return rc; | 5113 | return rc; |
5113 | } | 5114 | } |
5114 | 5115 | ||
5115 | int irq_test(SLMP_INFO *info) | 5116 | bool irq_test(SLMP_INFO *info) |
5116 | { | 5117 | { |
5117 | unsigned long timeout; | 5118 | unsigned long timeout; |
5118 | unsigned long flags; | 5119 | unsigned long flags; |
@@ -5124,7 +5125,7 @@ int irq_test(SLMP_INFO *info) | |||
5124 | 5125 | ||
5125 | /* assume failure */ | 5126 | /* assume failure */ |
5126 | info->init_error = DiagStatus_IrqFailure; | 5127 | info->init_error = DiagStatus_IrqFailure; |
5127 | info->irq_occurred = FALSE; | 5128 | info->irq_occurred = false; |
5128 | 5129 | ||
5129 | /* setup timer0 on SCA0 to interrupt */ | 5130 | /* setup timer0 on SCA0 to interrupt */ |
5130 | 5131 | ||
@@ -5163,7 +5164,7 @@ int irq_test(SLMP_INFO *info) | |||
5163 | 5164 | ||
5164 | /* initialize individual SCA device (2 ports) | 5165 | /* initialize individual SCA device (2 ports) |
5165 | */ | 5166 | */ |
5166 | static int sca_init(SLMP_INFO *info) | 5167 | static bool sca_init(SLMP_INFO *info) |
5167 | { | 5168 | { |
5168 | /* set wait controller to single mem partition (low), no wait states */ | 5169 | /* set wait controller to single mem partition (low), no wait states */ |
5169 | write_reg(info, PABR0, 0); /* wait controller addr boundary 0 */ | 5170 | write_reg(info, PABR0, 0); /* wait controller addr boundary 0 */ |
@@ -5199,12 +5200,12 @@ static int sca_init(SLMP_INFO *info) | |||
5199 | */ | 5200 | */ |
5200 | write_reg(info, ITCR, 0); | 5201 | write_reg(info, ITCR, 0); |
5201 | 5202 | ||
5202 | return TRUE; | 5203 | return true; |
5203 | } | 5204 | } |
5204 | 5205 | ||
5205 | /* initialize adapter hardware | 5206 | /* initialize adapter hardware |
5206 | */ | 5207 | */ |
5207 | int init_adapter(SLMP_INFO *info) | 5208 | bool init_adapter(SLMP_INFO *info) |
5208 | { | 5209 | { |
5209 | int i; | 5210 | int i; |
5210 | 5211 | ||
@@ -5257,20 +5258,20 @@ int init_adapter(SLMP_INFO *info) | |||
5257 | sca_init(info->port_array[0]); | 5258 | sca_init(info->port_array[0]); |
5258 | sca_init(info->port_array[2]); | 5259 | sca_init(info->port_array[2]); |
5259 | 5260 | ||
5260 | return TRUE; | 5261 | return true; |
5261 | } | 5262 | } |
5262 | 5263 | ||
5263 | /* Loopback an HDLC frame to test the hardware | 5264 | /* Loopback an HDLC frame to test the hardware |
5264 | * interrupt and DMA functions. | 5265 | * interrupt and DMA functions. |
5265 | */ | 5266 | */ |
5266 | int loopback_test(SLMP_INFO *info) | 5267 | bool loopback_test(SLMP_INFO *info) |
5267 | { | 5268 | { |
5268 | #define TESTFRAMESIZE 20 | 5269 | #define TESTFRAMESIZE 20 |
5269 | 5270 | ||
5270 | unsigned long timeout; | 5271 | unsigned long timeout; |
5271 | u16 count = TESTFRAMESIZE; | 5272 | u16 count = TESTFRAMESIZE; |
5272 | unsigned char buf[TESTFRAMESIZE]; | 5273 | unsigned char buf[TESTFRAMESIZE]; |
5273 | int rc = FALSE; | 5274 | bool rc = false; |
5274 | unsigned long flags; | 5275 | unsigned long flags; |
5275 | 5276 | ||
5276 | struct tty_struct *oldtty = info->tty; | 5277 | struct tty_struct *oldtty = info->tty; |
@@ -5304,16 +5305,16 @@ int loopback_test(SLMP_INFO *info) | |||
5304 | msleep_interruptible(10); | 5305 | msleep_interruptible(10); |
5305 | 5306 | ||
5306 | if (rx_get_frame(info)) { | 5307 | if (rx_get_frame(info)) { |
5307 | rc = TRUE; | 5308 | rc = true; |
5308 | break; | 5309 | break; |
5309 | } | 5310 | } |
5310 | } | 5311 | } |
5311 | 5312 | ||
5312 | /* verify received frame length and contents */ | 5313 | /* verify received frame length and contents */ |
5313 | if (rc == TRUE && | 5314 | if (rc && |
5314 | ( info->tmp_rx_buf_count != count || | 5315 | ( info->tmp_rx_buf_count != count || |
5315 | memcmp(buf, info->tmp_rx_buf,count))) { | 5316 | memcmp(buf, info->tmp_rx_buf,count))) { |
5316 | rc = FALSE; | 5317 | rc = false; |
5317 | } | 5318 | } |
5318 | 5319 | ||
5319 | spin_lock_irqsave(&info->lock,flags); | 5320 | spin_lock_irqsave(&info->lock,flags); |
@@ -5390,7 +5391,7 @@ int adapter_test( SLMP_INFO *info ) | |||
5390 | 5391 | ||
5391 | /* Test the shared memory on a PCI adapter. | 5392 | /* Test the shared memory on a PCI adapter. |
5392 | */ | 5393 | */ |
5393 | int memory_test(SLMP_INFO *info) | 5394 | bool memory_test(SLMP_INFO *info) |
5394 | { | 5395 | { |
5395 | static unsigned long testval[] = { 0x0, 0x55555555, 0xaaaaaaaa, | 5396 | static unsigned long testval[] = { 0x0, 0x55555555, 0xaaaaaaaa, |
5396 | 0x66666666, 0x99999999, 0xffffffff, 0x12345678 }; | 5397 | 0x66666666, 0x99999999, 0xffffffff, 0x12345678 }; |
@@ -5404,7 +5405,7 @@ int memory_test(SLMP_INFO *info) | |||
5404 | for ( i = 0 ; i < count ; i++ ) { | 5405 | for ( i = 0 ; i < count ; i++ ) { |
5405 | *addr = testval[i]; | 5406 | *addr = testval[i]; |
5406 | if ( *addr != testval[i] ) | 5407 | if ( *addr != testval[i] ) |
5407 | return FALSE; | 5408 | return false; |
5408 | } | 5409 | } |
5409 | 5410 | ||
5410 | /* Test address lines with incrementing pattern over */ | 5411 | /* Test address lines with incrementing pattern over */ |
@@ -5419,12 +5420,12 @@ int memory_test(SLMP_INFO *info) | |||
5419 | 5420 | ||
5420 | for ( i = 0 ; i < limit ; i++ ) { | 5421 | for ( i = 0 ; i < limit ; i++ ) { |
5421 | if ( *addr != i * 4 ) | 5422 | if ( *addr != i * 4 ) |
5422 | return FALSE; | 5423 | return false; |
5423 | addr++; | 5424 | addr++; |
5424 | } | 5425 | } |
5425 | 5426 | ||
5426 | memset( info->memory_base, 0, SCA_MEM_SIZE ); | 5427 | memset( info->memory_base, 0, SCA_MEM_SIZE ); |
5427 | return TRUE; | 5428 | return true; |
5428 | } | 5429 | } |
5429 | 5430 | ||
5430 | /* Load data into PCI adapter shared memory. | 5431 | /* Load data into PCI adapter shared memory. |
@@ -5508,7 +5509,7 @@ void tx_timeout(unsigned long context) | |||
5508 | info->icount.txtimeout++; | 5509 | info->icount.txtimeout++; |
5509 | } | 5510 | } |
5510 | spin_lock_irqsave(&info->lock,flags); | 5511 | spin_lock_irqsave(&info->lock,flags); |
5511 | info->tx_active = 0; | 5512 | info->tx_active = false; |
5512 | info->tx_count = info->tx_put = info->tx_get = 0; | 5513 | info->tx_count = info->tx_put = info->tx_get = 0; |
5513 | 5514 | ||
5514 | spin_unlock_irqrestore(&info->lock,flags); | 5515 | spin_unlock_irqrestore(&info->lock,flags); |