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authorChris Wilson <chris@chris-wilson.co.uk>2011-04-05 11:04:39 -0400
committerKeith Packard <keithp@keithp.com>2011-04-05 12:05:34 -0400
commit0de009c900e7ebd21097797f723a40813e953879 (patch)
tree48a314a677088da01022e7f3ff119353cc55c861 /drivers
parent7f58aabc369014fda3a4a33604ba0a1b63b941ac (diff)
drm/i915/crt: Remove 0xa0 probe for VGA
This is a moral revert of 6ec3d0c0e9c0c605696e91048eebaca7b0c36695. Following the fix to reset the GMBUS controller after a NAK, we finally utilize the 0xa0 probe for a CRT connection. And discover that the code is broken. Shock. There are a number of issues, but following a key insight from Dave Airlie, that 0xA0 is an invalid address on a 7-bit bus (though not if we were to enable 10-bit addressing), and would look like the EDID port 0x50, it is possible to see where the confusion starts. In short, a write to 0xA0 is accepted by the GMBUS controller which we interpreted as meaning the existence of a connection (a slave on the other end of the wire ACKing the write). That was false. During testing with a broken GMBUS implementation, which never reset an earlier NAK, this test always reported a NAK and so we proceeded on to the next test. Reported-and-tested-by: Sitsofe Wheeler <sitsofe@yahoo.com> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35904 Reported-and-tested-by: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com> Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=32612 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Dave Airlie <airlied@linux.ie> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c20
1 files changed, 0 insertions, 20 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 8342259f3160..d03fc05b39c0 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -269,21 +269,6 @@ static bool intel_crt_detect_hotplug(struct drm_connector *connector)
269 return ret; 269 return ret;
270} 270}
271 271
272static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus)
273{
274 u8 buf;
275 struct i2c_msg msgs[] = {
276 {
277 .addr = 0xA0,
278 .flags = 0,
279 .len = 1,
280 .buf = &buf,
281 },
282 };
283 /* DDC monitor detect: Does it ACK a write to 0xA0? */
284 return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1;
285}
286
287static bool intel_crt_detect_ddc(struct drm_connector *connector) 272static bool intel_crt_detect_ddc(struct drm_connector *connector)
288{ 273{
289 struct intel_crt *crt = intel_attached_crt(connector); 274 struct intel_crt *crt = intel_attached_crt(connector);
@@ -293,11 +278,6 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)
293 if (crt->base.type != INTEL_OUTPUT_ANALOG) 278 if (crt->base.type != INTEL_OUTPUT_ANALOG)
294 return false; 279 return false;
295 280
296 if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) {
297 DRM_DEBUG_KMS("CRT detected via DDC:0xa0\n");
298 return true;
299 }
300
301 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { 281 if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
302 struct edid *edid; 282 struct edid *edid;
303 bool is_digital = false; 283 bool is_digital = false;