diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-06-07 01:21:23 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-06-23 02:00:17 -0400 |
commit | d02836b4f5c24d2a38b3bdc10f05251e1f6e111d (patch) | |
tree | bce3dc2083a878e58ca0815dccc6eed3ee5880af /drivers | |
parent | ce163f6967121d77e3983aa06d416afacf3070c2 (diff) |
drm/nv84-nvc0: explicitly map semaphore buffer into channel vm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_fence.c | 29 |
2 files changed, 14 insertions, 16 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 06b90dcacc53..7e12d4d545b6 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -240,6 +240,7 @@ struct nouveau_channel { | |||
240 | uint32_t sequence; | 240 | uint32_t sequence; |
241 | uint32_t sequence_ack; | 241 | uint32_t sequence_ack; |
242 | atomic_t last_sequence_irq; | 242 | atomic_t last_sequence_irq; |
243 | struct nouveau_vma vma; | ||
243 | } fence; | 244 | } fence; |
244 | 245 | ||
245 | /* DMA push buffer */ | 246 | /* DMA push buffer */ |
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 7347075ca5b8..9d5c57778453 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
@@ -336,6 +336,7 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
336 | { | 336 | { |
337 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; | 337 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
338 | struct nouveau_fence *fence = NULL; | 338 | struct nouveau_fence *fence = NULL; |
339 | u64 offset = chan->fence.vma.offset + sema->mem->start; | ||
339 | int ret; | 340 | int ret; |
340 | 341 | ||
341 | if (dev_priv->chipset < 0x84) { | 342 | if (dev_priv->chipset < 0x84) { |
@@ -345,13 +346,10 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
345 | 346 | ||
346 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3); | 347 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 3); |
347 | OUT_RING (chan, NvSema); | 348 | OUT_RING (chan, NvSema); |
348 | OUT_RING (chan, sema->mem->start); | 349 | OUT_RING (chan, offset); |
349 | OUT_RING (chan, 1); | 350 | OUT_RING (chan, 1); |
350 | } else | 351 | } else |
351 | if (dev_priv->chipset < 0xc0) { | 352 | if (dev_priv->chipset < 0xc0) { |
352 | struct nouveau_vma *vma = &dev_priv->fence.bo->vma; | ||
353 | u64 offset = vma->offset + sema->mem->start; | ||
354 | |||
355 | ret = RING_SPACE(chan, 7); | 353 | ret = RING_SPACE(chan, 7); |
356 | if (ret) | 354 | if (ret) |
357 | return ret; | 355 | return ret; |
@@ -364,9 +362,6 @@ semaphore_acquire(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
364 | OUT_RING (chan, 1); | 362 | OUT_RING (chan, 1); |
365 | OUT_RING (chan, 1); /* ACQUIRE_EQ */ | 363 | OUT_RING (chan, 1); /* ACQUIRE_EQ */ |
366 | } else { | 364 | } else { |
367 | struct nouveau_vma *vma = &dev_priv->fence.bo->vma; | ||
368 | u64 offset = vma->offset + sema->mem->start; | ||
369 | |||
370 | ret = RING_SPACE(chan, 5); | 365 | ret = RING_SPACE(chan, 5); |
371 | if (ret) | 366 | if (ret) |
372 | return ret; | 367 | return ret; |
@@ -394,6 +389,7 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
394 | { | 389 | { |
395 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; | 390 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; |
396 | struct nouveau_fence *fence = NULL; | 391 | struct nouveau_fence *fence = NULL; |
392 | u64 offset = chan->fence.vma.offset + sema->mem->start; | ||
397 | int ret; | 393 | int ret; |
398 | 394 | ||
399 | if (dev_priv->chipset < 0x84) { | 395 | if (dev_priv->chipset < 0x84) { |
@@ -403,14 +399,11 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
403 | 399 | ||
404 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2); | 400 | BEGIN_RING(chan, NvSubSw, NV_SW_DMA_SEMAPHORE, 2); |
405 | OUT_RING (chan, NvSema); | 401 | OUT_RING (chan, NvSema); |
406 | OUT_RING (chan, sema->mem->start); | 402 | OUT_RING (chan, offset); |
407 | BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1); | 403 | BEGIN_RING(chan, NvSubSw, NV_SW_SEMAPHORE_RELEASE, 1); |
408 | OUT_RING (chan, 1); | 404 | OUT_RING (chan, 1); |
409 | } else | 405 | } else |
410 | if (dev_priv->chipset < 0xc0) { | 406 | if (dev_priv->chipset < 0xc0) { |
411 | struct nouveau_vma *vma = &dev_priv->fence.bo->vma; | ||
412 | u64 offset = vma->offset + sema->mem->start; | ||
413 | |||
414 | ret = RING_SPACE(chan, 7); | 407 | ret = RING_SPACE(chan, 7); |
415 | if (ret) | 408 | if (ret) |
416 | return ret; | 409 | return ret; |
@@ -423,9 +416,6 @@ semaphore_release(struct nouveau_channel *chan, struct nouveau_semaphore *sema) | |||
423 | OUT_RING (chan, 1); | 416 | OUT_RING (chan, 1); |
424 | OUT_RING (chan, 2); /* RELEASE */ | 417 | OUT_RING (chan, 2); /* RELEASE */ |
425 | } else { | 418 | } else { |
426 | struct nouveau_vma *vma = &dev_priv->fence.bo->vma; | ||
427 | u64 offset = vma->offset + sema->mem->start; | ||
428 | |||
429 | ret = RING_SPACE(chan, 5); | 419 | ret = RING_SPACE(chan, 5); |
430 | if (ret) | 420 | if (ret) |
431 | return ret; | 421 | return ret; |
@@ -540,6 +530,12 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
540 | nouveau_gpuobj_ref(NULL, &obj); | 530 | nouveau_gpuobj_ref(NULL, &obj); |
541 | if (ret) | 531 | if (ret) |
542 | return ret; | 532 | return ret; |
533 | } else { | ||
534 | /* map fence bo into channel's vm */ | ||
535 | ret = nouveau_bo_vma_add(dev_priv->fence.bo, chan->vm, | ||
536 | &chan->fence.vma); | ||
537 | if (ret) | ||
538 | return ret; | ||
543 | } | 539 | } |
544 | 540 | ||
545 | INIT_LIST_HEAD(&chan->fence.pending); | 541 | INIT_LIST_HEAD(&chan->fence.pending); |
@@ -551,10 +547,10 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
551 | void | 547 | void |
552 | nouveau_fence_channel_fini(struct nouveau_channel *chan) | 548 | nouveau_fence_channel_fini(struct nouveau_channel *chan) |
553 | { | 549 | { |
550 | struct drm_nouveau_private *dev_priv = chan->dev->dev_private; | ||
554 | struct nouveau_fence *tmp, *fence; | 551 | struct nouveau_fence *tmp, *fence; |
555 | 552 | ||
556 | spin_lock(&chan->fence.lock); | 553 | spin_lock(&chan->fence.lock); |
557 | |||
558 | list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) { | 554 | list_for_each_entry_safe(fence, tmp, &chan->fence.pending, entry) { |
559 | fence->signalled = true; | 555 | fence->signalled = true; |
560 | list_del(&fence->entry); | 556 | list_del(&fence->entry); |
@@ -564,8 +560,9 @@ nouveau_fence_channel_fini(struct nouveau_channel *chan) | |||
564 | 560 | ||
565 | kref_put(&fence->refcount, nouveau_fence_del); | 561 | kref_put(&fence->refcount, nouveau_fence_del); |
566 | } | 562 | } |
567 | |||
568 | spin_unlock(&chan->fence.lock); | 563 | spin_unlock(&chan->fence.lock); |
564 | |||
565 | nouveau_bo_vma_del(dev_priv->fence.bo, &chan->fence.vma); | ||
569 | } | 566 | } |
570 | 567 | ||
571 | int | 568 | int |