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authorMike Frysinger <vapier.adi@gmail.com>2009-04-06 22:00:39 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-04-07 11:31:05 -0400
commitb31e27a6dc2c6534399c595ba78390125a56e90f (patch)
tree2d2e3d2b1f50c98743e1667e8b86cb3b8180eeb3 /drivers
parent40a2945b97b4da9120653d84f1c3a58fe58be64c (diff)
Blackfin SPI Driver: use the properl BIT_CTL_xxx defines
use the properl BIT_CTL_... defines rather than the internal driv er CFG_SPI_... defines Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> Cc: David Brownell <david-b@pacbell.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/spi/spi_bfin5xx.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 5ebb67b011d0..1c10efb120db 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -799,7 +799,7 @@ static void pump_transfers(unsigned long data)
799 799
800 /* start SPI transfer */ 800 /* start SPI transfer */
801 write_CTRL(drv_data, 801 write_CTRL(drv_data,
802 (cr | CFG_SPI_DMAWRITE | BIT_CTL_ENABLE)); 802 (cr | BIT_CTL_TIMOD_DMA_TX | BIT_CTL_ENABLE));
803 803
804 /* just return here, there can only be one transfer 804 /* just return here, there can only be one transfer
805 * in this mode 805 * in this mode
@@ -827,7 +827,7 @@ static void pump_transfers(unsigned long data)
827 827
828 dma_config |= WNR; 828 dma_config |= WNR;
829 dma_start_addr = (unsigned long)drv_data->rx; 829 dma_start_addr = (unsigned long)drv_data->rx;
830 cr |= CFG_SPI_DMAREAD; 830 cr |= BIT_CTL_TIMOD_DMA_RX | BIT_CTL_SENDOPT;
831 831
832 } else if (drv_data->tx != NULL) { 832 } else if (drv_data->tx != NULL) {
833 dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n"); 833 dev_dbg(&drv_data->pdev->dev, "doing DMA out.\n");
@@ -839,7 +839,7 @@ static void pump_transfers(unsigned long data)
839 drv_data->len_in_bytes)); 839 drv_data->len_in_bytes));
840 840
841 dma_start_addr = (unsigned long)drv_data->tx; 841 dma_start_addr = (unsigned long)drv_data->tx;
842 cr |= CFG_SPI_DMAWRITE; 842 cr |= BIT_CTL_TIMOD_DMA_TX;
843 843
844 } else 844 } else
845 BUG(); 845 BUG();